From 153fed54bbd6d94e4b0004a850ece013f9312ff5 Mon Sep 17 00:00:00 2001 From: Andrey Grodzovsky Date: Fri, 4 Mar 2016 16:55:55 -0500 Subject: [PATCH 1485/1565] drm/amd/dal: Add variadic register update/set function. - Used the new API in DCE11 cursor programming as example. - Added standard variadic macro notation writing Signed-off-by: Andrey Grodzovsky Acked-by: Harry Wentland --- .../gpu/drm/amd/dal/dc/dce110/dce110_ipp_cursor.c | 30 +++++++++------ drivers/gpu/drm/amd/dal/dc/dm_services.h | 43 ++++++++++++++++++++++ 2 files changed, 61 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_ipp_cursor.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_ipp_cursor.c index 2dabaed..1737317 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_ipp_cursor.c +++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_ipp_cursor.c @@ -37,6 +37,18 @@ #define DCP_REG(reg)\ (reg + ipp110->offsets.dcp_offset) +#define DCP_REG_UPDATE_N(reg_name, n, ...) \ + generic_reg_update(ipp110->base.ctx, ipp110->offsets.dcp_offset, reg_name, n, __VA_ARGS__) + +#define DCP_REG_SET_N(reg_name, n, ...) \ + generic_reg_set(ipp110->base.ctx, ipp110->offsets.dcp_offset, reg_name, n, __VA_ARGS__) + +#define DCP_REG_UPDATE(reg, field, val) \ + DCP_REG_UPDATE_N(reg, 1, FD(reg##__##field), val) + +#define DCP_REG_SET_2(reg, field1, val1, field2, val2) \ + DCP_REG_SET_N(reg, 2, FD(reg##__##field1), val1, FD(reg##__##field2), val2) + static void enable( struct dce110_ipp *ipp110, bool enable); @@ -131,14 +143,10 @@ bool dce110_ipp_cursor_set_attributes( static void enable( struct dce110_ipp *ipp110, bool enable) { - uint32_t value = 0; - uint32_t addr = DCP_REG(mmCUR_CONTROL); - - value = dm_read_reg(ipp110->base.ctx, addr); - set_reg_field_value(value, enable, CUR_CONTROL, CURSOR_EN); - dm_write_reg(ipp110->base.ctx, addr, value); + DCP_REG_UPDATE(CUR_CONTROL, CURSOR_EN, enable); } + static void lock( struct dce110_ipp *ipp110, bool lock) { @@ -150,18 +158,16 @@ static void lock( dm_write_reg(ipp110->base.ctx, addr, value); } + static void program_position( struct dce110_ipp *ipp110, uint32_t x, uint32_t y) { - uint32_t value = 0; - uint32_t addr = DCP_REG(mmCUR_POSITION); - value = dm_read_reg(ipp110->base.ctx, addr); - set_reg_field_value(value, x, CUR_POSITION, CURSOR_X_POSITION); - set_reg_field_value(value, y, CUR_POSITION, CURSOR_Y_POSITION); - dm_write_reg(ipp110->base.ctx, addr, value); + DCP_REG_SET_2(CUR_POSITION, + CURSOR_X_POSITION, x, + CURSOR_Y_POSITION, y); } static bool program_control( diff --git a/drivers/gpu/drm/amd/dal/dc/dm_services.h b/drivers/gpu/drm/amd/dal/dc/dm_services.h index 4c45a66..ffae50f 100644 --- a/drivers/gpu/drm/amd/dal/dc/dm_services.h +++ b/drivers/gpu/drm/amd/dal/dc/dm_services.h @@ -35,6 +35,7 @@ #include "dm_services_types.h" #include "logger_interface.h" #include "link_service_types.h" +#include #undef DEPRECATED @@ -143,6 +144,48 @@ static inline uint32_t set_reg_field_value_ex( reg_name ## __ ## reg_field ## _MASK,\ reg_name ## __ ## reg_field ## __SHIFT) + +static inline void generic_reg_update_ex(const struct dc_context *ctx, + uint32_t addr, uint32_t reg_val, int n, ...) +{ + int shift, mask, field_value; + int i = 0; + + va_list ap; + va_start(ap, n); + + while (i < n) { + shift = va_arg(ap, int); + mask = va_arg(ap, int); + field_value = va_arg(ap, int); + + reg_val = set_reg_field_value_ex(reg_val, field_value, mask, shift); + i++; + } + + dm_write_reg(ctx, addr, reg_val); + va_end(ap); + + +} + +#define generic_reg_update(ctx, inst_offset, reg_name, n, ...)\ + uint32_t reg_val = dm_read_reg(ctx, mm##reg_name + inst_offset); \ + generic_reg_update_ex(ctx, \ + mm##reg_name + inst_offset, reg_val, n, \ + __VA_ARGS__) + +#define generic_reg_set(ctx, inst_offset, reg_name, n, ...)\ + generic_reg_update_ex(ctx, \ + mm##reg_name + inst_offset, 0, n, \ + __VA_ARGS__) + + + +#define FD(reg_field) reg_field ## __SHIFT, \ + reg_field ## _MASK + + /* * atombios services */ -- 1.9.1