From 8bae2ee0014032f7ae99e70b0030f4e251a41d16 Mon Sep 17 00:00:00 2001 From: Jun Lei Date: Sat, 27 Feb 2016 12:22:54 -0500 Subject: [PATCH 0850/1110] drm/amd/dal: rename struct dc to struct core_dc Part 1 of 3 changes to refactor struct_dc, and dc_context 1.) rename struct dc to struct core_dc <- This change 2.) remove dc_context from core_dc, instead add driver_context 3.) create struct dc which is returned by dc_create which contains dc_caps and links, refactor DM Signed-off-by: Jun Lei Acked-by: Harry Wentland --- drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm.c | 4 +- drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm.h | 2 +- .../drm/amd/dal/amdgpu_dm/amdgpu_dm_mst_types.c | 2 +- .../gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_types.c | 6 +- drivers/gpu/drm/amd/dal/dc/core/dc.c | 73 +++++++++++----------- drivers/gpu/drm/amd/dal/dc/core/dc_hw_sequencer.c | 2 +- drivers/gpu/drm/amd/dal/dc/core/dc_link.c | 4 +- drivers/gpu/drm/amd/dal/dc/core/dc_resource.c | 10 +-- drivers/gpu/drm/amd/dal/dc/core/dc_surface.c | 4 +- drivers/gpu/drm/amd/dal/dc/core/dc_target.c | 4 +- drivers/gpu/drm/amd/dal/dc/dc.h | 58 ++++++++--------- drivers/gpu/drm/amd/dal/dc/dc_types.h | 4 +- .../drm/amd/dal/dc/dce100/dce100_hw_sequencer.c | 4 +- .../drm/amd/dal/dc/dce100/dce100_hw_sequencer.h | 4 +- .../gpu/drm/amd/dal/dc/dce100/dce100_resource.c | 10 +-- .../gpu/drm/amd/dal/dc/dce100/dce100_resource.h | 4 +- .../drm/amd/dal/dc/dce110/dce110_hw_sequencer.c | 34 +++++----- .../drm/amd/dal/dc/dce110/dce110_hw_sequencer.h | 4 +- .../gpu/drm/amd/dal/dc/dce110/dce110_resource.c | 10 +-- .../gpu/drm/amd/dal/dc/dce110/dce110_resource.h | 4 +- .../gpu/drm/amd/dal/dc/dce80/dce80_hw_sequencer.c | 2 +- .../gpu/drm/amd/dal/dc/dce80/dce80_hw_sequencer.h | 4 +- drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c | 10 +-- drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.h | 4 +- drivers/gpu/drm/amd/dal/dc/inc/core_dc.h | 2 +- drivers/gpu/drm/amd/dal/dc/inc/core_types.h | 8 +-- drivers/gpu/drm/amd/dal/dc/inc/hw_sequencer.h | 18 +++--- drivers/gpu/drm/amd/dal/dc/inc/resource.h | 10 +-- 28 files changed, 151 insertions(+), 154 deletions(-) diff --git a/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm.c index 4bf4c5d..6902861 100644 --- a/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm.c @@ -162,7 +162,7 @@ static void dm_pflip_high_irq(void *interrupt_params) struct common_irq_params *irq_params = interrupt_params; struct amdgpu_device *adev = irq_params->adev; unsigned long flags; - const struct dc *dc = irq_params->adev->dm.dc; + const struct core_dc *dc = irq_params->adev->dm.dc; const struct dc_target *dc_target = dc_get_target_on_irq_source(dc, irq_params->irq_src); @@ -774,7 +774,7 @@ static void register_hpd_handlers(struct amdgpu_device *adev) /* Register IRQ sources and initialize IRQ callbacks */ static int dce110_register_irq_handlers(struct amdgpu_device *adev) { - struct dc *dc = adev->dm.dc; + struct core_dc *dc = adev->dm.dc; struct common_irq_params *c_irq_params; struct dc_interrupt_params int_params = {0}; int r; diff --git a/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm.h index 4a9b1c3..0da8530 100644 --- a/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm.h +++ b/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm.h @@ -74,7 +74,7 @@ struct irq_list_head { struct amdgpu_display_manager { struct dal *dal; - struct dc *dc; + struct core_dc *dc; void *cgs_device; /* lock to be used when DAL is called from SYNC IRQ context */ spinlock_t dal_lock; diff --git a/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_mst_types.c index 2362003..a8b489f 100644 --- a/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_mst_types.c +++ b/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_mst_types.c @@ -81,7 +81,7 @@ static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg struct pci_dev *pdev = to_pci_dev(aux->dev); struct drm_device *drm_dev = pci_get_drvdata(pdev); struct amdgpu_device *adev = drm_dev->dev_private; - struct dc *dc = adev->dm.dc; + struct core_dc *dc = adev->dm.dc; bool res; switch (msg->request) { diff --git a/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_types.c b/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_types.c index 9fb4e51..f8c423a 100644 --- a/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_types.c +++ b/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_types.c @@ -624,7 +624,7 @@ static void calculate_stream_scaling_settings( } static void dm_dc_surface_commit( - struct dc *dc, + struct core_dc *dc, struct drm_crtc *crtc, struct dm_connector_state *dm_state) { @@ -1877,7 +1877,7 @@ int amdgpu_dm_connector_init( { int res = 0; int connector_type; - struct dc *dc = dm->dc; + struct core_dc *dc = dm->dc; const struct dc_link *link = dc_get_link_at_index(dc, link_index); struct amdgpu_i2c_adapter *i2c; @@ -2492,7 +2492,7 @@ int amdgpu_dm_atomic_check(struct drm_device *dev, struct dc_validation_set set[MAX_TARGET_NUM] = {{ 0 }}; struct dc_target *new_targets[MAX_TARGET_NUM] = { 0 }; struct amdgpu_device *adev = dev->dev_private; - struct dc *dc = adev->dm.dc; + struct core_dc *dc = adev->dm.dc; bool need_to_validate = false; ret = drm_atomic_helper_check(dev, state); diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc.c b/drivers/gpu/drm/amd/dal/dc/core/dc.c index 4ce2af2..69489f7 100644 --- a/drivers/gpu/drm/amd/dal/dc/core/dc.c +++ b/drivers/gpu/drm/amd/dal/dc/core/dc.c @@ -59,7 +59,7 @@ struct dc_target_sync_report { /******************************************************************************* * Private functions ******************************************************************************/ -static void destroy_links(struct dc *dc) +static void destroy_links(struct core_dc *dc) { uint32_t i; @@ -69,7 +69,7 @@ static void destroy_links(struct dc *dc) } } -static bool create_links(struct dc *dc, const struct dc_init_data *init_params) +static bool create_links(struct core_dc *dc, const struct dc_init_data *init_params) { int i; int connectors_num; @@ -165,7 +165,7 @@ failed_alloc: } -static void init_hw(struct dc *dc) +static void init_hw(struct core_dc *dc) { int i; struct dc_bios *bp; @@ -257,7 +257,7 @@ static struct adapter_service *create_as( return as; } -static void bw_calcs_data_update_from_pplib(struct dc *dc) +static void bw_calcs_data_update_from_pplib(struct core_dc *dc) { struct dm_pp_clock_levels clks = {0}; @@ -303,7 +303,7 @@ static void bw_calcs_data_update_from_pplib(struct dc *dc) 1000); } -static bool construct(struct dc *dc, const struct dal_init_data *init_params) +static bool construct(struct core_dc *dc, const struct dal_init_data *init_params) { struct dal_logger *logger; /* Tempory code @@ -389,7 +389,7 @@ ctx_fail: return false; } -static void destruct(struct dc *dc) +static void destruct(struct core_dc *dc) { val_ctx_destruct(&dc->current_context); destroy_links(dc); @@ -468,13 +468,13 @@ static int8_t acquire_first_free_underlay( * Public functions ******************************************************************************/ -struct dc *dc_create(const struct dal_init_data *init_params) +struct core_dc *dc_create(const struct dal_init_data *init_params) { struct dc_context ctx = { .driver_context = init_params->driver, .cgs_device = init_params->cgs_device }; - struct dc *dc = dm_alloc(&ctx, sizeof(*dc)); + struct core_dc *dc = dm_alloc(&ctx, sizeof(*dc)); if (NULL == dc) goto alloc_fail; @@ -495,16 +495,16 @@ alloc_fail: return NULL; } -void dc_destroy(struct dc **dc) +void dc_destroy(struct core_dc **dc) { - struct dc_context ctx = *(*dc)->ctx; + struct dc_context ctx = *((*dc)->ctx); destruct(*dc); dm_free(&ctx, *dc); *dc = NULL; } bool dc_validate_resources( - const struct dc *dc, + const struct core_dc *dc, const struct dc_validation_set set[], uint8_t set_count) { @@ -572,7 +572,7 @@ static void program_timing_sync( } static bool targets_changed( - struct dc *dc, + struct core_dc *dc, struct dc_target *targets[], uint8_t target_count) { @@ -636,7 +636,7 @@ static void target_disable_memory_requests(struct dc_target *dc_target) } bool dc_commit_targets( - struct dc *dc, + struct core_dc *dc, struct dc_target *targets[], uint8_t target_count) { @@ -721,7 +721,7 @@ context_alloc_fail: } bool dc_commit_surfaces_to_target( - struct dc *dc, + struct core_dc *dc, struct dc_surface *new_surfaces[], uint8_t new_surface_count, struct dc_target *dc_target) @@ -877,47 +877,47 @@ unexpected_fail: return false; } -uint8_t dc_get_current_target_count(const struct dc *dc) +uint8_t dc_get_current_target_count(const struct core_dc *dc) { return dc->current_context.target_count; } -struct dc_target *dc_get_target_at_index(const struct dc *dc, uint8_t i) +struct dc_target *dc_get_target_at_index(const struct core_dc *dc, uint8_t i) { if (i < dc->current_context.target_count) return &dc->current_context.targets[i]->public; return NULL; } -const struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_index) +const struct dc_link *dc_get_link_at_index(struct core_dc *dc, uint32_t link_index) { return &dc->links[link_index]->public; } const struct graphics_object_id dc_get_link_id_at_index( - struct dc *dc, uint32_t link_index) + struct core_dc *dc, uint32_t link_index) { return dc->links[link_index]->link_id; } const struct ddc_service *dc_get_ddc_at_index( - struct dc *dc, uint32_t link_index) + struct core_dc *dc, uint32_t link_index) { return dc->links[link_index]->ddc; } const enum dc_irq_source dc_get_hpd_irq_source_at_index( - struct dc *dc, uint32_t link_index) + struct core_dc *dc, uint32_t link_index) { return dc->links[link_index]->public.irq_source_hpd; } -const struct audio **dc_get_audios(struct dc *dc) +const struct audio **dc_get_audios(struct core_dc *dc) { return (const struct audio **)dc->res_pool.audios; } -void dc_get_caps(const struct dc *dc, struct dc_caps *caps) +void dc_get_caps(const struct core_dc *dc, struct dc_caps *caps) { caps->max_targets = dc->res_pool.pipe_count; caps->max_links = dc->link_count; @@ -925,7 +925,7 @@ void dc_get_caps(const struct dc *dc, struct dc_caps *caps) } void dc_flip_surface_addrs( - struct dc *dc, + struct core_dc *dc, const struct dc_surface *const surfaces[], struct dc_flip_addrs flip_addrs[], uint32_t count) @@ -944,7 +944,7 @@ void dc_flip_surface_addrs( } enum dc_irq_source dc_interrupt_to_irq_source( - struct dc *dc, + struct core_dc *dc, uint32_t src_id, uint32_t ext_id) { @@ -952,18 +952,18 @@ enum dc_irq_source dc_interrupt_to_irq_source( } -void dc_interrupt_set(const struct dc *dc, enum dc_irq_source src, bool enable) +void dc_interrupt_set(const struct core_dc *dc, enum dc_irq_source src, bool enable) { dal_irq_service_set(dc->res_pool.irqs, src, enable); } -void dc_interrupt_ack(struct dc *dc, enum dc_irq_source src) +void dc_interrupt_ack(struct core_dc *dc, enum dc_irq_source src) { dal_irq_service_ack(dc->res_pool.irqs, src); } const struct dc_target *dc_get_target_on_irq_source( - const struct dc *dc, + const struct core_dc *dc, enum dc_irq_source src) { uint8_t i, j; @@ -1011,7 +1011,7 @@ const struct dc_target *dc_get_target_on_irq_source( } void dc_set_power_state( - struct dc *dc, + struct core_dc *dc, enum dc_acpi_cm_power_state power_state, enum dc_video_power_state video_power_state) { @@ -1032,7 +1032,7 @@ void dc_set_power_state( } -void dc_resume(const struct dc *dc) +void dc_resume(const struct core_dc *dc) { uint32_t i; @@ -1041,14 +1041,13 @@ void dc_resume(const struct dc *dc) } bool dc_read_dpcd( - struct dc *dc, + struct core_dc *dc, uint32_t link_index, uint32_t address, uint8_t *data, uint32_t size) { - struct core_link *link = - DC_LINK_TO_LINK(dc_get_link_at_index(dc, link_index)); + struct core_link *link = dc->links[link_index]; enum ddc_result r = dal_ddc_service_read_dpcd_data( link->ddc, @@ -1059,14 +1058,13 @@ bool dc_read_dpcd( } bool dc_write_dpcd( - struct dc *dc, + struct core_dc *dc, uint32_t link_index, uint32_t address, const uint8_t *data, uint32_t size) { - struct core_link *link = - DC_LINK_TO_LINK(dc_get_link_at_index(dc, link_index)); + struct core_link *link = dc->links[link_index]; enum ddc_result r = dal_ddc_service_write_dpcd_data( link->ddc, @@ -1077,12 +1075,11 @@ bool dc_write_dpcd( } bool dc_submit_i2c( - struct dc *dc, + struct core_dc *dc, uint32_t link_index, struct i2c_command *cmd) { - struct core_link *link = - DC_LINK_TO_LINK(dc_get_link_at_index(dc, link_index)); + struct core_link *link = dc->links[link_index]; struct ddc_service *ddc = link->ddc; return dal_i2caux_submit_i2c_command( diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_hw_sequencer.c b/drivers/gpu/drm/amd/dal/dc/core/dc_hw_sequencer.c index 133b174..61bb67a 100644 --- a/drivers/gpu/drm/amd/dal/dc/core/dc_hw_sequencer.c +++ b/drivers/gpu/drm/amd/dal/dc/core/dc_hw_sequencer.c @@ -37,7 +37,7 @@ bool dc_construct_hw_sequencer( struct adapter_service *adapter_serv, - struct dc *dc) + struct core_dc *dc) { enum dce_version dce_ver = dal_adapter_service_get_dce_version(adapter_serv); diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_link.c b/drivers/gpu/drm/amd/dal/dc/core/dc_link.c index 88a4eb9..36b1661 100644 --- a/drivers/gpu/drm/amd/dal/dc/core/dc_link.c +++ b/drivers/gpu/drm/amd/dal/dc/core/dc_link.c @@ -1617,7 +1617,7 @@ static enum dc_status deallocate_mst_payload(struct pipe_ctx *pipe_ctx) void core_link_enable_stream(struct pipe_ctx *pipe_ctx) { - struct dc *dc = pipe_ctx->stream->ctx->dc; + struct core_dc *dc = pipe_ctx->stream->ctx->dc; if (DC_OK != enable_link(pipe_ctx)) { BREAK_TO_DEBUGGER(); @@ -1634,7 +1634,7 @@ void core_link_enable_stream(struct pipe_ctx *pipe_ctx) void core_link_disable_stream(struct pipe_ctx *pipe_ctx) { - struct dc *dc = pipe_ctx->stream->ctx->dc; + struct core_dc *dc = pipe_ctx->stream->ctx->dc; pipe_ctx->stream->status.link = NULL; if (pipe_ctx->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c b/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c index 5e32289..013612a 100644 --- a/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c @@ -43,7 +43,7 @@ #endif bool dc_construct_resource_pool(struct adapter_service *adapter_serv, - struct dc *dc, + struct core_dc *dc, uint8_t num_virtual_links) { enum dce_version dce_ver = dal_adapter_service_get_dce_version(adapter_serv); @@ -367,7 +367,7 @@ void build_scaling_params( } void build_scaling_params_for_context( - const struct dc *dc, + const struct core_dc *dc, struct validate_context *context) { uint8_t i; @@ -532,13 +532,13 @@ static void fill_display_configs( } void pplib_apply_safe_state( - const struct dc *dc) + const struct core_dc *dc) { dm_pp_apply_safe_state(dc->ctx); } void pplib_apply_display_requirements( - const struct dc *dc, + const struct core_dc *dc, const struct validate_context *context, struct dm_pp_display_configuration *pp_display_cfg) { @@ -737,7 +737,7 @@ static void set_stream_signal(struct pipe_ctx *pipe_ctx) } enum dc_status map_resources( - const struct dc *dc, + const struct core_dc *dc, struct validate_context *context) { uint8_t i, j, k; diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_surface.c b/drivers/gpu/drm/amd/dal/dc/core/dc_surface.c index 3878a61..7f6f1c3 100644 --- a/drivers/gpu/drm/amd/dal/dc/core/dc_surface.c +++ b/drivers/gpu/drm/amd/dal/dc/core/dc_surface.c @@ -80,7 +80,7 @@ void enable_surface_flip_reporting(struct dc_surface *dc_surface, /*register_flip_interrupt(surface);*/ } -struct dc_surface *dc_create_surface(const struct dc *dc) +struct dc_surface *dc_create_surface(const struct core_dc *dc) { struct surface *surface = dm_alloc(dc->ctx, sizeof(*surface)); @@ -148,7 +148,7 @@ void dc_gamma_release(const struct dc_gamma *dc_gamma) } -struct dc_gamma *dc_create_gamma(const struct dc *dc) +struct dc_gamma *dc_create_gamma(const struct core_dc *dc) { struct gamma *gamma = dm_alloc(dc->ctx, sizeof(*gamma)); diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_target.c b/drivers/gpu/drm/amd/dal/dc/core/dc_target.c index bbcfbf5..e1fce1c 100644 --- a/drivers/gpu/drm/amd/dal/dc/core/dc_target.c +++ b/drivers/gpu/drm/amd/dal/dc/core/dc_target.c @@ -92,7 +92,7 @@ const struct dc_target_status *dc_target_get_status( { uint8_t i; struct core_target* target = DC_TARGET_TO_CORE(dc_target); - struct dc *dc = target->ctx->dc; + struct core_dc *dc = target->ctx->dc; for (i = 0; i < dc->current_context.target_count; i++) if (target == dc->current_context.targets[i]) @@ -254,7 +254,7 @@ uint32_t dc_target_get_vblank_counter(const struct dc_target *dc_target) } enum dc_irq_source dc_target_get_irq_src( - const struct dc *dc, + const struct core_dc *dc, const struct dc_target *dc_target, const enum irq_type irq_type) { diff --git a/drivers/gpu/drm/amd/dal/dc/dc.h b/drivers/gpu/drm/amd/dal/dc/dc.h index ee5e8e7..68a63cf 100644 --- a/drivers/gpu/drm/amd/dal/dc/dc.h +++ b/drivers/gpu/drm/amd/dal/dc/dc.h @@ -50,7 +50,7 @@ struct dc_caps { uint32_t max_audios; }; -void dc_get_caps(const struct dc *dc, struct dc_caps *caps); +void dc_get_caps(const struct core_dc *dc, struct dc_caps *caps); struct dal_init_data { struct hw_asic_id asic_id; @@ -68,8 +68,8 @@ struct dal_init_data { enum dce_environment dce_environment; }; -struct dc *dc_create(const struct dal_init_data *init_params); -void dc_destroy(struct dc **dc); +struct core_dc *dc_create(const struct dal_init_data *init_params); +void dc_destroy(struct core_dc **dc); /******************************************************************************* * Surface Interfaces @@ -146,7 +146,7 @@ struct dc_surface_status { /* * Create a new surface with default parameters; */ -struct dc_surface *dc_create_surface(const struct dc *dc); +struct dc_surface *dc_create_surface(const struct core_dc *dc); const struct dc_surface_status* dc_surface_get_status( struct dc_surface *dc_surface); @@ -154,7 +154,7 @@ void dc_surface_retain(const struct dc_surface *dc_surface); void dc_surface_release(const struct dc_surface *dc_surface); void dc_gamma_release(const struct dc_gamma *dc_gamma); -struct dc_gamma *dc_create_gamma(const struct dc *dc); +struct dc_gamma *dc_create_gamma(const struct core_dc *dc); /* * This structure holds a surface address. There could be multiple addresses @@ -175,7 +175,7 @@ struct dc_flip_addrs { * Surface addresses and flip attributes are programmed. * Surface flip occur at next configured time (h_sync or v_sync flip) */ -void dc_flip_surface_addrs(struct dc* dc, +void dc_flip_surface_addrs(struct core_dc *dc, const struct dc_surface *const surfaces[], struct dc_flip_addrs flip_addrs[], uint32_t count); @@ -191,7 +191,7 @@ void dc_flip_surface_addrs(struct dc* dc, * This does not trigger a flip. No surface address is programmed. */ bool dc_commit_surfaces_to_target( - struct dc *dc, + struct core_dc *dc, struct dc_surface *dc_surfaces[], uint8_t surface_count, struct dc_target *dc_target); @@ -236,8 +236,8 @@ void dc_target_log( enum log_major log_major, enum log_minor log_minor); -uint8_t dc_get_current_target_count(const struct dc *dc); -struct dc_target *dc_get_target_at_index(const struct dc *dc, uint8_t i); +uint8_t dc_get_current_target_count(const struct core_dc *dc); +struct dc_target *dc_get_target_at_index(const struct core_dc *dc, uint8_t i); bool dc_target_is_connected_to_sink( const struct dc_target *dc_target, @@ -247,7 +247,7 @@ uint8_t dc_target_get_controller_id(const struct dc_target *dc_target); uint32_t dc_target_get_vblank_counter(const struct dc_target *dc_target); enum dc_irq_source dc_target_get_irq_src( - const struct dc *dc, + const struct core_dc *dc, const struct dc_target *dc_target, const enum irq_type irq_type); @@ -267,7 +267,7 @@ struct dc_validation_set { * No hardware is programmed for call. Only validation is done. */ bool dc_validate_resources( - const struct dc *dc, + const struct core_dc *dc, const struct dc_validation_set set[], uint8_t set_count); @@ -280,7 +280,7 @@ bool dc_validate_resources( * New targets are enabled with blank stream; no memory read. */ bool dc_commit_targets( - struct dc *dc, + struct core_dc *dc, struct dc_target *targets[], uint8_t target_count); @@ -361,11 +361,11 @@ struct dc_link { * boot time. They cannot be created or destroyed. * Use dc_get_caps() to get number of links. */ -const struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_index); +const struct dc_link *dc_get_link_at_index(struct core_dc *dc, uint32_t link_index); /* Return id of physical connector represented by a dc_link at link_index.*/ const struct graphics_object_id dc_get_link_id_at_index( - struct dc *dc, uint32_t link_index); + struct core_dc *dc, uint32_t link_index); /* Set backlight level of an embedded panel (eDP, LVDS). */ bool dc_link_set_backlight_level(const struct dc_link *dc_link, uint32_t level); @@ -411,7 +411,7 @@ struct dc_sink { void dc_sink_retain(const struct dc_sink *sink); void dc_sink_release(const struct dc_sink *sink); -const struct audio **dc_get_audios(struct dc *dc); +const struct audio **dc_get_audios(struct core_dc *dc); struct dc_sink_init_data { enum signal_type sink_signal; @@ -445,7 +445,7 @@ struct dc_cursor { * Create a new cursor with default values for a given target. */ struct dc_cursor *dc_create_cursor_for_target( - const struct dc *dc, + const struct core_dc *dc, struct dc_target *dc_target); /** @@ -457,7 +457,7 @@ struct dc_cursor *dc_create_cursor_for_target( * Cursor position is unmodified. */ bool dc_commit_cursor( - const struct dc *dc, + const struct core_dc *dc, struct dc_cursor *cursor); /* @@ -467,7 +467,7 @@ bool dc_commit_cursor( * Cursor position will be programmed as well as enable/disable bit. */ bool dc_set_cursor_position( - const struct dc *dc, + const struct core_dc *dc, struct dc_cursor *cursor, struct dc_cursor_position *pos); @@ -477,15 +477,15 @@ bool dc_set_cursor_position( * Interrupt interfaces ******************************************************************************/ enum dc_irq_source dc_interrupt_to_irq_source( - struct dc *dc, + struct core_dc *dc, uint32_t src_id, uint32_t ext_id); -void dc_interrupt_set(const struct dc *dc, enum dc_irq_source src, bool enable); -void dc_interrupt_ack(struct dc *dc, enum dc_irq_source src); +void dc_interrupt_set(const struct core_dc *dc, enum dc_irq_source src, bool enable); +void dc_interrupt_ack(struct core_dc *dc, enum dc_irq_source src); const enum dc_irq_source dc_get_hpd_irq_source_at_index( - struct dc *dc, uint32_t link_index); + struct core_dc *dc, uint32_t link_index); const struct dc_target *dc_get_target_on_irq_source( - const struct dc *dc, + const struct core_dc *dc, enum dc_irq_source src); @@ -494,38 +494,38 @@ const struct dc_target *dc_get_target_on_irq_source( ******************************************************************************/ void dc_set_power_state( - struct dc *dc, + struct core_dc *dc, enum dc_acpi_cm_power_state power_state, enum dc_video_power_state video_power_state); -void dc_resume(const struct dc *dc); +void dc_resume(const struct core_dc *dc); /******************************************************************************* * DDC Interfaces ******************************************************************************/ const struct ddc_service *dc_get_ddc_at_index( - struct dc *dc, uint32_t link_index); + struct core_dc *dc, uint32_t link_index); /* * DPCD access interfaces */ bool dc_read_dpcd( - struct dc *dc, + struct core_dc *dc, uint32_t link_index, uint32_t address, uint8_t *data, uint32_t size); bool dc_write_dpcd( - struct dc *dc, + struct core_dc *dc, uint32_t link_index, uint32_t address, const uint8_t *data, uint32_t size); bool dc_submit_i2c( - struct dc *dc, + struct core_dc *dc, uint32_t link_index, struct i2c_command *cmd); diff --git a/drivers/gpu/drm/amd/dal/dc/dc_types.h b/drivers/gpu/drm/amd/dal/dc/dc_types.h index ac0f40d..f764d37 100644 --- a/drivers/gpu/drm/amd/dal/dc/dc_types.h +++ b/drivers/gpu/drm/amd/dal/dc/dc_types.h @@ -33,7 +33,7 @@ #include "signal_types.h" /* forward declarations */ -struct dc; +struct core_dc; struct dc_surface; struct dc_target; struct dc_stream; @@ -69,7 +69,7 @@ enum dce_environment { /********************************/ struct dc_context { - struct dc *dc; + struct core_dc *dc; #if defined(BUILD_DAL_TEST) struct test_driver_context *driver_context; diff --git a/drivers/gpu/drm/amd/dal/dc/dce100/dce100_hw_sequencer.c b/drivers/gpu/drm/amd/dal/dc/dce100/dce100_hw_sequencer.c index a1dbac4..a1c1d1c 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce100/dce100_hw_sequencer.c +++ b/drivers/gpu/drm/amd/dal/dc/dce100/dce100_hw_sequencer.c @@ -336,14 +336,14 @@ static void dal_dc_clock_gating_dce100_power_up(struct dc_context *ctx, bool ena } static void set_displaymarks( - const struct dc *dc, struct validate_context *context) + const struct core_dc *dc, struct validate_context *context) { /* Do nothing until we have proper bandwitdth calcs */ } /**************************************************************************/ -bool dce100_hw_sequencer_construct(struct dc *dc) +bool dce100_hw_sequencer_construct(struct core_dc *dc) { dce110_hw_sequencer_construct(dc); diff --git a/drivers/gpu/drm/amd/dal/dc/dce100/dce100_hw_sequencer.h b/drivers/gpu/drm/amd/dal/dc/dce100/dce100_hw_sequencer.h index 0ce637e..cf497ea 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce100/dce100_hw_sequencer.h +++ b/drivers/gpu/drm/amd/dal/dc/dce100/dce100_hw_sequencer.h @@ -28,9 +28,9 @@ #include "core_types.h" -struct dc; +struct core_dc; -bool dce100_hw_sequencer_construct(struct dc *dc); +bool dce100_hw_sequencer_construct(struct core_dc *dc); #endif /* __DC_HWSS_DCE100_H__ */ diff --git a/drivers/gpu/drm/amd/dal/dc/dce100/dce100_resource.c b/drivers/gpu/drm/amd/dal/dc/dce100/dce100_resource.c index a8c8f99..bc9fd02 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce100/dce100_resource.c +++ b/drivers/gpu/drm/amd/dal/dc/dce100/dce100_resource.c @@ -729,7 +729,7 @@ static enum dc_status build_pipe_hw_param(struct pipe_ctx *pipe_ctx) } static enum dc_status validate_mapped_resource( - const struct dc *dc, + const struct core_dc *dc, struct validate_context *context) { enum dc_status status = DC_OK; @@ -790,7 +790,7 @@ static enum dc_status validate_mapped_resource( } enum dc_status dce100_validate_bandwidth( - const struct dc *dc, + const struct core_dc *dc, struct validate_context *context) { /* TODO implement when needed but for now hardcode max value*/ @@ -818,7 +818,7 @@ static void set_target_unchanged( } static enum dc_status map_clock_resources( - const struct dc *dc, + const struct core_dc *dc, struct validate_context *context) { uint8_t i, j, k; @@ -877,7 +877,7 @@ static enum dc_status map_clock_resources( } enum dc_status dce100_validate_with_context( - const struct dc *dc, + const struct core_dc *dc, const struct dc_validation_set set[], uint8_t set_count, struct validate_context *context) @@ -948,7 +948,7 @@ static struct resource_funcs dce100_res_pool_funcs = { bool dce100_construct_resource_pool( struct adapter_service *as, uint8_t num_virtual_links, - struct dc *dc, + struct core_dc *dc, struct resource_pool *pool) { unsigned int i; diff --git a/drivers/gpu/drm/amd/dal/dc/dce100/dce100_resource.h b/drivers/gpu/drm/amd/dal/dc/dce100/dce100_resource.h index a70bfee..65cd170 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce100/dce100_resource.h +++ b/drivers/gpu/drm/amd/dal/dc/dce100/dce100_resource.h @@ -9,7 +9,7 @@ #define DCE100_RESOURCE_H_ struct adapter_service; -struct dc; +struct core_dc; struct resource_pool; struct dc_validation_set; @@ -17,7 +17,7 @@ struct dc_validation_set; bool dce100_construct_resource_pool( struct adapter_service *adapter_serv, uint8_t num_virtual_links, - struct dc *dc, + struct core_dc *dc, struct resource_pool *pool); void dce100_destruct_resource_pool(struct resource_pool *pool); diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c index a93cdbb..68dc378 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c +++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c @@ -778,7 +778,7 @@ static enum dc_color_space get_output_color_space( static enum dc_status apply_single_controller_ctx_to_hw( struct pipe_ctx *pipe_ctx, struct validate_context *context, - struct dc *dc) + struct core_dc *dc) { struct core_stream *stream = pipe_ctx->stream; struct pipe_ctx *old_pipe_ctx = @@ -908,7 +908,7 @@ static enum dc_status apply_single_controller_ctx_to_hw( /******************************************************************************/ -static void power_down_encoders(struct dc *dc) +static void power_down_encoders(struct core_dc *dc) { int i; @@ -918,7 +918,7 @@ static void power_down_encoders(struct dc *dc) } } -static void power_down_controllers(struct dc *dc) +static void power_down_controllers(struct core_dc *dc) { int i; @@ -928,7 +928,7 @@ static void power_down_controllers(struct dc *dc) } } -static void power_down_clock_sources(struct dc *dc) +static void power_down_clock_sources(struct core_dc *dc) { int i; @@ -939,7 +939,7 @@ static void power_down_clock_sources(struct dc *dc) } } -static void power_down_all_hw_blocks(struct dc *dc) +static void power_down_all_hw_blocks(struct core_dc *dc) { power_down_encoders(dc); @@ -949,7 +949,7 @@ static void power_down_all_hw_blocks(struct dc *dc) } static void disable_vga_and_power_gate_all_controllers( - struct dc *dc) + struct core_dc *dc) { int i; struct timing_generator *tg; @@ -981,7 +981,7 @@ static void disable_vga_and_power_gate_all_controllers( * 3. Enable power gating for controller * 4. Set acc_mode_change bit (VBIOS will clear this bit when going to FSDOS) */ -static void enable_accelerated_mode(struct dc *dc) +static void enable_accelerated_mode(struct core_dc *dc) { struct dc_bios *dcb; @@ -1149,7 +1149,7 @@ static uint32_t compute_pstate_blackout_duration( } static void set_displaymarks( - const struct dc *dc, + const struct core_dc *dc, struct validate_context *context) { uint8_t i, num_pipes; @@ -1194,7 +1194,7 @@ static void set_safe_displaymarks(struct resource_context *res_ctx) } } -static void program_bw(struct dc *dc, struct validate_context *context) +static void program_bw(struct core_dc *dc, struct validate_context *context) { set_safe_displaymarks(&context->res_ctx); /*TODO: when pplib works*/ @@ -1205,7 +1205,7 @@ static void program_bw(struct dc *dc, struct validate_context *context) } static void switch_dp_clock_sources( - const struct dc *dc, + const struct core_dc *dc, struct resource_context *res_ctx) { uint8_t i; @@ -1238,7 +1238,7 @@ static void switch_dp_clock_sources( /*TODO: const validate_context*/ static enum dc_status apply_ctx_to_hw( - struct dc *dc, + struct core_dc *dc, struct validate_context *context) { enum dc_status status; @@ -1342,7 +1342,7 @@ static void program_scaler(const struct pipe_ctx *pipe_ctx) * The Back End was already programmed by Set Mode. */ static void set_plane_config( - const struct dc *dc, + const struct core_dc *dc, struct pipe_ctx *pipe_ctx, struct resource_context *res_ctx) { @@ -1404,7 +1404,7 @@ static void set_plane_config( surface->public.rotation); } -static void update_plane_addrs(struct dc *dc, struct resource_context *res_ctx) +static void update_plane_addrs(struct core_dc *dc, struct resource_context *res_ctx) { int j; @@ -1448,7 +1448,7 @@ static void update_plane_addrs(struct dc *dc, struct resource_context *res_ctx) } static void reset_single_pipe_hw_ctx( - const struct dc *dc, + const struct core_dc *dc, struct pipe_ctx *pipe_ctx, struct validate_context *context) { @@ -1484,7 +1484,7 @@ static void reset_single_pipe_hw_ctx( } static void reset_hw_ctx( - struct dc *dc, + struct core_dc *dc, struct validate_context *new_context) { uint8_t i; @@ -1501,7 +1501,7 @@ static void reset_hw_ctx( } } -static void power_down(struct dc *dc) +static void power_down(struct core_dc *dc) { power_down_all_hw_blocks(dc); disable_vga_and_power_gate_all_controllers(dc); @@ -1619,7 +1619,7 @@ static const struct hw_sequencer_funcs dce110_funcs = { .set_displaymarks = set_displaymarks, }; -bool dce110_hw_sequencer_construct(struct dc *dc) +bool dce110_hw_sequencer_construct(struct core_dc *dc) { dc->hwss = dce110_funcs; diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.h index eafa345..ba4b81b 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.h +++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.h @@ -29,9 +29,9 @@ #include "core_types.h" #define GAMMA_HW_POINTS_NUM 256 -struct dc; +struct core_dc; -bool dce110_hw_sequencer_construct(struct dc *dc); +bool dce110_hw_sequencer_construct(struct core_dc *dc); #endif /* __DC_HWSS_DCE110_H__ */ diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c index c079bb7..cdd1f94 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c +++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c @@ -686,7 +686,7 @@ static bool is_surface_pixel_format_supported(struct pipe_ctx *pipe_ctx) } static enum dc_status validate_mapped_resource( - const struct dc *dc, + const struct core_dc *dc, struct validate_context *context) { enum dc_status status = DC_OK; @@ -746,7 +746,7 @@ static enum dc_status validate_mapped_resource( } enum dc_status dce110_validate_bandwidth( - const struct dc *dc, + const struct core_dc *dc, struct validate_context *context) { uint8_t i; @@ -937,7 +937,7 @@ static void set_target_unchanged( } static enum dc_status map_clock_resources( - const struct dc *dc, + const struct core_dc *dc, struct validate_context *context) { uint8_t i, j, k; @@ -989,7 +989,7 @@ static enum dc_status map_clock_resources( } enum dc_status dce110_validate_with_context( - const struct dc *dc, + const struct core_dc *dc, const struct dc_validation_set set[], uint8_t set_count, struct validate_context *context) @@ -1083,7 +1083,7 @@ static void underlay_create(struct dc_context *ctx, struct resource_pool *pool) bool dce110_construct_resource_pool( struct adapter_service *as, uint8_t num_virtual_links, - struct dc *dc, + struct core_dc *dc, struct resource_pool *pool) { unsigned int i; diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.h index 5d60df2..3aeb1e5 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.h +++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.h @@ -29,13 +29,13 @@ #include "core_types.h" struct adapter_service; -struct dc; +struct core_dc; struct resource_pool; bool dce110_construct_resource_pool( struct adapter_service *adapter_serv, uint8_t num_virtual_links, - struct dc *dc, + struct core_dc *dc, struct resource_pool *pool); void dce110_destruct_resource_pool(struct resource_pool *pool); diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_hw_sequencer.c b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_hw_sequencer.c index 9f3201f..1502829 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_hw_sequencer.c +++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_hw_sequencer.c @@ -293,7 +293,7 @@ static bool dce80_enable_display_power_gating( return false; } -bool dce80_hw_sequencer_construct(struct dc *dc) +bool dce80_hw_sequencer_construct(struct core_dc *dc) { dce110_hw_sequencer_construct(dc); diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_hw_sequencer.h b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_hw_sequencer.h index 9d6dd05..7cc203f 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_hw_sequencer.h +++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_hw_sequencer.h @@ -28,9 +28,9 @@ #include "core_types.h" -struct dc; +struct core_dc; -bool dce80_hw_sequencer_construct(struct dc *dc); +bool dce80_hw_sequencer_construct(struct core_dc *dc); #endif /* __DC_HWSS_DCE80_H__ */ diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c index cf51a44..be8bba1 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c +++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c @@ -686,7 +686,7 @@ static enum dc_status build_pipe_hw_param(struct pipe_ctx *pipe_ctx) } static enum dc_status validate_mapped_resource( - const struct dc *dc, + const struct core_dc *dc, struct validate_context *context) { enum dc_status status = DC_OK; @@ -743,7 +743,7 @@ static enum dc_status validate_mapped_resource( } enum dc_status dce80_validate_bandwidth( - const struct dc *dc, + const struct core_dc *dc, struct validate_context *context) { uint8_t i; @@ -934,7 +934,7 @@ static void set_target_unchanged( } static enum dc_status map_clock_resources( - const struct dc *dc, + const struct core_dc *dc, struct validate_context *context) { uint8_t i, j, k; @@ -986,7 +986,7 @@ static enum dc_status map_clock_resources( } enum dc_status dce80_validate_with_context( - const struct dc *dc, + const struct core_dc *dc, const struct dc_validation_set set[], uint8_t set_count, struct validate_context *context) @@ -1057,7 +1057,7 @@ static struct resource_funcs dce80_res_pool_funcs = { bool dce80_construct_resource_pool( struct adapter_service *as, uint8_t num_virtual_links, - struct dc *dc, + struct core_dc *dc, struct resource_pool *pool) { unsigned int i; diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.h b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.h index 3d0f8fe..ef3c819 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.h +++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.h @@ -29,13 +29,13 @@ #include "core_types.h" struct adapter_service; -struct dc; +struct core_dc; struct resource_pool; bool dce80_construct_resource_pool( struct adapter_service *adapter_serv, uint8_t num_virtual_links, - struct dc *dc, + struct core_dc *dc, struct resource_pool *pool); #endif /* __DC_RESOURCE_DCE80_H__ */ diff --git a/drivers/gpu/drm/amd/dal/dc/inc/core_dc.h b/drivers/gpu/drm/amd/dal/dc/inc/core_dc.h index 4d4fd0c..6d20575 100644 --- a/drivers/gpu/drm/amd/dal/dc/inc/core_dc.h +++ b/drivers/gpu/drm/amd/dal/dc/inc/core_dc.h @@ -11,7 +11,7 @@ #include "core_types.h" #include "hw_sequencer.h" -struct dc { +struct core_dc { struct dc_context *ctx; uint8_t link_count; diff --git a/drivers/gpu/drm/amd/dal/dc/inc/core_types.h b/drivers/gpu/drm/amd/dal/dc/inc/core_types.h index a5444cb..4b9ce6a 100644 --- a/drivers/gpu/drm/amd/dal/dc/inc/core_types.h +++ b/drivers/gpu/drm/amd/dal/dc/inc/core_types.h @@ -122,7 +122,7 @@ struct core_sink { #define DC_LINK_TO_CORE(dc_link) container_of(dc_link, struct core_link, public) struct link_init_data { - const struct dc *dc; + const struct core_dc *dc; struct dc_context *ctx; /* TODO: remove 'dal' when DC is complete. */ uint32_t connector_index; /* this will be mapped to the HPD pins */ uint32_t link_index; /* this is mapped to DAL display_index @@ -191,7 +191,7 @@ struct link_mst_stream_allocation_table { struct core_link { struct dc_link public; - const struct dc *dc; + const struct core_dc *dc; struct dc_context *ctx; /* TODO: AUTO remove 'dal' when DC is complete*/ @@ -242,13 +242,13 @@ struct resource_funcs { const struct encoder_init_data *init); void (*link_enc_destroy)(struct link_encoder **enc); enum dc_status (*validate_with_context)( - const struct dc *dc, + const struct core_dc *dc, const struct dc_validation_set set[], uint8_t set_count, struct validate_context *context); enum dc_status (*validate_bandwidth)( - const struct dc *dc, + const struct core_dc *dc, struct validate_context *context); }; diff --git a/drivers/gpu/drm/amd/dal/dc/inc/hw_sequencer.h b/drivers/gpu/drm/amd/dal/dc/inc/hw_sequencer.h index 014e83f..2571691 100644 --- a/drivers/gpu/drm/amd/dal/dc/inc/hw_sequencer.h +++ b/drivers/gpu/drm/amd/dal/dc/inc/hw_sequencer.h @@ -39,17 +39,17 @@ enum pipe_gating_control { struct hw_sequencer_funcs { enum dc_status (*apply_ctx_to_hw)( - struct dc *dc, struct validate_context *context); + struct core_dc *dc, struct validate_context *context); - void (*reset_hw_ctx)(struct dc *dc, struct validate_context *context); + void (*reset_hw_ctx)(struct core_dc *dc, struct validate_context *context); void (*set_plane_config)( - const struct dc *dc, + const struct core_dc *dc, struct pipe_ctx *pipe_ctx, struct resource_context *res_ctx); void (*update_plane_addrs)( - struct dc *dc, + struct core_dc *dc, struct resource_context *res_ctx); bool (*set_gamma_correction)( @@ -58,9 +58,9 @@ struct hw_sequencer_funcs { const struct core_gamma *ramp, const struct core_surface *surface); - void (*power_down)(struct dc *dc); + void (*power_down)(struct core_dc *dc); - void (*enable_accelerated_mode)(struct dc *dc); + void (*enable_accelerated_mode)(struct core_dc *dc); void (*enable_timing_synchronization)( struct dc_context *dc_ctx, @@ -87,7 +87,7 @@ struct hw_sequencer_funcs { struct dc_bios *dcb, enum pipe_gating_control power_gating); - void (*program_bw)(struct dc *dc, struct validate_context *context); + void (*program_bw)(struct core_dc *dc, struct validate_context *context); void (*enable_stream)(struct pipe_ctx *pipe_ctx); @@ -108,7 +108,7 @@ struct hw_sequencer_funcs { uint32_t mode); void (*set_displaymarks)( - const struct dc *dc, + const struct core_dc *dc, struct validate_context *context); void (*set_display_clock)(struct validate_context *context); @@ -116,7 +116,7 @@ struct hw_sequencer_funcs { bool dc_construct_hw_sequencer( struct adapter_service *adapter_serv, - struct dc *dc); + struct core_dc *dc); #endif /* __DC_HW_SEQUENCER_H__ */ diff --git a/drivers/gpu/drm/amd/dal/dc/inc/resource.h b/drivers/gpu/drm/amd/dal/dc/inc/resource.h index 717bf13..e6a386c 100644 --- a/drivers/gpu/drm/amd/dal/dc/inc/resource.h +++ b/drivers/gpu/drm/amd/dal/dc/inc/resource.h @@ -34,7 +34,7 @@ #define DCE110_UNDERLAY_IDX 3 bool dc_construct_resource_pool(struct adapter_service *adapter_serv, - struct dc *dc, + struct core_dc *dc, uint8_t num_virtual_links); void build_scaling_params( @@ -42,7 +42,7 @@ void build_scaling_params( struct pipe_ctx *pipe_ctx); void build_scaling_params_for_context( - const struct dc *dc, + const struct core_dc *dc, struct validate_context *context); void unreference_clock_source( @@ -67,17 +67,17 @@ bool attach_surfaces_to_context( struct dc_target *dc_target, struct validate_context *context); -void pplib_apply_safe_state(const struct dc *dc); +void pplib_apply_safe_state(const struct core_dc *dc); void pplib_apply_display_requirements( - const struct dc *dc, + const struct core_dc *dc, const struct validate_context *context, struct dm_pp_display_configuration *pp_display_cfg); void build_info_frame(struct pipe_ctx *pipe_ctx); enum dc_status map_resources( - const struct dc *dc, + const struct core_dc *dc, struct validate_context *context); void val_ctx_destruct(struct validate_context *context); -- 2.7.4