diff options
Diffstat (limited to 'meta-steppeeagle/recipes-kernel/linux/linux-yocto')
57 files changed, 0 insertions, 13492 deletions
diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0000-yocto-amd-drm-radeon-backport-support-from-kernel-version-3.12.10.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0000-yocto-amd-drm-radeon-backport-support-from-kernel-version-3.12.10.patch deleted file mode 100644 index 8540cbf0..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0000-yocto-amd-drm-radeon-backport-support-from-kernel-version-3.12.10.patch +++ /dev/null @@ -1,780 +0,0 @@ -This single patch is a backport from kernel version 3.12.10 to kernel version -3.12. This lays the ground for the next set of patches which had been created -on top of 3.12.10. - -Signed-off-by: Arindam Nath <arindam.nath@amd.com> -diff -Naur a/drivers/acpi/bus.c b/drivers/acpi/bus.c ---- a/drivers/acpi/bus.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/acpi/bus.c 2014-04-03 02:38:06.049166833 +0530 -@@ -156,6 +156,16 @@ - } - EXPORT_SYMBOL(acpi_bus_get_private_data); - -+void acpi_bus_no_hotplug(acpi_handle handle) -+{ -+ struct acpi_device *adev = NULL; -+ -+ acpi_bus_get_device(handle, &adev); -+ if (adev) -+ adev->flags.no_hotplug = true; -+} -+EXPORT_SYMBOL_GPL(acpi_bus_no_hotplug); -+ - static void acpi_print_osc_error(acpi_handle handle, - struct acpi_osc_context *context, char *error) - { -diff -Naur a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c ---- a/drivers/gpu/drm/radeon/atombios_crtc.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/atombios_crtc.c 2014-04-03 01:45:50.161111970 +0530 -@@ -1180,23 +1180,18 @@ - fb_format |= EVERGREEN_GRPH_ARRAY_MODE(EVERGREEN_GRPH_ARRAY_1D_TILED_THIN1); - - if (rdev->family >= CHIP_BONAIRE) { -- u32 num_pipe_configs = rdev->config.cik.max_tile_pipes; -- u32 num_rb = rdev->config.cik.max_backends_per_se; -- if (num_pipe_configs > 8) -- num_pipe_configs = 8; -- if (num_pipe_configs == 8) -- fb_format |= CIK_GRPH_PIPE_CONFIG(CIK_ADDR_SURF_P8_32x32_16x16); -- else if (num_pipe_configs == 4) { -- if (num_rb == 4) -- fb_format |= CIK_GRPH_PIPE_CONFIG(CIK_ADDR_SURF_P4_16x16); -- else if (num_rb < 4) -- fb_format |= CIK_GRPH_PIPE_CONFIG(CIK_ADDR_SURF_P4_8x16); -- } else if (num_pipe_configs == 2) -- fb_format |= CIK_GRPH_PIPE_CONFIG(CIK_ADDR_SURF_P2); -+ /* Read the pipe config from the 2D TILED SCANOUT mode. -+ * It should be the same for the other modes too, but not all -+ * modes set the pipe config field. */ -+ u32 pipe_config = (rdev->config.cik.tile_mode_array[10] >> 6) & 0x1f; -+ -+ fb_format |= CIK_GRPH_PIPE_CONFIG(pipe_config); - } else if ((rdev->family == CHIP_TAHITI) || - (rdev->family == CHIP_PITCAIRN)) - fb_format |= SI_GRPH_PIPE_CONFIG(SI_ADDR_SURF_P8_32x32_8x16); -- else if (rdev->family == CHIP_VERDE) -+ else if ((rdev->family == CHIP_VERDE) || -+ (rdev->family == CHIP_OLAND) || -+ (rdev->family == CHIP_HAINAN)) /* for completeness. HAINAN has no display hw */ - fb_format |= SI_GRPH_PIPE_CONFIG(SI_ADDR_SURF_P4_8x16); - - switch (radeon_crtc->crtc_id) { -@@ -1753,7 +1748,7 @@ - if (pll != ATOM_PPLL_INVALID) - return pll; - } -- } else { -+ } else if (!ASIC_IS_DCE41(rdev)) { /* Don't share PLLs on DCE4.1 chips */ - /* use the same PPLL for all monitors with the same clock */ - pll = radeon_get_shared_nondp_ppll(crtc); - if (pll != ATOM_PPLL_INVALID) -diff -Naur a/drivers/gpu/drm/radeon/atombios_i2c.c b/drivers/gpu/drm/radeon/atombios_i2c.c ---- a/drivers/gpu/drm/radeon/atombios_i2c.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/atombios_i2c.c 2014-04-03 01:45:50.161111970 +0530 -@@ -44,7 +44,7 @@ - PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args; - int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction); - unsigned char *base; -- u16 out; -+ u16 out = cpu_to_le16(0); - - memset(&args, 0, sizeof(args)); - -@@ -55,9 +55,14 @@ - DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 3)\n", num); - return -EINVAL; - } -- args.ucRegIndex = buf[0]; -- if (num > 1) -- memcpy(&out, &buf[1], num - 1); -+ if (buf == NULL) -+ args.ucRegIndex = 0; -+ else -+ args.ucRegIndex = buf[0]; -+ if (num) -+ num--; -+ if (num) -+ memcpy(&out, &buf[1], num); - args.lpI2CDataOut = cpu_to_le16(out); - } else { - if (num > ATOM_MAX_HW_I2C_READ) { -@@ -94,14 +99,14 @@ - struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap); - struct i2c_msg *p; - int i, remaining, current_count, buffer_offset, max_bytes, ret; -- u8 buf = 0, flags; -+ u8 flags; - - /* check for bus probe */ - p = &msgs[0]; - if ((num == 1) && (p->len == 0)) { - ret = radeon_process_i2c_ch(i2c, - p->addr, HW_I2C_WRITE, -- &buf, 1); -+ NULL, 0); - if (ret) - return ret; - else -diff -Naur a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c ---- a/drivers/gpu/drm/radeon/cik.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/cik.c 2014-04-03 01:45:50.165111971 +0530 -@@ -2608,7 +2608,7 @@ - * Returns the disabled RB bitmask. - */ - static u32 cik_get_rb_disabled(struct radeon_device *rdev, -- u32 max_rb_num, u32 se_num, -+ u32 max_rb_num_per_se, - u32 sh_per_se) - { - u32 data, mask; -@@ -2622,7 +2622,7 @@ - - data >>= BACKEND_DISABLE_SHIFT; - -- mask = cik_create_bitmask(max_rb_num / se_num / sh_per_se); -+ mask = cik_create_bitmask(max_rb_num_per_se / sh_per_se); - - return data & mask; - } -@@ -2639,7 +2639,7 @@ - */ - static void cik_setup_rb(struct radeon_device *rdev, - u32 se_num, u32 sh_per_se, -- u32 max_rb_num) -+ u32 max_rb_num_per_se) - { - int i, j; - u32 data, mask; -@@ -2649,19 +2649,21 @@ - for (i = 0; i < se_num; i++) { - for (j = 0; j < sh_per_se; j++) { - cik_select_se_sh(rdev, i, j); -- data = cik_get_rb_disabled(rdev, max_rb_num, se_num, sh_per_se); -+ data = cik_get_rb_disabled(rdev, max_rb_num_per_se, sh_per_se); - disabled_rbs |= data << ((i * sh_per_se + j) * CIK_RB_BITMAP_WIDTH_PER_SH); - } - } - cik_select_se_sh(rdev, 0xffffffff, 0xffffffff); - - mask = 1; -- for (i = 0; i < max_rb_num; i++) { -+ for (i = 0; i < max_rb_num_per_se * se_num; i++) { - if (!(disabled_rbs & mask)) - enabled_rbs |= mask; - mask <<= 1; - } - -+ rdev->config.cik.backend_enable_mask = enabled_rbs; -+ - for (i = 0; i < se_num; i++) { - cik_select_se_sh(rdev, i, 0xffffffff); - data = 0; -diff -Naur a/drivers/gpu/drm/radeon/cik_sdma.c b/drivers/gpu/drm/radeon/cik_sdma.c ---- a/drivers/gpu/drm/radeon/cik_sdma.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/cik_sdma.c 2014-04-03 01:45:50.169111972 +0530 -@@ -468,7 +468,7 @@ - radeon_ring_write(ring, 0); /* src/dst endian swap */ - radeon_ring_write(ring, src_offset & 0xffffffff); - radeon_ring_write(ring, upper_32_bits(src_offset) & 0xffffffff); -- radeon_ring_write(ring, dst_offset & 0xfffffffc); -+ radeon_ring_write(ring, dst_offset & 0xffffffff); - radeon_ring_write(ring, upper_32_bits(dst_offset) & 0xffffffff); - src_offset += cur_size_in_bytes; - dst_offset += cur_size_in_bytes; -diff -Naur a/drivers/gpu/drm/radeon/dce6_afmt.c b/drivers/gpu/drm/radeon/dce6_afmt.c ---- a/drivers/gpu/drm/radeon/dce6_afmt.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/dce6_afmt.c 2014-04-03 01:45:50.169111972 +0530 -@@ -132,7 +132,7 @@ - } - - sad_count = drm_edid_to_speaker_allocation(radeon_connector->edid, &sadb); -- if (sad_count < 0) { -+ if (sad_count <= 0) { - DRM_ERROR("Couldn't read Speaker Allocation Data Block: %d\n", sad_count); - return; - } -@@ -193,7 +193,7 @@ - } - - sad_count = drm_edid_to_sad(radeon_connector->edid, &sads); -- if (sad_count < 0) { -+ if (sad_count <= 0) { - DRM_ERROR("Couldn't read SADs: %d\n", sad_count); - return; - } -diff -Naur a/drivers/gpu/drm/radeon/evergreen_hdmi.c b/drivers/gpu/drm/radeon/evergreen_hdmi.c ---- a/drivers/gpu/drm/radeon/evergreen_hdmi.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/evergreen_hdmi.c 2014-04-03 01:45:50.169111972 +0530 -@@ -81,7 +81,7 @@ - } - - sad_count = drm_edid_to_speaker_allocation(radeon_connector->edid, &sadb); -- if (sad_count < 0) { -+ if (sad_count <= 0) { - DRM_ERROR("Couldn't read Speaker Allocation Data Block: %d\n", sad_count); - return; - } -@@ -134,7 +134,7 @@ - } - - sad_count = drm_edid_to_sad(radeon_connector->edid, &sads); -- if (sad_count < 0) { -+ if (sad_count <= 0) { - DRM_ERROR("Couldn't read SADs: %d\n", sad_count); - return; - } -diff -Naur a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c ---- a/drivers/gpu/drm/radeon/ni.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/ni.c 2014-04-03 01:45:50.169111972 +0530 -@@ -900,6 +900,10 @@ - (rdev->pdev->device == 0x999C)) { - rdev->config.cayman.max_simds_per_se = 6; - rdev->config.cayman.max_backends_per_se = 2; -+ rdev->config.cayman.max_hw_contexts = 8; -+ rdev->config.cayman.sx_max_export_size = 256; -+ rdev->config.cayman.sx_max_export_pos_size = 64; -+ rdev->config.cayman.sx_max_export_smx_size = 192; - } else if ((rdev->pdev->device == 0x9903) || - (rdev->pdev->device == 0x9904) || - (rdev->pdev->device == 0x990A) || -@@ -910,6 +914,10 @@ - (rdev->pdev->device == 0x999D)) { - rdev->config.cayman.max_simds_per_se = 4; - rdev->config.cayman.max_backends_per_se = 2; -+ rdev->config.cayman.max_hw_contexts = 8; -+ rdev->config.cayman.sx_max_export_size = 256; -+ rdev->config.cayman.sx_max_export_pos_size = 64; -+ rdev->config.cayman.sx_max_export_smx_size = 192; - } else if ((rdev->pdev->device == 0x9919) || - (rdev->pdev->device == 0x9990) || - (rdev->pdev->device == 0x9991) || -@@ -920,9 +928,17 @@ - (rdev->pdev->device == 0x99A0)) { - rdev->config.cayman.max_simds_per_se = 3; - rdev->config.cayman.max_backends_per_se = 1; -+ rdev->config.cayman.max_hw_contexts = 4; -+ rdev->config.cayman.sx_max_export_size = 128; -+ rdev->config.cayman.sx_max_export_pos_size = 32; -+ rdev->config.cayman.sx_max_export_smx_size = 96; - } else { - rdev->config.cayman.max_simds_per_se = 2; - rdev->config.cayman.max_backends_per_se = 1; -+ rdev->config.cayman.max_hw_contexts = 4; -+ rdev->config.cayman.sx_max_export_size = 128; -+ rdev->config.cayman.sx_max_export_pos_size = 32; -+ rdev->config.cayman.sx_max_export_smx_size = 96; - } - rdev->config.cayman.max_texture_channel_caches = 2; - rdev->config.cayman.max_gprs = 256; -@@ -930,10 +946,6 @@ - rdev->config.cayman.max_gs_threads = 32; - rdev->config.cayman.max_stack_entries = 512; - rdev->config.cayman.sx_num_of_sets = 8; -- rdev->config.cayman.sx_max_export_size = 256; -- rdev->config.cayman.sx_max_export_pos_size = 64; -- rdev->config.cayman.sx_max_export_smx_size = 192; -- rdev->config.cayman.max_hw_contexts = 8; - rdev->config.cayman.sq_num_cf_insts = 2; - - rdev->config.cayman.sc_prim_fifo_size = 0x40; -diff -Naur a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c ---- a/drivers/gpu/drm/radeon/r600_hdmi.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/r600_hdmi.c 2014-04-03 01:45:50.169111972 +0530 -@@ -24,6 +24,7 @@ - * Authors: Christian König - */ - #include <linux/hdmi.h> -+#include <linux/gcd.h> - #include <drm/drmP.h> - #include <drm/radeon_drm.h> - #include "radeon.h" -@@ -57,35 +58,57 @@ - static const struct radeon_hdmi_acr r600_hdmi_predefined_acr[] = { - /* 32kHz 44.1kHz 48kHz */ - /* Clock N CTS N CTS N CTS */ -- { 25175, 4576, 28125, 7007, 31250, 6864, 28125 }, /* 25,20/1.001 MHz */ -+ { 25175, 4096, 25175, 28224, 125875, 6144, 25175 }, /* 25,20/1.001 MHz */ - { 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */ - { 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */ - { 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */ - { 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */ - { 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */ -- { 74176, 11648, 210937, 17836, 234375, 11648, 140625 }, /* 74.25/1.001 MHz */ -+ { 74176, 4096, 74176, 5733, 75335, 6144, 74176 }, /* 74.25/1.001 MHz */ - { 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */ -- { 148352, 11648, 421875, 8918, 234375, 5824, 140625 }, /* 148.50/1.001 MHz */ -+ { 148352, 4096, 148352, 5733, 150670, 6144, 148352 }, /* 148.50/1.001 MHz */ - { 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */ -- { 0, 4096, 0, 6272, 0, 6144, 0 } /* Other */ - }; - -+ - /* -- * calculate CTS value if it's not found in the table -+ * calculate CTS and N values if they are not found in the table - */ --static void r600_hdmi_calc_cts(uint32_t clock, int *CTS, int N, int freq) -+static void r600_hdmi_calc_cts(uint32_t clock, int *CTS, int *N, int freq) - { -- u64 n; -- u32 d; -+ int n, cts; -+ unsigned long div, mul; - -- if (*CTS == 0) { -- n = (u64)clock * (u64)N * 1000ULL; -- d = 128 * freq; -- do_div(n, d); -- *CTS = n; -- } -- DRM_DEBUG("Using ACR timing N=%d CTS=%d for frequency %d\n", -- N, *CTS, freq); -+ /* Safe, but overly large values */ -+ n = 128 * freq; -+ cts = clock * 1000; -+ -+ /* Smallest valid fraction */ -+ div = gcd(n, cts); -+ -+ n /= div; -+ cts /= div; -+ -+ /* -+ * The optimal N is 128*freq/1000. Calculate the closest larger -+ * value that doesn't truncate any bits. -+ */ -+ mul = ((128*freq/1000) + (n-1))/n; -+ -+ n *= mul; -+ cts *= mul; -+ -+ /* Check that we are in spec (not always possible) */ -+ if (n < (128*freq/1500)) -+ printk(KERN_WARNING "Calculated ACR N value is too small. You may experience audio problems.\n"); -+ if (n > (128*freq/300)) -+ printk(KERN_WARNING "Calculated ACR N value is too large. You may experience audio problems.\n"); -+ -+ *N = n; -+ *CTS = cts; -+ -+ DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n", -+ *N, *CTS, freq); - } - - struct radeon_hdmi_acr r600_hdmi_acr(uint32_t clock) -@@ -93,15 +116,16 @@ - struct radeon_hdmi_acr res; - u8 i; - -- for (i = 0; r600_hdmi_predefined_acr[i].clock != clock && -- r600_hdmi_predefined_acr[i].clock != 0; i++) -- ; -- res = r600_hdmi_predefined_acr[i]; -- -- /* In case some CTS are missing */ -- r600_hdmi_calc_cts(clock, &res.cts_32khz, res.n_32khz, 32000); -- r600_hdmi_calc_cts(clock, &res.cts_44_1khz, res.n_44_1khz, 44100); -- r600_hdmi_calc_cts(clock, &res.cts_48khz, res.n_48khz, 48000); -+ /* Precalculated values for common clocks */ -+ for (i = 0; i < ARRAY_SIZE(r600_hdmi_predefined_acr); i++) { -+ if (r600_hdmi_predefined_acr[i].clock == clock) -+ return r600_hdmi_predefined_acr[i]; -+ } -+ -+ /* And odd clocks get manually calculated */ -+ r600_hdmi_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000); -+ r600_hdmi_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100); -+ r600_hdmi_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000); - - return res; - } -@@ -280,9 +304,9 @@ - WREG32(DCCG_AUDIO_DTO1_MODULE, dto_modulo); - WREG32(DCCG_AUDIO_DTO_SELECT, 1); /* select DTO1 */ - } -- } else if (ASIC_IS_DCE3(rdev)) { -+ } else { - /* according to the reg specs, this should DCE3.2 only, but in -- * practice it seems to cover DCE3.0/3.1 as well. -+ * practice it seems to cover DCE2.0/3.0/3.1 as well. - */ - if (dig->dig_encoder == 0) { - WREG32(DCCG_AUDIO_DTO0_PHASE, base_rate * 100); -@@ -293,10 +317,6 @@ - WREG32(DCCG_AUDIO_DTO1_MODULE, clock * 100); - WREG32(DCCG_AUDIO_DTO_SELECT, 1); /* select DTO1 */ - } -- } else { -- /* according to the reg specs, this should be DCE2.0 and DCE3.0/3.1 */ -- WREG32(AUDIO_DTO, AUDIO_DTO_PHASE(base_rate / 10) | -- AUDIO_DTO_MODULE(clock / 10)); - } - } - -diff -Naur a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c ---- a/drivers/gpu/drm/radeon/radeon_asic.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/radeon_asic.c 2014-04-03 01:45:50.173111972 +0530 -@@ -2019,6 +2019,8 @@ - .bandwidth_update = &dce8_bandwidth_update, - .get_vblank_counter = &evergreen_get_vblank_counter, - .wait_for_vblank = &dce4_wait_for_vblank, -+ .set_backlight_level = &atombios_set_backlight_level, -+ .get_backlight_level = &atombios_get_backlight_level, - .hdmi_enable = &evergreen_hdmi_enable, - .hdmi_setmode = &evergreen_hdmi_setmode, - }, -@@ -2119,6 +2121,8 @@ - .bandwidth_update = &dce8_bandwidth_update, - .get_vblank_counter = &evergreen_get_vblank_counter, - .wait_for_vblank = &dce4_wait_for_vblank, -+ .set_backlight_level = &atombios_set_backlight_level, -+ .get_backlight_level = &atombios_get_backlight_level, - .hdmi_enable = &evergreen_hdmi_enable, - .hdmi_setmode = &evergreen_hdmi_setmode, - }, -diff -Naur a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c ---- a/drivers/gpu/drm/radeon/radeon_atombios.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/radeon_atombios.c 2014-04-03 01:45:50.173111972 +0530 -@@ -2918,7 +2918,7 @@ - mpll_param->dll_speed = args.ucDllSpeed; - mpll_param->bwcntl = args.ucBWCntl; - mpll_param->vco_mode = -- (args.ucPllCntlFlag & MPLL_CNTL_FLAG_VCO_MODE_MASK) ? 1 : 0; -+ (args.ucPllCntlFlag & MPLL_CNTL_FLAG_VCO_MODE_MASK); - mpll_param->yclk_sel = - (args.ucPllCntlFlag & MPLL_CNTL_FLAG_BYPASS_DQ_PLL) ? 1 : 0; - mpll_param->qdr = -diff -Naur a/drivers/gpu/drm/radeon/radeon_atpx_handler.c b/drivers/gpu/drm/radeon/radeon_atpx_handler.c ---- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c 2014-04-03 01:45:50.173111972 +0530 -@@ -34,6 +34,7 @@ - bool atpx_detected; - /* handle for device - and atpx */ - acpi_handle dhandle; -+ acpi_handle other_handle; - struct radeon_atpx atpx; - } radeon_atpx_priv; - -@@ -448,9 +449,10 @@ - return false; - - status = acpi_get_handle(dhandle, "ATPX", &atpx_handle); -- if (ACPI_FAILURE(status)) -+ if (ACPI_FAILURE(status)) { -+ radeon_atpx_priv.other_handle = dhandle; - return false; -- -+ } - radeon_atpx_priv.dhandle = dhandle; - radeon_atpx_priv.atpx.handle = atpx_handle; - return true; -@@ -527,6 +529,16 @@ - printk(KERN_INFO "VGA switcheroo: detected switching method %s handle\n", - acpi_method_name); - radeon_atpx_priv.atpx_detected = true; -+ /* -+ * On some systems hotplug events are generated for the device -+ * being switched off when ATPX is executed. They cause ACPI -+ * hotplug to trigger and attempt to remove the device from -+ * the system, which causes it to break down. Prevent that from -+ * happening by setting the no_hotplug flag for the involved -+ * ACPI device objects. -+ */ -+ acpi_bus_no_hotplug(radeon_atpx_priv.dhandle); -+ acpi_bus_no_hotplug(radeon_atpx_priv.other_handle); - return true; - } - return false; -diff -Naur a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c ---- a/drivers/gpu/drm/radeon/radeon_gart.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/radeon_gart.c 2014-04-03 01:45:50.173111972 +0530 -@@ -1156,6 +1156,8 @@ - return -ENOMEM; - - r = radeon_ib_get(rdev, ridx, &ib, NULL, ndw * 4); -+ if (r) -+ return r; - ib.length_dw = 0; - - r = radeon_vm_update_pdes(rdev, vm, &ib, bo_va->soffset, bo_va->eoffset); -diff -Naur a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h ---- a/drivers/gpu/drm/radeon/radeon.h 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/radeon.h 2014-04-03 01:45:50.177111972 +0530 -@@ -1930,7 +1930,7 @@ - unsigned sc_earlyz_tile_fifo_size; - - unsigned num_tile_pipes; -- unsigned num_backends_per_se; -+ unsigned backend_enable_mask; - unsigned backend_disable_mask_per_asic; - unsigned backend_map; - unsigned num_texture_channel_caches; -@@ -1960,7 +1960,7 @@ - unsigned sc_earlyz_tile_fifo_size; - - unsigned num_tile_pipes; -- unsigned num_backends_per_se; -+ unsigned backend_enable_mask; - unsigned backend_disable_mask_per_asic; - unsigned backend_map; - unsigned num_texture_channel_caches; -diff -Naur a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c ---- a/drivers/gpu/drm/radeon/radeon_kms.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/radeon_kms.c 2014-04-03 01:45:50.177111972 +0530 -@@ -436,6 +436,15 @@ - case RADEON_INFO_SI_CP_DMA_COMPUTE: - *value = 1; - break; -+ case RADEON_INFO_SI_BACKEND_ENABLED_MASK: -+ if (rdev->family >= CHIP_BONAIRE) { -+ *value = rdev->config.cik.backend_enable_mask; -+ } else if (rdev->family >= CHIP_TAHITI) { -+ *value = rdev->config.si.backend_enable_mask; -+ } else { -+ DRM_DEBUG_KMS("BACKEND_ENABLED_MASK is si+ only!\n"); -+ } -+ break; - default: - DRM_DEBUG_KMS("Invalid request %d\n", info->request); - return -EINVAL; -diff -Naur a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c ---- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c 2014-04-03 01:45:50.181111972 +0530 -@@ -422,6 +422,7 @@ - /* Pin framebuffer & get tilling informations */ - obj = radeon_fb->obj; - rbo = gem_to_radeon_bo(obj); -+retry: - r = radeon_bo_reserve(rbo, false); - if (unlikely(r != 0)) - return r; -@@ -430,6 +431,33 @@ - &base); - if (unlikely(r != 0)) { - radeon_bo_unreserve(rbo); -+ -+ /* On old GPU like RN50 with little vram pining can fails because -+ * current fb is taking all space needed. So instead of unpining -+ * the old buffer after pining the new one, first unpin old one -+ * and then retry pining new one. -+ * -+ * As only master can set mode only master can pin and it is -+ * unlikely the master client will race with itself especialy -+ * on those old gpu with single crtc. -+ * -+ * We don't shutdown the display controller because new buffer -+ * will end up in same spot. -+ */ -+ if (!atomic && fb && fb != crtc->fb) { -+ struct radeon_bo *old_rbo; -+ unsigned long nsize, osize; -+ -+ old_rbo = gem_to_radeon_bo(to_radeon_framebuffer(fb)->obj); -+ osize = radeon_bo_size(old_rbo); -+ nsize = radeon_bo_size(rbo); -+ if (nsize <= osize && !radeon_bo_reserve(old_rbo, false)) { -+ radeon_bo_unpin(old_rbo); -+ radeon_bo_unreserve(old_rbo); -+ fb = NULL; -+ goto retry; -+ } -+ } - return -EINVAL; - } - radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL); -diff -Naur a/drivers/gpu/drm/radeon/radeon_uvd.c b/drivers/gpu/drm/radeon/radeon_uvd.c ---- a/drivers/gpu/drm/radeon/radeon_uvd.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/radeon_uvd.c 2014-04-03 01:45:50.181111972 +0530 -@@ -240,6 +240,8 @@ - if (handle != 0 && rdev->uvd.filp[i] == filp) { - struct radeon_fence *fence; - -+ radeon_uvd_note_usage(rdev); -+ - r = radeon_uvd_get_destroy_msg(rdev, - R600_RING_TYPE_UVD_INDEX, handle, &fence); - if (r) { -@@ -470,7 +472,7 @@ - return -EINVAL; - } - -- if ((start >> 28) != (end >> 28)) { -+ if ((start >> 28) != ((end - 1) >> 28)) { - DRM_ERROR("reloc %LX-%LX crossing 256MB boundary!\n", - start, end); - return -EINVAL; -@@ -620,7 +622,7 @@ - if (r) - goto err; - -- r = radeon_ib_get(rdev, ring, &ib, NULL, 16); -+ r = radeon_ib_get(rdev, ring, &ib, NULL, 64); - if (r) - goto err; - -diff -Naur a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c ---- a/drivers/gpu/drm/radeon/rs690.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/rs690.c 2014-04-03 01:45:50.181111972 +0530 -@@ -162,6 +162,16 @@ - base = RREG32_MC(R_000100_MCCFG_FB_LOCATION); - base = G_000100_MC_FB_START(base) << 16; - rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); -+ /* Some boards seem to be configured for 128MB of sideport memory, -+ * but really only have 64MB. Just skip the sideport and use -+ * UMA memory. -+ */ -+ if (rdev->mc.igp_sideport_enabled && -+ (rdev->mc.real_vram_size == (384 * 1024 * 1024))) { -+ base += 128 * 1024 * 1024; -+ rdev->mc.real_vram_size -= 128 * 1024 * 1024; -+ rdev->mc.mc_vram_size = rdev->mc.real_vram_size; -+ } - - /* Use K8 direct mapping for fast fb access. */ - rdev->fastfb_working = false; -diff -Naur a/drivers/gpu/drm/radeon/rv770_dpm.c b/drivers/gpu/drm/radeon/rv770_dpm.c ---- a/drivers/gpu/drm/radeon/rv770_dpm.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/rv770_dpm.c 2014-04-03 01:45:50.185111972 +0530 -@@ -2328,6 +2328,12 @@ - pi->mclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss, - ASIC_INTERNAL_MEMORY_SS, 0); - -+ /* disable ss, causes hangs on some cayman boards */ -+ if (rdev->family == CHIP_CAYMAN) { -+ pi->sclk_ss = false; -+ pi->mclk_ss = false; -+ } -+ - if (pi->sclk_ss || pi->mclk_ss) - pi->dynamic_ss = true; - else -diff -Naur a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c ---- a/drivers/gpu/drm/radeon/si.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/si.c 2014-04-03 01:45:50.189111972 +0530 -@@ -2816,7 +2816,7 @@ - } - - static u32 si_get_rb_disabled(struct radeon_device *rdev, -- u32 max_rb_num, u32 se_num, -+ u32 max_rb_num_per_se, - u32 sh_per_se) - { - u32 data, mask; -@@ -2830,14 +2830,14 @@ - - data >>= BACKEND_DISABLE_SHIFT; - -- mask = si_create_bitmask(max_rb_num / se_num / sh_per_se); -+ mask = si_create_bitmask(max_rb_num_per_se / sh_per_se); - - return data & mask; - } - - static void si_setup_rb(struct radeon_device *rdev, - u32 se_num, u32 sh_per_se, -- u32 max_rb_num) -+ u32 max_rb_num_per_se) - { - int i, j; - u32 data, mask; -@@ -2847,19 +2847,21 @@ - for (i = 0; i < se_num; i++) { - for (j = 0; j < sh_per_se; j++) { - si_select_se_sh(rdev, i, j); -- data = si_get_rb_disabled(rdev, max_rb_num, se_num, sh_per_se); -+ data = si_get_rb_disabled(rdev, max_rb_num_per_se, sh_per_se); - disabled_rbs |= data << ((i * sh_per_se + j) * TAHITI_RB_BITMAP_WIDTH_PER_SH); - } - } - si_select_se_sh(rdev, 0xffffffff, 0xffffffff); - - mask = 1; -- for (i = 0; i < max_rb_num; i++) { -+ for (i = 0; i < max_rb_num_per_se * se_num; i++) { - if (!(disabled_rbs & mask)) - enabled_rbs |= mask; - mask <<= 1; - } - -+ rdev->config.si.backend_enable_mask = enabled_rbs; -+ - for (i = 0; i < se_num; i++) { - si_select_se_sh(rdev, i, 0xffffffff); - data = 0; -@@ -3887,8 +3889,15 @@ - rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); - rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); - /* size in MB on si */ -- rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL; -- rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL; -+ tmp = RREG32(CONFIG_MEMSIZE); -+ /* some boards may have garbage in the upper 16 bits */ -+ if (tmp & 0xffff0000) { -+ DRM_INFO("Probable bad vram size: 0x%08x\n", tmp); -+ if (tmp & 0xffff) -+ tmp &= 0xffff; -+ } -+ rdev->mc.mc_vram_size = tmp * 1024ULL * 1024ULL; -+ rdev->mc.real_vram_size = rdev->mc.mc_vram_size; - rdev->mc.visible_vram_size = rdev->mc.aper_size; - si_vram_gtt_location(rdev, &rdev->mc); - radeon_update_bandwidth_info(rdev); -diff -Naur a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h ---- a/drivers/gpu/drm/radeon/sid.h 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/sid.h 2014-04-03 01:45:50.189111972 +0530 -@@ -478,7 +478,7 @@ - #define STATE3_MASK (0x1f << 15) - #define STATE3_SHIFT 15 - --#define MC_SEQ_TRAIN_WAKEUP_CNTL 0x2808 -+#define MC_SEQ_TRAIN_WAKEUP_CNTL 0x28e8 - #define TRAIN_DONE_D0 (1 << 30) - #define TRAIN_DONE_D1 (1 << 31) - -diff -Naur a/drivers/gpu/drm/radeon/trinity_dpm.c b/drivers/gpu/drm/radeon/trinity_dpm.c ---- a/drivers/gpu/drm/radeon/trinity_dpm.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/trinity_dpm.c 2014-04-03 01:45:50.193111972 +0530 -@@ -1873,9 +1873,9 @@ - pi->enable_sclk_ds = true; - pi->enable_gfx_power_gating = true; - pi->enable_gfx_clock_gating = true; -- pi->enable_mg_clock_gating = true; -- pi->enable_gfx_dynamic_mgpg = true; /* ??? */ -- pi->override_dynamic_mgpg = true; -+ pi->enable_mg_clock_gating = false; -+ pi->enable_gfx_dynamic_mgpg = false; -+ pi->override_dynamic_mgpg = false; - pi->enable_auto_thermal_throttling = true; - pi->voltage_drop_in_dce = false; /* need to restructure dpm/modeset interaction */ - pi->uvd_dpm = true; /* ??? */ -diff -Naur a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h ---- a/include/acpi/acpi_bus.h 2013-11-04 05:11:51.000000000 +0530 -+++ b/include/acpi/acpi_bus.h 2014-04-03 02:41:15.381170177 +0530 -@@ -168,6 +168,7 @@ - u32 ejectable:1; - u32 power_manageable:1; - u32 match_driver:1; -+ u32 no_hotplug:1; - u32 reserved:27; - }; - -@@ -356,6 +357,7 @@ - extern int acpi_bus_generate_netlink_event(const char*, const char*, u8, int); - void acpi_bus_private_data_handler(acpi_handle, void *); - int acpi_bus_get_private_data(acpi_handle, void **); -+void acpi_bus_no_hotplug(acpi_handle handle); - extern int acpi_notifier_call_chain(struct acpi_device *, u32, u32); - extern int register_acpi_notifier(struct notifier_block *); - extern int unregister_acpi_notifier(struct notifier_block *); -diff -Naur a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h ---- a/include/uapi/drm/radeon_drm.h 2013-11-04 05:11:51.000000000 +0530 -+++ b/include/uapi/drm/radeon_drm.h 2014-04-03 02:30:27.125158815 +0530 -@@ -981,6 +981,8 @@ - #define RADEON_INFO_SI_TILE_MODE_ARRAY 0x16 - /* query if CP DMA is supported on the compute ring */ - #define RADEON_INFO_SI_CP_DMA_COMPUTE 0x17 -+/* query the number of render backends */ -+#define RADEON_INFO_SI_BACKEND_ENABLED_MASK 0x19 - - - struct drm_radeon_info { diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0001-yocto-amd-drm-radeon-add-vm_set_page-tracepoint.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0001-yocto-amd-drm-radeon-add-vm_set_page-tracepoint.patch deleted file mode 100644 index 7374ddfe..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0001-yocto-amd-drm-radeon-add-vm_set_page-tracepoint.patch +++ /dev/null @@ -1,118 +0,0 @@ -From c97f6a9d11c7350c40e84ae85851e46f546e9ace Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Tue, 29 Oct 2013 20:14:48 +0100 -Subject: [PATCH 01/44] drm/radeon: add vm_set_page tracepoint -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Christian König <christian.koenig@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/radeon/cik_sdma.c | 3 +++ - drivers/gpu/drm/radeon/ni_dma.c | 3 +++ - drivers/gpu/drm/radeon/radeon_trace.h | 24 ++++++++++++++++++++++++ - drivers/gpu/drm/radeon/si_dma.c | 3 +++ - 4 files changed, 33 insertions(+) - -diff --git a/drivers/gpu/drm/radeon/cik_sdma.c b/drivers/gpu/drm/radeon/cik_sdma.c -index aaf7ffc..ed65b6e 100644 ---- a/drivers/gpu/drm/radeon/cik_sdma.c -+++ b/drivers/gpu/drm/radeon/cik_sdma.c -@@ -25,6 +25,7 @@ - #include <drm/drmP.h> - #include "radeon.h" - #include "radeon_asic.h" -+#include "radeon_trace.h" - #include "cikd.h" - - /* sdma */ -@@ -657,6 +658,8 @@ void cik_sdma_vm_set_page(struct radeon_device *rdev, - uint64_t value; - unsigned ndw; - -+ trace_radeon_vm_set_page(pe, addr, count, incr, r600_flags); -+ - if (flags & RADEON_VM_PAGE_SYSTEM) { - while (count) { - ndw = count * 2; -diff --git a/drivers/gpu/drm/radeon/ni_dma.c b/drivers/gpu/drm/radeon/ni_dma.c -index dd6e968..e9cfe8a 100644 ---- a/drivers/gpu/drm/radeon/ni_dma.c -+++ b/drivers/gpu/drm/radeon/ni_dma.c -@@ -24,6 +24,7 @@ - #include <drm/drmP.h> - #include "radeon.h" - #include "radeon_asic.h" -+#include "radeon_trace.h" - #include "nid.h" - - u32 cayman_gpu_check_soft_reset(struct radeon_device *rdev); -@@ -260,6 +261,8 @@ void cayman_dma_vm_set_page(struct radeon_device *rdev, - uint64_t value; - unsigned ndw; - -+ trace_radeon_vm_set_page(pe, addr, count, incr, r600_flags); -+ - if ((flags & RADEON_VM_PAGE_SYSTEM) || (count == 1)) { - while (count) { - ndw = count * 2; -diff --git a/drivers/gpu/drm/radeon/radeon_trace.h b/drivers/gpu/drm/radeon/radeon_trace.h -index f7e3678..811bca6 100644 ---- a/drivers/gpu/drm/radeon/radeon_trace.h -+++ b/drivers/gpu/drm/radeon/radeon_trace.h -@@ -47,6 +47,30 @@ TRACE_EVENT(radeon_cs, - __entry->fences) - ); - -+TRACE_EVENT(radeon_vm_set_page, -+ TP_PROTO(uint64_t pe, uint64_t addr, unsigned count, -+ uint32_t incr, uint32_t flags), -+ TP_ARGS(pe, addr, count, incr, flags), -+ TP_STRUCT__entry( -+ __field(u64, pe) -+ __field(u64, addr) -+ __field(u32, count) -+ __field(u32, incr) -+ __field(u32, flags) -+ ), -+ -+ TP_fast_assign( -+ __entry->pe = pe; -+ __entry->addr = addr; -+ __entry->count = count; -+ __entry->incr = incr; -+ __entry->flags = flags; -+ ), -+ TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%08x, count=%u", -+ __entry->pe, __entry->addr, __entry->incr, -+ __entry->flags, __entry->count) -+); -+ - DECLARE_EVENT_CLASS(radeon_fence_request, - - TP_PROTO(struct drm_device *dev, u32 seqno), -diff --git a/drivers/gpu/drm/radeon/si_dma.c b/drivers/gpu/drm/radeon/si_dma.c -index 49909d2..17205fd 100644 ---- a/drivers/gpu/drm/radeon/si_dma.c -+++ b/drivers/gpu/drm/radeon/si_dma.c -@@ -24,6 +24,7 @@ - #include <drm/drmP.h> - #include "radeon.h" - #include "radeon_asic.h" -+#include "radeon_trace.h" - #include "sid.h" - - u32 si_gpu_check_soft_reset(struct radeon_device *rdev); -@@ -79,6 +80,8 @@ void si_dma_vm_set_page(struct radeon_device *rdev, - uint64_t value; - unsigned ndw; - -+ trace_radeon_vm_set_page(pe, addr, count, incr, r600_flags); -+ - if (flags & RADEON_VM_PAGE_SYSTEM) { - while (count) { - ndw = count * 2; --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0002-yocto-amd-drm-radeon-cleanup-flushing-on-CIK-v3.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0002-yocto-amd-drm-radeon-cleanup-flushing-on-CIK-v3.patch deleted file mode 100644 index 986489c2..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0002-yocto-amd-drm-radeon-cleanup-flushing-on-CIK-v3.patch +++ /dev/null @@ -1,96 +0,0 @@ -From eee59eb01ab5dcbf99d6c11d5467f933e76ba99f Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= <marek.olsak@amd.com> -Date: Sat, 19 Oct 2013 22:06:43 +0200 -Subject: [PATCH 02/44] drm/radeon: cleanup flushing on CIK (v3) -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -v2: fix compute handling. -v3: use HDP_MEM_COHERENCY_FLUSH_CNTL again - -Signed-off-by: Marek Olšák <marek.olsak@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> -Signed-off-by: Christian König <christian.koenig@amd.com> ---- - drivers/gpu/drm/radeon/cik.c | 43 +++++++++++++++--------------------------- - 1 file changed, 15 insertions(+), 28 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c -index 31f5f0e..2277a59 100644 ---- a/drivers/gpu/drm/radeon/cik.c -+++ b/drivers/gpu/drm/radeon/cik.c -@@ -3011,6 +3011,18 @@ int cik_ring_test(struct radeon_device *rdev, struct radeon_ring *ring) - return r; - } - -+static void cik_cp_hdp_flush(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ /* Request an HDP flush */ -+ radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); -+ radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) | -+ WRITE_DATA_DST_SEL(0))); -+ radeon_ring_write(ring, HDP_MEM_COHERENCY_FLUSH_CNTL >> 2); -+ radeon_ring_write(ring, 0); -+ radeon_ring_write(ring, 0); -+} -+ - /** - * cik_fence_gfx_ring_emit - emit a fence on the gfx ring - * -@@ -3037,15 +3049,7 @@ void cik_fence_gfx_ring_emit(struct radeon_device *rdev, - radeon_ring_write(ring, fence->seq); - radeon_ring_write(ring, 0); - /* HDP flush */ -- /* We should be using the new WAIT_REG_MEM special op packet here -- * but it causes the CP to hang -- */ -- radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); -- radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) | -- WRITE_DATA_DST_SEL(0))); -- radeon_ring_write(ring, HDP_MEM_COHERENCY_FLUSH_CNTL >> 2); -- radeon_ring_write(ring, 0); -- radeon_ring_write(ring, 0); -+ cik_cp_hdp_flush(rdev, ring); - } - - /** -@@ -3075,15 +3079,7 @@ void cik_fence_compute_ring_emit(struct radeon_device *rdev, - radeon_ring_write(ring, fence->seq); - radeon_ring_write(ring, 0); - /* HDP flush */ -- /* We should be using the new WAIT_REG_MEM special op packet here -- * but it causes the CP to hang -- */ -- radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); -- radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) | -- WRITE_DATA_DST_SEL(0))); -- radeon_ring_write(ring, HDP_MEM_COHERENCY_FLUSH_CNTL >> 2); -- radeon_ring_write(ring, 0); -- radeon_ring_write(ring, 0); -+ cik_cp_hdp_flush(rdev, ring); - } - - void cik_semaphore_ring_emit(struct radeon_device *rdev, -@@ -4809,16 +4805,7 @@ void cik_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) - radeon_ring_write(ring, VMID(0)); - - /* HDP flush */ -- /* We should be using the WAIT_REG_MEM packet here like in -- * cik_fence_ring_emit(), but it causes the CP to hang in this -- * context... -- */ -- radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); -- radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) | -- WRITE_DATA_DST_SEL(0))); -- radeon_ring_write(ring, HDP_MEM_COHERENCY_FLUSH_CNTL >> 2); -- radeon_ring_write(ring, 0); -- radeon_ring_write(ring, 0); -+ cik_cp_hdp_flush(rdev, ring); - - /* bits 0-15 are the VM contexts0-15 */ - radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0003-yocto-amd-drm-radeon-cleanup-DMA-HDP-flush-on-CIK-v2.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0003-yocto-amd-drm-radeon-cleanup-DMA-HDP-flush-on-CIK-v2.patch deleted file mode 100644 index 8fe9e087..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0003-yocto-amd-drm-radeon-cleanup-DMA-HDP-flush-on-CIK-v2.patch +++ /dev/null @@ -1,100 +0,0 @@ -From 9c318cd900e41358c7507cb144f0ef8f5c0bbb19 Mon Sep 17 00:00:00 2001 -From: Alex Deucher <alexander.deucher@amd.com> -Date: Tue, 5 Nov 2013 18:12:13 -0500 -Subject: [PATCH 03/44] drm/radeon: cleanup DMA HDP flush on CIK (v2) -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -v2: use HDP_MEM_COHERENCY_FLUSH_CNTL again - -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> -Signed-off-by: Christian König <christian.koenig@amd.com> ---- - drivers/gpu/drm/radeon/cik_sdma.c | 38 ++++++++++--------------------------- - 1 file changed, 10 insertions(+), 28 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/cik_sdma.c b/drivers/gpu/drm/radeon/cik_sdma.c -index ed65b6e..56ede52 100644 ---- a/drivers/gpu/drm/radeon/cik_sdma.c -+++ b/drivers/gpu/drm/radeon/cik_sdma.c -@@ -51,6 +51,14 @@ u32 cik_gpu_check_soft_reset(struct radeon_device *rdev); - * buffers. - */ - -+static void cik_sdma_hdp_flush(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); -+ radeon_ring_write(ring, HDP_MEM_COHERENCY_FLUSH_CNTL >> 2); -+ radeon_ring_write(ring, 0x0); -+} -+ - /** - * cik_sdma_ring_ib_execute - Schedule an IB on the DMA engine - * -@@ -102,14 +110,6 @@ void cik_sdma_fence_ring_emit(struct radeon_device *rdev, - { - struct radeon_ring *ring = &rdev->ring[fence->ring]; - u64 addr = rdev->fence_drv[fence->ring].gpu_addr; -- u32 extra_bits = (SDMA_POLL_REG_MEM_EXTRA_OP(1) | -- SDMA_POLL_REG_MEM_EXTRA_FUNC(3)); /* == */ -- u32 ref_and_mask; -- -- if (fence->ring == R600_RING_TYPE_DMA_INDEX) -- ref_and_mask = SDMA0; -- else -- ref_and_mask = SDMA1; - - /* write the fence */ - radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_FENCE, 0, 0)); -@@ -119,12 +119,7 @@ void cik_sdma_fence_ring_emit(struct radeon_device *rdev, - /* generate an interrupt */ - radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_TRAP, 0, 0)); - /* flush HDP */ -- radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_POLL_REG_MEM, 0, extra_bits)); -- radeon_ring_write(ring, GPU_HDP_FLUSH_DONE); -- radeon_ring_write(ring, GPU_HDP_FLUSH_REQ); -- radeon_ring_write(ring, ref_and_mask); /* REFERENCE */ -- radeon_ring_write(ring, ref_and_mask); /* MASK */ -- radeon_ring_write(ring, (4 << 16) | 10); /* RETRY_COUNT, POLL_INTERVAL */ -+ cik_sdma_hdp_flush(rdev, ring); - } - - /** -@@ -727,18 +722,10 @@ void cik_sdma_vm_set_page(struct radeon_device *rdev, - void cik_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) - { - struct radeon_ring *ring = &rdev->ring[ridx]; -- u32 extra_bits = (SDMA_POLL_REG_MEM_EXTRA_OP(1) | -- SDMA_POLL_REG_MEM_EXTRA_FUNC(3)); /* == */ -- u32 ref_and_mask; - - if (vm == NULL) - return; - -- if (ridx == R600_RING_TYPE_DMA_INDEX) -- ref_and_mask = SDMA0; -- else -- ref_and_mask = SDMA1; -- - radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); - if (vm->id < 8) { - radeon_ring_write(ring, (VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (vm->id << 2)) >> 2); -@@ -773,12 +760,7 @@ void cik_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm - radeon_ring_write(ring, VMID(0)); - - /* flush HDP */ -- radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_POLL_REG_MEM, 0, extra_bits)); -- radeon_ring_write(ring, GPU_HDP_FLUSH_DONE); -- radeon_ring_write(ring, GPU_HDP_FLUSH_REQ); -- radeon_ring_write(ring, ref_and_mask); /* REFERENCE */ -- radeon_ring_write(ring, ref_and_mask); /* MASK */ -- radeon_ring_write(ring, (4 << 16) | 10); /* RETRY_COUNT, POLL_INTERVAL */ -+ cik_sdma_hdp_flush(rdev, ring); - - /* flush TLB */ - radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000)); --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0004-yocto-amd-drm-radeon-allow-semaphore-emission-to-fail.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0004-yocto-amd-drm-radeon-allow-semaphore-emission-to-fail.patch deleted file mode 100644 index f8d0e106..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0004-yocto-amd-drm-radeon-allow-semaphore-emission-to-fail.patch +++ /dev/null @@ -1,754 +0,0 @@ -From 26046527719672da3148501129151ccbceaf8339 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Mon, 8 Jul 2013 05:11:52 -0600 -Subject: [PATCH 04/44] drm/radeon: allow semaphore emission to fail -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Some rings can only use semaphore in certain states, take that into account -and fall back to waiting for a fence when a ring currently can't emit a -semaphore. - -Signed-off-by: Christian König <christian.koenig@amd.com> ---- - drivers/gpu/drm/radeon/cik.c | 4 +- - drivers/gpu/drm/radeon/cik_sdma.c | 13 ++- - drivers/gpu/drm/radeon/evergreen_dma.c | 9 +-- - drivers/gpu/drm/radeon/r100.c | 3 +- - drivers/gpu/drm/radeon/r600.c | 13 ++- - drivers/gpu/drm/radeon/r600_dma.c | 13 ++- - drivers/gpu/drm/radeon/radeon.h | 14 ++-- - drivers/gpu/drm/radeon/radeon_asic.h | 18 ++--- - drivers/gpu/drm/radeon/radeon_cs.c | 9 ++- - drivers/gpu/drm/radeon/radeon_fence.c | 26 ++++++ - drivers/gpu/drm/radeon/radeon_gart.c | 2 +- - drivers/gpu/drm/radeon/radeon_ring.c | 46 +++-------- - drivers/gpu/drm/radeon/radeon_semaphore.c | 123 ++++++++++++++++++++++------- - drivers/gpu/drm/radeon/rv770_dma.c | 9 +-- - drivers/gpu/drm/radeon/si_dma.c | 9 +-- - drivers/gpu/drm/radeon/uvd_v1_0.c | 4 +- - drivers/gpu/drm/radeon/uvd_v3_1.c | 4 +- - 17 files changed, 182 insertions(+), 137 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c -index 2277a59..0608446 100644 ---- a/drivers/gpu/drm/radeon/cik.c -+++ b/drivers/gpu/drm/radeon/cik.c -@@ -3082,7 +3082,7 @@ void cik_fence_compute_ring_emit(struct radeon_device *rdev, - cik_cp_hdp_flush(rdev, ring); - } - --void cik_semaphore_ring_emit(struct radeon_device *rdev, -+bool cik_semaphore_ring_emit(struct radeon_device *rdev, - struct radeon_ring *ring, - struct radeon_semaphore *semaphore, - bool emit_wait) -@@ -3093,6 +3093,8 @@ void cik_semaphore_ring_emit(struct radeon_device *rdev, - radeon_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1)); - radeon_ring_write(ring, addr & 0xffffffff); - radeon_ring_write(ring, (upper_32_bits(addr) & 0xffff) | sel); -+ -+ return true; - } - - /* -diff --git a/drivers/gpu/drm/radeon/cik_sdma.c b/drivers/gpu/drm/radeon/cik_sdma.c -index 56ede52..ace0bc6 100644 ---- a/drivers/gpu/drm/radeon/cik_sdma.c -+++ b/drivers/gpu/drm/radeon/cik_sdma.c -@@ -133,7 +133,7 @@ void cik_sdma_fence_ring_emit(struct radeon_device *rdev, - * Add a DMA semaphore packet to the ring wait on or signal - * other rings (CIK). - */ --void cik_sdma_semaphore_ring_emit(struct radeon_device *rdev, -+bool cik_sdma_semaphore_ring_emit(struct radeon_device *rdev, - struct radeon_ring *ring, - struct radeon_semaphore *semaphore, - bool emit_wait) -@@ -144,6 +144,8 @@ void cik_sdma_semaphore_ring_emit(struct radeon_device *rdev, - radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SEMAPHORE, 0, extra_bits)); - radeon_ring_write(ring, addr & 0xfffffff8); - radeon_ring_write(ring, upper_32_bits(addr) & 0xffffffff); -+ -+ return true; - } - - /** -@@ -446,13 +448,8 @@ int cik_copy_dma(struct radeon_device *rdev, - return r; - } - -- if (radeon_fence_need_sync(*fence, ring->idx)) { -- radeon_semaphore_sync_rings(rdev, sem, (*fence)->ring, -- ring->idx); -- radeon_fence_note_sync(*fence, ring->idx); -- } else { -- radeon_semaphore_free(rdev, &sem, NULL); -- } -+ radeon_semaphore_sync_to(sem, *fence); -+ radeon_semaphore_sync_rings(rdev, sem, ring->idx); - - for (i = 0; i < num_loops; i++) { - cur_size_in_bytes = size_in_bytes; -diff --git a/drivers/gpu/drm/radeon/evergreen_dma.c b/drivers/gpu/drm/radeon/evergreen_dma.c -index 6a0656d..a37b544 100644 ---- a/drivers/gpu/drm/radeon/evergreen_dma.c -+++ b/drivers/gpu/drm/radeon/evergreen_dma.c -@@ -131,13 +131,8 @@ int evergreen_copy_dma(struct radeon_device *rdev, - return r; - } - -- if (radeon_fence_need_sync(*fence, ring->idx)) { -- radeon_semaphore_sync_rings(rdev, sem, (*fence)->ring, -- ring->idx); -- radeon_fence_note_sync(*fence, ring->idx); -- } else { -- radeon_semaphore_free(rdev, &sem, NULL); -- } -+ radeon_semaphore_sync_to(sem, *fence); -+ radeon_semaphore_sync_rings(rdev, sem, ring->idx); - - for (i = 0; i < num_loops; i++) { - cur_size_in_dw = size_in_dw; -diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c -index d713330..aa015a5 100644 ---- a/drivers/gpu/drm/radeon/r100.c -+++ b/drivers/gpu/drm/radeon/r100.c -@@ -869,13 +869,14 @@ void r100_fence_ring_emit(struct radeon_device *rdev, - radeon_ring_write(ring, RADEON_SW_INT_FIRE); - } - --void r100_semaphore_ring_emit(struct radeon_device *rdev, -+bool r100_semaphore_ring_emit(struct radeon_device *rdev, - struct radeon_ring *ring, - struct radeon_semaphore *semaphore, - bool emit_wait) - { - /* Unused on older asics, since we don't have semaphores or multiple rings */ - BUG(); -+ return false; - } - - int r100_copy_blit(struct radeon_device *rdev, -diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c -index f9be220..a5de2cf 100644 ---- a/drivers/gpu/drm/radeon/r600.c -+++ b/drivers/gpu/drm/radeon/r600.c -@@ -2597,7 +2597,7 @@ void r600_fence_ring_emit(struct radeon_device *rdev, - } - } - --void r600_semaphore_ring_emit(struct radeon_device *rdev, -+bool r600_semaphore_ring_emit(struct radeon_device *rdev, - struct radeon_ring *ring, - struct radeon_semaphore *semaphore, - bool emit_wait) -@@ -2611,6 +2611,8 @@ void r600_semaphore_ring_emit(struct radeon_device *rdev, - radeon_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1)); - radeon_ring_write(ring, addr & 0xffffffff); - radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | sel); -+ -+ return true; - } - - /** -@@ -2653,13 +2655,8 @@ int r600_copy_cpdma(struct radeon_device *rdev, - return r; - } - -- if (radeon_fence_need_sync(*fence, ring->idx)) { -- radeon_semaphore_sync_rings(rdev, sem, (*fence)->ring, -- ring->idx); -- radeon_fence_note_sync(*fence, ring->idx); -- } else { -- radeon_semaphore_free(rdev, &sem, NULL); -- } -+ radeon_semaphore_sync_to(sem, *fence); -+ radeon_semaphore_sync_rings(rdev, sem, ring->idx); - - radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); - radeon_ring_write(ring, (WAIT_UNTIL - PACKET3_SET_CONFIG_REG_OFFSET) >> 2); -diff --git a/drivers/gpu/drm/radeon/r600_dma.c b/drivers/gpu/drm/radeon/r600_dma.c -index 3b31745..7844d15 100644 ---- a/drivers/gpu/drm/radeon/r600_dma.c -+++ b/drivers/gpu/drm/radeon/r600_dma.c -@@ -311,7 +311,7 @@ void r600_dma_fence_ring_emit(struct radeon_device *rdev, - * Add a DMA semaphore packet to the ring wait on or signal - * other rings (r6xx-SI). - */ --void r600_dma_semaphore_ring_emit(struct radeon_device *rdev, -+bool r600_dma_semaphore_ring_emit(struct radeon_device *rdev, - struct radeon_ring *ring, - struct radeon_semaphore *semaphore, - bool emit_wait) -@@ -322,6 +322,8 @@ void r600_dma_semaphore_ring_emit(struct radeon_device *rdev, - radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_SEMAPHORE, 0, s, 0)); - radeon_ring_write(ring, addr & 0xfffffffc); - radeon_ring_write(ring, upper_32_bits(addr) & 0xff); -+ -+ return true; - } - - /** -@@ -462,13 +464,8 @@ int r600_copy_dma(struct radeon_device *rdev, - return r; - } - -- if (radeon_fence_need_sync(*fence, ring->idx)) { -- radeon_semaphore_sync_rings(rdev, sem, (*fence)->ring, -- ring->idx); -- radeon_fence_note_sync(*fence, ring->idx); -- } else { -- radeon_semaphore_free(rdev, &sem, NULL); -- } -+ radeon_semaphore_sync_to(sem, *fence); -+ radeon_semaphore_sync_rings(rdev, sem, ring->idx); - - for (i = 0; i < num_loops; i++) { - cur_size_in_dw = size_in_dw; -diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h -index f44ca58..c0d4230 100644 ---- a/drivers/gpu/drm/radeon/radeon.h -+++ b/drivers/gpu/drm/radeon/radeon.h -@@ -348,6 +348,7 @@ int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence **fence, i - void radeon_fence_process(struct radeon_device *rdev, int ring); - bool radeon_fence_signaled(struct radeon_fence *fence); - int radeon_fence_wait(struct radeon_fence *fence, bool interruptible); -+int radeon_fence_wait_locked(struct radeon_fence *fence); - int radeon_fence_wait_next_locked(struct radeon_device *rdev, int ring); - int radeon_fence_wait_empty_locked(struct radeon_device *rdev, int ring); - int radeon_fence_wait_any(struct radeon_device *rdev, -@@ -548,17 +549,20 @@ struct radeon_semaphore { - struct radeon_sa_bo *sa_bo; - signed waiters; - uint64_t gpu_addr; -+ struct radeon_fence *sync_to[RADEON_NUM_RINGS]; - }; - - int radeon_semaphore_create(struct radeon_device *rdev, - struct radeon_semaphore **semaphore); --void radeon_semaphore_emit_signal(struct radeon_device *rdev, int ring, -+bool radeon_semaphore_emit_signal(struct radeon_device *rdev, int ring, - struct radeon_semaphore *semaphore); --void radeon_semaphore_emit_wait(struct radeon_device *rdev, int ring, -+bool radeon_semaphore_emit_wait(struct radeon_device *rdev, int ring, - struct radeon_semaphore *semaphore); -+void radeon_semaphore_sync_to(struct radeon_semaphore *semaphore, -+ struct radeon_fence *fence); - int radeon_semaphore_sync_rings(struct radeon_device *rdev, - struct radeon_semaphore *semaphore, -- int signaler, int waiter); -+ int waiting_ring); - void radeon_semaphore_free(struct radeon_device *rdev, - struct radeon_semaphore **semaphore, - struct radeon_fence *fence); -@@ -765,7 +769,6 @@ struct radeon_ib { - struct radeon_fence *fence; - struct radeon_vm *vm; - bool is_const_ib; -- struct radeon_fence *sync_to[RADEON_NUM_RINGS]; - struct radeon_semaphore *semaphore; - }; - -@@ -915,7 +918,6 @@ int radeon_ib_get(struct radeon_device *rdev, int ring, - struct radeon_ib *ib, struct radeon_vm *vm, - unsigned size); - void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib); --void radeon_ib_sync_to(struct radeon_ib *ib, struct radeon_fence *fence); - int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib, - struct radeon_ib *const_ib); - int radeon_ib_pool_init(struct radeon_device *rdev); -@@ -1629,7 +1631,7 @@ struct radeon_asic_ring { - /* command emmit functions */ - void (*ib_execute)(struct radeon_device *rdev, struct radeon_ib *ib); - void (*emit_fence)(struct radeon_device *rdev, struct radeon_fence *fence); -- void (*emit_semaphore)(struct radeon_device *rdev, struct radeon_ring *cp, -+ bool (*emit_semaphore)(struct radeon_device *rdev, struct radeon_ring *cp, - struct radeon_semaphore *semaphore, bool emit_wait); - void (*vm_flush)(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); - -diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h -index 70c29d5..8588670 100644 ---- a/drivers/gpu/drm/radeon/radeon_asic.h -+++ b/drivers/gpu/drm/radeon/radeon_asic.h -@@ -80,7 +80,7 @@ int r100_irq_set(struct radeon_device *rdev); - int r100_irq_process(struct radeon_device *rdev); - void r100_fence_ring_emit(struct radeon_device *rdev, - struct radeon_fence *fence); --void r100_semaphore_ring_emit(struct radeon_device *rdev, -+bool r100_semaphore_ring_emit(struct radeon_device *rdev, - struct radeon_ring *cp, - struct radeon_semaphore *semaphore, - bool emit_wait); -@@ -313,13 +313,13 @@ int r600_cs_parse(struct radeon_cs_parser *p); - int r600_dma_cs_parse(struct radeon_cs_parser *p); - void r600_fence_ring_emit(struct radeon_device *rdev, - struct radeon_fence *fence); --void r600_semaphore_ring_emit(struct radeon_device *rdev, -+bool r600_semaphore_ring_emit(struct radeon_device *rdev, - struct radeon_ring *cp, - struct radeon_semaphore *semaphore, - bool emit_wait); - void r600_dma_fence_ring_emit(struct radeon_device *rdev, - struct radeon_fence *fence); --void r600_dma_semaphore_ring_emit(struct radeon_device *rdev, -+bool r600_dma_semaphore_ring_emit(struct radeon_device *rdev, - struct radeon_ring *ring, - struct radeon_semaphore *semaphore, - bool emit_wait); -@@ -566,10 +566,6 @@ int sumo_dpm_force_performance_level(struct radeon_device *rdev, - */ - void cayman_fence_ring_emit(struct radeon_device *rdev, - struct radeon_fence *fence); --void cayman_uvd_semaphore_emit(struct radeon_device *rdev, -- struct radeon_ring *ring, -- struct radeon_semaphore *semaphore, -- bool emit_wait); - void cayman_pcie_gart_tlb_flush(struct radeon_device *rdev); - int cayman_init(struct radeon_device *rdev); - void cayman_fini(struct radeon_device *rdev); -@@ -696,7 +692,7 @@ void cik_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); - int cik_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); - void cik_sdma_fence_ring_emit(struct radeon_device *rdev, - struct radeon_fence *fence); --void cik_sdma_semaphore_ring_emit(struct radeon_device *rdev, -+bool cik_sdma_semaphore_ring_emit(struct radeon_device *rdev, - struct radeon_ring *ring, - struct radeon_semaphore *semaphore, - bool emit_wait); -@@ -712,7 +708,7 @@ void cik_fence_gfx_ring_emit(struct radeon_device *rdev, - struct radeon_fence *fence); - void cik_fence_compute_ring_emit(struct radeon_device *rdev, - struct radeon_fence *fence); --void cik_semaphore_ring_emit(struct radeon_device *rdev, -+bool cik_semaphore_ring_emit(struct radeon_device *rdev, - struct radeon_ring *cp, - struct radeon_semaphore *semaphore, - bool emit_wait); -@@ -802,7 +798,7 @@ void uvd_v1_0_stop(struct radeon_device *rdev); - - int uvd_v1_0_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); - int uvd_v1_0_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); --void uvd_v1_0_semaphore_emit(struct radeon_device *rdev, -+bool uvd_v1_0_semaphore_emit(struct radeon_device *rdev, - struct radeon_ring *ring, - struct radeon_semaphore *semaphore, - bool emit_wait); -@@ -814,7 +810,7 @@ void uvd_v2_2_fence_emit(struct radeon_device *rdev, - struct radeon_fence *fence); - - /* uvd v3.1 */ --void uvd_v3_1_semaphore_emit(struct radeon_device *rdev, -+bool uvd_v3_1_semaphore_emit(struct radeon_device *rdev, - struct radeon_ring *ring, - struct radeon_semaphore *semaphore, - bool emit_wait); -diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c -index 80285e3..eb5cd94 100644 ---- a/drivers/gpu/drm/radeon/radeon_cs.c -+++ b/drivers/gpu/drm/radeon/radeon_cs.c -@@ -159,7 +159,8 @@ static void radeon_cs_sync_rings(struct radeon_cs_parser *p) - if (!p->relocs[i].robj) - continue; - -- radeon_ib_sync_to(&p->ib, p->relocs[i].robj->tbo.sync_obj); -+ radeon_semaphore_sync_to(p->ib.semaphore, -+ p->relocs[i].robj->tbo.sync_obj); - } - } - -@@ -495,9 +496,9 @@ static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev, - goto out; - } - radeon_cs_sync_rings(parser); -- radeon_ib_sync_to(&parser->ib, vm->fence); -- radeon_ib_sync_to(&parser->ib, radeon_vm_grab_id( -- rdev, vm, parser->ring)); -+ radeon_semaphore_sync_to(parser->ib.semaphore, vm->fence); -+ radeon_semaphore_sync_to(parser->ib.semaphore, -+ radeon_vm_grab_id(rdev, vm, parser->ring)); - - if ((rdev->family >= CHIP_TAHITI) && - (parser->chunk_const_ib_idx != -1)) { -diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c -index ddb8f8e..8aea16e 100644 ---- a/drivers/gpu/drm/radeon/radeon_fence.c -+++ b/drivers/gpu/drm/radeon/radeon_fence.c -@@ -404,6 +404,32 @@ int radeon_fence_wait(struct radeon_fence *fence, bool intr) - return 0; - } - -+/** -+ * radeon_fence_wait_locked - wait for a fence to signal -+ * -+ * @fence: radeon fence object -+ * -+ * Wait for the requested fence to signal (all asics). -+ * Returns 0 if the fence has passed, error for all other cases. -+ */ -+int radeon_fence_wait_locked(struct radeon_fence *fence) -+{ -+ int r; -+ -+ if (fence == NULL) { -+ WARN(1, "Querying an invalid fence : %p !\n", fence); -+ return -EINVAL; -+ } -+ -+ r = radeon_fence_wait_seq(fence->rdev, fence->seq, -+ fence->ring, false, false); -+ if (r) { -+ return r; -+ } -+ fence->seq = RADEON_FENCE_SIGNALED_SEQ; -+ return 0; -+} -+ - static bool radeon_fence_any_seq_signaled(struct radeon_device *rdev, u64 *seq) - { - unsigned i; -diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c -index 3b1de72..f8d7b16 100644 ---- a/drivers/gpu/drm/radeon/radeon_gart.c -+++ b/drivers/gpu/drm/radeon/radeon_gart.c -@@ -1169,7 +1169,7 @@ int radeon_vm_bo_update_pte(struct radeon_device *rdev, - radeon_vm_update_ptes(rdev, vm, &ib, bo_va->soffset, bo_va->eoffset, - addr, bo_va->flags); - -- radeon_ib_sync_to(&ib, vm->fence); -+ radeon_semaphore_sync_to(ib.semaphore, vm->fence); - r = radeon_ib_schedule(rdev, &ib, NULL); - if (r) { - radeon_ib_free(rdev, &ib); -diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c -index 18254e1..9214403 100644 ---- a/drivers/gpu/drm/radeon/radeon_ring.c -+++ b/drivers/gpu/drm/radeon/radeon_ring.c -@@ -61,7 +61,7 @@ int radeon_ib_get(struct radeon_device *rdev, int ring, - struct radeon_ib *ib, struct radeon_vm *vm, - unsigned size) - { -- int i, r; -+ int r; - - r = radeon_sa_bo_new(rdev, &rdev->ring_tmp_bo, &ib->sa_bo, size, 256, true); - if (r) { -@@ -87,8 +87,6 @@ int radeon_ib_get(struct radeon_device *rdev, int ring, - ib->gpu_addr = radeon_sa_bo_gpu_addr(ib->sa_bo); - } - ib->is_const_ib = false; -- for (i = 0; i < RADEON_NUM_RINGS; ++i) -- ib->sync_to[i] = NULL; - - return 0; - } -@@ -109,25 +107,6 @@ void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib) - } - - /** -- * radeon_ib_sync_to - sync to fence before executing the IB -- * -- * @ib: IB object to add fence to -- * @fence: fence to sync to -- * -- * Sync to the fence before executing the IB -- */ --void radeon_ib_sync_to(struct radeon_ib *ib, struct radeon_fence *fence) --{ -- struct radeon_fence *other; -- -- if (!fence) -- return; -- -- other = ib->sync_to[fence->ring]; -- ib->sync_to[fence->ring] = radeon_fence_later(fence, other); --} -- --/** - * radeon_ib_schedule - schedule an IB (Indirect Buffer) on the ring - * - * @rdev: radeon_device pointer -@@ -151,8 +130,7 @@ int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib, - struct radeon_ib *const_ib) - { - struct radeon_ring *ring = &rdev->ring[ib->ring]; -- bool need_sync = false; -- int i, r = 0; -+ int r = 0; - - if (!ib->length_dw || !ring->ready) { - /* TODO: Nothings in the ib we should report. */ -@@ -166,19 +144,15 @@ int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib, - dev_err(rdev->dev, "scheduling IB failed (%d).\n", r); - return r; - } -- for (i = 0; i < RADEON_NUM_RINGS; ++i) { -- struct radeon_fence *fence = ib->sync_to[i]; -- if (radeon_fence_need_sync(fence, ib->ring)) { -- need_sync = true; -- radeon_semaphore_sync_rings(rdev, ib->semaphore, -- fence->ring, ib->ring); -- radeon_fence_note_sync(fence, ib->ring); -- } -- } -- /* immediately free semaphore when we don't need to sync */ -- if (!need_sync) { -- radeon_semaphore_free(rdev, &ib->semaphore, NULL); -+ -+ /* sync with other rings */ -+ r = radeon_semaphore_sync_rings(rdev, ib->semaphore, ib->ring); -+ if (r) { -+ dev_err(rdev->dev, "failed to sync rings (%d)\n", r); -+ radeon_ring_unlock_undo(rdev, ring); -+ return r; - } -+ - /* if we can't remember our last VM flush then flush now! */ - /* XXX figure out why we have to flush for every IB */ - if (ib->vm /*&& !ib->vm->last_flush*/) { -diff --git a/drivers/gpu/drm/radeon/radeon_semaphore.c b/drivers/gpu/drm/radeon/radeon_semaphore.c -index 8dcc20f..34ea889 100644 ---- a/drivers/gpu/drm/radeon/radeon_semaphore.c -+++ b/drivers/gpu/drm/radeon/radeon_semaphore.c -@@ -34,7 +34,7 @@ - int radeon_semaphore_create(struct radeon_device *rdev, - struct radeon_semaphore **semaphore) - { -- int r; -+ int i, r; - - *semaphore = kmalloc(sizeof(struct radeon_semaphore), GFP_KERNEL); - if (*semaphore == NULL) { -@@ -50,54 +50,117 @@ int radeon_semaphore_create(struct radeon_device *rdev, - (*semaphore)->waiters = 0; - (*semaphore)->gpu_addr = radeon_sa_bo_gpu_addr((*semaphore)->sa_bo); - *((uint64_t*)radeon_sa_bo_cpu_addr((*semaphore)->sa_bo)) = 0; -+ -+ for (i = 0; i < RADEON_NUM_RINGS; ++i) -+ (*semaphore)->sync_to[i] = NULL; -+ - return 0; - } - --void radeon_semaphore_emit_signal(struct radeon_device *rdev, int ring, -+bool radeon_semaphore_emit_signal(struct radeon_device *rdev, int ridx, - struct radeon_semaphore *semaphore) - { -- --semaphore->waiters; -- radeon_semaphore_ring_emit(rdev, ring, &rdev->ring[ring], semaphore, false); -+ struct radeon_ring *ring = &rdev->ring[ridx]; -+ -+ if (radeon_semaphore_ring_emit(rdev, ridx, ring, semaphore, false)) { -+ --semaphore->waiters; -+ -+ /* for debugging lockup only, used by sysfs debug files */ -+ ring->last_semaphore_signal_addr = semaphore->gpu_addr; -+ return true; -+ } -+ return false; - } - --void radeon_semaphore_emit_wait(struct radeon_device *rdev, int ring, -+bool radeon_semaphore_emit_wait(struct radeon_device *rdev, int ridx, - struct radeon_semaphore *semaphore) - { -- ++semaphore->waiters; -- radeon_semaphore_ring_emit(rdev, ring, &rdev->ring[ring], semaphore, true); -+ struct radeon_ring *ring = &rdev->ring[ridx]; -+ -+ if (radeon_semaphore_ring_emit(rdev, ridx, ring, semaphore, true)) { -+ ++semaphore->waiters; -+ -+ /* for debugging lockup only, used by sysfs debug files */ -+ ring->last_semaphore_wait_addr = semaphore->gpu_addr; -+ return true; -+ } -+ return false; - } - --/* caller must hold ring lock */ -+/** -+ * radeon_semaphore_sync_to - use the semaphore to sync to a fence -+ * -+ * @semaphore: semaphore object to add fence to -+ * @fence: fence to sync to -+ * -+ * Sync to the fence using this semaphore object -+ */ -+void radeon_semaphore_sync_to(struct radeon_semaphore *semaphore, -+ struct radeon_fence *fence) -+{ -+ struct radeon_fence *other; -+ -+ if (!fence) -+ return; -+ -+ other = semaphore->sync_to[fence->ring]; -+ semaphore->sync_to[fence->ring] = radeon_fence_later(fence, other); -+} -+ -+/** -+ * radeon_semaphore_sync_rings - sync ring to all registered fences -+ * -+ * @rdev: radeon_device pointer -+ * @semaphore: semaphore object to use for sync -+ * @ring: ring that needs sync -+ * -+ * Ensure that all registered fences are signaled before letting -+ * the ring continue. The caller must hold the ring lock. -+ */ - int radeon_semaphore_sync_rings(struct radeon_device *rdev, - struct radeon_semaphore *semaphore, -- int signaler, int waiter) -+ int ring) - { -- int r; -+ int i, r; - -- /* no need to signal and wait on the same ring */ -- if (signaler == waiter) { -- return 0; -- } -+ for (i = 0; i < RADEON_NUM_RINGS; ++i) { -+ struct radeon_fence *fence = semaphore->sync_to[i]; - -- /* prevent GPU deadlocks */ -- if (!rdev->ring[signaler].ready) { -- dev_err(rdev->dev, "Trying to sync to a disabled ring!"); -- return -EINVAL; -- } -+ /* check if we really need to sync */ -+ if (!radeon_fence_need_sync(fence, ring)) -+ continue; - -- r = radeon_ring_alloc(rdev, &rdev->ring[signaler], 8); -- if (r) { -- return r; -- } -- radeon_semaphore_emit_signal(rdev, signaler, semaphore); -- radeon_ring_commit(rdev, &rdev->ring[signaler]); -+ /* prevent GPU deadlocks */ -+ if (!rdev->ring[i].ready) { -+ dev_err(rdev->dev, "Syncing to a disabled ring!"); -+ return -EINVAL; -+ } - -- /* we assume caller has already allocated space on waiters ring */ -- radeon_semaphore_emit_wait(rdev, waiter, semaphore); -+ /* allocate enough space for sync command */ -+ r = radeon_ring_alloc(rdev, &rdev->ring[i], 16); -+ if (r) { -+ return r; -+ } - -- /* for debugging lockup only, used by sysfs debug files */ -- rdev->ring[signaler].last_semaphore_signal_addr = semaphore->gpu_addr; -- rdev->ring[waiter].last_semaphore_wait_addr = semaphore->gpu_addr; -+ /* emit the signal semaphore */ -+ if (!radeon_semaphore_emit_signal(rdev, i, semaphore)) { -+ /* signaling wasn't successful wait manually */ -+ radeon_ring_undo(&rdev->ring[i]); -+ radeon_fence_wait_locked(fence); -+ continue; -+ } -+ -+ /* we assume caller has already allocated space on waiters ring */ -+ if (!radeon_semaphore_emit_wait(rdev, ring, semaphore)) { -+ /* waiting wasn't successful wait manually */ -+ radeon_ring_undo(&rdev->ring[i]); -+ radeon_fence_wait_locked(fence); -+ continue; -+ } -+ -+ radeon_ring_commit(rdev, &rdev->ring[i]); -+ radeon_fence_note_sync(fence, ring); -+ } - - return 0; - } -diff --git a/drivers/gpu/drm/radeon/rv770_dma.c b/drivers/gpu/drm/radeon/rv770_dma.c -index f9b02e3..aca8cbe 100644 ---- a/drivers/gpu/drm/radeon/rv770_dma.c -+++ b/drivers/gpu/drm/radeon/rv770_dma.c -@@ -66,13 +66,8 @@ int rv770_copy_dma(struct radeon_device *rdev, - return r; - } - -- if (radeon_fence_need_sync(*fence, ring->idx)) { -- radeon_semaphore_sync_rings(rdev, sem, (*fence)->ring, -- ring->idx); -- radeon_fence_note_sync(*fence, ring->idx); -- } else { -- radeon_semaphore_free(rdev, &sem, NULL); -- } -+ radeon_semaphore_sync_to(sem, *fence); -+ radeon_semaphore_sync_rings(rdev, sem, ring->idx); - - for (i = 0; i < num_loops; i++) { - cur_size_in_dw = size_in_dw; -diff --git a/drivers/gpu/drm/radeon/si_dma.c b/drivers/gpu/drm/radeon/si_dma.c -index 17205fd..97af34c 100644 ---- a/drivers/gpu/drm/radeon/si_dma.c -+++ b/drivers/gpu/drm/radeon/si_dma.c -@@ -202,13 +202,8 @@ int si_copy_dma(struct radeon_device *rdev, - return r; - } - -- if (radeon_fence_need_sync(*fence, ring->idx)) { -- radeon_semaphore_sync_rings(rdev, sem, (*fence)->ring, -- ring->idx); -- radeon_fence_note_sync(*fence, ring->idx); -- } else { -- radeon_semaphore_free(rdev, &sem, NULL); -- } -+ radeon_semaphore_sync_to(sem, *fence); -+ radeon_semaphore_sync_rings(rdev, sem, ring->idx); - - for (i = 0; i < num_loops; i++) { - cur_size_in_bytes = size_in_bytes; -diff --git a/drivers/gpu/drm/radeon/uvd_v1_0.c b/drivers/gpu/drm/radeon/uvd_v1_0.c -index 7266805..d4a68af 100644 ---- a/drivers/gpu/drm/radeon/uvd_v1_0.c -+++ b/drivers/gpu/drm/radeon/uvd_v1_0.c -@@ -357,7 +357,7 @@ int uvd_v1_0_ring_test(struct radeon_device *rdev, struct radeon_ring *ring) - * - * Emit a semaphore command (either wait or signal) to the UVD ring. - */ --void uvd_v1_0_semaphore_emit(struct radeon_device *rdev, -+bool uvd_v1_0_semaphore_emit(struct radeon_device *rdev, - struct radeon_ring *ring, - struct radeon_semaphore *semaphore, - bool emit_wait) -@@ -372,6 +372,8 @@ void uvd_v1_0_semaphore_emit(struct radeon_device *rdev, - - radeon_ring_write(ring, PACKET0(UVD_SEMA_CMD, 0)); - radeon_ring_write(ring, emit_wait ? 1 : 0); -+ -+ return true; - } - - /** -diff --git a/drivers/gpu/drm/radeon/uvd_v3_1.c b/drivers/gpu/drm/radeon/uvd_v3_1.c -index 5b6fa1f..d722db2 100644 ---- a/drivers/gpu/drm/radeon/uvd_v3_1.c -+++ b/drivers/gpu/drm/radeon/uvd_v3_1.c -@@ -37,7 +37,7 @@ - * - * Emit a semaphore command (either wait or signal) to the UVD ring. - */ --void uvd_v3_1_semaphore_emit(struct radeon_device *rdev, -+bool uvd_v3_1_semaphore_emit(struct radeon_device *rdev, - struct radeon_ring *ring, - struct radeon_semaphore *semaphore, - bool emit_wait) -@@ -52,4 +52,6 @@ void uvd_v3_1_semaphore_emit(struct radeon_device *rdev, - - radeon_ring_write(ring, PACKET0(UVD_SEMA_CMD, 0)); - radeon_ring_write(ring, 0x80 | (emit_wait ? 1 : 0)); -+ -+ return true; - } --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0005-yocto-amd-drm-radeon-improve-ring-debugfs-a-bit.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0005-yocto-amd-drm-radeon-improve-ring-debugfs-a-bit.patch deleted file mode 100644 index b46ce725..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0005-yocto-amd-drm-radeon-improve-ring-debugfs-a-bit.patch +++ /dev/null @@ -1,93 +0,0 @@ -From e628d1bcf988fe77d8b040d00c97eb20645758ab Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Tue, 12 Nov 2013 10:55:12 -0700 -Subject: [PATCH 05/44] drm/radeon: improve ring debugfs a bit -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Christian König <christian.koenig@amd.com> ---- - drivers/gpu/drm/radeon/radeon_ring.c | 56 +++++++++++++++++++++++----------- - 1 file changed, 38 insertions(+), 18 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c -index 9214403..f1cec22 100644 ---- a/drivers/gpu/drm/radeon/radeon_ring.c -+++ b/drivers/gpu/drm/radeon/radeon_ring.c -@@ -790,34 +790,54 @@ static int radeon_debugfs_ring_info(struct seq_file *m, void *data) - struct radeon_device *rdev = dev->dev_private; - int ridx = *(int*)node->info_ent->data; - struct radeon_ring *ring = &rdev->ring[ridx]; -+ -+ uint32_t rptr, wptr, rptr_next; - unsigned count, i, j; -- u32 tmp; - - radeon_ring_free_size(rdev, ring); - count = (ring->ring_size / 4) - ring->ring_free_dw; -- tmp = radeon_ring_get_wptr(rdev, ring); -- seq_printf(m, "wptr(0x%04x): 0x%08x [%5d]\n", ring->wptr_reg, tmp, tmp); -- tmp = radeon_ring_get_rptr(rdev, ring); -- seq_printf(m, "rptr(0x%04x): 0x%08x [%5d]\n", ring->rptr_reg, tmp, tmp); -+ -+ wptr = radeon_ring_get_wptr(rdev, ring); -+ seq_printf(m, "wptr(0x%04x): 0x%08x [%5d]\n", -+ ring->wptr_reg, wptr, wptr); -+ -+ rptr = radeon_ring_get_rptr(rdev, ring); -+ seq_printf(m, "rptr(0x%04x): 0x%08x [%5d]\n", -+ ring->rptr_reg, rptr, rptr); -+ - if (ring->rptr_save_reg) { -- seq_printf(m, "rptr next(0x%04x): 0x%08x\n", ring->rptr_save_reg, -- RREG32(ring->rptr_save_reg)); -- } -- seq_printf(m, "driver's copy of the wptr: 0x%08x [%5d]\n", ring->wptr, ring->wptr); -- seq_printf(m, "driver's copy of the rptr: 0x%08x [%5d]\n", ring->rptr, ring->rptr); -- seq_printf(m, "last semaphore signal addr : 0x%016llx\n", ring->last_semaphore_signal_addr); -- seq_printf(m, "last semaphore wait addr : 0x%016llx\n", ring->last_semaphore_wait_addr); -+ rptr_next = RREG32(ring->rptr_save_reg); -+ seq_printf(m, "rptr next(0x%04x): 0x%08x [%5d]\n", -+ ring->rptr_save_reg, rptr_next, rptr_next); -+ } else -+ rptr_next = ~0; -+ -+ seq_printf(m, "driver's copy of the wptr: 0x%08x [%5d]\n", -+ ring->wptr, ring->wptr); -+ seq_printf(m, "driver's copy of the rptr: 0x%08x [%5d]\n", -+ ring->rptr, ring->rptr); -+ seq_printf(m, "last semaphore signal addr : 0x%016llx\n", -+ ring->last_semaphore_signal_addr); -+ seq_printf(m, "last semaphore wait addr : 0x%016llx\n", -+ ring->last_semaphore_wait_addr); - seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw); - seq_printf(m, "%u dwords in ring\n", count); -+ -+ if (!ring->ready) -+ return 0; -+ - /* print 8 dw before current rptr as often it's the last executed - * packet that is the root issue - */ -- i = (ring->rptr + ring->ptr_mask + 1 - 32) & ring->ptr_mask; -- if (ring->ready) { -- for (j = 0; j <= (count + 32); j++) { -- seq_printf(m, "r[%5d]=0x%08x\n", i, ring->ring[i]); -- i = (i + 1) & ring->ptr_mask; -- } -+ i = (rptr + ring->ptr_mask + 1 - 32) & ring->ptr_mask; -+ for (j = 0; j <= (count + 32); j++) { -+ seq_printf(m, "r[%5d]=0x%08x", i, ring->ring[i]); -+ if (rptr == i) -+ seq_puts(m, " *"); -+ if (rptr_next == i) -+ seq_puts(m, " #"); -+ seq_puts(m, "\n"); -+ i = (i + 1) & ring->ptr_mask; - } - return 0; - } --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0006-yocto-amd-drm-radeon-report-the-real-offset-in-radeon_sa_bo_du.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0006-yocto-amd-drm-radeon-report-the-real-offset-in-radeon_sa_bo_du.patch deleted file mode 100644 index 7ddaa18f..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0006-yocto-amd-drm-radeon-report-the-real-offset-in-radeon_sa_bo_du.patch +++ /dev/null @@ -1,39 +0,0 @@ -From cf27c1b111dd09e7f55feb28de6d8f80fd28fd67 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Tue, 10 Dec 2013 12:46:23 -0700 -Subject: [PATCH 06/44] drm/radeon: report the real offset in - radeon_sa_bo_dump_debug_info -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Christian König <christian.koenig@amd.com> ---- - drivers/gpu/drm/radeon/radeon_sa.c | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/radeon_sa.c b/drivers/gpu/drm/radeon/radeon_sa.c -index f0bac68..c062580 100644 ---- a/drivers/gpu/drm/radeon/radeon_sa.c -+++ b/drivers/gpu/drm/radeon/radeon_sa.c -@@ -402,13 +402,15 @@ void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager, - - spin_lock(&sa_manager->wq.lock); - list_for_each_entry(i, &sa_manager->olist, olist) { -+ uint64_t soffset = i->soffset + sa_manager->gpu_addr; -+ uint64_t eoffset = i->eoffset + sa_manager->gpu_addr; - if (&i->olist == sa_manager->hole) { - seq_printf(m, ">"); - } else { - seq_printf(m, " "); - } -- seq_printf(m, "[0x%08x 0x%08x] size %8d", -- i->soffset, i->eoffset, i->eoffset - i->soffset); -+ seq_printf(m, "[0x%010llx 0x%010llx] size %8lld", -+ soffset, eoffset, eoffset - soffset); - if (i->fence) { - seq_printf(m, " protected by 0x%016llx on ring %d", - i->fence->seq, i->fence->ring); --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0007-yocto-amd-drm-radeon-update-fence-values-in-before-reporting-t.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0007-yocto-amd-drm-radeon-update-fence-values-in-before-reporting-t.patch deleted file mode 100644 index ebc32a16..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0007-yocto-amd-drm-radeon-update-fence-values-in-before-reporting-t.patch +++ /dev/null @@ -1,30 +0,0 @@ -From c6c27a74ed822d853de89e5d1360b983906e35aa Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Tue, 10 Dec 2013 12:48:45 -0700 -Subject: [PATCH 07/44] drm/radeon: update fence values in before reporting - them -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Christian König <christian.koenig@amd.com> ---- - drivers/gpu/drm/radeon/radeon_fence.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c -index 8aea16e..51760b7 100644 ---- a/drivers/gpu/drm/radeon/radeon_fence.c -+++ b/drivers/gpu/drm/radeon/radeon_fence.c -@@ -945,6 +945,8 @@ static int radeon_debugfs_fence_info(struct seq_file *m, void *data) - if (!rdev->fence_drv[i].initialized) - continue; - -+ radeon_fence_process(rdev, i); -+ - seq_printf(m, "--- ring %d ---\n", i); - seq_printf(m, "Last signaled fence 0x%016llx\n", - (unsigned long long)atomic64_read(&rdev->fence_drv[i].last_seq)); --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0008-yocto-amd-drm-radeon-cleanup-radeon_ttm-debugfs-handling.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0008-yocto-amd-drm-radeon-cleanup-radeon_ttm-debugfs-handling.patch deleted file mode 100644 index bb62cdb6..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0008-yocto-amd-drm-radeon-cleanup-radeon_ttm-debugfs-handling.patch +++ /dev/null @@ -1,109 +0,0 @@ -From d1ed06d2f21d3e7b407e4b32739472b7210c95ed Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Mon, 9 Dec 2013 06:50:21 -0700 -Subject: [PATCH 08/44] drm/radeon: cleanup radeon_ttm debugfs handling -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Otherwise we not necessary export the right information. - -Signed-off-by: Christian König <christian.koenig@amd.com> ---- - drivers/gpu/drm/radeon/radeon_ttm.c | 59 ++++++++++++++--------------------- - 1 file changed, 23 insertions(+), 36 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c -index 71245d6..a2d6c4f 100644 ---- a/drivers/gpu/drm/radeon/radeon_ttm.c -+++ b/drivers/gpu/drm/radeon/radeon_ttm.c -@@ -832,16 +832,15 @@ int radeon_mmap(struct file *filp, struct vm_area_struct *vma) - return 0; - } - -- --#define RADEON_DEBUGFS_MEM_TYPES 2 -- - #if defined(CONFIG_DEBUG_FS) -+ - static int radeon_mm_dump_table(struct seq_file *m, void *data) - { - struct drm_info_node *node = (struct drm_info_node *)m->private; -- struct drm_mm *mm = (struct drm_mm *)node->info_ent->data; -+ unsigned ttm_pl = *(int *)node->info_ent->data; - struct drm_device *dev = node->minor->dev; - struct radeon_device *rdev = dev->dev_private; -+ struct drm_mm *mm = (struct drm_mm *)rdev->mman.bdev.man[ttm_pl].priv; - int ret; - struct ttm_bo_global *glob = rdev->mman.bdev.glob; - -@@ -850,46 +849,34 @@ static int radeon_mm_dump_table(struct seq_file *m, void *data) - spin_unlock(&glob->lru_lock); - return ret; - } -+ -+static int ttm_pl_vram = TTM_PL_VRAM; -+static int ttm_pl_tt = TTM_PL_TT; -+ -+static struct drm_info_list radeon_ttm_debugfs_list[] = { -+ {"radeon_vram_mm", radeon_mm_dump_table, 0, &ttm_pl_vram}, -+ {"radeon_gtt_mm", radeon_mm_dump_table, 0, &ttm_pl_tt}, -+ {"ttm_page_pool", ttm_page_alloc_debugfs, 0, NULL}, -+#ifdef CONFIG_SWIOTLB -+ {"ttm_dma_page_pool", ttm_dma_page_alloc_debugfs, 0, NULL} -+#endif -+}; -+ - #endif - - static int radeon_ttm_debugfs_init(struct radeon_device *rdev) - { - #if defined(CONFIG_DEBUG_FS) -- static struct drm_info_list radeon_mem_types_list[RADEON_DEBUGFS_MEM_TYPES+2]; -- static char radeon_mem_types_names[RADEON_DEBUGFS_MEM_TYPES+2][32]; -- unsigned i; -+ unsigned count = ARRAY_SIZE(radeon_ttm_debugfs_list); - -- for (i = 0; i < RADEON_DEBUGFS_MEM_TYPES; i++) { -- if (i == 0) -- sprintf(radeon_mem_types_names[i], "radeon_vram_mm"); -- else -- sprintf(radeon_mem_types_names[i], "radeon_gtt_mm"); -- radeon_mem_types_list[i].name = radeon_mem_types_names[i]; -- radeon_mem_types_list[i].show = &radeon_mm_dump_table; -- radeon_mem_types_list[i].driver_features = 0; -- if (i == 0) -- radeon_mem_types_list[i].data = rdev->mman.bdev.man[TTM_PL_VRAM].priv; -- else -- radeon_mem_types_list[i].data = rdev->mman.bdev.man[TTM_PL_TT].priv; -- -- } -- /* Add ttm page pool to debugfs */ -- sprintf(radeon_mem_types_names[i], "ttm_page_pool"); -- radeon_mem_types_list[i].name = radeon_mem_types_names[i]; -- radeon_mem_types_list[i].show = &ttm_page_alloc_debugfs; -- radeon_mem_types_list[i].driver_features = 0; -- radeon_mem_types_list[i++].data = NULL; - #ifdef CONFIG_SWIOTLB -- if (swiotlb_nr_tbl()) { -- sprintf(radeon_mem_types_names[i], "ttm_dma_page_pool"); -- radeon_mem_types_list[i].name = radeon_mem_types_names[i]; -- radeon_mem_types_list[i].show = &ttm_dma_page_alloc_debugfs; -- radeon_mem_types_list[i].driver_features = 0; -- radeon_mem_types_list[i++].data = NULL; -- } -+ if (!swiotlb_nr_tbl()) -+ --count; - #endif -- return radeon_debugfs_add_files(rdev, radeon_mem_types_list, i); - --#endif -+ return radeon_debugfs_add_files(rdev, radeon_ttm_debugfs_list, count); -+#else -+ - return 0; -+#endif - } --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0009-yocto-amd-drm-radeon-add-VRAM-debugfs-access-v3.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0009-yocto-amd-drm-radeon-add-VRAM-debugfs-access-v3.patch deleted file mode 100644 index c8788bd6..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0009-yocto-amd-drm-radeon-add-VRAM-debugfs-access-v3.patch +++ /dev/null @@ -1,168 +0,0 @@ -From c100632a7a63c7cc03b7c4ad391477c919c61666 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Tue, 10 Dec 2013 07:45:24 -0700 -Subject: [PATCH 09/44] drm/radeon: add VRAM debugfs access v3 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Not very fast, but makes it possible to access even the -normally inaccessible parts of VRAM from userspace. - -v2: use MM_INDEX_HI for >2GB mem access, add default_llseek -v3: set inode size in the open callback - -Signed-off-by: Christian König <christian.koenig@amd.com> ---- - drivers/gpu/drm/radeon/evergreen_reg.h | 1 + - drivers/gpu/drm/radeon/radeon.h | 4 ++ - drivers/gpu/drm/radeon/radeon_ttm.c | 77 +++++++++++++++++++++++++++++++- - 3 files changed, 81 insertions(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/radeon/evergreen_reg.h b/drivers/gpu/drm/radeon/evergreen_reg.h -index 8a4e641..a0f63ff 100644 ---- a/drivers/gpu/drm/radeon/evergreen_reg.h -+++ b/drivers/gpu/drm/radeon/evergreen_reg.h -@@ -33,6 +33,7 @@ - #define EVERGREEN_PIF_PHY0_DATA 0xc - #define EVERGREEN_PIF_PHY1_INDEX 0x10 - #define EVERGREEN_PIF_PHY1_DATA 0x14 -+#define EVERGREEN_MM_INDEX_HI 0x18 - - #define EVERGREEN_VGA_MEMORY_BASE_ADDRESS 0x310 - #define EVERGREEN_VGA_MEMORY_BASE_ADDRESS_HIGH 0x324 -diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h -index c0d4230..14df551 100644 ---- a/drivers/gpu/drm/radeon/radeon.h -+++ b/drivers/gpu/drm/radeon/radeon.h -@@ -413,6 +413,10 @@ struct radeon_mman { - struct ttm_bo_device bdev; - bool mem_global_referenced; - bool initialized; -+ -+#if defined(CONFIG_DEBUG_FS) -+ struct dentry *vram; -+#endif - }; - - /* bo virtual address in a specific vm */ -diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c -index a2d6c4f..83ef24d 100644 ---- a/drivers/gpu/drm/radeon/radeon_ttm.c -+++ b/drivers/gpu/drm/radeon/radeon_ttm.c -@@ -39,12 +39,14 @@ - #include <linux/seq_file.h> - #include <linux/slab.h> - #include <linux/swiotlb.h> -+#include <linux/debugfs.h> - #include "radeon_reg.h" - #include "radeon.h" - - #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) - - static int radeon_ttm_debugfs_init(struct radeon_device *rdev); -+static void radeon_ttm_debugfs_fini(struct radeon_device *rdev); - - static struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev) - { -@@ -753,6 +755,7 @@ void radeon_ttm_fini(struct radeon_device *rdev) - - if (!rdev->mman.initialized) - return; -+ radeon_ttm_debugfs_fini(rdev); - if (rdev->stollen_vga_memory) { - r = radeon_bo_reserve(rdev->stollen_vga_memory, false); - if (r == 0) { -@@ -862,12 +865,75 @@ static struct drm_info_list radeon_ttm_debugfs_list[] = { - #endif - }; - -+static int radeon_ttm_vram_open(struct inode *inode, struct file *filep) -+{ -+ struct radeon_device *rdev = inode->i_private; -+ i_size_write(inode, rdev->mc.mc_vram_size); -+ filep->private_data = inode->i_private; -+ return 0; -+} -+ -+static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf, -+ size_t size, loff_t *pos) -+{ -+ struct radeon_device *rdev = f->private_data; -+ ssize_t result = 0; -+ int r; -+ -+ if (size & 0x3 || *pos & 0x3) -+ return -EINVAL; -+ -+ while (size) { -+ unsigned long flags; -+ uint32_t value; -+ -+ if (*pos >= rdev->mc.mc_vram_size) -+ return result; -+ -+ spin_lock_irqsave(&rdev->mmio_idx_lock, flags); -+ WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000); -+ if (rdev->family >= CHIP_CEDAR) -+ WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31); -+ value = RREG32(RADEON_MM_DATA); -+ spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags); -+ -+ r = put_user(value, (uint32_t *)buf); -+ if (r) -+ return r; -+ -+ result += 4; -+ buf += 4; -+ *pos += 4; -+ size -= 4; -+ } -+ -+ return result; -+} -+ -+static const struct file_operations radeon_ttm_vram_fops = { -+ .owner = THIS_MODULE, -+ .open = radeon_ttm_vram_open, -+ .read = radeon_ttm_vram_read, -+ .llseek = default_llseek -+}; -+ - #endif - - static int radeon_ttm_debugfs_init(struct radeon_device *rdev) - { - #if defined(CONFIG_DEBUG_FS) -- unsigned count = ARRAY_SIZE(radeon_ttm_debugfs_list); -+ unsigned count; -+ -+ struct drm_minor *minor = rdev->ddev->primary; -+ struct dentry *ent, *root = minor->debugfs_root; -+ -+ ent = debugfs_create_file("radeon_vram", S_IFREG | S_IRUGO, root, -+ rdev, &radeon_ttm_vram_fops); -+ if (IS_ERR(ent)) -+ return PTR_ERR(ent); -+ rdev->mman.vram = ent; -+ -+ count = ARRAY_SIZE(radeon_ttm_debugfs_list); - - #ifdef CONFIG_SWIOTLB - if (!swiotlb_nr_tbl()) -@@ -880,3 +946,12 @@ static int radeon_ttm_debugfs_init(struct radeon_device *rdev) - return 0; - #endif - } -+ -+static void radeon_ttm_debugfs_fini(struct radeon_device *rdev) -+{ -+#if defined(CONFIG_DEBUG_FS) -+ -+ debugfs_remove(rdev->mman.vram); -+ rdev->mman.vram = NULL; -+#endif -+} --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0010-yocto-amd-drm-radeon-add-GART-debugfs-access-v3.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0010-yocto-amd-drm-radeon-add-GART-debugfs-access-v3.patch deleted file mode 100644 index 5cabdf25..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0010-yocto-amd-drm-radeon-add-GART-debugfs-access-v3.patch +++ /dev/null @@ -1,119 +0,0 @@ -From ee6e4aae828077d7503a2baf5acb54df222fa922 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Wed, 11 Dec 2013 06:13:22 -0700 -Subject: [PATCH 10/44] drm/radeon: add GART debugfs access v3 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -v2: add default_llseek -v3: set inode size in the open callback - -Signed-off-by: Christian König <christian.koenig@amd.com> ---- - drivers/gpu/drm/radeon/radeon.h | 1 + - drivers/gpu/drm/radeon/radeon_ttm.c | 63 +++++++++++++++++++++++++++++++++++ - 2 files changed, 64 insertions(+) - -diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h -index 14df551..7a483c9 100644 ---- a/drivers/gpu/drm/radeon/radeon.h -+++ b/drivers/gpu/drm/radeon/radeon.h -@@ -416,6 +416,7 @@ struct radeon_mman { - - #if defined(CONFIG_DEBUG_FS) - struct dentry *vram; -+ struct dentry *gtt; - #endif - }; - -diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c -index 83ef24d..381782d 100644 ---- a/drivers/gpu/drm/radeon/radeon_ttm.c -+++ b/drivers/gpu/drm/radeon/radeon_ttm.c -@@ -917,6 +917,60 @@ static const struct file_operations radeon_ttm_vram_fops = { - .llseek = default_llseek - }; - -+static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep) -+{ -+ struct radeon_device *rdev = inode->i_private; -+ i_size_write(inode, rdev->mc.gtt_size); -+ filep->private_data = inode->i_private; -+ return 0; -+} -+ -+static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf, -+ size_t size, loff_t *pos) -+{ -+ struct radeon_device *rdev = f->private_data; -+ ssize_t result = 0; -+ int r; -+ -+ while (size) { -+ loff_t p = *pos / PAGE_SIZE; -+ unsigned off = *pos & ~PAGE_MASK; -+ ssize_t cur_size = min(size, PAGE_SIZE - off); -+ struct page *page; -+ void *ptr; -+ -+ if (p >= rdev->gart.num_cpu_pages) -+ return result; -+ -+ page = rdev->gart.pages[p]; -+ if (page) { -+ ptr = kmap(page); -+ ptr += off; -+ -+ r = copy_to_user(buf, ptr, cur_size); -+ kunmap(rdev->gart.pages[p]); -+ } else -+ r = clear_user(buf, cur_size); -+ -+ if (r) -+ return -EFAULT; -+ -+ result += cur_size; -+ buf += cur_size; -+ *pos += cur_size; -+ size -= cur_size; -+ } -+ -+ return result; -+} -+ -+static const struct file_operations radeon_ttm_gtt_fops = { -+ .owner = THIS_MODULE, -+ .open = radeon_ttm_gtt_open, -+ .read = radeon_ttm_gtt_read, -+ .llseek = default_llseek -+}; -+ - #endif - - static int radeon_ttm_debugfs_init(struct radeon_device *rdev) -@@ -933,6 +987,12 @@ static int radeon_ttm_debugfs_init(struct radeon_device *rdev) - return PTR_ERR(ent); - rdev->mman.vram = ent; - -+ ent = debugfs_create_file("radeon_gtt", S_IFREG | S_IRUGO, root, -+ rdev, &radeon_ttm_gtt_fops); -+ if (IS_ERR(ent)) -+ return PTR_ERR(ent); -+ rdev->mman.gtt = ent; -+ - count = ARRAY_SIZE(radeon_ttm_debugfs_list); - - #ifdef CONFIG_SWIOTLB -@@ -953,5 +1013,8 @@ static void radeon_ttm_debugfs_fini(struct radeon_device *rdev) - - debugfs_remove(rdev->mman.vram); - rdev->mman.vram = NULL; -+ -+ debugfs_remove(rdev->mman.gtt); -+ rdev->mman.gtt = NULL; - #endif - } --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0011-yocto-amd-drm-radeon-fix-VMID-use-tracking.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0011-yocto-amd-drm-radeon-fix-VMID-use-tracking.patch deleted file mode 100644 index 40486c39..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0011-yocto-amd-drm-radeon-fix-VMID-use-tracking.patch +++ /dev/null @@ -1,71 +0,0 @@ -From cdf069ae98745bb458f38ec7267fe80a544ddee1 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Sat, 14 Dec 2013 10:02:57 -0700 -Subject: [PATCH 11/44] drm/radeon: fix VMID use tracking -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Otherwise we allocate a new VMID on nearly every submit. - -Signed-off-by: Christian König <christian.koenig@amd.com> ---- - drivers/gpu/drm/radeon/radeon.h | 2 ++ - drivers/gpu/drm/radeon/radeon_gart.c | 8 +++++++- - 2 files changed, 9 insertions(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h -index 7a483c9..a21b1d4 100644 ---- a/drivers/gpu/drm/radeon/radeon.h -+++ b/drivers/gpu/drm/radeon/radeon.h -@@ -857,6 +857,8 @@ struct radeon_vm { - struct radeon_fence *fence; - /* last flush or NULL if we still need to flush */ - struct radeon_fence *last_flush; -+ /* last use of vmid */ -+ struct radeon_fence *last_id_use; - }; - - struct radeon_vm_manager { -diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c -index f8d7b16..cdab083 100644 ---- a/drivers/gpu/drm/radeon/radeon_gart.c -+++ b/drivers/gpu/drm/radeon/radeon_gart.c -@@ -688,7 +688,7 @@ struct radeon_fence *radeon_vm_grab_id(struct radeon_device *rdev, - unsigned i; - - /* check if the id is still valid */ -- if (vm->fence && vm->fence == rdev->vm_manager.active[vm->id]) -+ if (vm->last_id_use && vm->last_id_use == rdev->vm_manager.active[vm->id]) - return NULL; - - /* we definately need to flush */ -@@ -743,6 +743,9 @@ void radeon_vm_fence(struct radeon_device *rdev, - - radeon_fence_unref(&vm->fence); - vm->fence = radeon_fence_ref(fence); -+ -+ radeon_fence_unref(&vm->last_id_use); -+ vm->last_id_use = radeon_fence_ref(fence); - } - - /** -@@ -1246,6 +1249,8 @@ void radeon_vm_init(struct radeon_device *rdev, struct radeon_vm *vm) - { - vm->id = 0; - vm->fence = NULL; -+ vm->last_flush = NULL; -+ vm->last_id_use = NULL; - mutex_init(&vm->mutex); - INIT_LIST_HEAD(&vm->list); - INIT_LIST_HEAD(&vm->va); -@@ -1284,5 +1289,6 @@ void radeon_vm_fini(struct radeon_device *rdev, struct radeon_vm *vm) - } - radeon_fence_unref(&vm->fence); - radeon_fence_unref(&vm->last_flush); -+ radeon_fence_unref(&vm->last_id_use); - mutex_unlock(&vm->mutex); - } --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0012-yocto-amd-drm-radeon-add-missing-trace-point.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0012-yocto-amd-drm-radeon-add-missing-trace-point.patch deleted file mode 100644 index f6f82bba..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0012-yocto-amd-drm-radeon-add-missing-trace-point.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 6674c82f2a3cb9da12768e3670a814e84f9e54cc Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Sat, 14 Dec 2013 04:11:08 -0700 -Subject: [PATCH 12/44] drm/radeon: add missing trace point -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Christian König <christian.koenig@amd.com> ---- - drivers/gpu/drm/radeon/radeon_gart.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c -index cdab083..d1077f6 100644 ---- a/drivers/gpu/drm/radeon/radeon_gart.c -+++ b/drivers/gpu/drm/radeon/radeon_gart.c -@@ -701,6 +701,7 @@ struct radeon_fence *radeon_vm_grab_id(struct radeon_device *rdev, - if (fence == NULL) { - /* found a free one */ - vm->id = i; -+ trace_radeon_vm_grab_id(vm->id, ring); - return NULL; - } - --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0013-yocto-amd-drm-radeon-add-semaphore-trace-point.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0013-yocto-amd-drm-radeon-add-semaphore-trace-point.patch deleted file mode 100644 index b63f8c9a..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0013-yocto-amd-drm-radeon-add-semaphore-trace-point.patch +++ /dev/null @@ -1,95 +0,0 @@ -From e5798e4519e07f3f0c6077a6f5dd2e9223d01f85 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Thu, 7 Nov 2013 05:32:33 -0700 -Subject: [PATCH 13/44] drm/radeon: add semaphore trace point -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Christian König <christian.koenig@amd.com> ---- - drivers/gpu/drm/radeon/radeon_semaphore.c | 6 ++++- - drivers/gpu/drm/radeon/radeon_trace.h | 36 +++++++++++++++++++++++++++++ - 2 files changed, 41 insertions(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/radeon/radeon_semaphore.c b/drivers/gpu/drm/radeon/radeon_semaphore.c -index 34ea889..2b42aa1 100644 ---- a/drivers/gpu/drm/radeon/radeon_semaphore.c -+++ b/drivers/gpu/drm/radeon/radeon_semaphore.c -@@ -29,7 +29,7 @@ - */ - #include <drm/drmP.h> - #include "radeon.h" -- -+#include "radeon_trace.h" - - int radeon_semaphore_create(struct radeon_device *rdev, - struct radeon_semaphore **semaphore) -@@ -62,6 +62,8 @@ bool radeon_semaphore_emit_signal(struct radeon_device *rdev, int ridx, - { - struct radeon_ring *ring = &rdev->ring[ridx]; - -+ trace_radeon_semaphore_signale(ridx, semaphore); -+ - if (radeon_semaphore_ring_emit(rdev, ridx, ring, semaphore, false)) { - --semaphore->waiters; - -@@ -77,6 +79,8 @@ bool radeon_semaphore_emit_wait(struct radeon_device *rdev, int ridx, - { - struct radeon_ring *ring = &rdev->ring[ridx]; - -+ trace_radeon_semaphore_wait(ridx, semaphore); -+ - if (radeon_semaphore_ring_emit(rdev, ridx, ring, semaphore, true)) { - ++semaphore->waiters; - -diff --git a/drivers/gpu/drm/radeon/radeon_trace.h b/drivers/gpu/drm/radeon/radeon_trace.h -index 811bca6..9f0e181 100644 ---- a/drivers/gpu/drm/radeon/radeon_trace.h -+++ b/drivers/gpu/drm/radeon/radeon_trace.h -@@ -111,6 +111,42 @@ DEFINE_EVENT(radeon_fence_request, radeon_fence_wait_end, - TP_ARGS(dev, seqno) - ); - -+DECLARE_EVENT_CLASS(radeon_semaphore_request, -+ -+ TP_PROTO(int ring, struct radeon_semaphore *sem), -+ -+ TP_ARGS(ring, sem), -+ -+ TP_STRUCT__entry( -+ __field(int, ring) -+ __field(signed, waiters) -+ __field(uint64_t, gpu_addr) -+ ), -+ -+ TP_fast_assign( -+ __entry->ring = ring; -+ __entry->waiters = sem->waiters; -+ __entry->gpu_addr = sem->gpu_addr; -+ ), -+ -+ TP_printk("ring=%u, waiters=%d, addr=%010Lx", __entry->ring, -+ __entry->waiters, __entry->gpu_addr) -+); -+ -+DEFINE_EVENT(radeon_semaphore_request, radeon_semaphore_signale, -+ -+ TP_PROTO(int ring, struct radeon_semaphore *sem), -+ -+ TP_ARGS(ring, sem) -+); -+ -+DEFINE_EVENT(radeon_semaphore_request, radeon_semaphore_wait, -+ -+ TP_PROTO(int ring, struct radeon_semaphore *sem), -+ -+ TP_ARGS(ring, sem) -+); -+ - #endif - - /* This part must be outside protection */ --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0014-yocto-amd-drm-radeon-add-VMID-allocation-trace-point.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0014-yocto-amd-drm-radeon-add-VMID-allocation-trace-point.patch deleted file mode 100644 index 4e230031..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0014-yocto-amd-drm-radeon-add-VMID-allocation-trace-point.patch +++ /dev/null @@ -1,64 +0,0 @@ -From 0a4a2069686234528f3e2c876a97bdd499062c2c Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Mon, 25 Nov 2013 15:42:10 +0100 -Subject: [PATCH 14/44] drm/radeon: add VMID allocation trace point -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Christian König <christian.koenig@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/radeon/radeon_gart.c | 2 ++ - drivers/gpu/drm/radeon/radeon_trace.h | 15 +++++++++++++++ - 2 files changed, 17 insertions(+) - -diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c -index d1077f6..f7c0b64 100644 ---- a/drivers/gpu/drm/radeon/radeon_gart.c -+++ b/drivers/gpu/drm/radeon/radeon_gart.c -@@ -29,6 +29,7 @@ - #include <drm/radeon_drm.h> - #include "radeon.h" - #include "radeon_reg.h" -+#include "radeon_trace.h" - - /* - * GART -@@ -714,6 +715,7 @@ struct radeon_fence *radeon_vm_grab_id(struct radeon_device *rdev, - for (i = 0; i < 2; ++i) { - if (choices[i]) { - vm->id = choices[i]; -+ trace_radeon_vm_grab_id(vm->id, ring); - return rdev->vm_manager.active[choices[i]]; - } - } -diff --git a/drivers/gpu/drm/radeon/radeon_trace.h b/drivers/gpu/drm/radeon/radeon_trace.h -index 9f0e181..8c13aec 100644 ---- a/drivers/gpu/drm/radeon/radeon_trace.h -+++ b/drivers/gpu/drm/radeon/radeon_trace.h -@@ -47,6 +47,21 @@ TRACE_EVENT(radeon_cs, - __entry->fences) - ); - -+TRACE_EVENT(radeon_vm_grab_id, -+ TP_PROTO(unsigned vmid, int ring), -+ TP_ARGS(vmid, ring), -+ TP_STRUCT__entry( -+ __field(u32, vmid) -+ __field(u32, ring) -+ ), -+ -+ TP_fast_assign( -+ __entry->vmid = vmid; -+ __entry->ring = ring; -+ ), -+ TP_printk("vmid=%u, ring=%u", __entry->vmid, __entry->ring) -+); -+ - TRACE_EVENT(radeon_vm_set_page, - TP_PROTO(uint64_t pe, uint64_t addr, unsigned count, - uint32_t incr, uint32_t flags), --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0015-yocto-amd-drm-radeon-add-uvd-debugfs-support.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0015-yocto-amd-drm-radeon-add-uvd-debugfs-support.patch deleted file mode 100644 index fd312353..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0015-yocto-amd-drm-radeon-add-uvd-debugfs-support.patch +++ /dev/null @@ -1,99 +0,0 @@ -From 627d32e67d83a65294cb9da1e7ef796009b0e5d8 Mon Sep 17 00:00:00 2001 -From: Leo Liu <leo.liu@amd.com> -Date: Mon, 25 Nov 2013 17:25:41 -0500 -Subject: [PATCH 15/44] drm/radeon: add uvd debugfs support - -Signed-off-by: Leo Liu <leo.liu@amd.com> ---- - drivers/gpu/drm/radeon/radeon.h | 1 + - drivers/gpu/drm/radeon/radeon_uvd.c | 37 +++++++++++++++++++++++++++++++++++ - 2 files changed, 38 insertions(+) - -diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h -index a21b1d4..b212569 100644 ---- a/drivers/gpu/drm/radeon/radeon.h -+++ b/drivers/gpu/drm/radeon/radeon.h -@@ -1549,6 +1549,7 @@ struct radeon_uvd { - struct drm_file *filp[RADEON_MAX_UVD_HANDLES]; - unsigned img_size[RADEON_MAX_UVD_HANDLES]; - struct delayed_work idle_work; -+ bool status; - }; - - int radeon_uvd_init(struct radeon_device *rdev); -diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c b/drivers/gpu/drm/radeon/radeon_uvd.c -index 1d029cc..2b502b4 100644 ---- a/drivers/gpu/drm/radeon/radeon_uvd.c -+++ b/drivers/gpu/drm/radeon/radeon_uvd.c -@@ -53,6 +53,7 @@ MODULE_FIRMWARE(FIRMWARE_TAHITI); - MODULE_FIRMWARE(FIRMWARE_BONAIRE); - - static void radeon_uvd_idle_work_handler(struct work_struct *work); -+static int radeon_debugfs_uvd_init(struct radeon_device *rdev); - - int radeon_uvd_init(struct radeon_device *rdev) - { -@@ -142,6 +143,10 @@ int radeon_uvd_init(struct radeon_device *rdev) - return r; - } - -+ r = radeon_debugfs_uvd_init(rdev); -+ if (r) -+ dev_err(rdev->dev, "(%d) Register debugfs file for uvd failed\n", r); -+ - radeon_bo_unreserve(rdev->uvd.vcpu_bo); - - for (i = 0; i < RADEON_MAX_UVD_HANDLES; ++i) { -@@ -785,6 +790,7 @@ static void radeon_uvd_idle_work_handler(struct work_struct *work) - schedule_delayed_work(&rdev->uvd.idle_work, - msecs_to_jiffies(UVD_IDLE_TIMEOUT_MS)); - } -+ rdev->uvd.status = false; - } - - void radeon_uvd_note_usage(struct radeon_device *rdev) -@@ -812,6 +818,7 @@ void radeon_uvd_note_usage(struct radeon_device *rdev) - } else { - radeon_set_uvd_clocks(rdev, 53300, 40000); - } -+ rdev->uvd.status = true; - } - } - -@@ -951,3 +958,33 @@ int radeon_uvd_send_upll_ctlreq(struct radeon_device *rdev, - - return 0; - } -+ -+/* -+ * Debugfs info -+ */ -+#if defined(CONFIG_DEBUG_FS) -+ -+static int radeon_debugfs_uvd_info(struct seq_file *m, void *data) -+{ -+ struct drm_info_node *node = (struct drm_info_node *) m->private; -+ struct drm_device *dev = node->minor->dev; -+ struct radeon_device *rdev = dev->dev_private; -+ -+ seq_printf(m, "UVD Status: %s\n", ((rdev->uvd.status) ? "Busy" : "Idle")); -+ -+ return 0; -+} -+ -+static struct drm_info_list radeon_uvd_info_list[] = { -+ {"radeon_uvd_info", radeon_debugfs_uvd_info, 0, NULL}, -+}; -+#endif -+ -+static int radeon_debugfs_uvd_init(struct radeon_device *rdev) -+{ -+#if defined(CONFIG_DEBUG_FS) -+ return radeon_debugfs_add_files(rdev, radeon_uvd_info_list, ARRAY_SIZE(radeon_uvd_info_list)); -+#else -+ return 0; -+#endif -+} --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0016-yocto-amd-drm-radeon-add-radeon_vm_bo_update-trace-point.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0016-yocto-amd-drm-radeon-add-radeon_vm_bo_update-trace-point.patch deleted file mode 100644 index 190b7b16..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0016-yocto-amd-drm-radeon-add-radeon_vm_bo_update-trace-point.patch +++ /dev/null @@ -1,138 +0,0 @@ -From b72be939a9ff7a33b0aa3ff3bd196ea016b8dce1 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Mon, 25 Nov 2013 15:42:11 +0100 -Subject: [PATCH 16/44] drm/radeon: add radeon_vm_bo_update trace point -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Also rename the function to better reflect what it is doing. - -agd5f: fix argument size warning - -Signed-off-by: Christian König <christian.koenig@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/radeon/radeon.h | 8 ++++---- - drivers/gpu/drm/radeon/radeon_cs.c | 4 ++-- - drivers/gpu/drm/radeon/radeon_gart.c | 14 ++++++++------ - drivers/gpu/drm/radeon/radeon_trace.h | 18 ++++++++++++++++++ - 4 files changed, 32 insertions(+), 12 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h -index b212569..37e619c 100644 ---- a/drivers/gpu/drm/radeon/radeon.h -+++ b/drivers/gpu/drm/radeon/radeon.h -@@ -2705,10 +2705,10 @@ void radeon_vm_fence(struct radeon_device *rdev, - struct radeon_vm *vm, - struct radeon_fence *fence); - uint64_t radeon_vm_map_gart(struct radeon_device *rdev, uint64_t addr); --int radeon_vm_bo_update_pte(struct radeon_device *rdev, -- struct radeon_vm *vm, -- struct radeon_bo *bo, -- struct ttm_mem_reg *mem); -+int radeon_vm_bo_update(struct radeon_device *rdev, -+ struct radeon_vm *vm, -+ struct radeon_bo *bo, -+ struct ttm_mem_reg *mem); - void radeon_vm_bo_invalidate(struct radeon_device *rdev, - struct radeon_bo *bo); - struct radeon_bo_va *radeon_vm_bo_find(struct radeon_vm *vm, -diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c -index eb5cd94..83731ff 100644 ---- a/drivers/gpu/drm/radeon/radeon_cs.c -+++ b/drivers/gpu/drm/radeon/radeon_cs.c -@@ -407,13 +407,13 @@ static int radeon_bo_vm_update_pte(struct radeon_cs_parser *parser, - struct radeon_bo *bo; - int r; - -- r = radeon_vm_bo_update_pte(rdev, vm, rdev->ring_tmp_bo.bo, &rdev->ring_tmp_bo.bo->tbo.mem); -+ r = radeon_vm_bo_update(rdev, vm, rdev->ring_tmp_bo.bo, &rdev->ring_tmp_bo.bo->tbo.mem); - if (r) { - return r; - } - list_for_each_entry(lobj, &parser->validated, tv.head) { - bo = lobj->bo; -- r = radeon_vm_bo_update_pte(parser->rdev, vm, bo, &bo->tbo.mem); -+ r = radeon_vm_bo_update(parser->rdev, vm, bo, &bo->tbo.mem); - if (r) { - return r; - } -diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c -index f7c0b64..33bd02e 100644 ---- a/drivers/gpu/drm/radeon/radeon_gart.c -+++ b/drivers/gpu/drm/radeon/radeon_gart.c -@@ -1071,7 +1071,7 @@ static void radeon_vm_update_ptes(struct radeon_device *rdev, - } - - /** -- * radeon_vm_bo_update_pte - map a bo into the vm page table -+ * radeon_vm_bo_update - map a bo into the vm page table - * - * @rdev: radeon_device pointer - * @vm: requested vm -@@ -1083,10 +1083,10 @@ static void radeon_vm_update_ptes(struct radeon_device *rdev, - * - * Object have to be reserved & global and local mutex must be locked! - */ --int radeon_vm_bo_update_pte(struct radeon_device *rdev, -- struct radeon_vm *vm, -- struct radeon_bo *bo, -- struct ttm_mem_reg *mem) -+int radeon_vm_bo_update(struct radeon_device *rdev, -+ struct radeon_vm *vm, -+ struct radeon_bo *bo, -+ struct ttm_mem_reg *mem) - { - unsigned ridx = rdev->asic->vm.pt_ring_index; - struct radeon_ib ib; -@@ -1132,6 +1132,8 @@ int radeon_vm_bo_update_pte(struct radeon_device *rdev, - bo_va->valid = false; - } - -+ trace_radeon_vm_bo_update(bo_va); -+ - nptes = radeon_bo_ngpu_pages(bo); - - /* assume two extra pdes in case the mapping overlaps the borders */ -@@ -1210,7 +1212,7 @@ int radeon_vm_bo_rmv(struct radeon_device *rdev, - mutex_lock(&rdev->vm_manager.lock); - mutex_lock(&bo_va->vm->mutex); - if (bo_va->soffset) { -- r = radeon_vm_bo_update_pte(rdev, bo_va->vm, bo_va->bo, NULL); -+ r = radeon_vm_bo_update(rdev, bo_va->vm, bo_va->bo, NULL); - } - mutex_unlock(&rdev->vm_manager.lock); - list_del(&bo_va->vm_list); -diff --git a/drivers/gpu/drm/radeon/radeon_trace.h b/drivers/gpu/drm/radeon/radeon_trace.h -index 8c13aec..0473257 100644 ---- a/drivers/gpu/drm/radeon/radeon_trace.h -+++ b/drivers/gpu/drm/radeon/radeon_trace.h -@@ -62,6 +62,24 @@ TRACE_EVENT(radeon_vm_grab_id, - TP_printk("vmid=%u, ring=%u", __entry->vmid, __entry->ring) - ); - -+TRACE_EVENT(radeon_vm_bo_update, -+ TP_PROTO(struct radeon_bo_va *bo_va), -+ TP_ARGS(bo_va), -+ TP_STRUCT__entry( -+ __field(u64, soffset) -+ __field(u64, eoffset) -+ __field(u32, flags) -+ ), -+ -+ TP_fast_assign( -+ __entry->soffset = bo_va->soffset; -+ __entry->eoffset = bo_va->eoffset; -+ __entry->flags = bo_va->flags; -+ ), -+ TP_printk("soffs=%010llx, eoffs=%010llx, flags=%08x", -+ __entry->soffset, __entry->eoffset, __entry->flags) -+); -+ - TRACE_EVENT(radeon_vm_set_page, - TP_PROTO(uint64_t pe, uint64_t addr, unsigned count, - uint32_t incr, uint32_t flags), --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0017-yocto-amd-drm-radeon-drop-CP-page-table-updates-cleanup-v2.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0017-yocto-amd-drm-radeon-drop-CP-page-table-updates-cleanup-v2.patch deleted file mode 100644 index 0f88bc76..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0017-yocto-amd-drm-radeon-drop-CP-page-table-updates-cleanup-v2.patch +++ /dev/null @@ -1,676 +0,0 @@ -From 6a98674d6cb42c43b6a5e9dd2719b52a50b9e489 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Wed, 30 Oct 2013 11:51:09 -0400 -Subject: [PATCH 17/44] drm/radeon: drop CP page table updates & cleanup v2 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The DMA ring seems to be stable now. - -v2: remove pt_ring_index as well - -Signed-off-by: Christian König <christian.koenig@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/radeon/cik.c | 56 ------------------------- - drivers/gpu/drm/radeon/cik_sdma.c | 21 ++++------ - drivers/gpu/drm/radeon/ni.c | 76 ---------------------------------- - drivers/gpu/drm/radeon/ni_dma.c | 18 ++++---- - drivers/gpu/drm/radeon/radeon.h | 8 +++- - drivers/gpu/drm/radeon/radeon_asic.c | 15 +++---- - drivers/gpu/drm/radeon/radeon_asic.h | 31 +++++++------- - drivers/gpu/drm/radeon/radeon_gart.c | 29 ++++++++++--- - drivers/gpu/drm/radeon/si.c | 60 --------------------------- - drivers/gpu/drm/radeon/si_dma.c | 21 ++++------ - 10 files changed, 73 insertions(+), 262 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c -index 0608446..d7e86ef3 100644 ---- a/drivers/gpu/drm/radeon/cik.c -+++ b/drivers/gpu/drm/radeon/cik.c -@@ -4825,62 +4825,6 @@ void cik_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) - } - } - --/** -- * cik_vm_set_page - update the page tables using sDMA -- * -- * @rdev: radeon_device pointer -- * @ib: indirect buffer to fill with commands -- * @pe: addr of the page entry -- * @addr: dst addr to write into pe -- * @count: number of page entries to update -- * @incr: increase next addr by incr bytes -- * @flags: access flags -- * -- * Update the page tables using CP or sDMA (CIK). -- */ --void cik_vm_set_page(struct radeon_device *rdev, -- struct radeon_ib *ib, -- uint64_t pe, -- uint64_t addr, unsigned count, -- uint32_t incr, uint32_t flags) --{ -- uint32_t r600_flags = cayman_vm_page_flags(rdev, flags); -- uint64_t value; -- unsigned ndw; -- -- if (rdev->asic->vm.pt_ring_index == RADEON_RING_TYPE_GFX_INDEX) { -- /* CP */ -- while (count) { -- ndw = 2 + count * 2; -- if (ndw > 0x3FFE) -- ndw = 0x3FFE; -- -- ib->ptr[ib->length_dw++] = PACKET3(PACKET3_WRITE_DATA, ndw); -- ib->ptr[ib->length_dw++] = (WRITE_DATA_ENGINE_SEL(0) | -- WRITE_DATA_DST_SEL(1)); -- ib->ptr[ib->length_dw++] = pe; -- ib->ptr[ib->length_dw++] = upper_32_bits(pe); -- for (; ndw > 2; ndw -= 2, --count, pe += 8) { -- if (flags & RADEON_VM_PAGE_SYSTEM) { -- value = radeon_vm_map_gart(rdev, addr); -- value &= 0xFFFFFFFFFFFFF000ULL; -- } else if (flags & RADEON_VM_PAGE_VALID) { -- value = addr; -- } else { -- value = 0; -- } -- addr += incr; -- value |= r600_flags; -- ib->ptr[ib->length_dw++] = value; -- ib->ptr[ib->length_dw++] = upper_32_bits(value); -- } -- } -- } else { -- /* DMA */ -- cik_sdma_vm_set_page(rdev, ib, pe, addr, count, incr, flags); -- } --} -- - /* - * RLC - * The RLC is a multi-purpose microengine that handles a -diff --git a/drivers/gpu/drm/radeon/cik_sdma.c b/drivers/gpu/drm/radeon/cik_sdma.c -index ace0bc6..8517a62 100644 ---- a/drivers/gpu/drm/radeon/cik_sdma.c -+++ b/drivers/gpu/drm/radeon/cik_sdma.c -@@ -646,13 +646,12 @@ void cik_sdma_vm_set_page(struct radeon_device *rdev, - uint64_t addr, unsigned count, - uint32_t incr, uint32_t flags) - { -- uint32_t r600_flags = cayman_vm_page_flags(rdev, flags); - uint64_t value; - unsigned ndw; - -- trace_radeon_vm_set_page(pe, addr, count, incr, r600_flags); -+ trace_radeon_vm_set_page(pe, addr, count, incr, flags); - -- if (flags & RADEON_VM_PAGE_SYSTEM) { -+ if (flags & R600_PTE_SYSTEM) { - while (count) { - ndw = count * 2; - if (ndw > 0xFFFFE) -@@ -664,16 +663,10 @@ void cik_sdma_vm_set_page(struct radeon_device *rdev, - ib->ptr[ib->length_dw++] = upper_32_bits(pe); - ib->ptr[ib->length_dw++] = ndw; - for (; ndw > 0; ndw -= 2, --count, pe += 8) { -- if (flags & RADEON_VM_PAGE_SYSTEM) { -- value = radeon_vm_map_gart(rdev, addr); -- value &= 0xFFFFFFFFFFFFF000ULL; -- } else if (flags & RADEON_VM_PAGE_VALID) { -- value = addr; -- } else { -- value = 0; -- } -+ value = radeon_vm_map_gart(rdev, addr); -+ value &= 0xFFFFFFFFFFFFF000ULL; - addr += incr; -- value |= r600_flags; -+ value |= flags; - ib->ptr[ib->length_dw++] = value; - ib->ptr[ib->length_dw++] = upper_32_bits(value); - } -@@ -684,7 +677,7 @@ void cik_sdma_vm_set_page(struct radeon_device *rdev, - if (ndw > 0x7FFFF) - ndw = 0x7FFFF; - -- if (flags & RADEON_VM_PAGE_VALID) -+ if (flags & R600_PTE_VALID) - value = addr; - else - value = 0; -@@ -692,7 +685,7 @@ void cik_sdma_vm_set_page(struct radeon_device *rdev, - ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_GENERATE_PTE_PDE, 0, 0); - ib->ptr[ib->length_dw++] = pe; /* dst addr */ - ib->ptr[ib->length_dw++] = upper_32_bits(pe); -- ib->ptr[ib->length_dw++] = r600_flags; /* mask */ -+ ib->ptr[ib->length_dw++] = flags; /* mask */ - ib->ptr[ib->length_dw++] = 0; - ib->ptr[ib->length_dw++] = value; /* value */ - ib->ptr[ib->length_dw++] = upper_32_bits(value); -diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c -index 954eb9a..f59a9e9 100644 ---- a/drivers/gpu/drm/radeon/ni.c -+++ b/drivers/gpu/drm/radeon/ni.c -@@ -174,11 +174,6 @@ extern void evergreen_pcie_gen2_enable(struct radeon_device *rdev); - extern void evergreen_program_aspm(struct radeon_device *rdev); - extern void sumo_rlc_fini(struct radeon_device *rdev); - extern int sumo_rlc_init(struct radeon_device *rdev); --extern void cayman_dma_vm_set_page(struct radeon_device *rdev, -- struct radeon_ib *ib, -- uint64_t pe, -- uint64_t addr, unsigned count, -- uint32_t incr, uint32_t flags); - - /* Firmware Names */ - MODULE_FIRMWARE("radeon/BARTS_pfp.bin"); -@@ -2412,77 +2407,6 @@ void cayman_vm_decode_fault(struct radeon_device *rdev, - block, mc_id); - } - --#define R600_ENTRY_VALID (1 << 0) --#define R600_PTE_SYSTEM (1 << 1) --#define R600_PTE_SNOOPED (1 << 2) --#define R600_PTE_READABLE (1 << 5) --#define R600_PTE_WRITEABLE (1 << 6) -- --uint32_t cayman_vm_page_flags(struct radeon_device *rdev, uint32_t flags) --{ -- uint32_t r600_flags = 0; -- r600_flags |= (flags & RADEON_VM_PAGE_VALID) ? R600_ENTRY_VALID : 0; -- r600_flags |= (flags & RADEON_VM_PAGE_READABLE) ? R600_PTE_READABLE : 0; -- r600_flags |= (flags & RADEON_VM_PAGE_WRITEABLE) ? R600_PTE_WRITEABLE : 0; -- if (flags & RADEON_VM_PAGE_SYSTEM) { -- r600_flags |= R600_PTE_SYSTEM; -- r600_flags |= (flags & RADEON_VM_PAGE_SNOOPED) ? R600_PTE_SNOOPED : 0; -- } -- return r600_flags; --} -- --/** -- * cayman_vm_set_page - update the page tables using the CP -- * -- * @rdev: radeon_device pointer -- * @ib: indirect buffer to fill with commands -- * @pe: addr of the page entry -- * @addr: dst addr to write into pe -- * @count: number of page entries to update -- * @incr: increase next addr by incr bytes -- * @flags: access flags -- * -- * Update the page tables using the CP (cayman/TN). -- */ --void cayman_vm_set_page(struct radeon_device *rdev, -- struct radeon_ib *ib, -- uint64_t pe, -- uint64_t addr, unsigned count, -- uint32_t incr, uint32_t flags) --{ -- uint32_t r600_flags = cayman_vm_page_flags(rdev, flags); -- uint64_t value; -- unsigned ndw; -- -- if (rdev->asic->vm.pt_ring_index == RADEON_RING_TYPE_GFX_INDEX) { -- while (count) { -- ndw = 1 + count * 2; -- if (ndw > 0x3FFF) -- ndw = 0x3FFF; -- -- ib->ptr[ib->length_dw++] = PACKET3(PACKET3_ME_WRITE, ndw); -- ib->ptr[ib->length_dw++] = pe; -- ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; -- for (; ndw > 1; ndw -= 2, --count, pe += 8) { -- if (flags & RADEON_VM_PAGE_SYSTEM) { -- value = radeon_vm_map_gart(rdev, addr); -- value &= 0xFFFFFFFFFFFFF000ULL; -- } else if (flags & RADEON_VM_PAGE_VALID) { -- value = addr; -- } else { -- value = 0; -- } -- addr += incr; -- value |= r600_flags; -- ib->ptr[ib->length_dw++] = value; -- ib->ptr[ib->length_dw++] = upper_32_bits(value); -- } -- } -- } else { -- cayman_dma_vm_set_page(rdev, ib, pe, addr, count, incr, flags); -- } --} -- - /** - * cayman_vm_flush - vm flush using the CP - * -diff --git a/drivers/gpu/drm/radeon/ni_dma.c b/drivers/gpu/drm/radeon/ni_dma.c -index e9cfe8a..bdeb65e 100644 ---- a/drivers/gpu/drm/radeon/ni_dma.c -+++ b/drivers/gpu/drm/radeon/ni_dma.c -@@ -246,8 +246,7 @@ bool cayman_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring) - * @addr: dst addr to write into pe - * @count: number of page entries to update - * @incr: increase next addr by incr bytes -- * @flags: access flags -- * @r600_flags: hw access flags -+ * @flags: hw access flags - * - * Update the page tables using the DMA (cayman/TN). - */ -@@ -257,13 +256,12 @@ void cayman_dma_vm_set_page(struct radeon_device *rdev, - uint64_t addr, unsigned count, - uint32_t incr, uint32_t flags) - { -- uint32_t r600_flags = cayman_vm_page_flags(rdev, flags); - uint64_t value; - unsigned ndw; - -- trace_radeon_vm_set_page(pe, addr, count, incr, r600_flags); -+ trace_radeon_vm_set_page(pe, addr, count, incr, flags); - -- if ((flags & RADEON_VM_PAGE_SYSTEM) || (count == 1)) { -+ if ((flags & R600_PTE_SYSTEM) || (count == 1)) { - while (count) { - ndw = count * 2; - if (ndw > 0xFFFFE) -@@ -274,16 +272,16 @@ void cayman_dma_vm_set_page(struct radeon_device *rdev, - ib->ptr[ib->length_dw++] = pe; - ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; - for (; ndw > 0; ndw -= 2, --count, pe += 8) { -- if (flags & RADEON_VM_PAGE_SYSTEM) { -+ if (flags & R600_PTE_SYSTEM) { - value = radeon_vm_map_gart(rdev, addr); - value &= 0xFFFFFFFFFFFFF000ULL; -- } else if (flags & RADEON_VM_PAGE_VALID) { -+ } else if (flags & R600_PTE_VALID) { - value = addr; - } else { - value = 0; - } - addr += incr; -- value |= r600_flags; -+ value |= flags; - ib->ptr[ib->length_dw++] = value; - ib->ptr[ib->length_dw++] = upper_32_bits(value); - } -@@ -294,7 +292,7 @@ void cayman_dma_vm_set_page(struct radeon_device *rdev, - if (ndw > 0xFFFFE) - ndw = 0xFFFFE; - -- if (flags & RADEON_VM_PAGE_VALID) -+ if (flags & R600_PTE_VALID) - value = addr; - else - value = 0; -@@ -302,7 +300,7 @@ void cayman_dma_vm_set_page(struct radeon_device *rdev, - ib->ptr[ib->length_dw++] = DMA_PTE_PDE_PACKET(ndw); - ib->ptr[ib->length_dw++] = pe; /* dst addr */ - ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; -- ib->ptr[ib->length_dw++] = r600_flags; /* mask */ -+ ib->ptr[ib->length_dw++] = flags; /* mask */ - ib->ptr[ib->length_dw++] = 0; - ib->ptr[ib->length_dw++] = value; /* value */ - ib->ptr[ib->length_dw++] = upper_32_bits(value); -diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h -index 37e619c..b987f01 100644 ---- a/drivers/gpu/drm/radeon/radeon.h -+++ b/drivers/gpu/drm/radeon/radeon.h -@@ -840,6 +840,12 @@ struct radeon_mec { - #define RADEON_VM_PTB_ALIGN_MASK (RADEON_VM_PTB_ALIGN_SIZE - 1) - #define RADEON_VM_PTB_ALIGN(a) (((a) + RADEON_VM_PTB_ALIGN_MASK) & ~RADEON_VM_PTB_ALIGN_MASK) - -+#define R600_PTE_VALID (1 << 0) -+#define R600_PTE_SYSTEM (1 << 1) -+#define R600_PTE_SNOOPED (1 << 2) -+#define R600_PTE_READABLE (1 << 5) -+#define R600_PTE_WRITEABLE (1 << 6) -+ - struct radeon_vm { - struct list_head list; - struct list_head va; -@@ -1685,8 +1691,6 @@ struct radeon_asic { - struct { - int (*init)(struct radeon_device *rdev); - void (*fini)(struct radeon_device *rdev); -- -- u32 pt_ring_index; - void (*set_page)(struct radeon_device *rdev, - struct radeon_ib *ib, - uint64_t pe, -diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c -index 5720e66..123adfe 100644 ---- a/drivers/gpu/drm/radeon/radeon_asic.c -+++ b/drivers/gpu/drm/radeon/radeon_asic.c -@@ -1622,8 +1622,7 @@ static struct radeon_asic cayman_asic = { - .vm = { - .init = &cayman_vm_init, - .fini = &cayman_vm_fini, -- .pt_ring_index = R600_RING_TYPE_DMA_INDEX, -- .set_page = &cayman_vm_set_page, -+ .set_page = &cayman_dma_vm_set_page, - }, - .ring = { - [RADEON_RING_TYPE_GFX_INDEX] = &cayman_gfx_ring, -@@ -1723,8 +1722,7 @@ static struct radeon_asic trinity_asic = { - .vm = { - .init = &cayman_vm_init, - .fini = &cayman_vm_fini, -- .pt_ring_index = R600_RING_TYPE_DMA_INDEX, -- .set_page = &cayman_vm_set_page, -+ .set_page = &cayman_dma_vm_set_page, - }, - .ring = { - [RADEON_RING_TYPE_GFX_INDEX] = &cayman_gfx_ring, -@@ -1854,8 +1852,7 @@ static struct radeon_asic si_asic = { - .vm = { - .init = &si_vm_init, - .fini = &si_vm_fini, -- .pt_ring_index = R600_RING_TYPE_DMA_INDEX, -- .set_page = &si_vm_set_page, -+ .set_page = &si_dma_vm_set_page, - }, - .ring = { - [RADEON_RING_TYPE_GFX_INDEX] = &si_gfx_ring, -@@ -2000,8 +1997,7 @@ static struct radeon_asic ci_asic = { - .vm = { - .init = &cik_vm_init, - .fini = &cik_vm_fini, -- .pt_ring_index = R600_RING_TYPE_DMA_INDEX, -- .set_page = &cik_vm_set_page, -+ .set_page = &cik_sdma_vm_set_page, - }, - .ring = { - [RADEON_RING_TYPE_GFX_INDEX] = &ci_gfx_ring, -@@ -2102,8 +2098,7 @@ static struct radeon_asic kv_asic = { - .vm = { - .init = &cik_vm_init, - .fini = &cik_vm_fini, -- .pt_ring_index = R600_RING_TYPE_DMA_INDEX, -- .set_page = &cik_vm_set_page, -+ .set_page = &cik_sdma_vm_set_page, - }, - .ring = { - [RADEON_RING_TYPE_GFX_INDEX] = &ci_gfx_ring, -diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h -index 8588670..8939cb3 100644 ---- a/drivers/gpu/drm/radeon/radeon_asic.h -+++ b/drivers/gpu/drm/radeon/radeon_asic.h -@@ -577,17 +577,18 @@ int cayman_vm_init(struct radeon_device *rdev); - void cayman_vm_fini(struct radeon_device *rdev); - void cayman_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); - uint32_t cayman_vm_page_flags(struct radeon_device *rdev, uint32_t flags); --void cayman_vm_set_page(struct radeon_device *rdev, -- struct radeon_ib *ib, -- uint64_t pe, -- uint64_t addr, unsigned count, -- uint32_t incr, uint32_t flags); - int evergreen_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); - int evergreen_dma_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); - void cayman_dma_ring_ib_execute(struct radeon_device *rdev, - struct radeon_ib *ib); - bool cayman_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring); - bool cayman_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring); -+void cayman_dma_vm_set_page(struct radeon_device *rdev, -+ struct radeon_ib *ib, -+ uint64_t pe, -+ uint64_t addr, unsigned count, -+ uint32_t incr, uint32_t flags); -+ - void cayman_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); - - int ni_dpm_init(struct radeon_device *rdev); -@@ -649,17 +650,17 @@ int si_irq_set(struct radeon_device *rdev); - int si_irq_process(struct radeon_device *rdev); - int si_vm_init(struct radeon_device *rdev); - void si_vm_fini(struct radeon_device *rdev); --void si_vm_set_page(struct radeon_device *rdev, -- struct radeon_ib *ib, -- uint64_t pe, -- uint64_t addr, unsigned count, -- uint32_t incr, uint32_t flags); - void si_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); - int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); - int si_copy_dma(struct radeon_device *rdev, - uint64_t src_offset, uint64_t dst_offset, - unsigned num_gpu_pages, - struct radeon_fence **fence); -+void si_dma_vm_set_page(struct radeon_device *rdev, -+ struct radeon_ib *ib, -+ uint64_t pe, -+ uint64_t addr, unsigned count, -+ uint32_t incr, uint32_t flags); - void si_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); - u32 si_get_xclk(struct radeon_device *rdev); - uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev); -@@ -727,11 +728,11 @@ int cik_irq_process(struct radeon_device *rdev); - int cik_vm_init(struct radeon_device *rdev); - void cik_vm_fini(struct radeon_device *rdev); - void cik_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); --void cik_vm_set_page(struct radeon_device *rdev, -- struct radeon_ib *ib, -- uint64_t pe, -- uint64_t addr, unsigned count, -- uint32_t incr, uint32_t flags); -+void cik_sdma_vm_set_page(struct radeon_device *rdev, -+ struct radeon_ib *ib, -+ uint64_t pe, -+ uint64_t addr, unsigned count, -+ uint32_t incr, uint32_t flags); - void cik_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); - int cik_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); - u32 cik_compute_ring_get_rptr(struct radeon_device *rdev, -diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c -index 33bd02e..9ceabdf 100644 ---- a/drivers/gpu/drm/radeon/radeon_gart.c -+++ b/drivers/gpu/drm/radeon/radeon_gart.c -@@ -920,6 +920,26 @@ uint64_t radeon_vm_map_gart(struct radeon_device *rdev, uint64_t addr) - } - - /** -+ * radeon_vm_page_flags - translate page flags to what the hw uses -+ * -+ * @flags: flags comming from userspace -+ * -+ * Translate the flags the userspace ABI uses to hw flags. -+ */ -+static uint32_t radeon_vm_page_flags(uint32_t flags) -+{ -+ uint32_t hw_flags = 0; -+ hw_flags |= (flags & RADEON_VM_PAGE_VALID) ? R600_PTE_VALID : 0; -+ hw_flags |= (flags & RADEON_VM_PAGE_READABLE) ? R600_PTE_READABLE : 0; -+ hw_flags |= (flags & RADEON_VM_PAGE_WRITEABLE) ? R600_PTE_WRITEABLE : 0; -+ if (flags & RADEON_VM_PAGE_SYSTEM) { -+ hw_flags |= R600_PTE_SYSTEM; -+ hw_flags |= (flags & RADEON_VM_PAGE_SNOOPED) ? R600_PTE_SNOOPED : 0; -+ } -+ return hw_flags; -+} -+ -+/** - * radeon_vm_update_pdes - make sure that page directory is valid - * - * @rdev: radeon_device pointer -@@ -980,7 +1000,7 @@ retry: - if (count) { - radeon_asic_vm_set_page(rdev, ib, last_pde, - last_pt, count, incr, -- RADEON_VM_PAGE_VALID); -+ R600_PTE_VALID); - } - - count = 1; -@@ -993,7 +1013,7 @@ retry: - - if (count) { - radeon_asic_vm_set_page(rdev, ib, last_pde, last_pt, count, -- incr, RADEON_VM_PAGE_VALID); -+ incr, R600_PTE_VALID); - - } - -@@ -1088,7 +1108,6 @@ int radeon_vm_bo_update(struct radeon_device *rdev, - struct radeon_bo *bo, - struct ttm_mem_reg *mem) - { -- unsigned ridx = rdev->asic->vm.pt_ring_index; - struct radeon_ib ib; - struct radeon_bo_va *bo_va; - unsigned nptes, npdes, ndw; -@@ -1163,7 +1182,7 @@ int radeon_vm_bo_update(struct radeon_device *rdev, - if (ndw > 0xfffff) - return -ENOMEM; - -- r = radeon_ib_get(rdev, ridx, &ib, NULL, ndw * 4); -+ r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, ndw * 4); - if (r) - return r; - ib.length_dw = 0; -@@ -1175,7 +1194,7 @@ int radeon_vm_bo_update(struct radeon_device *rdev, - } - - radeon_vm_update_ptes(rdev, vm, &ib, bo_va->soffset, bo_va->eoffset, -- addr, bo_va->flags); -+ addr, radeon_vm_page_flags(bo_va->flags)); - - radeon_semaphore_sync_to(ib.semaphore, vm->fence); - r = radeon_ib_schedule(rdev, &ib, NULL); -diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c -index 37acf93..0334f3e 100644 ---- a/drivers/gpu/drm/radeon/si.c -+++ b/drivers/gpu/drm/radeon/si.c -@@ -78,11 +78,6 @@ extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_ - extern u32 evergreen_get_number_of_dram_channels(struct radeon_device *rdev); - extern void evergreen_print_gpu_status_regs(struct radeon_device *rdev); - extern bool evergreen_is_display_hung(struct radeon_device *rdev); --extern void si_dma_vm_set_page(struct radeon_device *rdev, -- struct radeon_ib *ib, -- uint64_t pe, -- uint64_t addr, unsigned count, -- uint32_t incr, uint32_t flags); - static void si_enable_gui_idle_interrupt(struct radeon_device *rdev, - bool enable); - static void si_fini_pg(struct radeon_device *rdev); -@@ -4682,61 +4677,6 @@ static void si_vm_decode_fault(struct radeon_device *rdev, - block, mc_id); - } - --/** -- * si_vm_set_page - update the page tables using the CP -- * -- * @rdev: radeon_device pointer -- * @ib: indirect buffer to fill with commands -- * @pe: addr of the page entry -- * @addr: dst addr to write into pe -- * @count: number of page entries to update -- * @incr: increase next addr by incr bytes -- * @flags: access flags -- * -- * Update the page tables using the CP (SI). -- */ --void si_vm_set_page(struct radeon_device *rdev, -- struct radeon_ib *ib, -- uint64_t pe, -- uint64_t addr, unsigned count, -- uint32_t incr, uint32_t flags) --{ -- uint32_t r600_flags = cayman_vm_page_flags(rdev, flags); -- uint64_t value; -- unsigned ndw; -- -- if (rdev->asic->vm.pt_ring_index == RADEON_RING_TYPE_GFX_INDEX) { -- while (count) { -- ndw = 2 + count * 2; -- if (ndw > 0x3FFE) -- ndw = 0x3FFE; -- -- ib->ptr[ib->length_dw++] = PACKET3(PACKET3_WRITE_DATA, ndw); -- ib->ptr[ib->length_dw++] = (WRITE_DATA_ENGINE_SEL(0) | -- WRITE_DATA_DST_SEL(1)); -- ib->ptr[ib->length_dw++] = pe; -- ib->ptr[ib->length_dw++] = upper_32_bits(pe); -- for (; ndw > 2; ndw -= 2, --count, pe += 8) { -- if (flags & RADEON_VM_PAGE_SYSTEM) { -- value = radeon_vm_map_gart(rdev, addr); -- value &= 0xFFFFFFFFFFFFF000ULL; -- } else if (flags & RADEON_VM_PAGE_VALID) { -- value = addr; -- } else { -- value = 0; -- } -- addr += incr; -- value |= r600_flags; -- ib->ptr[ib->length_dw++] = value; -- ib->ptr[ib->length_dw++] = upper_32_bits(value); -- } -- } -- } else { -- /* DMA */ -- si_dma_vm_set_page(rdev, ib, pe, addr, count, incr, flags); -- } --} -- - void si_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) - { - struct radeon_ring *ring = &rdev->ring[ridx]; -diff --git a/drivers/gpu/drm/radeon/si_dma.c b/drivers/gpu/drm/radeon/si_dma.c -index 97af34c..59be2cf 100644 ---- a/drivers/gpu/drm/radeon/si_dma.c -+++ b/drivers/gpu/drm/radeon/si_dma.c -@@ -76,13 +76,12 @@ void si_dma_vm_set_page(struct radeon_device *rdev, - uint64_t addr, unsigned count, - uint32_t incr, uint32_t flags) - { -- uint32_t r600_flags = cayman_vm_page_flags(rdev, flags); - uint64_t value; - unsigned ndw; - -- trace_radeon_vm_set_page(pe, addr, count, incr, r600_flags); -+ trace_radeon_vm_set_page(pe, addr, count, incr, flags); - -- if (flags & RADEON_VM_PAGE_SYSTEM) { -+ if (flags & R600_PTE_SYSTEM) { - while (count) { - ndw = count * 2; - if (ndw > 0xFFFFE) -@@ -93,16 +92,10 @@ void si_dma_vm_set_page(struct radeon_device *rdev, - ib->ptr[ib->length_dw++] = pe; - ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; - for (; ndw > 0; ndw -= 2, --count, pe += 8) { -- if (flags & RADEON_VM_PAGE_SYSTEM) { -- value = radeon_vm_map_gart(rdev, addr); -- value &= 0xFFFFFFFFFFFFF000ULL; -- } else if (flags & RADEON_VM_PAGE_VALID) { -- value = addr; -- } else { -- value = 0; -- } -+ value = radeon_vm_map_gart(rdev, addr); -+ value &= 0xFFFFFFFFFFFFF000ULL; - addr += incr; -- value |= r600_flags; -+ value |= flags; - ib->ptr[ib->length_dw++] = value; - ib->ptr[ib->length_dw++] = upper_32_bits(value); - } -@@ -113,7 +106,7 @@ void si_dma_vm_set_page(struct radeon_device *rdev, - if (ndw > 0xFFFFE) - ndw = 0xFFFFE; - -- if (flags & RADEON_VM_PAGE_VALID) -+ if (flags & R600_PTE_VALID) - value = addr; - else - value = 0; -@@ -121,7 +114,7 @@ void si_dma_vm_set_page(struct radeon_device *rdev, - ib->ptr[ib->length_dw++] = DMA_PTE_PDE_PACKET(ndw); - ib->ptr[ib->length_dw++] = pe; /* dst addr */ - ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; -- ib->ptr[ib->length_dw++] = r600_flags; /* mask */ -+ ib->ptr[ib->length_dw++] = flags; /* mask */ - ib->ptr[ib->length_dw++] = 0; - ib->ptr[ib->length_dw++] = value; /* value */ - ib->ptr[ib->length_dw++] = upper_32_bits(value); --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0018-yocto-amd-drm-radeon-add-large-PTE-support-for-NI-SI-and-CIK-v.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0018-yocto-amd-drm-radeon-add-large-PTE-support-for-NI-SI-and-CIK-v.patch deleted file mode 100644 index 6498c071..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0018-yocto-amd-drm-radeon-add-large-PTE-support-for-NI-SI-and-CIK-v.patch +++ /dev/null @@ -1,237 +0,0 @@ -From a2bc39a6394bb8e11060df3da33d603a66ccf9f6 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Fri, 25 Oct 2013 18:07:55 +0200 -Subject: [PATCH 18/44] drm/radeon: add large PTE support for NI, SI and CIK - v3 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This patch implements support for VRAM page table entry compression. -PTE construction is enhanced to identify physically contiguous page -ranges and mark them in the PTE fragment field. L1 TLB and L2 cache -support is enabled for 64KB (SI/CIK) and 256KB (NI) PTE fragments, -significantly improving TLB utilization for VRAM allocations. - -Linear store bandwidth is improved from 60GB/s to 125GB/s on Pitcairn. -Unigine Heaven 3.0 sees an average improvement from 24.7 to 27.7 FPS -on default settings at 1920x1200 resolution with vsync disabled. - -See main comment in radeon_gart.c gives a technical description. - -v2 (chk): rebased and simplified. -v3 (chk): add missing hw setup - -Signed-off-by: Jay Cornwall <jay@jcornwall.me> -Signed-off-by: Christian König <christian.koenig@amd.com> ---- - drivers/gpu/drm/radeon/cik.c | 4 +- - drivers/gpu/drm/radeon/ni.c | 2 + - drivers/gpu/drm/radeon/radeon.h | 5 ++ - drivers/gpu/drm/radeon/radeon_gart.c | 91 +++++++++++++++++++++++++++++++--- - drivers/gpu/drm/radeon/si.c | 5 +- - 5 files changed, 98 insertions(+), 9 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c -index d7e86ef3..27fa479 100644 ---- a/drivers/gpu/drm/radeon/cik.c -+++ b/drivers/gpu/drm/radeon/cik.c -@@ -4522,6 +4522,7 @@ static int cik_pcie_gart_enable(struct radeon_device *rdev) - WREG32(MC_VM_MX_L1_TLB_CNTL, - (0xA << 7) | - ENABLE_L1_TLB | -+ ENABLE_L1_FRAGMENT_PROCESSING | - SYSTEM_ACCESS_MODE_NOT_IN_SYS | - ENABLE_ADVANCED_DRIVER_MODEL | - SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU); -@@ -4534,7 +4535,8 @@ static int cik_pcie_gart_enable(struct radeon_device *rdev) - CONTEXT1_IDENTITY_ACCESS_MODE(1)); - WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); - WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY | -- L2_CACHE_BIGK_FRAGMENT_SIZE(6)); -+ BANK_SELECT(4) | -+ L2_CACHE_BIGK_FRAGMENT_SIZE(4)); - /* setup context0 */ - WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12); - WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12); -diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c -index f59a9e9..9291982 100644 ---- a/drivers/gpu/drm/radeon/ni.c -+++ b/drivers/gpu/drm/radeon/ni.c -@@ -1227,12 +1227,14 @@ static int cayman_pcie_gart_enable(struct radeon_device *rdev) - SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU); - /* Setup L2 cache */ - WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | -+ ENABLE_L2_FRAGMENT_PROCESSING | - ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE | - ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE | - EFFECTIVE_L2_QUEUE_SIZE(7) | - CONTEXT1_IDENTITY_ACCESS_MODE(1)); - WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); - WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY | -+ BANK_SELECT(6) | - L2_CACHE_BIGK_FRAGMENT_SIZE(6)); - /* setup context0 */ - WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12); -diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h -index b987f01..06b3375 100644 ---- a/drivers/gpu/drm/radeon/radeon.h -+++ b/drivers/gpu/drm/radeon/radeon.h -@@ -846,6 +846,11 @@ struct radeon_mec { - #define R600_PTE_READABLE (1 << 5) - #define R600_PTE_WRITEABLE (1 << 6) - -+/* PTE (Page Table Entry) fragment field for different page sizes */ -+#define R600_PTE_FRAG_4KB (0 << 7) -+#define R600_PTE_FRAG_64KB (4 << 7) -+#define R600_PTE_FRAG_256KB (6 << 7) -+ - struct radeon_vm { - struct list_head list; - struct list_head va; -diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c -index 9ceabdf..f960ce6 100644 ---- a/drivers/gpu/drm/radeon/radeon_gart.c -+++ b/drivers/gpu/drm/radeon/radeon_gart.c -@@ -1021,6 +1021,84 @@ retry: - } - - /** -+ * radeon_vm_frag_ptes - add fragment information to PTEs -+ * -+ * @rdev: radeon_device pointer -+ * @ib: IB for the update -+ * @pe_start: first PTE to handle -+ * @pe_end: last PTE to handle -+ * @addr: addr those PTEs should point to -+ * @flags: hw mapping flags -+ * -+ * Global and local mutex must be locked! -+ */ -+static void radeon_vm_frag_ptes(struct radeon_device *rdev, -+ struct radeon_ib *ib, -+ uint64_t pe_start, uint64_t pe_end, -+ uint64_t addr, uint32_t flags) -+{ -+ /** -+ * The MC L1 TLB supports variable sized pages, based on a fragment -+ * field in the PTE. When this field is set to a non-zero value, page -+ * granularity is increased from 4KB to (1 << (12 + frag)). The PTE -+ * flags are considered valid for all PTEs within the fragment range -+ * and corresponding mappings are assumed to be physically contiguous. -+ * -+ * The L1 TLB can store a single PTE for the whole fragment, -+ * significantly increasing the space available for translation -+ * caching. This leads to large improvements in throughput when the -+ * TLB is under pressure. -+ * -+ * The L2 cache distributes small and large fragments into two -+ * asymmetric partitions. The large fragment cache is significantly -+ * larger. Thus, we try to use large fragments wherever possible. -+ * Userspace can support this by aligning virtual base address and -+ * allocation size to the fragment size. -+ */ -+ -+ /* NI is optimized for 256KB fragments, SI and newer for 64KB */ -+ uint64_t frag_flags = rdev->family == CHIP_CAYMAN ? -+ R600_PTE_FRAG_256KB : R600_PTE_FRAG_64KB; -+ uint64_t frag_align = rdev->family == CHIP_CAYMAN ? 0x200 : 0x80; -+ -+ uint64_t frag_start = ALIGN(pe_start, frag_align); -+ uint64_t frag_end = pe_end & ~(frag_align - 1); -+ -+ unsigned count; -+ -+ /* system pages are non continuously */ -+ if ((flags & R600_PTE_SYSTEM) || !(flags & R600_PTE_VALID) || -+ (frag_start >= frag_end)) { -+ -+ count = (pe_end - pe_start) / 8; -+ radeon_asic_vm_set_page(rdev, ib, pe_start, addr, count, -+ RADEON_GPU_PAGE_SIZE, flags); -+ return; -+ } -+ -+ /* handle the 4K area at the beginning */ -+ if (pe_start != frag_start) { -+ count = (frag_start - pe_start) / 8; -+ radeon_asic_vm_set_page(rdev, ib, pe_start, addr, count, -+ RADEON_GPU_PAGE_SIZE, flags); -+ addr += RADEON_GPU_PAGE_SIZE * count; -+ } -+ -+ /* handle the area in the middle */ -+ count = (frag_end - frag_start) / 8; -+ radeon_asic_vm_set_page(rdev, ib, frag_start, addr, count, -+ RADEON_GPU_PAGE_SIZE, flags | frag_flags); -+ -+ /* handle the 4K area at the end */ -+ if (frag_end != pe_end) { -+ addr += RADEON_GPU_PAGE_SIZE * count; -+ count = (pe_end - frag_end) / 8; -+ radeon_asic_vm_set_page(rdev, ib, frag_end, addr, count, -+ RADEON_GPU_PAGE_SIZE, flags); -+ } -+} -+ -+/** - * radeon_vm_update_ptes - make sure that page tables are valid - * - * @rdev: radeon_device pointer -@@ -1066,10 +1144,9 @@ static void radeon_vm_update_ptes(struct radeon_device *rdev, - if ((last_pte + 8 * count) != pte) { - - if (count) { -- radeon_asic_vm_set_page(rdev, ib, last_pte, -- last_dst, count, -- RADEON_GPU_PAGE_SIZE, -- flags); -+ radeon_vm_frag_ptes(rdev, ib, last_pte, -+ last_pte + 8 * count, -+ last_dst, flags); - } - - count = nptes; -@@ -1084,9 +1161,9 @@ static void radeon_vm_update_ptes(struct radeon_device *rdev, - } - - if (count) { -- radeon_asic_vm_set_page(rdev, ib, last_pte, -- last_dst, count, -- RADEON_GPU_PAGE_SIZE, flags); -+ radeon_vm_frag_ptes(rdev, ib, last_pte, -+ last_pte + 8 * count, -+ last_dst, flags); - } - } - -diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c -index 0334f3e..d9173ef 100644 ---- a/drivers/gpu/drm/radeon/si.c -+++ b/drivers/gpu/drm/radeon/si.c -@@ -3928,18 +3928,21 @@ static int si_pcie_gart_enable(struct radeon_device *rdev) - WREG32(MC_VM_MX_L1_TLB_CNTL, - (0xA << 7) | - ENABLE_L1_TLB | -+ ENABLE_L1_FRAGMENT_PROCESSING | - SYSTEM_ACCESS_MODE_NOT_IN_SYS | - ENABLE_ADVANCED_DRIVER_MODEL | - SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU); - /* Setup L2 cache */ - WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | -+ ENABLE_L2_FRAGMENT_PROCESSING | - ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE | - ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE | - EFFECTIVE_L2_QUEUE_SIZE(7) | - CONTEXT1_IDENTITY_ACCESS_MODE(1)); - WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); - WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY | -- L2_CACHE_BIGK_FRAGMENT_SIZE(0)); -+ BANK_SELECT(4) | -+ L2_CACHE_BIGK_FRAGMENT_SIZE(4)); - /* setup context0 */ - WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12); - WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12); --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0019-yocto-amd-drm-radeon-add-proper-support-for-RADEON_VM_BLOCK_SI.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0019-yocto-amd-drm-radeon-add-proper-support-for-RADEON_VM_BLOCK_SI.patch deleted file mode 100644 index 8061d7ba..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0019-yocto-amd-drm-radeon-add-proper-support-for-RADEON_VM_BLOCK_SI.patch +++ /dev/null @@ -1,133 +0,0 @@ -From 7ef7e2da03959058588c4f0bc68e32b1bf17e1d9 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Tue, 29 Oct 2013 09:30:16 +0100 -Subject: [PATCH 19/44] drm/radeon: add proper support for - RADEON_VM_BLOCK_SIZE -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This patch makes it possible to decide how many address -bits are spend on the page directory vs the page tables. - -Signed-off-by: Christian König <christian.koenig@amd.com> ---- - drivers/gpu/drm/radeon/cik.c | 1 + - drivers/gpu/drm/radeon/cikd.h | 1 + - drivers/gpu/drm/radeon/ni.c | 1 + - drivers/gpu/drm/radeon/nid.h | 1 + - drivers/gpu/drm/radeon/radeon.h | 2 +- - drivers/gpu/drm/radeon/radeon_gart.c | 3 ++- - drivers/gpu/drm/radeon/si.c | 1 + - drivers/gpu/drm/radeon/sid.h | 1 + - 8 files changed, 9 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c -index 27fa479..cd5f85e 100644 ---- a/drivers/gpu/drm/radeon/cik.c -+++ b/drivers/gpu/drm/radeon/cik.c -@@ -4572,6 +4572,7 @@ static int cik_pcie_gart_enable(struct radeon_device *rdev) - (u32)(rdev->dummy_page.addr >> 12)); - WREG32(VM_CONTEXT1_CNTL2, 4); - WREG32(VM_CONTEXT1_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(1) | -+ PAGE_TABLE_BLOCK_SIZE(RADEON_VM_BLOCK_SIZE - 9) | - RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT | - RANGE_PROTECTION_FAULT_ENABLE_DEFAULT | - DUMMY_PAGE_PROTECTION_FAULT_ENABLE_INTERRUPT | -diff --git a/drivers/gpu/drm/radeon/cikd.h b/drivers/gpu/drm/radeon/cikd.h -index 203d2a0..7a0a0d2 100644 ---- a/drivers/gpu/drm/radeon/cikd.h -+++ b/drivers/gpu/drm/radeon/cikd.h -@@ -474,6 +474,7 @@ - #define READ_PROTECTION_FAULT_ENABLE_DEFAULT (1 << 16) - #define WRITE_PROTECTION_FAULT_ENABLE_INTERRUPT (1 << 18) - #define WRITE_PROTECTION_FAULT_ENABLE_DEFAULT (1 << 19) -+#define PAGE_TABLE_BLOCK_SIZE(x) (((x) & 0xF) << 24) - #define VM_CONTEXT1_CNTL 0x1414 - #define VM_CONTEXT0_CNTL2 0x1430 - #define VM_CONTEXT1_CNTL2 0x1434 -diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c -index 9291982..ce87221 100644 ---- a/drivers/gpu/drm/radeon/ni.c -+++ b/drivers/gpu/drm/radeon/ni.c -@@ -1267,6 +1267,7 @@ static int cayman_pcie_gart_enable(struct radeon_device *rdev) - (u32)(rdev->dummy_page.addr >> 12)); - WREG32(VM_CONTEXT1_CNTL2, 4); - WREG32(VM_CONTEXT1_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(1) | -+ PAGE_TABLE_BLOCK_SIZE(RADEON_VM_BLOCK_SIZE - 9) | - RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT | - RANGE_PROTECTION_FAULT_ENABLE_DEFAULT | - DUMMY_PAGE_PROTECTION_FAULT_ENABLE_INTERRUPT | -diff --git a/drivers/gpu/drm/radeon/nid.h b/drivers/gpu/drm/radeon/nid.h -index 22421bc..ef7ba2d 100644 ---- a/drivers/gpu/drm/radeon/nid.h -+++ b/drivers/gpu/drm/radeon/nid.h -@@ -128,6 +128,7 @@ - #define READ_PROTECTION_FAULT_ENABLE_DEFAULT (1 << 16) - #define WRITE_PROTECTION_FAULT_ENABLE_INTERRUPT (1 << 18) - #define WRITE_PROTECTION_FAULT_ENABLE_DEFAULT (1 << 19) -+#define PAGE_TABLE_BLOCK_SIZE(x) (((x) & 0xF) << 24) - #define VM_CONTEXT1_CNTL 0x1414 - #define VM_CONTEXT0_CNTL2 0x1430 - #define VM_CONTEXT1_CNTL2 0x1434 -diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h -index 06b3375..c639a58 100644 ---- a/drivers/gpu/drm/radeon/radeon.h -+++ b/drivers/gpu/drm/radeon/radeon.h -@@ -830,7 +830,7 @@ struct radeon_mec { - /* defines number of bits in page table versus page directory, - * a page is 4KB so we have 12 bits offset, 9 bits in the page - * table and the remaining 19 bits are in the page directory */ --#define RADEON_VM_BLOCK_SIZE 9 -+#define RADEON_VM_BLOCK_SIZE 12 - - /* number of entries in page table */ - #define RADEON_VM_PTE_COUNT (1 << RADEON_VM_BLOCK_SIZE) -diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c -index f960ce6..34b09ac 100644 ---- a/drivers/gpu/drm/radeon/radeon_gart.c -+++ b/drivers/gpu/drm/radeon/radeon_gart.c -@@ -959,6 +959,7 @@ static int radeon_vm_update_pdes(struct radeon_device *rdev, - uint64_t start, uint64_t end) - { - static const uint32_t incr = RADEON_VM_PTE_COUNT * 8; -+ const unsigned align = min((uint32_t)RADEON_VM_PTB_ALIGN_SIZE, incr); - - uint64_t last_pde = ~0, last_pt = ~0; - unsigned count = 0; -@@ -979,7 +980,7 @@ retry: - r = radeon_sa_bo_new(rdev, &rdev->vm_manager.sa_manager, - &vm->page_tables[pt_idx], - RADEON_VM_PTE_COUNT * 8, -- RADEON_GPU_PAGE_SIZE, false); -+ align, false); - - if (r == -ENOMEM) { - r = radeon_vm_evict(rdev, vm); -diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c -index d9173ef..a7c53b7 100644 ---- a/drivers/gpu/drm/radeon/si.c -+++ b/drivers/gpu/drm/radeon/si.c -@@ -3979,6 +3979,7 @@ static int si_pcie_gart_enable(struct radeon_device *rdev) - (u32)(rdev->dummy_page.addr >> 12)); - WREG32(VM_CONTEXT1_CNTL2, 4); - WREG32(VM_CONTEXT1_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(1) | -+ PAGE_TABLE_BLOCK_SIZE(RADEON_VM_BLOCK_SIZE - 9) | - RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT | - RANGE_PROTECTION_FAULT_ENABLE_DEFAULT | - DUMMY_PAGE_PROTECTION_FAULT_ENABLE_INTERRUPT | -diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h -index 6e23019..db3dd87 100644 ---- a/drivers/gpu/drm/radeon/sid.h -+++ b/drivers/gpu/drm/radeon/sid.h -@@ -357,6 +357,7 @@ - #define READ_PROTECTION_FAULT_ENABLE_DEFAULT (1 << 16) - #define WRITE_PROTECTION_FAULT_ENABLE_INTERRUPT (1 << 18) - #define WRITE_PROTECTION_FAULT_ENABLE_DEFAULT (1 << 19) -+#define PAGE_TABLE_BLOCK_SIZE(x) (((x) & 0xF) << 24) - #define VM_CONTEXT1_CNTL 0x1414 - #define VM_CONTEXT0_CNTL2 0x1430 - #define VM_CONTEXT1_CNTL2 0x1434 --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0020-yocto-amd-drm-radeon-WIP-add-copy-trace-point.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0020-yocto-amd-drm-radeon-WIP-add-copy-trace-point.patch deleted file mode 100644 index 95662197..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0020-yocto-amd-drm-radeon-WIP-add-copy-trace-point.patch +++ /dev/null @@ -1,59 +0,0 @@ -From fd743f086a3079b5fab5f05809a5998200f5201d Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Tue, 17 Dec 2013 11:43:21 -0700 -Subject: [PATCH 20/44] drm/radeon: WIP add copy trace point -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Christian König <christian.koenig@amd.com> ---- - drivers/gpu/drm/radeon/cik_sdma.c | 2 ++ - drivers/gpu/drm/radeon/radeon_trace.h | 18 ++++++++++++++++++ - 2 files changed, 20 insertions(+) - -diff --git a/drivers/gpu/drm/radeon/cik_sdma.c b/drivers/gpu/drm/radeon/cik_sdma.c -index 8517a62..a589d79 100644 ---- a/drivers/gpu/drm/radeon/cik_sdma.c -+++ b/drivers/gpu/drm/radeon/cik_sdma.c -@@ -433,6 +433,8 @@ int cik_copy_dma(struct radeon_device *rdev, - int i, num_loops; - int r = 0; - -+ trace_radeon_copy(src_offset, dst_offset, num_gpu_pages); -+ - r = radeon_semaphore_create(rdev, &sem); - if (r) { - DRM_ERROR("radeon: moving bo (%d).\n", r); -diff --git a/drivers/gpu/drm/radeon/radeon_trace.h b/drivers/gpu/drm/radeon/radeon_trace.h -index 0473257..6e966bb 100644 ---- a/drivers/gpu/drm/radeon/radeon_trace.h -+++ b/drivers/gpu/drm/radeon/radeon_trace.h -@@ -27,6 +27,24 @@ TRACE_EVENT(radeon_bo_create, - TP_printk("bo=%p, pages=%u", __entry->bo, __entry->pages) - ); - -+TRACE_EVENT(radeon_copy, -+ TP_PROTO(u64 src, u64 dst, u32 pages), -+ TP_ARGS(src, dst, pages), -+ TP_STRUCT__entry( -+ __field(u64, src) -+ __field(u64, dst) -+ __field(u32, pages) -+ ), -+ -+ TP_fast_assign( -+ __entry->src = src; -+ __entry->dst = dst; -+ __entry->pages = pages; -+ ), -+ TP_printk("src=%010llx, dst=%010llx, pages=%u", -+ __entry->src, __entry->dst, __entry->pages) -+); -+ - TRACE_EVENT(radeon_cs, - TP_PROTO(struct radeon_cs_parser *p), - TP_ARGS(p), --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0021-yocto-amd-drm-radeon-cik-Return-backend-map-information-to-use.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0021-yocto-amd-drm-radeon-cik-Return-backend-map-information-to-use.patch deleted file mode 100644 index d082f22c..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0021-yocto-amd-drm-radeon-cik-Return-backend-map-information-to-use.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 72285aebc730c0b21532a0c5c83aa3f7d075e5ce Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Michel=20D=C3=A4nzer?= <michel.daenzer@amd.com> -Date: Mon, 18 Nov 2013 18:25:59 +0900 -Subject: [PATCH 21/44] drm/radeon/cik: Return backend map information to - userspace -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This is required to properly calculate the tiling parameters -in userspace. - -Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/radeon/radeon_kms.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c -index 4a3b3c5..405b0d4 100644 ---- a/drivers/gpu/drm/radeon/radeon_kms.c -+++ b/drivers/gpu/drm/radeon/radeon_kms.c -@@ -324,7 +324,7 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) - break; - case RADEON_INFO_BACKEND_MAP: - if (rdev->family >= CHIP_BONAIRE) -- return -EINVAL; -+ *value = rdev->config.cik.backend_map; - else if (rdev->family >= CHIP_TAHITI) - *value = rdev->config.si.backend_map; - else if (rdev->family >= CHIP_CAYMAN) --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0022-yocto-amd-drm-radeon-cik-Add-macrotile-mode-array-query.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0022-yocto-amd-drm-radeon-cik-Add-macrotile-mode-array-query.patch deleted file mode 100644 index 63d826e6..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0022-yocto-amd-drm-radeon-cik-Add-macrotile-mode-array-query.patch +++ /dev/null @@ -1,113 +0,0 @@ -From 93ebc5801cab1c47f426da110d19b77f71a51b4f Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Michel=20D=C3=A4nzer?= <michel.daenzer@amd.com> -Date: Mon, 18 Nov 2013 18:26:00 +0900 -Subject: [PATCH 22/44] drm/radeon/cik: Add macrotile mode array query -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This is required to properly calculate the tiling parameters -in userspace. - -Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/radeon/cik.c | 3 +++ - drivers/gpu/drm/radeon/radeon.h | 1 + - drivers/gpu/drm/radeon/radeon_drv.c | 3 ++- - drivers/gpu/drm/radeon/radeon_kms.c | 9 +++++++++ - include/uapi/drm/radeon_drm.h | 2 ++ - 5 files changed, 17 insertions(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c -index cd5f85e..5419abe 100644 ---- a/drivers/gpu/drm/radeon/cik.c -+++ b/drivers/gpu/drm/radeon/cik.c -@@ -1981,6 +1981,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) - gb_tile_moden = 0; - break; - } -+ rdev->config.cik.macrotile_mode_array[reg_offset] = gb_tile_moden; - WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), gb_tile_moden); - } - } else if (num_pipe_configs == 4) { -@@ -2327,6 +2328,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) - gb_tile_moden = 0; - break; - } -+ rdev->config.cik.macrotile_mode_array[reg_offset] = gb_tile_moden; - WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), gb_tile_moden); - } - } else if (num_pipe_configs == 2) { -@@ -2544,6 +2546,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) - gb_tile_moden = 0; - break; - } -+ rdev->config.cik.macrotile_mode_array[reg_offset] = gb_tile_moden; - WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), gb_tile_moden); - } - } else -diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h -index c639a58..5331fc2 100644 ---- a/drivers/gpu/drm/radeon/radeon.h -+++ b/drivers/gpu/drm/radeon/radeon.h -@@ -1991,6 +1991,7 @@ struct cik_asic { - - unsigned tile_config; - uint32_t tile_mode_array[32]; -+ uint32_t macrotile_mode_array[16]; - }; - - union radeon_asic_config { -diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c -index 9c14a1b..51b3214 100644 ---- a/drivers/gpu/drm/radeon/radeon_drv.c -+++ b/drivers/gpu/drm/radeon/radeon_drv.c -@@ -75,9 +75,10 @@ - * 2.32.0 - new info request for rings working - * 2.33.0 - Add SI tiling mode array query - * 2.34.0 - Add CIK tiling mode array query -+ * 2.35.0 - Add CIK macrotile mode array query - */ - #define KMS_DRIVER_MAJOR 2 --#define KMS_DRIVER_MINOR 34 -+#define KMS_DRIVER_MINOR 35 - #define KMS_DRIVER_PATCHLEVEL 0 - int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); - int radeon_driver_unload_kms(struct drm_device *dev); -diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c -index 405b0d4..5d67422 100644 ---- a/drivers/gpu/drm/radeon/radeon_kms.c -+++ b/drivers/gpu/drm/radeon/radeon_kms.c -@@ -433,6 +433,15 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) - return -EINVAL; - } - break; -+ case RADEON_INFO_CIK_MACROTILE_MODE_ARRAY: -+ if (rdev->family >= CHIP_BONAIRE) { -+ value = rdev->config.cik.macrotile_mode_array; -+ value_size = sizeof(uint32_t)*16; -+ } else { -+ DRM_DEBUG_KMS("macrotile mode array is cik+ only!\n"); -+ return -EINVAL; -+ } -+ break; - case RADEON_INFO_SI_CP_DMA_COMPUTE: - *value = 1; - break; -diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h -index a71442b..fe421e8 100644 ---- a/include/uapi/drm/radeon_drm.h -+++ b/include/uapi/drm/radeon_drm.h -@@ -981,6 +981,8 @@ struct drm_radeon_cs { - #define RADEON_INFO_SI_TILE_MODE_ARRAY 0x16 - /* query if CP DMA is supported on the compute ring */ - #define RADEON_INFO_SI_CP_DMA_COMPUTE 0x17 -+/* CIK macrotile mode array */ -+#define RADEON_INFO_CIK_MACROTILE_MODE_ARRAY 0x18 - /* query the number of render backends */ - #define RADEON_INFO_SI_BACKEND_ENABLED_MASK 0x19 - --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0023-yocto-amd-drm-radeon-set-correct-number-of-banks-for-CIK-chips.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0023-yocto-amd-drm-radeon-set-correct-number-of-banks-for-CIK-chips.patch deleted file mode 100644 index def7d8fc..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0023-yocto-amd-drm-radeon-set-correct-number-of-banks-for-CIK-chips.patch +++ /dev/null @@ -1,102 +0,0 @@ -From 037690c12dcf3c3c2843f8db082ad2f5d49b7757 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= <marek.olsak@amd.com> -Date: Mon, 23 Dec 2013 17:11:36 +0100 -Subject: [PATCH 23/44] drm/radeon: set correct number of banks for CIK chips - in DCE -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -We don't have the NUM_BANKS parameter, so we have to calculate it -from the other parameters. NUM_BANKS is not constant on CIK. - -This fixes 2D tiling for the display engine on CIK. - -Signed-off-by: Marek Olšák <marek.olsak@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/radeon/atombios_crtc.c | 64 +++++++++++++++++++++----------- - 1 file changed, 43 insertions(+), 21 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c -index 368e1b8..09b35c3 100644 ---- a/drivers/gpu/drm/radeon/atombios_crtc.c -+++ b/drivers/gpu/drm/radeon/atombios_crtc.c -@@ -1143,31 +1143,53 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc, - } - - if (tiling_flags & RADEON_TILING_MACRO) { -- if (rdev->family >= CHIP_BONAIRE) -- tmp = rdev->config.cik.tile_config; -- else if (rdev->family >= CHIP_TAHITI) -- tmp = rdev->config.si.tile_config; -- else if (rdev->family >= CHIP_CAYMAN) -- tmp = rdev->config.cayman.tile_config; -- else -- tmp = rdev->config.evergreen.tile_config; -+ evergreen_tiling_fields(tiling_flags, &bankw, &bankh, &mtaspect, &tile_split); - -- switch ((tmp & 0xf0) >> 4) { -- case 0: /* 4 banks */ -- fb_format |= EVERGREEN_GRPH_NUM_BANKS(EVERGREEN_ADDR_SURF_4_BANK); -- break; -- case 1: /* 8 banks */ -- default: -- fb_format |= EVERGREEN_GRPH_NUM_BANKS(EVERGREEN_ADDR_SURF_8_BANK); -- break; -- case 2: /* 16 banks */ -- fb_format |= EVERGREEN_GRPH_NUM_BANKS(EVERGREEN_ADDR_SURF_16_BANK); -- break; -+ /* Set NUM_BANKS. */ -+ if (rdev->family >= CHIP_BONAIRE) { -+ unsigned tileb, index, num_banks, tile_split_bytes; -+ -+ /* Calculate the macrotile mode index. */ -+ tile_split_bytes = 64 << tile_split; -+ tileb = 8 * 8 * target_fb->bits_per_pixel / 8; -+ tileb = min(tile_split_bytes, tileb); -+ -+ for (index = 0; tileb > 64; index++) { -+ tileb >>= 1; -+ } -+ -+ if (index >= 16) { -+ DRM_ERROR("Wrong screen bpp (%u) or tile split (%u)\n", -+ target_fb->bits_per_pixel, tile_split); -+ return -EINVAL; -+ } -+ -+ num_banks = (rdev->config.cik.macrotile_mode_array[index] >> 6) & 0x3; -+ fb_format |= EVERGREEN_GRPH_NUM_BANKS(num_banks); -+ } else { -+ /* SI and older. */ -+ if (rdev->family >= CHIP_TAHITI) -+ tmp = rdev->config.si.tile_config; -+ else if (rdev->family >= CHIP_CAYMAN) -+ tmp = rdev->config.cayman.tile_config; -+ else -+ tmp = rdev->config.evergreen.tile_config; -+ -+ switch ((tmp & 0xf0) >> 4) { -+ case 0: /* 4 banks */ -+ fb_format |= EVERGREEN_GRPH_NUM_BANKS(EVERGREEN_ADDR_SURF_4_BANK); -+ break; -+ case 1: /* 8 banks */ -+ default: -+ fb_format |= EVERGREEN_GRPH_NUM_BANKS(EVERGREEN_ADDR_SURF_8_BANK); -+ break; -+ case 2: /* 16 banks */ -+ fb_format |= EVERGREEN_GRPH_NUM_BANKS(EVERGREEN_ADDR_SURF_16_BANK); -+ break; -+ } - } - - fb_format |= EVERGREEN_GRPH_ARRAY_MODE(EVERGREEN_GRPH_ARRAY_2D_TILED_THIN1); -- -- evergreen_tiling_fields(tiling_flags, &bankw, &bankh, &mtaspect, &tile_split); - fb_format |= EVERGREEN_GRPH_TILE_SPLIT(tile_split); - fb_format |= EVERGREEN_GRPH_BANK_WIDTH(bankw); - fb_format |= EVERGREEN_GRPH_BANK_HEIGHT(bankh); --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0024-yocto-amd-drm-radeon-don-t-power-gate-paused-UVD-streams.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0024-yocto-amd-drm-radeon-don-t-power-gate-paused-UVD-streams.patch deleted file mode 100644 index 8beb11e7..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0024-yocto-amd-drm-radeon-don-t-power-gate-paused-UVD-streams.patch +++ /dev/null @@ -1,45 +0,0 @@ -From e273f124b346f1fcbf3c363ae3224344988d07de Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Fri, 10 Jan 2014 06:59:40 -0700 -Subject: [PATCH 24/44] drm/radeon: don't power gate paused UVD streams -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Christian König <christian.koenig@amd.com> ---- - drivers/gpu/drm/radeon/radeon_pm.c | 4 ++++ - drivers/gpu/drm/radeon/radeon_uvd.c | 2 ++ - 2 files changed, 6 insertions(+) - -diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c -index 4f6b7fc..41ca652 100644 ---- a/drivers/gpu/drm/radeon/radeon_pm.c -+++ b/drivers/gpu/drm/radeon/radeon_pm.c -@@ -938,6 +938,10 @@ void radeon_dpm_enable_uvd(struct radeon_device *rdev, bool enable) - - if (rdev->asic->dpm.powergate_uvd) { - mutex_lock(&rdev->pm.mutex); -+ /* don't powergate anything if we -+ have active but pause streams */ -+ enable |= rdev->pm.dpm.sd > 0; -+ enable |= rdev->pm.dpm.hd > 0; - /* enable/disable UVD */ - radeon_dpm_powergate_uvd(rdev, !enable); - mutex_unlock(&rdev->pm.mutex); -diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c b/drivers/gpu/drm/radeon/radeon_uvd.c -index 2b502b4..1b5970a 100644 ---- a/drivers/gpu/drm/radeon/radeon_uvd.c -+++ b/drivers/gpu/drm/radeon/radeon_uvd.c -@@ -782,6 +782,8 @@ static void radeon_uvd_idle_work_handler(struct work_struct *work) - - if (radeon_fence_count_emitted(rdev, R600_RING_TYPE_UVD_INDEX) == 0) { - if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { -+ radeon_uvd_count_handles(rdev, &rdev->pm.dpm.sd, -+ &rdev->pm.dpm.hd); - radeon_dpm_enable_uvd(rdev, false); - } else { - radeon_set_uvd_clocks(rdev, 0, 0); --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0025-yocto-amd-drm-radeon-dpm-retain-user-selected-performance-leve.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0025-yocto-amd-drm-radeon-dpm-retain-user-selected-performance-leve.patch deleted file mode 100644 index abec682c..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0025-yocto-amd-drm-radeon-dpm-retain-user-selected-performance-leve.patch +++ /dev/null @@ -1,45 +0,0 @@ -From b2773506c602407fc15219c75ec673d4bd0c2d82 Mon Sep 17 00:00:00 2001 -From: Alex Deucher <alexander.deucher@amd.com> -Date: Wed, 23 Oct 2013 21:31:42 +0000 -Subject: [PATCH 25/44] drm/radeon/dpm: retain user selected performance level - across state changes - -If the user has forced the state high or low, retain that preference -even when we switch power states. - -Fixes: -https://bugs.freedesktop.org/show_bug.cgi?id=70654 - -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/radeon/radeon_pm.c | 12 ++++++++---- - 1 file changed, 8 insertions(+), 4 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c -index 41ca652..5febb25 100644 ---- a/drivers/gpu/drm/radeon/radeon_pm.c -+++ b/drivers/gpu/drm/radeon/radeon_pm.c -@@ -918,12 +918,16 @@ static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev) - radeon_dpm_post_set_power_state(rdev); - - if (rdev->asic->dpm.force_performance_level) { -- if (rdev->pm.dpm.thermal_active) -+ if (rdev->pm.dpm.thermal_active) { -+ enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; - /* force low perf level for thermal */ - radeon_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_LOW); -- else -- /* otherwise, enable auto */ -- radeon_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_AUTO); -+ /* save the user's level */ -+ rdev->pm.dpm.forced_level = level; -+ } else { -+ /* otherwise, user selected level */ -+ radeon_dpm_force_performance_level(rdev, rdev->pm.dpm.forced_level); -+ } - } - - done: --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0026-yocto-amd-drm-radeon-remove-generic-rptr-wptr-functions-v2.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0026-yocto-amd-drm-radeon-remove-generic-rptr-wptr-functions-v2.patch deleted file mode 100644 index 628a3230..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0026-yocto-amd-drm-radeon-remove-generic-rptr-wptr-functions-v2.patch +++ /dev/null @@ -1,1049 +0,0 @@ -From 3f033c032e0fd56dd58707405c037800f0f6fe90 Mon Sep 17 00:00:00 2001 -From: Alex Deucher <alexander.deucher@amd.com> -Date: Tue, 10 Dec 2013 00:44:30 +0000 -Subject: [PATCH 26/44] drm/radeon: remove generic rptr/wptr functions (v2) - -Fill in asic family specific versions rather than -using the generic version. This lets us handle asic -specific differences more easily. In this case, we -disable sw swapping of the rtpr writeback value on -r6xx+ since the hw does it for us. Fixes bogus -rptr readback on BE systems. - -v2: remove missed cpu_to_le32(), add comments - -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/radeon/cik.c | 58 +++++++++++++++++++--------- - drivers/gpu/drm/radeon/cik_sdma.c | 69 ++++++++++++++++++++++++++++++++++ - drivers/gpu/drm/radeon/evergreen.c | 3 -- - drivers/gpu/drm/radeon/ni.c | 69 ++++++++++++++++++++++++++++++---- - drivers/gpu/drm/radeon/ni_dma.c | 69 ++++++++++++++++++++++++++++++++++ - drivers/gpu/drm/radeon/r100.c | 31 ++++++++++++++- - drivers/gpu/drm/radeon/r600.c | 32 +++++++++++++++- - drivers/gpu/drm/radeon/r600_dma.c | 13 +++++-- - drivers/gpu/drm/radeon/radeon.h | 4 +- - drivers/gpu/drm/radeon/radeon_asic.c | 66 ++++++++++++++++---------------- - drivers/gpu/drm/radeon/radeon_asic.h | 57 +++++++++++++++++++++------- - drivers/gpu/drm/radeon/radeon_ring.c | 44 +++------------------- - drivers/gpu/drm/radeon/rv770.c | 3 -- - drivers/gpu/drm/radeon/si.c | 8 ---- - 14 files changed, 392 insertions(+), 134 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c -index 5419abe..4a89b5c 100644 ---- a/drivers/gpu/drm/radeon/cik.c -+++ b/drivers/gpu/drm/radeon/cik.c -@@ -3461,15 +3461,43 @@ static int cik_cp_gfx_resume(struct radeon_device *rdev) - return 0; - } - --u32 cik_compute_ring_get_rptr(struct radeon_device *rdev, -- struct radeon_ring *ring) -+u32 cik_gfx_get_rptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) - { - u32 rptr; - -+ if (rdev->wb.enabled) -+ rptr = rdev->wb.wb[ring->rptr_offs/4]; -+ else -+ rptr = RREG32(CP_RB0_RPTR); -+ -+ return rptr; -+} - -+u32 cik_gfx_get_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ u32 wptr; -+ -+ wptr = RREG32(CP_RB0_WPTR); -+ -+ return wptr; -+} -+ -+void cik_gfx_set_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ WREG32(CP_RB0_WPTR, ring->wptr); -+ (void)RREG32(CP_RB0_WPTR); -+} -+ -+u32 cik_compute_get_rptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ u32 rptr; - - if (rdev->wb.enabled) { -- rptr = le32_to_cpu(rdev->wb.wb[ring->rptr_offs/4]); -+ rptr = rdev->wb.wb[ring->rptr_offs/4]; - } else { - mutex_lock(&rdev->srbm_mutex); - cik_srbm_select(rdev, ring->me, ring->pipe, ring->queue, 0); -@@ -3481,13 +3509,14 @@ u32 cik_compute_ring_get_rptr(struct radeon_device *rdev, - return rptr; - } - --u32 cik_compute_ring_get_wptr(struct radeon_device *rdev, -- struct radeon_ring *ring) -+u32 cik_compute_get_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) - { - u32 wptr; - - if (rdev->wb.enabled) { -- wptr = le32_to_cpu(rdev->wb.wb[ring->wptr_offs/4]); -+ /* XXX check if swapping is necessary on BE */ -+ wptr = rdev->wb.wb[ring->wptr_offs/4]; - } else { - mutex_lock(&rdev->srbm_mutex); - cik_srbm_select(rdev, ring->me, ring->pipe, ring->queue, 0); -@@ -3499,10 +3528,11 @@ u32 cik_compute_ring_get_wptr(struct radeon_device *rdev, - return wptr; - } - --void cik_compute_ring_set_wptr(struct radeon_device *rdev, -- struct radeon_ring *ring) -+void cik_compute_set_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) - { -- rdev->wb.wb[ring->wptr_offs/4] = cpu_to_le32(ring->wptr); -+ /* XXX check if swapping is necessary on BE */ -+ rdev->wb.wb[ring->wptr_offs/4] = ring->wptr; - WDOORBELL32(ring->doorbell_offset, ring->wptr); - } - -@@ -7058,8 +7088,7 @@ static int cik_startup(struct radeon_device *rdev) - - ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; - r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, -- CP_RB0_RPTR, CP_RB0_WPTR, -- RADEON_CP_PACKET2); -+ PACKET3(PACKET3_NOP, 0x3FFF)); - if (r) - return r; - -@@ -7067,7 +7096,6 @@ static int cik_startup(struct radeon_device *rdev) - /* type-2 packets are deprecated on MEC, use type-3 instead */ - ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]; - r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP1_RPTR_OFFSET, -- CP_HQD_PQ_RPTR, CP_HQD_PQ_WPTR, - PACKET3(PACKET3_NOP, 0x3FFF)); - if (r) - return r; -@@ -7079,7 +7107,6 @@ static int cik_startup(struct radeon_device *rdev) - /* type-2 packets are deprecated on MEC, use type-3 instead */ - ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX]; - r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP2_RPTR_OFFSET, -- CP_HQD_PQ_RPTR, CP_HQD_PQ_WPTR, - PACKET3(PACKET3_NOP, 0x3FFF)); - if (r) - return r; -@@ -7091,16 +7118,12 @@ static int cik_startup(struct radeon_device *rdev) - - ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; - r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, -- SDMA0_GFX_RB_RPTR + SDMA0_REGISTER_OFFSET, -- SDMA0_GFX_RB_WPTR + SDMA0_REGISTER_OFFSET, - SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0)); - if (r) - return r; - - ring = &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX]; - r = radeon_ring_init(rdev, ring, ring->ring_size, CAYMAN_WB_DMA1_RPTR_OFFSET, -- SDMA0_GFX_RB_RPTR + SDMA1_REGISTER_OFFSET, -- SDMA0_GFX_RB_WPTR + SDMA1_REGISTER_OFFSET, - SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0)); - if (r) - return r; -@@ -7116,7 +7139,6 @@ static int cik_startup(struct radeon_device *rdev) - ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX]; - if (ring->ring_size) { - r = radeon_ring_init(rdev, ring, ring->ring_size, 0, -- UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR, - RADEON_CP_PACKET2); - if (!r) - r = uvd_v1_0_init(rdev); -diff --git a/drivers/gpu/drm/radeon/cik_sdma.c b/drivers/gpu/drm/radeon/cik_sdma.c -index a589d79..f7c0b47 100644 ---- a/drivers/gpu/drm/radeon/cik_sdma.c -+++ b/drivers/gpu/drm/radeon/cik_sdma.c -@@ -60,6 +60,75 @@ static void cik_sdma_hdp_flush(struct radeon_device *rdev, - } - - /** -+ * cik_sdma_get_rptr - get the current read pointer -+ * -+ * @rdev: radeon_device pointer -+ * @ring: radeon ring pointer -+ * -+ * Get the current rptr from the hardware (CIK+). -+ */ -+uint32_t cik_sdma_get_rptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ u32 rptr, reg; -+ -+ if (rdev->wb.enabled) { -+ rptr = rdev->wb.wb[ring->rptr_offs/4]; -+ } else { -+ if (ring->idx == R600_RING_TYPE_DMA_INDEX) -+ reg = SDMA0_GFX_RB_RPTR + SDMA0_REGISTER_OFFSET; -+ else -+ reg = SDMA0_GFX_RB_RPTR + SDMA1_REGISTER_OFFSET; -+ -+ rptr = RREG32(reg); -+ } -+ -+ return (rptr & 0x3fffc) >> 2; -+} -+ -+/** -+ * cik_sdma_get_wptr - get the current write pointer -+ * -+ * @rdev: radeon_device pointer -+ * @ring: radeon ring pointer -+ * -+ * Get the current wptr from the hardware (CIK+). -+ */ -+uint32_t cik_sdma_get_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ u32 reg; -+ -+ if (ring->idx == R600_RING_TYPE_DMA_INDEX) -+ reg = SDMA0_GFX_RB_WPTR + SDMA0_REGISTER_OFFSET; -+ else -+ reg = SDMA0_GFX_RB_WPTR + SDMA1_REGISTER_OFFSET; -+ -+ return (RREG32(reg) & 0x3fffc) >> 2; -+} -+ -+/** -+ * cik_sdma_set_wptr - commit the write pointer -+ * -+ * @rdev: radeon_device pointer -+ * @ring: radeon ring pointer -+ * -+ * Write the wptr back to the hardware (CIK+). -+ */ -+void cik_sdma_set_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ u32 reg; -+ -+ if (ring->idx == R600_RING_TYPE_DMA_INDEX) -+ reg = SDMA0_GFX_RB_WPTR + SDMA0_REGISTER_OFFSET; -+ else -+ reg = SDMA0_GFX_RB_WPTR + SDMA1_REGISTER_OFFSET; -+ -+ WREG32(reg, (ring->wptr << 2) & 0x3fffc); -+} -+ -+/** - * cik_sdma_ring_ib_execute - Schedule an IB on the DMA engine - * - * @rdev: radeon_device pointer -diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c -index b5c67a9..491d048 100644 ---- a/drivers/gpu/drm/radeon/evergreen.c -+++ b/drivers/gpu/drm/radeon/evergreen.c -@@ -5150,14 +5150,12 @@ static int evergreen_startup(struct radeon_device *rdev) - - ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; - r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, -- R600_CP_RB_RPTR, R600_CP_RB_WPTR, - RADEON_CP_PACKET2); - if (r) - return r; - - ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; - r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, -- DMA_RB_RPTR, DMA_RB_WPTR, - DMA_PACKET(DMA_PACKET_NOP, 0, 0)); - if (r) - return r; -@@ -5175,7 +5173,6 @@ static int evergreen_startup(struct radeon_device *rdev) - ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX]; - if (ring->ring_size) { - r = radeon_ring_init(rdev, ring, ring->ring_size, 0, -- UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR, - RADEON_CP_PACKET2); - if (!r) - r = uvd_v1_0_init(rdev); -diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c -index ce87221..b684fd0 100644 ---- a/drivers/gpu/drm/radeon/ni.c -+++ b/drivers/gpu/drm/radeon/ni.c -@@ -1401,6 +1401,55 @@ static void cayman_cp_enable(struct radeon_device *rdev, bool enable) - } - } - -+u32 cayman_gfx_get_rptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ u32 rptr; -+ -+ if (rdev->wb.enabled) -+ rptr = rdev->wb.wb[ring->rptr_offs/4]; -+ else { -+ if (ring->idx == RADEON_RING_TYPE_GFX_INDEX) -+ rptr = RREG32(CP_RB0_RPTR); -+ else if (ring->idx == CAYMAN_RING_TYPE_CP1_INDEX) -+ rptr = RREG32(CP_RB1_RPTR); -+ else -+ rptr = RREG32(CP_RB2_RPTR); -+ } -+ -+ return rptr; -+} -+ -+u32 cayman_gfx_get_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ u32 wptr; -+ -+ if (ring->idx == RADEON_RING_TYPE_GFX_INDEX) -+ wptr = RREG32(CP_RB0_WPTR); -+ else if (ring->idx == CAYMAN_RING_TYPE_CP1_INDEX) -+ wptr = RREG32(CP_RB1_WPTR); -+ else -+ wptr = RREG32(CP_RB2_WPTR); -+ -+ return wptr; -+} -+ -+void cayman_gfx_set_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ if (ring->idx == RADEON_RING_TYPE_GFX_INDEX) { -+ WREG32(CP_RB0_WPTR, ring->wptr); -+ (void)RREG32(CP_RB0_WPTR); -+ } else if (ring->idx == CAYMAN_RING_TYPE_CP1_INDEX) { -+ WREG32(CP_RB1_WPTR, ring->wptr); -+ (void)RREG32(CP_RB1_WPTR); -+ } else { -+ WREG32(CP_RB2_WPTR, ring->wptr); -+ (void)RREG32(CP_RB2_WPTR); -+ } -+} -+ - static int cayman_cp_load_microcode(struct radeon_device *rdev) - { - const __be32 *fw_data; -@@ -1529,6 +1578,16 @@ static int cayman_cp_resume(struct radeon_device *rdev) - CP_RB1_BASE, - CP_RB2_BASE - }; -+ static const unsigned cp_rb_rptr[] = { -+ CP_RB0_RPTR, -+ CP_RB1_RPTR, -+ CP_RB2_RPTR -+ }; -+ static const unsigned cp_rb_wptr[] = { -+ CP_RB0_WPTR, -+ CP_RB1_WPTR, -+ CP_RB2_WPTR -+ }; - struct radeon_ring *ring; - int i, r; - -@@ -1587,8 +1646,8 @@ static int cayman_cp_resume(struct radeon_device *rdev) - WREG32_P(cp_rb_cntl[i], RB_RPTR_WR_ENA, ~RB_RPTR_WR_ENA); - - ring->rptr = ring->wptr = 0; -- WREG32(ring->rptr_reg, ring->rptr); -- WREG32(ring->wptr_reg, ring->wptr); -+ WREG32(cp_rb_rptr[i], ring->rptr); -+ WREG32(cp_rb_wptr[i], ring->wptr); - - mdelay(1); - WREG32_P(cp_rb_cntl[i], 0, ~RB_RPTR_WR_ENA); -@@ -1984,23 +2043,18 @@ static int cayman_startup(struct radeon_device *rdev) - evergreen_irq_set(rdev); - - r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, -- CP_RB0_RPTR, CP_RB0_WPTR, - RADEON_CP_PACKET2); - if (r) - return r; - - ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; - r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, -- DMA_RB_RPTR + DMA0_REGISTER_OFFSET, -- DMA_RB_WPTR + DMA0_REGISTER_OFFSET, - DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0)); - if (r) - return r; - - ring = &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX]; - r = radeon_ring_init(rdev, ring, ring->ring_size, CAYMAN_WB_DMA1_RPTR_OFFSET, -- DMA_RB_RPTR + DMA1_REGISTER_OFFSET, -- DMA_RB_WPTR + DMA1_REGISTER_OFFSET, - DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0)); - if (r) - return r; -@@ -2019,7 +2073,6 @@ static int cayman_startup(struct radeon_device *rdev) - ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX]; - if (ring->ring_size) { - r = radeon_ring_init(rdev, ring, ring->ring_size, 0, -- UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR, - RADEON_CP_PACKET2); - if (!r) - r = uvd_v1_0_init(rdev); -diff --git a/drivers/gpu/drm/radeon/ni_dma.c b/drivers/gpu/drm/radeon/ni_dma.c -index bdeb65e..51424ab 100644 ---- a/drivers/gpu/drm/radeon/ni_dma.c -+++ b/drivers/gpu/drm/radeon/ni_dma.c -@@ -43,6 +43,75 @@ u32 cayman_gpu_check_soft_reset(struct radeon_device *rdev); - */ - - /** -+ * cayman_dma_get_rptr - get the current read pointer -+ * -+ * @rdev: radeon_device pointer -+ * @ring: radeon ring pointer -+ * -+ * Get the current rptr from the hardware (cayman+). -+ */ -+uint32_t cayman_dma_get_rptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ u32 rptr, reg; -+ -+ if (rdev->wb.enabled) { -+ rptr = rdev->wb.wb[ring->rptr_offs/4]; -+ } else { -+ if (ring->idx == R600_RING_TYPE_DMA_INDEX) -+ reg = DMA_RB_RPTR + DMA0_REGISTER_OFFSET; -+ else -+ reg = DMA_RB_RPTR + DMA1_REGISTER_OFFSET; -+ -+ rptr = RREG32(reg); -+ } -+ -+ return (rptr & 0x3fffc) >> 2; -+} -+ -+/** -+ * cayman_dma_get_wptr - get the current write pointer -+ * -+ * @rdev: radeon_device pointer -+ * @ring: radeon ring pointer -+ * -+ * Get the current wptr from the hardware (cayman+). -+ */ -+uint32_t cayman_dma_get_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ u32 reg; -+ -+ if (ring->idx == R600_RING_TYPE_DMA_INDEX) -+ reg = DMA_RB_WPTR + DMA0_REGISTER_OFFSET; -+ else -+ reg = DMA_RB_WPTR + DMA1_REGISTER_OFFSET; -+ -+ return (RREG32(reg) & 0x3fffc) >> 2; -+} -+ -+/** -+ * cayman_dma_set_wptr - commit the write pointer -+ * -+ * @rdev: radeon_device pointer -+ * @ring: radeon ring pointer -+ * -+ * Write the wptr back to the hardware (cayman+). -+ */ -+void cayman_dma_set_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ u32 reg; -+ -+ if (ring->idx == R600_RING_TYPE_DMA_INDEX) -+ reg = DMA_RB_WPTR + DMA0_REGISTER_OFFSET; -+ else -+ reg = DMA_RB_WPTR + DMA1_REGISTER_OFFSET; -+ -+ WREG32(reg, (ring->wptr << 2) & 0x3fffc); -+} -+ -+/** - * cayman_dma_ring_ib_execute - Schedule an IB on the DMA engine - * - * @rdev: radeon_device pointer -diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c -index aa015a5..39f6984 100644 ---- a/drivers/gpu/drm/radeon/r100.c -+++ b/drivers/gpu/drm/radeon/r100.c -@@ -1050,6 +1050,36 @@ static int r100_cp_init_microcode(struct radeon_device *rdev) - return err; - } - -+u32 r100_gfx_get_rptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ u32 rptr; -+ -+ if (rdev->wb.enabled) -+ rptr = le32_to_cpu(rdev->wb.wb[ring->rptr_offs/4]); -+ else -+ rptr = RREG32(RADEON_CP_RB_RPTR); -+ -+ return rptr; -+} -+ -+u32 r100_gfx_get_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ u32 wptr; -+ -+ wptr = RREG32(RADEON_CP_RB_WPTR); -+ -+ return wptr; -+} -+ -+void r100_gfx_set_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ WREG32(RADEON_CP_RB_WPTR, ring->wptr); -+ (void)RREG32(RADEON_CP_RB_WPTR); -+} -+ - static void r100_cp_load_microcode(struct radeon_device *rdev) - { - const __be32 *fw_data; -@@ -1102,7 +1132,6 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size) - ring_size = (1 << (rb_bufsz + 1)) * 4; - r100_cp_load_microcode(rdev); - r = radeon_ring_init(rdev, ring, ring_size, RADEON_WB_CP_RPTR_OFFSET, -- RADEON_CP_RB_RPTR, RADEON_CP_RB_WPTR, - RADEON_CP_PACKET2); - if (r) { - return r; -diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c -index a5de2cf..5f52b50 100644 ---- a/drivers/gpu/drm/radeon/r600.c -+++ b/drivers/gpu/drm/radeon/r600.c -@@ -2329,6 +2329,36 @@ out: - return err; - } - -+u32 r600_gfx_get_rptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ u32 rptr; -+ -+ if (rdev->wb.enabled) -+ rptr = rdev->wb.wb[ring->rptr_offs/4]; -+ else -+ rptr = RREG32(R600_CP_RB_RPTR); -+ -+ return rptr; -+} -+ -+u32 r600_gfx_get_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ u32 wptr; -+ -+ wptr = RREG32(R600_CP_RB_WPTR); -+ -+ return wptr; -+} -+ -+void r600_gfx_set_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ WREG32(R600_CP_RB_WPTR, ring->wptr); -+ (void)RREG32(R600_CP_RB_WPTR); -+} -+ - static int r600_cp_load_microcode(struct radeon_device *rdev) - { - const __be32 *fw_data; -@@ -2773,14 +2803,12 @@ static int r600_startup(struct radeon_device *rdev) - - ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; - r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, -- R600_CP_RB_RPTR, R600_CP_RB_WPTR, - RADEON_CP_PACKET2); - if (r) - return r; - - ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; - r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, -- DMA_RB_RPTR, DMA_RB_WPTR, - DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0)); - if (r) - return r; -diff --git a/drivers/gpu/drm/radeon/r600_dma.c b/drivers/gpu/drm/radeon/r600_dma.c -index 7844d15..3452c84 100644 ---- a/drivers/gpu/drm/radeon/r600_dma.c -+++ b/drivers/gpu/drm/radeon/r600_dma.c -@@ -51,7 +51,14 @@ u32 r600_gpu_check_soft_reset(struct radeon_device *rdev); - uint32_t r600_dma_get_rptr(struct radeon_device *rdev, - struct radeon_ring *ring) - { -- return (radeon_ring_generic_get_rptr(rdev, ring) & 0x3fffc) >> 2; -+ u32 rptr; -+ -+ if (rdev->wb.enabled) -+ rptr = rdev->wb.wb[ring->rptr_offs/4]; -+ else -+ rptr = RREG32(DMA_RB_RPTR); -+ -+ return (rptr & 0x3fffc) >> 2; - } - - /** -@@ -65,7 +72,7 @@ uint32_t r600_dma_get_rptr(struct radeon_device *rdev, - uint32_t r600_dma_get_wptr(struct radeon_device *rdev, - struct radeon_ring *ring) - { -- return (RREG32(ring->wptr_reg) & 0x3fffc) >> 2; -+ return (RREG32(DMA_RB_WPTR) & 0x3fffc) >> 2; - } - - /** -@@ -79,7 +86,7 @@ uint32_t r600_dma_get_wptr(struct radeon_device *rdev, - void r600_dma_set_wptr(struct radeon_device *rdev, - struct radeon_ring *ring) - { -- WREG32(ring->wptr_reg, (ring->wptr << 2) & 0x3fffc); -+ WREG32(DMA_RB_WPTR, (ring->wptr << 2) & 0x3fffc); - } - - /** -diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h -index 5331fc2..fb7323d 100644 ---- a/drivers/gpu/drm/radeon/radeon.h -+++ b/drivers/gpu/drm/radeon/radeon.h -@@ -782,13 +782,11 @@ struct radeon_ring { - volatile uint32_t *ring; - unsigned rptr; - unsigned rptr_offs; -- unsigned rptr_reg; - unsigned rptr_save_reg; - u64 next_rptr_gpu_addr; - volatile u32 *next_rptr_cpu_addr; - unsigned wptr; - unsigned wptr_old; -- unsigned wptr_reg; - unsigned ring_size; - unsigned ring_free_dw; - int count_dw; -@@ -960,7 +958,7 @@ unsigned radeon_ring_backup(struct radeon_device *rdev, struct radeon_ring *ring - int radeon_ring_restore(struct radeon_device *rdev, struct radeon_ring *ring, - unsigned size, uint32_t *data); - int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ring_size, -- unsigned rptr_offs, unsigned rptr_reg, unsigned wptr_reg, u32 nop); -+ unsigned rptr_offs, u32 nop); - void radeon_ring_fini(struct radeon_device *rdev, struct radeon_ring *cp); - - -diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c -index 123adfe..a539869 100644 ---- a/drivers/gpu/drm/radeon/radeon_asic.c -+++ b/drivers/gpu/drm/radeon/radeon_asic.c -@@ -182,9 +182,9 @@ static struct radeon_asic_ring r100_gfx_ring = { - .ring_test = &r100_ring_test, - .ib_test = &r100_ib_test, - .is_lockup = &r100_gpu_is_lockup, -- .get_rptr = &radeon_ring_generic_get_rptr, -- .get_wptr = &radeon_ring_generic_get_wptr, -- .set_wptr = &radeon_ring_generic_set_wptr, -+ .get_rptr = &r100_gfx_get_rptr, -+ .get_wptr = &r100_gfx_get_wptr, -+ .set_wptr = &r100_gfx_set_wptr, - }; - - static struct radeon_asic r100_asic = { -@@ -330,9 +330,9 @@ static struct radeon_asic_ring r300_gfx_ring = { - .ring_test = &r100_ring_test, - .ib_test = &r100_ib_test, - .is_lockup = &r100_gpu_is_lockup, -- .get_rptr = &radeon_ring_generic_get_rptr, -- .get_wptr = &radeon_ring_generic_get_wptr, -- .set_wptr = &radeon_ring_generic_set_wptr, -+ .get_rptr = &r100_gfx_get_rptr, -+ .get_wptr = &r100_gfx_get_wptr, -+ .set_wptr = &r100_gfx_set_wptr, - }; - - static struct radeon_asic r300_asic = { -@@ -883,9 +883,9 @@ static struct radeon_asic_ring r600_gfx_ring = { - .ring_test = &r600_ring_test, - .ib_test = &r600_ib_test, - .is_lockup = &r600_gfx_is_lockup, -- .get_rptr = &radeon_ring_generic_get_rptr, -- .get_wptr = &radeon_ring_generic_get_wptr, -- .set_wptr = &radeon_ring_generic_set_wptr, -+ .get_rptr = &r600_gfx_get_rptr, -+ .get_wptr = &r600_gfx_get_wptr, -+ .set_wptr = &r600_gfx_set_wptr, - }; - - static struct radeon_asic_ring r600_dma_ring = { -@@ -1267,9 +1267,9 @@ static struct radeon_asic_ring evergreen_gfx_ring = { - .ring_test = &r600_ring_test, - .ib_test = &r600_ib_test, - .is_lockup = &evergreen_gfx_is_lockup, -- .get_rptr = &radeon_ring_generic_get_rptr, -- .get_wptr = &radeon_ring_generic_get_wptr, -- .set_wptr = &radeon_ring_generic_set_wptr, -+ .get_rptr = &r600_gfx_get_rptr, -+ .get_wptr = &r600_gfx_get_wptr, -+ .set_wptr = &r600_gfx_set_wptr, - }; - - static struct radeon_asic_ring evergreen_dma_ring = { -@@ -1570,9 +1570,9 @@ static struct radeon_asic_ring cayman_gfx_ring = { - .ib_test = &r600_ib_test, - .is_lockup = &cayman_gfx_is_lockup, - .vm_flush = &cayman_vm_flush, -- .get_rptr = &radeon_ring_generic_get_rptr, -- .get_wptr = &radeon_ring_generic_get_wptr, -- .set_wptr = &radeon_ring_generic_set_wptr, -+ .get_rptr = &cayman_gfx_get_rptr, -+ .get_wptr = &cayman_gfx_get_wptr, -+ .set_wptr = &cayman_gfx_set_wptr, - }; - - static struct radeon_asic_ring cayman_dma_ring = { -@@ -1585,9 +1585,9 @@ static struct radeon_asic_ring cayman_dma_ring = { - .ib_test = &r600_dma_ib_test, - .is_lockup = &cayman_dma_is_lockup, - .vm_flush = &cayman_dma_vm_flush, -- .get_rptr = &r600_dma_get_rptr, -- .get_wptr = &r600_dma_get_wptr, -- .set_wptr = &r600_dma_set_wptr -+ .get_rptr = &cayman_dma_get_rptr, -+ .get_wptr = &cayman_dma_get_wptr, -+ .set_wptr = &cayman_dma_set_wptr - }; - - static struct radeon_asic_ring cayman_uvd_ring = { -@@ -1813,9 +1813,9 @@ static struct radeon_asic_ring si_gfx_ring = { - .ib_test = &r600_ib_test, - .is_lockup = &si_gfx_is_lockup, - .vm_flush = &si_vm_flush, -- .get_rptr = &radeon_ring_generic_get_rptr, -- .get_wptr = &radeon_ring_generic_get_wptr, -- .set_wptr = &radeon_ring_generic_set_wptr, -+ .get_rptr = &cayman_gfx_get_rptr, -+ .get_wptr = &cayman_gfx_get_wptr, -+ .set_wptr = &cayman_gfx_set_wptr, - }; - - static struct radeon_asic_ring si_dma_ring = { -@@ -1828,9 +1828,9 @@ static struct radeon_asic_ring si_dma_ring = { - .ib_test = &r600_dma_ib_test, - .is_lockup = &si_dma_is_lockup, - .vm_flush = &si_dma_vm_flush, -- .get_rptr = &r600_dma_get_rptr, -- .get_wptr = &r600_dma_get_wptr, -- .set_wptr = &r600_dma_set_wptr, -+ .get_rptr = &cayman_dma_get_rptr, -+ .get_wptr = &cayman_dma_get_wptr, -+ .set_wptr = &cayman_dma_set_wptr, - }; - - static struct radeon_asic si_asic = { -@@ -1943,9 +1943,9 @@ static struct radeon_asic_ring ci_gfx_ring = { - .ib_test = &cik_ib_test, - .is_lockup = &cik_gfx_is_lockup, - .vm_flush = &cik_vm_flush, -- .get_rptr = &radeon_ring_generic_get_rptr, -- .get_wptr = &radeon_ring_generic_get_wptr, -- .set_wptr = &radeon_ring_generic_set_wptr, -+ .get_rptr = &cik_gfx_get_rptr, -+ .get_wptr = &cik_gfx_get_wptr, -+ .set_wptr = &cik_gfx_set_wptr, - }; - - static struct radeon_asic_ring ci_cp_ring = { -@@ -1958,9 +1958,9 @@ static struct radeon_asic_ring ci_cp_ring = { - .ib_test = &cik_ib_test, - .is_lockup = &cik_gfx_is_lockup, - .vm_flush = &cik_vm_flush, -- .get_rptr = &cik_compute_ring_get_rptr, -- .get_wptr = &cik_compute_ring_get_wptr, -- .set_wptr = &cik_compute_ring_set_wptr, -+ .get_rptr = &cik_compute_get_rptr, -+ .get_wptr = &cik_compute_get_wptr, -+ .set_wptr = &cik_compute_set_wptr, - }; - - static struct radeon_asic_ring ci_dma_ring = { -@@ -1973,9 +1973,9 @@ static struct radeon_asic_ring ci_dma_ring = { - .ib_test = &cik_sdma_ib_test, - .is_lockup = &cik_sdma_is_lockup, - .vm_flush = &cik_dma_vm_flush, -- .get_rptr = &r600_dma_get_rptr, -- .get_wptr = &r600_dma_get_wptr, -- .set_wptr = &r600_dma_set_wptr, -+ .get_rptr = &cik_sdma_get_rptr, -+ .get_wptr = &cik_sdma_get_wptr, -+ .set_wptr = &cik_sdma_set_wptr, - }; - - static struct radeon_asic ci_asic = { -diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h -index 8939cb3..998042e 100644 ---- a/drivers/gpu/drm/radeon/radeon_asic.h -+++ b/drivers/gpu/drm/radeon/radeon_asic.h -@@ -47,13 +47,6 @@ u8 atombios_get_backlight_level(struct radeon_encoder *radeon_encoder); - void radeon_legacy_set_backlight_level(struct radeon_encoder *radeon_encoder, u8 level); - u8 radeon_legacy_get_backlight_level(struct radeon_encoder *radeon_encoder); - --u32 radeon_ring_generic_get_rptr(struct radeon_device *rdev, -- struct radeon_ring *ring); --u32 radeon_ring_generic_get_wptr(struct radeon_device *rdev, -- struct radeon_ring *ring); --void radeon_ring_generic_set_wptr(struct radeon_device *rdev, -- struct radeon_ring *ring); -- - /* - * r100,rv100,rs100,rv200,rs200 - */ -@@ -148,6 +141,13 @@ extern void r100_post_page_flip(struct radeon_device *rdev, int crtc); - extern void r100_wait_for_vblank(struct radeon_device *rdev, int crtc); - extern int r100_mc_wait_for_idle(struct radeon_device *rdev); - -+u32 r100_gfx_get_rptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+u32 r100_gfx_get_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+void r100_gfx_set_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+ - /* - * r200,rv250,rs300,rv280 - */ -@@ -368,6 +368,12 @@ int r600_mc_wait_for_idle(struct radeon_device *rdev); - int r600_pcie_gart_init(struct radeon_device *rdev); - void r600_scratch_init(struct radeon_device *rdev); - int r600_init_microcode(struct radeon_device *rdev); -+u32 r600_gfx_get_rptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+u32 r600_gfx_get_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+void r600_gfx_set_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); - /* r600 irq */ - int r600_irq_process(struct radeon_device *rdev); - int r600_irq_init(struct radeon_device *rdev); -@@ -591,6 +597,19 @@ void cayman_dma_vm_set_page(struct radeon_device *rdev, - - void cayman_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); - -+u32 cayman_gfx_get_rptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+u32 cayman_gfx_get_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+void cayman_gfx_set_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+uint32_t cayman_dma_get_rptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+uint32_t cayman_dma_get_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+void cayman_dma_set_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+ - int ni_dpm_init(struct radeon_device *rdev); - void ni_dpm_setup_asic(struct radeon_device *rdev); - int ni_dpm_enable(struct radeon_device *rdev); -@@ -735,12 +754,24 @@ void cik_sdma_vm_set_page(struct radeon_device *rdev, - uint32_t incr, uint32_t flags); - void cik_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); - int cik_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); --u32 cik_compute_ring_get_rptr(struct radeon_device *rdev, -- struct radeon_ring *ring); --u32 cik_compute_ring_get_wptr(struct radeon_device *rdev, -- struct radeon_ring *ring); --void cik_compute_ring_set_wptr(struct radeon_device *rdev, -- struct radeon_ring *ring); -+u32 cik_gfx_get_rptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+u32 cik_gfx_get_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+void cik_gfx_set_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+u32 cik_compute_get_rptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+u32 cik_compute_get_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+void cik_compute_set_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+u32 cik_sdma_get_rptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+u32 cik_sdma_get_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+void cik_sdma_set_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); - int ci_get_temp(struct radeon_device *rdev); - int kv_get_temp(struct radeon_device *rdev); - -diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c -index f1cec22..65f1cea 100644 ---- a/drivers/gpu/drm/radeon/radeon_ring.c -+++ b/drivers/gpu/drm/radeon/radeon_ring.c -@@ -332,36 +332,6 @@ bool radeon_ring_supports_scratch_reg(struct radeon_device *rdev, - } - } - --u32 radeon_ring_generic_get_rptr(struct radeon_device *rdev, -- struct radeon_ring *ring) --{ -- u32 rptr; -- -- if (rdev->wb.enabled) -- rptr = le32_to_cpu(rdev->wb.wb[ring->rptr_offs/4]); -- else -- rptr = RREG32(ring->rptr_reg); -- -- return rptr; --} -- --u32 radeon_ring_generic_get_wptr(struct radeon_device *rdev, -- struct radeon_ring *ring) --{ -- u32 wptr; -- -- wptr = RREG32(ring->wptr_reg); -- -- return wptr; --} -- --void radeon_ring_generic_set_wptr(struct radeon_device *rdev, -- struct radeon_ring *ring) --{ -- WREG32(ring->wptr_reg, ring->wptr); -- (void)RREG32(ring->wptr_reg); --} -- - /** - * radeon_ring_free_size - update the free size - * -@@ -689,22 +659,18 @@ int radeon_ring_restore(struct radeon_device *rdev, struct radeon_ring *ring, - * @ring: radeon_ring structure holding ring information - * @ring_size: size of the ring - * @rptr_offs: offset of the rptr writeback location in the WB buffer -- * @rptr_reg: MMIO offset of the rptr register -- * @wptr_reg: MMIO offset of the wptr register - * @nop: nop packet for this ring - * - * Initialize the driver information for the selected ring (all asics). - * Returns 0 on success, error on failure. - */ - int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ring_size, -- unsigned rptr_offs, unsigned rptr_reg, unsigned wptr_reg, u32 nop) -+ unsigned rptr_offs, u32 nop) - { - int r; - - ring->ring_size = ring_size; - ring->rptr_offs = rptr_offs; -- ring->rptr_reg = rptr_reg; -- ring->wptr_reg = wptr_reg; - ring->nop = nop; - /* Allocate ring buffer */ - if (ring->ring_obj == NULL) { -@@ -798,12 +764,12 @@ static int radeon_debugfs_ring_info(struct seq_file *m, void *data) - count = (ring->ring_size / 4) - ring->ring_free_dw; - - wptr = radeon_ring_get_wptr(rdev, ring); -- seq_printf(m, "wptr(0x%04x): 0x%08x [%5d]\n", -- ring->wptr_reg, wptr, wptr); -+ seq_printf(m, "wptr: 0x%08x [%5d]\n", -+ wptr, wptr); - - rptr = radeon_ring_get_rptr(rdev, ring); -- seq_printf(m, "rptr(0x%04x): 0x%08x [%5d]\n", -- ring->rptr_reg, rptr, rptr); -+ seq_printf(m, "rptr: 0x%08x [%5d]\n", -+ rptr, rptr); - - if (ring->rptr_save_reg) { - rptr_next = RREG32(ring->rptr_save_reg); -diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c -index 9f58467..6cce0de 100644 ---- a/drivers/gpu/drm/radeon/rv770.c -+++ b/drivers/gpu/drm/radeon/rv770.c -@@ -1728,14 +1728,12 @@ static int rv770_startup(struct radeon_device *rdev) - - ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; - r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, -- R600_CP_RB_RPTR, R600_CP_RB_WPTR, - RADEON_CP_PACKET2); - if (r) - return r; - - ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; - r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, -- DMA_RB_RPTR, DMA_RB_WPTR, - DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0)); - if (r) - return r; -@@ -1754,7 +1752,6 @@ static int rv770_startup(struct radeon_device *rdev) - ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX]; - if (ring->ring_size) { - r = radeon_ring_init(rdev, ring, ring->ring_size, 0, -- UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR, - RADEON_CP_PACKET2); - if (!r) - r = uvd_v1_0_init(rdev); -diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c -index a7c53b7..8576a6f 100644 ---- a/drivers/gpu/drm/radeon/si.c -+++ b/drivers/gpu/drm/radeon/si.c -@@ -6424,37 +6424,30 @@ static int si_startup(struct radeon_device *rdev) - - ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; - r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, -- CP_RB0_RPTR, CP_RB0_WPTR, - RADEON_CP_PACKET2); - if (r) - return r; - - ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]; - r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP1_RPTR_OFFSET, -- CP_RB1_RPTR, CP_RB1_WPTR, - RADEON_CP_PACKET2); - if (r) - return r; - - ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX]; - r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP2_RPTR_OFFSET, -- CP_RB2_RPTR, CP_RB2_WPTR, - RADEON_CP_PACKET2); - if (r) - return r; - - ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; - r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, -- DMA_RB_RPTR + DMA0_REGISTER_OFFSET, -- DMA_RB_WPTR + DMA0_REGISTER_OFFSET, - DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0, 0)); - if (r) - return r; - - ring = &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX]; - r = radeon_ring_init(rdev, ring, ring->ring_size, CAYMAN_WB_DMA1_RPTR_OFFSET, -- DMA_RB_RPTR + DMA1_REGISTER_OFFSET, -- DMA_RB_WPTR + DMA1_REGISTER_OFFSET, - DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0, 0)); - if (r) - return r; -@@ -6474,7 +6467,6 @@ static int si_startup(struct radeon_device *rdev) - ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX]; - if (ring->ring_size) { - r = radeon_ring_init(rdev, ring, ring->ring_size, 0, -- UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR, - RADEON_CP_PACKET2); - if (!r) - r = uvd_v1_0_init(rdev); --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0027-yocto-amd-drm-radeon-initial-VCE-support-v4.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0027-yocto-amd-drm-radeon-initial-VCE-support-v4.patch deleted file mode 100644 index e64abef2..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0027-yocto-amd-drm-radeon-initial-VCE-support-v4.patch +++ /dev/null @@ -1,1434 +0,0 @@ -From 5890ab59e66a268c7910a7a5ad939107fa1b8a1d Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Thu, 23 May 2013 12:10:04 +0200 -Subject: [PATCH 27/44] drm/radeon: initial VCE support v4 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Only VCE 2.0 support so far. - -v2: squashing multiple patches into this one -v3: add IRQ support for CIK, major cleanups, - basic code documentation -v4: remove HAINAN from chipset list - -Signed-off-by: Christian König <christian.koenig@amd.com> ---- - drivers/gpu/drm/radeon/Makefile | 6 + - drivers/gpu/drm/radeon/cik.c | 60 ++++ - drivers/gpu/drm/radeon/cikd.h | 33 ++ - drivers/gpu/drm/radeon/radeon.h | 56 +++- - drivers/gpu/drm/radeon/radeon_asic.c | 17 + - drivers/gpu/drm/radeon/radeon_asic.h | 13 + - drivers/gpu/drm/radeon/radeon_cs.c | 4 + - drivers/gpu/drm/radeon/radeon_kms.c | 1 + - drivers/gpu/drm/radeon/radeon_ring.c | 4 + - drivers/gpu/drm/radeon/radeon_test.c | 39 ++- - drivers/gpu/drm/radeon/radeon_vce.c | 588 ++++++++++++++++++++++++++++++++++ - drivers/gpu/drm/radeon/sid.h | 47 +++ - drivers/gpu/drm/radeon/vce_v1_0.c | 187 +++++++++++ - drivers/gpu/drm/radeon/vce_v2_0.c | 70 ++++ - include/uapi/drm/radeon_drm.h | 1 + - 15 files changed, 1117 insertions(+), 9 deletions(-) - create mode 100644 drivers/gpu/drm/radeon/radeon_vce.c - create mode 100644 drivers/gpu/drm/radeon/vce_v1_0.c - create mode 100644 drivers/gpu/drm/radeon/vce_v2_0.c - -diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile -index 306364a..ed60caa 100644 ---- a/drivers/gpu/drm/radeon/Makefile -+++ b/drivers/gpu/drm/radeon/Makefile -@@ -99,6 +99,12 @@ radeon-y += \ - uvd_v3_1.o \ - uvd_v4_2.o - -+# add VCE block -+radeon-y += \ -+ radeon_vce.o \ -+ vce_v1_0.o \ -+ vce_v2_0.o \ -+ - radeon-$(CONFIG_COMPAT) += radeon_ioc32.o - radeon-$(CONFIG_VGA_SWITCHEROO) += radeon_atpx_handler.o - radeon-$(CONFIG_ACPI) += radeon_acpi.o -diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c -index 4a89b5c..872b146 100644 ---- a/drivers/gpu/drm/radeon/cik.c -+++ b/drivers/gpu/drm/radeon/cik.c -@@ -6753,6 +6753,20 @@ restart_ih: - /* reset addr and status */ - WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1); - break; -+ case 167: /* VCE */ -+ DRM_DEBUG("IH: VCE int: 0x%08x\n", src_data); -+ switch (src_data) { -+ case 0: -+ radeon_fence_process(rdev, TN_RING_TYPE_VCE1_INDEX); -+ break; -+ case 1: -+ radeon_fence_process(rdev, TN_RING_TYPE_VCE2_INDEX); -+ break; -+ default: -+ DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data); -+ break; -+ } -+ break; - case 176: /* GFX RB CP_INT */ - case 177: /* GFX IB CP_INT */ - radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); -@@ -7071,6 +7085,22 @@ static int cik_startup(struct radeon_device *rdev) - if (r) - rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0; - -+ r = radeon_vce_resume(rdev); -+ if (!r) { -+ r = vce_v2_0_resume(rdev); -+ if (!r) -+ r = radeon_fence_driver_start_ring(rdev, -+ TN_RING_TYPE_VCE1_INDEX); -+ if (!r) -+ r = radeon_fence_driver_start_ring(rdev, -+ TN_RING_TYPE_VCE2_INDEX); -+ } -+ if (r) { -+ dev_err(rdev->dev, "VCE init error (%d).\n", r); -+ rdev->ring[TN_RING_TYPE_VCE1_INDEX].ring_size = 0; -+ rdev->ring[TN_RING_TYPE_VCE2_INDEX].ring_size = 0; -+ } -+ - /* Enable IRQ */ - if (!rdev->irq.installed) { - r = radeon_irq_kms_init(rdev); -@@ -7146,6 +7176,23 @@ static int cik_startup(struct radeon_device *rdev) - DRM_ERROR("radeon: failed initializing UVD (%d).\n", r); - } - -+ r = -ENOENT; -+ -+ ring = &rdev->ring[TN_RING_TYPE_VCE1_INDEX]; -+ if (ring->ring_size) -+ r = radeon_ring_init(rdev, ring, ring->ring_size, 0, -+ VCE_CMD_NO_OP); -+ -+ ring = &rdev->ring[TN_RING_TYPE_VCE2_INDEX]; -+ if (ring->ring_size) -+ r = radeon_ring_init(rdev, ring, ring->ring_size, 0, -+ VCE_CMD_NO_OP); -+ -+ if (!r) -+ r = vce_v1_0_init(rdev); -+ else if (r != -ENOENT) -+ DRM_ERROR("radeon: failed initializing VCE (%d).\n", r); -+ - r = radeon_ib_pool_init(rdev); - if (r) { - dev_err(rdev->dev, "IB initialization failed (%d).\n", r); -@@ -7213,6 +7260,7 @@ int cik_suspend(struct radeon_device *rdev) - cik_sdma_enable(rdev, false); - uvd_v1_0_fini(rdev); - radeon_uvd_suspend(rdev); -+ radeon_vce_suspend(rdev); - cik_fini_pg(rdev); - cik_fini_cg(rdev); - cik_irq_suspend(rdev); -@@ -7321,6 +7369,17 @@ int cik_init(struct radeon_device *rdev) - r600_ring_init(rdev, ring, 4096); - } - -+ r = radeon_vce_init(rdev); -+ if (!r) { -+ ring = &rdev->ring[TN_RING_TYPE_VCE1_INDEX]; -+ ring->ring_obj = NULL; -+ r600_ring_init(rdev, ring, 4096); -+ -+ ring = &rdev->ring[TN_RING_TYPE_VCE2_INDEX]; -+ ring->ring_obj = NULL; -+ r600_ring_init(rdev, ring, 4096); -+ } -+ - rdev->ih.ring_obj = NULL; - r600_ih_ring_init(rdev, 64 * 1024); - -@@ -7381,6 +7440,7 @@ void cik_fini(struct radeon_device *rdev) - radeon_irq_kms_fini(rdev); - uvd_v1_0_fini(rdev); - radeon_uvd_fini(rdev); -+ radeon_vce_fini(rdev); - cik_pcie_gart_fini(rdev); - r600_vram_scratch_fini(rdev); - radeon_gem_fini(rdev); -diff --git a/drivers/gpu/drm/radeon/cikd.h b/drivers/gpu/drm/radeon/cikd.h -index 7a0a0d2..b296d50 100644 ---- a/drivers/gpu/drm/radeon/cikd.h -+++ b/drivers/gpu/drm/radeon/cikd.h -@@ -1899,4 +1899,37 @@ - /* UVD CTX indirect */ - #define UVD_CGC_MEM_CTRL 0xC0 - -+/* VCE */ -+ -+#define VCE_VCPU_CACHE_OFFSET0 0x20024 -+#define VCE_VCPU_CACHE_SIZE0 0x20028 -+#define VCE_VCPU_CACHE_OFFSET1 0x2002c -+#define VCE_VCPU_CACHE_SIZE1 0x20030 -+#define VCE_VCPU_CACHE_OFFSET2 0x20034 -+#define VCE_VCPU_CACHE_SIZE2 0x20038 -+#define VCE_RB_RPTR2 0x20178 -+#define VCE_RB_WPTR2 0x2017c -+#define VCE_RB_RPTR 0x2018c -+#define VCE_RB_WPTR 0x20190 -+#define VCE_CLOCK_GATING_A 0x202f8 -+#define VCE_CLOCK_GATING_B 0x202fc -+#define VCE_UENC_CLOCK_GATING 0x207bc -+#define VCE_UENC_REG_CLOCK_GATING 0x207c0 -+#define VCE_SYS_INT_EN 0x21300 -+# define VCE_SYS_INT_TRAP_INTERRUPT_EN (1 << 3) -+#define VCE_LMI_CTRL2 0x21474 -+#define VCE_LMI_CTRL 0x21498 -+#define VCE_LMI_VM_CTRL 0x214a0 -+#define VCE_LMI_SWAP_CNTL 0x214b4 -+#define VCE_LMI_SWAP_CNTL1 0x214b8 -+#define VCE_LMI_CACHE_CTRL 0x214f4 -+ -+#define VCE_CMD_NO_OP 0x00000000 -+#define VCE_CMD_END 0x00000001 -+#define VCE_CMD_IB 0x00000002 -+#define VCE_CMD_FENCE 0x00000003 -+#define VCE_CMD_TRAP 0x00000004 -+#define VCE_CMD_IB_AUTO 0x00000005 -+#define VCE_CMD_SEMAPHORE 0x00000006 -+ - #endif -diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h -index fb7323d..094e5f5 100644 ---- a/drivers/gpu/drm/radeon/radeon.h -+++ b/drivers/gpu/drm/radeon/radeon.h -@@ -111,19 +111,16 @@ extern int radeon_aspm; - #define RADEONFB_CONN_LIMIT 4 - #define RADEON_BIOS_NUM_SCRATCH 8 - --/* max number of rings */ --#define RADEON_NUM_RINGS 6 -- - /* fence seq are set to this number when signaled */ - #define RADEON_FENCE_SIGNALED_SEQ 0LL - - /* internal ring indices */ - /* r1xx+ has gfx CP ring */ --#define RADEON_RING_TYPE_GFX_INDEX 0 -+#define RADEON_RING_TYPE_GFX_INDEX 0 - - /* cayman has 2 compute CP rings */ --#define CAYMAN_RING_TYPE_CP1_INDEX 1 --#define CAYMAN_RING_TYPE_CP2_INDEX 2 -+#define CAYMAN_RING_TYPE_CP1_INDEX 1 -+#define CAYMAN_RING_TYPE_CP2_INDEX 2 - - /* R600+ has an async dma ring */ - #define R600_RING_TYPE_DMA_INDEX 3 -@@ -131,7 +128,14 @@ extern int radeon_aspm; - #define CAYMAN_RING_TYPE_DMA1_INDEX 4 - - /* R600+ */ --#define R600_RING_TYPE_UVD_INDEX 5 -+#define R600_RING_TYPE_UVD_INDEX 5 -+ -+/* TN+ */ -+#define TN_RING_TYPE_VCE1_INDEX 6 -+#define TN_RING_TYPE_VCE2_INDEX 7 -+ -+/* max number of rings */ -+#define RADEON_NUM_RINGS 8 - - /* hardcode those limit for now */ - #define RADEON_VA_IB_OFFSET (1 << 20) -@@ -1586,6 +1590,42 @@ int radeon_uvd_calc_upll_dividers(struct radeon_device *rdev, - int radeon_uvd_send_upll_ctlreq(struct radeon_device *rdev, - unsigned cg_upll_func_cntl); - -+/* -+ * VCE -+ */ -+#define RADEON_MAX_VCE_HANDLES 16 -+#define RADEON_VCE_STACK_SIZE (1024*1024) -+#define RADEON_VCE_HEAP_SIZE (4*1024*1024) -+ -+struct radeon_vce { -+ struct radeon_bo *vcpu_bo; -+ void *cpu_addr; -+ uint64_t gpu_addr; -+ atomic_t handles[RADEON_MAX_VCE_HANDLES]; -+ struct drm_file *filp[RADEON_MAX_VCE_HANDLES]; -+}; -+ -+int radeon_vce_init(struct radeon_device *rdev); -+void radeon_vce_fini(struct radeon_device *rdev); -+int radeon_vce_suspend(struct radeon_device *rdev); -+int radeon_vce_resume(struct radeon_device *rdev); -+int radeon_vce_get_create_msg(struct radeon_device *rdev, int ring, -+ uint32_t handle, struct radeon_fence **fence); -+int radeon_vce_get_destroy_msg(struct radeon_device *rdev, int ring, -+ uint32_t handle, struct radeon_fence **fence); -+void radeon_vce_free_handles(struct radeon_device *rdev, struct drm_file *filp); -+int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi); -+int radeon_vce_cs_parse(struct radeon_cs_parser *p); -+bool radeon_vce_semaphore_emit(struct radeon_device *rdev, -+ struct radeon_ring *ring, -+ struct radeon_semaphore *semaphore, -+ bool emit_wait); -+void radeon_vce_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); -+void radeon_vce_fence_emit(struct radeon_device *rdev, -+ struct radeon_fence *fence); -+int radeon_vce_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); -+int radeon_vce_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); -+ - struct r600_audio_pin { - int channels; - int rate; -@@ -2180,6 +2220,7 @@ struct radeon_device { - struct radeon_gem gem; - struct radeon_pm pm; - struct radeon_uvd uvd; -+ struct radeon_vce vce; - uint32_t bios_scratch[RADEON_BIOS_NUM_SCRATCH]; - struct radeon_wb wb; - struct radeon_dummy_page dummy_page; -@@ -2198,6 +2239,7 @@ struct radeon_device { - const struct firmware *sdma_fw; /* CIK SDMA firmware */ - const struct firmware *smc_fw; /* SMC firmware */ - const struct firmware *uvd_fw; /* UVD firmware */ -+ const struct firmware *vce_fw; /* VCE firmware */ - struct r600_vram_scratch vram_scratch; - int msi_enabled; /* msi enabled */ - struct r600_ih ih; /* r6/700 interrupt ring */ -diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c -index a539869..763280b 100644 ---- a/drivers/gpu/drm/radeon/radeon_asic.c -+++ b/drivers/gpu/drm/radeon/radeon_asic.c -@@ -1978,6 +1978,19 @@ static struct radeon_asic_ring ci_dma_ring = { - .set_wptr = &cik_sdma_set_wptr, - }; - -+static struct radeon_asic_ring ci_vce_ring = { -+ .ib_execute = &radeon_vce_ib_execute, -+ .emit_fence = &radeon_vce_fence_emit, -+ .emit_semaphore = &radeon_vce_semaphore_emit, -+ .cs_parse = &radeon_vce_cs_parse, -+ .ring_test = &radeon_vce_ring_test, -+ .ib_test = &radeon_vce_ib_test, -+ .is_lockup = &radeon_ring_test_lockup, -+ .get_rptr = &vce_v1_0_get_rptr, -+ .get_wptr = &vce_v1_0_get_wptr, -+ .set_wptr = &vce_v1_0_set_wptr, -+}; -+ - static struct radeon_asic ci_asic = { - .init = &cik_init, - .fini = &cik_fini, -@@ -2006,6 +2019,8 @@ static struct radeon_asic ci_asic = { - [R600_RING_TYPE_DMA_INDEX] = &ci_dma_ring, - [CAYMAN_RING_TYPE_DMA1_INDEX] = &ci_dma_ring, - [R600_RING_TYPE_UVD_INDEX] = &cayman_uvd_ring, -+ [TN_RING_TYPE_VCE1_INDEX] = &ci_vce_ring, -+ [TN_RING_TYPE_VCE2_INDEX] = &ci_vce_ring, - }, - .irq = { - .set = &cik_irq_set, -@@ -2107,6 +2122,8 @@ static struct radeon_asic kv_asic = { - [R600_RING_TYPE_DMA_INDEX] = &ci_dma_ring, - [CAYMAN_RING_TYPE_DMA1_INDEX] = &ci_dma_ring, - [R600_RING_TYPE_UVD_INDEX] = &cayman_uvd_ring, -+ [TN_RING_TYPE_VCE1_INDEX] = &ci_vce_ring, -+ [TN_RING_TYPE_VCE2_INDEX] = &ci_vce_ring, - }, - .irq = { - .set = &cik_irq_set, -diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h -index 998042e..a6c3eeb 100644 ---- a/drivers/gpu/drm/radeon/radeon_asic.h -+++ b/drivers/gpu/drm/radeon/radeon_asic.h -@@ -850,4 +850,17 @@ bool uvd_v3_1_semaphore_emit(struct radeon_device *rdev, - /* uvd v4.2 */ - int uvd_v4_2_resume(struct radeon_device *rdev); - -+/* vce v1.0 */ -+uint32_t vce_v1_0_get_rptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+uint32_t vce_v1_0_get_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+void vce_v1_0_set_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring); -+int vce_v1_0_init(struct radeon_device *rdev); -+int vce_v1_0_start(struct radeon_device *rdev); -+ -+/* vce v2.0 */ -+int vce_v2_0_resume(struct radeon_device *rdev); -+ - #endif -diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c -index 83731ff..2f8e92b 100644 ---- a/drivers/gpu/drm/radeon/radeon_cs.c -+++ b/drivers/gpu/drm/radeon/radeon_cs.c -@@ -147,6 +147,10 @@ static int radeon_cs_get_ring(struct radeon_cs_parser *p, u32 ring, s32 priority - case RADEON_CS_RING_UVD: - p->ring = R600_RING_TYPE_UVD_INDEX; - break; -+ case RADEON_CS_RING_VCE: -+ /* TODO: only use the low priority ring for now */ -+ p->ring = TN_RING_TYPE_VCE1_INDEX; -+ break; - } - return 0; - } -diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c -index 5d67422..07da88f 100644 ---- a/drivers/gpu/drm/radeon/radeon_kms.c -+++ b/drivers/gpu/drm/radeon/radeon_kms.c -@@ -579,6 +579,7 @@ void radeon_driver_preclose_kms(struct drm_device *dev, - if (rdev->cmask_filp == file_priv) - rdev->cmask_filp = NULL; - radeon_uvd_free_handles(rdev, file_priv); -+ radeon_vce_free_handles(rdev, file_priv); - } - - /* -diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c -index 65f1cea..91457f8 100644 ---- a/drivers/gpu/drm/radeon/radeon_ring.c -+++ b/drivers/gpu/drm/radeon/radeon_ring.c -@@ -814,6 +814,8 @@ static int cayman_cp2_index = CAYMAN_RING_TYPE_CP2_INDEX; - static int radeon_dma1_index = R600_RING_TYPE_DMA_INDEX; - static int radeon_dma2_index = CAYMAN_RING_TYPE_DMA1_INDEX; - static int r600_uvd_index = R600_RING_TYPE_UVD_INDEX; -+static int si_vce1_index = TN_RING_TYPE_VCE1_INDEX; -+static int si_vce2_index = TN_RING_TYPE_VCE2_INDEX; - - static struct drm_info_list radeon_debugfs_ring_info_list[] = { - {"radeon_ring_gfx", radeon_debugfs_ring_info, 0, &radeon_gfx_index}, -@@ -822,6 +824,8 @@ static struct drm_info_list radeon_debugfs_ring_info_list[] = { - {"radeon_ring_dma1", radeon_debugfs_ring_info, 0, &radeon_dma1_index}, - {"radeon_ring_dma2", radeon_debugfs_ring_info, 0, &radeon_dma2_index}, - {"radeon_ring_uvd", radeon_debugfs_ring_info, 0, &r600_uvd_index}, -+ {"radeon_ring_vce1", radeon_debugfs_ring_info, 0, &si_vce1_index}, -+ {"radeon_ring_vce2", radeon_debugfs_ring_info, 0, &si_vce2_index}, - }; - - static int radeon_debugfs_sa_info(struct seq_file *m, void *data) -diff --git a/drivers/gpu/drm/radeon/radeon_test.c b/drivers/gpu/drm/radeon/radeon_test.c -index 12e8099..3a13e0d 100644 ---- a/drivers/gpu/drm/radeon/radeon_test.c -+++ b/drivers/gpu/drm/radeon/radeon_test.c -@@ -257,20 +257,36 @@ static int radeon_test_create_and_emit_fence(struct radeon_device *rdev, - struct radeon_ring *ring, - struct radeon_fence **fence) - { -+ uint32_t handle = ring->idx ^ 0xdeafbeef; - int r; - - if (ring->idx == R600_RING_TYPE_UVD_INDEX) { -- r = radeon_uvd_get_create_msg(rdev, ring->idx, 1, NULL); -+ r = radeon_uvd_get_create_msg(rdev, ring->idx, handle, NULL); - if (r) { - DRM_ERROR("Failed to get dummy create msg\n"); - return r; - } - -- r = radeon_uvd_get_destroy_msg(rdev, ring->idx, 1, fence); -+ r = radeon_uvd_get_destroy_msg(rdev, ring->idx, handle, fence); - if (r) { - DRM_ERROR("Failed to get dummy destroy msg\n"); - return r; - } -+ -+ } else if (ring->idx == TN_RING_TYPE_VCE1_INDEX || -+ ring->idx == TN_RING_TYPE_VCE2_INDEX) { -+ r = radeon_vce_get_create_msg(rdev, ring->idx, handle, NULL); -+ if (r) { -+ DRM_ERROR("Failed to get dummy create msg\n"); -+ return r; -+ } -+ -+ r = radeon_vce_get_destroy_msg(rdev, ring->idx, handle, fence); -+ if (r) { -+ DRM_ERROR("Failed to get dummy destroy msg\n"); -+ return r; -+ } -+ - } else { - r = radeon_ring_lock(rdev, ring, 64); - if (r) { -@@ -486,6 +502,16 @@ out_cleanup: - printk(KERN_WARNING "Error while testing ring sync (%d).\n", r); - } - -+static bool radeon_test_sync_possible(struct radeon_ring *ringA, -+ struct radeon_ring *ringB) -+{ -+ if (ringA->idx == TN_RING_TYPE_VCE2_INDEX && -+ ringB->idx == TN_RING_TYPE_VCE1_INDEX) -+ return false; -+ -+ return true; -+} -+ - void radeon_test_syncing(struct radeon_device *rdev) - { - int i, j, k; -@@ -500,6 +526,9 @@ void radeon_test_syncing(struct radeon_device *rdev) - if (!ringB->ready) - continue; - -+ if (!radeon_test_sync_possible(ringA, ringB)) -+ continue; -+ - DRM_INFO("Testing syncing between rings %d and %d...\n", i, j); - radeon_test_ring_sync(rdev, ringA, ringB); - -@@ -511,6 +540,12 @@ void radeon_test_syncing(struct radeon_device *rdev) - if (!ringC->ready) - continue; - -+ if (!radeon_test_sync_possible(ringA, ringC)) -+ continue; -+ -+ if (!radeon_test_sync_possible(ringB, ringC)) -+ continue; -+ - DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, j, k); - radeon_test_ring_sync2(rdev, ringA, ringB, ringC); - -diff --git a/drivers/gpu/drm/radeon/radeon_vce.c b/drivers/gpu/drm/radeon/radeon_vce.c -new file mode 100644 -index 0000000..2547d8e ---- /dev/null -+++ b/drivers/gpu/drm/radeon/radeon_vce.c -@@ -0,0 +1,588 @@ -+/* -+ * Copyright 2013 Advanced Micro Devices, Inc. -+ * All Rights Reserved. -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining a -+ * copy of this software and associated documentation files (the -+ * "Software"), to deal in the Software without restriction, including -+ * without limitation the rights to use, copy, modify, merge, publish, -+ * distribute, sub license, and/or sell copies of the Software, and to -+ * permit persons to whom the Software is furnished to do so, subject to -+ * the following conditions: -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL -+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, -+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR -+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE -+ * USE OR OTHER DEALINGS IN THE SOFTWARE. -+ * -+ * The above copyright notice and this permission notice (including the -+ * next paragraph) shall be included in all copies or substantial portions -+ * of the Software. -+ * -+ * Authors: Christian König <christian.koenig@amd.com> -+ */ -+ -+#include <linux/firmware.h> -+#include <linux/module.h> -+#include <drm/drmP.h> -+#include <drm/drm.h> -+ -+#include "radeon.h" -+#include "radeon_asic.h" -+#include "sid.h" -+ -+/* Firmware Names */ -+#define FIRMWARE_BONAIRE "radeon/BONAIRE_vce.bin" -+ -+MODULE_FIRMWARE(FIRMWARE_BONAIRE); -+ -+/** -+ * radeon_vce_init - allocate memory, load vce firmware -+ * -+ * @rdev: radeon_device pointer -+ * -+ * First step to get VCE online, allocate memory and load the firmware -+ */ -+int radeon_vce_init(struct radeon_device *rdev) -+{ -+ unsigned long bo_size; -+ const char *fw_name; -+ int i, r; -+ -+ switch (rdev->family) { -+ case CHIP_BONAIRE: -+ case CHIP_KAVERI: -+ case CHIP_KABINI: -+ fw_name = FIRMWARE_BONAIRE; -+ break; -+ -+ default: -+ return -EINVAL; -+ } -+ -+ r = request_firmware(&rdev->vce_fw, fw_name, rdev->dev); -+ if (r) { -+ dev_err(rdev->dev, "radeon_vce: Can't load firmware \"%s\"\n", -+ fw_name); -+ return r; -+ } -+ -+ bo_size = RADEON_GPU_PAGE_ALIGN(rdev->vce_fw->size) + -+ RADEON_VCE_STACK_SIZE + RADEON_VCE_HEAP_SIZE; -+ r = radeon_bo_create(rdev, bo_size, PAGE_SIZE, true, -+ RADEON_GEM_DOMAIN_VRAM, NULL, &rdev->vce.vcpu_bo); -+ if (r) { -+ dev_err(rdev->dev, "(%d) failed to allocate VCE bo\n", r); -+ return r; -+ } -+ -+ r = radeon_vce_resume(rdev); -+ if (r) -+ return r; -+ -+ memset(rdev->vce.cpu_addr, 0, bo_size); -+ memcpy(rdev->vce.cpu_addr, rdev->vce_fw->data, rdev->vce_fw->size); -+ -+ r = radeon_vce_suspend(rdev); -+ if (r) -+ return r; -+ -+ for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) { -+ atomic_set(&rdev->vce.handles[i], 0); -+ rdev->vce.filp[i] = NULL; -+ } -+ -+ return 0; -+} -+ -+/** -+ * radeon_vce_fini - free memory -+ * -+ * @rdev: radeon_device pointer -+ * -+ * Last step on VCE teardown, free firmware memory -+ */ -+void radeon_vce_fini(struct radeon_device *rdev) -+{ -+ radeon_vce_suspend(rdev); -+ radeon_bo_unref(&rdev->vce.vcpu_bo); -+} -+ -+/** -+ * radeon_vce_suspend - unpin VCE fw memory -+ * -+ * @rdev: radeon_device pointer -+ * -+ * TODO: Test VCE suspend/resume -+ */ -+int radeon_vce_suspend(struct radeon_device *rdev) -+{ -+ int r; -+ -+ if (rdev->vce.vcpu_bo == NULL) -+ return 0; -+ -+ r = radeon_bo_reserve(rdev->vce.vcpu_bo, false); -+ if (!r) { -+ radeon_bo_kunmap(rdev->vce.vcpu_bo); -+ radeon_bo_unpin(rdev->vce.vcpu_bo); -+ radeon_bo_unreserve(rdev->vce.vcpu_bo); -+ } -+ return r; -+} -+ -+/** -+ * radeon_vce_resume - pin VCE fw memory -+ * -+ * @rdev: radeon_device pointer -+ * -+ * TODO: Test VCE suspend/resume -+ */ -+int radeon_vce_resume(struct radeon_device *rdev) -+{ -+ int r; -+ -+ if (rdev->vce.vcpu_bo == NULL) -+ return -EINVAL; -+ -+ r = radeon_bo_reserve(rdev->vce.vcpu_bo, false); -+ if (r) { -+ radeon_bo_unref(&rdev->vce.vcpu_bo); -+ dev_err(rdev->dev, "(%d) failed to reserve VCE bo\n", r); -+ return r; -+ } -+ -+ r = radeon_bo_pin(rdev->vce.vcpu_bo, RADEON_GEM_DOMAIN_VRAM, -+ &rdev->vce.gpu_addr); -+ if (r) { -+ radeon_bo_unreserve(rdev->vce.vcpu_bo); -+ radeon_bo_unref(&rdev->vce.vcpu_bo); -+ dev_err(rdev->dev, "(%d) VCE bo pin failed\n", r); -+ return r; -+ } -+ -+ r = radeon_bo_kmap(rdev->vce.vcpu_bo, &rdev->vce.cpu_addr); -+ if (r) { -+ dev_err(rdev->dev, "(%d) VCE map failed\n", r); -+ return r; -+ } -+ -+ radeon_bo_unreserve(rdev->vce.vcpu_bo); -+ -+ return 0; -+} -+ -+/** -+ * radeon_vce_free_handles - free still open VCE handles -+ * -+ * @rdev: radeon_device pointer -+ * @filp: drm file pointer -+ * -+ * Close all VCE handles still open by this file pointer -+ */ -+void radeon_vce_free_handles(struct radeon_device *rdev, struct drm_file *filp) -+{ -+ int i, r; -+ for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) { -+ uint32_t handle = atomic_read(&rdev->vce.handles[i]); -+ if (!handle || rdev->vce.filp[i] != filp) -+ continue; -+ -+ r = radeon_vce_get_destroy_msg(rdev, TN_RING_TYPE_VCE1_INDEX, -+ handle, NULL); -+ if (r) -+ DRM_ERROR("Error destroying VCE handle (%d)!\n", r); -+ -+ rdev->vce.filp[i] = NULL; -+ atomic_set(&rdev->vce.handles[i], 0); -+ } -+} -+ -+/** -+ * radeon_vce_get_create_msg - generate a VCE create msg -+ * -+ * @rdev: radeon_device pointer -+ * @ring: ring we should submit the msg to -+ * @handle: VCE session handle to use -+ * @fence: optional fence to return -+ * -+ * Open up a stream for HW test -+ */ -+int radeon_vce_get_create_msg(struct radeon_device *rdev, int ring, -+ uint32_t handle, struct radeon_fence **fence) -+{ -+ const unsigned ib_size_dw = 1024; -+ struct radeon_ib ib; -+ uint64_t dummy; -+ int i, r; -+ -+ r = radeon_ib_get(rdev, ring, &ib, NULL, ib_size_dw * 4); -+ if (r) { -+ DRM_ERROR("radeon: failed to get ib (%d).\n", r); -+ return r; -+ } -+ -+ dummy = ib.gpu_addr + 1024; -+ -+ /* stitch together an VCE create msg */ -+ ib.length_dw = 0; -+ ib.ptr[ib.length_dw++] = 0x0000000c; /* len */ -+ ib.ptr[ib.length_dw++] = 0x00000001; /* session cmd */ -+ ib.ptr[ib.length_dw++] = handle; -+ -+ ib.ptr[ib.length_dw++] = 0x00000030; /* len */ -+ ib.ptr[ib.length_dw++] = 0x01000001; /* create cmd */ -+ ib.ptr[ib.length_dw++] = 0x00000000; -+ ib.ptr[ib.length_dw++] = 0x00000042; -+ ib.ptr[ib.length_dw++] = 0x0000000a; -+ ib.ptr[ib.length_dw++] = 0x00000001; -+ ib.ptr[ib.length_dw++] = 0x00000080; -+ ib.ptr[ib.length_dw++] = 0x00000060; -+ ib.ptr[ib.length_dw++] = 0x00000100; -+ ib.ptr[ib.length_dw++] = 0x00000100; -+ ib.ptr[ib.length_dw++] = 0x0000000c; -+ ib.ptr[ib.length_dw++] = 0x00000000; -+ -+ ib.ptr[ib.length_dw++] = 0x00000014; /* len */ -+ ib.ptr[ib.length_dw++] = 0x05000005; /* feedback buffer */ -+ ib.ptr[ib.length_dw++] = upper_32_bits(dummy); -+ ib.ptr[ib.length_dw++] = dummy; -+ ib.ptr[ib.length_dw++] = 0x00000001; -+ -+ for (i = ib.length_dw; i < ib_size_dw; ++i) -+ ib.ptr[i] = 0x0; -+ -+ r = radeon_ib_schedule(rdev, &ib, NULL); -+ if (r) { -+ DRM_ERROR("radeon: failed to schedule ib (%d).\n", r); -+ } -+ -+ if (fence) -+ *fence = radeon_fence_ref(ib.fence); -+ -+ radeon_ib_free(rdev, &ib); -+ -+ return r; -+} -+ -+/** -+ * radeon_vce_get_destroy_msg - generate a VCE destroy msg -+ * -+ * @rdev: radeon_device pointer -+ * @ring: ring we should submit the msg to -+ * @handle: VCE session handle to use -+ * @fence: optional fence to return -+ * -+ * Close up a stream for HW test or if userspace failed to do so -+ */ -+int radeon_vce_get_destroy_msg(struct radeon_device *rdev, int ring, -+ uint32_t handle, struct radeon_fence **fence) -+{ -+ const unsigned ib_size_dw = 1024; -+ struct radeon_ib ib; -+ uint64_t dummy; -+ int i, r; -+ -+ r = radeon_ib_get(rdev, ring, &ib, NULL, ib_size_dw * 4); -+ if (r) { -+ DRM_ERROR("radeon: failed to get ib (%d).\n", r); -+ return r; -+ } -+ -+ dummy = ib.gpu_addr + 1024; -+ -+ /* stitch together an VCE destroy msg */ -+ ib.length_dw = 0; -+ ib.ptr[ib.length_dw++] = 0x0000000c; /* len */ -+ ib.ptr[ib.length_dw++] = 0x00000001; /* session cmd */ -+ ib.ptr[ib.length_dw++] = handle; -+ -+ ib.ptr[ib.length_dw++] = 0x00000014; /* len */ -+ ib.ptr[ib.length_dw++] = 0x05000005; /* feedback buffer */ -+ ib.ptr[ib.length_dw++] = upper_32_bits(dummy); -+ ib.ptr[ib.length_dw++] = dummy; -+ ib.ptr[ib.length_dw++] = 0x00000001; -+ -+ ib.ptr[ib.length_dw++] = 0x00000008; /* len */ -+ ib.ptr[ib.length_dw++] = 0x02000001; /* destroy cmd */ -+ -+ for (i = ib.length_dw; i < ib_size_dw; ++i) -+ ib.ptr[i] = 0x0; -+ -+ r = radeon_ib_schedule(rdev, &ib, NULL); -+ if (r) { -+ DRM_ERROR("radeon: failed to schedule ib (%d).\n", r); -+ } -+ -+ if (fence) -+ *fence = radeon_fence_ref(ib.fence); -+ -+ radeon_ib_free(rdev, &ib); -+ -+ return r; -+} -+ -+/** -+ * radeon_vce_cs_reloc - command submission relocation -+ * -+ * @p: parser context -+ * @lo: address of lower dword -+ * @hi: address of higher dword -+ * -+ * Patch relocation inside command stream with real buffer address -+ */ -+int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi) -+{ -+ struct radeon_cs_chunk *relocs_chunk; -+ uint64_t offset; -+ unsigned idx; -+ -+ relocs_chunk = &p->chunks[p->chunk_relocs_idx]; -+ offset = radeon_get_ib_value(p, lo); -+ idx = radeon_get_ib_value(p, hi); -+ -+ if (idx >= relocs_chunk->length_dw) { -+ DRM_ERROR("Relocs at %d after relocations chunk end %d !\n", -+ idx, relocs_chunk->length_dw); -+ return -EINVAL; -+ } -+ -+ offset += p->relocs_ptr[(idx / 4)]->lobj.gpu_offset; -+ -+ p->ib.ptr[lo] = offset & 0xFFFFFFFF; -+ p->ib.ptr[hi] = offset >> 32; -+ -+ return 0; -+} -+ -+/** -+ * radeon_vce_cs_parse - parse and validate the command stream -+ * -+ * @p: parser context -+ * -+ */ -+int radeon_vce_cs_parse(struct radeon_cs_parser *p) -+{ -+ uint32_t handle = 0; -+ bool destroy = false; -+ int i, r; -+ -+ while (p->idx < p->chunks[p->chunk_ib_idx].length_dw) { -+ uint32_t len = radeon_get_ib_value(p, p->idx); -+ uint32_t cmd = radeon_get_ib_value(p, p->idx + 1); -+ -+ if ((len < 8) || (len & 3)) { -+ DRM_ERROR("invalid VCE command length (%d)!\n", len); -+ return -EINVAL; -+ } -+ -+ switch (cmd) { -+ case 0x00000001: // session -+ handle = radeon_get_ib_value(p, p->idx + 2); -+ break; -+ -+ case 0x00000002: // task info -+ case 0x01000001: // create -+ case 0x04000001: // config extension -+ case 0x04000002: // pic control -+ case 0x04000005: // rate control -+ case 0x04000007: // motion estimation -+ case 0x04000008: // rdo -+ break; -+ -+ case 0x03000001: // encode -+ r = radeon_vce_cs_reloc(p, p->idx + 10, p->idx + 9); -+ if (r) -+ return r; -+ -+ r = radeon_vce_cs_reloc(p, p->idx + 12, p->idx + 11); -+ if (r) -+ return r; -+ break; -+ -+ case 0x02000001: // destroy -+ destroy = true; -+ break; -+ -+ case 0x05000001: // context buffer -+ case 0x05000004: // video bitstream buffer -+ case 0x05000005: // feedback buffer -+ r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2); -+ if (r) -+ return r; -+ break; -+ -+ default: -+ DRM_ERROR("invalid VCE command (0x%x)!\n", cmd); -+ return -EINVAL; -+ } -+ -+ p->idx += len / 4; -+ } -+ -+ if (destroy) { -+ /* IB contains a destroy msg, free the handle */ -+ for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) -+ atomic_cmpxchg(&p->rdev->vce.handles[i], handle, 0); -+ -+ return 0; -+ } -+ -+ /* create or encode, validate the handle */ -+ for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) { -+ if (atomic_read(&p->rdev->vce.handles[i]) == handle) -+ return 0; -+ } -+ -+ /* handle not found try to alloc a new one */ -+ for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) { -+ if (!atomic_cmpxchg(&p->rdev->vce.handles[i], 0, handle)) { -+ p->rdev->vce.filp[i] = p->filp; -+ return 0; -+ } -+ } -+ -+ DRM_ERROR("No more free VCE handles!\n"); -+ return -EINVAL; -+} -+ -+/** -+ * radeon_vce_semaphore_emit - emit a semaphore command -+ * -+ * @rdev: radeon_device pointer -+ * @ring: engine to use -+ * @semaphore: address of semaphore -+ * @emit_wait: true=emit wait, false=emit signal -+ * -+ */ -+bool radeon_vce_semaphore_emit(struct radeon_device *rdev, -+ struct radeon_ring *ring, -+ struct radeon_semaphore *semaphore, -+ bool emit_wait) -+{ -+ uint64_t addr = semaphore->gpu_addr; -+ -+ radeon_ring_write(ring, VCE_CMD_SEMAPHORE); -+ radeon_ring_write(ring, (addr >> 3) & 0x000FFFFF); -+ radeon_ring_write(ring, (addr >> 23) & 0x000FFFFF); -+ radeon_ring_write(ring, 0x01003000 | (emit_wait ? 1 : 0)); -+ if (!emit_wait) -+ radeon_ring_write(ring, VCE_CMD_END); -+ -+ return true; -+} -+ -+/** -+ * radeon_vce_ib_execute - execute indirect buffer -+ * -+ * @rdev: radeon_device pointer -+ * @ib: the IB to execute -+ * -+ */ -+void radeon_vce_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) -+{ -+ struct radeon_ring *ring = &rdev->ring[ib->ring]; -+ radeon_ring_write(ring, VCE_CMD_IB); -+ radeon_ring_write(ring, ib->gpu_addr); -+ radeon_ring_write(ring, upper_32_bits(ib->gpu_addr)); -+ radeon_ring_write(ring, ib->length_dw); -+} -+ -+/** -+ * radeon_vce_fence_emit - add a fence command to the ring -+ * -+ * @rdev: radeon_device pointer -+ * @fence: the fence -+ * -+ */ -+void radeon_vce_fence_emit(struct radeon_device *rdev, -+ struct radeon_fence *fence) -+{ -+ struct radeon_ring *ring = &rdev->ring[fence->ring]; -+ uint32_t addr = rdev->fence_drv[fence->ring].gpu_addr; -+ -+ radeon_ring_write(ring, VCE_CMD_FENCE); -+ radeon_ring_write(ring, addr); -+ radeon_ring_write(ring, upper_32_bits(addr)); -+ radeon_ring_write(ring, fence->seq); -+ radeon_ring_write(ring, VCE_CMD_TRAP); -+ radeon_ring_write(ring, VCE_CMD_END); -+} -+ -+/** -+ * radeon_vce_ring_test - test if VCE ring is working -+ * -+ * @rdev: radeon_device pointer -+ * @ring: the engine to test on -+ * -+ */ -+int radeon_vce_ring_test(struct radeon_device *rdev, struct radeon_ring *ring) -+{ -+ uint32_t rptr = vce_v1_0_get_rptr(rdev, ring); -+ unsigned i; -+ int r; -+ -+ r = radeon_ring_lock(rdev, ring, 16); -+ if (r) { -+ DRM_ERROR("radeon: vce failed to lock ring %d (%d).\n", -+ ring->idx, r); -+ return r; -+ } -+ radeon_ring_write(ring, VCE_CMD_END); -+ radeon_ring_unlock_commit(rdev, ring); -+ -+ for (i = 0; i < rdev->usec_timeout; i++) { -+ if (vce_v1_0_get_rptr(rdev, ring) != rptr) -+ break; -+ DRM_UDELAY(1); -+ } -+ -+ if (i < rdev->usec_timeout) { -+ DRM_INFO("ring test on %d succeeded in %d usecs\n", -+ ring->idx, i); -+ } else { -+ DRM_ERROR("radeon: ring %d test failed\n", -+ ring->idx); -+ r = -ETIMEDOUT; -+ } -+ -+ return r; -+} -+ -+/** -+ * radeon_vce_ib_test - test if VCE IBs are working -+ * -+ * @rdev: radeon_device pointer -+ * @ring: the engine to test on -+ * -+ */ -+int radeon_vce_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) -+{ -+ struct radeon_fence *fence = NULL; -+ int r; -+ -+ r = radeon_vce_get_create_msg(rdev, ring->idx, 1, NULL); -+ if (r) { -+ DRM_ERROR("radeon: failed to get create msg (%d).\n", r); -+ goto error; -+ } -+ -+ r = radeon_vce_get_destroy_msg(rdev, ring->idx, 1, &fence); -+ if (r) { -+ DRM_ERROR("radeon: failed to get destroy ib (%d).\n", r); -+ goto error; -+ } -+ -+ r = radeon_fence_wait(fence, false); -+ if (r) { -+ DRM_ERROR("radeon: fence wait failed (%d).\n", r); -+ } else { -+ DRM_INFO("ib test on ring %d succeeded\n", ring->idx); -+ } -+error: -+ radeon_fence_unref(&fence); -+ return r; -+} -diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h -index db3dd87..1da5a7a 100644 ---- a/drivers/gpu/drm/radeon/sid.h -+++ b/drivers/gpu/drm/radeon/sid.h -@@ -1747,4 +1747,51 @@ - #define DMA_PACKET_CONSTANT_FILL 0xd - #define DMA_PACKET_NOP 0xf - -+#define VCE_STATUS 0x20004 -+#define VCE_VCPU_CNTL 0x20014 -+#define VCE_CLK_EN (1 << 0) -+#define VCE_VCPU_CACHE_OFFSET0 0x20024 -+#define VCE_VCPU_CACHE_SIZE0 0x20028 -+#define VCE_VCPU_CACHE_OFFSET1 0x2002c -+#define VCE_VCPU_CACHE_SIZE1 0x20030 -+#define VCE_VCPU_CACHE_OFFSET2 0x20034 -+#define VCE_VCPU_CACHE_SIZE2 0x20038 -+#define VCE_SOFT_RESET 0x20120 -+#define VCE_ECPU_SOFT_RESET (1 << 0) -+#define VCE_FME_SOFT_RESET (1 << 2) -+#define VCE_RB_BASE_LO2 0x2016c -+#define VCE_RB_BASE_HI2 0x20170 -+#define VCE_RB_SIZE2 0x20174 -+#define VCE_RB_RPTR2 0x20178 -+#define VCE_RB_WPTR2 0x2017c -+#define VCE_RB_BASE_LO 0x20180 -+#define VCE_RB_BASE_HI 0x20184 -+#define VCE_RB_SIZE 0x20188 -+#define VCE_RB_RPTR 0x2018c -+#define VCE_RB_WPTR 0x20190 -+#define VCE_CLOCK_GATING_A 0x202f8 -+#define VCE_CLOCK_GATING_B 0x202fc -+#define VCE_UENC_CLOCK_GATING 0x205bc -+#define VCE_UENC_REG_CLOCK_GATING 0x205c0 -+#define VCE_FW_REG_STATUS 0x20e10 -+# define VCE_FW_REG_STATUS_BUSY (1 << 0) -+# define VCE_FW_REG_STATUS_PASS (1 << 3) -+# define VCE_FW_REG_STATUS_DONE (1 << 11) -+#define VCE_LMI_FW_START_KEYSEL 0x20e18 -+#define VCE_LMI_FW_PERIODIC_CTRL 0x20e20 -+#define VCE_LMI_CTRL2 0x20e74 -+#define VCE_LMI_CTRL 0x20e98 -+#define VCE_LMI_VM_CTRL 0x20ea0 -+#define VCE_LMI_SWAP_CNTL 0x20eb4 -+#define VCE_LMI_SWAP_CNTL1 0x20eb8 -+#define VCE_LMI_CACHE_CTRL 0x20ef4 -+ -+#define VCE_CMD_NO_OP 0x00000000 -+#define VCE_CMD_END 0x00000001 -+#define VCE_CMD_IB 0x00000002 -+#define VCE_CMD_FENCE 0x00000003 -+#define VCE_CMD_TRAP 0x00000004 -+#define VCE_CMD_IB_AUTO 0x00000005 -+#define VCE_CMD_SEMAPHORE 0x00000006 -+ - #endif -diff --git a/drivers/gpu/drm/radeon/vce_v1_0.c b/drivers/gpu/drm/radeon/vce_v1_0.c -new file mode 100644 -index 0000000..e0c3534 ---- /dev/null -+++ b/drivers/gpu/drm/radeon/vce_v1_0.c -@@ -0,0 +1,187 @@ -+/* -+ * Copyright 2013 Advanced Micro Devices, Inc. -+ * All Rights Reserved. -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining a -+ * copy of this software and associated documentation files (the -+ * "Software"), to deal in the Software without restriction, including -+ * without limitation the rights to use, copy, modify, merge, publish, -+ * distribute, sub license, and/or sell copies of the Software, and to -+ * permit persons to whom the Software is furnished to do so, subject to -+ * the following conditions: -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL -+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, -+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR -+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE -+ * USE OR OTHER DEALINGS IN THE SOFTWARE. -+ * -+ * The above copyright notice and this permission notice (including the -+ * next paragraph) shall be included in all copies or substantial portions -+ * of the Software. -+ * -+ * Authors: Christian König <christian.koenig@amd.com> -+ */ -+ -+#include <linux/firmware.h> -+#include <drm/drmP.h> -+#include "radeon.h" -+#include "radeon_asic.h" -+#include "sid.h" -+ -+/** -+ * vce_v1_0_get_rptr - get read pointer -+ * -+ * @rdev: radeon_device pointer -+ * @ring: radeon_ring pointer -+ * -+ * Returns the current hardware read pointer -+ */ -+uint32_t vce_v1_0_get_rptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ if (ring->idx == TN_RING_TYPE_VCE1_INDEX) -+ return RREG32(VCE_RB_RPTR); -+ else -+ return RREG32(VCE_RB_RPTR2); -+} -+ -+/** -+ * vce_v1_0_get_wptr - get write pointer -+ * -+ * @rdev: radeon_device pointer -+ * @ring: radeon_ring pointer -+ * -+ * Returns the current hardware write pointer -+ */ -+uint32_t vce_v1_0_get_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ if (ring->idx == TN_RING_TYPE_VCE1_INDEX) -+ return RREG32(VCE_RB_WPTR); -+ else -+ return RREG32(VCE_RB_WPTR2); -+} -+ -+/** -+ * vce_v1_0_set_wptr - set write pointer -+ * -+ * @rdev: radeon_device pointer -+ * @ring: radeon_ring pointer -+ * -+ * Commits the write pointer to the hardware -+ */ -+void vce_v1_0_set_wptr(struct radeon_device *rdev, -+ struct radeon_ring *ring) -+{ -+ if (ring->idx == TN_RING_TYPE_VCE1_INDEX) -+ WREG32(VCE_RB_WPTR, ring->wptr); -+ else -+ WREG32(VCE_RB_WPTR2, ring->wptr); -+} -+ -+/** -+ * vce_v1_0_start - start VCE block -+ * -+ * @rdev: radeon_device pointer -+ * -+ * Setup and start the VCE block -+ */ -+int vce_v1_0_start(struct radeon_device *rdev) -+{ -+ struct radeon_ring *ring; -+ int i, j, r; -+ -+ /* set BUSY flag */ -+ WREG32_P(VCE_STATUS, 1, ~1); -+ -+ ring = &rdev->ring[TN_RING_TYPE_VCE1_INDEX]; -+ WREG32(VCE_RB_RPTR, ring->rptr); -+ WREG32(VCE_RB_WPTR, ring->wptr); -+ WREG32(VCE_RB_BASE_LO, ring->gpu_addr); -+ WREG32(VCE_RB_BASE_HI, upper_32_bits(ring->gpu_addr)); -+ WREG32(VCE_RB_SIZE, ring->ring_size / 4); -+ -+ ring = &rdev->ring[TN_RING_TYPE_VCE2_INDEX]; -+ WREG32(VCE_RB_RPTR2, ring->rptr); -+ WREG32(VCE_RB_WPTR2, ring->wptr); -+ WREG32(VCE_RB_BASE_LO2, ring->gpu_addr); -+ WREG32(VCE_RB_BASE_HI2, upper_32_bits(ring->gpu_addr)); -+ WREG32(VCE_RB_SIZE2, ring->ring_size / 4); -+ -+ WREG32_P(VCE_VCPU_CNTL, VCE_CLK_EN, ~VCE_CLK_EN); -+ -+ WREG32_P(VCE_SOFT_RESET, -+ VCE_ECPU_SOFT_RESET | -+ VCE_FME_SOFT_RESET, ~( -+ VCE_ECPU_SOFT_RESET | -+ VCE_FME_SOFT_RESET)); -+ -+ mdelay(100); -+ -+ WREG32_P(VCE_SOFT_RESET, 0, ~( -+ VCE_ECPU_SOFT_RESET | -+ VCE_FME_SOFT_RESET)); -+ -+ for (i = 0; i < 10; ++i) { -+ uint32_t status; -+ for (j = 0; j < 100; ++j) { -+ status = RREG32(VCE_STATUS); -+ if (status & 2) -+ break; -+ mdelay(10); -+ } -+ r = 0; -+ if (status & 2) -+ break; -+ -+ DRM_ERROR("VCE not responding, trying to reset the ECPU!!!\n"); -+ WREG32_P(VCE_SOFT_RESET, VCE_ECPU_SOFT_RESET, ~VCE_ECPU_SOFT_RESET); -+ mdelay(10); -+ WREG32_P(VCE_SOFT_RESET, 0, ~VCE_ECPU_SOFT_RESET); -+ mdelay(10); -+ r = -1; -+ } -+ -+ /* clear BUSY flag */ -+ WREG32_P(VCE_STATUS, 0, ~1); -+ -+ if (r) { -+ DRM_ERROR("VCE not responding, giving up!!!\n"); -+ return r; -+ } -+ -+ return 0; -+} -+ -+int vce_v1_0_init(struct radeon_device *rdev) -+{ -+ struct radeon_ring *ring; -+ int r; -+ -+ r = vce_v1_0_start(rdev); -+ if (r) -+ return r; -+ -+ ring = &rdev->ring[TN_RING_TYPE_VCE1_INDEX]; -+ ring->ready = true; -+ r = radeon_ring_test(rdev, TN_RING_TYPE_VCE1_INDEX, ring); -+ if (r) { -+ ring->ready = false; -+ return r; -+ } -+ -+ ring = &rdev->ring[TN_RING_TYPE_VCE2_INDEX]; -+ ring->ready = true; -+ r = radeon_ring_test(rdev, TN_RING_TYPE_VCE2_INDEX, ring); -+ if (r) { -+ ring->ready = false; -+ return r; -+ } -+ -+ DRM_INFO("VCE initialized successfully.\n"); -+ -+ return 0; -+} -diff --git a/drivers/gpu/drm/radeon/vce_v2_0.c b/drivers/gpu/drm/radeon/vce_v2_0.c -new file mode 100644 -index 0000000..4911d1b ---- /dev/null -+++ b/drivers/gpu/drm/radeon/vce_v2_0.c -@@ -0,0 +1,70 @@ -+/* -+ * Copyright 2013 Advanced Micro Devices, Inc. -+ * All Rights Reserved. -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining a -+ * copy of this software and associated documentation files (the -+ * "Software"), to deal in the Software without restriction, including -+ * without limitation the rights to use, copy, modify, merge, publish, -+ * distribute, sub license, and/or sell copies of the Software, and to -+ * permit persons to whom the Software is furnished to do so, subject to -+ * the following conditions: -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL -+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, -+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR -+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE -+ * USE OR OTHER DEALINGS IN THE SOFTWARE. -+ * -+ * The above copyright notice and this permission notice (including the -+ * next paragraph) shall be included in all copies or substantial portions -+ * of the Software. -+ * -+ * Authors: Christian König <christian.koenig@amd.com> -+ */ -+ -+#include <linux/firmware.h> -+#include <drm/drmP.h> -+#include "radeon.h" -+#include "radeon_asic.h" -+#include "cikd.h" -+ -+int vce_v2_0_resume(struct radeon_device *rdev) -+{ -+ uint64_t addr = rdev->vce.gpu_addr; -+ uint32_t size; -+ -+ WREG32_P(VCE_CLOCK_GATING_A, 0, ~(1 << 16)); -+ WREG32_P(VCE_UENC_CLOCK_GATING, 0x1FF000, ~0xFF9FF000); -+ WREG32_P(VCE_UENC_REG_CLOCK_GATING, 0x3F, ~0x3F); -+ WREG32(VCE_CLOCK_GATING_B, 0xf7); -+ -+ WREG32(VCE_LMI_CTRL, 0x00398000); -+ WREG32_P(VCE_LMI_CACHE_CTRL, 0x0, ~0x1); -+ WREG32(VCE_LMI_SWAP_CNTL, 0); -+ WREG32(VCE_LMI_SWAP_CNTL1, 0); -+ WREG32(VCE_LMI_VM_CTRL, 0); -+ -+ size = RADEON_GPU_PAGE_ALIGN(rdev->vce_fw->size); -+ WREG32(VCE_VCPU_CACHE_OFFSET0, addr & 0x7fffffff); -+ WREG32(VCE_VCPU_CACHE_SIZE0, size); -+ -+ addr += size; -+ size = RADEON_VCE_STACK_SIZE; -+ WREG32(VCE_VCPU_CACHE_OFFSET1, addr & 0x7fffffff); -+ WREG32(VCE_VCPU_CACHE_SIZE1, size); -+ -+ addr += size; -+ size = RADEON_VCE_HEAP_SIZE; -+ WREG32(VCE_VCPU_CACHE_OFFSET2, addr & 0x7fffffff); -+ WREG32(VCE_VCPU_CACHE_SIZE2, size); -+ -+ WREG32_P(VCE_LMI_CTRL2, 0x0, ~0x100); -+ -+ WREG32_P(VCE_SYS_INT_EN, VCE_SYS_INT_TRAP_INTERRUPT_EN, -+ ~VCE_SYS_INT_TRAP_INTERRUPT_EN); -+ -+ return 0; -+} -diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h -index fe421e8..b93c92a 100644 ---- a/include/uapi/drm/radeon_drm.h -+++ b/include/uapi/drm/radeon_drm.h -@@ -919,6 +919,7 @@ struct drm_radeon_gem_va { - #define RADEON_CS_RING_COMPUTE 1 - #define RADEON_CS_RING_DMA 2 - #define RADEON_CS_RING_UVD 3 -+#define RADEON_CS_RING_VCE 4 - /* The third dword of RADEON_CHUNK_ID_FLAGS is a sint32 that sets the priority */ - /* 0 = normal, + = higher priority, - = lower priority */ - --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0028-yocto-amd-drm-radeon-add-VCE-ring-query.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0028-yocto-amd-drm-radeon-add-VCE-ring-query.patch deleted file mode 100644 index f68e0058..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0028-yocto-amd-drm-radeon-add-VCE-ring-query.patch +++ /dev/null @@ -1,30 +0,0 @@ -From dbc2d98551a2f32b8e7ad375ccc6b18bb8ef9709 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Mon, 27 Jan 2014 10:16:06 -0700 -Subject: [PATCH 28/44] drm/radeon: add VCE ring query -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Christian König <christian.koenig@amd.com> ---- - drivers/gpu/drm/radeon/radeon_kms.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c -index 07da88f..c9dd7ef 100644 ---- a/drivers/gpu/drm/radeon/radeon_kms.c -+++ b/drivers/gpu/drm/radeon/radeon_kms.c -@@ -417,6 +417,9 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) - case RADEON_CS_RING_UVD: - *value = rdev->ring[R600_RING_TYPE_UVD_INDEX].ready; - break; -+ case RADEON_CS_RING_VCE: -+ *value = rdev->ring[TN_RING_TYPE_VCE1_INDEX].ready; -+ break; - default: - return -EINVAL; - } --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0029-yocto-amd-drm-radeon-add-VCE-version-parsing-and-checking.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0029-yocto-amd-drm-radeon-add-VCE-version-parsing-and-checking.patch deleted file mode 100644 index 1f11b462..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0029-yocto-amd-drm-radeon-add-VCE-version-parsing-and-checking.patch +++ /dev/null @@ -1,147 +0,0 @@ -From 511a68ce32e94aa20be2ed70b3eccb059aef87bb Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> -Date: Thu, 23 Jan 2014 09:50:49 -0700 -Subject: [PATCH 29/44] drm/radeon: add VCE version parsing and checking -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Also make the result available to userspace. - -Signed-off-by: Christian König <christian.koenig@amd.com> ---- - drivers/gpu/drm/radeon/radeon.h | 2 ++ - drivers/gpu/drm/radeon/radeon_kms.c | 6 ++++ - drivers/gpu/drm/radeon/radeon_vce.c | 56 +++++++++++++++++++++++++++++++---- - include/uapi/drm/radeon_drm.h | 4 +++ - 4 files changed, 62 insertions(+), 6 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h -index 094e5f5..6abe303 100644 ---- a/drivers/gpu/drm/radeon/radeon.h -+++ b/drivers/gpu/drm/radeon/radeon.h -@@ -1601,6 +1601,8 @@ struct radeon_vce { - struct radeon_bo *vcpu_bo; - void *cpu_addr; - uint64_t gpu_addr; -+ unsigned fw_version; -+ unsigned fb_version; - atomic_t handles[RADEON_MAX_VCE_HANDLES]; - struct drm_file *filp[RADEON_MAX_VCE_HANDLES]; - }; -diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c -index c9dd7ef..cc2d29d 100644 ---- a/drivers/gpu/drm/radeon/radeon_kms.c -+++ b/drivers/gpu/drm/radeon/radeon_kms.c -@@ -457,6 +457,12 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) - DRM_DEBUG_KMS("BACKEND_ENABLED_MASK is si+ only!\n"); - } - break; -+ case RADEON_INFO_VCE_FW_VERSION: -+ *value = rdev->vce.fw_version; -+ break; -+ case RADEON_INFO_VCE_FB_VERSION: -+ *value = rdev->vce.fb_version; -+ break; - default: - DRM_DEBUG_KMS("Invalid request %d\n", info->request); - return -EINVAL; -diff --git a/drivers/gpu/drm/radeon/radeon_vce.c b/drivers/gpu/drm/radeon/radeon_vce.c -index 2547d8e..f46563b 100644 ---- a/drivers/gpu/drm/radeon/radeon_vce.c -+++ b/drivers/gpu/drm/radeon/radeon_vce.c -@@ -48,8 +48,11 @@ MODULE_FIRMWARE(FIRMWARE_BONAIRE); - */ - int radeon_vce_init(struct radeon_device *rdev) - { -- unsigned long bo_size; -- const char *fw_name; -+ static const char *fw_version = "[ATI LIB=VCEFW,"; -+ static const char *fb_version = "[ATI LIB=VCEFWSTATS,"; -+ unsigned long size; -+ const char *fw_name, *c; -+ uint8_t start, mid, end; - int i, r; - - switch (rdev->family) { -@@ -70,9 +73,50 @@ int radeon_vce_init(struct radeon_device *rdev) - return r; - } - -- bo_size = RADEON_GPU_PAGE_ALIGN(rdev->vce_fw->size) + -- RADEON_VCE_STACK_SIZE + RADEON_VCE_HEAP_SIZE; -- r = radeon_bo_create(rdev, bo_size, PAGE_SIZE, true, -+ /* search for firmware version */ -+ -+ size = rdev->vce_fw->size - strlen(fw_version) - 9; -+ c = rdev->vce_fw->data; -+ for (;size > 0; --size, ++c) -+ if (strncmp(c, fw_version, strlen(fw_version)) == 0) -+ break; -+ -+ if (size == 0) -+ return -EINVAL; -+ -+ c += strlen(fw_version); -+ if (sscanf(c, "%2hhd.%2hhd.%2hhd]", &start, &mid, &end) != 3) -+ return -EINVAL; -+ -+ /* search for feedback version */ -+ -+ size = rdev->vce_fw->size - strlen(fb_version) - 3; -+ c = rdev->vce_fw->data; -+ for (;size > 0; --size, ++c) -+ if (strncmp(c, fb_version, strlen(fb_version)) == 0) -+ break; -+ -+ if (size == 0) -+ return -EINVAL; -+ -+ c += strlen(fb_version); -+ if (sscanf(c, "%2u]", &rdev->vce.fb_version) != 1) -+ return -EINVAL; -+ -+ DRM_INFO("Found VCE firmware/feedback version %hhd.%hhd.%hhd / %d!\n", -+ start, mid, end, rdev->vce.fb_version); -+ -+ rdev->vce.fw_version = (start << 24) | (mid << 16) | (end << 8); -+ -+ /* we can only work with this fw version for now */ -+ if (rdev->vce.fw_version != ((40 << 24) | (2 << 16) | (2 << 8))) -+ return -EINVAL; -+ -+ /* load firmware into VRAM */ -+ -+ size = RADEON_GPU_PAGE_ALIGN(rdev->vce_fw->size) + -+ RADEON_VCE_STACK_SIZE + RADEON_VCE_HEAP_SIZE; -+ r = radeon_bo_create(rdev, size, PAGE_SIZE, true, - RADEON_GEM_DOMAIN_VRAM, NULL, &rdev->vce.vcpu_bo); - if (r) { - dev_err(rdev->dev, "(%d) failed to allocate VCE bo\n", r); -@@ -83,7 +127,7 @@ int radeon_vce_init(struct radeon_device *rdev) - if (r) - return r; - -- memset(rdev->vce.cpu_addr, 0, bo_size); -+ memset(rdev->vce.cpu_addr, 0, size); - memcpy(rdev->vce.cpu_addr, rdev->vce_fw->data, rdev->vce_fw->size); - - r = radeon_vce_suspend(rdev); -diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h -index b93c92a..2ff6e71 100644 ---- a/include/uapi/drm/radeon_drm.h -+++ b/include/uapi/drm/radeon_drm.h -@@ -986,6 +986,10 @@ struct drm_radeon_cs { - #define RADEON_INFO_CIK_MACROTILE_MODE_ARRAY 0x18 - /* query the number of render backends */ - #define RADEON_INFO_SI_BACKEND_ENABLED_MASK 0x19 -+/* version of VCE firmware */ -+#define RADEON_INFO_VCE_FW_VERSION 0x1b -+/* version of VCE feedback */ -+#define RADEON_INFO_VCE_FB_VERSION 0x1c - - - struct drm_radeon_info { --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0030-yocto-amd-drm-radeon-add-callback-for-setting-vce-clocks.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0030-yocto-amd-drm-radeon-add-callback-for-setting-vce-clocks.patch deleted file mode 100644 index 26edee67..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0030-yocto-amd-drm-radeon-add-callback-for-setting-vce-clocks.patch +++ /dev/null @@ -1,35 +0,0 @@ -From f6b00233428f66b0a57d6d9943c05eff10169f6b Mon Sep 17 00:00:00 2001 -From: Alex Deucher <alexander.deucher@amd.com> -Date: Tue, 20 Aug 2013 20:01:18 -0400 -Subject: [PATCH 30/44] drm/radeon: add callback for setting vce clocks - -Similar to uvd clock setting. - -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/radeon/radeon.h | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h -index 6abe303..f0ad724 100644 ---- a/drivers/gpu/drm/radeon/radeon.h -+++ b/drivers/gpu/drm/radeon/radeon.h -@@ -1817,6 +1817,7 @@ struct radeon_asic { - void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes); - void (*set_clock_gating)(struct radeon_device *rdev, int enable); - int (*set_uvd_clocks)(struct radeon_device *rdev, u32 vclk, u32 dclk); -+ int (*set_vce_clocks)(struct radeon_device *rdev, u32 evclk, u32 ecclk); - int (*get_temperature)(struct radeon_device *rdev); - } pm; - /* dynamic power management */ -@@ -2673,6 +2674,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v); - #define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->pm.set_pcie_lanes((rdev), (l)) - #define radeon_set_clock_gating(rdev, e) (rdev)->asic->pm.set_clock_gating((rdev), (e)) - #define radeon_set_uvd_clocks(rdev, v, d) (rdev)->asic->pm.set_uvd_clocks((rdev), (v), (d)) -+#define radeon_set_vce_clocks(rdev, ev, ec) (rdev)->asic->pm.set_vce_clocks((rdev), (ev), (ec)) - #define radeon_get_temperature(rdev) (rdev)->asic->pm.get_temperature((rdev)) - #define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->surface.set_reg((rdev), (r), (f), (p), (o), (s))) - #define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->surface.clear_reg((rdev), (r))) --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0031-yocto-amd-drm-radeon-dpm-move-platform-caps-fetching-to-a-sepa.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0031-yocto-amd-drm-radeon-dpm-move-platform-caps-fetching-to-a-sepa.patch deleted file mode 100644 index 9dab9dcc..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0031-yocto-amd-drm-radeon-dpm-move-platform-caps-fetching-to-a-sepa.patch +++ /dev/null @@ -1,330 +0,0 @@ -From d57ea9870d87db49132b6cd8067d512fb2810e24 Mon Sep 17 00:00:00 2001 -From: Alex Deucher <alexander.deucher@amd.com> -Date: Wed, 21 Aug 2013 10:02:32 -0400 -Subject: [PATCH 31/44] drm/radeon/dpm: move platform caps fetching to a - separate function - -It's needed by by both the asic specific functions and the -extended table parser. - -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/radeon/btc_dpm.c | 4 ++++ - drivers/gpu/drm/radeon/ci_dpm.c | 9 ++++++--- - drivers/gpu/drm/radeon/cypress_dpm.c | 4 ++++ - drivers/gpu/drm/radeon/kv_dpm.c | 7 ++++--- - drivers/gpu/drm/radeon/ni_dpm.c | 7 ++++--- - drivers/gpu/drm/radeon/r600_dpm.c | 20 ++++++++++++++++++++ - drivers/gpu/drm/radeon/r600_dpm.h | 2 ++ - drivers/gpu/drm/radeon/rs780_dpm.c | 7 ++++--- - drivers/gpu/drm/radeon/rv6xx_dpm.c | 7 ++++--- - drivers/gpu/drm/radeon/rv770_dpm.c | 7 ++++--- - drivers/gpu/drm/radeon/si_dpm.c | 7 ++++--- - drivers/gpu/drm/radeon/sumo_dpm.c | 7 ++++--- - drivers/gpu/drm/radeon/trinity_dpm.c | 7 ++++--- - 13 files changed, 68 insertions(+), 27 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/btc_dpm.c b/drivers/gpu/drm/radeon/btc_dpm.c -index 9b6950d..e910299 100644 ---- a/drivers/gpu/drm/radeon/btc_dpm.c -+++ b/drivers/gpu/drm/radeon/btc_dpm.c -@@ -2610,6 +2610,10 @@ int btc_dpm_init(struct radeon_device *rdev) - pi->min_vddc_in_table = 0; - pi->max_vddc_in_table = 0; - -+ ret = r600_get_platform_caps(rdev); -+ if (ret) -+ return ret; -+ - ret = rv7xx_parse_power_table(rdev); - if (ret) - return ret; -diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c -index 51e947a..b90834a 100644 ---- a/drivers/gpu/drm/radeon/ci_dpm.c -+++ b/drivers/gpu/drm/radeon/ci_dpm.c -@@ -4951,9 +4951,6 @@ static int ci_parse_power_table(struct radeon_device *rdev) - if (!rdev->pm.dpm.ps) - return -ENOMEM; - power_state_offset = (u8 *)state_array->states; -- rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); -- rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); -- rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); - for (i = 0; i < state_array->ucNumEntries; i++) { - u8 *idx; - power_state = (union pplib_power_state *)power_state_offset; -@@ -5069,6 +5066,12 @@ int ci_dpm_init(struct radeon_device *rdev) - ci_dpm_fini(rdev); - return ret; - } -+ -+ ret = r600_get_platform_caps(rdev); -+ if (ret) { -+ ci_dpm_fini(rdev); -+ return ret; -+ } - ret = ci_parse_power_table(rdev); - if (ret) { - ci_dpm_fini(rdev); -diff --git a/drivers/gpu/drm/radeon/cypress_dpm.c b/drivers/gpu/drm/radeon/cypress_dpm.c -index 91bb470..db1f391 100644 ---- a/drivers/gpu/drm/radeon/cypress_dpm.c -+++ b/drivers/gpu/drm/radeon/cypress_dpm.c -@@ -2049,6 +2049,10 @@ int cypress_dpm_init(struct radeon_device *rdev) - pi->min_vddc_in_table = 0; - pi->max_vddc_in_table = 0; - -+ ret = r600_get_platform_caps(rdev); -+ if (ret) -+ return ret; -+ - ret = rv7xx_parse_power_table(rdev); - if (ret) - return ret; -diff --git a/drivers/gpu/drm/radeon/kv_dpm.c b/drivers/gpu/drm/radeon/kv_dpm.c -index b419055..58b5a5d 100644 ---- a/drivers/gpu/drm/radeon/kv_dpm.c -+++ b/drivers/gpu/drm/radeon/kv_dpm.c -@@ -2556,9 +2556,6 @@ static int kv_parse_power_table(struct radeon_device *rdev) - if (!rdev->pm.dpm.ps) - return -ENOMEM; - power_state_offset = (u8 *)state_array->states; -- rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); -- rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); -- rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); - for (i = 0; i < state_array->ucNumEntries; i++) { - u8 *idx; - power_state = (union pplib_power_state *)power_state_offset; -@@ -2608,6 +2605,10 @@ int kv_dpm_init(struct radeon_device *rdev) - return -ENOMEM; - rdev->pm.dpm.priv = pi; - -+ ret = r600_get_platform_caps(rdev); -+ if (ret) -+ return ret; -+ - ret = r600_parse_extended_power_table(rdev); - if (ret) - return ret; -diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c -index f263390..76bcc1e 100644 ---- a/drivers/gpu/drm/radeon/ni_dpm.c -+++ b/drivers/gpu/drm/radeon/ni_dpm.c -@@ -4041,9 +4041,6 @@ static int ni_parse_power_table(struct radeon_device *rdev) - power_info->pplib.ucNumStates, GFP_KERNEL); - if (!rdev->pm.dpm.ps) - return -ENOMEM; -- rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); -- rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); -- rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); - - for (i = 0; i < power_info->pplib.ucNumStates; i++) { - power_state = (union pplib_power_state *) -@@ -4105,6 +4102,10 @@ int ni_dpm_init(struct radeon_device *rdev) - pi->min_vddc_in_table = 0; - pi->max_vddc_in_table = 0; - -+ ret = r600_get_platform_caps(rdev); -+ if (ret) -+ return ret; -+ - ret = ni_parse_power_table(rdev); - if (ret) - return ret; -diff --git a/drivers/gpu/drm/radeon/r600_dpm.c b/drivers/gpu/drm/radeon/r600_dpm.c -index 5513d8f..d57cde7 100644 ---- a/drivers/gpu/drm/radeon/r600_dpm.c -+++ b/drivers/gpu/drm/radeon/r600_dpm.c -@@ -818,6 +818,26 @@ static int r600_parse_clk_voltage_dep_table(struct radeon_clock_voltage_dependen - return 0; - } - -+int r600_get_platform_caps(struct radeon_device *rdev) -+{ -+ struct radeon_mode_info *mode_info = &rdev->mode_info; -+ union power_info *power_info; -+ int index = GetIndexIntoMasterTable(DATA, PowerPlayInfo); -+ u16 data_offset; -+ u8 frev, crev; -+ -+ if (!atom_parse_data_header(mode_info->atom_context, index, NULL, -+ &frev, &crev, &data_offset)) -+ return -EINVAL; -+ power_info = (union power_info *)(mode_info->atom_context->bios + data_offset); -+ -+ rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); -+ rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); -+ rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); -+ -+ return 0; -+} -+ - /* sizeof(ATOM_PPLIB_EXTENDEDHEADER) */ - #define SIZE_OF_ATOM_PPLIB_EXTENDEDHEADER_V2 12 - #define SIZE_OF_ATOM_PPLIB_EXTENDEDHEADER_V3 14 -diff --git a/drivers/gpu/drm/radeon/r600_dpm.h b/drivers/gpu/drm/radeon/r600_dpm.h -index 1000bf9..7e5d2c2 100644 ---- a/drivers/gpu/drm/radeon/r600_dpm.h -+++ b/drivers/gpu/drm/radeon/r600_dpm.h -@@ -217,6 +217,8 @@ int r600_set_thermal_temperature_range(struct radeon_device *rdev, - int min_temp, int max_temp); - bool r600_is_internal_thermal_sensor(enum radeon_int_thermal_type sensor); - -+int r600_get_platform_caps(struct radeon_device *rdev); -+ - int r600_parse_extended_power_table(struct radeon_device *rdev); - void r600_free_extended_power_table(struct radeon_device *rdev); - -diff --git a/drivers/gpu/drm/radeon/rs780_dpm.c b/drivers/gpu/drm/radeon/rs780_dpm.c -index 6af8505..f3143c0 100644 ---- a/drivers/gpu/drm/radeon/rs780_dpm.c -+++ b/drivers/gpu/drm/radeon/rs780_dpm.c -@@ -815,9 +815,6 @@ static int rs780_parse_power_table(struct radeon_device *rdev) - power_info->pplib.ucNumStates, GFP_KERNEL); - if (!rdev->pm.dpm.ps) - return -ENOMEM; -- rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); -- rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); -- rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); - - for (i = 0; i < power_info->pplib.ucNumStates; i++) { - power_state = (union pplib_power_state *) -@@ -867,6 +864,10 @@ int rs780_dpm_init(struct radeon_device *rdev) - return -ENOMEM; - rdev->pm.dpm.priv = pi; - -+ ret = r600_get_platform_caps(rdev); -+ if (ret) -+ return ret; -+ - ret = rs780_parse_power_table(rdev); - if (ret) - return ret; -diff --git a/drivers/gpu/drm/radeon/rv6xx_dpm.c b/drivers/gpu/drm/radeon/rv6xx_dpm.c -index 5811d27..3aa0a8c 100644 ---- a/drivers/gpu/drm/radeon/rv6xx_dpm.c -+++ b/drivers/gpu/drm/radeon/rv6xx_dpm.c -@@ -1901,9 +1901,6 @@ static int rv6xx_parse_power_table(struct radeon_device *rdev) - power_info->pplib.ucNumStates, GFP_KERNEL); - if (!rdev->pm.dpm.ps) - return -ENOMEM; -- rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); -- rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); -- rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); - - for (i = 0; i < power_info->pplib.ucNumStates; i++) { - power_state = (union pplib_power_state *) -@@ -1953,6 +1950,10 @@ int rv6xx_dpm_init(struct radeon_device *rdev) - return -ENOMEM; - rdev->pm.dpm.priv = pi; - -+ ret = r600_get_platform_caps(rdev); -+ if (ret) -+ return ret; -+ - ret = rv6xx_parse_power_table(rdev); - if (ret) - return ret; -diff --git a/drivers/gpu/drm/radeon/rv770_dpm.c b/drivers/gpu/drm/radeon/rv770_dpm.c -index 374499d..4bcbacb 100644 ---- a/drivers/gpu/drm/radeon/rv770_dpm.c -+++ b/drivers/gpu/drm/radeon/rv770_dpm.c -@@ -2277,9 +2277,6 @@ int rv7xx_parse_power_table(struct radeon_device *rdev) - power_info->pplib.ucNumStates, GFP_KERNEL); - if (!rdev->pm.dpm.ps) - return -ENOMEM; -- rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); -- rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); -- rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); - - for (i = 0; i < power_info->pplib.ucNumStates; i++) { - power_state = (union pplib_power_state *) -@@ -2357,6 +2354,10 @@ int rv770_dpm_init(struct radeon_device *rdev) - pi->min_vddc_in_table = 0; - pi->max_vddc_in_table = 0; - -+ ret = r600_get_platform_caps(rdev); -+ if (ret) -+ return ret; -+ - ret = rv7xx_parse_power_table(rdev); - if (ret) - return ret; -diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c -index 2332aa1..749c45c 100644 ---- a/drivers/gpu/drm/radeon/si_dpm.c -+++ b/drivers/gpu/drm/radeon/si_dpm.c -@@ -6291,9 +6291,6 @@ static int si_parse_power_table(struct radeon_device *rdev) - if (!rdev->pm.dpm.ps) - return -ENOMEM; - power_state_offset = (u8 *)state_array->states; -- rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); -- rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); -- rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); - for (i = 0; i < state_array->ucNumEntries; i++) { - u8 *idx; - power_state = (union pplib_power_state *)power_state_offset; -@@ -6370,6 +6367,10 @@ int si_dpm_init(struct radeon_device *rdev) - pi->min_vddc_in_table = 0; - pi->max_vddc_in_table = 0; - -+ ret = r600_get_platform_caps(rdev); -+ if (ret) -+ return ret; -+ - ret = si_parse_power_table(rdev); - if (ret) - return ret; -diff --git a/drivers/gpu/drm/radeon/sumo_dpm.c b/drivers/gpu/drm/radeon/sumo_dpm.c -index 96ea6db8..485d006 100644 ---- a/drivers/gpu/drm/radeon/sumo_dpm.c -+++ b/drivers/gpu/drm/radeon/sumo_dpm.c -@@ -1477,9 +1477,6 @@ static int sumo_parse_power_table(struct radeon_device *rdev) - if (!rdev->pm.dpm.ps) - return -ENOMEM; - power_state_offset = (u8 *)state_array->states; -- rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); -- rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); -- rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); - for (i = 0; i < state_array->ucNumEntries; i++) { - u8 *idx; - power_state = (union pplib_power_state *)power_state_offset; -@@ -1765,6 +1762,10 @@ int sumo_dpm_init(struct radeon_device *rdev) - - sumo_construct_boot_and_acpi_state(rdev); - -+ ret = r600_get_platform_caps(rdev); -+ if (ret) -+ return ret; -+ - ret = sumo_parse_power_table(rdev); - if (ret) - return ret; -diff --git a/drivers/gpu/drm/radeon/trinity_dpm.c b/drivers/gpu/drm/radeon/trinity_dpm.c -index d700698..ab32576 100644 ---- a/drivers/gpu/drm/radeon/trinity_dpm.c -+++ b/drivers/gpu/drm/radeon/trinity_dpm.c -@@ -1685,9 +1685,6 @@ static int trinity_parse_power_table(struct radeon_device *rdev) - if (!rdev->pm.dpm.ps) - return -ENOMEM; - power_state_offset = (u8 *)state_array->states; -- rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); -- rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); -- rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); - for (i = 0; i < state_array->ucNumEntries; i++) { - u8 *idx; - power_state = (union pplib_power_state *)power_state_offset; -@@ -1886,6 +1883,10 @@ int trinity_dpm_init(struct radeon_device *rdev) - - trinity_construct_boot_state(rdev); - -+ ret = r600_get_platform_caps(rdev); -+ if (ret) -+ return ret; -+ - ret = trinity_parse_power_table(rdev); - if (ret) - return ret; --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0032-yocto-amd-drm-radeon-dpm-fill-in-some-initial-vce-infrastructu.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0032-yocto-amd-drm-radeon-dpm-fill-in-some-initial-vce-infrastructu.patch deleted file mode 100644 index 00f558dc..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0032-yocto-amd-drm-radeon-dpm-fill-in-some-initial-vce-infrastructu.patch +++ /dev/null @@ -1,84 +0,0 @@ -From e539bcfbb6e46e51b7a463078e3bf3a7ae4c28d7 Mon Sep 17 00:00:00 2001 -From: Alex Deucher <alexander.deucher@amd.com> -Date: Tue, 20 Aug 2013 20:29:05 -0400 -Subject: [PATCH 32/44] drm/radeon/dpm: fill in some initial vce - infrastructure - -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/radeon/radeon.h | 12 ++++++++++++ - drivers/gpu/drm/radeon/radeon_pm.c | 7 +++++++ - 2 files changed, 19 insertions(+) - -diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h -index f0ad724..7846289 100644 ---- a/drivers/gpu/drm/radeon/radeon.h -+++ b/drivers/gpu/drm/radeon/radeon.h -@@ -1253,6 +1253,15 @@ enum radeon_dpm_event_src { - RADEON_DPM_EVENT_SRC_DIGIAL_OR_EXTERNAL = 4 - }; - -+enum radeon_vce_level { -+ RADEON_VCE_LEVEL_AC_ALL = 0, /* AC, All cases */ -+ RADEON_VCE_LEVEL_DC_EE = 1, /* DC, entropy encoding */ -+ RADEON_VCE_LEVEL_DC_LL_LOW = 2, /* DC, low latency queue, res <= 720 */ -+ RADEON_VCE_LEVEL_DC_LL_HIGH = 3, /* DC, low latency queue, 1080 >= res > 720 */ -+ RADEON_VCE_LEVEL_DC_GP_LOW = 4, /* DC, general purpose queue, res <= 720 */ -+ RADEON_VCE_LEVEL_DC_GP_HIGH = 5, /* DC, general purpose queue, 1080 >= res > 720 */ -+}; -+ - struct radeon_ps { - u32 caps; /* vbios flags */ - u32 class; /* vbios flags */ -@@ -1263,6 +1272,8 @@ struct radeon_ps { - /* VCE clocks */ - u32 evclk; - u32 ecclk; -+ bool vce_active; -+ enum radeon_vce_level vce_level; - /* asic priv */ - void *ps_priv; - }; -@@ -1474,6 +1485,7 @@ struct radeon_dpm { - /* special states active */ - bool thermal_active; - bool uvd_active; -+ bool vce_active; - /* thermal handling */ - struct radeon_dpm_thermal thermal; - /* forced levels */ -diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c -index 5febb25..366bf38 100644 ---- a/drivers/gpu/drm/radeon/radeon_pm.c -+++ b/drivers/gpu/drm/radeon/radeon_pm.c -@@ -845,6 +845,9 @@ static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev) - - /* no need to reprogram if nothing changed unless we are on BTC+ */ - if (rdev->pm.dpm.current_ps == rdev->pm.dpm.requested_ps) { -+ /* vce just modifies an existing state so force a change */ -+ if (ps->vce_active != rdev->pm.dpm.vce_active) -+ goto force; - if ((rdev->family < CHIP_BARTS) || (rdev->flags & RADEON_IS_IGP)) { - /* for pre-BTC and APUs if the num crtcs changed but state is the same, - * all we need to do is update the display configuration. -@@ -881,6 +884,7 @@ static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev) - } - } - -+force: - printk("switching from power state:\n"); - radeon_dpm_print_power_state(rdev, rdev->pm.dpm.current_ps); - printk("switching to power state:\n"); -@@ -890,6 +894,9 @@ static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev) - down_write(&rdev->pm.mclk_lock); - mutex_lock(&rdev->ring_lock); - -+ /* update whether vce is active */ -+ ps->vce_active = rdev->pm.dpm.vce_active; -+ - ret = radeon_dpm_pre_set_power_state(rdev); - if (ret) - goto done; --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0033-yocto-amd-drm-radeon-dpm-fetch-vce-states-from-the-vbios.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0033-yocto-amd-drm-radeon-dpm-fetch-vce-states-from-the-vbios.patch deleted file mode 100644 index aa4de719..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0033-yocto-amd-drm-radeon-dpm-fetch-vce-states-from-the-vbios.patch +++ /dev/null @@ -1,110 +0,0 @@ -From 55d04c82da7399c568896c2938a8729989e43c8d Mon Sep 17 00:00:00 2001 -From: Alex Deucher <alexander.deucher@amd.com> -Date: Wed, 4 Sep 2013 16:13:56 -0400 -Subject: [PATCH 33/44] drm/radeon/dpm: fetch vce states from the vbios - -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/radeon/r600_dpm.c | 28 +++++++++++++++++++++++++++- - drivers/gpu/drm/radeon/radeon.h | 16 ++++++++++++++++ - 2 files changed, 43 insertions(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/radeon/r600_dpm.c b/drivers/gpu/drm/radeon/r600_dpm.c -index d57cde7..0bad36b 100644 ---- a/drivers/gpu/drm/radeon/r600_dpm.c -+++ b/drivers/gpu/drm/radeon/r600_dpm.c -@@ -1047,7 +1047,15 @@ int r600_parse_extended_power_table(struct radeon_device *rdev) - (mode_info->atom_context->bios + data_offset + - le16_to_cpu(ext_hdr->usVCETableOffset) + 1 + - 1 + array->ucNumEntries * sizeof(VCEClockInfo)); -+ ATOM_PPLIB_VCE_State_Table *states = -+ (ATOM_PPLIB_VCE_State_Table *) -+ (mode_info->atom_context->bios + data_offset + -+ le16_to_cpu(ext_hdr->usVCETableOffset) + 1 + -+ 1 + (array->ucNumEntries * sizeof (VCEClockInfo)) + -+ 1 + (limits->numEntries * sizeof(ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record))); - ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record *entry; -+ ATOM_PPLIB_VCE_State_Record *state_entry; -+ VCEClockInfo *vce_clk; - u32 size = limits->numEntries * - sizeof(struct radeon_vce_clock_voltage_dependency_entry); - rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries = -@@ -1059,8 +1067,9 @@ int r600_parse_extended_power_table(struct radeon_device *rdev) - rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count = - limits->numEntries; - entry = &limits->entries[0]; -+ state_entry = &states->entries[0]; - for (i = 0; i < limits->numEntries; i++) { -- VCEClockInfo *vce_clk = (VCEClockInfo *) -+ vce_clk = (VCEClockInfo *) - ((u8 *)&array->entries[0] + - (entry->ucVCEClockInfoIndex * sizeof(VCEClockInfo))); - rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].evclk = -@@ -1072,6 +1081,23 @@ int r600_parse_extended_power_table(struct radeon_device *rdev) - entry = (ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record *) - ((u8 *)entry + sizeof(ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record)); - } -+ for (i = 0; i < states->numEntries; i++) { -+ if (i >= RADEON_MAX_VCE_LEVELS) -+ break; -+ vce_clk = (VCEClockInfo *) -+ ((u8 *)&array->entries[0] + -+ (state_entry->ucVCEClockInfoIndex * sizeof(VCEClockInfo))); -+ rdev->pm.dpm.vce_states[i].evclk = -+ le16_to_cpu(vce_clk->usEVClkLow) | (vce_clk->ucEVClkHigh << 16); -+ rdev->pm.dpm.vce_states[i].ecclk = -+ le16_to_cpu(vce_clk->usECClkLow) | (vce_clk->ucECClkHigh << 16); -+ rdev->pm.dpm.vce_states[i].clk_idx = -+ state_entry->ucClockInfoIndex & 0x3f; -+ rdev->pm.dpm.vce_states[i].pstate = -+ (state_entry->ucClockInfoIndex & 0xc0) >> 6; -+ state_entry = (ATOM_PPLIB_VCE_State_Record *) -+ ((u8 *)state_entry + sizeof(ATOM_PPLIB_VCE_State_Record)); -+ } - } - if ((le16_to_cpu(ext_hdr->usSize) >= SIZE_OF_ATOM_PPLIB_EXTENDEDHEADER_V3) && - ext_hdr->usUVDTableOffset) { -diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h -index 7846289..fa57b11 100644 ---- a/drivers/gpu/drm/radeon/radeon.h -+++ b/drivers/gpu/drm/radeon/radeon.h -@@ -1253,6 +1253,8 @@ enum radeon_dpm_event_src { - RADEON_DPM_EVENT_SRC_DIGIAL_OR_EXTERNAL = 4 - }; - -+#define RADEON_MAX_VCE_LEVELS 6 -+ - enum radeon_vce_level { - RADEON_VCE_LEVEL_AC_ALL = 0, /* AC, All cases */ - RADEON_VCE_LEVEL_DC_EE = 1, /* DC, entropy encoding */ -@@ -1448,6 +1450,17 @@ enum radeon_dpm_forced_level { - RADEON_DPM_FORCED_LEVEL_HIGH = 2, - }; - -+struct radeon_vce_state { -+ /* vce clocks */ -+ u32 evclk; -+ u32 ecclk; -+ /* gpu clocks */ -+ u32 sclk; -+ u32 mclk; -+ u8 clk_idx; -+ u8 pstate; -+}; -+ - struct radeon_dpm { - struct radeon_ps *ps; - /* number of valid power states */ -@@ -1460,6 +1473,9 @@ struct radeon_dpm { - struct radeon_ps *boot_ps; - /* default uvd power state */ - struct radeon_ps *uvd_ps; -+ /* vce requirements */ -+ struct radeon_vce_state vce_states[RADEON_MAX_VCE_LEVELS]; -+ enum radeon_vce_level vce_level; - enum radeon_pm_state_type state; - enum radeon_pm_state_type user_state; - u32 platform_caps; --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0034-yocto-amd-drm-radeon-fill-in-set_vce_clocks-for-CIK-asics.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0034-yocto-amd-drm-radeon-fill-in-set_vce_clocks-for-CIK-asics.patch deleted file mode 100644 index d4669a9f..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0034-yocto-amd-drm-radeon-fill-in-set_vce_clocks-for-CIK-asics.patch +++ /dev/null @@ -1,111 +0,0 @@ -From bfe1cb3c1990b0e7a80ffe5563c86d52292b1565 Mon Sep 17 00:00:00 2001 -From: Alex Deucher <alexander.deucher@amd.com> -Date: Thu, 22 Aug 2013 17:09:06 -0400 -Subject: [PATCH 34/44] drm/radeon: fill in set_vce_clocks for CIK asics - -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/radeon/cik.c | 35 ++++++++++++++++++++++++++++++++++ - drivers/gpu/drm/radeon/cikd.h | 6 ++++++ - drivers/gpu/drm/radeon/radeon_asic.c | 2 ++ - drivers/gpu/drm/radeon/radeon_asic.h | 1 + - 4 files changed, 44 insertions(+) - -diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c -index 872b146..9af1f3f 100644 ---- a/drivers/gpu/drm/radeon/cik.c -+++ b/drivers/gpu/drm/radeon/cik.c -@@ -8115,6 +8115,41 @@ int cik_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk) - return r; - } - -+int cik_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk) -+{ -+ int r, i; -+ struct atom_clock_dividers dividers; -+ u32 tmp; -+ -+ r = radeon_atom_get_clock_dividers(rdev, COMPUTE_GPUCLK_INPUT_FLAG_DEFAULT_GPUCLK, -+ ecclk, false, ÷rs); -+ if (r) -+ return r; -+ -+ for (i = 0; i < 100; i++) { -+ if (RREG32_SMC(CG_ECLK_STATUS) & ECLK_STATUS) -+ break; -+ mdelay(10); -+ } -+ if (i == 100) -+ return -ETIMEDOUT; -+ -+ tmp = RREG32_SMC(CG_ECLK_CNTL); -+ tmp &= ~(ECLK_DIR_CNTL_EN|ECLK_DIVIDER_MASK); -+ tmp |= dividers.post_divider; -+ WREG32_SMC(CG_ECLK_CNTL, tmp); -+ -+ for (i = 0; i < 100; i++) { -+ if (RREG32_SMC(CG_ECLK_STATUS) & ECLK_STATUS) -+ break; -+ mdelay(10); -+ } -+ if (i == 100) -+ return -ETIMEDOUT; -+ -+ return 0; -+} -+ - static void cik_pcie_gen3_enable(struct radeon_device *rdev) - { - struct pci_dev *root = rdev->pdev->bus->self; -diff --git a/drivers/gpu/drm/radeon/cikd.h b/drivers/gpu/drm/radeon/cikd.h -index b296d50..3224176 100644 ---- a/drivers/gpu/drm/radeon/cikd.h -+++ b/drivers/gpu/drm/radeon/cikd.h -@@ -201,6 +201,12 @@ - #define CTF_TEMP_MASK 0x0003fe00 - #define CTF_TEMP_SHIFT 9 - -+#define CG_ECLK_CNTL 0xC05000AC -+# define ECLK_DIVIDER_MASK 0x7f -+# define ECLK_DIR_CNTL_EN (1 << 8) -+#define CG_ECLK_STATUS 0xC05000B0 -+# define ECLK_STATUS (1 << 0) -+ - #define CG_SPLL_FUNC_CNTL 0xC0500140 - #define SPLL_RESET (1 << 0) - #define SPLL_PWRON (1 << 1) -diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c -index 763280b..19b2eea 100644 ---- a/drivers/gpu/drm/radeon/radeon_asic.c -+++ b/drivers/gpu/drm/radeon/radeon_asic.c -@@ -2067,6 +2067,7 @@ static struct radeon_asic ci_asic = { - .set_pcie_lanes = NULL, - .set_clock_gating = NULL, - .set_uvd_clocks = &cik_set_uvd_clocks, -+ .set_vce_clocks = &cik_set_vce_clocks, - .get_temperature = &ci_get_temp, - }, - .dpm = { -@@ -2170,6 +2171,7 @@ static struct radeon_asic kv_asic = { - .set_pcie_lanes = NULL, - .set_clock_gating = NULL, - .set_uvd_clocks = &cik_set_uvd_clocks, -+ .set_vce_clocks = &cik_set_vce_clocks, - .get_temperature = &kv_get_temp, - }, - .dpm = { -diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h -index a6c3eeb..900ffd7 100644 ---- a/drivers/gpu/drm/radeon/radeon_asic.h -+++ b/drivers/gpu/drm/radeon/radeon_asic.h -@@ -710,6 +710,7 @@ u32 cik_get_xclk(struct radeon_device *rdev); - uint32_t cik_pciep_rreg(struct radeon_device *rdev, uint32_t reg); - void cik_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); - int cik_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); -+int cik_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk); - void cik_sdma_fence_ring_emit(struct radeon_device *rdev, - struct radeon_fence *fence); - bool cik_sdma_semaphore_ring_emit(struct radeon_device *rdev, --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0035-yocto-amd-drm-radeon-add-vce-dpm-support-for-CI.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0035-yocto-amd-drm-radeon-add-vce-dpm-support-for-CI.patch deleted file mode 100644 index 1ec9eb39..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0035-yocto-amd-drm-radeon-add-vce-dpm-support-for-CI.patch +++ /dev/null @@ -1,149 +0,0 @@ -From 82cd2bfeb87f0d4e65537765399014748e8aa80f Mon Sep 17 00:00:00 2001 -From: Alex Deucher <alexander.deucher@amd.com> -Date: Fri, 23 Aug 2013 11:05:24 -0400 -Subject: [PATCH 35/44] drm/radeon: add vce dpm support for CI - -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/radeon/ci_dpm.c | 50 +++++++++++++++++++++++++++++++-------- - 1 file changed, 40 insertions(+), 10 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c -index b90834a..69f34f8 100644 ---- a/drivers/gpu/drm/radeon/ci_dpm.c -+++ b/drivers/gpu/drm/radeon/ci_dpm.c -@@ -717,6 +717,14 @@ static void ci_apply_state_adjust_rules(struct radeon_device *rdev, - u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc; - int i; - -+ if (rps->vce_active) { -+ rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; -+ rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; -+ } else { -+ rps->evclk = 0; -+ rps->ecclk = 0; -+ } -+ - if ((rdev->pm.dpm.new_active_crtc_count > 1) || - ci_dpm_vblank_too_short(rdev)) - disable_mclk_switching = true; -@@ -775,6 +783,13 @@ static void ci_apply_state_adjust_rules(struct radeon_device *rdev, - sclk = ps->performance_levels[0].sclk; - } - -+ if (rps->vce_active) { -+ if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) -+ sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; -+ if (mclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk) -+ mclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk; -+ } -+ - ps->performance_levels[0].sclk = sclk; - ps->performance_levels[0].mclk = mclk; - -@@ -3439,7 +3454,6 @@ static int ci_enable_uvd_dpm(struct radeon_device *rdev, bool enable) - 0 : -EINVAL; - } - --#if 0 - static int ci_enable_vce_dpm(struct radeon_device *rdev, bool enable) - { - struct ci_power_info *pi = ci_get_pi(rdev); -@@ -3472,6 +3486,7 @@ static int ci_enable_vce_dpm(struct radeon_device *rdev, bool enable) - 0 : -EINVAL; - } - -+#if 0 - static int ci_enable_samu_dpm(struct radeon_device *rdev, bool enable) - { - struct ci_power_info *pi = ci_get_pi(rdev); -@@ -3558,7 +3573,6 @@ static int ci_update_uvd_dpm(struct radeon_device *rdev, bool gate) - return ci_enable_uvd_dpm(rdev, !gate); - } - --#if 0 - static u8 ci_get_vce_boot_level(struct radeon_device *rdev) - { - u8 i; -@@ -3579,13 +3593,11 @@ static int ci_update_vce_dpm(struct radeon_device *rdev, - struct radeon_ps *radeon_current_state) - { - struct ci_power_info *pi = ci_get_pi(rdev); -- bool new_vce_clock_non_zero = (radeon_new_state->evclk != 0); -- bool old_vce_clock_non_zero = (radeon_current_state->evclk != 0); - int ret = 0; - u32 tmp; - -- if (new_vce_clock_non_zero != old_vce_clock_non_zero) { -- if (new_vce_clock_non_zero) { -+ if (radeon_current_state->evclk != radeon_new_state->evclk) { -+ if (radeon_new_state->evclk) { - pi->smc_state_table.VceBootLevel = ci_get_vce_boot_level(rdev); - - tmp = RREG32_SMC(DPM_TABLE_475); -@@ -3601,6 +3613,7 @@ static int ci_update_vce_dpm(struct radeon_device *rdev, - return ret; - } - -+#if 0 - static int ci_update_samu_dpm(struct radeon_device *rdev, bool gate) - { - return ci_enable_samu_dpm(rdev, gate); -@@ -4737,13 +4750,13 @@ int ci_dpm_set_power_state(struct radeon_device *rdev) - DRM_ERROR("ci_generate_dpm_level_enable_mask failed\n"); - return ret; - } --#if 0 -+ - ret = ci_update_vce_dpm(rdev, new_ps, old_ps); - if (ret) { - DRM_ERROR("ci_update_vce_dpm failed\n"); - return ret; - } --#endif -+ - ret = ci_update_sclk_t(rdev); - if (ret) { - DRM_ERROR("ci_update_sclk_t failed\n"); -@@ -4987,6 +5000,21 @@ static int ci_parse_power_table(struct radeon_device *rdev) - power_state_offset += 2 + power_state->v2.ucNumDPMLevels; - } - rdev->pm.dpm.num_ps = state_array->ucNumEntries; -+ -+ /* fill in the vce power states */ -+ for (i = 0; i < RADEON_MAX_VCE_LEVELS; i++) { -+ u32 sclk, mclk; -+ clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx; -+ clock_info = (union pplib_clock_info *) -+ &clock_info_array->clockInfo[clock_array_index * clock_info_array->ucEntrySize]; -+ sclk = le16_to_cpu(clock_info->ci.usEngineClockLow); -+ sclk |= clock_info->ci.ucEngineClockHigh << 16; -+ mclk = le16_to_cpu(clock_info->ci.usMemoryClockLow); -+ mclk |= clock_info->ci.ucMemoryClockHigh << 16; -+ rdev->pm.dpm.vce_states[i].sclk = sclk; -+ rdev->pm.dpm.vce_states[i].mclk = mclk; -+ } -+ - return 0; - } - -@@ -5072,12 +5100,14 @@ int ci_dpm_init(struct radeon_device *rdev) - ci_dpm_fini(rdev); - return ret; - } -- ret = ci_parse_power_table(rdev); -+ -+ ret = r600_parse_extended_power_table(rdev); - if (ret) { - ci_dpm_fini(rdev); - return ret; - } -- ret = r600_parse_extended_power_table(rdev); -+ -+ ret = ci_parse_power_table(rdev); - if (ret) { - ci_dpm_fini(rdev); - return ret; --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0036-yocto-amd-drm-radeon-enable-vce-dpm-on-CI.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0036-yocto-amd-drm-radeon-enable-vce-dpm-on-CI.patch deleted file mode 100644 index 2e115f87..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0036-yocto-amd-drm-radeon-enable-vce-dpm-on-CI.patch +++ /dev/null @@ -1,28 +0,0 @@ -From dceb1d2ab717808241bf302878eb7e351d65a680 Mon Sep 17 00:00:00 2001 -From: Alex Deucher <alexander.deucher@amd.com> -Date: Fri, 23 Aug 2013 11:09:21 -0400 -Subject: [PATCH 36/44] drm/radeon: enable vce dpm on CI - -VCE dpm dynamically adjusts the uvd clocks on -demand. - -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/radeon/ci_dpm.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c -index 69f34f8..a6a2396 100644 ---- a/drivers/gpu/drm/radeon/ci_dpm.c -+++ b/drivers/gpu/drm/radeon/ci_dpm.c -@@ -5145,6 +5145,7 @@ int ci_dpm_init(struct radeon_device *rdev) - pi->caps_sclk_throttle_low_notification = false; - - pi->caps_uvd_dpm = true; -+ pi->caps_vce_dpm = true; - - ci_get_leakage_voltages(rdev); - ci_patch_dependency_tables_with_leakage(rdev); --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0037-yocto-amd-drm-radeon-add-vce-dpm-support-for-KV-KB.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0037-yocto-amd-drm-radeon-add-vce-dpm-support-for-KV-KB.patch deleted file mode 100644 index d8243434..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0037-yocto-amd-drm-radeon-add-vce-dpm-support-for-KV-KB.patch +++ /dev/null @@ -1,169 +0,0 @@ -From 397c2ed05a91152697a262867db2b68ec997dbef Mon Sep 17 00:00:00 2001 -From: Alex Deucher <alexander.deucher@amd.com> -Date: Wed, 4 Sep 2013 16:17:07 -0400 -Subject: [PATCH 37/44] drm/radeon: add vce dpm support for KV/KB - -TODO: plug in cik_vce_suspend()/resume() so we can enable -vce powergating. See XXX in code. - -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/radeon/kv_dpm.c | 46 +++++++++++++++++++++++++++++---------- - 1 file changed, 35 insertions(+), 11 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/kv_dpm.c b/drivers/gpu/drm/radeon/kv_dpm.c -index 58b5a5d..feacd5c 100644 ---- a/drivers/gpu/drm/radeon/kv_dpm.c -+++ b/drivers/gpu/drm/radeon/kv_dpm.c -@@ -1346,13 +1346,11 @@ static int kv_enable_uvd_dpm(struct radeon_device *rdev, bool enable) - PPSMC_MSG_UVDDPM_Enable : PPSMC_MSG_UVDDPM_Disable); - } - --#if 0 - static int kv_enable_vce_dpm(struct radeon_device *rdev, bool enable) - { - return kv_notify_message_to_smu(rdev, enable ? - PPSMC_MSG_VCEDPM_Enable : PPSMC_MSG_VCEDPM_Disable); - } --#endif - - static int kv_enable_samu_dpm(struct radeon_device *rdev, bool enable) - { -@@ -1397,7 +1395,6 @@ static int kv_update_uvd_dpm(struct radeon_device *rdev, bool gate) - return kv_enable_uvd_dpm(rdev, !gate); - } - --#if 0 - static u8 kv_get_vce_boot_level(struct radeon_device *rdev) - { - u8 i; -@@ -1422,6 +1419,8 @@ static int kv_update_vce_dpm(struct radeon_device *rdev, - int ret; - - if (radeon_new_state->evclk > 0 && radeon_current_state->evclk == 0) { -+ kv_dpm_powergate_vce(rdev, false); -+ /* XXX cik_vce_resume(); */ - if (pi->caps_stable_p_state) - pi->vce_boot_level = table->count - 1; - else -@@ -1444,11 +1443,12 @@ static int kv_update_vce_dpm(struct radeon_device *rdev, - kv_enable_vce_dpm(rdev, true); - } else if (radeon_new_state->evclk == 0 && radeon_current_state->evclk > 0) { - kv_enable_vce_dpm(rdev, false); -+ /* XXX cik_vce_suspend(); */ -+ kv_dpm_powergate_vce(rdev, true); - } - - return 0; - } --#endif - - static int kv_update_samu_dpm(struct radeon_device *rdev, bool gate) - { -@@ -1776,7 +1776,7 @@ int kv_dpm_set_power_state(struct radeon_device *rdev) - { - struct kv_power_info *pi = kv_get_pi(rdev); - struct radeon_ps *new_ps = &pi->requested_rps; -- /*struct radeon_ps *old_ps = &pi->current_rps;*/ -+ struct radeon_ps *old_ps = &pi->current_rps; - int ret; - - cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX | -@@ -1811,13 +1811,12 @@ int kv_dpm_set_power_state(struct radeon_device *rdev) - kv_set_enabled_levels(rdev); - kv_force_lowest_valid(rdev); - kv_unforce_levels(rdev); --#if 0 -+ - ret = kv_update_vce_dpm(rdev, new_ps, old_ps); - if (ret) { - DRM_ERROR("kv_update_vce_dpm failed\n"); - return ret; - } --#endif - kv_update_sclk_t(rdev); - } - } else { -@@ -1836,13 +1835,11 @@ int kv_dpm_set_power_state(struct radeon_device *rdev) - kv_program_nbps_index_settings(rdev, new_ps); - kv_freeze_sclk_dpm(rdev, false); - kv_set_enabled_levels(rdev); --#if 0 - ret = kv_update_vce_dpm(rdev, new_ps, old_ps); - if (ret) { - DRM_ERROR("kv_update_vce_dpm failed\n"); - return ret; - } --#endif - kv_update_acp_boot_level(rdev); - kv_update_sclk_t(rdev); - kv_enable_nb_dpm(rdev); -@@ -2055,6 +2052,14 @@ static void kv_apply_state_adjust_rules(struct radeon_device *rdev, - struct radeon_clock_and_voltage_limits *max_limits = - &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; - -+ if (new_rps->vce_active) { -+ new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; -+ new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; -+ } else { -+ new_rps->evclk = 0; -+ new_rps->ecclk = 0; -+ } -+ - mclk = max_limits->mclk; - sclk = min_sclk; - -@@ -2074,6 +2079,11 @@ static void kv_apply_state_adjust_rules(struct radeon_device *rdev, - sclk = stable_p_state_sclk; - } - -+ if (new_rps->vce_active) { -+ if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) -+ sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; -+ } -+ - ps->need_dfs_bypass = true; - - for (i = 0; i < ps->num_levels; i++) { -@@ -2110,7 +2120,8 @@ static void kv_apply_state_adjust_rules(struct radeon_device *rdev, - } - } - -- pi->video_start = new_rps->dclk || new_rps->vclk; -+ pi->video_start = new_rps->dclk || new_rps->vclk || -+ new_rps->evclk || new_rps->ecclk; - - if ((new_rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) == - ATOM_PPLIB_CLASSIFICATION_UI_BATTERY) -@@ -2592,6 +2603,19 @@ static int kv_parse_power_table(struct radeon_device *rdev) - power_state_offset += 2 + power_state->v2.ucNumDPMLevels; - } - rdev->pm.dpm.num_ps = state_array->ucNumEntries; -+ -+ /* fill in the vce power states */ -+ for (i = 0; i < RADEON_MAX_VCE_LEVELS; i++) { -+ u32 sclk; -+ clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx; -+ clock_info = (union pplib_clock_info *) -+ &clock_info_array->clockInfo[clock_array_index * clock_info_array->ucEntrySize]; -+ sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); -+ sclk |= clock_info->sumo.ucEngineClockHigh << 16; -+ rdev->pm.dpm.vce_states[i].sclk = sclk; -+ rdev->pm.dpm.vce_states[i].mclk = 0; -+ } -+ - return 0; - } - -@@ -2642,7 +2666,7 @@ int kv_dpm_init(struct radeon_device *rdev) - pi->caps_fps = false; /* true? */ - pi->caps_uvd_pg = true; - pi->caps_uvd_dpm = true; -- pi->caps_vce_pg = false; -+ pi->caps_vce_pg = false; /* XXX true */ - pi->caps_samu_pg = false; - pi->caps_acp_pg = false; - pi->caps_stable_p_state = false; --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0038-yocto-amd-drm-radeon-dpm-enable-dynamic-vce-state-switching-v2.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0038-yocto-amd-drm-radeon-dpm-enable-dynamic-vce-state-switching-v2.patch deleted file mode 100644 index f06637bf..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0038-yocto-amd-drm-radeon-dpm-enable-dynamic-vce-state-switching-v2.patch +++ /dev/null @@ -1,195 +0,0 @@ -From 4d64b74b580760a85dc3349877a2bef2fbf779da Mon Sep 17 00:00:00 2001 -From: Alex Deucher <alexander.deucher@amd.com> -Date: Fri, 23 Aug 2013 11:56:26 -0400 -Subject: [PATCH 38/44] drm/radeon/dpm: enable dynamic vce state switching v2 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -enable vce states when vce is active. When vce is active, -it adjusts the currently selected state (performance, battery, -uvd, etc.) - -v2: add code comments - -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> -Signed-off-by: Christian König <christian.koenig@amd.com> ---- - drivers/gpu/drm/radeon/radeon.h | 3 ++ - drivers/gpu/drm/radeon/radeon_cs.c | 3 ++ - drivers/gpu/drm/radeon/radeon_pm.c | 17 ++++++++++ - drivers/gpu/drm/radeon/radeon_vce.c | 62 +++++++++++++++++++++++++++++++++++ - 4 files changed, 85 insertions(+) - -diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h -index fa57b11..74928d5 100644 ---- a/drivers/gpu/drm/radeon/radeon.h -+++ b/drivers/gpu/drm/radeon/radeon.h -@@ -1512,6 +1512,7 @@ struct radeon_dpm { - }; - - void radeon_dpm_enable_uvd(struct radeon_device *rdev, bool enable); -+void radeon_dpm_enable_vce(struct radeon_device *rdev, bool enable); - - struct radeon_pm { - struct mutex mutex; -@@ -1633,6 +1634,7 @@ struct radeon_vce { - unsigned fb_version; - atomic_t handles[RADEON_MAX_VCE_HANDLES]; - struct drm_file *filp[RADEON_MAX_VCE_HANDLES]; -+ struct delayed_work idle_work; - }; - - int radeon_vce_init(struct radeon_device *rdev); -@@ -1644,6 +1646,7 @@ int radeon_vce_get_create_msg(struct radeon_device *rdev, int ring, - int radeon_vce_get_destroy_msg(struct radeon_device *rdev, int ring, - uint32_t handle, struct radeon_fence **fence); - void radeon_vce_free_handles(struct radeon_device *rdev, struct drm_file *filp); -+void radeon_vce_note_usage(struct radeon_device *rdev); - int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi); - int radeon_vce_cs_parse(struct radeon_cs_parser *p); - bool radeon_vce_semaphore_emit(struct radeon_device *rdev, -diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c -index 2f8e92b..a55e17a 100644 ---- a/drivers/gpu/drm/radeon/radeon_cs.c -+++ b/drivers/gpu/drm/radeon/radeon_cs.c -@@ -394,6 +394,9 @@ static int radeon_cs_ib_chunk(struct radeon_device *rdev, - - if (parser->ring == R600_RING_TYPE_UVD_INDEX) - radeon_uvd_note_usage(rdev); -+ else if ((parser->ring == TN_RING_TYPE_VCE1_INDEX) || -+ (parser->ring == TN_RING_TYPE_VCE2_INDEX)) -+ radeon_vce_note_usage(rdev); - - radeon_cs_sync_rings(parser); - r = radeon_ib_schedule(rdev, &parser->ib, NULL); -diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c -index 366bf38..07a7fb0 100644 ---- a/drivers/gpu/drm/radeon/radeon_pm.c -+++ b/drivers/gpu/drm/radeon/radeon_pm.c -@@ -985,6 +985,23 @@ void radeon_dpm_enable_uvd(struct radeon_device *rdev, bool enable) - } - } - -+void radeon_dpm_enable_vce(struct radeon_device *rdev, bool enable) -+{ -+ if (enable) { -+ mutex_lock(&rdev->pm.mutex); -+ rdev->pm.dpm.vce_active = true; -+ /* XXX select vce level based on ring/task */ -+ rdev->pm.dpm.vce_level = RADEON_VCE_LEVEL_AC_ALL; -+ mutex_unlock(&rdev->pm.mutex); -+ } else { -+ mutex_lock(&rdev->pm.mutex); -+ rdev->pm.dpm.vce_active = false; -+ mutex_unlock(&rdev->pm.mutex); -+ } -+ -+ radeon_pm_compute_clocks(rdev); -+} -+ - static void radeon_pm_suspend_old(struct radeon_device *rdev) - { - mutex_lock(&rdev->pm.mutex); -diff --git a/drivers/gpu/drm/radeon/radeon_vce.c b/drivers/gpu/drm/radeon/radeon_vce.c -index f46563b..d130432 100644 ---- a/drivers/gpu/drm/radeon/radeon_vce.c -+++ b/drivers/gpu/drm/radeon/radeon_vce.c -@@ -34,11 +34,16 @@ - #include "radeon_asic.h" - #include "sid.h" - -+/* 1 second timeout */ -+#define VCE_IDLE_TIMEOUT_MS 1000 -+ - /* Firmware Names */ - #define FIRMWARE_BONAIRE "radeon/BONAIRE_vce.bin" - - MODULE_FIRMWARE(FIRMWARE_BONAIRE); - -+static void radeon_vce_idle_work_handler(struct work_struct *work); -+ - /** - * radeon_vce_init - allocate memory, load vce firmware - * -@@ -55,6 +60,8 @@ int radeon_vce_init(struct radeon_device *rdev) - uint8_t start, mid, end; - int i, r; - -+ INIT_DELAYED_WORK(&rdev->vce.idle_work, radeon_vce_idle_work_handler); -+ - switch (rdev->family) { - case CHIP_BONAIRE: - case CHIP_KAVERI: -@@ -220,6 +227,59 @@ int radeon_vce_resume(struct radeon_device *rdev) - } - - /** -+ * radeon_vce_idle_work_handler - power off VCE -+ * -+ * @work: pointer to work structure -+ * -+ * power of VCE when it's not used any more -+ */ -+static void radeon_vce_idle_work_handler(struct work_struct *work) -+{ -+ struct radeon_device *rdev = -+ container_of(work, struct radeon_device, vce.idle_work.work); -+ -+ if ((radeon_fence_count_emitted(rdev, TN_RING_TYPE_VCE1_INDEX) == 0) && -+ (radeon_fence_count_emitted(rdev, TN_RING_TYPE_VCE2_INDEX) == 0)) { -+ if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { -+ radeon_dpm_enable_vce(rdev, false); -+ } else { -+ radeon_set_vce_clocks(rdev, 0, 0); -+ } -+ } else { -+ schedule_delayed_work(&rdev->vce.idle_work, -+ msecs_to_jiffies(VCE_IDLE_TIMEOUT_MS)); -+ } -+} -+ -+/** -+ * radeon_vce_note_usage - power up VCE -+ * -+ * @rdev: radeon_device pointer -+ * -+ * Make sure VCE is powerd up when we want to use it -+ */ -+void radeon_vce_note_usage(struct radeon_device *rdev) -+{ -+ bool streams_changed = false; -+ bool set_clocks = !cancel_delayed_work_sync(&rdev->vce.idle_work); -+ set_clocks &= schedule_delayed_work(&rdev->vce.idle_work, -+ msecs_to_jiffies(VCE_IDLE_TIMEOUT_MS)); -+ -+ if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { -+ /* XXX figure out if the streams changed */ -+ streams_changed = false; -+ } -+ -+ if (set_clocks || streams_changed) { -+ if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { -+ radeon_dpm_enable_vce(rdev, true); -+ } else { -+ radeon_set_vce_clocks(rdev, 53300, 40000); -+ } -+ } -+} -+ -+/** - * radeon_vce_free_handles - free still open VCE handles - * - * @rdev: radeon_device pointer -@@ -235,6 +295,8 @@ void radeon_vce_free_handles(struct radeon_device *rdev, struct drm_file *filp) - if (!handle || rdev->vce.filp[i] != filp) - continue; - -+ radeon_vce_note_usage(rdev); -+ - r = radeon_vce_get_destroy_msg(rdev, TN_RING_TYPE_VCE1_INDEX, - handle, NULL); - if (r) --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0039-yocto-amd-drm-radeon-dpm-properly-enable-disable-vce-when-vce-.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0039-yocto-amd-drm-radeon-dpm-properly-enable-disable-vce-when-vce-.patch deleted file mode 100644 index 4004dba2..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0039-yocto-amd-drm-radeon-dpm-properly-enable-disable-vce-when-vce-.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 3320b5c1ae158d1e41bbe05b15495d4b2bce972b Mon Sep 17 00:00:00 2001 -From: Alex Deucher <alexander.deucher@amd.com> -Date: Wed, 28 Aug 2013 18:53:50 -0400 -Subject: [PATCH 39/44] drm/radeon/dpm: properly enable/disable vce when vce - pg is enabled - -The adds the appropriate function calls to properly re-init -vce before it's used after it has been power gated. - -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/radeon/kv_dpm.c | 11 +++++++---- - 1 file changed, 7 insertions(+), 4 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/kv_dpm.c b/drivers/gpu/drm/radeon/kv_dpm.c -index feacd5c..c8b9d7b 100644 ---- a/drivers/gpu/drm/radeon/kv_dpm.c -+++ b/drivers/gpu/drm/radeon/kv_dpm.c -@@ -1420,7 +1420,6 @@ static int kv_update_vce_dpm(struct radeon_device *rdev, - - if (radeon_new_state->evclk > 0 && radeon_current_state->evclk == 0) { - kv_dpm_powergate_vce(rdev, false); -- /* XXX cik_vce_resume(); */ - if (pi->caps_stable_p_state) - pi->vce_boot_level = table->count - 1; - else -@@ -1443,7 +1442,6 @@ static int kv_update_vce_dpm(struct radeon_device *rdev, - kv_enable_vce_dpm(rdev, true); - } else if (radeon_new_state->evclk == 0 && radeon_current_state->evclk > 0) { - kv_enable_vce_dpm(rdev, false); -- /* XXX cik_vce_suspend(); */ - kv_dpm_powergate_vce(rdev, true); - } - -@@ -1583,11 +1581,16 @@ static void kv_dpm_powergate_vce(struct radeon_device *rdev, bool gate) - pi->vce_power_gated = gate; - - if (gate) { -- if (pi->caps_vce_pg) -+ if (pi->caps_vce_pg) { -+ /* XXX do we need a vce_v1_0_stop() ? */ - kv_notify_message_to_smu(rdev, PPSMC_MSG_VCEPowerOFF); -+ } - } else { -- if (pi->caps_vce_pg) -+ if (pi->caps_vce_pg) { - kv_notify_message_to_smu(rdev, PPSMC_MSG_VCEPowerON); -+ vce_v2_0_resume(rdev); -+ vce_v1_0_start(rdev); -+ } - } - } - --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0040-yocto-amd-drm-radeon-add-vce-debugfs-support.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0040-yocto-amd-drm-radeon-add-vce-debugfs-support.patch deleted file mode 100644 index 9e322246..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0040-yocto-amd-drm-radeon-add-vce-debugfs-support.patch +++ /dev/null @@ -1,98 +0,0 @@ -From da27d56b608ad65f5d76924afd66b82d64e069cb Mon Sep 17 00:00:00 2001 -From: Leo Liu <leo.liu@amd.com> -Date: Mon, 25 Nov 2013 17:30:38 -0500 -Subject: [PATCH 40/44] drm/radeon: add vce debugfs support - -Signed-off-by: Leo Liu <leo.liu@amd.com> ---- - drivers/gpu/drm/radeon/radeon.h | 1 + - drivers/gpu/drm/radeon/radeon_vce.c | 37 +++++++++++++++++++++++++++++++++++ - 2 files changed, 38 insertions(+) - -diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h -index 74928d5..f3a4f34 100644 ---- a/drivers/gpu/drm/radeon/radeon.h -+++ b/drivers/gpu/drm/radeon/radeon.h -@@ -1635,6 +1635,7 @@ struct radeon_vce { - atomic_t handles[RADEON_MAX_VCE_HANDLES]; - struct drm_file *filp[RADEON_MAX_VCE_HANDLES]; - struct delayed_work idle_work; -+ bool status; - }; - - int radeon_vce_init(struct radeon_device *rdev); -diff --git a/drivers/gpu/drm/radeon/radeon_vce.c b/drivers/gpu/drm/radeon/radeon_vce.c -index d130432..eb11ac0 100644 ---- a/drivers/gpu/drm/radeon/radeon_vce.c -+++ b/drivers/gpu/drm/radeon/radeon_vce.c -@@ -41,6 +41,7 @@ - #define FIRMWARE_BONAIRE "radeon/BONAIRE_vce.bin" - - MODULE_FIRMWARE(FIRMWARE_BONAIRE); -+static int radeon_debugfs_vce_init(struct radeon_device *rdev); - - static void radeon_vce_idle_work_handler(struct work_struct *work); - -@@ -146,6 +147,10 @@ int radeon_vce_init(struct radeon_device *rdev) - rdev->vce.filp[i] = NULL; - } - -+ r = radeon_debugfs_vce_init(rdev); -+ if (r) -+ dev_err(rdev->dev, "(%d) Register debugfs file for vce failed\n", r); -+ - return 0; - } - -@@ -249,6 +254,7 @@ static void radeon_vce_idle_work_handler(struct work_struct *work) - schedule_delayed_work(&rdev->vce.idle_work, - msecs_to_jiffies(VCE_IDLE_TIMEOUT_MS)); - } -+ rdev->vce.status = false; - } - - /** -@@ -276,9 +282,40 @@ void radeon_vce_note_usage(struct radeon_device *rdev) - } else { - radeon_set_vce_clocks(rdev, 53300, 40000); - } -+ rdev->vce.status = true; - } - } - -+/* -+ * Debugfs info -+ */ -+#if defined(CONFIG_DEBUG_FS) -+ -+static int radeon_debugfs_vce_info(struct seq_file *m, void *data) -+{ -+ struct drm_info_node *node = (struct drm_info_node *) m->private; -+ struct drm_device *dev = node->minor->dev; -+ struct radeon_device *rdev = dev->dev_private; -+ -+ seq_printf(m, "VCE Status: %s\n", ((rdev->vce.status) ? "Busy" : "Idle")); -+ -+ return 0; -+} -+ -+static struct drm_info_list radeon_vce_info_list[] = { -+ {"radeon_vce_info", radeon_debugfs_vce_info, 0, NULL}, -+}; -+#endif -+ -+static int radeon_debugfs_vce_init(struct radeon_device *rdev) -+{ -+#if defined(CONFIG_DEBUG_FS) -+ return radeon_debugfs_add_files(rdev, radeon_vce_info_list, ARRAY_SIZE(radeon_vce_info_list)); -+#else -+ return 0; -+#endif -+} -+ - /** - * radeon_vce_free_handles - free still open VCE handles - * --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0041-yocto-amd-drm-radeon-add-support-for-vce-2.0-clock-gating.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0041-yocto-amd-drm-radeon-add-support-for-vce-2.0-clock-gating.patch deleted file mode 100644 index 21d14e67..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0041-yocto-amd-drm-radeon-add-support-for-vce-2.0-clock-gating.patch +++ /dev/null @@ -1,165 +0,0 @@ -From 9b70ef3255b81076ded9f0388e3c2ca3519a3239 Mon Sep 17 00:00:00 2001 -From: Alex Deucher <alexander.deucher@amd.com> -Date: Thu, 5 Sep 2013 15:14:28 -0400 -Subject: [PATCH 41/44] drm/radeon: add support for vce 2.0 clock gating - -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/radeon/cikd.h | 10 ++++ - drivers/gpu/drm/radeon/vce_v2_0.c | 111 +++++++++++++++++++++++++++++++++++++ - 2 files changed, 121 insertions(+) - -diff --git a/drivers/gpu/drm/radeon/cikd.h b/drivers/gpu/drm/radeon/cikd.h -index 3224176..f6e7ea0 100644 ---- a/drivers/gpu/drm/radeon/cikd.h -+++ b/drivers/gpu/drm/radeon/cikd.h -@@ -1918,8 +1918,18 @@ - #define VCE_RB_RPTR 0x2018c - #define VCE_RB_WPTR 0x20190 - #define VCE_CLOCK_GATING_A 0x202f8 -+# define CGC_CLK_GATE_DLY_TIMER_MASK (0xf << 0) -+# define CGC_CLK_GATE_DLY_TIMER(x) ((x) << 0) -+# define CGC_CLK_GATER_OFF_DLY_TIMER_MASK (0xff << 4) -+# define CGC_CLK_GATER_OFF_DLY_TIMER(x) ((x) << 4) -+# define CGC_UENC_WAIT_AWAKE (1 << 18) - #define VCE_CLOCK_GATING_B 0x202fc -+#define VCE_CGTT_CLK_OVERRIDE 0x207a0 - #define VCE_UENC_CLOCK_GATING 0x207bc -+# define CLOCK_ON_DELAY_MASK (0xf << 0) -+# define CLOCK_ON_DELAY(x) ((x) << 0) -+# define CLOCK_OFF_DELAY_MASK (0xff << 4) -+# define CLOCK_OFF_DELAY(x) ((x) << 4) - #define VCE_UENC_REG_CLOCK_GATING 0x207c0 - #define VCE_SYS_INT_EN 0x21300 - # define VCE_SYS_INT_TRAP_INTERRUPT_EN (1 << 3) -diff --git a/drivers/gpu/drm/radeon/vce_v2_0.c b/drivers/gpu/drm/radeon/vce_v2_0.c -index 4911d1b..1ac7bb8 100644 ---- a/drivers/gpu/drm/radeon/vce_v2_0.c -+++ b/drivers/gpu/drm/radeon/vce_v2_0.c -@@ -31,6 +31,115 @@ - #include "radeon_asic.h" - #include "cikd.h" - -+static void vce_v2_0_set_sw_cg(struct radeon_device *rdev, bool gated) -+{ -+ u32 tmp; -+ -+ if (gated) { -+ tmp = RREG32(VCE_CLOCK_GATING_B); -+ tmp |= 0xe70000; -+ WREG32(VCE_CLOCK_GATING_B, tmp); -+ -+ tmp = RREG32(VCE_UENC_CLOCK_GATING); -+ tmp |= 0xff000000; -+ WREG32(VCE_UENC_CLOCK_GATING, tmp); -+ -+ tmp = RREG32(VCE_UENC_REG_CLOCK_GATING); -+ tmp &= ~0x3fc; -+ WREG32(VCE_UENC_REG_CLOCK_GATING, tmp); -+ -+ WREG32(VCE_CGTT_CLK_OVERRIDE, 0); -+ } else { -+ tmp = RREG32(VCE_CLOCK_GATING_B); -+ tmp |= 0xe7; -+ tmp &= ~0xe70000; -+ WREG32(VCE_CLOCK_GATING_B, tmp); -+ -+ tmp = RREG32(VCE_UENC_CLOCK_GATING); -+ tmp |= 0x1fe000; -+ tmp &= ~0xff000000; -+ WREG32(VCE_UENC_CLOCK_GATING, tmp); -+ -+ tmp = RREG32(VCE_UENC_REG_CLOCK_GATING); -+ tmp |= 0x3fc; -+ WREG32(VCE_UENC_REG_CLOCK_GATING, tmp); -+ } -+} -+ -+static void vce_v2_0_set_dyn_cg(struct radeon_device *rdev, bool gated) -+{ -+ u32 orig, tmp; -+ -+ tmp = RREG32(VCE_CLOCK_GATING_B); -+ tmp &= ~0x00060006; -+ if (gated) { -+ tmp |= 0xe10000; -+ } else { -+ tmp |= 0xe1; -+ tmp &= ~0xe10000; -+ } -+ WREG32(VCE_CLOCK_GATING_B, tmp); -+ -+ orig = tmp = RREG32(VCE_UENC_CLOCK_GATING); -+ tmp &= ~0x1fe000; -+ tmp &= ~0xff000000; -+ if (tmp != orig) -+ WREG32(VCE_UENC_CLOCK_GATING, tmp); -+ -+ orig = tmp = RREG32(VCE_UENC_REG_CLOCK_GATING); -+ tmp &= ~0x3fc; -+ if (tmp != orig) -+ WREG32(VCE_UENC_REG_CLOCK_GATING, tmp); -+ -+ if (gated) -+ WREG32(VCE_CGTT_CLK_OVERRIDE, 0); -+} -+ -+static void vce_v2_0_disable_cg(struct radeon_device *rdev) -+{ -+ WREG32(VCE_CGTT_CLK_OVERRIDE, 7); -+} -+ -+void vce_v2_0_enable_mgcg(struct radeon_device *rdev, bool enable) -+{ -+ bool sw_cg = false; -+ -+ if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_VCE_MGCG)) { -+ if (sw_cg) -+ vce_v2_0_set_sw_cg(rdev, true); -+ else -+ vce_v2_0_set_dyn_cg(rdev, true); -+ } else { -+ vce_v2_0_disable_cg(rdev); -+ -+ if (sw_cg) -+ vce_v2_0_set_sw_cg(rdev, false); -+ else -+ vce_v2_0_set_dyn_cg(rdev, false); -+ } -+} -+ -+static void vce_v2_0_init_cg(struct radeon_device *rdev) -+{ -+ u32 tmp; -+ -+ tmp = RREG32(VCE_CLOCK_GATING_A); -+ tmp &= ~(CGC_CLK_GATE_DLY_TIMER_MASK | CGC_CLK_GATER_OFF_DLY_TIMER_MASK); -+ tmp |= (CGC_CLK_GATE_DLY_TIMER(0) | CGC_CLK_GATER_OFF_DLY_TIMER(4)); -+ tmp |= CGC_UENC_WAIT_AWAKE; -+ WREG32(VCE_CLOCK_GATING_A, tmp); -+ -+ tmp = RREG32(VCE_UENC_CLOCK_GATING); -+ tmp &= ~(CLOCK_ON_DELAY_MASK | CLOCK_OFF_DELAY_MASK); -+ tmp |= (CLOCK_ON_DELAY(0) | CLOCK_OFF_DELAY(4)); -+ WREG32(VCE_UENC_CLOCK_GATING, tmp); -+ -+ tmp = RREG32(VCE_CLOCK_GATING_B); -+ tmp |= 0x10; -+ tmp &= ~0x100000; -+ WREG32(VCE_CLOCK_GATING_B, tmp); -+} -+ - int vce_v2_0_resume(struct radeon_device *rdev) - { - uint64_t addr = rdev->vce.gpu_addr; -@@ -66,5 +175,7 @@ int vce_v2_0_resume(struct radeon_device *rdev) - WREG32_P(VCE_SYS_INT_EN, VCE_SYS_INT_TRAP_INTERRUPT_EN, - ~VCE_SYS_INT_TRAP_INTERRUPT_EN); - -+ vce_v2_0_init_cg(rdev); -+ - return 0; - } --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0042-yocto-amd-drm-radeon-cik-enable-disable-vce-cg-when-encoding.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0042-yocto-amd-drm-radeon-cik-enable-disable-vce-cg-when-encoding.patch deleted file mode 100644 index b9b96338..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0042-yocto-amd-drm-radeon-cik-enable-disable-vce-cg-when-encoding.patch +++ /dev/null @@ -1,90 +0,0 @@ -From c37b6e8a309e0256e0380984ce293594efea71ba Mon Sep 17 00:00:00 2001 -From: Alex Deucher <alexander.deucher@amd.com> -Date: Fri, 6 Sep 2013 12:33:04 -0400 -Subject: [PATCH 42/44] drm/radeon/cik: enable/disable vce cg when encoding - -Some of the vce clocks are automatic, others need to -be manually enabled. For ease, just disable cg when -vce is active. - -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/radeon/ci_dpm.c | 7 ++++++- - drivers/gpu/drm/radeon/cik.c | 5 +++++ - drivers/gpu/drm/radeon/kv_dpm.c | 4 ++++ - 3 files changed, 15 insertions(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c -index a6a2396..14f7192 100644 ---- a/drivers/gpu/drm/radeon/ci_dpm.c -+++ b/drivers/gpu/drm/radeon/ci_dpm.c -@@ -3598,8 +3598,10 @@ static int ci_update_vce_dpm(struct radeon_device *rdev, - - if (radeon_current_state->evclk != radeon_new_state->evclk) { - if (radeon_new_state->evclk) { -- pi->smc_state_table.VceBootLevel = ci_get_vce_boot_level(rdev); -+ /* turn the clocks on when encoding */ -+ cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, false); - -+ pi->smc_state_table.VceBootLevel = ci_get_vce_boot_level(rdev); - tmp = RREG32_SMC(DPM_TABLE_475); - tmp &= ~VceBootLevel_MASK; - tmp |= VceBootLevel(pi->smc_state_table.VceBootLevel); -@@ -3607,6 +3609,9 @@ static int ci_update_vce_dpm(struct radeon_device *rdev, - - ret = ci_enable_vce_dpm(rdev, true); - } else { -+ /* turn the clocks off when not encoding */ -+ cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, true); -+ - ret = ci_enable_vce_dpm(rdev, false); - } - } -diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c -index 9af1f3f..5635f04 100644 ---- a/drivers/gpu/drm/radeon/cik.c -+++ b/drivers/gpu/drm/radeon/cik.c -@@ -72,6 +72,7 @@ extern void cik_sdma_vm_set_page(struct radeon_device *rdev, - uint64_t pe, - uint64_t addr, unsigned count, - uint32_t incr, uint32_t flags); -+extern void vce_v2_0_enable_mgcg(struct radeon_device *rdev, bool enable); - static void cik_rlc_stop(struct radeon_device *rdev); - static void cik_pcie_gen3_enable(struct radeon_device *rdev); - static void cik_program_aspm(struct radeon_device *rdev); -@@ -5409,6 +5410,10 @@ void cik_update_cg(struct radeon_device *rdev, - cik_enable_hdp_mgcg(rdev, enable); - cik_enable_hdp_ls(rdev, enable); - } -+ -+ if (block & RADEON_CG_BLOCK_VCE) { -+ vce_v2_0_enable_mgcg(rdev, enable); -+ } - } - - static void cik_init_cg(struct radeon_device *rdev) -diff --git a/drivers/gpu/drm/radeon/kv_dpm.c b/drivers/gpu/drm/radeon/kv_dpm.c -index c8b9d7b..a100b23 100644 ---- a/drivers/gpu/drm/radeon/kv_dpm.c -+++ b/drivers/gpu/drm/radeon/kv_dpm.c -@@ -1420,6 +1420,8 @@ static int kv_update_vce_dpm(struct radeon_device *rdev, - - if (radeon_new_state->evclk > 0 && radeon_current_state->evclk == 0) { - kv_dpm_powergate_vce(rdev, false); -+ /* turn the clocks on when encoding */ -+ cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, false); - if (pi->caps_stable_p_state) - pi->vce_boot_level = table->count - 1; - else -@@ -1442,6 +1444,8 @@ static int kv_update_vce_dpm(struct radeon_device *rdev, - kv_enable_vce_dpm(rdev, true); - } else if (radeon_new_state->evclk == 0 && radeon_current_state->evclk > 0) { - kv_enable_vce_dpm(rdev, false); -+ /* turn the clocks off when not encoding */ -+ cik_update_cg(rdev, RADEON_CG_BLOCK_VCE, true); - kv_dpm_powergate_vce(rdev, true); - } - --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0043-yocto-amd-drm-radeon-fix-CP-semaphores-on-CIK.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0043-yocto-amd-drm-radeon-fix-CP-semaphores-on-CIK.patch deleted file mode 100644 index f054bf3e..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0043-yocto-amd-drm-radeon-fix-CP-semaphores-on-CIK.patch +++ /dev/null @@ -1,117 +0,0 @@ -From 407373620f1d98d5c36c46c265ee311a1be87cf4 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig at amd.com> -Date: Wed, 19 Feb 2014 13:21:35 -0500 -Subject: [PATCH 43/44] drm/radeon: fix CP semaphores on CIK -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Christian König <christian.koenig at amd.com> ---- - drivers/gpu/drm/radeon/radeon.h | 4 +++- - drivers/gpu/drm/radeon/radeon_ring.c | 2 +- - drivers/gpu/drm/radeon/radeon_semaphore.c | 19 ++++++++++++++++--- - 3 files changed, 20 insertions(+), 5 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h -index f3a4f34..1044268 100644 ---- a/drivers/gpu/drm/radeon/radeon.h -+++ b/drivers/gpu/drm/radeon/radeon.h -@@ -137,6 +137,9 @@ extern int radeon_aspm; - /* max number of rings */ - #define RADEON_NUM_RINGS 8 - -+/* number of hw syncs before falling back on blocking */ -+#define RADEON_NUM_SYNCS 4 -+ - /* hardcode those limit for now */ - #define RADEON_VA_IB_OFFSET (1 << 20) - #define RADEON_VA_RESERVED_SIZE (8 << 20) -@@ -553,7 +556,6 @@ int radeon_mode_dumb_mmap(struct drm_file *filp, - /* - * Semaphores. - */ --/* everything here is constant */ - struct radeon_semaphore { - struct radeon_sa_bo *sa_bo; - signed waiters; -diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c -index 91457f8..529893f 100644 ---- a/drivers/gpu/drm/radeon/radeon_ring.c -+++ b/drivers/gpu/drm/radeon/radeon_ring.c -@@ -139,7 +139,7 @@ int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib, - } - - /* 64 dwords should be enough for fence too */ -- r = radeon_ring_lock(rdev, ring, 64 + RADEON_NUM_RINGS * 8); -+ r = radeon_ring_lock(rdev, ring, 64 + RADEON_NUM_SYNCS * 8); - if (r) { - dev_err(rdev->dev, "scheduling IB failed (%d).\n", r); - return r; -diff --git a/drivers/gpu/drm/radeon/radeon_semaphore.c b/drivers/gpu/drm/radeon/radeon_semaphore.c -index 2b42aa1..9006b32 100644 ---- a/drivers/gpu/drm/radeon/radeon_semaphore.c -+++ b/drivers/gpu/drm/radeon/radeon_semaphore.c -@@ -34,14 +34,15 @@ - int radeon_semaphore_create(struct radeon_device *rdev, - struct radeon_semaphore **semaphore) - { -+ uint32_t *cpu_addr; - int i, r; - - *semaphore = kmalloc(sizeof(struct radeon_semaphore), GFP_KERNEL); - if (*semaphore == NULL) { - return -ENOMEM; - } -- r = radeon_sa_bo_new(rdev, &rdev->ring_tmp_bo, -- &(*semaphore)->sa_bo, 8, 8, true); -+ r = radeon_sa_bo_new(rdev, &rdev->ring_tmp_bo, &(*semaphore)->sa_bo, -+ 8 * RADEON_NUM_SYNCS, 8, true); - if (r) { - kfree(*semaphore); - *semaphore = NULL; -@@ -49,7 +50,10 @@ int radeon_semaphore_create(struct radeon_device *rdev, - } - (*semaphore)->waiters = 0; - (*semaphore)->gpu_addr = radeon_sa_bo_gpu_addr((*semaphore)->sa_bo); -- *((uint64_t*)radeon_sa_bo_cpu_addr((*semaphore)->sa_bo)) = 0; -+ -+ cpu_addr = radeon_sa_bo_cpu_addr((*semaphore)->sa_bo); -+ for (i = 0; i < RADEON_NUM_SYNCS; ++i) -+ cpu_addr[i] = 0; - - for (i = 0; i < RADEON_NUM_RINGS; ++i) - (*semaphore)->sync_to[i] = NULL; -@@ -125,6 +129,7 @@ int radeon_semaphore_sync_rings(struct radeon_device *rdev, - struct radeon_semaphore *semaphore, - int ring) - { -+ unsigned count = 0; - int i, r; - - for (i = 0; i < RADEON_NUM_RINGS; ++i) { -@@ -140,6 +145,12 @@ int radeon_semaphore_sync_rings(struct radeon_device *rdev, - return -EINVAL; - } - -+ if (++count > RADEON_NUM_SYNCS) { -+ /* not enough room, wait manually */ -+ radeon_fence_wait_locked(fence); -+ continue; -+ } -+ - /* allocate enough space for sync command */ - r = radeon_ring_alloc(rdev, &rdev->ring[i], 16); - if (r) { -@@ -164,6 +175,8 @@ int radeon_semaphore_sync_rings(struct radeon_device *rdev, - - radeon_ring_commit(rdev, &rdev->ring[i]); - radeon_fence_note_sync(fence, ring); -+ -+ semaphore->gpu_addr += 8; - } - - return 0; --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0044-yocto-amd-drm-radeon-disable-dynamic-powering-vce.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0044-yocto-amd-drm-radeon-disable-dynamic-powering-vce.patch deleted file mode 100644 index b2bb83ce..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0044-yocto-amd-drm-radeon-disable-dynamic-powering-vce.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 83e62f79352aa190927cd9769493ac50291bef86 Mon Sep 17 00:00:00 2001 -From: Leo Liu <leo.liu@amd.com> -Date: Mon, 24 Feb 2014 12:55:11 -0500 -Subject: [PATCH 44/44] drm/radeon: disable dynamic powering vce - ---- - drivers/gpu/drm/radeon/radeon_vce.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/radeon/radeon_vce.c b/drivers/gpu/drm/radeon/radeon_vce.c -index eb11ac0..5bfb726 100644 ---- a/drivers/gpu/drm/radeon/radeon_vce.c -+++ b/drivers/gpu/drm/radeon/radeon_vce.c -@@ -245,11 +245,11 @@ static void radeon_vce_idle_work_handler(struct work_struct *work) - - if ((radeon_fence_count_emitted(rdev, TN_RING_TYPE_VCE1_INDEX) == 0) && - (radeon_fence_count_emitted(rdev, TN_RING_TYPE_VCE2_INDEX) == 0)) { -- if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { -+ /*if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { - radeon_dpm_enable_vce(rdev, false); - } else { - radeon_set_vce_clocks(rdev, 0, 0); -- } -+ }*/ - } else { - schedule_delayed_work(&rdev->vce.idle_work, - msecs_to_jiffies(VCE_IDLE_TIMEOUT_MS)); --- -1.7.9.5 - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0045-yocto-amd-drm-radeon-add-Mullins-chip-family.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0045-yocto-amd-drm-radeon-add-Mullins-chip-family.patch deleted file mode 100644 index beb1d5c8..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0045-yocto-amd-drm-radeon-add-Mullins-chip-family.patch +++ /dev/null @@ -1,39 +0,0 @@ -drm/radeon: add Mullins chip family - -Mullins is a new CI-based APU. - -Signed-off-by: Samuel Li <samuel.li@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> -diff -Naur a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c ---- a/drivers/gpu/drm/radeon/radeon_asic.c 2014-04-26 01:51:28.161070642 +0530 -+++ b/drivers/gpu/drm/radeon/radeon_asic.c 2014-04-26 01:58:12.613084276 +0530 -@@ -2484,6 +2484,7 @@ - break; - case CHIP_KAVERI: - case CHIP_KABINI: -+ case CHIP_MULLINS: - rdev->asic = &kv_asic; - /* set num crtcs */ - if (rdev->family == CHIP_KAVERI) { -diff -Naur a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c ---- a/drivers/gpu/drm/radeon/radeon_device.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/radeon_device.c 2014-04-26 01:59:11.645085768 +0530 -@@ -98,6 +98,7 @@ - "BONAIRE", - "KAVERI", - "KABINI", -+ "MULLINS", - "LAST", - }; - -diff -Naur a/drivers/gpu/drm/radeon/radeon_family.h b/drivers/gpu/drm/radeon/radeon_family.h ---- a/drivers/gpu/drm/radeon/radeon_family.h 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/radeon_family.h 2014-04-26 01:59:38.813087463 +0530 -@@ -96,6 +96,7 @@ - CHIP_BONAIRE, - CHIP_KAVERI, - CHIP_KABINI, -+ CHIP_MULLINS, - CHIP_LAST, - }; - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0046-yocto-amd-drm-radeon-update-cik-init-for-Mullins.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0046-yocto-amd-drm-radeon-update-cik-init-for-Mullins.patch deleted file mode 100644 index 3f63009e..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0046-yocto-amd-drm-radeon-update-cik-init-for-Mullins.patch +++ /dev/null @@ -1,140 +0,0 @@ -drm/radeon: update cik init for Mullins. - -Also add golden registers, update firmware loading functions. - -Signed-off-by: Samuel Li <samuel.li@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> -diff -Naur a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c ---- a/drivers/gpu/drm/radeon/cik.c 2014-04-26 01:53:33.429065903 +0530 -+++ b/drivers/gpu/drm/radeon/cik.c 2014-04-26 02:11:35.265111552 +0530 -@@ -53,6 +53,12 @@ - MODULE_FIRMWARE("radeon/KABINI_mec.bin"); - MODULE_FIRMWARE("radeon/KABINI_rlc.bin"); - MODULE_FIRMWARE("radeon/KABINI_sdma.bin"); -+MODULE_FIRMWARE("radeon/MULLINS_pfp.bin"); -+MODULE_FIRMWARE("radeon/MULLINS_me.bin"); -+MODULE_FIRMWARE("radeon/MULLINS_ce.bin"); -+MODULE_FIRMWARE("radeon/MULLINS_mec.bin"); -+MODULE_FIRMWARE("radeon/MULLINS_rlc.bin"); -+MODULE_FIRMWARE("radeon/MULLINS_sdma.bin"); - - extern int r600_ih_ring_alloc(struct radeon_device *rdev); - extern void r600_ih_ring_fini(struct radeon_device *rdev); -@@ -1303,6 +1309,43 @@ - 0xd80c, 0xff000ff0, 0x00000100 - }; - -+static const u32 godavari_golden_registers[] = -+{ -+ 0x55e4, 0xff607fff, 0xfc000100, -+ 0x6ed8, 0x00010101, 0x00010000, -+ 0x9830, 0xffffffff, 0x00000000, -+ 0x98302, 0xf00fffff, 0x00000400, -+ 0x6130, 0xffffffff, 0x00010000, -+ 0x5bb0, 0x000000f0, 0x00000070, -+ 0x5bc0, 0xf0311fff, 0x80300000, -+ 0x98f8, 0x73773777, 0x12010001, -+ 0x98fc, 0xffffffff, 0x00000010, -+ 0x8030, 0x00001f0f, 0x0000100a, -+ 0x2f48, 0x73773777, 0x12010001, -+ 0x2408, 0x000fffff, 0x000c007f, -+ 0x8a14, 0xf000003f, 0x00000007, -+ 0x8b24, 0xffffffff, 0x00ff0fff, -+ 0x30a04, 0x0000ff0f, 0x00000000, -+ 0x28a4c, 0x07ffffff, 0x06000000, -+ 0x4d8, 0x00000fff, 0x00000100, -+ 0xd014, 0x00010000, 0x00810001, -+ 0xd814, 0x00010000, 0x00810001, -+ 0x3e78, 0x00000001, 0x00000002, -+ 0xc768, 0x00000008, 0x00000008, -+ 0xc770, 0x00000f00, 0x00000800, -+ 0xc774, 0x00000f00, 0x00000800, -+ 0xc798, 0x00ffffff, 0x00ff7fbf, -+ 0xc79c, 0x00ffffff, 0x00ff7faf, -+ 0x8c00, 0x000000ff, 0x00000001, -+ 0x214f8, 0x01ff01ff, 0x00000002, -+ 0x21498, 0x007ff800, 0x00200000, -+ 0x2015c, 0xffffffff, 0x00000f40, -+ 0x88c4, 0x001f3ae3, 0x00000082, -+ 0x88d4, 0x0000001f, 0x00000010, -+ 0x30934, 0xffffffff, 0x00000000 -+}; -+ -+ - static void cik_init_golden_registers(struct radeon_device *rdev) - { - switch (rdev->family) { -@@ -1334,6 +1377,20 @@ - kalindi_golden_spm_registers, - (const u32)ARRAY_SIZE(kalindi_golden_spm_registers)); - break; -+ case CHIP_MULLINS: -+ radeon_program_register_sequence(rdev, -+ kalindi_mgcg_cgcg_init, -+ (const u32)ARRAY_SIZE(kalindi_mgcg_cgcg_init)); -+ radeon_program_register_sequence(rdev, -+ godavari_golden_registers, -+ (const u32)ARRAY_SIZE(godavari_golden_registers)); -+ radeon_program_register_sequence(rdev, -+ kalindi_golden_common_registers, -+ (const u32)ARRAY_SIZE(kalindi_golden_common_registers)); -+ radeon_program_register_sequence(rdev, -+ kalindi_golden_spm_registers, -+ (const u32)ARRAY_SIZE(kalindi_golden_spm_registers)); -+ break; - case CHIP_KAVERI: - radeon_program_register_sequence(rdev, - spectre_mgcg_cgcg_init, -@@ -1602,6 +1659,15 @@ - rlc_req_size = KB_RLC_UCODE_SIZE * 4; - sdma_req_size = CIK_SDMA_UCODE_SIZE * 4; - break; -+ case CHIP_MULLINS: -+ chip_name = "MULLINS"; -+ pfp_req_size = CIK_PFP_UCODE_SIZE * 4; -+ me_req_size = CIK_ME_UCODE_SIZE * 4; -+ ce_req_size = CIK_CE_UCODE_SIZE * 4; -+ mec_req_size = CIK_MEC_UCODE_SIZE * 4; -+ rlc_req_size = ML_RLC_UCODE_SIZE * 4; -+ sdma_req_size = CIK_SDMA_UCODE_SIZE * 4; -+ break; - default: BUG(); - } - -@@ -2769,6 +2835,7 @@ - gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN; - break; - case CHIP_KABINI: -+ case CHIP_MULLINS: - default: - rdev->config.cik.max_shader_engines = 1; - rdev->config.cik.max_tile_pipes = 2; -@@ -5039,6 +5106,9 @@ - case CHIP_KABINI: - size = KB_RLC_UCODE_SIZE; - break; -+ case CHIP_MULLINS: -+ size = ML_RLC_UCODE_SIZE; -+ break; - } - - cik_rlc_stop(rdev); -@@ -5786,6 +5856,7 @@ - buffer[count++] = 0x00000000; - break; - case CHIP_KABINI: -+ case CHIP_MULLINS: - buffer[count++] = 0x00000000; /* XXX */ - buffer[count++] = 0x00000000; - break; -diff -Naur a/drivers/gpu/drm/radeon/radeon_ucode.h b/drivers/gpu/drm/radeon/radeon_ucode.h ---- a/drivers/gpu/drm/radeon/radeon_ucode.h 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/gpu/drm/radeon/radeon_ucode.h 2014-04-26 02:12:27.753109445 +0530 -@@ -52,6 +52,7 @@ - #define BONAIRE_RLC_UCODE_SIZE 2048 - #define KB_RLC_UCODE_SIZE 2560 - #define KV_RLC_UCODE_SIZE 2560 -+#define ML_RLC_UCODE_SIZE 2560 - - /* MC */ - #define BTC_MC_UCODE_SIZE 6024 diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0047-yocto-amd-drm-radeon-add-Mullins-UVD-support.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0047-yocto-amd-drm-radeon-add-Mullins-UVD-support.patch deleted file mode 100644 index 0529e3c0..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0047-yocto-amd-drm-radeon-add-Mullins-UVD-support.patch +++ /dev/null @@ -1,17 +0,0 @@ -drm/radeon/: add Mullins UVD support. - -Has same version of UVD as other CIK parts. - -Signed-off-by: Samuel Li <samuel.li@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> -diff -Naur a/drivers/gpu/drm/radeon/radeon_uvd.c b/drivers/gpu/drm/radeon/radeon_uvd.c ---- a/drivers/gpu/drm/radeon/radeon_uvd.c 2014-04-26 01:50:28.941068710 +0530 -+++ b/drivers/gpu/drm/radeon/radeon_uvd.c 2014-04-26 02:15:33.177108251 +0530 -@@ -98,6 +98,7 @@ - case CHIP_BONAIRE: - case CHIP_KABINI: - case CHIP_KAVERI: -+ case CHIP_MULLINS: - fw_name = FIRMWARE_BONAIRE; - break; - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0048-yocto-amd-drm-radeon-add-Mullins-dpm-support.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0048-yocto-amd-drm-radeon-add-Mullins-dpm-support.patch deleted file mode 100644 index 001df0a7..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0048-yocto-amd-drm-radeon-add-Mullins-dpm-support.patch +++ /dev/null @@ -1,111 +0,0 @@ -drm/radeon: add Mullins dpm support. - -Generic dpm support similar to Kabini. Mullins specific features -will be worked on later. - -Signed-off-by: Samuel Li <samuel.li@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> -diff -Naur a/drivers/gpu/drm/radeon/kv_dpm.c b/drivers/gpu/drm/radeon/kv_dpm.c ---- a/drivers/gpu/drm/radeon/kv_dpm.c 2014-04-26 01:53:33.433066497 +0530 -+++ b/drivers/gpu/drm/radeon/kv_dpm.c 2014-04-26 02:25:06.745138697 +0530 -@@ -639,7 +639,7 @@ - - static int kv_unforce_levels(struct radeon_device *rdev) - { -- if (rdev->family == CHIP_KABINI) -+ if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) - return kv_notify_message_to_smu(rdev, PPSMC_MSG_NoForcedLevel); - else - return kv_set_enabled_levels(rdev); -@@ -1625,7 +1625,7 @@ - if (pi->acp_power_gated == gate) - return; - -- if (rdev->family == CHIP_KABINI) -+ if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) - return; - - pi->acp_power_gated = gate; -@@ -1799,7 +1799,7 @@ - } - } - -- if (rdev->family == CHIP_KABINI) { -+ if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { - if (pi->enable_dpm) { - kv_set_valid_clock_range(rdev, new_ps); - kv_update_dfs_bypass_settings(rdev, new_ps); -@@ -1880,7 +1880,7 @@ - { - struct kv_power_info *pi = kv_get_pi(rdev); - -- if (rdev->family == CHIP_KABINI) { -+ if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { - kv_force_lowest_valid(rdev); - kv_init_graphics_levels(rdev); - kv_program_bootup_state(rdev); -@@ -1959,7 +1959,7 @@ - break; - } - -- if (rdev->family == CHIP_KABINI) -+ if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) - return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i); - else - return kv_set_enabled_level(rdev, i); -@@ -1979,7 +1979,7 @@ - break; - } - -- if (rdev->family == CHIP_KABINI) -+ if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) - return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i); - else - return kv_set_enabled_level(rdev, i); -@@ -2136,7 +2136,7 @@ - else - pi->battery_state = false; - -- if (rdev->family == CHIP_KABINI) { -+ if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { - ps->dpm0_pg_nb_ps_lo = 0x1; - ps->dpm0_pg_nb_ps_hi = 0x0; - ps->dpmx_nb_ps_lo = 0x1; -@@ -2197,7 +2197,7 @@ - if (pi->lowest_valid > pi->highest_valid) - return -EINVAL; - -- if (rdev->family == CHIP_KABINI) { -+ if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { - for (i = pi->lowest_valid; i <= pi->highest_valid; i++) { - pi->graphics_level[i].GnbSlow = 1; - pi->graphics_level[i].ForceNbPs1 = 0; -@@ -2342,7 +2342,7 @@ - struct kv_power_info *pi = kv_get_pi(rdev); - u32 nbdpmconfig1; - -- if (rdev->family == CHIP_KABINI) -+ if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) - return; - - if (pi->sys_info.nb_dpm_enable) { -@@ -2649,7 +2649,7 @@ - - pi->sram_end = SMC_RAM_END; - -- if (rdev->family == CHIP_KABINI) -+ if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) - pi->high_voltage_t = 4001; - - pi->enable_nb_dpm = true; -diff -Naur a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c ---- a/drivers/gpu/drm/radeon/radeon_pm.c 2014-04-26 01:51:53.857071705 +0530 -+++ b/drivers/gpu/drm/radeon/radeon_pm.c 2014-04-26 02:25:52.577153751 +0530 -@@ -1298,6 +1298,7 @@ - case CHIP_BONAIRE: - case CHIP_KABINI: - case CHIP_KAVERI: -+ case CHIP_MULLINS: - /* DPM requires the RLC, RV770+ dGPU requires SMC */ - if (!rdev->rlc_fw) - rdev->pm.pm_method = PM_METHOD_PROFILE; diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0049-yocto-amd-drm-radeon-modesetting-updates-for-Mullins.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0049-yocto-amd-drm-radeon-modesetting-updates-for-Mullins.patch deleted file mode 100644 index 7b21e922..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0049-yocto-amd-drm-radeon-modesetting-updates-for-Mullins.patch +++ /dev/null @@ -1,21 +0,0 @@ -drm/radeon: modesetting updates for Mullins. - -Uses the same code as Kabini. - -Signed-off-by: Samuel Li <samuel.li@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> -diff -Naur a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c ---- a/drivers/gpu/drm/radeon/atombios_crtc.c 2014-04-26 01:50:23.277068059 +0530 -+++ b/drivers/gpu/drm/radeon/atombios_crtc.c 2014-04-26 02:30:34.765161214 +0530 -@@ -1689,8 +1689,9 @@ - } - /* otherwise, pick one of the plls */ - if ((rdev->family == CHIP_KAVERI) || -- (rdev->family == CHIP_KABINI)) { -- /* KB/KV has PPLL1 and PPLL2 */ -+ (rdev->family == CHIP_KABINI) || -+ (rdev->family == CHIP_MULLINS)) { -+ /* KB/KV/ML has PPLL1 and PPLL2 */ - pll_in_use = radeon_get_pll_use_mask(crtc); - if (!(pll_in_use & (1 << ATOM_PPLL2))) - return ATOM_PPLL2; diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0050-yocto-amd-drm-radeon-add-pci-ids-for-Mullins.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0050-yocto-amd-drm-radeon-add-pci-ids-for-Mullins.patch deleted file mode 100644 index daf70386..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0050-yocto-amd-drm-radeon-add-pci-ids-for-Mullins.patch +++ /dev/null @@ -1,30 +0,0 @@ -drm/radeon: add pci ids for Mullins - -Signed-off-by: Samuel Li <samuel.li@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> -diff -Naur a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h ---- a/include/drm/drm_pciids.h 2013-11-04 05:11:51.000000000 +0530 -+++ b/include/drm/drm_pciids.h 2014-04-26 02:41:24.721174148 +0530 -@@ -625,6 +625,22 @@ - {0x1002, 0x983d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x983e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x983f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ -+ {0x1002, 0x9850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ -+ {0x1002, 0x9851, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ -+ {0x1002, 0x9852, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ -+ {0x1002, 0x9853, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ -+ {0x1002, 0x9854, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ -+ {0x1002, 0x9855, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ -+ {0x1002, 0x9856, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ -+ {0x1002, 0x9857, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ -+ {0x1002, 0x9858, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ -+ {0x1002, 0x9859, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ -+ {0x1002, 0x985A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ -+ {0x1002, 0x985B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ -+ {0x1002, 0x985C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ -+ {0x1002, 0x985D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ -+ {0x1002, 0x985E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ -+ {0x1002, 0x985F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9901, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9903, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0051-yocto-amd-drm-radeon-add-Mulins-VCE-support.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0051-yocto-amd-drm-radeon-add-Mulins-VCE-support.patch deleted file mode 100644 index b46eaa73..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0051-yocto-amd-drm-radeon-add-Mulins-VCE-support.patch +++ /dev/null @@ -1,17 +0,0 @@ -From 0b42c7cafb1f0f836c26dd5f0309d400a3b33740 Mon Sep 17 00:00:00 2001 -From: Leo Liu <leo.liu@amd.com> -Date: Mon, 28 Apr 2014 15:44:55 -0400 -Subject: [PATCH] drm/radeon: add Mulins VCE support - -Signed-off-by: Leo Liu <leo.liu@amd.com> -diff -Naur a/drivers/gpu/drm/radeon/radeon_vce.c b/drivers/gpu/drm/radeon/radeon_vce.c ---- a/drivers/gpu/drm/radeon/radeon_vce.c 2014-04-29 15:47:47.888192142 +0530 -+++ b/drivers/gpu/drm/radeon/radeon_vce.c 2014-04-29 15:50:44.172184659 +0530 -@@ -67,6 +67,7 @@ - case CHIP_BONAIRE: - case CHIP_KAVERI: - case CHIP_KABINI: -+ case CHIP_MULLINS: - fw_name = FIRMWARE_BONAIRE; - break; - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0052-yocto-amd-clear-exceptions-in-AMD-FXSAVE-workaround.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0052-yocto-amd-clear-exceptions-in-AMD-FXSAVE-workaround.patch deleted file mode 100644 index ccc0d73a..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0052-yocto-amd-clear-exceptions-in-AMD-FXSAVE-workaround.patch +++ /dev/null @@ -1,34 +0,0 @@ -Backport of commit id 26bef1318adc1b3a530ecc807ef99346db2aa8b0 to kernel 3.12 - -Before we do an EMMS in the AMD FXSAVE information leak workaround we -need to clear any pending exceptions, otherwise we trap with a -floating-point exception inside this code. - -Reported-by: halfdog <me@halfdog.net> -Tested-by: Borislav Petkov <bp@suse.de> -Link: http://lkml.kernel.org/r/CA%2B55aFxQnY_PCG_n4=0w-VG=YLXL-yr7oMxyy0WU2gCBAf3ydg@mail.gmail.com -Signed-off-by: H. Peter Anvin <hpa@zytor.com> -Signed-off-by: Arindam Nath <arindam.nath@amd.com> -diff -Naur a/arch/x86/include/asm/fpu-internal.h b/arch/x86/include/asm/fpu-internal.h ---- a/arch/x86/include/asm/fpu-internal.h 2013-11-04 05:11:51.000000000 +0530 -+++ b/arch/x86/include/asm/fpu-internal.h 2014-04-09 16:51:26.665126690 +0530 -@@ -293,12 +293,13 @@ - /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception - is pending. Clear the x87 state here by setting it to fixed - values. "m" is a random variable that should be in L1 */ -- alternative_input( -- ASM_NOP8 ASM_NOP2, -- "emms\n\t" /* clear stack tags */ -- "fildl %P[addr]", /* set F?P to defined value */ -- X86_FEATURE_FXSAVE_LEAK, -- [addr] "m" (tsk->thread.fpu.has_fpu)); -+ if (unlikely(static_cpu_has(X86_FEATURE_FXSAVE_LEAK))) { -+ asm volatile( -+ "fnclex\n\t" -+ "emms\n\t" -+ "fildl %P[addr]" /* set F?P to defined value */ -+ : : [addr] "m" (tsk->thread.fpu.has_fpu)); -+ } - - return fpu_restore_checking(&tsk->thread.fpu); - } diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0053-yocto-amd-i2c-piix4-add-support-for-AMD-ML-and-CZ-SMBus-changes.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0053-yocto-amd-i2c-piix4-add-support-for-AMD-ML-and-CZ-SMBus-changes.patch deleted file mode 100644 index 556e5806..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0053-yocto-amd-i2c-piix4-add-support-for-AMD-ML-and-CZ-SMBus-changes.patch +++ /dev/null @@ -1,87 +0,0 @@ -Backport of commit id 032f708bc4f6da868ec49dac48ddf3670d8035d3 - -i2c: piix4: Add support for AMD ML and CZ SMBus changes - -The locations of SMBus register base address and enablement bit are changed -from AMD ML, which need this patch to be supported. - -Signed-off-by: Shane Huang <shane.huang@amd.com> -Reviewed-by: Jean Delvare <khali@linux-fr.org> -Signed-off-by: Wolfram Sang <wsa@the-dreams.de> -Cc: stable@vger.kernel.org -Signed-off-by: Arindam Nath <arindam.nath@amd.com> -diff -Naur a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c ---- a/drivers/i2c/busses/i2c-piix4.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/i2c/busses/i2c-piix4.c 2014-05-06 22:03:36.945675193 +0530 -@@ -22,7 +22,7 @@ - Intel PIIX4, 440MX - Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100 - ATI IXP200, IXP300, IXP400, SB600, SB700/SP5100, SB800 -- AMD Hudson-2, CZ -+ AMD Hudson-2, ML, CZ - SMSC Victory66 - - Note: we assume there can only be one device, with one or more -@@ -235,7 +235,8 @@ - { - unsigned short piix4_smba; - unsigned short smba_idx = 0xcd6; -- u8 smba_en_lo, smba_en_hi, i2ccfg, i2ccfg_offset = 0x10, smb_en; -+ u8 smba_en_lo, smba_en_hi, smb_en, smb_en_status; -+ u8 i2ccfg, i2ccfg_offset = 0x10; - - /* SB800 and later SMBus does not support forcing address */ - if (force || force_addr) { -@@ -245,7 +246,15 @@ - } - - /* Determine the address of the SMBus areas */ -- smb_en = (aux) ? 0x28 : 0x2c; -+ if ((PIIX4_dev->vendor == PCI_VENDOR_ID_AMD && -+ PIIX4_dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS && -+ PIIX4_dev->revision >= 0x41) || -+ (PIIX4_dev->vendor == PCI_VENDOR_ID_AMD && -+ PIIX4_dev->device == 0x790b && -+ PIIX4_dev->revision >= 0x49)) -+ smb_en = 0x00; -+ else -+ smb_en = (aux) ? 0x28 : 0x2c; - - if (!request_region(smba_idx, 2, "smba_idx")) { - dev_err(&PIIX4_dev->dev, "SMBus base address index region " -@@ -258,13 +267,22 @@ - smba_en_hi = inb_p(smba_idx + 1); - release_region(smba_idx, 2); - -- if ((smba_en_lo & 1) == 0) { -+ if (!smb_en) { -+ smb_en_status = smba_en_lo & 0x10; -+ piix4_smba = smba_en_hi << 8; -+ if (aux) -+ piix4_smba |= 0x20; -+ } else { -+ smb_en_status = smba_en_lo & 0x01; -+ piix4_smba = ((smba_en_hi << 8) | smba_en_lo) & 0xffe0; -+ } -+ -+ if (!smb_en_status) { - dev_err(&PIIX4_dev->dev, - "Host SMBus controller not enabled!\n"); - return -ENODEV; - } - -- piix4_smba = ((smba_en_hi << 8) | smba_en_lo) & 0xffe0; - if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) - return -ENODEV; - -diff -Naur a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig ---- a/drivers/i2c/busses/Kconfig 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/i2c/busses/Kconfig 2014-05-06 21:47:27.557717841 +0530 -@@ -151,6 +151,7 @@ - ATI SB700/SP5100 - ATI SB800 - AMD Hudson-2 -+ AMD ML - AMD CZ - Serverworks OSB4 - Serverworks CSB5 diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0054-yocto-amd-i2c-piix4-use-different-message-for-AMD-auxiliary-SMBus-controller.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0054-yocto-amd-i2c-piix4-use-different-message-for-AMD-auxiliary-SMBus-controller.patch deleted file mode 100644 index 7808bdcf..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0054-yocto-amd-i2c-piix4-use-different-message-for-AMD-auxiliary-SMBus-controller.patch +++ /dev/null @@ -1,24 +0,0 @@ -Backport of commit id 85fd0fe6fc002deba03fe36c1c9726cde1e6331c - -i2c: piix4: Use different message for AMD Auxiliary SMBus Controller - -Same messages for AMD main and auxiliary SMBus controllers lead to confusion, -this patch is to remove confusion and keep consistent with non-AMD products. - -Signed-off-by: Shane Huang <shane.huang@amd.com> -Reviewed-by: Jean Delvare <khali@linux-fr.org> -Signed-off-by: Wolfram Sang <wsa@the-dreams.de> -Signed-off-by: Arindam Nath <arindam.nath@amd.com> -diff -Naur a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c ---- a/drivers/i2c/busses/i2c-piix4.c 2014-05-06 22:10:41.501656511 +0530 -+++ b/drivers/i2c/busses/i2c-piix4.c 2014-05-06 22:12:26.333651900 +0530 -@@ -295,7 +295,8 @@ - /* Aux SMBus does not support IRQ information */ - if (aux) { - dev_info(&PIIX4_dev->dev, -- "SMBus Host Controller at 0x%x\n", piix4_smba); -+ "Auxiliary SMBus Host Controller at 0x%x\n", -+ piix4_smba); - return piix4_smba; - } - diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0055-yocto-amd-change-acpi-enforce-resources-to-lax.patch b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0055-yocto-amd-change-acpi-enforce-resources-to-lax.patch deleted file mode 100644 index cf5be6c8..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/0055-yocto-amd-change-acpi-enforce-resources-to-lax.patch +++ /dev/null @@ -1,19 +0,0 @@ -On some AMD platforms, the SMBus IO region 0xb00 - 0xb07 conflicts with the -corresponding ACPI SystemIO region. This prevents the SMBus host controller -driver to function correctly. We set acpi_enforce_resources to -ENFORCE_RESOURCES_LAX so that the SMBus driver can work normally, even -though a warning message notifying the conflict is printed in system logs. - -Signed-off-by: Arindam Nath <arindam.nath@amd.com> -diff -Naur a/drivers/acpi/osl.c b/drivers/acpi/osl.c ---- a/drivers/acpi/osl.c 2013-11-04 05:11:51.000000000 +0530 -+++ b/drivers/acpi/osl.c 2014-05-06 16:41:51.078524581 +0530 -@@ -1533,7 +1533,7 @@ - #define ENFORCE_RESOURCES_LAX 1 - #define ENFORCE_RESOURCES_NO 0 - --static unsigned int acpi_enforce_resources = ENFORCE_RESOURCES_STRICT; -+static unsigned int acpi_enforce_resources = ENFORCE_RESOURCES_LAX; - - static int __init acpi_enforce_resources_setup(char *str) - { diff --git a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/defconfig b/meta-steppeeagle/recipes-kernel/linux/linux-yocto/defconfig deleted file mode 100644 index fef542cd..00000000 --- a/meta-steppeeagle/recipes-kernel/linux/linux-yocto/defconfig +++ /dev/null @@ -1,4181 +0,0 @@ -# -# Automatically generated file; DO NOT EDIT. -# Linux/x86 3.12.0 Kernel Configuration -# -CONFIG_64BIT=y -CONFIG_X86_64=y -CONFIG_X86=y -CONFIG_INSTRUCTION_DECODER=y -CONFIG_OUTPUT_FORMAT="elf64-x86-64" -CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig" -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_MMU=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_GENERIC_ISA_DMA=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_ARCH_MAY_HAVE_PC_FDC=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ARCH_HAS_CPU_RELAX=y -CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_HAS_CPU_AUTOPROBE=y -CONFIG_HAVE_SETUP_PER_CPU_AREA=y -CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y -CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_ZONE_DMA32=y -CONFIG_AUDIT_ARCH=y -CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y -CONFIG_X86_64_SMP=y -CONFIG_X86_HT=y -CONFIG_ARCH_HWEIGHT_CFLAGS="-fcall-saved-rdi -fcall-saved-rsi -fcall-saved-rdx -fcall-saved-rcx -fcall-saved-r8 -fcall-saved-r9 -fcall-saved-r10 -fcall-saved-r11" -CONFIG_ARCH_CPU_PROBE_RELEASE=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_IRQ_WORK=y -CONFIG_BUILDTIME_EXTABLE_SORT=y - -# -# General setup -# -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_CROSS_COMPILE="" -# CONFIG_COMPILE_TEST is not set -CONFIG_LOCALVERSION="-yocto-standard" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_BZIP2=y -CONFIG_HAVE_KERNEL_LZMA=y -CONFIG_HAVE_KERNEL_XZ=y -CONFIG_HAVE_KERNEL_LZO=y -CONFIG_HAVE_KERNEL_LZ4=y -CONFIG_KERNEL_GZIP=y -# CONFIG_KERNEL_BZIP2 is not set -# CONFIG_KERNEL_LZMA is not set -# CONFIG_KERNEL_XZ is not set -# CONFIG_KERNEL_LZO is not set -# CONFIG_KERNEL_LZ4 is not set -CONFIG_DEFAULT_HOSTNAME="(none)" -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -CONFIG_FHANDLE=y -# CONFIG_AUDIT is not set - -# -# IRQ subsystem -# -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_PENDING_IRQ=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_SPARSE_IRQ=y -CONFIG_CLOCKSOURCE_WATCHDOG=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y -CONFIG_GENERIC_CMOS_UPDATE=y - -# -# Timers subsystem -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ_COMMON=y -# CONFIG_HZ_PERIODIC is not set -CONFIG_NO_HZ_IDLE=y -# CONFIG_NO_HZ_FULL is not set -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y - -# -# CPU/Task time and stats accounting -# -CONFIG_TICK_CPU_ACCOUNTING=y -# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set -# CONFIG_IRQ_TIME_ACCOUNTING is not set -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -# CONFIG_TASKSTATS is not set - -# -# RCU Subsystem -# -CONFIG_TREE_PREEMPT_RCU=y -CONFIG_PREEMPT_RCU=y -CONFIG_RCU_STALL_COMMON=y -# CONFIG_RCU_USER_QS is not set -CONFIG_RCU_FANOUT=64 -CONFIG_RCU_FANOUT_LEAF=16 -# CONFIG_RCU_FANOUT_EXACT is not set -CONFIG_RCU_FAST_NO_HZ=y -# CONFIG_TREE_RCU_TRACE is not set -# CONFIG_RCU_BOOST is not set -# CONFIG_RCU_NOCB_CPU is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=17 -CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y -CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y -CONFIG_ARCH_WANTS_PROT_NUMA_PROT_NONE=y -# CONFIG_NUMA_BALANCING is not set -CONFIG_CGROUPS=y -CONFIG_CGROUP_DEBUG=y -CONFIG_CGROUP_FREEZER=y -CONFIG_CGROUP_DEVICE=y -CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y -CONFIG_CGROUP_CPUACCT=y -CONFIG_RESOURCE_COUNTERS=y -CONFIG_MEMCG=y -CONFIG_MEMCG_SWAP=y -CONFIG_MEMCG_SWAP_ENABLED=y -CONFIG_MEMCG_KMEM=y -# CONFIG_CGROUP_HUGETLB is not set -CONFIG_CGROUP_PERF=y -CONFIG_CGROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_CFS_BANDWIDTH is not set -CONFIG_RT_GROUP_SCHED=y -CONFIG_BLK_CGROUP=y -# CONFIG_DEBUG_BLK_CGROUP is not set -CONFIG_CHECKPOINT_RESTORE=y -CONFIG_NAMESPACES=y -CONFIG_UTS_NS=y -CONFIG_IPC_NS=y -CONFIG_USER_NS=y -CONFIG_PID_NS=y -CONFIG_NET_NS=y -CONFIG_UIDGID_STRICT_TYPE_CHECKS=y -CONFIG_SCHED_AUTOGROUP=y -CONFIG_MM_OWNER=y -# CONFIG_SYSFS_DEPRECATED is not set -CONFIG_RELAY=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -# CONFIG_RD_XZ is not set -# CONFIG_RD_LZO is not set -# CONFIG_RD_LZ4 is not set -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_HAVE_UID16=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_HAVE_PCSPKR_PLATFORM=y -CONFIG_EXPERT=y -CONFIG_UID16=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -CONFIG_KALLSYMS_ALL=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_PCSPKR_PLATFORM=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y -CONFIG_PCI_QUIRKS=y -CONFIG_EMBEDDED=y -CONFIG_HAVE_PERF_EVENTS=y - -# -# Kernel Performance Events And Counters -# -CONFIG_PERF_EVENTS=y -# CONFIG_DEBUG_PERF_USE_VMALLOC is not set -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLUB_DEBUG=y -CONFIG_COMPAT_BRK=y -# CONFIG_SLAB is not set -CONFIG_SLUB=y -# CONFIG_SLOB is not set -CONFIG_SLUB_CPU_PARTIAL=y -CONFIG_PROFILING=y -CONFIG_TRACEPOINTS=y -CONFIG_OPROFILE=y -# CONFIG_OPROFILE_EVENT_MULTIPLEX is not set -CONFIG_HAVE_OPROFILE=y -CONFIG_OPROFILE_NMI_TIMER=y -CONFIG_KPROBES=y -# CONFIG_JUMP_LABEL is not set -CONFIG_KPROBES_ON_FTRACE=y -CONFIG_UPROBES=y -# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_KRETPROBES=y -CONFIG_HAVE_IOREMAP_PROT=y -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_OPTPROBES=y -CONFIG_HAVE_KPROBES_ON_FTRACE=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_DMA_ATTRS=y -CONFIG_USE_GENERIC_SMP_HELPERS=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_HAVE_HW_BREAKPOINT=y -CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y -CONFIG_HAVE_USER_RETURN_NOTIFIER=y -CONFIG_HAVE_PERF_EVENTS_NMI=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y -CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y -CONFIG_HAVE_CMPXCHG_LOCAL=y -CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y -CONFIG_ARCH_WANT_OLD_COMPAT_IPC=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_SECCOMP_FILTER=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y -CONFIG_HAVE_ARCH_SOFT_DIRTY=y -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_COMPAT_OLD_SIGACTION=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_MODULE_SIG is not set -CONFIG_STOP_MACHINE=y -CONFIG_BLOCK=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_BSGLIB=y -CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_THROTTLING=y -# CONFIG_BLK_CMDLINE_PARSER is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_AIX_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set -# CONFIG_CMDLINE_PARTITION is not set -CONFIG_BLOCK_COMPAT=y - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -CONFIG_CFQ_GROUP_IOSCHED=y -CONFIG_DEFAULT_DEADLINE=y -# CONFIG_DEFAULT_CFQ is not set -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="deadline" -CONFIG_UNINLINE_SPIN_UNLOCK=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_FREEZER=y - -# -# Processor type and features -# -CONFIG_ZONE_DMA=y -CONFIG_SMP=y -# CONFIG_X86_X2APIC is not set -CONFIG_X86_MPPARSE=y -CONFIG_X86_EXTENDED_PLATFORM=y -# CONFIG_X86_VSMP is not set -# CONFIG_X86_INTEL_LPSS is not set -CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y -CONFIG_SCHED_OMIT_FRAME_POINTER=y -# CONFIG_HYPERVISOR_GUEST is not set -CONFIG_NO_BOOTMEM=y -# CONFIG_MEMTEST is not set -# CONFIG_MK8 is not set -# CONFIG_MPSC is not set -CONFIG_MCORE2=y -# CONFIG_MATOM is not set -# CONFIG_GENERIC_CPU is not set -CONFIG_X86_INTERNODE_CACHE_SHIFT=6 -CONFIG_X86_L1_CACHE_SHIFT=6 -CONFIG_X86_INTEL_USERCOPY=y -CONFIG_X86_USE_PPRO_CHECKSUM=y -CONFIG_X86_P6_NOP=y -CONFIG_X86_TSC=y -CONFIG_X86_CMPXCHG64=y -CONFIG_X86_CMOV=y -CONFIG_X86_MINIMUM_CPU_FAMILY=64 -CONFIG_X86_DEBUGCTLMSR=y -CONFIG_PROCESSOR_SELECT=y -CONFIG_CPU_SUP_INTEL=y -CONFIG_CPU_SUP_AMD=y -CONFIG_CPU_SUP_CENTAUR=y -CONFIG_HPET_TIMER=y -CONFIG_HPET_EMULATE_RTC=y -CONFIG_DMI=y -CONFIG_GART_IOMMU=y -CONFIG_CALGARY_IOMMU=y -CONFIG_CALGARY_IOMMU_ENABLED_BY_DEFAULT=y -CONFIG_SWIOTLB=y -CONFIG_IOMMU_HELPER=y -# CONFIG_MAXSMP is not set -CONFIG_NR_CPUS=24 -CONFIG_SCHED_SMT=y -CONFIG_SCHED_MC=y -# CONFIG_PREEMPT_NONE is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -CONFIG_PREEMPT=y -CONFIG_PREEMPT_COUNT=y -CONFIG_X86_LOCAL_APIC=y -CONFIG_X86_IO_APIC=y -CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y -CONFIG_X86_MCE=y -CONFIG_X86_MCE_INTEL=y -CONFIG_X86_MCE_AMD=y -CONFIG_X86_MCE_THRESHOLD=y -CONFIG_X86_MCE_INJECT=m -CONFIG_X86_THERMAL_VECTOR=y -# CONFIG_I8K is not set -CONFIG_MICROCODE=m -CONFIG_MICROCODE_INTEL=y -CONFIG_MICROCODE_AMD=y -CONFIG_MICROCODE_OLD_INTERFACE=y -CONFIG_MICROCODE_INTEL_LIB=y -# CONFIG_MICROCODE_INTEL_EARLY is not set -# CONFIG_MICROCODE_AMD_EARLY is not set -CONFIG_X86_MSR=m -CONFIG_X86_CPUID=m -CONFIG_ARCH_PHYS_ADDR_T_64BIT=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_DIRECT_GBPAGES=y -CONFIG_NUMA=y -CONFIG_AMD_NUMA=y -CONFIG_X86_64_ACPI_NUMA=y -CONFIG_NODES_SPAN_OTHER_NODES=y -# CONFIG_NUMA_EMU is not set -CONFIG_NODES_SHIFT=6 -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_MEMORY_PROBE=y -CONFIG_ARCH_PROC_KCORE_TEXT=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_SPARSEMEM_MANUAL=y -CONFIG_SPARSEMEM=y -CONFIG_NEED_MULTIPLE_NODES=y -CONFIG_HAVE_MEMORY_PRESENT=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SPARSEMEM_ALLOC_MEM_MAP_TOGETHER=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MEMBLOCK_NODE_MAP=y -CONFIG_ARCH_DISCARD_MEMBLOCK=y -CONFIG_MEMORY_ISOLATION=y -# CONFIG_MOVABLE_NODE is not set -CONFIG_HAVE_BOOTMEM_INFO_NODE=y -CONFIG_MEMORY_HOTPLUG=y -CONFIG_MEMORY_HOTPLUG_SPARSE=y -CONFIG_MEMORY_HOTREMOVE=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4 -CONFIG_BALLOON_COMPACTION=y -CONFIG_COMPACTION=y -CONFIG_MIGRATION=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_ZONE_DMA_FLAG=1 -CONFIG_BOUNCE=y -CONFIG_NEED_BOUNCE_POOL=y -CONFIG_VIRT_TO_BUS=y -CONFIG_MMU_NOTIFIER=y -CONFIG_KSM=y -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y -CONFIG_MEMORY_FAILURE=y -# CONFIG_HWPOISON_INJECT is not set -CONFIG_TRANSPARENT_HUGEPAGE=y -# CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS is not set -CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y -CONFIG_CROSS_MEMORY_ATTACH=y -CONFIG_CLEANCACHE=y -CONFIG_FRONTSWAP=y -# CONFIG_CMA is not set -# CONFIG_ZBUD is not set -# CONFIG_ZSWAP is not set -# CONFIG_MEM_SOFT_DIRTY is not set -CONFIG_X86_CHECK_BIOS_CORRUPTION=y -CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y -CONFIG_X86_RESERVE_LOW=64 -CONFIG_MTRR=y -# CONFIG_MTRR_SANITIZER is not set -CONFIG_X86_PAT=y -CONFIG_ARCH_USES_PG_UNCACHED=y -CONFIG_ARCH_RANDOM=y -CONFIG_X86_SMAP=y -CONFIG_EFI=y -CONFIG_EFI_STUB=y -CONFIG_SECCOMP=y -# CONFIG_CC_STACKPROTECTOR is not set -# CONFIG_HZ_100 is not set -# CONFIG_HZ_250 is not set -# CONFIG_HZ_300 is not set -CONFIG_HZ_1000=y -CONFIG_HZ=1000 -CONFIG_SCHED_HRTICK=y -CONFIG_KEXEC=y -CONFIG_CRASH_DUMP=y -# CONFIG_KEXEC_JUMP is not set -CONFIG_PHYSICAL_START=0x1000000 -CONFIG_RELOCATABLE=y -CONFIG_PHYSICAL_ALIGN=0x1000000 -CONFIG_HOTPLUG_CPU=y -# CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set -# CONFIG_DEBUG_HOTPLUG_CPU0 is not set -CONFIG_COMPAT_VDSO=y -# CONFIG_CMDLINE_BOOL is not set -CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y -CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y -CONFIG_USE_PERCPU_NUMA_NODE_ID=y - -# -# Power management and ACPI options -# -CONFIG_ARCH_HIBERNATION_HEADER=y -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_HIBERNATE_CALLBACKS=y -CONFIG_HIBERNATION=y -CONFIG_PM_STD_PARTITION="" -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y -# CONFIG_PM_AUTOSLEEP is not set -# CONFIG_PM_WAKELOCKS is not set -CONFIG_PM_RUNTIME=y -CONFIG_PM=y -CONFIG_PM_DEBUG=y -CONFIG_PM_ADVANCED_DEBUG=y -# CONFIG_PM_TEST_SUSPEND is not set -CONFIG_PM_SLEEP_DEBUG=y -CONFIG_PM_TRACE=y -CONFIG_PM_TRACE_RTC=y -# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set -CONFIG_ACPI=y -CONFIG_ACPI_SLEEP=y -# CONFIG_ACPI_PROCFS is not set -# CONFIG_ACPI_PROCFS_POWER is not set -# CONFIG_ACPI_EC_DEBUGFS is not set -CONFIG_ACPI_AC=y -CONFIG_ACPI_BATTERY=y -CONFIG_ACPI_BUTTON=y -CONFIG_ACPI_VIDEO=m -CONFIG_ACPI_FAN=y -# CONFIG_ACPI_DOCK is not set -CONFIG_ACPI_PROCESSOR=y -CONFIG_ACPI_HOTPLUG_CPU=y -# CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set -CONFIG_ACPI_THERMAL=y -CONFIG_ACPI_NUMA=y -# CONFIG_ACPI_CUSTOM_DSDT is not set -# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set -CONFIG_ACPI_BLACKLIST_YEAR=0 -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_PCI_SLOT is not set -CONFIG_X86_PM_TIMER=y -CONFIG_ACPI_CONTAINER=y -# CONFIG_ACPI_HOTPLUG_MEMORY is not set -CONFIG_ACPI_SBS=m -CONFIG_ACPI_HED=y -# CONFIG_ACPI_CUSTOM_METHOD is not set -CONFIG_ACPI_BGRT=y -CONFIG_ACPI_APEI=y -CONFIG_ACPI_APEI_GHES=y -CONFIG_ACPI_APEI_PCIEAER=y -CONFIG_ACPI_APEI_MEMORY_FAILURE=y -CONFIG_ACPI_APEI_EINJ=m -CONFIG_ACPI_APEI_ERST_DEBUG=m -CONFIG_SFI=y - -# -# CPU Frequency scaling -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y - -# -# x86 CPU frequency scaling drivers -# -# CONFIG_X86_INTEL_PSTATE is not set -CONFIG_X86_PCC_CPUFREQ=m -CONFIG_X86_ACPI_CPUFREQ=y -CONFIG_X86_ACPI_CPUFREQ_CPB=y -CONFIG_X86_POWERNOW_K8=y -# CONFIG_X86_AMD_FREQ_SENSITIVITY is not set -CONFIG_X86_SPEEDSTEP_CENTRINO=y -CONFIG_X86_P4_CLOCKMOD=m - -# -# shared options -# -CONFIG_X86_SPEEDSTEP_LIB=m - -# -# CPU Idle -# -CONFIG_CPU_IDLE=y -# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y -# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set -CONFIG_INTEL_IDLE=y - -# -# Memory power savings -# -# CONFIG_I7300_IDLE is not set - -# -# Bus options (PCI etc.) -# -CONFIG_PCI=y -CONFIG_PCI_DIRECT=y -CONFIG_PCI_MMCONFIG=y -CONFIG_PCI_DOMAINS=y -# CONFIG_PCI_CNB20LE_QUIRK is not set -CONFIG_PCIEPORTBUS=y -# CONFIG_HOTPLUG_PCI_PCIE is not set -CONFIG_PCIEAER=y -# CONFIG_PCIE_ECRC is not set -# CONFIG_PCIEAER_INJECT is not set -CONFIG_PCIEASPM=y -# CONFIG_PCIEASPM_DEBUG is not set -CONFIG_PCIEASPM_DEFAULT=y -# CONFIG_PCIEASPM_POWERSAVE is not set -# CONFIG_PCIEASPM_PERFORMANCE is not set -CONFIG_PCIE_PME=y -CONFIG_PCI_MSI=y -# CONFIG_PCI_DEBUG is not set -CONFIG_PCI_REALLOC_ENABLE_AUTO=y -CONFIG_PCI_STUB=m -CONFIG_HT_IRQ=y -CONFIG_PCI_ATS=y -CONFIG_PCI_IOV=y -CONFIG_PCI_PRI=y -CONFIG_PCI_PASID=y -# CONFIG_PCI_IOAPIC is not set -CONFIG_PCI_LABEL=y - -# -# PCI host controller drivers -# -CONFIG_ISA_DMA_API=y -CONFIG_AMD_NB=y -# CONFIG_PCCARD is not set -CONFIG_HOTPLUG_PCI=y -# CONFIG_HOTPLUG_PCI_ACPI is not set -CONFIG_HOTPLUG_PCI_CPCI=y -# CONFIG_HOTPLUG_PCI_CPCI_ZT5550 is not set -CONFIG_HOTPLUG_PCI_CPCI_GENERIC=m -CONFIG_HOTPLUG_PCI_SHPC=m -# CONFIG_RAPIDIO is not set -CONFIG_X86_SYSFB=y - -# -# Executable file formats / Emulations -# -CONFIG_BINFMT_ELF=y -CONFIG_COMPAT_BINFMT_ELF=y -CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y -CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y -CONFIG_BINFMT_SCRIPT=y -# CONFIG_HAVE_AOUT is not set -CONFIG_BINFMT_MISC=m -CONFIG_COREDUMP=y -CONFIG_IA32_EMULATION=y -# CONFIG_IA32_AOUT is not set -# CONFIG_X86_X32 is not set -CONFIG_COMPAT=y -CONFIG_COMPAT_FOR_U64_ALIGNMENT=y -CONFIG_SYSVIPC_COMPAT=y -CONFIG_KEYS_COMPAT=y -CONFIG_X86_DEV_DMA_OPS=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_DIAG is not set -CONFIG_UNIX=y -# CONFIG_UNIX_DIAG is not set -CONFIG_XFRM=y -CONFIG_XFRM_ALGO=y -CONFIG_XFRM_USER=m -CONFIG_XFRM_SUB_POLICY=y -CONFIG_XFRM_MIGRATE=y -# CONFIG_XFRM_STATISTICS is not set -CONFIG_XFRM_IPCOMP=m -CONFIG_NET_KEY=m -CONFIG_NET_KEY_MIGRATE=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_ADVANCED_ROUTER=y -# CONFIG_IP_FIB_TRIE_STATS is not set -CONFIG_IP_MULTIPLE_TABLES=y -CONFIG_IP_ROUTE_MULTIPATH=y -CONFIG_IP_ROUTE_VERBOSE=y -CONFIG_IP_ROUTE_CLASSID=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -CONFIG_NET_IPIP=m -# CONFIG_NET_IPGRE_DEMUX is not set -CONFIG_NET_IP_TUNNEL=y -CONFIG_IP_MROUTE=y -# CONFIG_IP_MROUTE_MULTIPLE_TABLES is not set -CONFIG_IP_PIMSM_V1=y -CONFIG_IP_PIMSM_V2=y -CONFIG_SYN_COOKIES=y -# CONFIG_NET_IPVTI is not set -CONFIG_INET_AH=m -CONFIG_INET_ESP=m -CONFIG_INET_IPCOMP=m -CONFIG_INET_XFRM_TUNNEL=m -CONFIG_INET_TUNNEL=y -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -CONFIG_INET_LRO=y -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_INET_UDP_DIAG is not set -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -CONFIG_IPV6=y -# CONFIG_IPV6_PRIVACY is not set -CONFIG_IPV6_ROUTER_PREF=y -# CONFIG_IPV6_ROUTE_INFO is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -CONFIG_INET6_AH=y -CONFIG_INET6_ESP=y -CONFIG_INET6_IPCOMP=m -# CONFIG_IPV6_MIP6 is not set -CONFIG_INET6_XFRM_TUNNEL=m -CONFIG_INET6_TUNNEL=m -CONFIG_INET6_XFRM_MODE_TRANSPORT=y -CONFIG_INET6_XFRM_MODE_TUNNEL=y -CONFIG_INET6_XFRM_MODE_BEET=y -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set -CONFIG_IPV6_SIT=y -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -CONFIG_IPV6_TUNNEL=m -# CONFIG_IPV6_GRE is not set -# CONFIG_IPV6_MULTIPLE_TABLES is not set -# CONFIG_IPV6_MROUTE is not set -# CONFIG_NETLABEL is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETWORK_PHY_TIMESTAMPING is not set -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set -CONFIG_NETFILTER_ADVANCED=y -CONFIG_BRIDGE_NETFILTER=y - -# -# Core Netfilter Configuration -# -CONFIG_NETFILTER_NETLINK=m -# CONFIG_NETFILTER_NETLINK_ACCT is not set -CONFIG_NETFILTER_NETLINK_QUEUE=m -CONFIG_NETFILTER_NETLINK_LOG=m -CONFIG_NF_CONNTRACK=m -CONFIG_NF_CONNTRACK_MARK=y -# CONFIG_NF_CONNTRACK_ZONES is not set -CONFIG_NF_CONNTRACK_PROCFS=y -# CONFIG_NF_CONNTRACK_EVENTS is not set -# CONFIG_NF_CONNTRACK_TIMEOUT is not set -# CONFIG_NF_CONNTRACK_TIMESTAMP is not set -# CONFIG_NF_CT_PROTO_DCCP is not set -CONFIG_NF_CT_PROTO_GRE=m -CONFIG_NF_CT_PROTO_SCTP=m -CONFIG_NF_CT_PROTO_UDPLITE=m -CONFIG_NF_CONNTRACK_AMANDA=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_H323=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK_BROADCAST=m -CONFIG_NF_CONNTRACK_NETBIOS_NS=m -# CONFIG_NF_CONNTRACK_SNMP is not set -CONFIG_NF_CONNTRACK_PPTP=m -CONFIG_NF_CONNTRACK_SANE=m -CONFIG_NF_CONNTRACK_SIP=m -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_CT_NETLINK=m -# CONFIG_NF_CT_NETLINK_TIMEOUT is not set -# CONFIG_NETFILTER_NETLINK_QUEUE_CT is not set -CONFIG_NF_NAT=m -CONFIG_NF_NAT_NEEDED=y -CONFIG_NF_NAT_PROTO_UDPLITE=m -CONFIG_NF_NAT_PROTO_SCTP=m -CONFIG_NF_NAT_AMANDA=m -CONFIG_NF_NAT_FTP=m -CONFIG_NF_NAT_IRC=m -CONFIG_NF_NAT_SIP=m -CONFIG_NF_NAT_TFTP=m -CONFIG_NETFILTER_XTABLES=m - -# -# Xtables combined modules -# -CONFIG_NETFILTER_XT_MARK=m -CONFIG_NETFILTER_XT_CONNMARK=m - -# -# Xtables targets -# -# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -CONFIG_NETFILTER_XT_TARGET_CT=m -CONFIG_NETFILTER_XT_TARGET_DSCP=m -CONFIG_NETFILTER_XT_TARGET_HL=m -# CONFIG_NETFILTER_XT_TARGET_HMARK is not set -# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set -# CONFIG_NETFILTER_XT_TARGET_LED is not set -# CONFIG_NETFILTER_XT_TARGET_LOG is not set -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_TARGET_NETMAP=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -CONFIG_NETFILTER_XT_TARGET_NOTRACK=m -# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set -CONFIG_NETFILTER_XT_TARGET_REDIRECT=m -# CONFIG_NETFILTER_XT_TARGET_TEE is not set -# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set -CONFIG_NETFILTER_XT_TARGET_TRACE=m -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set - -# -# Xtables matches -# -# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set -# CONFIG_NETFILTER_XT_MATCH_BPF is not set -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -# CONFIG_NETFILTER_XT_MATCH_CPU is not set -CONFIG_NETFILTER_XT_MATCH_DCCP=m -# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set -CONFIG_NETFILTER_XT_MATCH_DSCP=m -CONFIG_NETFILTER_XT_MATCH_ECN=m -CONFIG_NETFILTER_XT_MATCH_ESP=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_HL=m -# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set -# CONFIG_NETFILTER_XT_MATCH_OSF is not set -# CONFIG_NETFILTER_XT_MATCH_OWNER is not set -CONFIG_NETFILTER_XT_MATCH_POLICY=m -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set -CONFIG_NETFILTER_XT_MATCH_REALM=m -# CONFIG_NETFILTER_XT_MATCH_RECENT is not set -CONFIG_NETFILTER_XT_MATCH_SCTP=m -# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -CONFIG_NETFILTER_XT_MATCH_STRING=m -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -# CONFIG_NETFILTER_XT_MATCH_TIME is not set -CONFIG_NETFILTER_XT_MATCH_U32=m -# CONFIG_IP_SET is not set -# CONFIG_IP_VS is not set - -# -# IP: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV4=m -CONFIG_NF_CONNTRACK_IPV4=m -CONFIG_NF_CONNTRACK_PROC_COMPAT=y -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_AH=m -CONFIG_IP_NF_MATCH_ECN=m -# CONFIG_IP_NF_MATCH_RPFILTER is not set -CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_REJECT=m -# CONFIG_IP_NF_TARGET_SYNPROXY is not set -CONFIG_IP_NF_TARGET_ULOG=m -CONFIG_NF_NAT_IPV4=m -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_NF_NAT_PROTO_GRE=m -CONFIG_NF_NAT_PPTP=m -CONFIG_NF_NAT_H323=m -CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_TARGET_CLUSTERIP=m -CONFIG_IP_NF_TARGET_ECN=m -CONFIG_IP_NF_TARGET_TTL=m -CONFIG_IP_NF_RAW=m -# CONFIG_IP_NF_SECURITY is not set -CONFIG_IP_NF_ARPTABLES=m -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m - -# -# IPv6: Netfilter Configuration -# -# CONFIG_NF_DEFRAG_IPV6 is not set -# CONFIG_NF_CONNTRACK_IPV6 is not set -CONFIG_IP6_NF_IPTABLES=m -# CONFIG_IP6_NF_MATCH_AH is not set -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_MATCH_FRAG=m -CONFIG_IP6_NF_MATCH_OPTS=m -CONFIG_IP6_NF_MATCH_HL=m -CONFIG_IP6_NF_MATCH_IPV6HEADER=m -# CONFIG_IP6_NF_MATCH_MH is not set -# CONFIG_IP6_NF_MATCH_RPFILTER is not set -CONFIG_IP6_NF_MATCH_RT=m -# CONFIG_IP6_NF_TARGET_HL is not set -CONFIG_IP6_NF_FILTER=m -# CONFIG_IP6_NF_TARGET_REJECT is not set -# CONFIG_IP6_NF_TARGET_SYNPROXY is not set -CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_RAW=m -# CONFIG_IP6_NF_SECURITY is not set -# CONFIG_BRIDGE_NF_EBTABLES is not set -# CONFIG_IP_DCCP is not set -CONFIG_IP_SCTP=m -# CONFIG_NET_SCTPPROBE is not set -# CONFIG_SCTP_DBG_OBJCNT is not set -CONFIG_SCTP_DEFAULT_COOKIE_HMAC_MD5=y -# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_SHA1 is not set -# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_NONE is not set -CONFIG_SCTP_COOKIE_HMAC_MD5=y -# CONFIG_SCTP_COOKIE_HMAC_SHA1 is not set -# CONFIG_RDS is not set -CONFIG_TIPC=m -CONFIG_TIPC_PORTS=8191 -# CONFIG_ATM is not set -# CONFIG_L2TP is not set -CONFIG_STP=m -CONFIG_BRIDGE=m -CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_BRIDGE_VLAN_FILTERING is not set -CONFIG_HAVE_NET_DSA=y -CONFIG_VLAN_8021Q=m -# CONFIG_VLAN_8021Q_GVRP is not set -# CONFIG_VLAN_8021Q_MVRP is not set -# CONFIG_DECNET is not set -CONFIG_LLC=m -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -CONFIG_NET_SCHED=y - -# -# Queueing/Scheduling -# -CONFIG_NET_SCH_CBQ=m -CONFIG_NET_SCH_HTB=m -CONFIG_NET_SCH_HFSC=m -CONFIG_NET_SCH_PRIO=m -# CONFIG_NET_SCH_MULTIQ is not set -CONFIG_NET_SCH_RED=m -# CONFIG_NET_SCH_SFB is not set -CONFIG_NET_SCH_SFQ=m -CONFIG_NET_SCH_TEQL=m -CONFIG_NET_SCH_TBF=m -CONFIG_NET_SCH_GRED=m -CONFIG_NET_SCH_DSMARK=m -CONFIG_NET_SCH_NETEM=m -# CONFIG_NET_SCH_DRR is not set -# CONFIG_NET_SCH_MQPRIO is not set -# CONFIG_NET_SCH_CHOKE is not set -# CONFIG_NET_SCH_QFQ is not set -CONFIG_NET_SCH_CODEL=m -# CONFIG_NET_SCH_FQ_CODEL is not set -CONFIG_NET_SCH_FQ=m -CONFIG_NET_SCH_INGRESS=m -# CONFIG_NET_SCH_PLUG is not set - -# -# Classification -# -CONFIG_NET_CLS=y -CONFIG_NET_CLS_BASIC=y -# CONFIG_NET_CLS_TCINDEX is not set -# CONFIG_NET_CLS_ROUTE4 is not set -# CONFIG_NET_CLS_FW is not set -CONFIG_NET_CLS_U32=y -# CONFIG_CLS_U32_PERF is not set -# CONFIG_CLS_U32_MARK is not set -# CONFIG_NET_CLS_RSVP is not set -# CONFIG_NET_CLS_RSVP6 is not set -# CONFIG_NET_CLS_FLOW is not set -CONFIG_NET_CLS_CGROUP=y -# CONFIG_NET_EMATCH is not set -CONFIG_NET_CLS_ACT=y -# CONFIG_NET_ACT_POLICE is not set -# CONFIG_NET_ACT_GACT is not set -CONFIG_NET_ACT_MIRRED=m -# CONFIG_NET_ACT_IPT is not set -# CONFIG_NET_ACT_NAT is not set -# CONFIG_NET_ACT_PEDIT is not set -# CONFIG_NET_ACT_SIMP is not set -# CONFIG_NET_ACT_SKBEDIT is not set -# CONFIG_NET_ACT_CSUM is not set -# CONFIG_NET_CLS_IND is not set -CONFIG_NET_SCH_FIFO=y -# CONFIG_DCB is not set -CONFIG_DNS_RESOLVER=y -# CONFIG_BATMAN_ADV is not set -# CONFIG_OPENVSWITCH is not set -# CONFIG_VSOCKETS is not set -# CONFIG_NETLINK_MMAP is not set -# CONFIG_NETLINK_DIAG is not set -# CONFIG_NET_MPLS_GSO is not set -CONFIG_RPS=y -CONFIG_RFS_ACCEL=y -CONFIG_XPS=y -# CONFIG_NETPRIO_CGROUP is not set -CONFIG_NET_RX_BUSY_POLL=y -CONFIG_BQL=y -# CONFIG_BPF_JIT is not set -CONFIG_NET_FLOW_LIMIT=y - -# -# Network testing -# -CONFIG_NET_PKTGEN=m -# CONFIG_NET_TCPPROBE is not set -# CONFIG_NET_DROP_MONITOR is not set -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set -CONFIG_FIB_RULES=y -CONFIG_WIRELESS=y -CONFIG_CFG80211=m -# CONFIG_NL80211_TESTMODE is not set -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -# CONFIG_CFG80211_REG_DEBUG is not set -# CONFIG_CFG80211_CERTIFICATION_ONUS is not set -CONFIG_CFG80211_DEFAULT_PS=y -# CONFIG_CFG80211_DEBUGFS is not set -# CONFIG_CFG80211_INTERNAL_REGDB is not set -# CONFIG_CFG80211_WEXT is not set -# CONFIG_LIB80211 is not set -CONFIG_MAC80211=m -CONFIG_MAC80211_HAS_RC=y -# CONFIG_MAC80211_RC_PID is not set -CONFIG_MAC80211_RC_MINSTREL=y -CONFIG_MAC80211_RC_MINSTREL_HT=y -CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y -CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" -# CONFIG_MAC80211_MESH is not set -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_MESSAGE_TRACING is not set -# CONFIG_MAC80211_DEBUG_MENU is not set -# CONFIG_WIMAX is not set -CONFIG_RFKILL=y -CONFIG_RFKILL_LEDS=y -# CONFIG_RFKILL_INPUT is not set -# CONFIG_NET_9P is not set -# CONFIG_CAIF is not set -# CONFIG_CEPH_LIB is not set -# CONFIG_NFC is not set -CONFIG_HAVE_BPF_JIT=y - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="" -CONFIG_FW_LOADER_USER_HELPER=y -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_GENERIC_CPU_DEVICES is not set -CONFIG_DMA_SHARED_BUFFER=y - -# -# Bus devices -# -CONFIG_CONNECTOR=y -CONFIG_PROC_EVENTS=y -# CONFIG_MTD is not set -CONFIG_PARPORT=m -CONFIG_PARPORT_PC=m -# CONFIG_PARPORT_SERIAL is not set -# CONFIG_PARPORT_PC_FIFO is not set -# CONFIG_PARPORT_PC_SUPERIO is not set -# CONFIG_PARPORT_GSC is not set -# CONFIG_PARPORT_AX88796 is not set -# CONFIG_PARPORT_1284 is not set -CONFIG_PNP=y -CONFIG_PNP_DEBUG_MESSAGES=y - -# -# Protocols -# -CONFIG_PNPACPI=y -CONFIG_BLK_DEV=y -CONFIG_BLK_DEV_FD=m -# CONFIG_PARIDE is not set -# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 -CONFIG_BLK_DEV_CRYPTOLOOP=m -# CONFIG_BLK_DEV_DRBD is not set -CONFIG_BLK_DEV_NBD=m -# CONFIG_BLK_DEV_NVME is not set -# CONFIG_BLK_DEV_SX8 is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=4096 -# CONFIG_BLK_DEV_XIP is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -CONFIG_VIRTIO_BLK=y -# CONFIG_BLK_DEV_HD is not set -# CONFIG_BLK_DEV_RBD is not set -# CONFIG_BLK_DEV_RSXX is not set - -# -# Misc devices -# -# CONFIG_SENSORS_LIS3LV02D is not set -# CONFIG_AD525X_DPOT is not set -# CONFIG_DUMMY_IRQ is not set -# CONFIG_IBM_ASM is not set -# CONFIG_PHANTOM is not set -# CONFIG_SGI_IOC4 is not set -# CONFIG_TIFM_CORE is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ATMEL_SSC is not set -CONFIG_ENCLOSURE_SERVICES=m -# CONFIG_HP_ILO is not set -# CONFIG_APDS9802ALS is not set -# CONFIG_ISL29003 is not set -# CONFIG_ISL29020 is not set -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_SENSORS_BH1780 is not set -# CONFIG_SENSORS_BH1770 is not set -# CONFIG_SENSORS_APDS990X is not set -# CONFIG_HMC6352 is not set -# CONFIG_DS1682 is not set -# CONFIG_TI_DAC7512 is not set -# CONFIG_BMP085_I2C is not set -# CONFIG_BMP085_SPI is not set -# CONFIG_PCH_PHUB is not set -# CONFIG_USB_SWITCH_FSA9480 is not set -# CONFIG_LATTICE_ECP3_CONFIG is not set -# CONFIG_SRAM is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -# CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_AT25 is not set -CONFIG_EEPROM_LEGACY=m -# CONFIG_EEPROM_MAX6875 is not set -CONFIG_EEPROM_93CX6=m -# CONFIG_EEPROM_93XX46 is not set -# CONFIG_CB710_CORE is not set - -# -# Texas Instruments shared transport line discipline -# -# CONFIG_TI_ST is not set -# CONFIG_SENSORS_LIS3_I2C is not set - -# -# Altera FPGA firmware download module -# -# CONFIG_ALTERA_STAPL is not set -# CONFIG_INTEL_MEI is not set -# CONFIG_INTEL_MEI_ME is not set -# CONFIG_VMWARE_VMCI is not set -CONFIG_HAVE_IDE=y -CONFIG_IDE=y - -# -# Please see Documentation/ide/ide.txt for help/info on IDE drives -# -CONFIG_IDE_XFER_MODE=y -CONFIG_IDE_ATAPI=y -# CONFIG_BLK_DEV_IDE_SATA is not set -CONFIG_IDE_GD=y -CONFIG_IDE_GD_ATA=y -# CONFIG_IDE_GD_ATAPI is not set -CONFIG_BLK_DEV_IDECD=y -CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEACPI is not set -# CONFIG_IDE_TASK_IOCTL is not set -CONFIG_IDE_PROC_FS=y - -# -# IDE chipset support/bugfixes -# -# CONFIG_IDE_GENERIC is not set -# CONFIG_BLK_DEV_PLATFORM is not set -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_IDEPNP is not set -CONFIG_BLK_DEV_IDEDMA_SFF=y - -# -# PCI IDE chipsets support -# -CONFIG_BLK_DEV_IDEPCI=y -CONFIG_IDEPCI_PCIBUS_ORDER=y -# CONFIG_BLK_DEV_GENERIC is not set -# CONFIG_BLK_DEV_OPTI621 is not set -# CONFIG_BLK_DEV_RZ1000 is not set -CONFIG_BLK_DEV_IDEDMA_PCI=y -# CONFIG_BLK_DEV_AEC62XX is not set -# CONFIG_BLK_DEV_ALI15X3 is not set -# CONFIG_BLK_DEV_AMD74XX is not set -# CONFIG_BLK_DEV_ATIIXP is not set -# CONFIG_BLK_DEV_CMD64X is not set -# CONFIG_BLK_DEV_TRIFLEX is not set -# CONFIG_BLK_DEV_CS5520 is not set -# CONFIG_BLK_DEV_CS5530 is not set -# CONFIG_BLK_DEV_HPT366 is not set -# CONFIG_BLK_DEV_JMICRON is not set -# CONFIG_BLK_DEV_SC1200 is not set -CONFIG_BLK_DEV_PIIX=y -# CONFIG_BLK_DEV_IT8172 is not set -# CONFIG_BLK_DEV_IT8213 is not set -# CONFIG_BLK_DEV_IT821X is not set -# CONFIG_BLK_DEV_NS87415 is not set -# CONFIG_BLK_DEV_PDC202XX_OLD is not set -# CONFIG_BLK_DEV_PDC202XX_NEW is not set -# CONFIG_BLK_DEV_SVWKS is not set -# CONFIG_BLK_DEV_SIIMAGE is not set -# CONFIG_BLK_DEV_SIS5513 is not set -# CONFIG_BLK_DEV_SLC90E66 is not set -# CONFIG_BLK_DEV_TRM290 is not set -# CONFIG_BLK_DEV_VIA82CXXX is not set -# CONFIG_BLK_DEV_TC86C001 is not set -CONFIG_BLK_DEV_IDEDMA=y - -# -# SCSI device support -# -CONFIG_SCSI_MOD=y -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=y -# CONFIG_BLK_DEV_SR_VENDOR is not set -CONFIG_CHR_DEV_SG=y -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_SCSI_ENCLOSURE is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_ISCSI_BOOT_SYSFS is not set -# CONFIG_SCSI_CXGB3_ISCSI is not set -# CONFIG_SCSI_CXGB4_ISCSI is not set -# CONFIG_SCSI_BNX2_ISCSI is not set -# CONFIG_SCSI_BNX2X_FCOE is not set -# CONFIG_BE2ISCSI is not set -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_HPSA is not set -# CONFIG_SCSI_3W_9XXX is not set -# CONFIG_SCSI_3W_SAS is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AACRAID is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_AIC79XX is not set -# CONFIG_SCSI_AIC94XX is not set -# CONFIG_SCSI_MVSAS is not set -# CONFIG_SCSI_MVUMI is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_SCSI_ADVANSYS is not set -# CONFIG_SCSI_ARCMSR is not set -# CONFIG_SCSI_ESAS2R is not set -# CONFIG_MEGARAID_NEWGEN is not set -# CONFIG_MEGARAID_LEGACY is not set -# CONFIG_MEGARAID_SAS is not set -# CONFIG_SCSI_MPT2SAS is not set -# CONFIG_SCSI_MPT3SAS is not set -# CONFIG_SCSI_UFSHCD is not set -# CONFIG_SCSI_HPTIOP is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_VMWARE_PVSCSI is not set -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_FCOE is not set -# CONFIG_FCOE_FNIC is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_ISCI is not set -# CONFIG_SCSI_IPS is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_PPA is not set -# CONFIG_SCSI_IMM is not set -# CONFIG_SCSI_STEX is not set -# CONFIG_SCSI_SYM53C8XX_2 is not set -# CONFIG_SCSI_IPR is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -# CONFIG_SCSI_QLA_FC is not set -# CONFIG_SCSI_QLA_ISCSI is not set -# CONFIG_SCSI_LPFC is not set -# CONFIG_SCSI_DC395x is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_PMCRAID is not set -# CONFIG_SCSI_PM8001 is not set -# CONFIG_SCSI_SRP is not set -# CONFIG_SCSI_BFA_FC is not set -# CONFIG_SCSI_VIRTIO is not set -# CONFIG_SCSI_CHELSIO_FCOE is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -CONFIG_ATA=y -# CONFIG_ATA_NONSTANDARD is not set -CONFIG_ATA_VERBOSE_ERROR=y -CONFIG_ATA_ACPI=y -# CONFIG_SATA_ZPODD is not set -CONFIG_SATA_PMP=y - -# -# Controllers with non-SFF native interface -# -CONFIG_SATA_AHCI=y -CONFIG_SATA_AHCI_PLATFORM=m -# CONFIG_SATA_INIC162X is not set -# CONFIG_SATA_ACARD_AHCI is not set -# CONFIG_SATA_SIL24 is not set -CONFIG_ATA_SFF=y - -# -# SFF controllers with custom DMA interface -# -# CONFIG_PDC_ADMA is not set -# CONFIG_SATA_QSTOR is not set -# CONFIG_SATA_SX4 is not set -CONFIG_ATA_BMDMA=y - -# -# SATA SFF controllers with BMDMA -# -CONFIG_ATA_PIIX=y -# CONFIG_SATA_HIGHBANK is not set -# CONFIG_SATA_MV is not set -# CONFIG_SATA_NV is not set -# CONFIG_SATA_PROMISE is not set -# CONFIG_SATA_RCAR is not set -# CONFIG_SATA_SIL is not set -# CONFIG_SATA_SIS is not set -# CONFIG_SATA_SVW is not set -# CONFIG_SATA_ULI is not set -# CONFIG_SATA_VIA is not set -# CONFIG_SATA_VITESSE is not set - -# -# PATA SFF controllers with BMDMA -# -# CONFIG_PATA_ALI is not set -# CONFIG_PATA_AMD is not set -# CONFIG_PATA_ARTOP is not set -# CONFIG_PATA_ATIIXP is not set -# CONFIG_PATA_ATP867X is not set -# CONFIG_PATA_CMD64X is not set -# CONFIG_PATA_CS5520 is not set -# CONFIG_PATA_CS5530 is not set -# CONFIG_PATA_CS5536 is not set -# CONFIG_PATA_CYPRESS is not set -# CONFIG_PATA_EFAR is not set -# CONFIG_PATA_HPT366 is not set -# CONFIG_PATA_HPT37X is not set -# CONFIG_PATA_HPT3X2N is not set -# CONFIG_PATA_HPT3X3 is not set -# CONFIG_PATA_IT8213 is not set -# CONFIG_PATA_IT821X is not set -# CONFIG_PATA_JMICRON is not set -# CONFIG_PATA_MARVELL is not set -# CONFIG_PATA_NETCELL is not set -# CONFIG_PATA_NINJA32 is not set -# CONFIG_PATA_NS87415 is not set -# CONFIG_PATA_OLDPIIX is not set -# CONFIG_PATA_OPTIDMA is not set -# CONFIG_PATA_PDC2027X is not set -# CONFIG_PATA_PDC_OLD is not set -# CONFIG_PATA_RADISYS is not set -# CONFIG_PATA_RDC is not set -# CONFIG_PATA_SC1200 is not set -CONFIG_PATA_SCH=y -# CONFIG_PATA_SERVERWORKS is not set -# CONFIG_PATA_SIL680 is not set -# CONFIG_PATA_SIS is not set -# CONFIG_PATA_TOSHIBA is not set -# CONFIG_PATA_TRIFLEX is not set -# CONFIG_PATA_VIA is not set -# CONFIG_PATA_WINBOND is not set - -# -# PIO-only SFF controllers -# -# CONFIG_PATA_CMD640_PCI is not set -# CONFIG_PATA_MPIIX is not set -# CONFIG_PATA_NS87410 is not set -# CONFIG_PATA_OPTI is not set -# CONFIG_PATA_PLATFORM is not set -# CONFIG_PATA_RZ1000 is not set - -# -# Generic fallback / legacy drivers -# -# CONFIG_PATA_ACPI is not set -CONFIG_ATA_GENERIC=y -# CONFIG_PATA_LEGACY is not set -CONFIG_MD=y -CONFIG_BLK_DEV_MD=y -CONFIG_MD_AUTODETECT=y -CONFIG_MD_LINEAR=y -CONFIG_MD_RAID0=y -CONFIG_MD_RAID1=y -CONFIG_MD_RAID10=y -# CONFIG_MD_RAID456 is not set -CONFIG_MD_MULTIPATH=y -CONFIG_MD_FAULTY=y -# CONFIG_BCACHE is not set -CONFIG_BLK_DEV_DM=y -# CONFIG_DM_DEBUG is not set -CONFIG_DM_CRYPT=y -CONFIG_DM_SNAPSHOT=y -# CONFIG_DM_THIN_PROVISIONING is not set -# CONFIG_DM_CACHE is not set -CONFIG_DM_MIRROR=y -# CONFIG_DM_RAID is not set -# CONFIG_DM_LOG_USERSPACE is not set -CONFIG_DM_ZERO=y -# CONFIG_DM_MULTIPATH is not set -# CONFIG_DM_DELAY is not set -# CONFIG_DM_UEVENT is not set -# CONFIG_DM_FLAKEY is not set -# CONFIG_DM_VERITY is not set -# CONFIG_DM_SWITCH is not set -# CONFIG_TARGET_CORE is not set -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_FIREWIRE is not set -# CONFIG_FIREWIRE_NOSY is not set -CONFIG_I2O=m -CONFIG_I2O_LCT_NOTIFY_ON_CHANGES=y -CONFIG_I2O_EXT_ADAPTEC=y -CONFIG_I2O_EXT_ADAPTEC_DMA64=y -CONFIG_I2O_CONFIG=m -CONFIG_I2O_CONFIG_OLD_IOCTL=y -# CONFIG_I2O_BUS is not set -CONFIG_I2O_BLOCK=m -CONFIG_I2O_SCSI=m -CONFIG_I2O_PROC=m -# CONFIG_MACINTOSH_DRIVERS is not set -CONFIG_NETDEVICES=y -CONFIG_MII=y -CONFIG_NET_CORE=y -CONFIG_BONDING=m -CONFIG_DUMMY=m -# CONFIG_EQUALIZER is not set -# CONFIG_NET_FC is not set -# CONFIG_IFB is not set -# CONFIG_NET_TEAM is not set -# CONFIG_MACVLAN is not set -# CONFIG_VXLAN is not set -CONFIG_NETCONSOLE=y -CONFIG_NETPOLL=y -# CONFIG_NETPOLL_TRAP is not set -CONFIG_NET_POLL_CONTROLLER=y -CONFIG_TUN=m -# CONFIG_VETH is not set -CONFIG_VIRTIO_NET=y -# CONFIG_NLMON is not set -# CONFIG_ARCNET is not set - -# -# CAIF transport drivers -# -# CONFIG_VHOST_NET is not set - -# -# Distributed Switch Architecture drivers -# -# CONFIG_NET_DSA_MV88E6XXX is not set -# CONFIG_NET_DSA_MV88E6060 is not set -# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set -# CONFIG_NET_DSA_MV88E6131 is not set -# CONFIG_NET_DSA_MV88E6123_61_65 is not set -CONFIG_ETHERNET=y -CONFIG_NET_VENDOR_3COM=y -# CONFIG_VORTEX is not set -# CONFIG_TYPHOON is not set -CONFIG_NET_VENDOR_ADAPTEC=y -# CONFIG_ADAPTEC_STARFIRE is not set -CONFIG_NET_VENDOR_ALTEON=y -# CONFIG_ACENIC is not set -CONFIG_NET_VENDOR_AMD=y -# CONFIG_AMD8111_ETH is not set -CONFIG_PCNET32=y -CONFIG_NET_VENDOR_ARC=y -CONFIG_NET_VENDOR_ATHEROS=y -CONFIG_ATL2=m -# CONFIG_ATL1 is not set -CONFIG_ATL1E=m -# CONFIG_ATL1C is not set -# CONFIG_ALX is not set -CONFIG_NET_CADENCE=y -# CONFIG_ARM_AT91_ETHER is not set -# CONFIG_MACB is not set -CONFIG_NET_VENDOR_BROADCOM=y -# CONFIG_B44 is not set -# CONFIG_BNX2 is not set -# CONFIG_CNIC is not set -CONFIG_TIGON3=y -# CONFIG_BNX2X is not set -CONFIG_NET_VENDOR_BROCADE=y -# CONFIG_BNA is not set -# CONFIG_NET_CALXEDA_XGMAC is not set -CONFIG_NET_VENDOR_CHELSIO=y -# CONFIG_CHELSIO_T1 is not set -# CONFIG_CHELSIO_T3 is not set -# CONFIG_CHELSIO_T4 is not set -# CONFIG_CHELSIO_T4VF is not set -CONFIG_NET_VENDOR_CISCO=y -# CONFIG_ENIC is not set -# CONFIG_DNET is not set -CONFIG_NET_VENDOR_DEC=y -# CONFIG_NET_TULIP is not set -CONFIG_NET_VENDOR_DLINK=y -# CONFIG_DL2K is not set -# CONFIG_SUNDANCE is not set -CONFIG_NET_VENDOR_EMULEX=y -# CONFIG_BE2NET is not set -CONFIG_NET_VENDOR_EXAR=y -# CONFIG_S2IO is not set -# CONFIG_VXGE is not set -CONFIG_NET_VENDOR_HP=y -# CONFIG_HP100 is not set -CONFIG_NET_VENDOR_INTEL=y -CONFIG_E100=y -CONFIG_E1000=m -CONFIG_E1000E=m -# CONFIG_IGB is not set -# CONFIG_IGBVF is not set -# CONFIG_IXGB is not set -# CONFIG_IXGBE is not set -# CONFIG_IXGBEVF is not set -# CONFIG_I40E is not set -CONFIG_NET_VENDOR_I825XX=y -# CONFIG_IP1000 is not set -# CONFIG_JME is not set -CONFIG_NET_VENDOR_MARVELL=y -# CONFIG_MVMDIO is not set -# CONFIG_SKGE is not set -# CONFIG_SKY2 is not set -CONFIG_NET_VENDOR_MELLANOX=y -# CONFIG_MLX4_EN is not set -# CONFIG_MLX4_CORE is not set -# CONFIG_MLX5_CORE is not set -CONFIG_NET_VENDOR_MICREL=y -# CONFIG_KS8851 is not set -# CONFIG_KS8851_MLL is not set -# CONFIG_KSZ884X_PCI is not set -CONFIG_NET_VENDOR_MICROCHIP=y -# CONFIG_ENC28J60 is not set -CONFIG_NET_VENDOR_MYRI=y -# CONFIG_MYRI10GE is not set -# CONFIG_FEALNX is not set -CONFIG_NET_VENDOR_NATSEMI=y -# CONFIG_NATSEMI is not set -# CONFIG_NS83820 is not set -CONFIG_NET_VENDOR_8390=y -# CONFIG_NE2K_PCI is not set -CONFIG_NET_VENDOR_NVIDIA=y -# CONFIG_FORCEDETH is not set -CONFIG_NET_VENDOR_OKI=y -# CONFIG_PCH_GBE is not set -# CONFIG_ETHOC is not set -CONFIG_NET_PACKET_ENGINE=y -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -CONFIG_NET_VENDOR_QLOGIC=y -# CONFIG_QLA3XXX is not set -# CONFIG_QLCNIC is not set -# CONFIG_QLGE is not set -# CONFIG_NETXEN_NIC is not set -CONFIG_NET_VENDOR_REALTEK=y -# CONFIG_ATP is not set -CONFIG_8139CP=m -CONFIG_8139TOO=m -CONFIG_8139TOO_PIO=y -# CONFIG_8139TOO_TUNE_TWISTER is not set -# CONFIG_8139TOO_8129 is not set -# CONFIG_8139_OLD_RX_RESET is not set -CONFIG_R8169=y -# CONFIG_SH_ETH is not set -CONFIG_NET_VENDOR_RDC=y -# CONFIG_R6040 is not set -CONFIG_NET_VENDOR_SEEQ=y -CONFIG_NET_VENDOR_SILAN=y -# CONFIG_SC92031 is not set -CONFIG_NET_VENDOR_SIS=y -# CONFIG_SIS900 is not set -# CONFIG_SIS190 is not set -# CONFIG_SFC is not set -CONFIG_NET_VENDOR_SMSC=y -# CONFIG_EPIC100 is not set -# CONFIG_SMSC911X is not set -# CONFIG_SMSC9420 is not set -CONFIG_NET_VENDOR_STMICRO=y -# CONFIG_STMMAC_ETH is not set -CONFIG_NET_VENDOR_SUN=y -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_CASSINI is not set -# CONFIG_NIU is not set -CONFIG_NET_VENDOR_TEHUTI=y -# CONFIG_TEHUTI is not set -CONFIG_NET_VENDOR_TI=y -# CONFIG_TLAN is not set -CONFIG_NET_VENDOR_VIA=y -# CONFIG_VIA_RHINE is not set -# CONFIG_VIA_VELOCITY is not set -CONFIG_NET_VENDOR_WIZNET=y -# CONFIG_WIZNET_W5100 is not set -# CONFIG_WIZNET_W5300 is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_NET_SB1000 is not set -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_AT803X_PHY is not set -# CONFIG_AMD_PHY is not set -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_BROADCOM_PHY is not set -# CONFIG_BCM87XX_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -# CONFIG_LSI_ET1011C_PHY is not set -# CONFIG_MICREL_PHY is not set -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -# CONFIG_MICREL_KS8995MA is not set -# CONFIG_PLIP is not set -CONFIG_PPP=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_FILTER=y -# CONFIG_PPP_MPPE is not set -CONFIG_PPP_MULTILINK=y -CONFIG_PPPOE=m -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_SLIP=m -CONFIG_SLHC=m -CONFIG_SLIP_COMPRESSED=y -CONFIG_SLIP_SMART=y -CONFIG_SLIP_MODE_SLIP6=y - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_RTL8152 is not set -# CONFIG_USB_USBNET is not set -# CONFIG_USB_HSO is not set -# CONFIG_USB_IPHETH is not set -CONFIG_WLAN=y -# CONFIG_LIBERTAS_THINFIRM is not set -# CONFIG_AIRO is not set -# CONFIG_ATMEL is not set -# CONFIG_AT76C50X_USB is not set -# CONFIG_PRISM54 is not set -# CONFIG_USB_ZD1201 is not set -# CONFIG_USB_NET_RNDIS_WLAN is not set -# CONFIG_RTL8180 is not set -# CONFIG_RTL8187 is not set -# CONFIG_ADM8211 is not set -# CONFIG_MAC80211_HWSIM is not set -# CONFIG_MWL8K is not set -CONFIG_ATH_COMMON=m -CONFIG_ATH_CARDS=m -# CONFIG_ATH_DEBUG is not set -CONFIG_ATH5K=m -# CONFIG_ATH5K_DEBUG is not set -# CONFIG_ATH5K_TRACER is not set -CONFIG_ATH5K_PCI=y -CONFIG_ATH9K_HW=m -CONFIG_ATH9K_COMMON=m -CONFIG_ATH9K_BTCOEX_SUPPORT=y -CONFIG_ATH9K=m -CONFIG_ATH9K_PCI=y -# CONFIG_ATH9K_AHB is not set -# CONFIG_ATH9K_DEBUGFS is not set -# CONFIG_ATH9K_LEGACY_RATE_CONTROL is not set -CONFIG_ATH9K_RFKILL=y -# CONFIG_ATH9K_HTC is not set -# CONFIG_CARL9170 is not set -# CONFIG_ATH6KL is not set -# CONFIG_AR5523 is not set -# CONFIG_WIL6210 is not set -# CONFIG_ATH10K is not set -# CONFIG_B43 is not set -# CONFIG_B43LEGACY is not set -CONFIG_BRCMUTIL=m -CONFIG_BRCMFMAC=m -CONFIG_BRCMFMAC_SDIO=y -CONFIG_BRCMFMAC_USB=y -# CONFIG_BRCM_TRACING is not set -# CONFIG_BRCMDBG is not set -# CONFIG_HOSTAP is not set -# CONFIG_IPW2100 is not set -# CONFIG_IWLWIFI is not set -# CONFIG_IWL4965 is not set -# CONFIG_IWL3945 is not set -# CONFIG_LIBERTAS is not set -# CONFIG_P54_COMMON is not set -CONFIG_RT2X00=m -# CONFIG_RT2400PCI is not set -# CONFIG_RT2500PCI is not set -# CONFIG_RT61PCI is not set -CONFIG_RT2800PCI=m -CONFIG_RT2800PCI_RT33XX=y -CONFIG_RT2800PCI_RT35XX=y -CONFIG_RT2800PCI_RT53XX=y -CONFIG_RT2800PCI_RT3290=y -# CONFIG_RT2500USB is not set -# CONFIG_RT73USB is not set -# CONFIG_RT2800USB is not set -CONFIG_RT2800_LIB=m -CONFIG_RT2X00_LIB_MMIO=m -CONFIG_RT2X00_LIB_PCI=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set -CONFIG_RTL_CARDS=m -# CONFIG_RTL8192CE is not set -# CONFIG_RTL8192SE is not set -# CONFIG_RTL8192DE is not set -# CONFIG_RTL8723AE is not set -# CONFIG_RTL8188EE is not set -# CONFIG_RTL8192CU is not set -# CONFIG_WL_TI is not set -# CONFIG_ZD1211RW is not set -# CONFIG_MWIFIEX is not set -# CONFIG_CW1200 is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# -# CONFIG_WAN is not set -# CONFIG_VMXNET3 is not set -# CONFIG_ISDN is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set -# CONFIG_INPUT_SPARSEKMAP is not set -# CONFIG_INPUT_MATRIXKMAP is not set - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ADP5589 is not set -CONFIG_KEYBOARD_ATKBD=y -# CONFIG_KEYBOARD_QT1070 is not set -# CONFIG_KEYBOARD_QT2160 is not set -# CONFIG_KEYBOARD_LKKBD is not set -# CONFIG_KEYBOARD_GPIO is not set -# CONFIG_KEYBOARD_GPIO_POLLED is not set -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_TCA8418 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_LM8333 is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set -# CONFIG_KEYBOARD_MPR121 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_XTKBD is not set -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_CYPRESS=y -CONFIG_MOUSE_PS2_LIFEBOOK=y -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -# CONFIG_MOUSE_PS2_SENTELIC is not set -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_CYAPA is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MOUSE_GPIO is not set -# CONFIG_MOUSE_SYNAPTICS_I2C is not set -# CONFIG_MOUSE_SYNAPTICS_USB is not set -# CONFIG_INPUT_JOYSTICK is not set -CONFIG_INPUT_TABLET=y -# CONFIG_TABLET_USB_ACECAD is not set -# CONFIG_TABLET_USB_AIPTEK is not set -# CONFIG_TABLET_USB_GTCO is not set -# CONFIG_TABLET_USB_HANWANG is not set -# CONFIG_TABLET_USB_KBTAB is not set -CONFIG_TABLET_USB_WACOM=y -CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_TOUCHSCREEN_ADS7846 is not set -# CONFIG_TOUCHSCREEN_AD7877 is not set -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set -# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set -# CONFIG_TOUCHSCREEN_BU21013 is not set -# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set -# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set -# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_ILI210X is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_WACOM_I2C is not set -# CONFIG_TOUCHSCREEN_MAX11801 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MMS114 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_PIXCIR is not set -CONFIG_TOUCHSCREEN_USB_COMPOSITE=m -CONFIG_TOUCHSCREEN_USB_EGALAX=y -CONFIG_TOUCHSCREEN_USB_PANJIT=y -CONFIG_TOUCHSCREEN_USB_3M=y -CONFIG_TOUCHSCREEN_USB_ITM=y -CONFIG_TOUCHSCREEN_USB_ETURBO=y -CONFIG_TOUCHSCREEN_USB_GUNZE=y -CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y -CONFIG_TOUCHSCREEN_USB_IRTOUCH=y -CONFIG_TOUCHSCREEN_USB_IDEALTEK=y -CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y -CONFIG_TOUCHSCREEN_USB_GOTOP=y -CONFIG_TOUCHSCREEN_USB_JASTEC=y -CONFIG_TOUCHSCREEN_USB_ELO=y -CONFIG_TOUCHSCREEN_USB_E2I=y -CONFIG_TOUCHSCREEN_USB_ZYTRONIC=y -CONFIG_TOUCHSCREEN_USB_ETT_TC45USB=y -CONFIG_TOUCHSCREEN_USB_NEXIO=y -CONFIG_TOUCHSCREEN_USB_EASYTOUCH=y -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC_SERIO is not set -# CONFIG_TOUCHSCREEN_TSC2005 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_ST1232 is not set -# CONFIG_TOUCHSCREEN_TPS6507X is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_I8042=y -CONFIG_SERIO_SERPORT=y -# CONFIG_SERIO_CT82C710 is not set -# CONFIG_SERIO_PARKBD is not set -# CONFIG_SERIO_PCIPS2 is not set -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_SERIO_PS2MULT is not set -# CONFIG_SERIO_ARC_PS2 is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_TTY=y -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_SERIAL_NONSTANDARD is not set -# CONFIG_NOZOMI is not set -# CONFIG_N_GSM is not set -# CONFIG_TRACE_SINK is not set -CONFIG_DEVKMEM=y - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y -CONFIG_SERIAL_8250_PNP=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_SERIAL_8250_PCI=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set -# CONFIG_SERIAL_8250_DW is not set - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_KGDB_NMI is not set -# CONFIG_SERIAL_MAX3100 is not set -# CONFIG_SERIAL_MAX310X is not set -# CONFIG_SERIAL_MFD_HSU is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_CONSOLE_POLL=y -# CONFIG_SERIAL_JSM is not set -# CONFIG_SERIAL_SCCNXP is not set -# CONFIG_SERIAL_TIMBERDALE is not set -# CONFIG_SERIAL_ALTERA_JTAGUART is not set -# CONFIG_SERIAL_ALTERA_UART is not set -# CONFIG_SERIAL_IFX6X60 is not set -# CONFIG_SERIAL_PCH_UART is not set -# CONFIG_SERIAL_ARC is not set -# CONFIG_SERIAL_RP2 is not set -# CONFIG_SERIAL_FSL_LPUART is not set -# CONFIG_SERIAL_ST_ASC is not set -# CONFIG_TTY_PRINTK is not set -CONFIG_PRINTER=m -# CONFIG_LP_CONSOLE is not set -# CONFIG_PPDEV is not set -CONFIG_HVC_DRIVER=y -CONFIG_VIRTIO_CONSOLE=y -CONFIG_IPMI_HANDLER=m -# CONFIG_IPMI_PANIC_EVENT is not set -# CONFIG_IPMI_DEVICE_INTERFACE is not set -# CONFIG_IPMI_SI is not set -# CONFIG_IPMI_WATCHDOG is not set -# CONFIG_IPMI_POWEROFF is not set -CONFIG_HW_RANDOM=m -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -CONFIG_HW_RANDOM_INTEL=m -CONFIG_HW_RANDOM_AMD=m -CONFIG_HW_RANDOM_VIA=m -# CONFIG_HW_RANDOM_VIRTIO is not set -CONFIG_HW_RANDOM_TPM=m -CONFIG_NVRAM=m -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set -# CONFIG_MWAVE is not set -# CONFIG_RAW_DRIVER is not set -CONFIG_HPET=y -CONFIG_HPET_MMAP=y -CONFIG_HANGCHECK_TIMER=m -CONFIG_TCG_TPM=y -# CONFIG_TCG_TIS is not set -# CONFIG_TCG_TIS_I2C_INFINEON is not set -# CONFIG_TCG_NSC is not set -# CONFIG_TCG_ATMEL is not set -# CONFIG_TCG_INFINEON is not set -# CONFIG_TCG_ST33_I2C is not set -# CONFIG_TELCLOCK is not set -CONFIG_DEVPORT=y -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_CHARDEV=m -# CONFIG_I2C_MUX is not set -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=m - -# -# I2C Hardware Bus support -# - -# -# PC SMBus host controller drivers -# -# CONFIG_I2C_ALI1535 is not set -# CONFIG_I2C_ALI1563 is not set -# CONFIG_I2C_ALI15X3 is not set -# CONFIG_I2C_AMD756 is not set -# CONFIG_I2C_AMD8111 is not set -CONFIG_I2C_I801=y -# CONFIG_I2C_ISCH is not set -# CONFIG_I2C_ISMT is not set -CONFIG_I2C_PIIX4=m -# CONFIG_I2C_NFORCE2 is not set -# CONFIG_I2C_SIS5595 is not set -# CONFIG_I2C_SIS630 is not set -# CONFIG_I2C_SIS96X is not set -# CONFIG_I2C_VIA is not set -# CONFIG_I2C_VIAPRO is not set - -# -# ACPI drivers -# -# CONFIG_I2C_SCMI is not set - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_CBUS_GPIO is not set -# CONFIG_I2C_DESIGNWARE_PCI is not set -# CONFIG_I2C_EG20T is not set -# CONFIG_I2C_GPIO is not set -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_PXA_PCI is not set -# CONFIG_I2C_SIMTEC is not set -# CONFIG_I2C_XILINX is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_DIOLAN_U2C is not set -# CONFIG_I2C_PARPORT is not set -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_STUB is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -# CONFIG_SPI_ALTERA is not set -# CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_BUTTERFLY is not set -# CONFIG_SPI_GPIO is not set -# CONFIG_SPI_LM70_LLP is not set -# CONFIG_SPI_FSL_DSPI is not set -# CONFIG_SPI_OC_TINY is not set -# CONFIG_SPI_PXA2XX is not set -# CONFIG_SPI_PXA2XX_PCI is not set -# CONFIG_SPI_SC18IS602 is not set -# CONFIG_SPI_TOPCLIFF_PCH is not set -# CONFIG_SPI_XCOMM is not set -# CONFIG_SPI_XILINX is not set -# CONFIG_SPI_DESIGNWARE is not set - -# -# SPI Protocol Masters -# -CONFIG_SPI_SPIDEV=m -# CONFIG_SPI_TLE62X0 is not set -# CONFIG_HSI is not set - -# -# PPS support -# -CONFIG_PPS=y -# CONFIG_PPS_DEBUG is not set - -# -# PPS clients support -# -# CONFIG_PPS_CLIENT_KTIMER is not set -# CONFIG_PPS_CLIENT_LDISC is not set -# CONFIG_PPS_CLIENT_PARPORT is not set -# CONFIG_PPS_CLIENT_GPIO is not set - -# -# PPS generators support -# - -# -# PTP clock support -# -CONFIG_PTP_1588_CLOCK=y - -# -# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. -# -# CONFIG_PTP_1588_CLOCK_PCH is not set -CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y -CONFIG_GPIO_DEVRES=y -CONFIG_GPIOLIB=y -CONFIG_GPIO_ACPI=y -# CONFIG_DEBUG_GPIO is not set -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_GENERIC=m - -# -# Memory mapped GPIO drivers: -# -CONFIG_GPIO_GENERIC_PLATFORM=m -# CONFIG_GPIO_IT8761E is not set -# CONFIG_GPIO_F7188X is not set -# CONFIG_GPIO_TS5500 is not set -# CONFIG_GPIO_SCH is not set -# CONFIG_GPIO_ICH is not set -# CONFIG_GPIO_VX855 is not set -# CONFIG_GPIO_LYNXPOINT is not set - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX7300 is not set -# CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_PCA953X is not set -# CONFIG_GPIO_PCF857X is not set -# CONFIG_GPIO_SX150X is not set -# CONFIG_GPIO_ADP5588 is not set - -# -# PCI GPIO expanders: -# -# CONFIG_GPIO_BT8XX is not set -# CONFIG_GPIO_AMD8111 is not set -# CONFIG_GPIO_LANGWELL is not set -# CONFIG_GPIO_PCH is not set -# CONFIG_GPIO_ML_IOH is not set -# CONFIG_GPIO_RDC321X is not set - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set -# CONFIG_GPIO_74X164 is not set - -# -# AC97 GPIO expanders: -# - -# -# LPC GPIO expanders: -# - -# -# MODULbus GPIO expanders: -# - -# -# USB GPIO expanders: -# -# CONFIG_W1 is not set -CONFIG_POWER_SUPPLY=y -# CONFIG_POWER_SUPPLY_DEBUG is not set -# CONFIG_PDA_POWER is not set -# CONFIG_TEST_POWER is not set -# CONFIG_BATTERY_DS2780 is not set -# CONFIG_BATTERY_DS2781 is not set -# CONFIG_BATTERY_DS2782 is not set -# CONFIG_BATTERY_SBS is not set -# CONFIG_BATTERY_BQ27x00 is not set -# CONFIG_BATTERY_MAX17040 is not set -# CONFIG_BATTERY_MAX17042 is not set -# CONFIG_CHARGER_MAX8903 is not set -# CONFIG_CHARGER_LP8727 is not set -# CONFIG_CHARGER_GPIO is not set -# CONFIG_CHARGER_BQ2415X is not set -# CONFIG_CHARGER_BQ24190 is not set -# CONFIG_CHARGER_SMB347 is not set -# CONFIG_POWER_RESET is not set -# CONFIG_POWER_AVS is not set -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Native drivers -# -# CONFIG_SENSORS_ABITUGURU is not set -# CONFIG_SENSORS_ABITUGURU3 is not set -# CONFIG_SENSORS_AD7314 is not set -# CONFIG_SENSORS_AD7414 is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADCXX is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ADT7310 is not set -# CONFIG_SENSORS_ADT7410 is not set -# CONFIG_SENSORS_ADT7411 is not set -# CONFIG_SENSORS_ADT7462 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ADT7475 is not set -# CONFIG_SENSORS_ASC7621 is not set -CONFIG_SENSORS_K8TEMP=m -CONFIG_SENSORS_K10TEMP=m -CONFIG_SENSORS_FAM15H_POWER=m -# CONFIG_SENSORS_ASB100 is not set -# CONFIG_SENSORS_ATXP1 is not set -# CONFIG_SENSORS_DS620 is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_I5K_AMB is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_FSCHMD is not set -# CONFIG_SENSORS_G760A is not set -# CONFIG_SENSORS_G762 is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -# CONFIG_SENSORS_GPIO_FAN is not set -# CONFIG_SENSORS_HIH6130 is not set -# CONFIG_SENSORS_HTU21 is not set -# CONFIG_SENSORS_CORETEMP is not set -# CONFIG_SENSORS_IBMAEM is not set -# CONFIG_SENSORS_IBMPEX is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_JC42 is not set -# CONFIG_SENSORS_LINEAGE is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM70 is not set -# CONFIG_SENSORS_LM73 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_LTC4151 is not set -# CONFIG_SENSORS_LTC4215 is not set -# CONFIG_SENSORS_LTC4245 is not set -# CONFIG_SENSORS_LTC4261 is not set -# CONFIG_SENSORS_LM95234 is not set -# CONFIG_SENSORS_LM95241 is not set -# CONFIG_SENSORS_LM95245 is not set -# CONFIG_SENSORS_MAX1111 is not set -# CONFIG_SENSORS_MAX16065 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX1668 is not set -# CONFIG_SENSORS_MAX197 is not set -# CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6642 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_MAX6697 is not set -# CONFIG_SENSORS_MCP3021 is not set -# CONFIG_SENSORS_NCT6775 is not set -# CONFIG_SENSORS_NTC_THERMISTOR is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_PMBUS is not set -# CONFIG_SENSORS_SHT15 is not set -# CONFIG_SENSORS_SHT21 is not set -# CONFIG_SENSORS_SIS5595 is not set -# CONFIG_SENSORS_SMM665 is not set -# CONFIG_SENSORS_DME1737 is not set -# CONFIG_SENSORS_EMC1403 is not set -# CONFIG_SENSORS_EMC2103 is not set -# CONFIG_SENSORS_EMC6W201 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_SCH56XX_COMMON is not set -# CONFIG_SENSORS_SCH5627 is not set -# CONFIG_SENSORS_SCH5636 is not set -# CONFIG_SENSORS_ADS1015 is not set -# CONFIG_SENSORS_ADS7828 is not set -# CONFIG_SENSORS_ADS7871 is not set -# CONFIG_SENSORS_AMC6821 is not set -# CONFIG_SENSORS_INA209 is not set -# CONFIG_SENSORS_INA2XX is not set -# CONFIG_SENSORS_THMC50 is not set -# CONFIG_SENSORS_TMP102 is not set -# CONFIG_SENSORS_TMP401 is not set -# CONFIG_SENSORS_TMP421 is not set -# CONFIG_SENSORS_VIA_CPUTEMP is not set -# CONFIG_SENSORS_VIA686A is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_VT8231 is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83795 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83L786NG is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -# CONFIG_SENSORS_APPLESMC is not set - -# -# ACPI drivers -# -CONFIG_SENSORS_ACPI_POWER=m -# CONFIG_SENSORS_ATK0110 is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set -# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set -# CONFIG_THERMAL_GOV_FAIR_SHARE is not set -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_GOV_USER_SPACE=y -# CONFIG_CPU_THERMAL is not set -# CONFIG_THERMAL_EMULATION is not set -# CONFIG_INTEL_POWERCLAMP is not set -CONFIG_X86_PKG_TEMP_THERMAL=m - -# -# Texas Instruments thermal drivers -# -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_CORE=y -# CONFIG_WATCHDOG_NOWAYOUT is not set - -# -# Watchdog Device Drivers -# -CONFIG_SOFT_WATCHDOG=m -# CONFIG_ACQUIRE_WDT is not set -# CONFIG_ADVANTECH_WDT is not set -# CONFIG_ALIM1535_WDT is not set -# CONFIG_ALIM7101_WDT is not set -# CONFIG_F71808E_WDT is not set -# CONFIG_SP5100_TCO is not set -# CONFIG_SC520_WDT is not set -# CONFIG_SBC_FITPC2_WATCHDOG is not set -# CONFIG_EUROTECH_WDT is not set -# CONFIG_IB700_WDT is not set -# CONFIG_IBMASR is not set -# CONFIG_WAFER_WDT is not set -# CONFIG_I6300ESB_WDT is not set -# CONFIG_IE6XX_WDT is not set -# CONFIG_ITCO_WDT is not set -# CONFIG_IT8712F_WDT is not set -# CONFIG_IT87_WDT is not set -# CONFIG_HP_WATCHDOG is not set -# CONFIG_SC1200_WDT is not set -# CONFIG_PC87413_WDT is not set -# CONFIG_NV_TCO is not set -# CONFIG_60XX_WDT is not set -# CONFIG_SBC8360_WDT is not set -# CONFIG_CPU5_WDT is not set -# CONFIG_SMSC_SCH311X_WDT is not set -# CONFIG_SMSC37B787_WDT is not set -# CONFIG_VIA_WDT is not set -# CONFIG_W83627HF_WDT is not set -# CONFIG_W83697HF_WDT is not set -# CONFIG_W83697UG_WDT is not set -# CONFIG_W83877F_WDT is not set -# CONFIG_W83977F_WDT is not set -# CONFIG_MACHZ_WDT is not set -# CONFIG_SBC_EPX_C3_WATCHDOG is not set -# CONFIG_MEN_A21_WDT is not set - -# -# PCI-based Watchdog Cards -# -# CONFIG_PCIPCWATCHDOG is not set -# CONFIG_WDTPCI is not set - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -# CONFIG_SSB is not set -CONFIG_BCMA_POSSIBLE=y - -# -# Broadcom specific AMBA -# -# CONFIG_BCMA is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_CS5535 is not set -# CONFIG_MFD_AS3711 is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_AAT2870_CORE is not set -# CONFIG_MFD_CROS_EC is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_MFD_DA9052_SPI is not set -# CONFIG_MFD_DA9052_I2C is not set -# CONFIG_MFD_DA9055 is not set -# CONFIG_MFD_DA9063 is not set -# CONFIG_MFD_MC13XXX_SPI is not set -# CONFIG_MFD_MC13XXX_I2C is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_HTC_I2CPLD is not set -# CONFIG_LPC_ICH is not set -# CONFIG_LPC_SCH is not set -# CONFIG_MFD_JANZ_CMODIO is not set -# CONFIG_MFD_KEMPLD is not set -# CONFIG_MFD_88PM800 is not set -# CONFIG_MFD_88PM805 is not set -# CONFIG_MFD_88PM860X is not set -# CONFIG_MFD_MAX77686 is not set -# CONFIG_MFD_MAX77693 is not set -# CONFIG_MFD_MAX8907 is not set -# CONFIG_MFD_MAX8925 is not set -# CONFIG_MFD_MAX8997 is not set -# CONFIG_MFD_MAX8998 is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_MFD_VIPERBOARD is not set -# CONFIG_MFD_RETU is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_RDC321X is not set -# CONFIG_MFD_RTSX_PCI is not set -# CONFIG_MFD_RC5T583 is not set -# CONFIG_MFD_SEC_CORE is not set -# CONFIG_MFD_SI476X_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_SMSC is not set -# CONFIG_ABX500_CORE is not set -# CONFIG_MFD_STMPE is not set -# CONFIG_MFD_SYSCON is not set -# CONFIG_MFD_TI_AM335X_TSCADC is not set -# CONFIG_MFD_LP8788 is not set -# CONFIG_MFD_PALMAS is not set -# CONFIG_TPS6105X is not set -# CONFIG_TPS65010 is not set -# CONFIG_TPS6507X is not set -# CONFIG_MFD_TPS65090 is not set -# CONFIG_MFD_TPS65217 is not set -# CONFIG_MFD_TPS6586X is not set -# CONFIG_MFD_TPS65910 is not set -# CONFIG_MFD_TPS65912 is not set -# CONFIG_MFD_TPS65912_I2C is not set -# CONFIG_MFD_TPS65912_SPI is not set -# CONFIG_MFD_TPS80031 is not set -# CONFIG_TWL4030_CORE is not set -# CONFIG_TWL6040_CORE is not set -# CONFIG_MFD_WL1273_CORE is not set -# CONFIG_MFD_LM3533 is not set -# CONFIG_MFD_TIMBERDALE is not set -# CONFIG_MFD_TC3589X is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_VX855 is not set -# CONFIG_MFD_ARIZONA_I2C is not set -# CONFIG_MFD_ARIZONA_SPI is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X_I2C is not set -# CONFIG_MFD_WM831X_SPI is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_WM8994 is not set -# CONFIG_REGULATOR is not set -CONFIG_MEDIA_SUPPORT=m - -# -# Multimedia core support -# -CONFIG_MEDIA_CAMERA_SUPPORT=y -# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set -# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set -# CONFIG_MEDIA_RADIO_SUPPORT is not set -# CONFIG_MEDIA_RC_SUPPORT is not set -# CONFIG_MEDIA_CONTROLLER is not set -CONFIG_VIDEO_DEV=m -CONFIG_VIDEO_V4L2=m -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -CONFIG_VIDEOBUF2_CORE=m -CONFIG_VIDEOBUF2_MEMOPS=m -CONFIG_VIDEOBUF2_VMALLOC=m -# CONFIG_VIDEO_V4L2_INT_DEVICE is not set -# CONFIG_TTPCI_EEPROM is not set - -# -# Media drivers -# -CONFIG_MEDIA_USB_SUPPORT=y - -# -# Webcam devices -# -CONFIG_USB_VIDEO_CLASS=m -CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -CONFIG_USB_GSPCA=m -# CONFIG_USB_M5602 is not set -# CONFIG_USB_STV06XX is not set -# CONFIG_USB_GL860 is not set -# CONFIG_USB_GSPCA_BENQ is not set -# CONFIG_USB_GSPCA_CONEX is not set -# CONFIG_USB_GSPCA_CPIA1 is not set -# CONFIG_USB_GSPCA_ETOMS is not set -# CONFIG_USB_GSPCA_FINEPIX is not set -# CONFIG_USB_GSPCA_JEILINJ is not set -# CONFIG_USB_GSPCA_JL2005BCD is not set -# CONFIG_USB_GSPCA_KINECT is not set -# CONFIG_USB_GSPCA_KONICA is not set -# CONFIG_USB_GSPCA_MARS is not set -# CONFIG_USB_GSPCA_MR97310A is not set -# CONFIG_USB_GSPCA_NW80X is not set -# CONFIG_USB_GSPCA_OV519 is not set -# CONFIG_USB_GSPCA_OV534 is not set -# CONFIG_USB_GSPCA_OV534_9 is not set -# CONFIG_USB_GSPCA_PAC207 is not set -# CONFIG_USB_GSPCA_PAC7302 is not set -# CONFIG_USB_GSPCA_PAC7311 is not set -# CONFIG_USB_GSPCA_SE401 is not set -# CONFIG_USB_GSPCA_SN9C2028 is not set -# CONFIG_USB_GSPCA_SN9C20X is not set -# CONFIG_USB_GSPCA_SONIXB is not set -# CONFIG_USB_GSPCA_SONIXJ is not set -# CONFIG_USB_GSPCA_SPCA500 is not set -# CONFIG_USB_GSPCA_SPCA501 is not set -# CONFIG_USB_GSPCA_SPCA505 is not set -# CONFIG_USB_GSPCA_SPCA506 is not set -# CONFIG_USB_GSPCA_SPCA508 is not set -# CONFIG_USB_GSPCA_SPCA561 is not set -# CONFIG_USB_GSPCA_SPCA1528 is not set -# CONFIG_USB_GSPCA_SQ905 is not set -# CONFIG_USB_GSPCA_SQ905C is not set -# CONFIG_USB_GSPCA_SQ930X is not set -# CONFIG_USB_GSPCA_STK014 is not set -# CONFIG_USB_GSPCA_STK1135 is not set -# CONFIG_USB_GSPCA_STV0680 is not set -# CONFIG_USB_GSPCA_SUNPLUS is not set -# CONFIG_USB_GSPCA_T613 is not set -# CONFIG_USB_GSPCA_TOPRO is not set -# CONFIG_USB_GSPCA_TV8532 is not set -# CONFIG_USB_GSPCA_VC032X is not set -# CONFIG_USB_GSPCA_VICAM is not set -# CONFIG_USB_GSPCA_XIRLINK_CIT is not set -# CONFIG_USB_GSPCA_ZC3XX is not set -# CONFIG_USB_PWC is not set -# CONFIG_VIDEO_CPIA2 is not set -# CONFIG_USB_ZR364XX is not set -# CONFIG_USB_STKWEBCAM is not set -# CONFIG_USB_S2255 is not set -# CONFIG_USB_SN9C102 is not set -# CONFIG_VIDEO_USBTV is not set - -# -# Webcam, TV (analog/digital) USB devices -# -# CONFIG_VIDEO_EM28XX is not set -# CONFIG_MEDIA_PCI_SUPPORT is not set -# CONFIG_V4L_PLATFORM_DRIVERS is not set -# CONFIG_V4L_MEM2MEM_DRIVERS is not set -# CONFIG_V4L_TEST_DRIVERS is not set - -# -# Supported MMC/SDIO adapters -# -# CONFIG_MEDIA_PARPORT_SUPPORT is not set -# CONFIG_CYPRESS_FIRMWARE is not set - -# -# Media ancillary drivers (tuners, sensors, i2c, frontends) -# -CONFIG_MEDIA_SUBDRV_AUTOSELECT=y - -# -# Audio decoders, processors and mixers -# - -# -# RDS decoders -# - -# -# Video decoders -# - -# -# Video and audio decoders -# - -# -# Video encoders -# - -# -# Camera sensor devices -# - -# -# Flash devices -# - -# -# Video improvement chips -# - -# -# Miscelaneous helper chips -# - -# -# Sensors used on soc_camera driver -# - -# -# Tools to develop new frontends -# -# CONFIG_DVB_DUMMY_FE is not set - -# -# Graphics support -# -CONFIG_AGP=y -CONFIG_AGP_AMD64=y -CONFIG_AGP_INTEL=y -# CONFIG_AGP_SIS is not set -# CONFIG_AGP_VIA is not set -CONFIG_VGA_ARB=y -CONFIG_VGA_ARB_MAX_GPUS=16 -CONFIG_VGA_SWITCHEROO=y -CONFIG_DRM=m -CONFIG_DRM_KMS_HELPER=m -CONFIG_DRM_LOAD_EDID_FIRMWARE=y -CONFIG_DRM_TTM=m - -# -# I2C encoder or helper chips -# -# CONFIG_DRM_I2C_CH7006 is not set -# CONFIG_DRM_I2C_SIL164 is not set -# CONFIG_DRM_I2C_NXP_TDA998X is not set -# CONFIG_DRM_TDFX is not set -# CONFIG_DRM_R128 is not set -CONFIG_DRM_RADEON=m -CONFIG_DRM_RADEON_UMS=y -# CONFIG_DRM_NOUVEAU is not set -CONFIG_DRM_I915=m -CONFIG_DRM_I915_KMS=y -# CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT is not set -# CONFIG_DRM_MGA is not set -# CONFIG_DRM_SIS is not set -# CONFIG_DRM_VIA is not set -# CONFIG_DRM_SAVAGE is not set -# CONFIG_DRM_VMWGFX is not set -# CONFIG_DRM_GMA500 is not set -# CONFIG_DRM_UDL is not set -# CONFIG_DRM_AST is not set -# CONFIG_DRM_MGAG200 is not set -# CONFIG_DRM_CIRRUS_QEMU is not set -# CONFIG_DRM_QXL is not set -CONFIG_VGASTATE=m -CONFIG_VIDEO_OUTPUT_CONTROL=m -CONFIG_HDMI=y -CONFIG_FB=y -CONFIG_FIRMWARE_EDID=y -CONFIG_FB_DDC=m -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -CONFIG_FB_BACKLIGHT=y -CONFIG_FB_MODE_HELPERS=y -CONFIG_FB_TILEBLITTING=y - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_CIRRUS is not set -# CONFIG_FB_PM2 is not set -# CONFIG_FB_CYBER2000 is not set -# CONFIG_FB_ARC is not set -# CONFIG_FB_ASILIANT is not set -# CONFIG_FB_IMSTT is not set -CONFIG_FB_VGA16=m -# CONFIG_FB_UVESA is not set -# CONFIG_FB_VESA is not set -CONFIG_FB_EFI=y -# CONFIG_FB_N411 is not set -# CONFIG_FB_HGA is not set -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_NVIDIA is not set -# CONFIG_FB_RIVA is not set -# CONFIG_FB_I740 is not set -# CONFIG_FB_LE80578 is not set -# CONFIG_FB_INTEL is not set -# CONFIG_FB_MATROX is not set -CONFIG_FB_RADEON=m -CONFIG_FB_RADEON_I2C=y -CONFIG_FB_RADEON_BACKLIGHT=y -# CONFIG_FB_RADEON_DEBUG is not set -# CONFIG_FB_ATY128 is not set -# CONFIG_FB_ATY is not set -# CONFIG_FB_S3 is not set -# CONFIG_FB_SAVAGE is not set -# CONFIG_FB_SIS is not set -# CONFIG_FB_VIA is not set -# CONFIG_FB_NEOMAGIC is not set -# CONFIG_FB_KYRO is not set -# CONFIG_FB_3DFX is not set -# CONFIG_FB_VOODOO1 is not set -# CONFIG_FB_VT8623 is not set -# CONFIG_FB_TRIDENT is not set -# CONFIG_FB_ARK is not set -# CONFIG_FB_PM3 is not set -# CONFIG_FB_CARMINE is not set -# CONFIG_FB_SMSCUFX is not set -# CONFIG_FB_UDL is not set -# CONFIG_FB_GOLDFISH is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_FB_AUO_K190X is not set -# CONFIG_FB_SIMPLE is not set -# CONFIG_EXYNOS_VIDEO is not set -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_LCD_CLASS_DEVICE=m -# CONFIG_LCD_L4F00242T03 is not set -# CONFIG_LCD_LMS283GF05 is not set -# CONFIG_LCD_LTV350QV is not set -# CONFIG_LCD_ILI922X is not set -# CONFIG_LCD_ILI9320 is not set -# CONFIG_LCD_TDO24M is not set -# CONFIG_LCD_VGG2432A4 is not set -CONFIG_LCD_PLATFORM=m -# CONFIG_LCD_S6E63M0 is not set -# CONFIG_LCD_LD9040 is not set -# CONFIG_LCD_AMS369FG06 is not set -# CONFIG_LCD_LMS501KF03 is not set -# CONFIG_LCD_HX8357 is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_GENERIC=y -# CONFIG_BACKLIGHT_APPLE is not set -# CONFIG_BACKLIGHT_SAHARA is not set -# CONFIG_BACKLIGHT_ADP8860 is not set -# CONFIG_BACKLIGHT_ADP8870 is not set -# CONFIG_BACKLIGHT_LM3630 is not set -# CONFIG_BACKLIGHT_LM3639 is not set -# CONFIG_BACKLIGHT_LP855X is not set -# CONFIG_BACKLIGHT_GPIO is not set -# CONFIG_BACKLIGHT_LV5207LP is not set -# CONFIG_BACKLIGHT_BD6107 is not set - -# -# Console display driver support -# -CONFIG_VGA_CONSOLE=y -# CONFIG_VGACON_SOFT_SCROLLBACK is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set -# CONFIG_LOGO is not set -CONFIG_SOUND=y -CONFIG_SOUND_OSS_CORE=y -CONFIG_SOUND_OSS_CORE_PRECLAIM=y -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_HWDEP=y -CONFIG_SND_RAWMIDI=m -CONFIG_SND_JACK=y -CONFIG_SND_SEQUENCER=m -CONFIG_SND_SEQ_DUMMY=m -CONFIG_SND_OSSEMUL=y -CONFIG_SND_MIXER_OSS=m -# CONFIG_SND_PCM_OSS is not set -# CONFIG_SND_SEQUENCER_OSS is not set -CONFIG_SND_HRTIMER=m -CONFIG_SND_SEQ_HRTIMER_DEFAULT=y -CONFIG_SND_DYNAMIC_MINORS=y -CONFIG_SND_MAX_CARDS=32 -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -CONFIG_SND_VMASTER=y -CONFIG_SND_KCTL_JACK=y -CONFIG_SND_DMA_SGBUF=y -CONFIG_SND_RAWMIDI_SEQ=m -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -CONFIG_SND_DRIVERS=y -CONFIG_SND_PCSP=m -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_ALOOP is not set -# CONFIG_SND_VIRMIDI is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_MTS64 is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -# CONFIG_SND_PORTMAN2X4 is not set -CONFIG_SND_PCI=y -# CONFIG_SND_AD1889 is not set -# CONFIG_SND_ALS300 is not set -# CONFIG_SND_ALS4000 is not set -# CONFIG_SND_ALI5451 is not set -# CONFIG_SND_ASIHPI is not set -# CONFIG_SND_ATIIXP is not set -# CONFIG_SND_ATIIXP_MODEM is not set -# CONFIG_SND_AU8810 is not set -# CONFIG_SND_AU8820 is not set -# CONFIG_SND_AU8830 is not set -# CONFIG_SND_AW2 is not set -# CONFIG_SND_AZT3328 is not set -# CONFIG_SND_BT87X is not set -# CONFIG_SND_CA0106 is not set -# CONFIG_SND_CMIPCI is not set -# CONFIG_SND_OXYGEN is not set -# CONFIG_SND_CS4281 is not set -# CONFIG_SND_CS46XX is not set -# CONFIG_SND_CS5530 is not set -# CONFIG_SND_CS5535AUDIO is not set -# CONFIG_SND_CTXFI is not set -# CONFIG_SND_DARLA20 is not set -# CONFIG_SND_GINA20 is not set -# CONFIG_SND_LAYLA20 is not set -# CONFIG_SND_DARLA24 is not set -# CONFIG_SND_GINA24 is not set -# CONFIG_SND_LAYLA24 is not set -# CONFIG_SND_MONA is not set -# CONFIG_SND_MIA is not set -# CONFIG_SND_ECHO3G is not set -# CONFIG_SND_INDIGO is not set -# CONFIG_SND_INDIGOIO is not set -# CONFIG_SND_INDIGODJ is not set -# CONFIG_SND_INDIGOIOX is not set -# CONFIG_SND_INDIGODJX is not set -# CONFIG_SND_EMU10K1 is not set -# CONFIG_SND_EMU10K1X is not set -# CONFIG_SND_ENS1370 is not set -# CONFIG_SND_ENS1371 is not set -# CONFIG_SND_ES1938 is not set -# CONFIG_SND_ES1968 is not set -# CONFIG_SND_FM801 is not set -CONFIG_SND_HDA_INTEL=y -CONFIG_SND_HDA_PREALLOC_SIZE=64 -CONFIG_SND_HDA_HWDEP=y -CONFIG_SND_HDA_RECONFIG=y -CONFIG_SND_HDA_INPUT_BEEP=y -CONFIG_SND_HDA_INPUT_BEEP_MODE=1 -CONFIG_SND_HDA_INPUT_JACK=y -CONFIG_SND_HDA_PATCH_LOADER=y -CONFIG_SND_HDA_CODEC_REALTEK=y -CONFIG_SND_HDA_CODEC_ANALOG=y -CONFIG_SND_HDA_CODEC_SIGMATEL=y -CONFIG_SND_HDA_CODEC_VIA=y -CONFIG_SND_HDA_CODEC_HDMI=y -CONFIG_SND_HDA_I915=y -CONFIG_SND_HDA_CODEC_CIRRUS=y -CONFIG_SND_HDA_CODEC_CONEXANT=y -CONFIG_SND_HDA_CODEC_CA0110=y -CONFIG_SND_HDA_CODEC_CA0132=y -# CONFIG_SND_HDA_CODEC_CA0132_DSP is not set -CONFIG_SND_HDA_CODEC_CMEDIA=y -CONFIG_SND_HDA_CODEC_SI3054=y -CONFIG_SND_HDA_GENERIC=y -CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0 -# CONFIG_SND_HDSP is not set -# CONFIG_SND_HDSPM is not set -# CONFIG_SND_ICE1712 is not set -# CONFIG_SND_ICE1724 is not set -# CONFIG_SND_INTEL8X0 is not set -# CONFIG_SND_INTEL8X0M is not set -# CONFIG_SND_KORG1212 is not set -# CONFIG_SND_LOLA is not set -# CONFIG_SND_LX6464ES is not set -# CONFIG_SND_MAESTRO3 is not set -# CONFIG_SND_MIXART is not set -# CONFIG_SND_NM256 is not set -# CONFIG_SND_PCXHR is not set -# CONFIG_SND_RIPTIDE is not set -# CONFIG_SND_RME32 is not set -# CONFIG_SND_RME96 is not set -# CONFIG_SND_RME9652 is not set -# CONFIG_SND_SONICVIBES is not set -# CONFIG_SND_TRIDENT is not set -# CONFIG_SND_VIA82XX is not set -# CONFIG_SND_VIA82XX_MODEM is not set -# CONFIG_SND_VIRTUOSO is not set -# CONFIG_SND_VX222 is not set -# CONFIG_SND_YMFPCI is not set -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=m -# CONFIG_SND_USB_UA101 is not set -# CONFIG_SND_USB_USX2Y is not set -# CONFIG_SND_USB_CAIAQ is not set -# CONFIG_SND_USB_US122L is not set -# CONFIG_SND_USB_6FIRE is not set -# CONFIG_SND_USB_HIFACE is not set -# CONFIG_SND_SOC is not set -# CONFIG_SOUND_PRIME is not set - -# -# HID support -# -CONFIG_HID=y -# CONFIG_HID_BATTERY_STRENGTH is not set -# CONFIG_HIDRAW is not set -# CONFIG_UHID is not set -CONFIG_HID_GENERIC=y - -# -# Special HID drivers -# -# CONFIG_HID_A4TECH is not set -# CONFIG_HID_ACRUX is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_APPLEIR is not set -# CONFIG_HID_AUREAL is not set -# CONFIG_HID_BELKIN is not set -# CONFIG_HID_CHERRY is not set -# CONFIG_HID_CHICONY is not set -# CONFIG_HID_PRODIKEYS is not set -# CONFIG_HID_CYPRESS is not set -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EMS_FF is not set -# CONFIG_HID_ELECOM is not set -# CONFIG_HID_ELO is not set -# CONFIG_HID_EZKEY is not set -# CONFIG_HID_HOLTEK is not set -# CONFIG_HID_HUION is not set -# CONFIG_HID_KEYTOUCH is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_UCLOGIC is not set -# CONFIG_HID_WALTOP is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_ICADE is not set -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -# CONFIG_HID_LCPOWER is not set -# CONFIG_HID_LENOVO_TPKBD is not set -# CONFIG_HID_LOGITECH is not set -# CONFIG_HID_MAGICMOUSE is not set -# CONFIG_HID_MICROSOFT is not set -# CONFIG_HID_MONTEREY is not set -# CONFIG_HID_MULTITOUCH is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_ORTEK is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_PICOLCD is not set -# CONFIG_HID_PRIMAX is not set -# CONFIG_HID_ROCCAT is not set -# CONFIG_HID_SAITEK is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SPEEDLINK is not set -# CONFIG_HID_STEELSERIES is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TIVO is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THINGM is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_WIIMOTE is not set -# CONFIG_HID_XINMO is not set -# CONFIG_HID_ZEROPLUS is not set -# CONFIG_HID_ZYDACRON is not set -# CONFIG_HID_SENSOR_HUB is not set - -# -# USB HID support -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -CONFIG_USB_HIDDEV=y - -# -# I2C HID support -# -# CONFIG_I2C_HID is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_COMMON=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y - -# -# Miscellaneous USB options -# -CONFIG_USB_DEFAULT_PERSIST=y -# CONFIG_USB_DYNAMIC_MINORS is not set -# CONFIG_USB_OTG is not set -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -# CONFIG_USB_MON is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_ROOT_HUB_TT=y -CONFIG_USB_EHCI_TT_NEWSCHED=y -CONFIG_USB_EHCI_PCI=y -CONFIG_USB_EHCI_HCD_PLATFORM=y -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -# CONFIG_USB_FUSBH200_HCD is not set -# CONFIG_USB_FOTG210_HCD is not set -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_HCD_PCI=m -CONFIG_USB_OHCI_HCD_PLATFORM=y -CONFIG_USB_UHCI_HCD=y -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HCD_TEST_MODE is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -# CONFIG_USB_WDM is not set -# CONFIG_USB_TMC is not set - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_REALTEK is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_STORAGE_ENE_UB6250 is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_DWC3 is not set -# CONFIG_USB_CHIPIDEA is not set - -# -# USB port drivers -# -# CONFIG_USB_USS720 is not set -CONFIG_USB_SERIAL=y -CONFIG_USB_SERIAL_CONSOLE=y -CONFIG_USB_SERIAL_GENERIC=y -# CONFIG_USB_SERIAL_SIMPLE is not set -# CONFIG_USB_SERIAL_AIRCABLE is not set -# CONFIG_USB_SERIAL_ARK3116 is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_CH341 is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_CP210X is not set -# CONFIG_USB_SERIAL_CYPRESS_M8 is not set -# CONFIG_USB_SERIAL_EMPEG is not set -CONFIG_USB_SERIAL_FTDI_SIO=y -# CONFIG_USB_SERIAL_VISOR is not set -# CONFIG_USB_SERIAL_IPAQ is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_EDGEPORT_TI is not set -# CONFIG_USB_SERIAL_F81232 is not set -# CONFIG_USB_SERIAL_GARMIN is not set -# CONFIG_USB_SERIAL_IPW is not set -# CONFIG_USB_SERIAL_IUU is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KLSI is not set -# CONFIG_USB_SERIAL_KOBIL_SCT is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_METRO is not set -# CONFIG_USB_SERIAL_MOS7720 is not set -# CONFIG_USB_SERIAL_MOS7840 is not set -# CONFIG_USB_SERIAL_NAVMAN is not set -CONFIG_USB_SERIAL_PL2303=y -# CONFIG_USB_SERIAL_OTI6858 is not set -# CONFIG_USB_SERIAL_QCAUX is not set -# CONFIG_USB_SERIAL_QUALCOMM is not set -# CONFIG_USB_SERIAL_SPCP8X5 is not set -# CONFIG_USB_SERIAL_SAFE is not set -# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set -# CONFIG_USB_SERIAL_SYMBOL is not set -# CONFIG_USB_SERIAL_TI is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OPTION is not set -# CONFIG_USB_SERIAL_OMNINET is not set -# CONFIG_USB_SERIAL_OPTICON is not set -# CONFIG_USB_SERIAL_XSENS_MT is not set -# CONFIG_USB_SERIAL_WISHBONE is not set -# CONFIG_USB_SERIAL_ZTE is not set -# CONFIG_USB_SERIAL_SSU100 is not set -# CONFIG_USB_SERIAL_QT2 is not set -# CONFIG_USB_SERIAL_DEBUG is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_TEST is not set -# CONFIG_USB_EHSET_TEST_FIXTURE is not set -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_YUREX is not set -CONFIG_USB_EZUSB_FX2=y -# CONFIG_USB_HSIC_USB3503 is not set - -# -# USB Physical Layer drivers -# -# CONFIG_USB_PHY is not set -# CONFIG_NOP_USB_XCEIV is not set -# CONFIG_AM335X_PHY_USB is not set -# CONFIG_SAMSUNG_USB2PHY is not set -# CONFIG_SAMSUNG_USB3PHY is not set -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_USB_ISP1301 is not set -# CONFIG_USB_RCAR_PHY is not set -# CONFIG_USB_GADGET is not set -# CONFIG_UWB is not set -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -# CONFIG_MMC_UNSAFE_RESUME is not set -# CONFIG_MMC_CLKGATE is not set - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_MINORS=8 -CONFIG_MMC_BLOCK_BOUNCE=y -# CONFIG_SDIO_UART is not set -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_PCI=y -# CONFIG_MMC_RICOH_MMC is not set -# CONFIG_MMC_SDHCI_ACPI is not set -CONFIG_MMC_SDHCI_PLTFM=m -# CONFIG_MMC_WBSD is not set -# CONFIG_MMC_TIFM_SD is not set -CONFIG_MMC_SPI=m -# CONFIG_MMC_CB710 is not set -# CONFIG_MMC_VIA_SDMMC is not set -# CONFIG_MMC_VUB300 is not set -# CONFIG_MMC_USHC is not set -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y - -# -# LED drivers -# -# CONFIG_LEDS_LM3530 is not set -# CONFIG_LEDS_LM3642 is not set -# CONFIG_LEDS_PCA9532 is not set -# CONFIG_LEDS_GPIO is not set -# CONFIG_LEDS_LP3944 is not set -# CONFIG_LEDS_LP5521 is not set -# CONFIG_LEDS_LP5523 is not set -# CONFIG_LEDS_LP5562 is not set -# CONFIG_LEDS_LP8501 is not set -# CONFIG_LEDS_CLEVO_MAIL is not set -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_PCA963X is not set -# CONFIG_LEDS_DAC124S085 is not set -# CONFIG_LEDS_BD2802 is not set -# CONFIG_LEDS_INTEL_SS4200 is not set -# CONFIG_LEDS_LT3593 is not set -# CONFIG_LEDS_TCA6507 is not set -# CONFIG_LEDS_LM355x is not set -# CONFIG_LEDS_OT200 is not set -# CONFIG_LEDS_BLINKM is not set - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -# CONFIG_LEDS_TRIGGER_TIMER is not set -# CONFIG_LEDS_TRIGGER_ONESHOT is not set -# CONFIG_LEDS_TRIGGER_IDE_DISK is not set -# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set -# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set -# CONFIG_LEDS_TRIGGER_CPU is not set -# CONFIG_LEDS_TRIGGER_GPIO is not set -# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set - -# -# iptables trigger is under Netfilter config (LED target) -# -# CONFIG_LEDS_TRIGGER_TRANSIENT is not set -# CONFIG_LEDS_TRIGGER_CAMERA is not set -# CONFIG_ACCESSIBILITY is not set -# CONFIG_INFINIBAND is not set -CONFIG_EDAC=y -CONFIG_EDAC_LEGACY_SYSFS=y -# CONFIG_EDAC_DEBUG is not set -CONFIG_EDAC_DECODE_MCE=y -CONFIG_EDAC_MCE_INJ=m -CONFIG_EDAC_MM_EDAC=m -CONFIG_EDAC_AMD64=m -# CONFIG_EDAC_AMD64_ERROR_INJECTION is not set -# CONFIG_EDAC_E752X is not set -# CONFIG_EDAC_I82975X is not set -# CONFIG_EDAC_I3000 is not set -# CONFIG_EDAC_I3200 is not set -# CONFIG_EDAC_X38 is not set -# CONFIG_EDAC_I5400 is not set -# CONFIG_EDAC_I7CORE is not set -# CONFIG_EDAC_I5000 is not set -# CONFIG_EDAC_I5100 is not set -# CONFIG_EDAC_I7300 is not set -# CONFIG_EDAC_SBRIDGE is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_SYSTOHC=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_DS3232 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_ISL12022 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF2127 is not set -# CONFIG_RTC_DRV_PCF8523 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_BQ32K is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set -# CONFIG_RTC_DRV_EM3027 is not set -# CONFIG_RTC_DRV_RV3029C2 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T93 is not set -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set -# CONFIG_RTC_DRV_PCF2123 is not set -# CONFIG_RTC_DRV_RX4581 is not set - -# -# Platform RTC drivers -# -CONFIG_RTC_DRV_CMOS=y -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set -# CONFIG_RTC_DRV_DS2404 is not set - -# -# on-CPU RTC drivers -# -# CONFIG_RTC_DRV_MOXART is not set - -# -# HID Sensor RTC drivers -# -# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set -# CONFIG_DMADEVICES is not set -CONFIG_AUXDISPLAY=y -# CONFIG_KS0108 is not set -# CONFIG_UIO is not set -# CONFIG_VFIO is not set -# CONFIG_VIRT_DRIVERS is not set -CONFIG_VIRTIO=y - -# -# Virtio drivers -# -CONFIG_VIRTIO_PCI=y -CONFIG_VIRTIO_BALLOON=y -CONFIG_VIRTIO_MMIO=y -# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set - -# -# Microsoft Hyper-V guest support -# -# CONFIG_STAGING is not set -CONFIG_X86_PLATFORM_DEVICES=y -# CONFIG_ACERHDF is not set -# CONFIG_ASUS_LAPTOP is not set -# CONFIG_CHROMEOS_LAPTOP is not set -# CONFIG_FUJITSU_LAPTOP is not set -# CONFIG_FUJITSU_TABLET is not set -# CONFIG_AMILO_RFKILL is not set -# CONFIG_HP_ACCEL is not set -# CONFIG_MSI_LAPTOP is not set -# CONFIG_PANASONIC_LAPTOP is not set -# CONFIG_COMPAL_LAPTOP is not set -# CONFIG_SONY_LAPTOP is not set -# CONFIG_IDEAPAD_LAPTOP is not set -# CONFIG_THINKPAD_ACPI is not set -# CONFIG_SENSORS_HDAPS is not set -# CONFIG_INTEL_MENLOW is not set -# CONFIG_EEEPC_LAPTOP is not set -# CONFIG_ACPI_WMI is not set -# CONFIG_TOPSTAR_LAPTOP is not set -# CONFIG_TOSHIBA_BT_RFKILL is not set -# CONFIG_ACPI_CMPC is not set -# CONFIG_INTEL_IPS is not set -# CONFIG_IBM_RTL is not set -# CONFIG_XO15_EBOOK is not set -# CONFIG_SAMSUNG_LAPTOP is not set -# CONFIG_INTEL_OAKTRAIL is not set -# CONFIG_SAMSUNG_Q10 is not set -# CONFIG_APPLE_GMUX is not set -# CONFIG_INTEL_RST is not set -# CONFIG_INTEL_SMARTCONNECT is not set -# CONFIG_PVPANIC is not set - -# -# Hardware Spinlock drivers -# -CONFIG_CLKEVT_I8253=y -CONFIG_I8253_LOCK=y -CONFIG_CLKBLD_I8253=y -# CONFIG_MAILBOX is not set -CONFIG_IOMMU_API=y -CONFIG_IOMMU_SUPPORT=y -CONFIG_AMD_IOMMU=y -CONFIG_AMD_IOMMU_STATS=y -CONFIG_AMD_IOMMU_V2=m -CONFIG_DMAR_TABLE=y -# CONFIG_INTEL_IOMMU is not set -CONFIG_IRQ_REMAP=y - -# -# Remoteproc drivers -# -# CONFIG_STE_MODEM_RPROC is not set - -# -# Rpmsg drivers -# -CONFIG_PM_DEVFREQ=y - -# -# DEVFREQ Governors -# -CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y -CONFIG_DEVFREQ_GOV_PERFORMANCE=y -CONFIG_DEVFREQ_GOV_POWERSAVE=y -CONFIG_DEVFREQ_GOV_USERSPACE=y - -# -# DEVFREQ Drivers -# -# CONFIG_EXTCON is not set -CONFIG_MEMORY=y -# CONFIG_IIO is not set -# CONFIG_NTB is not set -# CONFIG_VME_BUS is not set -# CONFIG_PWM is not set -# CONFIG_IPACK_BUS is not set -# CONFIG_RESET_CONTROLLER is not set -# CONFIG_FMC is not set - -# -# Firmware Drivers -# -CONFIG_EDD=y -CONFIG_EDD_OFF=y -CONFIG_FIRMWARE_MEMMAP=y -# CONFIG_DELL_RBU is not set -# CONFIG_DCDBAS is not set -CONFIG_DMIID=y -CONFIG_DMI_SYSFS=m -# CONFIG_ISCSI_IBFT_FIND is not set -# CONFIG_GOOGLE_FIRMWARE is not set - -# -# EFI (Extensible Firmware Interface) Support -# -CONFIG_EFI_VARS=y -CONFIG_EFI_VARS_PSTORE=y -# CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE is not set - -# -# File systems -# -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -# CONFIG_EXT2_FS_SECURITY is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -CONFIG_EXT3_DEFAULTS_TO_ORDERED=y -CONFIG_EXT3_FS_XATTR=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_EXT3_FS_SECURITY=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y -# CONFIG_EXT4_DEBUG is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_JBD2=y -# CONFIG_JBD2_DEBUG is not set -CONFIG_FS_MBCACHE=y -CONFIG_REISERFS_FS=m -# CONFIG_REISERFS_CHECK is not set -# CONFIG_REISERFS_PROC_INFO is not set -CONFIG_REISERFS_FS_XATTR=y -CONFIG_REISERFS_FS_POSIX_ACL=y -# CONFIG_REISERFS_FS_SECURITY is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -CONFIG_BTRFS_FS=y -CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set -# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set -# CONFIG_BTRFS_DEBUG is not set -# CONFIG_BTRFS_ASSERT is not set -# CONFIG_NILFS2_FS is not set -CONFIG_FS_POSIX_ACL=y -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_FANOTIFY is not set -# CONFIG_QUOTA is not set -# CONFIG_QUOTACTL is not set -CONFIG_AUTOFS4_FS=y -CONFIG_FUSE_FS=m -CONFIG_CUSE=m - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -CONFIG_ISO9660_FS=y -# CONFIG_JOLIET is not set -# CONFIG_ZISOFS is not set -CONFIG_UDF_FS=m -CONFIG_UDF_NLS=y - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_PROC_VMCORE=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set -# CONFIG_TMPFS_XATTR is not set -CONFIG_HUGETLBFS=y -CONFIG_HUGETLB_PAGE=y -CONFIG_CONFIGFS_FS=m -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_ECRYPT_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_LOGFS is not set -# CONFIG_CRAMFS is not set -# CONFIG_SQUASHFS is not set -# CONFIG_VXFS_FS is not set -CONFIG_MINIX_FS=m -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX6FS_FS is not set -CONFIG_ROMFS_FS=m -CONFIG_ROMFS_BACKED_BY_BLOCK=y -CONFIG_ROMFS_ON_BLOCK=y -CONFIG_PSTORE=y -# CONFIG_PSTORE_CONSOLE is not set -# CONFIG_PSTORE_FTRACE is not set -# CONFIG_PSTORE_RAM is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -# CONFIG_F2FS_FS is not set -# CONFIG_EFIVAR_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V2=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -CONFIG_NFS_V4=y -# CONFIG_NFS_SWAP is not set -# CONFIG_NFS_V4_1 is not set -CONFIG_ROOT_NFS=y -# CONFIG_NFS_USE_LEGACY_DNS is not set -CONFIG_NFS_USE_KERNEL_DNS=y -# CONFIG_NFSD is not set -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -# CONFIG_SUNRPC_DEBUG is not set -# CONFIG_CEPH_FS is not set -CONFIG_CIFS=m -# CONFIG_CIFS_STATS is not set -# CONFIG_CIFS_WEAK_PW_HASH is not set -# CONFIG_CIFS_UPCALL is not set -CONFIG_CIFS_XATTR=y -CONFIG_CIFS_POSIX=y -# CONFIG_CIFS_ACL is not set -CONFIG_CIFS_DEBUG=y -# CONFIG_CIFS_DEBUG2 is not set -# CONFIG_CIFS_DFS_UPCALL is not set -# CONFIG_CIFS_SMB2 is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_737=m -CONFIG_NLS_CODEPAGE_775=m -CONFIG_NLS_CODEPAGE_850=m -CONFIG_NLS_CODEPAGE_852=m -CONFIG_NLS_CODEPAGE_855=m -CONFIG_NLS_CODEPAGE_857=m -CONFIG_NLS_CODEPAGE_860=m -CONFIG_NLS_CODEPAGE_861=m -CONFIG_NLS_CODEPAGE_862=m -CONFIG_NLS_CODEPAGE_863=m -CONFIG_NLS_CODEPAGE_864=m -CONFIG_NLS_CODEPAGE_865=m -CONFIG_NLS_CODEPAGE_866=m -CONFIG_NLS_CODEPAGE_869=m -CONFIG_NLS_CODEPAGE_936=m -CONFIG_NLS_CODEPAGE_950=m -CONFIG_NLS_CODEPAGE_932=m -CONFIG_NLS_CODEPAGE_949=m -CONFIG_NLS_CODEPAGE_874=m -CONFIG_NLS_ISO8859_8=m -CONFIG_NLS_CODEPAGE_1250=m -CONFIG_NLS_CODEPAGE_1251=m -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_ISO8859_2=m -CONFIG_NLS_ISO8859_3=m -CONFIG_NLS_ISO8859_4=m -CONFIG_NLS_ISO8859_5=m -CONFIG_NLS_ISO8859_6=m -CONFIG_NLS_ISO8859_7=m -CONFIG_NLS_ISO8859_9=m -CONFIG_NLS_ISO8859_13=m -CONFIG_NLS_ISO8859_14=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_KOI8_R=m -CONFIG_NLS_KOI8_U=m -# CONFIG_NLS_MAC_ROMAN is not set -# CONFIG_NLS_MAC_CELTIC is not set -# CONFIG_NLS_MAC_CENTEURO is not set -# CONFIG_NLS_MAC_CROATIAN is not set -# CONFIG_NLS_MAC_CYRILLIC is not set -# CONFIG_NLS_MAC_GAELIC is not set -# CONFIG_NLS_MAC_GREEK is not set -# CONFIG_NLS_MAC_ICELAND is not set -# CONFIG_NLS_MAC_INUIT is not set -# CONFIG_NLS_MAC_ROMANIAN is not set -# CONFIG_NLS_MAC_TURKISH is not set -CONFIG_NLS_UTF8=m -# CONFIG_DLM is not set - -# -# Kernel hacking -# -CONFIG_TRACE_IRQFLAGS_SUPPORT=y - -# -# printk and dmesg options -# -# CONFIG_PRINTK_TIME is not set -CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_DYNAMIC_DEBUG is not set - -# -# Compile-time checks and compiler options -# -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_INFO_REDUCED is not set -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=2048 -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_READABLE_ASM is not set -CONFIG_UNUSED_SYMBOLS=y -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_SECTION_MISMATCH is not set -CONFIG_ARCH_WANT_FRAME_POINTERS=y -CONFIG_FRAME_POINTER=y -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y - -# -# Memory Debugging -# -# CONFIG_DEBUG_PAGEALLOC is not set -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_SLUB_DEBUG_ON is not set -# CONFIG_SLUB_STATS is not set -CONFIG_HAVE_DEBUG_KMEMLEAK=y -# CONFIG_DEBUG_KMEMLEAK is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_VIRTUAL is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_PER_CPU_MAPS is not set -CONFIG_HAVE_DEBUG_STACKOVERFLOW=y -# CONFIG_DEBUG_STACKOVERFLOW is not set -CONFIG_HAVE_ARCH_KMEMCHECK=y -# CONFIG_DEBUG_SHIRQ is not set - -# -# Debug Lockups and Hangs -# -# CONFIG_LOCKUP_DETECTOR is not set -# CONFIG_DETECT_HUNG_TASK is not set -# CONFIG_PANIC_ON_OOPS is not set -CONFIG_PANIC_ON_OOPS_VALUE=0 -CONFIG_SCHED_DEBUG=y -CONFIG_SCHEDSTATS=y -CONFIG_TIMER_STATS=y -CONFIG_DEBUG_PREEMPT=y - -# -# Lock Debugging (spinlocks, mutexes, etc...) -# -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_MUTEXES is not set -# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_ATOMIC_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -CONFIG_STACKTRACE=y -# CONFIG_DEBUG_KOBJECT is not set -CONFIG_DEBUG_BUGVERBOSE=y -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set - -# -# RCU Debugging -# -# CONFIG_PROVE_RCU_DELAY is not set -# CONFIG_SPARSE_RCU_POINTER is not set -# CONFIG_RCU_TORTURE_TEST is not set -CONFIG_RCU_CPU_STALL_TIMEOUT=21 -CONFIG_RCU_CPU_STALL_VERBOSE=y -# CONFIG_RCU_CPU_STALL_INFO is not set -# CONFIG_RCU_TRACE is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_NOTIFIER_ERROR_INJECTION is not set -# CONFIG_FAULT_INJECTION is not set -CONFIG_LATENCYTOP=y -CONFIG_ARCH_HAS_DEBUG_STRICT_USER_COPY_CHECKS=y -# CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set -CONFIG_USER_STACKTRACE_SUPPORT=y -CONFIG_NOP_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST=y -CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_FENTRY=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_TRACE_CLOCK=y -CONFIG_RING_BUFFER=y -CONFIG_EVENT_TRACING=y -CONFIG_CONTEXT_SWITCH_TRACER=y -CONFIG_RING_BUFFER_ALLOW_SWAP=y -CONFIG_TRACING=y -CONFIG_GENERIC_TRACER=y -CONFIG_TRACING_SUPPORT=y -CONFIG_FTRACE=y -CONFIG_FUNCTION_TRACER=y -CONFIG_FUNCTION_GRAPH_TRACER=y -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_PREEMPT_TRACER is not set -# CONFIG_SCHED_TRACER is not set -CONFIG_FTRACE_SYSCALLS=y -# CONFIG_TRACER_SNAPSHOT is not set -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_STACK_TRACER is not set -CONFIG_BLK_DEV_IO_TRACE=y -CONFIG_KPROBE_EVENT=y -CONFIG_UPROBE_EVENT=y -CONFIG_PROBE_EVENTS=y -CONFIG_DYNAMIC_FTRACE=y -CONFIG_DYNAMIC_FTRACE_WITH_REGS=y -# CONFIG_FUNCTION_PROFILER is not set -CONFIG_FTRACE_MCOUNT_RECORD=y -# CONFIG_FTRACE_STARTUP_TEST is not set -# CONFIG_MMIOTRACE is not set -# CONFIG_RING_BUFFER_BENCHMARK is not set -# CONFIG_RING_BUFFER_STARTUP_TEST is not set - -# -# Runtime Testing -# -# CONFIG_LKDTM is not set -# CONFIG_TEST_LIST_SORT is not set -# CONFIG_KPROBES_SANITY_TEST is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_RBTREE_TEST is not set -# CONFIG_INTERVAL_TREE_TEST is not set -# CONFIG_ATOMIC64_SELFTEST is not set -# CONFIG_TEST_STRING_HELPERS is not set -# CONFIG_TEST_KSTRTOX is not set -# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set -# CONFIG_DMA_API_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_KGDB=y -CONFIG_KGDB_SERIAL_CONSOLE=y -# CONFIG_KGDB_TESTS is not set -CONFIG_KGDB_LOW_LEVEL_TRAP=y -CONFIG_KGDB_KDB=y -CONFIG_KDB_KEYBOARD=y -CONFIG_KDB_CONTINUE_CATASTROPHIC=0 -# CONFIG_STRICT_DEVMEM is not set -CONFIG_X86_VERBOSE_BOOTUP=y -CONFIG_EARLY_PRINTK=y -# CONFIG_EARLY_PRINTK_DBGP is not set -# CONFIG_X86_PTDUMP is not set -CONFIG_DEBUG_RODATA=y -CONFIG_DEBUG_RODATA_TEST=y -# CONFIG_DEBUG_SET_MODULE_RONX is not set -# CONFIG_DEBUG_NX_TEST is not set -CONFIG_DOUBLEFAULT=y -# CONFIG_DEBUG_TLBFLUSH is not set -# CONFIG_IOMMU_DEBUG is not set -# CONFIG_IOMMU_STRESS is not set -CONFIG_HAVE_MMIOTRACE_SUPPORT=y -# CONFIG_X86_DECODER_SELFTEST is not set -CONFIG_IO_DELAY_TYPE_0X80=0 -CONFIG_IO_DELAY_TYPE_0XED=1 -CONFIG_IO_DELAY_TYPE_UDELAY=2 -CONFIG_IO_DELAY_TYPE_NONE=3 -CONFIG_IO_DELAY_0X80=y -# CONFIG_IO_DELAY_0XED is not set -# CONFIG_IO_DELAY_UDELAY is not set -# CONFIG_IO_DELAY_NONE is not set -CONFIG_DEFAULT_IO_DELAY_TYPE=0 -# CONFIG_DEBUG_BOOT_PARAMS is not set -# CONFIG_CPA_DEBUG is not set -# CONFIG_OPTIMIZE_INLINING is not set -# CONFIG_DEBUG_NMI_SELFTEST is not set -# CONFIG_X86_DEBUG_STATIC_CPU_HAS is not set - -# -# Security options -# -CONFIG_KEYS=y -# CONFIG_TRUSTED_KEYS is not set -# CONFIG_ENCRYPTED_KEYS is not set -# CONFIG_KEYS_DEBUG_PROC_KEYS is not set -# CONFIG_SECURITY_DMESG_RESTRICT is not set -CONFIG_SECURITY=y -CONFIG_SECURITYFS=y -# CONFIG_SECURITY_NETWORK is not set -# CONFIG_SECURITY_PATH is not set -# CONFIG_SECURITY_SMACK is not set -# CONFIG_SECURITY_TOMOYO is not set -# CONFIG_SECURITY_APPARMOR is not set -# CONFIG_SECURITY_YAMA is not set -# CONFIG_IMA is not set -# CONFIG_EVM is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_XOR_BLOCKS=y -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG=m -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_PCOMP2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -# CONFIG_CRYPTO_USER is not set -CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y -# CONFIG_CRYPTO_GF128MUL is not set -CONFIG_CRYPTO_NULL=m -# CONFIG_CRYPTO_PCRYPT is not set -CONFIG_CRYPTO_WORKQUEUE=y -# CONFIG_CRYPTO_CRYPTD is not set -CONFIG_CRYPTO_AUTHENC=y -CONFIG_CRYPTO_TEST=m - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -CONFIG_CRYPTO_SEQIV=m - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CTR=m -# CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=m -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_PCBC is not set -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# -CONFIG_CRYPTO_CMAC=m -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_XCBC=m -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -# CONFIG_CRYPTO_CRC32C_INTEL is not set -# CONFIG_CRYPTO_CRC32 is not set -# CONFIG_CRYPTO_CRC32_PCLMUL is not set -CONFIG_CRYPTO_CRCT10DIF=y -# CONFIG_CRYPTO_CRCT10DIF_PCLMUL is not set -# CONFIG_CRYPTO_GHASH is not set -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_MICHAEL_MIC=m -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -CONFIG_CRYPTO_SHA1=y -# CONFIG_CRYPTO_SHA1_SSSE3 is not set -# CONFIG_CRYPTO_SHA256_SSSE3 is not set -# CONFIG_CRYPTO_SHA512_SSSE3 is not set -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m -# CONFIG_CRYPTO_TGR192 is not set -CONFIG_CRYPTO_WP512=m -# CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL is not set - -# -# Ciphers -# -CONFIG_CRYPTO_AES=y -# CONFIG_CRYPTO_AES_X86_64 is not set -# CONFIG_CRYPTO_AES_NI_INTEL is not set -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_ARC4=m -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_BLOWFISH_COMMON=m -# CONFIG_CRYPTO_BLOWFISH_X86_64 is not set -CONFIG_CRYPTO_CAMELLIA=m -# CONFIG_CRYPTO_CAMELLIA_X86_64 is not set -# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64 is not set -# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX2_X86_64 is not set -CONFIG_CRYPTO_CAST_COMMON=m -CONFIG_CRYPTO_CAST5=m -# CONFIG_CRYPTO_CAST5_AVX_X86_64 is not set -CONFIG_CRYPTO_CAST6=m -# CONFIG_CRYPTO_CAST6_AVX_X86_64 is not set -CONFIG_CRYPTO_DES=y -# CONFIG_CRYPTO_FCRYPT is not set -CONFIG_CRYPTO_KHAZAD=m -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SALSA20_X86_64 is not set -# CONFIG_CRYPTO_SEED is not set -CONFIG_CRYPTO_SERPENT=m -# CONFIG_CRYPTO_SERPENT_SSE2_X86_64 is not set -# CONFIG_CRYPTO_SERPENT_AVX_X86_64 is not set -# CONFIG_CRYPTO_SERPENT_AVX2_X86_64 is not set -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_TWOFISH_COMMON=m -# CONFIG_CRYPTO_TWOFISH_X86_64 is not set -# CONFIG_CRYPTO_TWOFISH_X86_64_3WAY is not set -# CONFIG_CRYPTO_TWOFISH_AVX_X86_64 is not set - -# -# Compression -# -CONFIG_CRYPTO_DEFLATE=m -# CONFIG_CRYPTO_ZLIB is not set -# CONFIG_CRYPTO_LZO is not set -# CONFIG_CRYPTO_LZ4 is not set -# CONFIG_CRYPTO_LZ4HC is not set - -# -# Random Number Generation -# -CONFIG_CRYPTO_ANSI_CPRNG=m -# CONFIG_CRYPTO_USER_API_HASH is not set -# CONFIG_CRYPTO_USER_API_SKCIPHER is not set -CONFIG_CRYPTO_HW=y -# CONFIG_CRYPTO_DEV_PADLOCK is not set -# CONFIG_ASYMMETRIC_KEY_TYPE is not set -CONFIG_HAVE_KVM=y -CONFIG_VIRTUALIZATION=y -# CONFIG_KVM is not set -CONFIG_BINARY_PRINTF=y - -# -# Library routines -# -CONFIG_RAID6_PQ=y -CONFIG_BITREVERSE=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_NET_UTILS=y -CONFIG_GENERIC_FIND_FIRST_BIT=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_IOMAP=y -CONFIG_GENERIC_IO=y -CONFIG_PERCPU_RWSEM=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_CMPXCHG_LOCKREF=y -CONFIG_CRC_CCITT=m -CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=m -CONFIG_CRC32=y -# CONFIG_CRC32_SELFTEST is not set -CONFIG_CRC32_SLICEBY8=y -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SARWATE is not set -# CONFIG_CRC32_BIT is not set -CONFIG_CRC7=m -CONFIG_LIBCRC32C=y -# CONFIG_CRC8 is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -# CONFIG_XZ_DEC is not set -# CONFIG_XZ_DEC_BCJ is not set -CONFIG_DECOMPRESS_GZIP=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_TEXTSEARCH=y -CONFIG_TEXTSEARCH_KMP=m -CONFIG_TEXTSEARCH_BM=m -CONFIG_TEXTSEARCH_FSM=m -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_CHECK_SIGNATURE=y -CONFIG_CPU_RMAP=y -CONFIG_DQL=y -CONFIG_NLATTR=y -CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y -CONFIG_AVERAGE=y -# CONFIG_CORDIC is not set -# CONFIG_DDR is not set -CONFIG_OID_REGISTRY=y -CONFIG_UCS2_STRING=y -CONFIG_FONT_SUPPORT=y -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y |