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Diffstat (limited to 'meta-r1000/recipes-kernel/linux/linux-yocto-4.14.71/5047-drm-amd-display-Don-t-share-clk-source-between-DP-an.patch')
-rw-r--r--meta-r1000/recipes-kernel/linux/linux-yocto-4.14.71/5047-drm-amd-display-Don-t-share-clk-source-between-DP-an.patch130
1 files changed, 0 insertions, 130 deletions
diff --git a/meta-r1000/recipes-kernel/linux/linux-yocto-4.14.71/5047-drm-amd-display-Don-t-share-clk-source-between-DP-an.patch b/meta-r1000/recipes-kernel/linux/linux-yocto-4.14.71/5047-drm-amd-display-Don-t-share-clk-source-between-DP-an.patch
deleted file mode 100644
index 93c10a32..00000000
--- a/meta-r1000/recipes-kernel/linux/linux-yocto-4.14.71/5047-drm-amd-display-Don-t-share-clk-source-between-DP-an.patch
+++ /dev/null
@@ -1,130 +0,0 @@
-From eea8598ecdffe8af7497d2de0c247ade282400c6 Mon Sep 17 00:00:00 2001
-From: Mikita Lipski <mikita.lipski@amd.com>
-Date: Thu, 12 Jul 2018 16:44:05 -0400
-Subject: [PATCH 5047/5725] drm/amd/display: Don't share clk source between DP
- and HDMI
-
-[why]
-Prevent clock source sharing between HDMI and DP connectors.
-DP shouldn't be sharing its ref clock with phy clock,
-which caused an issue of older ASICS booting up with multiple
-diplays plugged in.
-
-[how]
-Add an extra check that would prevent HDMI and DP sharing clk.
-
-Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
-Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
-Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
-Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-Cc: stable@vger.kernel.org
----
- drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 22 +++++++++++++++++++++-
- drivers/gpu/drm/amd/display/dc/dc.h | 1 +
- .../drm/amd/display/dc/dce100/dce100_resource.c | 2 +-
- .../gpu/drm/amd/display/dc/dce80/dce80_resource.c | 3 +++
- 4 files changed, 26 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
-index f42a465..2a4a642 100644
---- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
-+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
-@@ -329,6 +329,9 @@ bool resource_are_streams_timing_synchronizable(
- != stream2->timing.pix_clk_khz)
- return false;
-
-+ if (stream1->clamping.c_depth != stream2->clamping.c_depth)
-+ return false;
-+
- if (stream1->phy_pix_clk != stream2->phy_pix_clk
- && (!dc_is_dp_signal(stream1->signal)
- || !dc_is_dp_signal(stream2->signal)))
-@@ -336,6 +339,20 @@ bool resource_are_streams_timing_synchronizable(
-
- return true;
- }
-+static bool is_dp_and_hdmi_sharable(
-+ struct dc_stream_state *stream1,
-+ struct dc_stream_state *stream2)
-+{
-+ if (stream1->ctx->dc->caps.disable_dp_clk_share)
-+ return false;
-+
-+ if (stream1->clamping.c_depth != COLOR_DEPTH_888 ||
-+ stream2->clamping.c_depth != COLOR_DEPTH_888)
-+ return false;
-+
-+ return true;
-+
-+}
-
- static bool is_sharable_clk_src(
- const struct pipe_ctx *pipe_with_clk_src,
-@@ -347,7 +364,10 @@ static bool is_sharable_clk_src(
- if (pipe_with_clk_src->stream->signal == SIGNAL_TYPE_VIRTUAL)
- return false;
-
-- if (dc_is_dp_signal(pipe_with_clk_src->stream->signal))
-+ if (dc_is_dp_signal(pipe_with_clk_src->stream->signal) ||
-+ (dc_is_dp_signal(pipe->stream->signal) &&
-+ !is_dp_and_hdmi_sharable(pipe_with_clk_src->stream,
-+ pipe->stream)))
- return false;
-
- if (dc_is_hdmi_signal(pipe_with_clk_src->stream->signal)
-diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
-index 6c7b57d..8dfbce9 100644
---- a/drivers/gpu/drm/amd/display/dc/dc.h
-+++ b/drivers/gpu/drm/amd/display/dc/dc.h
-@@ -78,6 +78,7 @@ struct dc_caps {
- bool dual_link_dvi;
- bool post_blend_color_processing;
- bool force_dp_tps4_for_cp2520;
-+ bool disable_dp_clk_share;
- };
-
- struct dc_dcc_surface_param {
-diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
-index fd2bdae..3f76e60 100644
---- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
-+++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
-@@ -919,7 +919,7 @@ static bool construct(
- dc->caps.i2c_speed_in_khz = 40;
- dc->caps.max_cursor_size = 128;
- dc->caps.dual_link_dvi = true;
--
-+ dc->caps.disable_dp_clk_share = true;
- for (i = 0; i < pool->base.pipe_count; i++) {
- pool->base.timing_generators[i] =
- dce100_timing_generator_create(
-diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
-index dc9f3e9..604c629 100644
---- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
-+++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
-@@ -946,6 +946,7 @@ static bool dce80_construct(
- }
-
- dc->caps.max_planes = pool->base.pipe_count;
-+ dc->caps.disable_dp_clk_share = true;
-
- if (!resource_construct(num_virtual_links, dc, &pool->base,
- &res_create_funcs))
-@@ -1131,6 +1132,7 @@ static bool dce81_construct(
- }
-
- dc->caps.max_planes = pool->base.pipe_count;
-+ dc->caps.disable_dp_clk_share = true;
-
- if (!resource_construct(num_virtual_links, dc, &pool->base,
- &res_create_funcs))
-@@ -1312,6 +1314,7 @@ static bool dce83_construct(
- }
-
- dc->caps.max_planes = pool->base.pipe_count;
-+ dc->caps.disable_dp_clk_share = true;
-
- if (!resource_construct(num_virtual_links, dc, &pool->base,
- &res_create_funcs))
---
-2.7.4
-