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Diffstat (limited to 'meta-r1000/recipes-kernel/linux/linux-yocto-4.14.71/4461-drm-amd-display-Update-HW-sequencer-initialization.patch')
-rw-r--r--meta-r1000/recipes-kernel/linux/linux-yocto-4.14.71/4461-drm-amd-display-Update-HW-sequencer-initialization.patch125
1 files changed, 0 insertions, 125 deletions
diff --git a/meta-r1000/recipes-kernel/linux/linux-yocto-4.14.71/4461-drm-amd-display-Update-HW-sequencer-initialization.patch b/meta-r1000/recipes-kernel/linux/linux-yocto-4.14.71/4461-drm-amd-display-Update-HW-sequencer-initialization.patch
deleted file mode 100644
index 240b49c2..00000000
--- a/meta-r1000/recipes-kernel/linux/linux-yocto-4.14.71/4461-drm-amd-display-Update-HW-sequencer-initialization.patch
+++ /dev/null
@@ -1,125 +0,0 @@
-From 05d312b066d366f999d81938bd4bc5f33b705263 Mon Sep 17 00:00:00 2001
-From: Eric Bernstein <eric.bernstein@amd.com>
-Date: Tue, 17 Apr 2018 16:50:28 -0400
-Subject: [PATCH 4461/5725] drm/amd/display: Update HW sequencer initialization
-
-Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
-Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
-Acked-by: Harry Wentland <harry.wentland@amd.com>
----
- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 6 +++---
- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h | 2 ++
- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c | 10 +++++-----
- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h | 10 ++++++++++
- 4 files changed, 20 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
-index ada55a9..858529e 100644
---- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
-+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
-@@ -864,7 +864,7 @@ static void dcn10_verify_allow_pstate_change_high(struct dc *dc)
- }
-
- /* trigger HW to start disconnect plane from stream on the next vsync */
--static void plane_atomic_disconnect(struct dc *dc, struct pipe_ctx *pipe_ctx)
-+void hwss1_plane_atomic_disconnect(struct dc *dc, struct pipe_ctx *pipe_ctx)
- {
- struct hubp *hubp = pipe_ctx->plane_res.hubp;
- int dpp_id = pipe_ctx->plane_res.dpp->inst;
-@@ -1047,7 +1047,7 @@ static void dcn10_init_hw(struct dc *dc)
- dc->res_pool->opps[i]->mpcc_disconnect_pending[pipe_ctx->plane_res.mpcc_inst] = true;
- pipe_ctx->stream_res.opp = dc->res_pool->opps[i];
-
-- plane_atomic_disconnect(dc, pipe_ctx);
-+ hwss1_plane_atomic_disconnect(dc, pipe_ctx);
- }
-
- for (i = 0; i < dc->res_pool->pipe_count; i++) {
-@@ -2282,7 +2282,7 @@ static void dcn10_apply_ctx_for_surface(
- old_pipe_ctx->plane_state &&
- old_pipe_ctx->stream_res.tg == tg) {
-
-- plane_atomic_disconnect(dc, old_pipe_ctx);
-+ hwss1_plane_atomic_disconnect(dc, old_pipe_ctx);
- removed_pipe[i] = true;
-
- DC_LOG_DC(
-diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h
-index 6c526b5..44f734b 100644
---- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h
-+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h
-@@ -37,4 +37,6 @@ extern void fill_display_configs(
-
- bool is_rgb_cspace(enum dc_color_space output_color_space);
-
-+void hwss1_plane_atomic_disconnect(struct dc *dc, struct pipe_ctx *pipe_ctx);
-+
- #endif /* __DC_HWSS_DCN10_H__ */
-diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
-index c734b7f..f2fbce0 100644
---- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
-+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
-@@ -360,7 +360,7 @@ void optc1_program_timing(
-
- }
-
--static void optc1_set_blank_data_double_buffer(struct timing_generator *optc, bool enable)
-+void optc1_set_blank_data_double_buffer(struct timing_generator *optc, bool enable)
- {
- struct optc *optc1 = DCN10TG_FROM_TG(optc);
-
-@@ -1257,20 +1257,20 @@ void optc1_read_otg_state(struct optc *optc1,
- OPTC_UNDERFLOW_OCCURRED_STATUS, &s->underflow_occurred_status);
- }
-
--static void optc1_clear_optc_underflow(struct timing_generator *optc)
-+void optc1_clear_optc_underflow(struct timing_generator *optc)
- {
- struct optc *optc1 = DCN10TG_FROM_TG(optc);
-
- REG_UPDATE(OPTC_INPUT_GLOBAL_CONTROL, OPTC_UNDERFLOW_CLEAR, 1);
- }
-
--static void optc1_tg_init(struct timing_generator *optc)
-+void optc1_tg_init(struct timing_generator *optc)
- {
- optc1_set_blank_data_double_buffer(optc, true);
- optc1_clear_optc_underflow(optc);
- }
-
--static bool optc1_is_tg_enabled(struct timing_generator *optc)
-+bool optc1_is_tg_enabled(struct timing_generator *optc)
- {
- struct optc *optc1 = DCN10TG_FROM_TG(optc);
- uint32_t otg_enabled = 0;
-@@ -1281,7 +1281,7 @@ static bool optc1_is_tg_enabled(struct timing_generator *optc)
-
- }
-
--static bool optc1_is_optc_underflow_occurred(struct timing_generator *optc)
-+bool optc1_is_optc_underflow_occurred(struct timing_generator *optc)
- {
- struct optc *optc1 = DCN10TG_FROM_TG(optc);
- uint32_t underflow_occurred = 0;
-diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h
-index 89e09e5..c62052f 100644
---- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h
-+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h
-@@ -497,4 +497,14 @@ void optc1_program_stereo(struct timing_generator *optc,
-
- bool optc1_is_stereo_left_eye(struct timing_generator *optc);
-
-+void optc1_clear_optc_underflow(struct timing_generator *optc);
-+
-+void optc1_tg_init(struct timing_generator *optc);
-+
-+bool optc1_is_tg_enabled(struct timing_generator *optc);
-+
-+bool optc1_is_optc_underflow_occurred(struct timing_generator *optc);
-+
-+void optc1_set_blank_data_double_buffer(struct timing_generator *optc, bool enable);
-+
- #endif /* __DC_TIMING_GENERATOR_DCN10_H__ */
---
-2.7.4
-