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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4730-drm-amd-powerplay-implement-the-get_enabled_mask-cal.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4730-drm-amd-powerplay-implement-the-get_enabled_mask-cal.patch86
1 files changed, 86 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4730-drm-amd-powerplay-implement-the-get_enabled_mask-cal.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4730-drm-amd-powerplay-implement-the-get_enabled_mask-cal.patch
new file mode 100644
index 00000000..6156d4fe
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4730-drm-amd-powerplay-implement-the-get_enabled_mask-cal.patch
@@ -0,0 +1,86 @@
+From 54649e5391dfd485199180fea93fbd8ba2165421 Mon Sep 17 00:00:00 2001
+From: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
+Date: Wed, 4 Dec 2019 16:16:30 +0800
+Subject: [PATCH 4730/4736] drm/amd/powerplay: implement the get_enabled_mask
+ callback for smu12
+
+implement sensor interface of feature mask for debugfs.
+
+Change-Id: Ia085aab4c82b978e1e8c8ddc3ca6278b9dec8005
+Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com>
+Reviewed-by: Huang Rui <ray.huang@amd.com>
+---
+ drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h | 3 ++
+ drivers/gpu/drm/amd/powerplay/renoir_ppt.c | 1 +
+ drivers/gpu/drm/amd/powerplay/smu_v12_0.c | 29 +++++++++++++++++++
+ 3 files changed, 33 insertions(+)
+
+diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h b/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h
+index ad68a5623033..3f1cd06e273c 100644
+--- a/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h
++++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h
+@@ -75,6 +75,9 @@ int smu_v12_0_fini_smc_tables(struct smu_context *smu);
+
+ int smu_v12_0_populate_smc_tables(struct smu_context *smu);
+
++int smu_v12_0_get_enabled_mask(struct smu_context *smu,
++ uint32_t *feature_mask, uint32_t num);
++
+ int smu_v12_0_get_current_clk_freq(struct smu_context *smu,
+ enum smu_clk_type clk_id,
+ uint32_t *value);
+diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
+index 861445f66e3e..5fdfbf5a1ed5 100644
+--- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
++++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
+@@ -878,6 +878,7 @@ static const struct pptable_funcs renoir_ppt_funcs = {
+ .init_smc_tables = smu_v12_0_init_smc_tables,
+ .fini_smc_tables = smu_v12_0_fini_smc_tables,
+ .populate_smc_tables = smu_v12_0_populate_smc_tables,
++ .get_enabled_mask = smu_v12_0_get_enabled_mask,
+ .get_current_clk_freq = smu_v12_0_get_current_clk_freq,
+ .get_dpm_ultimate_freq = smu_v12_0_get_dpm_ultimate_freq,
+ .mode2_reset = smu_v12_0_mode2_reset,
+diff --git a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c
+index 0e10cec5e9c3..2ac7f2f231b6 100644
+--- a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c
++++ b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c
+@@ -330,6 +330,35 @@ int smu_v12_0_populate_smc_tables(struct smu_context *smu)
+ return smu_update_table(smu, SMU_TABLE_DPMCLOCKS, 0, smu_table->clocks_table, false);
+ }
+
++int smu_v12_0_get_enabled_mask(struct smu_context *smu,
++ uint32_t *feature_mask, uint32_t num)
++{
++ uint32_t feature_mask_high = 0, feature_mask_low = 0;
++ int ret = 0;
++
++ if (!feature_mask || num < 2)
++ return -EINVAL;
++
++ ret = smu_send_smc_msg(smu, SMU_MSG_GetEnabledSmuFeaturesHigh);
++ if (ret)
++ return ret;
++ ret = smu_read_smc_arg(smu, &feature_mask_high);
++ if (ret)
++ return ret;
++
++ ret = smu_send_smc_msg(smu, SMU_MSG_GetEnabledSmuFeaturesLow);
++ if (ret)
++ return ret;
++ ret = smu_read_smc_arg(smu, &feature_mask_low);
++ if (ret)
++ return ret;
++
++ feature_mask[0] = feature_mask_low;
++ feature_mask[1] = feature_mask_high;
++
++ return ret;
++}
++
+ int smu_v12_0_get_current_clk_freq(struct smu_context *smu,
+ enum smu_clk_type clk_id,
+ uint32_t *value)
+--
+2.17.1
+