diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4712-drm-amd-display-Compare-clock-state-member-to-determ.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4712-drm-amd-display-Compare-clock-state-member-to-determ.patch | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4712-drm-amd-display-Compare-clock-state-member-to-determ.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4712-drm-amd-display-Compare-clock-state-member-to-determ.patch new file mode 100644 index 00000000..2530ccef --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4712-drm-amd-display-Compare-clock-state-member-to-determ.patch @@ -0,0 +1,58 @@ +From 2796f186fe4fe681f0ed1e70941a9c461a5896bb Mon Sep 17 00:00:00 2001 +From: Yongqiang Sun <yongqiang.sun@amd.com> +Date: Mon, 18 Nov 2019 13:45:50 -0500 +Subject: [PATCH 4712/4736] drm/amd/display: Compare clock state member to + determine optimization. + +[Why] +It seems always request passive flip on RN due to incorrect compare +clock state to determine optization. + +[How] +Instead of calling memcmp, compare clock state member to determine the +condition. + +Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> +Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +--- + .../amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 18 +++++++++++++++++- + 1 file changed, 17 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c +index 37230d3d94a0..de51ef12e33a 100644 +--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c ++++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c +@@ -471,12 +471,28 @@ static void rn_notify_wm_ranges(struct clk_mgr *clk_mgr_base) + + } + ++static bool rn_are_clock_states_equal(struct dc_clocks *a, ++ struct dc_clocks *b) ++{ ++ if (a->dispclk_khz != b->dispclk_khz) ++ return false; ++ else if (a->dppclk_khz != b->dppclk_khz) ++ return false; ++ else if (a->dcfclk_khz != b->dcfclk_khz) ++ return false; ++ else if (a->dcfclk_deep_sleep_khz != b->dcfclk_deep_sleep_khz) ++ return false; ++ ++ return true; ++} ++ ++ + static struct clk_mgr_funcs dcn21_funcs = { + .get_dp_ref_clk_frequency = dce12_get_dp_ref_freq_khz, + .update_clocks = rn_update_clocks, + .init_clocks = rn_init_clocks, + .enable_pme_wa = rn_enable_pme_wa, +- /* .dump_clk_registers = rn_dump_clk_registers, */ ++ .are_clock_states_equal = rn_are_clock_states_equal, + .notify_wm_ranges = rn_notify_wm_ranges + }; + +-- +2.17.1 + |