diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4678-drm-amd-display-Program-CW5-for-tracebuffer-for-dcn2.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4678-drm-amd-display-Program-CW5-for-tracebuffer-for-dcn2.patch | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4678-drm-amd-display-Program-CW5-for-tracebuffer-for-dcn2.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4678-drm-amd-display-Program-CW5-for-tracebuffer-for-dcn2.patch new file mode 100644 index 00000000..8ef818c9 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4678-drm-amd-display-Program-CW5-for-tracebuffer-for-dcn2.patch @@ -0,0 +1,44 @@ +From 707425f3dc83a06cc415181f5feaeb564a8c06ae Mon Sep 17 00:00:00 2001 +From: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> +Date: Thu, 7 Nov 2019 15:47:46 -0500 +Subject: [PATCH 4678/4736] drm/amd/display: Program CW5 for tracebuffer for + dcn20 + +[Why] +On dcn21 this is programmed for tracebuffer support but isn't being +programmed on dcn20. + +DMCUB execution hits an undefined address 65000000 on tracebuffer +access. + +[How] +Program CW5. + +Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> +Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +--- + drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c +index 6b7d54572aa3..302dd3d4b77d 100644 +--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c ++++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c +@@ -99,6 +99,13 @@ void dmub_dcn20_setup_windows(struct dmub_srv *dmub, + REG_SET_2(DMCUB_REGION4_TOP_ADDRESS, 0, DMCUB_REGION4_TOP_ADDRESS, + cw4->region.top - cw4->region.base - 1, DMCUB_REGION4_ENABLE, + 1); ++ ++ REG_WRITE(DMCUB_REGION3_CW5_OFFSET, cw5->offset.u.low_part); ++ REG_WRITE(DMCUB_REGION3_CW5_OFFSET_HIGH, cw5->offset.u.high_part); ++ REG_WRITE(DMCUB_REGION3_CW5_BASE_ADDRESS, cw5->region.base); ++ REG_SET_2(DMCUB_REGION3_CW5_TOP_ADDRESS, 0, ++ DMCUB_REGION3_CW5_TOP_ADDRESS, cw5->region.top, ++ DMCUB_REGION3_CW5_ENABLE, 1); + } + + void dmub_dcn20_setup_mailbox(struct dmub_srv *dmub, +-- +2.17.1 + |