diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4648-drm-amdgpu-add-check-before-enabling-disabling-broad.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4648-drm-amdgpu-add-check-before-enabling-disabling-broad.patch | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4648-drm-amdgpu-add-check-before-enabling-disabling-broad.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4648-drm-amdgpu-add-check-before-enabling-disabling-broad.patch new file mode 100644 index 00000000..b319af72 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4648-drm-amdgpu-add-check-before-enabling-disabling-broad.patch @@ -0,0 +1,69 @@ +From a5f7a1f05cf52af7e351d3abd10747a1d6f67f53 Mon Sep 17 00:00:00 2001 +From: Guchun Chen <guchun.chen@amd.com> +Date: Wed, 4 Dec 2019 15:51:16 +0800 +Subject: [PATCH 4648/4736] drm/amdgpu: add check before enabling/disabling + broadcast mode + +When security violation from new vbios happens, data fabric is +risky to stop working. So prevent the direct access to DF +mmFabricConfigAccessControl from the new vbios and onwards. + +Signed-off-by: Guchun Chen <guchun.chen@amd.com> +Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/df_v3_6.c | 38 ++++++++++++++++------------ + 1 file changed, 22 insertions(+), 16 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/df_v3_6.c b/drivers/gpu/drm/amd/amdgpu/df_v3_6.c +index 72bfefdbfa65..9395aa8b8fd0 100644 +--- a/drivers/gpu/drm/amd/amdgpu/df_v3_6.c ++++ b/drivers/gpu/drm/amd/amdgpu/df_v3_6.c +@@ -268,23 +268,29 @@ static void df_v3_6_update_medium_grain_clock_gating(struct amdgpu_device *adev, + { + u32 tmp; + +- /* Put DF on broadcast mode */ +- adev->df_funcs->enable_broadcast_mode(adev, true); +- +- if (enable && (adev->cg_flags & AMD_CG_SUPPORT_DF_MGCG)) { +- tmp = RREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater); +- tmp &= ~DF_PIE_AON0_DfGlobalClkGater__MGCGMode_MASK; +- tmp |= DF_V3_6_MGCG_ENABLE_15_CYCLE_DELAY; +- WREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater, tmp); +- } else { +- tmp = RREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater); +- tmp &= ~DF_PIE_AON0_DfGlobalClkGater__MGCGMode_MASK; +- tmp |= DF_V3_6_MGCG_DISABLE; +- WREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater, tmp); +- } ++ if (adev->cg_flags & AMD_CG_SUPPORT_DF_MGCG) { ++ /* Put DF on broadcast mode */ ++ adev->df_funcs->enable_broadcast_mode(adev, true); ++ ++ if (enable) { ++ tmp = RREG32_SOC15(DF, 0, ++ mmDF_PIE_AON0_DfGlobalClkGater); ++ tmp &= ~DF_PIE_AON0_DfGlobalClkGater__MGCGMode_MASK; ++ tmp |= DF_V3_6_MGCG_ENABLE_15_CYCLE_DELAY; ++ WREG32_SOC15(DF, 0, ++ mmDF_PIE_AON0_DfGlobalClkGater, tmp); ++ } else { ++ tmp = RREG32_SOC15(DF, 0, ++ mmDF_PIE_AON0_DfGlobalClkGater); ++ tmp &= ~DF_PIE_AON0_DfGlobalClkGater__MGCGMode_MASK; ++ tmp |= DF_V3_6_MGCG_DISABLE; ++ WREG32_SOC15(DF, 0, ++ mmDF_PIE_AON0_DfGlobalClkGater, tmp); ++ } + +- /* Exit broadcast mode */ +- adev->df_funcs->enable_broadcast_mode(adev, false); ++ /* Exit broadcast mode */ ++ adev->df_funcs->enable_broadcast_mode(adev, false); ++ } + } + + static void df_v3_6_get_clockgating_state(struct amdgpu_device *adev, +-- +2.17.1 + |