diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4591-drm-amdgpu-Resolved-offchip-EEPROM-I-O-issue.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4591-drm-amdgpu-Resolved-offchip-EEPROM-I-O-issue.patch | 104 |
1 files changed, 104 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4591-drm-amdgpu-Resolved-offchip-EEPROM-I-O-issue.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4591-drm-amdgpu-Resolved-offchip-EEPROM-I-O-issue.patch new file mode 100644 index 00000000..34ad9b8b --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4591-drm-amdgpu-Resolved-offchip-EEPROM-I-O-issue.patch @@ -0,0 +1,104 @@ +From 323de75bf9aaa107e8d18e3b9596a3ac2d30d578 Mon Sep 17 00:00:00 2001 +From: John Clements <john.clements@amd.com> +Date: Mon, 25 Nov 2019 18:24:17 +0800 +Subject: [PATCH 4591/4736] drm/amdgpu: Resolved offchip EEPROM I/O issue + +Updated target I2C address + +Change-Id: Ie86f7f3214177e3902b02a6b8201421375a89ae4 +Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> +Signed-off-by: John Clements <john.clements@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 17 ++++++++++++----- + drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h | 1 + + 2 files changed, 13 insertions(+), 5 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c +index 7de16c0c2f20..2a8e04895595 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c +@@ -27,7 +27,8 @@ + #include <linux/bits.h> + #include "smu_v11_0_i2c.h" + +-#define EEPROM_I2C_TARGET_ADDR 0xA0 ++#define EEPROM_I2C_TARGET_ADDR_ARCTURUS 0xA8 ++#define EEPROM_I2C_TARGET_ADDR_VEGA20 0xA0 + + /* + * The 2 macros bellow represent the actual size in bytes that +@@ -83,7 +84,7 @@ static int __update_table_header(struct amdgpu_ras_eeprom_control *control, + { + int ret = 0; + struct i2c_msg msg = { +- .addr = EEPROM_I2C_TARGET_ADDR, ++ .addr = 0, + .flags = 0, + .len = EEPROM_ADDRESS_SIZE + EEPROM_TABLE_HEADER_SIZE, + .buf = buff, +@@ -93,6 +94,8 @@ static int __update_table_header(struct amdgpu_ras_eeprom_control *control, + *(uint16_t *)buff = EEPROM_HDR_START; + __encode_table_header_to_buff(&control->tbl_hdr, buff + EEPROM_ADDRESS_SIZE); + ++ msg.addr = control->i2c_address; ++ + ret = i2c_transfer(&control->eeprom_accessor, &msg, 1); + if (ret < 1) + DRM_ERROR("Failed to write EEPROM table header, ret:%d", ret); +@@ -203,7 +206,7 @@ int amdgpu_ras_eeprom_init(struct amdgpu_ras_eeprom_control *control) + unsigned char buff[EEPROM_ADDRESS_SIZE + EEPROM_TABLE_HEADER_SIZE] = { 0 }; + struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr; + struct i2c_msg msg = { +- .addr = EEPROM_I2C_TARGET_ADDR, ++ .addr = 0, + .flags = I2C_M_RD, + .len = EEPROM_ADDRESS_SIZE + EEPROM_TABLE_HEADER_SIZE, + .buf = buff, +@@ -213,10 +216,12 @@ int amdgpu_ras_eeprom_init(struct amdgpu_ras_eeprom_control *control) + + switch (adev->asic_type) { + case CHIP_VEGA20: ++ control->i2c_address = EEPROM_I2C_TARGET_ADDR_VEGA20; + ret = smu_v11_0_i2c_eeprom_control_init(&control->eeprom_accessor); + break; + + case CHIP_ARCTURUS: ++ control->i2c_address = EEPROM_I2C_TARGET_ADDR_ARCTURUS; + ret = smu_i2c_eeprom_init(&adev->smu, &control->eeprom_accessor); + break; + +@@ -229,6 +234,8 @@ int amdgpu_ras_eeprom_init(struct amdgpu_ras_eeprom_control *control) + return ret; + } + ++ msg.addr = control->i2c_address; ++ + /* Read/Create table header from EEPROM address 0 */ + ret = i2c_transfer(&control->eeprom_accessor, &msg, 1); + if (ret < 1) { +@@ -408,8 +415,8 @@ int amdgpu_ras_eeprom_process_recods(struct amdgpu_ras_eeprom_control *control, + * Update bits 16,17 of EEPROM address in I2C address by setting them + * to bits 1,2 of Device address byte + */ +- msg->addr = EEPROM_I2C_TARGET_ADDR | +- ((control->next_addr & EEPROM_ADDR_MSB_MASK) >> 15); ++ msg->addr = control->i2c_address | ++ ((control->next_addr & EEPROM_ADDR_MSB_MASK) >> 15); + msg->flags = write ? 0 : I2C_M_RD; + msg->len = EEPROM_ADDRESS_SIZE + EEPROM_TABLE_RECORD_SIZE; + msg->buf = buff; +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h +index 622269957c1b..ca78f812d436 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h +@@ -50,6 +50,7 @@ struct amdgpu_ras_eeprom_control { + struct mutex tbl_mutex; + bool bus_locked; + uint32_t tbl_byte_sum; ++ uint16_t i2c_address; // 8-bit represented address + }; + + /* +-- +2.17.1 + |