diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3848-drm-amd-display-Add-detile-buffer-size-for-DCN20.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3848-drm-amd-display-Add-detile-buffer-size-for-DCN20.patch | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3848-drm-amd-display-Add-detile-buffer-size-for-DCN20.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3848-drm-amd-display-Add-detile-buffer-size-for-DCN20.patch new file mode 100644 index 00000000..87d0dbcd --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3848-drm-amd-display-Add-detile-buffer-size-for-DCN20.patch @@ -0,0 +1,67 @@ +From 0a5253fef99c1f70b26f82a8a9c96d5a667f1459 Mon Sep 17 00:00:00 2001 +From: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> +Date: Tue, 3 Sep 2019 14:10:28 -0400 +Subject: [PATCH 3848/4256] drm/amd/display: Add detile buffer size for DCN20 + +Detile buffer size affects dcc caps and therefore needs to be +corrected for each ip. + +Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> +Reviewed-by: Chris Park <Chris.Park@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c | 7 ++++--- + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h | 1 + + 2 files changed, 5 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c +index e0a6e30ac3e1..8b8438566101 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c +@@ -186,14 +186,13 @@ static void hubbub2_get_blk256_size(unsigned int *blk256_width, unsigned int *bl + } + + static void hubbub2_det_request_size( ++ unsigned int detile_buf_size, + unsigned int height, + unsigned int width, + unsigned int bpe, + bool *req128_horz_wc, + bool *req128_vert_wc) + { +- unsigned int detile_buf_size = 164 * 1024; /* 164KB for DCN1.0 */ +- + unsigned int blk256_height = 0; + unsigned int blk256_width = 0; + unsigned int swath_bytes_horz_wc, swath_bytes_vert_wc; +@@ -236,7 +235,8 @@ bool hubbub2_get_dcc_compression_cap(struct hubbub *hubbub, + &segment_order_horz, &segment_order_vert)) + return false; + +- hubbub2_det_request_size(input->surface_size.height, input->surface_size.width, ++ hubbub2_det_request_size(TO_DCN20_HUBBUB(hubbub)->detile_buf_size, ++ input->surface_size.height, input->surface_size.width, + bpe, &req128_horz_wc, &req128_vert_wc); + + if (!req128_horz_wc && !req128_vert_wc) { +@@ -619,4 +619,5 @@ void hubbub2_construct(struct dcn20_hubbub *hubbub, + hubbub->masks = hubbub_mask; + + hubbub->debug_test_index_pstate = 0xB; ++ hubbub->detile_buf_size = 164 * 1024; /* 164KB for DCN2.0 */ + } +diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h +index 626117d3b4e9..501532dd523a 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h ++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h +@@ -81,6 +81,7 @@ struct dcn20_hubbub { + unsigned int debug_test_index_pstate; + struct dcn_watermark_set watermarks; + struct dcn20_vmid vmid[16]; ++ unsigned int detile_buf_size; + }; + + void hubbub2_construct(struct dcn20_hubbub *hubbub, +-- +2.17.1 + |