diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3180-drm-amd-powerplay-correct-Navi10-VCN-powergate-contr.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3180-drm-amd-powerplay-correct-Navi10-VCN-powergate-contr.patch | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3180-drm-amd-powerplay-correct-Navi10-VCN-powergate-contr.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3180-drm-amd-powerplay-correct-Navi10-VCN-powergate-contr.patch new file mode 100644 index 00000000..62f4c0d6 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3180-drm-amd-powerplay-correct-Navi10-VCN-powergate-contr.patch @@ -0,0 +1,65 @@ +From 1f4ef5c2e1441732f0921c62948da10ffd5673e5 Mon Sep 17 00:00:00 2001 +From: Evan Quan <evan.quan@amd.com> +Date: Mon, 22 Jul 2019 10:27:21 +0800 +Subject: [PATCH 3180/4256] drm/amd/powerplay: correct Navi10 VCN powergate + control (v2) + +No VCN DPM bit check as that's different from VCN PG. Also +no extra check for possible double enablement/disablement +as that's already done by VCN. + +v2: check return value of smu_feature_set_enabled + +Signed-off-by: Evan Quan <evan.quan@amd.com> +Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 28 ++++++++-------------- + 1 file changed, 10 insertions(+), 18 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +index 7706c8e0cfbe..f04a54e8e164 100644 +--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c ++++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +@@ -591,28 +591,20 @@ static int navi10_set_default_dpm_table(struct smu_context *smu) + static int navi10_dpm_set_uvd_enable(struct smu_context *smu, bool enable) + { + int ret = 0; +- struct smu_power_context *smu_power = &smu->smu_power; +- struct smu_power_gate *power_gate = &smu_power->power_gate; + +- if (enable && power_gate->uvd_gated) { +- if (smu_feature_is_enabled(smu, SMU_FEATURE_DPM_UVD_BIT)) { +- ret = smu_send_smc_msg_with_param(smu, SMU_MSG_PowerUpVcn, 1); +- if (ret) +- return ret; +- } +- power_gate->uvd_gated = false; ++ if (enable) { ++ ret = smu_send_smc_msg_with_param(smu, SMU_MSG_PowerUpVcn, 1); ++ if (ret) ++ return ret; + } else { +- if (!enable && !power_gate->uvd_gated) { +- if (smu_feature_is_enabled(smu, SMU_FEATURE_DPM_UVD_BIT)) { +- ret = smu_send_smc_msg(smu, SMU_MSG_PowerDownVcn); +- if (ret) +- return ret; +- } +- power_gate->uvd_gated = true; +- } ++ ret = smu_send_smc_msg(smu, SMU_MSG_PowerDownVcn); ++ if (ret) ++ return ret; + } + +- return 0; ++ ret = smu_feature_set_enabled(smu, SMU_FEATURE_VCN_PG_BIT, enable); ++ ++ return ret; + } + + static int navi10_get_current_clk_freq_by_table(struct smu_context *smu, +-- +2.17.1 + |