diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/1931-drm-amdgpu-ras-support-suspend-resume.patch')
-rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/1931-drm-amdgpu-ras-support-suspend-resume.patch | 103 |
1 files changed, 103 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/1931-drm-amdgpu-ras-support-suspend-resume.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/1931-drm-amdgpu-ras-support-suspend-resume.patch new file mode 100644 index 00000000..bd67b49f --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/1931-drm-amdgpu-ras-support-suspend-resume.patch @@ -0,0 +1,103 @@ +From 5962b5c54350fa93930a64785aab6cdcc10de684 Mon Sep 17 00:00:00 2001 +From: xinhui pan <xinhui.pan@amd.com> +Date: Thu, 9 May 2019 08:26:27 +0800 +Subject: [PATCH 1931/2940] drm/amdgpu: ras support suspend/resume + +add ras suspend function. rename ras_post_init to amdgpu_ras_resume. + +Signed-off-by: xinhui pan <xinhui.pan@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-by: James Zhu <James.Zhu@amd.com> +Tested-by: James Zhu <James.Zhu@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++-- + drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 20 +++++++++++++++----- + drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 4 +++- + 3 files changed, 20 insertions(+), 8 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +index 17b245c5c546..8f170846f0dd 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +@@ -2792,7 +2792,7 @@ int amdgpu_device_init(struct amdgpu_device *adev, + } + + /* must succeed. */ +- amdgpu_ras_post_init(adev); ++ amdgpu_ras_resume(adev); + + r = device_create_file(adev->dev, &dev_attr_pcie_replay_count); + if (r) { +@@ -3544,7 +3544,7 @@ static int amdgpu_do_asic_reset(struct amdgpu_hive_info *hive, + goto out; + + /* must succeed. */ +- amdgpu_ras_post_init(tmp_adev); ++ amdgpu_ras_resume(tmp_adev); + + /* Update PSP FW topology after reset */ + if (hive && tmp_adev->gmc.xgmi.num_physical_nodes > 1) +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +index 49c71cfc7fc6..da1dc40b9b14 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +@@ -1594,12 +1594,9 @@ int amdgpu_ras_init(struct amdgpu_device *adev) + } + + /* do some init work after IP late init as dependence. +- * TODO +- * gpu reset will re-enable ras, need fint out one way to run it again. +- * for now, if a gpu reset happened, unless IP enable its ras, the ras state +- * will be showed as disabled. ++ * and it runs in resume/gpu reset/booting up cases. + */ +-void amdgpu_ras_post_init(struct amdgpu_device *adev) ++void amdgpu_ras_resume(struct amdgpu_device *adev) + { + struct amdgpu_ras *con = amdgpu_ras_get_context(adev); + struct ras_manager *obj, *tmp; +@@ -1642,6 +1639,19 @@ void amdgpu_ras_post_init(struct amdgpu_device *adev) + } + } + ++void amdgpu_ras_suspend(struct amdgpu_device *adev) ++{ ++ struct amdgpu_ras *con = amdgpu_ras_get_context(adev); ++ ++ if (!con) ++ return; ++ ++ amdgpu_ras_disable_all_features(adev, 0); ++ /* Make sure all ras objects are disabled. */ ++ if (con->features) ++ amdgpu_ras_disable_all_features(adev, 1); ++} ++ + /* do some fini work before IP fini as dependence */ + int amdgpu_ras_pre_fini(struct amdgpu_device *adev) + { +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h +index 59994ee00855..c6b34fbd695f 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h +@@ -179,6 +179,9 @@ static inline int amdgpu_ras_is_supported(struct amdgpu_device *adev, + int amdgpu_ras_request_reset_on_boot(struct amdgpu_device *adev, + unsigned int block); + ++void amdgpu_ras_resume(struct amdgpu_device *adev); ++void amdgpu_ras_suspend(struct amdgpu_device *adev); ++ + int amdgpu_ras_query_error_count(struct amdgpu_device *adev, + bool is_ce); + +@@ -256,7 +259,6 @@ amdgpu_ras_error_to_ta(enum amdgpu_ras_error_type error) { + + /* called in ip_init and ip_fini */ + int amdgpu_ras_init(struct amdgpu_device *adev); +-void amdgpu_ras_post_init(struct amdgpu_device *adev); + int amdgpu_ras_fini(struct amdgpu_device *adev); + int amdgpu_ras_pre_fini(struct amdgpu_device *adev); + +-- +2.17.1 + |