diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4756-drm-amd-display-Adding-dm-pp-clocks-getting-by-volta.patch')
-rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/4756-drm-amd-display-Adding-dm-pp-clocks-getting-by-volta.patch | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4756-drm-amd-display-Adding-dm-pp-clocks-getting-by-volta.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4756-drm-amd-display-Adding-dm-pp-clocks-getting-by-volta.patch new file mode 100644 index 00000000..62fd9db5 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4756-drm-amd-display-Adding-dm-pp-clocks-getting-by-volta.patch @@ -0,0 +1,80 @@ +From 2d581ebb87e5ee7742b08c00ca284dfd53c218f9 Mon Sep 17 00:00:00 2001 +From: Mikita Lipski <mikita.lipski@amd.com> +Date: Mon, 9 Apr 2018 09:48:15 -0400 +Subject: [PATCH 4756/5725] drm/amd/display: Adding dm-pp clocks getting by + voltage + +Function to get clock levels by voltage from PPLib + +Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> +Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> +Acked-by: Harry Wentland <harry.wentland@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + .../drm/amd/display/amdgpu_dm/amdgpu_dm_services.c | 43 +++++++++++++++++++++- + 1 file changed, 41 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c +index 9f46421..9e923a4 100644 +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c +@@ -226,6 +226,34 @@ static void pp_to_dc_clock_levels( + } + } + ++static void pp_to_dc_clock_levels_with_voltage( ++ const struct pp_clock_levels_with_voltage *pp_clks, ++ struct dm_pp_clock_levels_with_voltage *clk_level_info, ++ enum dm_pp_clock_type dc_clk_type) ++{ ++ uint32_t i; ++ ++ if (pp_clks->num_levels > DM_PP_MAX_CLOCK_LEVELS) { ++ DRM_INFO("DM_PPLIB: Warning: %s clock: number of levels %d exceeds maximum of %d!\n", ++ DC_DECODE_PP_CLOCK_TYPE(dc_clk_type), ++ pp_clks->num_levels, ++ DM_PP_MAX_CLOCK_LEVELS); ++ ++ clk_level_info->num_levels = DM_PP_MAX_CLOCK_LEVELS; ++ } else ++ clk_level_info->num_levels = pp_clks->num_levels; ++ ++ DRM_INFO("DM_PPLIB: values for %s clock\n", ++ DC_DECODE_PP_CLOCK_TYPE(dc_clk_type)); ++ ++ for (i = 0; i < clk_level_info->num_levels; i++) { ++ DRM_INFO("DM_PPLIB:\t %d\n", pp_clks->data[i].clocks_in_khz); ++ clk_level_info->data[i].clocks_in_khz = pp_clks->data[i].clocks_in_khz; ++ clk_level_info->data[i].voltage_in_mv = pp_clks->data[i].voltage_in_mv; ++ } ++} ++ ++ + bool dm_pp_get_clock_levels_by_type( + const struct dc_context *ctx, + enum dm_pp_clock_type clk_type, +@@ -312,8 +340,19 @@ bool dm_pp_get_clock_levels_by_type_with_voltage( + enum dm_pp_clock_type clk_type, + struct dm_pp_clock_levels_with_voltage *clk_level_info) + { +- /* TODO: to be implemented */ +- return false; ++ struct amdgpu_device *adev = ctx->driver_context; ++ void *pp_handle = adev->powerplay.pp_handle; ++ struct pp_clock_levels_with_voltage pp_clk_info = {0}; ++ const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; ++ ++ if (pp_funcs->get_clock_by_type_with_voltage(pp_handle, ++ dc_to_pp_clock_type(clk_type), ++ &pp_clk_info)) ++ return false; ++ ++ pp_to_dc_clock_levels_with_voltage(&pp_clk_info, clk_level_info, clk_type); ++ ++ return true; + } + + bool dm_pp_notify_wm_clock_changes( +-- +2.7.4 + |