diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0588-drm-amdgpu-atom-add-support-for-new-div32-opcodes-v3.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/0588-drm-amdgpu-atom-add-support-for-new-div32-opcodes-v3.patch | 80 |
1 files changed, 0 insertions, 80 deletions
diff --git a/common/recipes-kernel/linux/files/0588-drm-amdgpu-atom-add-support-for-new-div32-opcodes-v3.patch b/common/recipes-kernel/linux/files/0588-drm-amdgpu-atom-add-support-for-new-div32-opcodes-v3.patch deleted file mode 100644 index b5e402c5..00000000 --- a/common/recipes-kernel/linux/files/0588-drm-amdgpu-atom-add-support-for-new-div32-opcodes-v3.patch +++ /dev/null @@ -1,80 +0,0 @@ -From c2fe16aa36d2bc976f7e79600d3a118fafdcc8dc Mon Sep 17 00:00:00 2001 -From: Alex Deucher <alexander.deucher@amd.com> -Date: Fri, 2 Oct 2015 14:26:41 -0400 -Subject: [PATCH 0588/1565] drm/amdgpu/atom: add support for new div32 opcodes - (v3) -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Better precision than the regular div opcode. - -v2: drop 64 bit divide -v3: fix op handling. This actually is a 64 bit divide. - -Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/amd/amdgpu/atom.c | 25 ++++++++++++++++++++++++- - drivers/gpu/drm/amd/amdgpu/atom.h | 2 +- - 2 files changed, 25 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/amd/amdgpu/atom.c b/drivers/gpu/drm/amd/amdgpu/atom.c -index 474357d..1b50e6c 100644 ---- a/drivers/gpu/drm/amd/amdgpu/atom.c -+++ b/drivers/gpu/drm/amd/amdgpu/atom.c -@@ -685,6 +685,27 @@ static void atom_op_div(atom_exec_context *ctx, int *ptr, int arg) - } - } - -+static void atom_op_div32(atom_exec_context *ctx, int *ptr, int arg) -+{ -+ uint64_t val64; -+ uint8_t attr = U8((*ptr)++); -+ uint32_t dst, src; -+ SDEBUG(" src1: "); -+ dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1); -+ SDEBUG(" src2: "); -+ src = atom_get_src(ctx, attr, ptr); -+ if (src != 0) { -+ val64 = dst; -+ val64 |= ((uint64_t)ctx->ctx->divmul[1]) << 32; -+ do_div(val64, src); -+ ctx->ctx->divmul[0] = lower_32_bits(val64); -+ ctx->ctx->divmul[1] = upper_32_bits(val64); -+ } else { -+ ctx->ctx->divmul[0] = 0; -+ ctx->ctx->divmul[1] = 0; -+ } -+} -+ - static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg) - { - /* functionally, a nop */ -@@ -1176,7 +1197,9 @@ static struct { - atom_op_debug, 0}, { - atom_op_processds, 0}, { - atom_op_mul32, ATOM_ARG_PS}, { -- atom_op_mul32, ATOM_ARG_WS}, -+ atom_op_mul32, ATOM_ARG_WS}, { -+ atom_op_div32, ATOM_ARG_PS}, { -+ atom_op_div32, ATOM_ARG_WS}, - }; - - static int amdgpu_atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params) -diff --git a/drivers/gpu/drm/amd/amdgpu/atom.h b/drivers/gpu/drm/amd/amdgpu/atom.h -index a940eb3..fece8f4 100644 ---- a/drivers/gpu/drm/amd/amdgpu/atom.h -+++ b/drivers/gpu/drm/amd/amdgpu/atom.h -@@ -60,7 +60,7 @@ - #define ATOM_CT_PS_MASK 0x7F - #define ATOM_CT_CODE_PTR 6 - --#define ATOM_OP_CNT 125 -+#define ATOM_OP_CNT 127 - #define ATOM_OP_EOT 91 - - #define ATOM_CASE_MAGIC 0x63 --- -1.9.1 - |