1 files changed, 0 insertions, 73 deletions
diff --git a/common/recipes-kernel/linux/files/0301-drm-amdgpu-set-proper-index-data-pair-for-smc-regs-o.patch b/common/recipes-kernel/linux/files/0301-drm-amdgpu-set-proper-index-data-pair-for-smc-regs-o.patch
deleted file mode 100644
index ca5a901a..00000000
--- a/common/recipes-kernel/linux/files/0301-drm-amdgpu-set-proper-index-data-pair-for-smc-regs-o.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From 7b92cdbfe2a8c73fb7516fb8fa20e1efe5b91939 Mon Sep 17 00:00:00 2001
-From: Alex Deucher <alexander.deucher@amd.com>
-Date: Fri, 10 Jul 2015 16:21:10 -0400
-Subject: [PATCH 0301/1050] drm/amdgpu: set proper index/data pair for smc regs
- on CZ (v2)
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-v2: squash in later fix
-
-Reviewed-by: Christian König <christian.koenig@amd.com>
-Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
----
- drivers/gpu/drm/amd/amdgpu/vi.c | 35 +++++++++++++++++++++++++++++++++--
- 1 file changed, 33 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
-index fa5a444..68552da 100644
---- a/drivers/gpu/drm/amd/amdgpu/vi.c
-+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
-@@ -122,6 +122,32 @@ static void vi_smc_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
- 	spin_unlock_irqrestore(&adev->smc_idx_lock, flags);
- }
- 
-+/* smu_8_0_d.h */
-+#define mmMP0PUB_IND_INDEX                                                      0x180
-+#define mmMP0PUB_IND_DATA                                                       0x181
-+
-+static u32 cz_smc_rreg(struct amdgpu_device *adev, u32 reg)
-+{
-+	unsigned long flags;
-+	u32 r;
-+
-+	spin_lock_irqsave(&adev->smc_idx_lock, flags);
-+	WREG32(mmMP0PUB_IND_INDEX, (reg));
-+	r = RREG32(mmMP0PUB_IND_DATA);
-+	spin_unlock_irqrestore(&adev->smc_idx_lock, flags);
-+	return r;
-+}
-+
-+static void cz_smc_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
-+{
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&adev->smc_idx_lock, flags);
-+	WREG32(mmMP0PUB_IND_INDEX, (reg));
-+	WREG32(mmMP0PUB_IND_DATA, (v));
-+	spin_unlock_irqrestore(&adev->smc_idx_lock, flags);
-+}
-+
- static u32 vi_uvd_ctx_rreg(struct amdgpu_device *adev, u32 reg)
- {
- 	unsigned long flags;
-@@ -1222,8 +1248,13 @@ static int vi_common_early_init(void *handle)
- 	bool smc_enabled = false;
- 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- 
--	adev->smc_rreg = &vi_smc_rreg;
--	adev->smc_wreg = &vi_smc_wreg;
-+	if (adev->flags & AMDGPU_IS_APU) {
-+		adev->smc_rreg = &cz_smc_rreg;
-+		adev->smc_wreg = &cz_smc_wreg;
-+	} else {
-+		adev->smc_rreg = &vi_smc_rreg;
-+		adev->smc_wreg = &vi_smc_wreg;
-+	}
- 	adev->pcie_rreg = &vi_pcie_rreg;
- 	adev->pcie_wreg = &vi_pcie_wreg;
- 	adev->uvd_ctx_rreg = &vi_uvd_ctx_rreg;
--- 
-1.9.1
-