blob: d094fdd9d9e0aceb7fd271bb59a68d4737807eab (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
|
Device-Tree bindings for Xilinx ZynqMP DisplayPort Codec
The codec driver handles the audio clock and format management.
Required properties:
- compatible: Should be "xlnx,dp-snd-codec".
- clocks: The phandle for the audio clock. The audio clock should be
configured to the correct audio clock rate, which should be one of
(44100 * 512) or (48000 * 512).
- clock-names: The identification string should be "aud_clk".
Example:
xlnx_dp_snd_codec0: dp_snd_codec0 {
compatible = "xlnx,dp-snd-codec";
clocks = <&dp_aud_clk>;
clock-names = "aud_clk";
};
|
