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path: root/drivers/usb/dwc2/core.h
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2014-11-21usb: dwc2: gadget: rework suspend/resume code to correctly restore gadget stateMarek Szyprowski
Suspend/resume code assumed that the gadget was always started and enabled to connect to usb bus. This means that the actual state of the gadget (started/stopped or connected/disconnected) was not correctly preserved on suspend/resume cycle. This patch fixes this issue. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-21usb: dwc2: gadget: add mutex to serialize init/deinit callsMarek Szyprowski
This patch adds mutex, which protects initialization and deinitialization procedures against suspend/resume methods. This mutex will be needed by the updated suspend/resume calls, which tracks gadget state. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-21usb: dwc2: gadget: rework disconnect event handlingMarek Szyprowski
This patch adds a call to s3c_hsotg_disconnect() from 'end session' interrupt (GOTGINT_SES_END_DET) to correctly notify gadget subsystem about unplugged usb cable. DISCONNINT interrupt cannot be used for this purpose, because it is asserted only in host mode. To avoid reporting disconnect event more than once, a disconnect call has been moved from USB_REQ_SET_ADDRESS handling function to SESSREQINT interrupt. This way driver ensures that disconnect event is reported either when usb cable is unplugged or every time the host starts a new session. To handle devices which has been synthesized without SRP support, connected state is set in ENUMDONE interrupt. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-14usb: dwc2: Initialize the USB core for peripheral modeDinh Nguyen
Initialize the USB driver to peripheral mode when a B-Device connector is attached. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-14usb: dwc2: Move gadget probe function into platform codeDinh Nguyen
This patch will aggregate the probing of gadget/hcd driver into platform.c. The gadget probe funtion is converted into gadget_init that is now only responsible for gadget only initialization. All the gadget resources are now handled by platform.c Since the host workqueue will not get initialized if the driver is configured for peripheral mode only. Thus we need to check for wq_otg before calling queue_work(). Also, we move spin_lock_init to common location for both host and gadget that is either in platform.c or pci.c. We also move suspend/resume code to common platform code. Lastly, move the "samsung,s3c6400-hsotg" binding into dwc2_of_match_table. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-14usb: dwc2: Update the gadget driver to use common dwc2_hsotg structureDinh Nguyen
Adds the gadget data structure and appropriate data structure pointers to the common dwc2_hsotg data structure. To keep the driver data dereference code looking clean, the gadget variable declares are only available for peripheral and dual-role mode. This is needed so that the dwc2_hsotg data structure can be used by the hcd and gadget drivers. Updates gadget.c to use the dwc2_hsotg data structure and gadget pointers that have been moved into the common dwc2_hsotg structure. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-10-23usb: dwc2: Bits in bitfield should add up to 32Charles Manning
The unioned u32 is used for clearing etc. Having the number of bitfield bits add up to more than 32 is broken, even if benign. Acked-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Charles Manning <cdhmanning@gmail.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-09-19usb: dwc2/gadget: assign TX FIFO dynamicallyRobert Baldyga
Because we have not enough memory to have each TX FIFO of size at least 3072 bytes (the maximum single packet size with 3 transactions per microframe), we create four FIFOs of lenght 1024, and four of length 3072 bytes, and assing them to endpoints dynamically according to maxpacket size value of given endpoint. Up to now there were initialized 16 TX FIFOs, but we use only 8 IN endpoints, so we can split available memory for 8 FIFOs to have more memory for each one. It needed to do some small modifications in few places in code, because there was assumption that TX FIFO numbers assigned to endpoints are the same as the endpoint numbers, which is not true since we have dynamic FIFO assigning. Signed-off-by: Robert Baldyga <r.baldyga@samsung.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-09-19usb: dwc2/gadget: ensure that all fifos have correct memory buffersMarek Szyprowski
Print warning if FIFOs are configured in such a way that they don't fit into the SPRAM available on the s3c hsotg module. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Robert Baldyga <r.baldyga@samsung.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-09-08usb: dwc2: add 'mode' which based on Kconfig select or dts settingKever Yang
According to the "dr_mode", the otg controller can work as device role and host role. Some boards always want to use host mode and some other boards want to use gadget mode. We use the dts setting to set dwc2's mode, rather than fixing it to whatever hardware says. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Paul Zimmerman <paulz@synopsys.com> Tested-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-24usb: dwc2: move s3c-hsotg data structuresDinh Nguyen
This patch moves the data structures that are in the s3c-hsotg source into core.h. This is a necessary step towards unifying the s3c-hsotg and dwc2 into a single DRD. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> [ jh,rb,fb - For gadget part only: ] Tested-by: Jingoo Han <jg1.han@samsung.com> Tested-by: Robert Baldyga <r.baldyga@samsung.com> Acked-by: Felipe Balbi <balbi@ti.com> [ pz - Tested host part only. ] Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-01-13Move DWC2 driver out of stagingPaul Zimmerman
The DWC2 driver should now be in good enough shape to move out of staging. I have stress tested it overnight on RPI running mass storage and Ethernet transfers in parallel, and for several days on our proprietary PCI-based platform. Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>