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2020-05-02Merge branch 'v5.4/standard/preempt-rt/base' into ↵Bruce Ashfield
v5.4/standard/preempt-rt/cn96xx
2020-05-02Merge branch 'v5.4/standard/base' into v5.4/standard/preempt-rt/cn96xxBruce Ashfield
2020-05-02drivers: soc: xilinx: fix firmware driver Kconfig dependencyArnd Bergmann
commit d0384eedcde21276ac51f57c641f875605024b32 upstream. The firmware driver is optional, but the power driver depends on it, which needs to be reflected in Kconfig to avoid link errors: aarch64-linux-ld: drivers/soc/xilinx/zynqmp_power.o: in function `zynqmp_pm_isr': zynqmp_power.c:(.text+0x284): undefined reference to `zynqmp_pm_invoke_fn' The firmware driver can probably be allowed for compile-testing as well, so it's best to drop the dependency on the ZYNQ platform here and allow building as long as the firmware code is built-in. Fixes: ab272643d723 ("drivers: soc: xilinx: Add ZynqMP PM driver") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20200408155224.2070880-1-arnd@arndb.de Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-04-23soc: imx: gpc: fix power up sequencingLucas Stach
[ Upstream commit e0ea2d11f8a08ba7066ff897e16c5217215d1e68 ] Currently we wait only until the PGC inverts the isolation setting before disabling the peripheral clocks. This doesn't ensure that the reset is properly propagated through the peripheral devices in the power domain. Wait until the PGC signals that the power up request is done and wait a bit for resets to propagate before disabling the clocks. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-04-22Merge branch 'v5.4/standard/preempt-rt/base' into ↵Bruce Ashfield
v5.4/standard/preempt-rt/cn96xx
2020-04-17soc: fsl: dpio: register dpio irq handlers after dpio createGrigore Popescu
[ Upstream commit fe8fe7723a3a824790bda681b40efd767e2251a7 ] The dpio irqs must be registered when you can actually receive interrupts, ie when the dpios are created. Kernel goes through NULL pointer dereference errors followed by kernel panic [1] because the dpio irqs are enabled before the dpio is created. [1] Unable to handle kernel NULL pointer dereference at virtual address 0040 fsl_mc_dpio dpio.14: probed fsl_mc_dpio dpio.13: Adding to iommu group 11 ISV = 0, ISS = 0x00000004 Unable to handle kernel NULL pointer dereference at virtual address 0040 Mem abort info: ESR = 0x96000004 EC = 0x25: DABT (current EL), IL = 32 bits SET = 0, FnV = 0 EA = 0, S1PTW = 0 Data abort info: ISV = 0, ISS = 0x00000004 CM = 0, WnR = 0 [0000000000000040] user address but active_mm is swapper Internal error: Oops: 96000004 [#1] PREEMPT SMP Modules linked in: CPU: 2 PID: 151 Comm: kworker/2:1 Not tainted 5.6.0-rc4-next-20200304 #1 Hardware name: NXP Layerscape LX2160ARDB (DT) Workqueue: events deferred_probe_work_func pstate: 00000085 (nzcv daIf -PAN -UAO) pc : dpaa2_io_irq+0x18/0xe0 lr : dpio_irq_handler+0x1c/0x28 sp : ffff800010013e20 x29: ffff800010013e20 x28: ffff0026d9b4c140 x27: ffffa1d38a142018 x26: ffff0026d2953400 x25: ffffa1d38a142018 x24: ffffa1d38a7ba1d8 x23: ffff800010013f24 x22: 0000000000000000 x21: 0000000000000072 x20: ffff0026d2953400 x19: ffff0026d2a68b80 x18: 0000000000000001 x17: 000000002fb37f3d x16: 0000000035eafadd x15: ffff0026d9b4c5b8 x14: ffffffffffffffff x13: ff00000000000000 x12: 0000000000000038 x11: 0101010101010101 x10: 0000000000000040 x9 : ffffa1d388db11e4 x8 : ffffa1d38a7e40f0 x7 : ffff0026da414f38 x6 : 0000000000000000 x5 : ffff0026da414d80 x4 : ffff5e5353d0c000 x3 : ffff800010013f60 x2 : ffffa1d388db11c8 x1 : ffff0026d2a67c00 x0 : 0000000000000000 Call trace: dpaa2_io_irq+0x18/0xe0 dpio_irq_handler+0x1c/0x28 __handle_irq_event_percpu+0x78/0x2c0 handle_irq_event_percpu+0x38/0x90 handle_irq_event+0x4c/0xd0 handle_fasteoi_irq+0xbc/0x168 generic_handle_irq+0x2c/0x40 __handle_domain_irq+0x68/0xc0 gic_handle_irq+0x64/0x150 el1_irq+0xb8/0x180 _raw_spin_unlock_irqrestore+0x14/0x48 irq_set_affinity_hint+0x6c/0xa0 dpaa2_dpio_probe+0x2a4/0x518 fsl_mc_driver_probe+0x28/0x70 really_probe+0xdc/0x320 driver_probe_device+0x5c/0xf0 __device_attach_driver+0x88/0xc0 bus_for_each_drv+0x7c/0xc8 __device_attach+0xe4/0x140 device_initial_probe+0x18/0x20 bus_probe_device+0x98/0xa0 device_add+0x41c/0x758 fsl_mc_device_add+0x184/0x530 dprc_scan_objects+0x280/0x370 dprc_probe+0x124/0x3b0 fsl_mc_driver_probe+0x28/0x70 really_probe+0xdc/0x320 driver_probe_device+0x5c/0xf0 __device_attach_driver+0x88/0xc0 bus_for_each_drv+0x7c/0xc8 __device_attach+0xe4/0x140 device_initial_probe+0x18/0x20 bus_probe_device+0x98/0xa0 deferred_probe_work_func+0x74/0xa8 process_one_work+0x1c8/0x470 worker_thread+0x1f8/0x428 kthread+0x124/0x128 ret_from_fork+0x10/0x18 Code: a9bc7bfd 910003fd a9025bf5 a90363f7 (f9402015) ---[ end trace 38298e1a29e7a570 ]--- Kernel panic - not syncing: Fatal exception in interrupt SMP: stopping secondary CPUs Mem abort info: ESR = 0x96000004 CM = 0, WnR = 0 EC = 0x25: DABT (current EL), IL = 32 bits [0000000000000040] user address but active_mm is swapper SET = 0, FnV = 0 EA = 0, S1PTW = 0 Data abort info: ISV = 0, ISS = 0x00000004 CM = 0, WnR = 0 [0000000000000040] user address but active_mm is swapper SMP: failed to stop secondary CPUs 0-2 Kernel Offset: 0x21d378600000 from 0xffff800010000000 PHYS_OFFSET: 0xffffe92180000000 CPU features: 0x10002,21806008 Memory Limit: none ---[ end Kernel panic - not syncing: Fatal exception in interrupt ]--- Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Grigore Popescu <grigore.popescu@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-04-13Merge branch 'v5.4/standard/base' into v5.4/standard/preempt-rt/cn96xxBruce Ashfield
2020-04-08soc: mediatek: knows_txdone needs to be set in Mediatek CMDQ helperBibby Hsieh
commit ce35e21d82bcac8b3fd5128888f9e233f8444293 upstream. Mediatek CMDQ driver have a mechanism to do TXDONE_BY_ACK, so we should set knows_txdone. Fixes:576f1b4bc802 ("soc: mediatek: Add Mediatek CMDQ helper") Cc: stable@vger.kernel.org # v5.0+ Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-04-07octeontx2-serdes: Add gserr and gserc eye displayTomasz Michalec
commit f08bd0491f352d318435d26ab2fce3cfd2c1b3e5 from git@git.assembla.com:cavium/WindRiver.linux.git The eye command is extended and now it supports gserr and gserc display. Command now display raw data and eye diagram. Change-Id: I56000b5e482e4bcb54ac2e896e2db574546ddb5e Signed-off-by: Tomasz Michalec <tomasz@marvell.com> Reviewed-on: https://sj1git1.cavium.com/24840 Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com> Reviewed-by: Chandrakala Chavva <cchavva@marvell.com> Signed-off-by: Kevin Hao <kexin.hao@windriver.com>
2020-04-07octeontx2-serdes: Add CONFIG_OCTEONTX_SERDESTomasz Michalec
commit 85ee705c064453694a10f51e9fc98a2336dec86e from git@git.assembla.com:cavium/WindRiver.linux.git CONFIG_OCTEONTX_SERDES flag allows to exclude octeontx serdes diagnostic commands from build. Change-Id: Ifb08390df8298ce69e8251987a782cf091cf05ba Signed-off-by: Tomasz Michalec <tomasz@marvell.com> Reviewed-on: https://sj1git1.cavium.com/24382 Reviewed-by: Chandrakala Chavva <cchavva@marvell.com> Tested-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com> Signed-off-by: Kevin Hao <kexin.hao@windriver.com>
2020-04-07octeontx2-serdes: Check SVC UUID on module initTomasz Michalec
commit c05c727d4c1725450b5e8d2ea351d8ec7c7565e2 from git@git.assembla.com:cavium/WindRiver.linux.git Add check for SVC UUID in serdes_dbg_init. Continue initialization only if returned UUID match OcteonTX UUID. Change-Id: I366df30d3063a02a5938852ee06b9e3f4ef463ba Signed-off-by: Tomasz Michalec <tomasz@marvell.com> Reviewed-on: https://sj1git1.cavium.com/23681 Reviewed-by: Chandrakala Chavva <cchavva@marvell.com> Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com> Signed-off-by: Kevin Hao <kexin.hao@windriver.com>
2020-04-07edac: octeontx2: RAS error-injectionRick Farrington
commit a9e9028b4a282f3676450a9c729b8b899a16c414 from git@git.assembla.com:cavium/WindRiver.linux.git Use SMC OCTEONTX_EDAC to inject ECC errors to DRAM & cache. This provides an SMC error injection interface, for verifying OcteonTX2's RAS/EDAC handling. For example, injecting DRAM ECC single-bit error at 8MB, and reading it back in EL3 ... # edac=/sys/module/otx2_einj/parameters/smc_params # echo 3,0x800000,0x300 >$edac will cause ATF to inject error, field EL3 interrupt reporting it, log that in the sdei-ghes area monitored by otx2-ghes driver, which passes details to generic edac_ghes driver, which logs the following via syslog (which may display in /var/log/kern.log, or elsewhere, depending on syslog configuration) {1}[Hardware Error]: Hardware error from APEI \ Generic Hardware Error Source: 1 {1}[Hardware Error]: It has been corrected by h/w and \ requires no further action {1}[Hardware Error]: event severity: corrected {1}[Hardware Error]: Error 0, type: corrected {1}[Hardware Error]: fru_text: LMC1: DIMM0,Rank0/0, {1}[Hardware Error]: section_type: memory error {1}[Hardware Error]: physical_address: 0x0000000000800000 {1}[Hardware Error]: card: 1 module: 0 bank: 5 row: 21 column: 336 EDAC MC1: 1 CE unknown error on unknown label (card:1 module:0 bank:5 \ row:21 col:336 page:0x80 offset:0x0 grain:0 syndrome:0x0) Change-Id: Iccc953fb3d399f2f58d3471a5dde64611a1bcd9a Signed-off-by: Rick Farrington <Ricardo.Farrington@cavium.com> Reviewed-on: https://sj1git1.cavium.com/23467 Reviewed-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com> Tested-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com> Signed-off-by: Kevin Hao <kexin.hao@windriver.com>
2020-04-07octeontx2-serdes: Implement PRBS commandTomasz Michalec
commit 128bdf7581fb9f7d92e8714ed679363d3ad06953 from git@git.assembla.com:cavium/WindRiver.linux.git This patch introduce PRBS command to serdes debugfs by adding octeontx2_serdes/prbs file. It allows to start and stop PRBS on specified QLM. When PRBS is running, errors for each QLM lane can be collected. debugfs/octeontx2_serdes# echo 2 start 7 > prbs Above command will start PRBS-7 on QLM2. debugfs/octeontx2_serdes# cat > prbs This command output will look like this: Time: 10 seconds QLM2.Lane0: errors: 3 Time: 10 seconds QLM2.Lane1: errors: 0 Time: 10 seconds QLM2.Lane2: errors: 2 Time: 10 seconds QLM2.Lane3: errors: 3 If PRBS is started on multiple QLMs, the QLM from which output will be printed is selected by running: debugfs/octeontx2_serdes# echo <qlm> > prbs To stop PRBS on QLM2 following command is used: debugfs/octeontx2_serdes# echo 2 stop > prbs Change-Id: I3dc7a27e7fc6741cddaddad60e229bc6a5896a4f Signed-off-by: Tomasz Michalec <tomasz@marvell.com> Reviewed-on: https://sj1git1.cavium.com/23212 Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com> Reviewed-by: Chandrakala Chavva <cchavva@marvell.com> Signed-off-by: Kevin Hao <kexin.hao@windriver.com>
2020-04-07octeontx2-serdes: Add serdes diagnostic commandsTomasz Michalec
commit 53888132f9ed36eb331814ef5a01648d2547e2b9 from git@git.assembla.com:cavium/WindRiver.linux.git This patch adds octeontx2_serdes/eye and octeontx2_serdes/settings files in debugfs. Using this as interface, user is able to collect eye and serdes settings data from ATF. Change-Id: I5780887c6da964bf968d3fd121cf4e91a9c84f44 Signed-off-by: Tomasz Michalec <tomasz@marvell.com> Reviewed-on: https://sj1git1.cavium.com/19561 Reviewed-by: Chandrakala Chavva <cchavva@marvell.com> Reviewed-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com> Tested-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com> Reviewed-on: https://sj1git1.cavium.com/23209 Signed-off-by: Kevin Hao <kexin.hao@windriver.com>
2020-03-21Merge branch 'v5.4/standard/base' into v5.4/standard/cn96xxBruce Ashfield
2020-03-21Merge branch 'v5.4/standard/base' into v5.4/standard/cn96xxBruce Ashfield
2020-03-12soc: imx-scu: Align imx sc msg structs to 4Leonard Crestez
commit f10e58a5d20e1cf3a39a842da92c9dd0c3c23849 upstream. The imx SC api strongly assumes that messages are composed out of 4-bytes words but some of our message structs have odd sizeofs. This produces many oopses with CONFIG_KASAN=y. Fix by marking with __aligned(4). Fixes: 73feb4d0f8f1 ("soc: imx-scu: Add SoC UID(unique identifier) support") Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-10octeontx2-dpi: fix compilation warningsStanislaw Kardach
commit e6391ed0270ef8dc153d36bcd90ec7db71d1b860 from git@git.assembla.com:cavium/WindRiver.linux.git Fix symbol locality and missing parameter documentation in dpi_init(). Change-Id: I6520e7df9d8a0db686333ed3cd2926420329efa0 Signed-off-by: Stanislaw Kardach <skardach@marvell.com> Reviewed-on: https://sj1git1.cavium.com/23185 Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com> Reviewed-by: Subrahmanyam Nilla <snilla@marvell.com> Reviewed-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com> Signed-off-by: Kevin Hao <kexin.hao@windriver.com>
2020-03-10octeontx2-rm: fix compilation warningStanislaw Kardach
commit 91a852adac0c245214d0e8ba20ea265db4c59e2e from git@git.assembla.com:cavium/WindRiver.linux.git Remove unused variables. Change-Id: I33cd922552980605a6e8c95e652c51018d28ccaf Signed-off-by: Stanislaw Kardach <skardach@marvell.com> Reviewed-on: https://sj1git1.cavium.com/23184 Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com> Reviewed-by: Stanislaw Kardach <Stanislaw.Kardach@cavium.com> Reviewed-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com> Signed-off-by: Kevin Hao <kexin.hao@windriver.com>
2020-03-10drivers: marvell: octeontx2: sdei_ghes: add LMCPeter Swain
commit a1073be9953d1f0158e591d77aa601ea052ec652 from git@git.assembla.com:cavium/WindRiver.linux.git Enable MSIX handling on LMC devices too. Change-Id: Ic123fe2a8859149e029be565955a8e23926782ba Signed-off-by: Peter Swain <pswain@marvell.com> Reviewed-on: https://sj1git1.cavium.com/22599 Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com> Reviewed-by: Rick Farrington <Ricardo.Farrington@cavium.com> Signed-off-by: Kevin Hao <kexin.hao@windriver.com>
2020-03-05soc/tegra: fuse: Fix build with Tegra194 configurationThierry Reding
[ Upstream commit 6f4ecbe284df5f22e386a640d9a4b32cede62030 ] If only Tegra194 support is enabled, the tegra30_fuse_read() and tegra30_fuse_init() function are not declared and cause a build failure. Add Tegra194 to the preprocessor guard to make sure these functions are available for Tegra194-only builds as well. Link: https://lore.kernel.org/r/20200203143114.3967295-1-thierry.reding@gmail.com Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-03-02Merge branch 'v5.4/standard/base' into v5.4/standard/cn96xxBruce Ashfield
2020-02-27drivers: marvell: octeontx2: add support for GHESRick Farrington
commit 2aa5339be19a3d2906a348e571a62d06805360b0 from git@git.assembla.com:cavium/WindRiver.linux.git Enable the firmware (ATF) to report RAS errors from the LMC, MCC or MDC. The Generic Hardware Error Source (GHES) allows for non-standard errors to be reported to the system (please refer to the ACPI specification). The standard GHES driver requires the presence of ACPI tables, and accompanying kernel ACPI support. However, OcteonTX2 is commonly used in embedded context with Device Tree, which disables ACPI in the kernel. Therefore, the standard GHES driver does not load or function. Add support for GHES through a platform driver, using data from the Device Tree to construct the required ACPI table (Hardware Error Source Table, or HEST) and inform the kernel thereof. Additionally, create GHES devices for the LMC, MCC & MDC OcteonTX2 devices, allowing the firmware to propagate detected RAS errors to the kernel. Change-Id: If39a5334131313d4d9063f119a5694423d865f60 Signed-off-by: Rick Farrington <Ricardo.Farrington@cavium.com> Reviewed-on: https://sj1git1.cavium.com/21847 Reviewed-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com> Tested-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com> [Kevin: Just some minor context mods in order to port to linux-yocto] Signed-off-by: Kevin Hao <kexin.hao@windriver.com>
2020-02-27soc: octeontx2: Add mdio command interface using debugfsChristina Jacob
commit 7c5fe0a7c967e592ead9adb7c6d27ae1da5c81e8 from git@git.assembla.com:cavium/WindRiver.linux.git Support mdio read/write commands using debugfs Usage: echo <cgxlmac> <mode> <addr> <devad> <reg> [value] > mdio_cmd Change-Id: I8e00b7c6315b165611d4a42a57051338c26e93d4 Signed-off-by: Christina Jacob <cjacob@marvell.com> Reviewed-on: https://sj1git1.cavium.com/13544 Reviewed-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com> Tested-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com> Signed-off-by: Xiaotao Yin <xiaotao.yin@windriver.com>
2020-02-27octeontx2-rm: add knob for PMCCNTR_EL0 access configStanislaw Kardach
commit 1a627a67e2666cea8ac2003ea74b69f83291c855 from git@git.assembla.com:cavium/WindRiver.linux.git Add a sysfs file to configure the PMCCNTR access in EL0. Writing 1 to /sys/bus/pci/drivers/octeontx2-rm/0*/pmccntr_el0 will enable access to userspace, while 0 will disable it. Reading this file will print a compined enable status for all cores. Value read will be 1 if counter is enabled on all cores. Access is enabled with as little PMU register modifications as possible. Change-Id: Ib48328e16d4ed62319c39d4d896891ae9eec4130 Signed-off-by: Stanislaw Kardach <skardach@marvell.com> Reviewed-on: https://sj1git1.cavium.com/13261 Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com> Reviewed-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com> (cherry picked from commit 350ae2c8e8cf6cac7eece31b78a8aaacbebd2498) Reviewed-on: https://sj1git1.cavium.com/13536 Tested-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com> Signed-off-by: Xiaotao Yin <xiaotao.yin@windriver.com>
2020-02-27octeontx2-rm: rework MBOX_MSG_READY handlingStanislaw Kardach
commit 630709c4cb084f3e65b1947e4a732d6e30816686 from git@git.assembla.com:cavium/WindRiver.linux.git Forward the MBOX_MSG_READY to the kernel after intercepting in order to propagate RCLK/SCLK values read by the octeontx2-af driver. Change-Id: I1733401870040ec1efd97fd42dd7eddab485aad1 Signed-off-by: Stanislaw Kardach <skardach@marvell.com> Reviewed-on: https://sj1git1.cavium.com/13260 Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com> Reviewed-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com> (cherry picked from commit c07823a8497516b0d55427890593275b11f7f9ee) Reviewed-on: https://sj1git1.cavium.com/13535 Tested-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com> Signed-off-by: Xiaotao Yin <xiaotao.yin@windriver.com>
2020-02-27octeontx2-rm: fix strncpy rangesStanislaw Kardach
commit 040f8fd991f3a11bf4a3b0bdc60400422af19f69 from git@git.assembla.com:cavium/WindRiver.linux.git Fix potential buffer overflow on copying domain name passed by the user. Change-Id: Idc9de535b326dfc0adfa4fbae938f7b31abe313e Signed-off-by: Stanislaw Kardach <skardach@marvell.com> Reviewed-on: https://sj1git1.cavium.com/7819 Reviewed-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com> Tested-by: Sunil Kovvuri Goutham <Sunil.Goutham@cavium.com> Signed-off-by: Xiaotao Yin <xiaotao.yin@windriver.com>
2020-02-27soc: octeontx2-rm: fix compilation warningsStanislaw Kardach
commit 33f1b5d2754edf8d8dac21637c4441c4c9523a76 from git@git.assembla.com:cavium/WindRiver.linux.git Change-Id: Ia5aa2f664f0a629e35017141c184ab2a0d5c2a20 Signed-off-by: Stanislaw Kardach <skardach@marvell.com> Signed-off-by: Xiaotao Yin <xiaotao.yin@windriver.com>
2020-02-27soc: octeontx2-dpi: disable DPI PF driver by default in KconfigSubrahmanyam Nilla
commit 973880f2ce797f2b0cc4f94d17fdce55bfeb484d from git@git.assembla.com:cavium/WindRiver.linux.git Change-Id: I01ea0e0d5a8fbc464f16a392bfaa468f405b6318 Signed-off-by: Subrahmanyam Nilla <snilla@marvell.com> Signed-off-by: Xiaotao Yin <xiaotao.yin@windriver.com>
2020-02-27soc: octeontx2-rm: handle dpivf reservationsSubrahmanyam Nilla
commit 7a6a8d344b0a71b4ee689afa6760c4638c6f1b3c from git@git.assembla.com:cavium/WindRiver.linux.git Add DPI VF reservation handling in domain creation and destroy. Change-Id: I0fd7db858d85ea65054f72adeb184732bb848481 Signed-off-by: Subrahmanyam Nilla <snilla@marvell.com> Signed-off-by: Xiaotao Yin <xiaotao.yin@windriver.com>
2020-02-27soc: octeontx2-dpi: add dpi-pf driverSubrahmanyam Nilla
commit 01861b140833c7d109fab294591b794d5138164b from git@git.assembla.com:cavium/WindRiver.linux.git Dpi-pf driver initializes dpipf device and enables dpivf devices. Change-Id: I9b2b78d451bc56855fbda6951e4e0ad42e64c317 Signed-off-by: Subrahmanyam Nilla <snilla@marvell.com> Signed-off-by: Xiaotao Yin <xiaotao.yin@windriver.com>
2020-02-27soc: octeontx2-rm: enable bus masterStanislaw Kardach
commit ebbabe7c3ce092f1928b5adebf3138fd391280fa from git@git.assembla.com:cavium/WindRiver.linux.git Bus mastering for RVU TIM/SSO device is required for MSIX interrupt reception. Change-Id: Ib2c95dd9370f9d5a63aa9f3349f1146a230f0570 Signed-off-by: Stanislaw Kardach <skardach@marvell.com> Signed-off-by: Xiaotao Yin <xiaotao.yin@windriver.com>
2020-02-27soc: octeontx2-rm: Defer probe if discovery id is not setupSunil Goutham
commit b04dfe278aa44a13e96a5eaac28af62823d8859c from git@git.assembla.com:cavium/WindRiver.linux.git Check if discovery ID is setup by AF, if not, defer driver probe until AF is up. Change-Id: I0e72905389239e6342e09a75f1f73d2657cea29e Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Xiaotao Yin <xiaotao.yin@windriver.com>
2020-02-27soc: octeontx2-rm: add domain sysfsStanislaw Kardach
commit 9b54c6583059413399b87d5ab9ba43589c7b5ae3 from git@git.assembla.com:cavium/WindRiver.linux.git This commit provides convenience sysfs interfaces for partitioning non-NIC resources and OcteonTX2 RVU based NIC devices between users in form of application domains. Change-Id: I54048ec9bfb8319bff0b23e61d390ca208d6f52d Signed-off-by: Stanislaw Kardach <skardach@marvell.com> Signed-off-by: Xiaotao Yin <xiaotao.yin@windriver.com>
2020-02-27soc: octeontx2-rm: add Marvell OcteonTX2 RM driverStanislaw Kardach
commit 25da778fa5fe3825841a9e1ac6649ced2bcb85c0 from git@git.assembla.com:cavium/WindRiver.linux.git This patch adds a driver for managing non-NIC hardware offload resources and exposing them to user through SSO/TIM type of RVU VF devices. For that reason it acts as a proxy for RVU MBOX messages between SSO/TIM RVU VFs and RVU AF. It has previously lived outside of the Marvell internal kernel tree which is not convenient in development process. Therefore this patch aims to integrate this driver here with a caveat that upstreaming process will have to include its re-work. This driver contains a copy of quota management that is part of RVU AF driver. That code is not re-used as it would require re-work of the RVU AF driver which is in process of upstreaming. As part of upstreaming the resource management interfaces used in this driver will have to be re-worked too (suggested by upstream maintainers to use devlink) to accommodate requirements of other users to minimize the functionality of this driver to an RVU stub. Change-Id: Ie858a79cf43f30efaaabd8294c0d6464536fe80b Signed-off-by: Stanislaw Kardach <skardach@marvell.com> Signed-off-by: Krishnamurthy D V <kvasanthrao@caviumnetworks.com> Signed-off-by: Xiaotao Yin <xiaotao.yin@windriver.com>
2020-02-24soc/tegra: fuse: Correct straps' address for older Tegra124 device treesDmitry Osipenko
[ Upstream commit 2d9ea1934f8ef0dfb862d103389562cc28b4fc03 ] Trying to read out Chip ID before APBMISC registers are mapped won't succeed, in a result Tegra124 gets a wrong address for the HW straps register if machine uses an old outdated device tree. Fixes: 297c4f3dcbff ("soc/tegra: fuse: Restrict legacy code to 32-bit ARM") Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-02-14soc: qcom: rpmhpd: Set 'active_only' for active only power domainsDouglas Anderson
commit 5d0d4d42bed0090d3139e7c5ca1587d76d48add6 upstream. The 'active_only' attribute was accidentally never set to true for any power domains meaning that all the code handling this attribute was dead. NOTE that the RPM power domain code (as opposed to the RPMh one) gets this right. Acked-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Fixes: 279b7e8a62cc ("soc: qcom: rpmhpd: Add RPMh power domain driver") Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20190214173633.211000-1-dianders@chromium.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-02-05soc: ti: wkup_m3_ipc: Fix race condition with rproc_bootDave Gerlach
[ Upstream commit 03729cfa0d543bc996bf959e762ec999afc8f3d2 ] Any user of wkup_m3_ipc calls wkup_m3_ipc_get to get a handle and this checks the value of the static variable m3_ipc_state to see if the wkup_m3 is ready. Currently this is populated during probe before rproc_boot has been called, meaning there is a window of time that wkup_m3_ipc_get can return a valid handle but the wkup_m3 itself is not ready, leading to invalid IPC calls to the wkup_m3 and system instability. To avoid this, move the population of the m3_ipc_state variable until after rproc_boot has succeeded to guarantee a valid and usable handle is always returned. Reported-by: Suman Anna <s-anna@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-01-26soc: aspeed: Fix snoop_file_poll()'s return typeLuc Van Oostenryck
commit a4e55ccd4392e70f296d12e81b93c6ca96ee21d5 upstream. snoop_file_poll() is defined as returning 'unsigned int' but the .poll method is declared as returning '__poll_t', a bitwise type. Fix this by using the proper return type and using the EPOLL constants instead of the POLL ones, as required for __poll_t. Link: https://lore.kernel.org/r/20191121051851.268726-1-joel@jms.id.au Fixes: 3772e5da4454 ("drivers/misc: Aspeed LPC snoop output using misc chardev") Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-01-26soc: renesas: Add missing check for non-zero product register addressGeert Uytterhoeven
commit 4194b583c104922c6141d6610bfbce26847959df upstream. If the DTB for a device with an RZ/A2 SoC lacks a device node for the BSID register, the ID validation code falls back to using a register at address 0x0, which leads to undefined behavior (e.g. reading back a random value). This could be fixed by letting fam_rza2.reg point to the actual BSID register. However, the hardcoded fallbacks were meant for backwards compatibility with old DTBs only, not for new SoCs. Hence fix this by validating renesas_family.reg before using it. Fixes: 175f435f44b724e3 ("soc: renesas: identify RZ/A2") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191016143306.28995-1-geert+renesas@glider.be Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-01-26soc: qcom: llcc: Name regmaps to avoid collisionsStephen Boyd
commit 2bfd3e7651addcaf48f12d4f11ea9d8fca6c3aa8 upstream. We'll end up with debugfs collisions if we don't give names to the regmaps created by this driver. Change the name of the config before registering it so we don't collide in debugfs. Fixes: 7f9c136216c7 ("soc: qcom: Add broadcast base for Last Level Cache Controller (LLCC)") Cc: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-01-26soc/tegra: pmc: Fix crashes for hierarchical interruptsThierry Reding
commit c9e753767a9c75d2044fb7343950a6a992d34a16 upstream. Interrupts that don't have an associated wake event or GPIO wake events end up with an associate IRQ chip that is NULL and which causes IRQ code to crash. This is because we don't implicitly set the parent IRQ chip by allocating the interrupt at the parent. However, there really isn't a corresponding interrupt at the parent, so we need to work around this by setting the special no_irq_chip as the IRQ chip for these interrupts. Fixes: 19906e6b1667 ("soc/tegra: pmc: Add wake event support") Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-01-23soc: amlogic: meson-ee-pwrc: propagate errors from pm_genpd_init()Martin Blumenstingl
commit c67aafd60d7e323fe74bf45fab60148f84cf9b95 upstream. pm_genpd_init() can return an error. Propagate the error code to prevent the driver from indicating that it successfully probed while there were errors during pm_genpd_init(). Fixes: eef3c2ba0a42a6 ("soc: amlogic: Add support for Everything-Else power domains controller") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-01-23soc: amlogic: meson-ee-pwrc: propagate PD provider registration errorsMartin Blumenstingl
commit 0766d65e6afaea8b80205a468207de9f18cd7ec8 upstream. of_genpd_add_provider_onecell() can return an error. Propagate the error so the driver registration fails when of_genpd_add_provider_onecell() did not work. Fixes: eef3c2ba0a42a6 ("soc: amlogic: Add support for Everything-Else power domains controller") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-12-13soc: mediatek: cmdq: fixup wrong input order of write apiBibby Hsieh
commit 47b6b604b2bf396e110e7c2e074fef459bf07b4f upstream. Fixup a issue was caused by the previous fixup patch. Fixes: 1a92f989126e ("soc: mediatek: cmdq: reorder the parameter") Link: https://lore.kernel.org/r/20191127165428.19662-1-matthias.bgg@gmail.com Cc: <stable@vger.kernel.org> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-10-26soc: imx: gpc: fix initialiser formatBen Dooks
Make the initialiers in imx_gpc_domains C99 format to fix the following sparse warnings: drivers/soc/imx/gpc.c:252:30: warning: obsolete array initializer, use C99 syntax drivers/soc/imx/gpc.c:258:29: warning: obsolete array initializer, use C99 syntax drivers/soc/imx/gpc.c:269:34: warning: obsolete array initializer, use C99 syntax drivers/soc/imx/gpc.c:278:30: warning: obsolete array initializer, use C99 syntax Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Fixes: b0682d485f12 ("soc: imx: gpc: use GPC_PGC_DOMAIN_* indexes") Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-06soc: imx: imx-scu: Getting UID from SCU should have responseAnson Huang
The SCU firmware API for getting UID should have response, otherwise, the message stored in function stack could be released and then the response data received from SCU will be stored into that released stack and cause kernel NULL pointer dump. Fixes: 73feb4d0f8f1 ("soc: imx-scu: Add SoC UID(unique identifier) support") Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-09-16Merge tag 'armsoc-drivers' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "This contains driver changes that are tightly connected to SoC specific code. Aside from smaller cleanups and bug fixes, here is a list of the notable changes. New device drivers: - The Turris Mox router has a new "moxtet" bus driver for its on-board pluggable extension bus. The same platform also gains a firmware driver. - The Samsung Exynos family gains a new Chipid driver exporting using the soc device sysfs interface - A similar socinfo driver for Qualcomm Snapdragon chips. - A firmware driver for the NXP i.MX DSP IPC protocol using shared memory and a mailbox Other changes: - The i.MX reset controller driver now supports the NXP i.MX8MM chip - Amlogic SoC specific drivers gain support for the S905X3 and A311D chips - A rework of the TI Davinci framebuffer driver to allow important cleanups in the platform code - A couple of device drivers for removed ARM SoC platforms are removed. Most of the removals were picked up by other maintainers, this contains whatever was left" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (123 commits) bus: uniphier-system-bus: use devm_platform_ioremap_resource() soc: ti: ti_sci_pm_domains: Add support for exclusive and shared access dt-bindings: ti_sci_pm_domains: Add support for exclusive and shared access firmware: ti_sci: Allow for device shared and exclusive requests bus: imx-weim: remove incorrect __init annotations fbdev: remove w90x900/nuc900 platform drivers spi: remove w90x900 driver net: remove w90p910-ether driver net: remove ks8695 driver firmware: turris-mox-rwtm: Add sysfs documentation firmware: Add Turris Mox rWTM firmware driver dt-bindings: firmware: Document cznic,turris-mox-rwtm binding bus: moxtet: fix unsigned comparison to less than zero bus: moxtet: remove set but not used variable 'dummy' ARM: scoop: Use the right include dt-bindings: power: add Amlogic Everything-Else power domains bindings soc: amlogic: Add support for Everything-Else power domains controller fbdev: da8xx: use resource management for dma fbdev: da8xx-fb: drop a redundant if fbdev: da8xx-fb: use devm_platform_ioremap_resource() ...
2019-09-16Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull ARM SoC platform updates from Arnd Bergmann: "The main change this time around is a cleanup of some of the oldest platforms based on the XScale and ARM9 CPU cores, which are between 10 and 20 years old. The Kendin/Micrel/Microchip KS8695, Winbond/Nuvoton W90x900 and Intel IOP33x/IOP13xx platforms are removed after we determined that nobody is using them any more. The TI Davinci and NXP LPC32xx platforms on the other hand are still in active use and are converted to the ARCH_MULTIPLATFORM build, meaning that we can compile a kernel that works on these along with most other ARMv5 platforms. Changes toward that goal are also merged for IOP32x, but additional work is needed to complete this. Patches for the remaining ARMv5 platforms have started but need more work and some testing. Support for the new ASpeed AST2600 gets added, this is based on the Cortex-A7 ARMv7 core, and is a newer version of the existing ARMv5 and ARMv6 chips in the same family. Other changes include a cleanup of the ST-Ericsson ux500 platform and the move of the TI Davinci platform to a new clocksource driver" [ The changes had marked INTEL_IOP_ADMA and USB_LPC32XX as being buildable on other platforms through COMPILE_TEST, but that causes new warnings that I most definitely do not want to see during the merge window as that could hide other issues. So the COMPILE_TEST option got disabled for them again - Linus ] * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (61 commits) ARM: multi_v5_defconfig: make DaVinci part of the ARM v5 multiplatform build ARM: davinci: support multiplatform build for ARM v5 arm64: exynos: Enable exynos-chipid driver ARM: OMAP2+: Delete an unnecessary kfree() call in omap_hsmmc_pdata_init() ARM: OMAP2+: move platform-specific asm-offset.h to arch/arm/mach-omap2 ARM: davinci: dm646x: Fix a typo in the comment ARM: davinci: dm646x: switch to using the clocksource driver ARM: davinci: dm644x: switch to using the clocksource driver ARM: aspeed: Enable SMP boot ARM: aspeed: Add ASPEED AST2600 architecture ARM: aspeed: Select timer in each SoC dt-bindings: arm: cpus: Add ASPEED SMP ARM: imx: stop adjusting ar8031 phy tx delay mailmap: map old company name to new one @microchip.com MAINTAINERS: at91: remove the TC entry MAINTAINERS: at91: Collect all pinctrl/gpio drivers in same entry ARM: at91: move platform-specific asm-offset.h to arch/arm/mach-at91 MAINTAINERS: Extend patterns for Samsung SoC, Security Subsystem and clock drivers ARM: s3c64xx: squash samsung_usb_phy.h into setup-usb-phy.c ARM: debug-ll: Add support for r7s9210 ...
2019-09-12Merge tag 'qcom-drivers-for-5.4' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers Qualcomm ARM Based Driver Updates for v5.4 * Add AOSS QMP support * Various fixups for Qualcomm SCM * Add socinfo driver * Add SoC serial number attribute and associated APIs * Add SM8150 and SC7180 support in Qualcomm SCM * Fixup max processor count in SMEM * tag 'qcom-drivers-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: soc: qcom: aoss: Add AOSS QMP support dt-bindings: soc: qcom: aoss: Add SM8150 and SC7180 support dt-bindings: firmware: scm: Add SM8150 and SC7180 support dt-bindings: firmware: scm: re-order compatible list soc: qcom: smem: Update max processor count soc: qcom: socinfo: Annotate switch cases with fall through soc: qcom: Extend AOSS QMP driver to support resources that are used to wake up the SoC. soc: qcom: socinfo: Expose image information soc: qcom: socinfo: Expose custom attributes soc: qcom: Add socinfo driver base: soc: Export soc_device_register/unregister APIs base: soc: Add serial_number attribute to soc firmware: qcom_scm: Cleanup code in qcom_scm_assign_mem() firmware: qcom_scm: Fix some typos in docs and printks firmware: qcom_scm: Use proper types for dma mappings