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path: root/drivers/pinctrl/sirf
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2014-03-05pinctrl: sirf: fix kernel panic in gpio_lock_as_irqBarry Song
commit 655dada6277991 causes kernel panic, this patch fixes it. [ 1.197816] [ffffffee] *pgd=0d7fd821, *pte=00000000, *ppte=00000000 [ 1.204070] Internal error: Oops: 17 [#1] PREEMPT SMP ARM [ 1.209447] Modules linked in: [ 1.212490] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.14.0-rc1 #3 [ 1.218737] task: cd03c000 ti: cd040000 task.ti: cd040000 [ 1.224127] PC is at gpiod_lock_as_irq+0xc/0x64 [ 1.228634] LR is at sirfsoc_gpio_irq_startup+0x18/0x44 [ 1.233842] pc : [<c01d3990>] lr : [<c01d1c38>] psr: a0000193 [ 1.233842] sp : cd041d30 ip : 00000000 fp : 00000000 [ 1.245296] r10: 00000000 r9 : cd023db4 r8 : 60000113 [ 1.250505] r7 : 0000003e r6 : cd023dd4 r5 : c06bfa54 r4 : cd023d80 [ 1.257014] r3 : 00000020 r2 : 00000000 r1 : ffffffea r0 : ffffffea [ 1.263526] Flags: NzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel [ 1.270903] Control: 10c53c7d Table: 00004059 DAC: 00000015 [ 1.276631] Process swapper/0 (pid: 1, stack limit = 0xcd040240) [ 1.282620] Stack: (0xcd041d30 to 0xcd042000) [ 1.286963] 1d20: cd023d80 c01d1c38 c01d1c20 cd023d80 [ 1.295124] 1d40: 00000001 c0068438 cd023d80 ccb6d880 cd023dd4 c0067044 0000718e c006719c [ 1.286963] 1d20: cd023d80 c01d1c38 c01d1c20 cd023d80 [ 1.295124] 1d40: 00000001 c0068438 cd023d80 ccb6d880 cd023dd4 c0067044 0000718e c006719c [ 1.295124] 1d40: 00000001 c0068438 cd023d80 ccb6d880 cd023dd4 c0067044 0000718e c006719c [ 1.303283] 1d60: 00000800 00000083 ccb6d880 cd023d80 c02b41d8 00000083 0000003e ccb7c410 [ 1.311442] 1d80: 00000000 c00671dc 00000083 0000003e c02b41d8 cd3dd5c0 0000003e ccb7c634 [ 1.319601] 1da0: cd040030 c00672a8 cd3dd5c0 ccb7c410 ccb6d340 ccb7c410 ccb6d340 cd3dd400 [ 1.327760] 1dc0: cd3dd410 c02b4434 ccb7c410 c01265a8 00000001 cd3dd410 c0687108 00000000 [ 1.335919] 1de0: c0687108 00000000 00000000 c0240170 c0240158 cd3dd410 c06c30d0 c023e8bc [ 1.344079] 1e00: c023e9d4 00000000 cd3dd410 c023e9d4 c0682150 c023cf88 cd003e98 cd2d50c4 [ 1.352238] 1e20: cd3dd410 cd3dd444 c06822f0 c023e768 cd3dd418 cd3dd410 c06822f0 c023de14 [ 1.360397] 1e40: cd3dd418 00000000 cd3dd410 c023c398 cd041e78 cd041ea8 cd3dd400 cd3dd410 [ 1.368556] 1e60: 00000083 00000000 cd3dd400 cd3dd410 00000083 000000c8 c04e00c8 c023fee8 [ 1.376715] 1e80: 00000000 cd041ea8 cd3dd400 00000001 00000083 c024048c c0435ef8 c0434dec [ 1.384874] 1ea0: c068da58 c04c6d04 c0682150 c0435ef8 ffffffff 00000000 00000000 c068da58 [ 1.393033] 1ec0: 00000020 00000000 00000000 00000000 c05dabb8 00000007 c068d640 c068d640 [ 1.401193] 1ee0: c04c247c c04c249c 00000000 c00088e8 cd004c00 c043bbb8 cd029180 c03812a0 [ 1.409352] 1f00: 00000000 00000000 60000113 c0673728 60000113 c0673728 00000000 00000000 [ 1.417511] 1f20: cd7fce01 c0390a54 00000065 c003a81c c049e8bc 00000007 cd7fce0e 00000007 [ 1.425670] 1f40: 00000000 c05dabb8 00000007 c068d640 c068d640 c04c050c c04e00c8 00000065 [ 1.433829] 1f60: c04e00c0 c04c0c54 00000007 00000007 c04c050c c037d8fc cd03c000 c004322c [ 1.441988] 1f80: c0662b40 0000d640 c03737c0 00000000 00000000 00000000 00000000 00000000 [ 1.450147] 1fa0: 00000000 c03737cc 00000000 c000e478 00000000 00000000 00000000 00000000 [ 1.458307] 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 1.466467] 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 0002d481 05014092 [ 1.474640] [<c01d3990>] (gpiod_lock_as_irq) from [<c01d1c38>] (sirfsoc_gpio_irq_startup+0x18/0x44) [ 1.483661] [<c01d1c38>] (sirfsoc_gpio_irq_startup) from [<c0068438>] (irq_startup+0x34/0x6c) [ 1.492163] [<c0068438>] (irq_startup) from [<c0067044>] (__setup_irq+0x450/0x4b8) [ 1.499714] [<c0067044>] (__setup_irq) from [<c00671dc>] (request_threaded_irq+0xa8/0x128) [ 1.507960] [<c00671dc>] (request_threaded_irq) from [<c00672a8>] (request_any_context_irq+0x4c/0x7c) [ 1.517164] [<c00672a8>] (request_any_context_irq) from [<c02b4434>] (gpio_extcon_probe+0x144/0x1d4) [ 1.526279] [<c02b4434>] (gpio_extcon_probe) from [<c0240170>] (platform_drv_probe+0x18/0x48) [ 1.534783] [<c0240170>] (platform_drv_probe) from [<c023e8bc>] (driver_probe_device+0x120/0x238) [ 1.543641] [<c023e8bc>] (driver_probe_device) from [<c023cf88>] (bus_for_each_drv+0x58/0x8c) [ 1.552143] [<c023cf88>] (bus_for_each_drv) from [<c023e768>] (device_attach+0x74/0x88) [ 1.560126] [<c023e768>] (device_attach) from [<c023de14>] (bus_probe_device+0x84/0xa8) [ 1.568113] [<c023de14>] (bus_probe_device) from [<c023c398>] (device_add+0x440/0x520) [ 1.576012] [<c023c398>] (device_add) from [<c023fee8>] (platform_device_add+0xb4/0x214) [ 1.584084] [<c023fee8>] (platform_device_add) from [<c024048c>] (platform_device_register_full+0xb8/0xdc) [ 1.593719] [<c024048c>] (platform_device_register_full) from [<c04c6d04>] (sirfsoc_init_late+0xec/0xf4) [ 1.603185] [<c04c6d04>] (sirfsoc_init_late) from [<c04c249c>] (init_machine_late+0x20/0x28) [ 1.611603] [<c04c249c>] (init_machine_late) from [<c00088e8>] (do_one_initcall+0xf8/0x144) [ 1.619934] [<c00088e8>] (do_one_initcall) from [<c04c0c54>] (kernel_init_freeable+0x13c/0x1dc) [ 1.628620] [<c04c0c54>] (kernel_init_freeable) from [<c03737cc>] (kernel_init+0xc/0x118) Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-02-03pinctrl: sirf: correct the pin index of ac97_pins groupQipan Li
according to datasheet and ac97_muxmask assignment, ac97_pins should be corrected. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-15pinctrl: sirf: lock IRQs when starting themLinus Walleij
This uses the new API for tagging GPIO lines as in use by IRQs. This enforces a few semantic checks on how the underlying GPIO line is used. Also assign the gpio_chip.dev pointer to be used for error messages. Cc: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-15pinctrl: sirf: put gpio interrupt pin into input status automaticallyBarry Song
busses like i2c, spi and so on can parse the virq of their subnode automatically by irq_of_parse_and_map(). for example, i2c will do that in of_i2c_register_devices(). people can put hwirq number attached to a gpio controller in dts, and drivers can directly request the parsed virq. for example, for an i2c client as below, tangoc-ts@5c{ compatible = "pixcir,tangoc-ts"; interrupt-parent = <&gpio>; interrupts = <3 0>; reg = <0x5c>; }; in i2c client probe(), it will request_irq(client->irq, ...) without calling gpio_direction_input(). so here when we set irq type, we also put the pin to input direction. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-15pinctrl: sirf: use only one irq_domain for the whole device nodeBarry Song
in sirfsoc gpio probe(), we create 5 irq_domains for 5 gpio banks. but in irq_create_of_mapping() of irqchip core level, irq_find_host() can only return the 1st irq_domain attached the pinctrl dt device node as we can see from the codes: unsigned int irq_create_of_mapping(struct device_node *controller, const u32 *intspec, unsigned int intsize) { struct irq_domain *domain; ... domain = controller ? irq_find_host(controller) : irq_default_domain; } struct irq_domain *irq_find_host(struct device_node *node) { struct irq_domain *h, *found = NULL; int rc; /* We might want to match the legacy controller last since * it might potentially be set to match all interrupts in * the absence of a device node. This isn't a problem so far * yet though... */ mutex_lock(&irq_domain_mutex); list_for_each_entry(h, &irq_domain_list, link) { if (h->ops->match) rc = h->ops->match(h, node); else rc = (h->of_node != NULL) && (h->of_node == node); if (rc) { found = h; break; } } mutex_unlock(&irq_domain_mutex); return found; } for sirfsoc, the 1st irq_domain attached to the device_node(controller) only can do linear for the 1st 32 gpios. so for devices who use gpio hwirq above 32 and put the information in dt like: tangoc-ts@5c{ compatible = "pixcir,tangoc-ts"; + interrupt-parent = <&gpio>; + interrupts = <34 0>; }; we will fail to get the virq for these devices as hwirq will be bigger than domain->revmap_data.linear.size in: unsigned int irq_linear_revmap(struct irq_domain *domain, irq_hw_number_t hwirq) { /* Check revmap bounds; complain if exceeded */ if (WARN_ON(hwirq >= domain->revmap_data.linear.size)) return 0; return domain->revmap_data.linear.revmap[hwirq]; } this patch drops redundant irq_domain and keep only one to fix the problem. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-08pinctrl: sirf: add pin group for USP0 with only RX or TX frame syncRongjun Ying
USP0 has multiple functions, and has RX and TX frame sync signals, for some scenarios like audio PCM, we don't need both of them. so here we add two possibilities for USP0 only holding one of TX and RX frame sync. Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com> Signed-off-by: Barry Song <Barry.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-08pinctrl: sirf: fix the pins of sdmmc5 connected with TriGBin Shi
sdmmc5 has only 3 pins CMD, CLK, DATA which are connected with CSR TriG RF multi-GNSS. The hardware connection is like: DATA -- GPS_SGN CLK -- GPS_RF_CLK CMD -- GPS_MAG here we drop redundant pins in sdmmc5 group. Signed-off-by: Bin Shi <Bin.Shi@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-08pinctrl: sirf: add lost usp1_uart_nostreamctrl group for atlas6Qipan Li
commit af614b2301f0e304 adds lost USP-based UART pin groups for prima2, but missed usp1_uart_nostreamctrl group for atlas6, this patch fixes it. this makes USP(Universal Serial Ports) port1 can work as uart without stream ctrl. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-08pinctrl: sirf: add USB1/UART1 pinmux usb/uart shareRong Wang
dn and dp of USB1 can share with UART1(UART1 can route rx,tx to dn and dp pins of USB1). here we add this pinmux capability. USB1/UART1 mode selection has dedicated control register in RSC module, here we attach the register offset of private data of related pin groups. Signed-off-by: Rong Wang <Rong.Wang@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-08pinctrl: sirf: add lost USP-based UART pin groups for prima2Qipan Li
USP(Universal Serial Ports) can be UART as commit 5df831117b85a08e7aa, this patch defines the USP-based UART function pin groups for prima2. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-08pinctrl: sirf: add lost uart0-no-stream-control pingroup for prima2Qipan Li
the old codes defined uart0_nostreamctrl_pins, but missed pingroup and padmux definition for it. this patch fixes it. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-29Merge tag 'v3.11-rc7' into develLinus Walleij
Merged in this to avoid conflicts with the big locking fixes from upstream. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Conflicts: drivers/pinctrl/pinctrl-sunxi.c
2013-08-23pinctrl: sirf: add lost atlas6 uart0-no-stream-control pingroupQipan Li
the old codes defined uart0_nostreamctrl_pins, but missed pingroup and padmux definition for it. this patch fixes it. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-07pinctrl: sirf: add missing __iomem annotationJingoo Han
Added missing __iomem annotation in order to fix the following sparse warnings: drivers/pinctrl/sirf/pinctrl-sirf.c:846:14: warning: incorrect type in assignment (different address spaces) drivers/pinctrl/sirf/pinctrl-sirf.c:846:14: expected void *regs drivers/pinctrl/sirf/pinctrl-sirf.c:846:14: got void [noderef] <asn:2>* drivers/pinctrl/sirf/pinctrl-sirf.c:869:33: warning: incorrect type in assignment (different address spaces) drivers/pinctrl/sirf/pinctrl-sirf.c:869:33: expected void [noderef] <asn:2>*regs drivers/pinctrl/sirf/pinctrl-sirf.c:869:33: got void *regs drivers/pinctrl/sirf/pinctrl-sirf.c:909:17: warning: incorrect type in argument 1 (different address spaces) drivers/pinctrl/sirf/pinctrl-sirf.c:909:17: expected void volatile [noderef] <asn:2>*addr drivers/pinctrl/sirf/pinctrl-sirf.c:909:17: got void *regs Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-23pinctrl: sirf: add freeze and restore entries for hibernation supportBarry Song
this patch adds hibernation entries so that the sirf platform can support suspend-to-disk. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-23pinctrl: sirf: fix the checkpatch issue about indentationRongjun Ying
Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-22pinctrl: sirf: add usp0_uart_nostreamctrl pin group for usp-uart without ↵Qipan Li
flowctrl this patch adds the lost pin group which supports to let USP0 to simulate a UART without hardware flow control. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-22pinctrl: sirf: fix the pin number and mux bit for usp0Qipan Li
we missed a pin and related mux bit for usp pin group, this patch fixes it. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl: sirf: save the status in suspend and restore after resumingBarry Song
this patch saves the status of pinctrl registers and restore them while resuming. this makes all drivers have coherent status for pinmux after suspending and resuming. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoCBarry Song
atlas6 is a SoC very similar with primaII, the register layput of pinctrl is same, but the pads, groups and functions of atlas6 have different layout with prima2, this patch 1. pull the definition of pads, groups and functions out of the pinctrl-sirf driver,and put them into soc-specific files 2. add pads, groups and functions tables for atlas6 3. let pads, groups and functions tables become the config data of the related dt compatible node, so the pinctrl-sirf can support all SiRF SoCs with the config data as private data. In this patch,we create a sirf dir, and let the old drivers/pinctrl/pinctrl-sirf.c = drivers/pinctrl/sirf/pinctrl-prima2.c + drivers/pinctrl/sirf/pinctrl-sirf.c drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the pin layout of atlas6. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-06-11 18:25:01 +0000