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path: root/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h
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2020-05-02cxgb4: fix large delays in PTP synchronizationRahul Lakkireddy
[ Upstream commit bd019427bf3623ee3c7d2845cf921bbf4c14846c ] Fetching PTP sync information from mailbox is slow and can take up to 10 milliseconds. Reduce this unnecessary delay by directly reading the information from the corresponding registers. Fixes: 9c33e4208bce ("cxgb4: Add PTP Hardware Clock (PHC) support") Signed-off-by: Manoj Malviya <manojmalviya@chelsio.com> Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-07-05cxgb4: time stamping interface for PTPAtul Gupta
Supports hardware and software time stamping via the Linux SO_TIMESTAMPING socket option. Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Atul Gupta <atul.gupta@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-06-09cxgb4: handle interrupt raised when FW crashesRahul Lakkireddy
Handle TIMER0INT when FW crashes. Check for PCIE_FW[FW_EVAL] and if it says "Device FW Crashed", then treat it as fatal. Else, non-fatal. Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-01-16cxgb4: Shutdown adapter if firmware times out or errors outHariprasad Shenai
Perform an emergency shutdown of the adapter and stop it from continuing any further communication on the ports or DMA to the host. This is typically used when the adapter and/or firmware have crashed and we want to prevent any further accidental communication with the rest of the world. This will also force the port Link Status to go down -- if register writes work -- which should help our peers figure out that we're down. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-01-13cxgb4: Fix misleading packet/frame count stats.Ganesh Goudar
Do not count pause frames as part of general TX/RX frame counters. Based on the original work of Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-01-04cxgb4: Support compressed error vector for T6Arjun V
t6fw-1.15.15.0 enabled compressed error vector in cpl_rx_pkt for T6. Updating driver to take care of these changes. Signed-off-by: Santosh Rastapur <santosh@chelsio.com> Signed-off-by: Arjun V <arjun@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-23cxgb4: Update mps_tcam output to include T6 fieldsHariprasad Shenai
In T6, MPS classification has a 512 deep TCAM to do the match lookup. Each entry has 80x2b sets containing 48 bit MAC address, port number, VLAN Valid/ID, VNI, lookup type (outer or inner packet header). [71:48] bit locations are overloaded for outer vs. inner lookup types. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-23cxgb4: Update register range and SGE registers for T6 adapterHariprasad Shenai
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-11cxgb4: Handle clip return valuesHariprasad Shenai
Add a warn message when clip table overflows. If clip table isn't allocated, return from cxgb4_clip_release() to avoid panic. Disable offload if clip isn't enabled in the hardware. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-13cxgb4: Add MPS tracing supportHariprasad Shenai
Handle TRACE_PKT, stack can sniff them on the first port Add debubfs enrty to configure tracing for offload traffic like iWARP & iSCSI for debugging purpose. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-12cxgb4: Add debugfs support to dump tid infoHariprasad Shenai
Add debugfs support to dump tid info like stid, sftid, tids, atid and hwtids Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-12cxgb4: Differentiates between TIDs being used in TCAM and HASHHariprasad Shenai
For the tid info, differentiate from which region the TID is allocated from. It can be from TCAM region or HASH region. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-04cxgb4/cxgb4vf: read the correct bits of PL Who Am I registerHariprasad Shenai
Read the correct bits of PL Who Am I for the Source PF field which has changed in T6 Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-04cxgb4: Add support to dump edc bist statusHariprasad Shenai
Add support to dump edc bist status for ECC data errors Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-04cxgb4: Add debugfs support to dump meminfoHariprasad Shenai
Add debug support to dump memory address ranges of various hardware modules of the adapter. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-07-26cxgb4vf: Read correct FL congestion threshold for T5 and T6Hariprasad Shenai
VF driver was reading incorrect freelist congestion notification threshold for FLM queues when packing is enabled for T5 and T6 adapter. Fixing it now. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-06-10cxgb4: Add debugfs entry to dump channel rateHariprasad Shenai
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-06-10cxgb4: Add debugfs entry to dump CIM PIF logic analyzer contentsHariprasad Shenai
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-06-10cxgb4: Add a debugfs entry to dump CIM MA logic analyzer logsHariprasad Shenai
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-06-03cxgb4: Add support to dump loopback port statsHariprasad Shenai
Add support in ethtool to dump loopback port statistics Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-06-03cxgb4: Add support in ethtool to dump channel statsHariprasad Shenai
Add support in ethtool to dump adapter channel stats Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-06-03cxgb4: Add ethtool support to get adapter statsHariprasad Shenai
Add ethtool support to get adapter specific hardware statistics Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-06-01cxgb4: Adds support for T6 adapterHariprasad Shenai
Adds NIC driver related changes for T6 adapter. Register related changes, MC related changes, VF related changes, doorbell related changes, debugfs changes, etc Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-04-01cxgb4: Fix to dump devlog, even if FW is crashedHariprasad Shenai
Add new Common Code routines to retrieve Firmware Device Log parameters from PCIE_FW_PF[7]. The firmware initializes its Device Log very early on and stores the parameters for its location/size in that register. Using the parameters from the register allows us to access the Firmware Device Log even when the firmware crashes very early on or we're not attached to the firmware Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-02-07cxgb4: Add support in debugfs to dump the congestion control tableHariprasad Shenai
Dump Transport Processor modules congestion control configuration Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-02-07cxgb4: Add support to dump mailbox content in debugfsHariprasad Shenai
Adds support to dump the current contents of mailbox and the driver which owns it. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-02-07cxgb4: Add support for ULP RX logic analyzer output in debugfsHariprasad Shenai
Dump Upper Layer Protocol RX module command trace Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-02-07cxgb4: Added support in debugfs to display TP logic analyzer outputHariprasad Shenai
Dump Transport Processor event trace. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-01-27cxgb4: Added support in debugfs to dump different timer and clock values of ↵Hariprasad Shenai
the adapter Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-01-27cxgb4: Added support in debugfs to dump PM module statsHariprasad Shenai
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-01-27cxgb4: Addded support in debugfs to dump CIM outbound queue contentHariprasad Shenai
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-01-27cxgb4: Added support in debugfs to dump cim ingress bound queue contentsHariprasad Shenai
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-01-24cxgb4: Add debugfs options to dump the rss key, config for PF, VF, etcHariprasad Shenai
Adds support to dump the rss table, rss_config, rss_key, rss_pf_config and rss_vf_config Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-01-08cxgb4: Add support for mps_tcam debugfsHariprasad Shenai
Debug log to get the MPS TCAM table Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-01-08cxgb4: Add support for cim_qcfg entry in debugfsHariprasad Shenai
Adds debug log to get cim queue config Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-01-08cxgb4: Add support for cim_la entry in debugfsHariprasad Shenai
The CIM LA captures the embedded processor’s internal state. Optionally, it can also trace the flow of data in and out of the embedded processor. Therefore, the CIM LA output contains detailed information of what code the embedded processor executed prior to the CIM LA capture. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-01-05cxgb4/cxgb4vf/csiostor: Cleanup PL, XGMAC, SF and MC related register definesHariprasad Shenai
This patch cleanups all PL, XGMAC and SF related macros/register defines that are defined in t4_regs.h and the affected files Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-01-05cxgb4/csiostor: Cleanup TP, MPS and TCAM related register definesHariprasad Shenai
This patch cleanups all TP, MPS and TCAM related macros/register defines that are defined in t4_regs.h and the affected files Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-01-05cxgb4/cxg4vf/csiostor: Cleanup MC, MA and CIM related register definesHariprasad Shenai
This patch cleanups all MC, MA and CIM related macros/register defines that are defined in t4_regs.h and the affected files. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-01-05cxgb4/cxgb4vf/csiostor: Cleanup SGE and PCI related register definesHariprasad Shenai
This patch cleansup remaining SGE related macros/register defines and all PCI related ones that are defined in t4_regs.h and the affected files. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-01-05RDMA/cxgb4/cxgb4vf/csiostor: Cleanup SGE register definesHariprasad Shenai
This patch cleanups all SGE related macros/register defines that are defined in t4_regs.h and the affected files. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-12-09cxgb4/cxgb4vf: Add code to calculate T5 BAR2 Offsets for SGE Queue RegistersHariprasad Shenai
Add new Common Code facilities for calculating T5 BAR2 Offsets for SGE Queue Registers. This new code can handle situations where Queues Per Page * SGE BAR2 Queue Register Area Size > Page Size Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-12-09cxgb4vf: Add and initialize some sge params for VF driverHariprasad Shenai
Add sge_vf_eq_qpp and sge_vf_iq_qpp to (struct sge_params), initialize sge_queues_per_page and sge_vf_qpp in t4vf_get_sge_params(), add new t4vf_prep_adapter() which initializes basic adapter parameters. Grab both SGE_EGRESS_QUEUES_PER_PAGE_VF and SGE_INGRESS_QUEUES_PER_PAGE_VF for VF Drivers since we need both to calculate the User Doorbell area offsets for Egress and Ingress Queues. Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-14Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller
Conflicts: drivers/net/ethernet/chelsio/cxgb4vf/sge.c drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c sge.c was overlapping two changes, one to use the new __dev_alloc_page() in net-next, and one to use s->fl_pg_order in net. ixgbe_phy.c was a set of overlapping whitespace changes. Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-10cxgb4/cxgb4vf: For T5 use Packing and Padding Boundaries for SGE DMA transfersHariprasad Shenai
T5 introduces the ability to have separate Packing and Padding Boundaries for SGE DMA transfers from the chip to Host Memory. This change set takes advantage of that to set up a smaller Padding Boundary to conserve PCI Link and Memory Bandwidth with T5. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-10cxgb4: Cleanup macros so they follow the same style and look consistentHariprasad Shenai
Various patches have ended up changing the style of the symbolic macros/register to different style. As a result, the current kernel.org files are a mix of different macro styles. Since this macro/register defines is used by different drivers a few patch series have ended up adding duplicate macro/register define entries with different styles. This makes these register define/macro files a complete mess and we want to make them clean and consistent. This patch cleans up a part of it. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-09cxgb4/cxgb4vf: Updated the LSO transfer length in CPL_TX_PKT_LSO for T5Hariprasad Shenai
Update the lso length for T5 adapter and fix PIDX_T5 macro Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-28cxgb4: Add support for adaptive rxHariprasad Shenai
Based on original work by Kumar Sanghvi <kumaras@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-28cxgb4: Use BAR2 Going To Sleep (GTS) for T5 and later.Hariprasad Shenai
Use BAR2 GTS for T5. If we are on T4 use the old doorbell mechanism; otherwise ue the new BAR2 mechanism. Use BAR2 doorbells for refilling FL's. Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-01cxgb4: Fix T5 adapter accessing T4 adapter registersHariprasad Shenai
Fixes few register access for both T4 and T5. PCIE_CORE_UTL_SYSTEM_BUS_AGENT_STATUS & PCIE_CORE_UTL_PCI_EXPRESS_PORT_STATUS is T4 only register don't let T5 access them. For T5 MA_PARITY_ERROR_STATUS2 is additionally read. MPS_TRC_RSS_CONTROL is T4 only register, for T5 use MPS_T5_TRC_RSS_CONTROL. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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