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Since macros MTDSWAP_ECNT_MIN() and MTDSWAP_ECNT_MAX() have been
defined in mtdswap.c, use them instead of open-coding.
Signed-off-by: Geliang Tang <geliangtang@gmail.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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To enable eventual removal of pr_warning
This makes pr_warn use consistent for drivers/mtd
Prior to this patch, there were 7 uses of pr_warning and
31 uses of pr_warn in drivers/mtd
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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The current way of building the of_physmap add-ons result in just
the add-on being in the object code, and not the actual core
implementation and regress the Gemini and Versatile.
Bake the physmap_of.o object by baking physmap_of_core.o and
adding the Versatile and/or Gemini add-ons to the final object.
Rename the source file physmap_of_core.c to get the desired
build components.
Suggested-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Fixes: 4f04f68e1598 ("mtd: physmap_of: fixup gemini/versatile dependencies")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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All required stateless 4-byte op codes are supported by this flash
chip. The stateless 4-byte support can't be autodetected due to a
missing 4-byte Address Instruction Table in SFDP.
Fixes hangs on reboot for SoCs expecting the flash chip in 3byte mode.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
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Add new Micron N25Q256A (N25Q256A11) 256Mbit NOR Flash in the list
of supported devices. This chip has the same structure as the N25Q256A
but ID and voltage (1V8) to use is different. Therefore, this adds
N25Q256A11 as n25q256ax1.
In the future, for new Micron memories we could use the patterns
"n25q*ax1" for 1V8 and "n25q*ax3" for 3V3 memories.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.kw@hitachi.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
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Constify all instances of blk_mq_ops, as they are never modified.
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Jens Axboe <axboe@fb.com>
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In commit 6afaf8a484cb ("UBI: flush wl before clearing update marker") I
managed to trigger and fix a similar bug. Now here is another version of
which I assumed it wouldn't matter back then but it turns out UBI has a
check for it and will error out like this:
|ubi0 warning: validate_vid_hdr: inconsistent used_ebs
|ubi0 error: validate_vid_hdr: inconsistent VID header at PEB 592
All you need to trigger this is? "ubiupdatevol /dev/ubi0_0 file" + a
powercut in the middle of the operation.
ubi_start_update() sets the update-marker and puts all EBs on the erase
list. After that userland can proceed to write new data while the old EB
aren't erased completely. A powercut at this point is usually not that
much of a tragedy. UBI won't give read access to the static volume
because it has the update marker. It will most likely set the corrupted
flag because it misses some EBs.
So we are all good. Unless the size of the image that has been written
differs from the old image in the magnitude of at least one EB. In that
case UBI will find two different values for `used_ebs' and refuse to
attach the image with the error message mentioned above.
So in order not to get in the situation, the patch will ensure that we
wait until everything is removed before it tries to write any data.
The alternative would be to detect such a case and remove all EBs at the
attached time after we processed the volume-table and see the
update-marker set. The patch looks bigger and I doubt it is worth it
since usually the write() will wait from time to time for a new EB since
usually there not that many spare EB that can be used.
Cc: stable@vger.kernel.org
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Richard Weinberger <richard@nod.at>
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The clock gate used by orion_nand is not available on all platforms.
When getting this optional clock gate, the code masked all errors.
Let's be more precise here and actually only allow ENOENT.
EPROBE_DEFER is handled like any other error code since probe deferral
is not supported by drivers using module_platform_driver_probe().
Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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The clk handling in orion_nand.c had two problems:
- In the probe function, clk_put() was called for an enabled clock,
which violates the API (see documentation for clk_put() in
include/linux/clk.h)
- In the error path of the probe function, clk_put() could be called
twice for the same clock.
In order to clean this up, use the managed function devm_clk_get() and
store the pointer to the clk in the driver data.
Fixes: baffab28b13120694fa3ebab08d3e99667a851d2 ('ARM: Orion: fix driver probe error handling with respect to clk')
Cc: <stable@vger.kernel.org> # v4.5+
Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Because SUPPORT_15BITECC is defined, the following is dead code:
#elif SUPPORT_8BITECC
iowrite32(8, denali->flash_reg + ECC_CORRECTION);
#endif
Such ifdefs are useless and unacceptable coding style.
These writes are not needed in the first place since ECC_CORRECTION
is set up by the nand_init() function.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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The write accesses to LOGICAL_PAGE_{DATA,SPARE}_SIZE have no effect
because the Denali User's Guide says these registers are read-only.
The hardware automatically multiplies the main/spare size by the
number of devices and update LOGICAL_PAGE_{DATA,SPARE}_SIZE.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Currently, the driver expects DEVICE_CONNECTED is automatically set
by the hardware, but this feature is disabled in some cases.
In such cases, it is the software's responsibility to set up the
DEVICES_CONNECTED register.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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The available configuration of the IP bus width is x8 or x16, so the
possible value for denali->devnum is 1 or 2.
If the value is 1, there is nothing to do. Fixup parameters only
when denali->devnum is 2.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Collect multi NAND fixups into a helper function instead of
scattering them in denali_init().
I am rewording the comment block to clearly explain what is called
"multi device".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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This will allow nand_dt_init() to parse DT properties in the NAND
controller device node.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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The denali_init() needs to setup a bunch of parameters of nand_chip.
Replace denali->nand.(member) with chip->(member) for shorter code.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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Set Features (0xEF) command toggles the R/B# pin after 4 sub feature
parameters are written.
Currently, nand_command(_lp) calls chip->dev_ready immediately after
the address cycle because NAND_CMD_SET_FEATURES falls into default:
label. No wait is needed at this point.
If you see nand_onfi_set_features(), R/B# is already cared by the
chip->waitfunc call.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Read ID (0x90) command does not toggle the R/B# pin. Without this
patch, NAND_CMD_READID falls into the default: label, then R/B# is
checked by chip->dev_ready().
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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The page number is generally stored in an integer type variable.
The uint16_t does not have enough width. I see no reason to use
uint32_t for other members, either. Just use int.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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The Denali NAND controller IP has various customizable features.
SoC vendors can choose desired functions when a delivery RTL is
created. It means there are several variants for this IP. For
example, the Intel version is equipped with 32bit DMA, whereas the
IP for UniPhier SoC family with 64bit DMA.
This driver was originally written for some Intel platforms with
Intel specific things hard-coded. What is worse, the revision
register of this IP does not work to distinguish such features.
We need to do something to make the driver available for other SoCs.
Let's introduce a caps member to the denali_nand_info structure to
switch on/off various features. Also, add struct denali_dt_data to
store the capability associated with compatible string.
Boris suggested this approach in discussion [1] instead of a new DT
property for every feature.
[1] https://lkml.org/lkml/2016/3/29/142
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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The interrupts are enabled by INTR_EN register, then asserted
interrupts can be observed via INTR_STATUS register.
The bit fields are identical between INTR_EN and INTR_STATUS, so we
can merge the bit field macros. Likewise for DATA_INTR.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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The same comment "Mapped io reg base address" for flash_reg and
flash_mem probably due to the mistake of copy-paste work.
Of course, the latter is not the register base address.
Reword the comments using the terminology in the Denali User's Guide.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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These members are not used at all.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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This macro is defined twice in denali.c (around line 98 and
line 651), so remove the second one.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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All of these macros are not used at all.
CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR is not used for anything but
defining SCRATCH_REG_ADDR. The config option should go away as well.
I am removing some register macros. They are not used, and do not
exist in recent IP versions.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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The nand_default_block_markbad() and scan_block_fast() use high
level APIs to get access to the BBM.
On the other hand, nand_block_bad (the default implementation of
->block_bad) calls the lower level ->cmdfunc hook. This prevents
drivers from using ->ecc.read_oob() even if optimized read operation
is implemented. Besides, some NAND controllers may protect the BBM
with ECC.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Currently, it is valid to specify both "nand-ecc-step-size" and
"nand-ecc-strength", but not allowed to set only one of them.
This requirement has a conflict with "nand-ecc-maximize"; this flag
is used when you want the driver to choose the best ECC strength.
If "nand-ecc-maximize" is set, "nand-ecc-strength" is very likely to
be unset.
It would be possible to make the if-conditional more complex by
adding the check for the NAND_ECC_MAXIMIZE flag, but I chose to drop
the check entirely. I thought of the situation where the hardware
has a fixed ECC step size (so it can be hard-coded in the driver),
whereas the ECC strength is configurable by software. In that case,
we may want to only set "nand-ecc-strength" (or "nand-ecc-maximize")
in DT.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Since commit 4404d7d821c33 ("mtd: nand: fsmc: remove stale non-DT probe
path"), the fsmc NAND driver only supports Device Tree probing, and
therefore has a "depends on OF" in its Kconfig option.
Due to this the #ifdef CONFIG_OF ... #endif condition in the driver code
is no longer necessary.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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These definitions are not used anywhere in the driver, so remove them.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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This commit switches the fsmc_nand driver from clk_get() to
devm_clk_get(), which saves a few clk_put().
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Since the driver now only supports DT probing, it doesn't make a lot of
sense to have a private data structure called platform_data, fill it in
with information coming from the DT, and then copying this into the
driver-specific structure fsmc_nand_data.
So instead, we remove fsmc_nand_platform_data entirely, and have
fsmc_nand_probe_config_dt() fill in the fsmc_nand_data structure
directly.
This requires calling fsmc_nand_probe_config_dt() after fsmc_nand_data
has been allocated instead of before.
Also, as an added bonus, we now propagate properly the return value of
fsmc_nand_probe_config_dt() instead of returning -ENODEV on failure. The
error message is also removed, since it no longer made any sense.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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It is already done a few lines before.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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The ->partitions and ->nr_partitions fields of struct
fsmc_nand_platform_data are never set anywhere, so they are always
NULL/0. The corresponding fields in 'struct fsmc_nand_data' are set to the
value of the same fields in fsmc_nand_platform_data, i.e NULL/0.
Therefore, we remove those two fields, and pass NULL/0 directly to
mtd_device_register(), like many other NAND drivers already do.
At the same time, we remove the comment about the fact that we pass
partition info, since we are no longer doing this.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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The read_dma_priv and write_dma_priv fields of fsmc_nand_platform_data
are never set, so this commit removes them.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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host->select_chip used to point to the ->select_bank() function provided
by the platform data, but the latter no longer exists. Therefore
host->select_chip is always NULL.
Due to this, the fsmc_select_chip() does nothing, except:
chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
when chipnr is -1, which is exactly what the default implementation of
->select_chip() does in the NAND framework. So, this commit kills
fsmc_select_chip() entirely.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Since commit 4404d7d821c3 ("mtd: nand: fsmc: remove stale non-DT probe
path"), only DT probing is used for the fsmc_nand driver. Due to this,
the ->select_bank() field of fsmc_nand_platform_data is never used, so
this commit gets rid of it.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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This commit simply moves the "struct fsmc_nand_data" definition to be
towards the beginning of the file, with the other defines and type
definitions, instead of in the middle of the driver code. This is much
more consistent with what most Linux drivers do.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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In commit eea628199d5b ("mtd: Add device-tree support to fsmc_nand"),
Device Tree support was added to the fmsc_nand driver. However, this
code has a bug in how it handles the bank-width DT property to set the
bus width.
Indeed, in the function fsmc_nand_probe_config_dt() that parses the
Device Tree, it sets pdata->width to either 8 or 16 depending on the
value of the bank-width DT property.
Then, the ->probe() function will test if pdata->width is equal to
FSMC_NAND_BW16 (which is 2) to set NAND_BUSWIDTH_16 in
nand->options. Therefore, with the DT probing, this condition will never
match.
This commit fixes that by removing the "width" field from
fsmc_nand_platform_data and instead have the fsmc_nand_probe_config_dt()
function directly set the appropriate nand->options value.
It is worth mentioning that if this commit gets backported to older
kernels, prior to the drop of non-DT probing, then non-DT probing will
be broken because nand->options will no longer be set to
NAND_BUSWIDTH_16.
Fixes: eea628199d5b ("mtd: Add device-tree support to fsmc_nand")
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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We should be return -ENOMEM instead of success.
Fixes: 626994e07480 ("mtd: nand: hynix: Add read-retry support for 1x nm MLC NANDs")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Macronix MX25U2033E, MX25U4033E and MX25U4035 devices are used in 4/5/6th
generation Kindle ebook readers. Both MX25U403x variants share the same
JEDEC id. Add those spi-nor variants and the similar MX25U8035 mentioned
in the same set of datasheets.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
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Winbond W25Q20BW devices are used in 4/5th generation Kindle ebook readers.
Add this spi-nor device and the similar W25Q20 devices to the list of known
devices.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
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Micron n25q00 are stacked chips, thus do not support chip erase.
>From now spi-nor framework will not send chip erase command,
instead will use sector at time erase procedure.
Signed-off-by: Marcin Krzeminski <mar.krzeminski@gmail.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
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Currently it is possible to disable chip erase for spi-nor driver.
Some modern stacked (multi die) flash chips do not support chip
erase opcode at all but spi-nor framework needs to cope with them too.
This commit extends existing functionality to allow disable
chip erase for a single flash chip.
Signed-off-by: Marcin Krzeminski <mar.krzeminski@gmail.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
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This is not as straightforward a conversion as the others
in this series. These drivers did not originally make use of
kobj.parent so they likely suffered from a use after free bug if
someone unregistered the devices while they are being used.
In order to make the conversions, switch from device_register
to device_initialize / cdev_device_add.
In build.c, this patch unwinds a complicated mess of extra
get_device/put_devices and reference tracking by moving device_initialize
early in the attach process. Then it always uses put_device and instead of
using device_unregister and extra get_devices everywhere we just use
cdev_device_del and one put_device once everything is completely done.
This simplifies things dramatically and makes it easier to reason about.
In vmt.c, the patch pushes device initialization up to the beginning of the
device creation and then that function only needs to use put_device
in the error path which simplifies things a good deal.
Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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On some hardware, the nCE signal is wired to the ChipSelect associated
to bus address of the NAND, so it is automatically driven during the
memory access and it is not managed by a GPIO.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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As NAND support for Freescale/NXP IFC controller is available on
LS1021A, the dependency for LS1021A is added.
LS1021A is an earlier product and is not compatible with later
LayerScape architecture. So ARCH_LAYERSCAPE can't cover LS1021A.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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do_dma() uses an int to pass the DMA data direction information and
pass the same value to dmaengine_prep_slave_sg().
Currently, DMA_{FROM,TO}_DEVICE match DMA_{DEV_TO_MEM,MEM_TO_DEV}
definitions so it works fine, but assuming this will always be the case
is not safe.
Enforce enum dma_data_direction type in the function prototype and make
the enum dma_data_direction -> enum dma_transfer_direction conversion
explicit.
Reported-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
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trivial fix to spelling mistake in NS_ERR error message
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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As of commit bb475230b8e5 ("reset: make optional functions really
optional"), the reset framework API calls use NULL pointers to describe
optional, non-present reset controls.
This allows to return errors from devm_reset_control_get_optional and to
call reset_control_(de)assert unconditionally.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Geliang Tang
Joe Perches
Linus Walleij
Mathias Kresin
Nobuhiro Iwamatsu
Eric Biggers
Sebastian Siewior
Simon Baatz
Masahiro Yamada
Andrew F. Davis
Thomas Petazzoni
Dan Carpenter
Alexander Kurz
mar.krzeminski
Logan Gunthorpe
Christophe Leroy
Alison Wang
Boris Brezillon
Colin Ian King
Philipp Zabel