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AgeCommit message (Expand)Author
2019-11-25Merge branch 'v5.2/standard/base' into v5.2/standard/xlnx-socBruce Ashfield
2019-11-25Merge tag 'v5.2.24' into v5.2/standard/baseBruce Ashfield
2019-11-25clk: ti: dra7: Fix mcasp8 clock bitsTony Lindgren
2019-11-10Merge branch 'v5.2/standard/base' into v5.2/standard/xlnx-socBruce Ashfield
2019-11-10Merge tag 'v5.2.22' into v5.2/standard/baseBruce Ashfield
2019-11-09clk-sunxi: fix a missing-check bug in sunxi_divs_clk_setup()Gen Zhang
2019-10-29Merge branch 'v5.2/standard/base' into v5.2/standard/xlnx-socBruce Ashfield
2019-10-29clk: zynqmp: fix memory leak in zynqmp_register_clocksQuanyang Wang
2019-10-10Merge branch 'v5.2/standard/base' into v5.2/standard/xlnx-socBruce Ashfield
2019-10-10Merge branch 'v5.2/standard/base' into v5.2/standard/xlnx-socBruce Ashfield
2019-10-07clk: sprd: add missing kfreeChunyan Zhang
2019-10-07clk: Make clk_bulk_get_all() return a valid "id"Bjorn Andersson
2019-10-07clk: imx: clk-pll14xx: unbypass PLL by defaultPeng Fan
2019-10-07clk: imx: pll14xx: avoid glitch when set ratePeng Fan
2019-10-07clk: at91: select parent if main oscillator or bypass is enabledEugen Hristev
2019-10-07clk: qcom: gcc-sdm845: Use floor ops for sdcc clksStephen Boyd
2019-10-07clk: renesas: cpg-mssr: Set GENPD_FLAG_ALWAYS_ON for clock domainGeert Uytterhoeven
2019-10-07clk: renesas: mstp: Set GENPD_FLAG_ALWAYS_ON for clock domainGeert Uytterhoeven
2019-10-07clk: zx296718: Don't reference clk_init_data after registrationStephen Boyd
2019-10-07clk: sprd: Don't reference clk_init_data after registrationStephen Boyd
2019-10-07clk: meson: axg-audio: Don't reference clk_init_data after registrationStephen Boyd
2019-10-07clk: sirf: Don't reference clk_init_data after registrationStephen Boyd
2019-10-07clk: actions: Don't reference clk_init_data after registrationStephen Boyd
2019-10-07clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocksIcenowy Zheng
2019-10-07clk: qoriq: Fix -Wunused-const-variableNathan Huckleberry
2019-10-07clk: imx8mq: Mark AHB clock as criticalAbel Vesa
2019-10-01clk: imx: imx8mm: fix audio pll settingPeng Fan
2019-09-19Merge branch 'v5.2/standard/base' into v5.2/standard/xlnx-socBruce Ashfield
2019-09-19clk: rockchip: Don't yell about bad mmc phases when gettingDouglas Anderson
2019-09-19clk: Simplify debugfs printing and add a newlineStephen Boyd
2019-09-19clk: Fix debugfs clk_possible_parents for clks without parent string namesChen-Yu Tsai
2019-09-15Merge branch 'v5.2/standard/base' into v5.2/standard/xlnx-socBruce Ashfield
2019-09-10clk: Fix potential NULL dereference in clk_fetch_parent_index()Martin Blumenstingl
2019-09-10clk: Fix falling back to legacy parent string matchingStephen Boyd
2019-09-10clk: samsung: exynos542x: Move MSCL subsystem clocks to its sub-CMUMarek Szyprowski
2019-09-10clk: samsung: exynos5800: Move MAU subsystem clocks to MAU sub-CMUSylwester Nawrocki
2019-09-10clk: samsung: Change signature of exynos5_subcmus_init() functionSylwester Nawrocki
2019-09-09Merge branch 'v5.2/standard/base' into v5.2/standard/xlnx-socBruce Ashfield
2019-08-29clk: socfpga: stratix10: fix rate caclulationg for cnt_clksDinh Nguyen
2019-08-27Merge branch 'v5.2/standard/base' into v5.2/standard/xlnx-socBruce Ashfield
2019-08-25clk: renesas: cpg-mssr: Fix reset control race conditionGeert Uytterhoeven
2019-08-25clk: sprd: Select REGMAP_MMIO to avoid compile errorsChunyan Zhang
2019-08-25clk: at91: generated: Truncate divisor to GENERATED_MAX_DIV + 1Codrin Ciubotariu
2019-08-12Merge branch 'v5.2/standard/base' into v5.2/standard/xlnx-socBruce Ashfield
2019-08-06clk: mediatek: mt8183: Register 13MHz clock earlier for clocksourceWeiyi Lu
2019-08-06clk: sprd: Add check for return value of sprd_clk_regmap_init()Chunyan Zhang
2019-08-06clk: tegra210: fix PLLU and PLLU_OUT1JC Kuo
2019-08-06clk: meson: mpll: properly handle spread spectrumJerome Brunet
2019-07-27Merge branch 'v5.2/standard/base' into v5.2/standard/xlnx-socBruce Ashfield
2019-07-26clk: imx: imx8mm: correct audio_pll2_clk to audio_pll2_outPeng Fan