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path: root/drivers/clk/meson
AgeCommit message (Expand)Author
2019-05-10clk: meson-gxbb: round the vdec dividers to closestMaxime Jourdan
2019-04-17Revert "clk: meson: clean-up clock registration"Neil Armstrong
2019-04-05clk: meson: clean-up clock registrationJerome Brunet
2018-12-14Merge branch 'clk-fixes' into clk-nextStephen Boyd
2018-12-13Merge tag 'meson-clk-4.21-2' of https://github.com/BayLibre/clk-meson into cl...Stephen Boyd
2018-12-11clk: meson: axg-audio: use the clk input helper functionJerome Brunet
2018-12-05clk: meson: add clk-input helper functionJerome Brunet
2018-12-03clk: meson: Mark some things staticStephen Boyd
2018-12-03clk: meson: meson8b: add the read-only video clock treesMartin Blumenstingl
2018-12-03clk: meson: meson8b: add the fractional divider for vid_pll_dcoMartin Blumenstingl
2018-12-03clk: meson: meson8b: fix the offset of vid_pll_dco's N valueMartin Blumenstingl
2018-11-27clk: meson: Fix GXL HDMI PLL fractional bits widthNeil Armstrong
2018-11-23clk: meson: meson8b: add the CPU clock post divider clocksMartin Blumenstingl
2018-11-23clk: meson: meson8b: rename cpu_div2/cpu_div3 to cpu_in_div2/cpu_in_div3Martin Blumenstingl
2018-11-23clk: meson: clk-regmap: add read-only gate opsMartin Blumenstingl
2018-11-23clk: meson: meson8b: allow changing the CPU clock treeMartin Blumenstingl
2018-11-23clk: meson: meson8b: run from the XTAL when changing the CPU frequencyMartin Blumenstingl
2018-11-23clk: meson: meson8b: add support for more M/N values in sys_pllMartin Blumenstingl
2018-11-23clk: meson: meson8b: mark the CPU clock as CLK_IS_CRITICALMartin Blumenstingl
2018-11-23clk: meson: meson8b: do not use cpu_div3 for cpu_scale_out_selMartin Blumenstingl
2018-11-23clk: meson: clk-pll: check if the clock is already enabledMartin Blumenstingl
2018-11-23clk: meson: meson8b: fix the width of the cpu_scale_div clockMartin Blumenstingl
2018-11-23clk: meson: meson8b: fix incorrect divider mapping in cpu_scale_tableMartin Blumenstingl
2018-11-23clk: meson: meson8b: use the HHI syscon if availableMartin Blumenstingl
2018-11-23clk: meson-gxbb: Add video clocksNeil Armstrong
2018-11-23dt-bindings: clk: meson-gxbb: Add Video clock bindingsNeil Armstrong
2018-11-23clk: meson-gxbb: Fix HDMI PLL for GXL SoCsNeil Armstrong
2018-11-23clk: meson: Add vid_pll divider driverNeil Armstrong
2018-11-08clk: meson: axg: mark fdiv2 and fdiv3 as criticalJerome Brunet
2018-11-08clk: meson-gxbb: set fclk_div3 as CLK_IS_CRITICALChristian Hewitt
2018-09-26clk: meson: meson8b: use the regmap in the internal reset controllerMartin Blumenstingl
2018-09-26clk: meson: meson8b: register the clock controller earlyMartin Blumenstingl
2018-09-26clk: meson-axg: pcie: drop the mpll3 clock parentYixun Lan
2018-09-26clk: meson: axg: round audio system master clocks downJerome Brunet
2018-09-26clk: meson: clk-pll: drop hard-coded rates from pll tablesJerome Brunet
2018-09-26clk: meson: clk-pll: remove od parametersJerome Brunet
2018-09-26clk: meson: clk-pll: drop CLK_GET_RATE_NOCACHE where unnecessaryJerome Brunet
2018-09-26clk: meson: clk-pll: add enable bitJerome Brunet
2018-07-09clk: meson: add gen_clkJerome Brunet
2018-07-09clk: meson: gxbb: remove HHI_GEN_CLK_CTNL duplicate definitionJerome Brunet
2018-07-09clk: meson-axg: add clocks required by pcie driverYixun Lan
2018-07-09clk: meson: remove unused clk-audio-divider driverJerome Brunet
2018-07-09clk: meson: stop rate propagation for audio clocksJerome Brunet
2018-07-09clk: meson: axg: add the audio clock controller driverJerome Brunet
2018-07-09clk: meson: add axg audio sclk divider driverJerome Brunet
2018-07-09clk: meson: add triple phase clock driverJerome Brunet
2018-07-09clk: meson: add clk-phase clock driverJerome Brunet
2018-07-09clk: meson: clean-up meson clock configurationJerome Brunet
2018-07-09clk: meson: remove obsolete register accessJerome Brunet
2018-06-21clk: meson: audio-divider is one basedJerome Brunet