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2019-04-02ARM: dts: sunxi: Remove useless address and size cellsMaxime Ripard
The NAND chips in our DTs have address and size cells, even though they don't have any child nodes. Remove them. Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-03-25ARM: sunxi: Fix the USB PHY ID detect GPIO propertiesMaxime Ripard
While the USB PHY Device Tree mandates that the name of the ID detect pin should be usb0_id_det-gpios, a significant number of device tree use usb0_id_det-gpio instead. This was functional because the GPIO framework falls back to the gpio suffix that is legacy, but we should fix this. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-11-28ARM: dts: sun5i: Provide default muxing for relevant controllersMaxime Ripard
The I2C's, MMC0 and MMC1 controllers have only one muxing option in the SoC. In such a case, we can just move the muxing into the DTSI, and remove it from the DTS. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2018-11-28ARM: dts: sun5i: Change pinctrl nodes to avoid warningMaxime Ripard
All our pinctrl nodes were using a node name convention with a unit-address to differentiate the different muxing options. However, since those nodes didn't have a reg property, they were generating warnings in DTC. In order to accomodate for this, convert the old nodes to the syntax we've been using for the new SoCs, including removing the letter suffix of the node labels to the bank of those pins to make things more readable. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2018-11-28ARM: dts: sun5i: Remove all useless pinctrl nodesMaxime Ripard
The gpio pinctrl nodes are redundant and as such useless most of the times. Since they will also generate warnings in DTC, we can simply remove most of them. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2017-03-06ARM: sun5i: gr8: Use common sun5i DTSIMaxime Ripard
Most of the GR8 DTSI is duplicated with the common sun5i DTSI, and some of the extra nodes defined there actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it, and include the sun5i DTSI. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-12-26ARM: sunxi: Convert pinctrl nodes to generic bindingsMaxime Ripard
Now that we can handle the generic pinctrl bindings, convert our DT to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-12-26ARM: sunxi: Remove useless allwinner,pull propertyMaxime Ripard
The allwinner,pull property set to NO_PULL was really considered our default (and wasn't even changing the default value in the code). Remove these properties to make it obvious that we do not set anything in such a case. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-12-26ARM: sunxi: Remove useless allwinner,drive propertyMaxime Ripard
The allwinner,drive property set to 10mA was really considered as our default. Remove all those properties entirely to make that obvious. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-11-22ARM: gr8: Add CHIP Pro supportMaxime Ripard
The CHIP Pro is a small embeddable board. It features a GR8, an AXP209 PMIC, a 512MB SLC NAND and a WiFi/BT chip. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>