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2020-11-20ARM: dts: BCM5301X: Provide defaults ports container nodeFlorian Fainelli
Provide an empty 'ports' container node with the correct #address-cells and #size-cells properties. This silences the following warning: arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dt.yaml: ethernet-switch@18007000: 'oneOf' conditional failed, one must be fixed: 'ports' is a required property 'ethernet-ports' is a required property From schema: Documentation/devicetree/bindings/net/dsa/b53.yaml Acked-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-11-20ARM: dts: BCM5301X: Add a default compatible for switch nodeFlorian Fainelli
Provide a default compatible string which is based on the 53011 SRAB compatible by default. The 4709 and 47094 default to the 53012 SRAB compatible. This allows us to have sane defaults and silences the following warnings: arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dt.yaml: ethernet-switch@18007000: compatible: 'oneOf' conditional failed, one must be fixed: ['brcm,bcm5301x-srab'] is too short 'brcm,bcm5325' was expected 'brcm,bcm53115' was expected 'brcm,bcm53125' was expected 'brcm,bcm53128' was expected 'brcm,bcm5365' was expected 'brcm,bcm5395' was expected 'brcm,bcm5389' was expected 'brcm,bcm5397' was expected 'brcm,bcm5398' was expected 'brcm,bcm11360-srab' was expected 'brcm,bcm5301x-srab' is not one of ['brcm,bcm53010-srab', 'brcm,bcm53011-srab', 'brcm,bcm53012-srab', 'brcm,bcm53018-srab', 'brcm,bcm53019-srab'] 'brcm,bcm5301x-srab' is not one of ['brcm,bcm11404-srab', 'brcm,bcm11407-srab', 'brcm,bcm11409-srab', 'brcm,bcm58310-srab', 'brcm,bcm58311-srab', 'brcm,bcm58313-srab'] 'brcm,bcm5301x-srab' is not one of ['brcm,bcm58522-srab', 'brcm,bcm58523-srab', 'brcm,bcm58525-srab', 'brcm,bcm58622-srab', 'brcm,bcm58623-srab', 'brcm,bcm58625-srab', 'brcm,bcm88312-srab'] 'brcm,bcm5301x-srab' is not one of ['brcm,bcm3384-switch', 'brcm,bcm6328-switch', 'brcm,bcm6368-switch'] From schema: Documentation/devicetree/bindings/net/dsa/b53.yaml Acked-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-11-20ARM: dts: BCM5301X: Update Ethernet switch node nameFlorian Fainelli
Update the switch unit name from srab to ethernet-switch, allowing us to fix warnings such as: CHECK arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dt.yaml arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dt.yaml: srab@18007000: $nodename:0: 'srab@18007000' does not match '^(ethernet-)?switch(@.*)?$' From schema: Documentation/devicetree/bindings/net/dsa/b53.yaml Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-11-11ARM: dts: BCM5301X: Move CRU devices to the CRU nodeRafał Miłecki
Clocks and thermal blocks are part of the CRU ("Clock and Reset Unit" or "Central Resource Unit"). Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-11-11ARM: dts: BCM5301X: Use corretc pinctrl compatible for 4709xVivek Unune
BCM47094 version of pinmux uses different compatible and supports MDIO pinmux pins. Hence, use the correct compatible string and defines the MDIO pins group. Signed-off-by: Vivek Unune <npcomplete13@gmail.com> Acked-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-11-11ARM: dts: BCM5310X: Harmonize xHCI DT nodes nameSerge Semin
In accordance with the Generic xHCI bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "generic-xhci"-compatible nodes are correctly named. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-11-11ARM: dts: BCM5301X: Harmonize EHCI/OHCI DT nodes nameSerge Semin
In accordance with the Generic EHCI/OHCI bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible nodes are correctly named. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-10-24Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull ARM Devicetree updates from Olof Johansson: "As usual, most of the changes are to devicetrees. Besides smaller fixes, some refactorings and cleanups, some of the new platforms and chips (or significant features) supported are below: Broadcom boards: - Cisco Meraki MR32 (BCM53016-based) - BCM2711 (RPi4) display pipeline support Actions Semi boards: - Caninos Loucos Labrador SBC (S500-based) - RoseapplePi SBC (S500-based) Allwinner SoCs/boards: - A100 SoC with Perf1 board - Mali, DMA, Cetrus and IR support for R40 SoC Amlogic boards: - Libretch S905x CC V2 board - Hardkernel ODROID-N2+ board Aspeed boards/platforms: - Wistron Mowgli (AST2500-based, Power9 OpenPower server) - Facebook Wedge400 (AST2500-based, ToR switch) Hisilicon SoC: - SD5203 SoC Nvidia boards: - Tegra234 VDK, for pre-silicon Orin SoC NXP i.MX boards: - Librem 5 phone - i.MX8MM DDR4 EVK - Variscite VAR-SOM-MX8MN SoM - Symphony board - Tolino Shine 2 HD - TQMa6 SoM - Y Soft IOTA Orion Rockchip boards: - NanoPi R2S board - A95X-Z2 board - more Rock-Pi4 variants STM32 boards: - Odyssey SOM board (STM32MP157CAC-based) - DH DRC02 board Toshiba SoCs/boards: - Visconti SoC and TPMV7708 board" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (638 commits) ARM: dts: nspire: Fix SP804 users arm64: dts: lg: Fix SP804 users arm64: dts: lg: Fix SP805 clocks ARM: mstar: Fix up the fallout from moving the dts/dtsi files ARM: mstar: Add mstar prefix to all of the dtsi/dts files ARM: mstar: Add interrupt to pm_uart ARM: mstar: Add interrupt controller to base dtsi ARM: dts: meson8: remove two invalid interrupt lines from the GPU node arm64: dts: ti: k3-j7200-common-proc-board: Add USB support arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function arm64: dts: ti: k3-j7200-main: Add USB controller arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux dt-bindings: ti-serdes-mux: Add defines for J7200 SoC ARM: dts: hisilicon: add SD5203 dts ARM: dts: hisilicon: fix the system controller compatible nodes arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 arm64: dts: zynqmp: Remove undocumented u-boot properties arm64: dts: zynqmp: Remove additional compatible string for i2c IPs arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml ...
2020-09-09ARM: dts: BCM5301X: Fixed QSPI compatible stringFlorian Fainelli
The string was incorrectly defined before from least to most specific, swap the compatible strings accordingly. Fixes: 1c8f40650723 ("ARM: dts: BCM5301X: convert to iProc QSPI") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-08-26ARM: dts: BCM5301X: Specify pcie2 in the DTChristian Lamparter
The SoC supports three pcie ports. Currently, only pcie0 and pcie1 are enabled. This patch adds the pcie2 port as well. Signed-off-by: Christian Lamparter <chunkeey@gmail.com> Reviewed-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-08-26ARM: dts: BCM5301X: Specify uart2 in the DTChristian Lamparter
The BCM53016 in the Meraki MR32 utilizes the third "uart2" to connect to a on-board Bluetooth-LE 4.0 BCM20732 chip. Signed-off-by: Christian Lamparter <chunkeey@gmail.com> Reviewed-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-08-26ARM: dts: BCM5301X: Specify PWM in the DTChristian Lamparter
The BCM53016 in the Meraki MR32 uses the on-chip PWM controller to drive a tri-color RGB LED. Since I plan to use the PWM, I made a label for the pwm's pinmux node. This way, it can be easily referenced.... And Also included a label for the i2c since I'm going to need it in the future too. Signed-off-by: Christian Lamparter <chunkeey@gmail.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-12-09ARM: dts: BCM5301X: Fix MDIO node address/size cellsFlorian Fainelli
The MDIO node on BCM5301X had an reversed #address-cells and #size-cells properties, correct those, silencing checker warnings: .../linux/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dt.yaml: mdio@18003000: #address-cells:0:0: 1 was expected Reported-by: Simon Horman <simon.horman@netronome.com> Fixes: 23f1eca6d59b ("ARM: dts: BCM5301X: Specify MDIO bus in the DT") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-06-22ARM: dts: BCM5301X: Fix most DTC W=1 warningsFlorian Fainelli
Fix the bulk of the unit_address_vs_reg warnings and unnecessary \#address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-01-30ARM: dts: Kill off skeleton{64}.dtsiRob Herring
Remove the usage of skeleton.dtsi in the remaining dts files. It was deprecated since commit 9c0da3cc61f1 ("ARM: dts: explicitly mark skeleton.dtsi as deprecated"). This will make adding a unit-address to memory nodes easier. The main tricky part to removing skeleton.dtsi is we could end up with no /memory node at all when a bootloader depends on one being present. I hacked up dtc to check for this condition. Acked-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Antoine Tenart <antoine.tenart@bootlin.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Vladimir Zapolskiy <vz@mleia.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Gregory CLEMENT <gregory.clement@bootlin.com> Tested-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-11-30ARM: dts: BCM5301X: Describe Northstar pins mux controllerRafał Miłecki
This describes hardware & will allow referencing pin functions. The first usage is UART1 which allows supporting devices using it. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-08-31ARM: dts: BCM5301X: Specify flash partitionsRafał Miłecki
Most devices use Broadcom standard partitions which allows them to be described with the "brcm,bcm947xx-cfe-partitions". Exceptions are: 1) TP-LINK devices which use "os-image" partition with TRX containing kernel only + separated rootfs partition. 2) Asus RT-AC87U with custom "asus" partition. This commit also removes undocumented and unsupported linux,part-probe binding which got accidentally upstreamed while describing SPI controller. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-07-14Merge tag 'arm-soc/for-4.19/devicetree' of ↵Olof Johansson
https://github.com/Broadcom/stblinux into next/dt This pull request contains Broadcom ARM-based SoCs Device Tree changes for 4.19, please pull the following: - Clement adds ethernet aliases to the Cygnus DTS include file such that a DT aware bootloader such as u-boot can properly insert MAC addresses - Mohamed adds a Device Tree node for the HWRNG found on Cygnus SoCs - Vivek migrates all the BCM5301x (Northstar) Device Tree sources to use the proper USB 3.0 PHY representation using its parent MDIO bus. Vivek also completes the Linksys EA9500 Device Tree by adding support for LEDs, internal and external switches. - Rafal adds the ARM architected timer to the BCM53573 Device Tree include file. - Eric adds the Performance Monitoring Unit to the BCM2837 DTS include file since it was absent before - Boris adds the BCM283x transposer block to the Device Tree - Stefan adds the Raspberry Pi Compute Module (CM1) Device Tree include and sources. * tag 'arm-soc/for-4.19/devicetree' of https://github.com/Broadcom/stblinux: ARM: dts: BCM5301X: Add support for Linksys EA9500 ARM: dts: BCM53573: Add architected timer ARM: dts: BCM5301X: Make USB 3.0 PHY use MDIO PHY driver ARM: dts: cygnus: enable iproc-hwrng ARM: dts: cygnus: add ethernet0 alias ARM: dts: bcm283x: Add Transposer block ARM: dts: bcm283x: Add the PMU to the devicetree. ARM: dts: add Raspberry Pi Compute Module and IO board Signed-off-by: Olof Johansson <olof@lixom.net>
2018-07-09ARM: dts: BCM5301X: Make USB 3.0 PHY use MDIO PHY driverVivek Unune
Currently, the USB 3.0 PHY in bcm5301x.dtsi uses platform driver which requires register range "ccb-mii" <0x18003000 0x1000>. This range overlaps with MDIO cmd and param registers (<0x18003000 0x8>). Essentially, the platform driver partly acts like a MDIO bus driver, hence to use of this register range. In some Northstar devices like Linksys EA9500, secondary switch is connected via external MDIO. The only way to access and configure the external switch is via MDIO bus. When we enable the MDIO bus in it's current state, the MDIO bus and any child buses fail to register because of the register range overlap. On Northstar, the USB 3.0 PHY is connected at address 0x10 on the internal MDIO bus. This change moves the usb3_phy node and makes it a child node of internal MDIO bus. Thanks to Rafał Miłecki's commit af850e14a7ae ("phy: bcm-ns-usb3: add MDIO driver using proper bus layer") the same USB 3.0 platform driver can now act as USB 3.0 PHY MDIO driver. Tested on Linksys Panamera (EA9500) Signed-off-by: Vivek Unune <npcomplete13@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-06-18ARM: dts: BCM5301x: Fix i2c controller interrupt typeFlorian Fainelli
The i2c controller should be using IRQ_TYPE_LEVEL_HIGH, fix that. Fixes: bb097e3e0045 ("ARM: dts: BCM5301X: Add I2C support to the DT") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-10-20arm: dts: fix unit-address leading 0sRob Herring
Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using the following command: perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm/boot/dts -type -f -name '*.dts*' Dropped changes to ARM, Ltd. boards LED nodes and manually fixed up some occurrences of uppercase hex. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-08-01ARM: dts: BCM5301X: Specify USB ports for each controllerRafał Miłecki
Northstar has 3 controllers: OHCI and EHCI (each with 2 ports) and XHCI (with just 1 port). Describe them in the DT. In future this will allow to reference them as trigger sources. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-06-12ARM: dts: BCM5301X: Specify MDIO bus in the DTRafał Miłecki
Northstar devices have MDIO bus that may contain various PHYs attached. A common example is USB 3.0 PHY (that doesn't have an MDIO driver yet). Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-06-12ARM: dts: BCM5301X: Add CPU thermal sensor and zoneRafał Miłecki
This uses CPU thermal sensor available on every Northstar chipset to monitor temperature. We don't have any cooling or throttling so only a critical trip was added. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-03-22ARM: dts: BCM5301X: Specify serial console params in dtsi filesRafał Miłecki
So far every Northstar device we have seen was using the same serial console params (115200n8). It probably make the most sense to put it in some proper dtsi files instead of repeating over and over for every single device. As different boards may use different bootloaders it seems the safest idea is to use board specific dtsi files. Just in case some vendor decides to use different UART (parameters) this can be always easily overwritten. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-03-18ARM: dts: BCM5301X: Add I2C support to the DTJon Mason
Add I2C support to the bcm5301x Device Tree. Since no driver changes are needed to enable this hardware, only the device tree changes are required to make this functional. Signed-off-by: Jon Mason <jonmason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-03-18ARM: dts: BCM5301X: Add TWD WD Support to DTJon Mason
Add support for the ARM TWD Watchdog to the bcm5301x device tree. The ARM TWD timer allocated the register space for the WDT, so this patch necessitated shrinking that. Also, the GIC masks were added for these. Signed-off-by: Jon Mason <jonmason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-03-18ARM: dts: BCM5301X: Correct GIC_PPI interrupt flagsJon Mason
GIC_PPI flags were misconfigured for the timers, resulting in errors like: [ 0.000000] GIC: PPI11 is secure or misconfigured Changing them to being edge triggered corrects the issue Suggested-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Jon Mason <jon.mason@broadcom.com> Fixes: d27509f1 ("ARM: BCM5301X: add dts files for BCM4708 SoC") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-03-05ARM: dts: BCM5301X: convert to iProc QSPIJon Mason
The iproc-qspi driver is the SPI driver that should be used going forward. Modify the SPI DT entry to use this driver, and add an entry in the bcm953012k DTS file to enable the SPI. Tested on the bcm953012k board. Signed-off-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-01-18ARM: dts: BCM5301X: Set 5 GHz wireless frequency limits on Netgear R8000Rafał Miłecki
Netgear R8000 is a tri-band home router. It has three BCM43602 chipsets two of them for 5 GHz band. Both seem the same and their firmwares report the same set of channels. The problem is due to hardware / board design there are extra limitations that should be respected. First PHY should be used for U-NII-2 and U-NII-3. Third PHY should be used for U-NII-1. Using them in a different way may result in wireless not working or in noticeably reduced performance. Basic version of this info was provided by Broadcom employee, then it has been verified by me using original vendor firmware (which has limitations hardcoded in UI). This patch uses recently introduced ieee80211-freq-limit property to describe these limitations at DT level. Referencing PCIe devices in DT required specifying all related bridges. Below you can see (a bit complex) PCI tree from R8000 that explains all entries that I needed to put in DT. 0000:00:00.0 14e4:8012 Bridge Device └─ 0000:01:00.0 14e4:aa52 Network Controller 0001:00:00.0 14e4:8012 Bridge Device └─ 0001:01:00.0 10b5:8603 Bridge Device ├─ 0001:02:01.0 10b5:8603 Bridge Device │ └─ 0001:03:00.0 14e4:aa52 Network Controller ├─ 0001:02:02.0 10b5:8603 Bridge Device │ └─ 0001:04:00.0 14e4:aa52 Network Controller ├─ 0001:02:03.0 000d:0000 0x000000 ├─ 0001:02:04.0 000d:0000 0x000000 ├─ 0001:02:05.0 000d:0000 0x000000 ├─ 0001:02:06.0 000d:0000 0x000000 ├─ (...) ├─ 0001:02:1d.0 000d:0000 0x000000 ├─ 0001:02:1e.0 000d:0000 0x000000 └─ 0001:02:1f.0 000d:0000 0x000000 Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-01-18ARM: dts: BCM5301X: Specify USB controllers in DTRafał Miłecki
There are 3 separated controllers, one per USB /standard/. With PHY drivers in place they can be simply supported with generic drivers. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Ray Jui <ray.jui@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-10-19ARM: BCM5301X: Specify USB 3.0 PHY in DTRafał Miłecki
Driver for Northstar USB 3.0 PHY has been recently added under the name phy-bcm-ns-usb3. Add binding for it into the DT files. The only slightly tricky part is BCM47094 which uses different PHY version and requires different compatible value. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-08-08ARM: BCM5301X: Specify PHY of USB 2.0 in DTRafał Miłecki
Driver for Northstar USB 2.0 PHY was added in 4.7-rc1 by: commit d3feb4067335 ("phy: bcm-ns-usb2: new driver for USB 2.0 PHY on Northstar"). It should be used to let EHCI platform driver init PHY. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-06-27ARM: dts: BCM5301x: Add RNG Device Tree nodeFlorian Fainelli
Add the DT node for the random number generator peripheral. Acked-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-06-13ARM: dts: BCM5301X: Add SRAB interruptsFlorian Fainelli
Add interrupt mapping for the Switch Register Access Block. Only 12 interrupts are usable at the moment even though up to 32 are dedicated to the SRAB. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-06-13ARM: dts: Enable SRAB switch and GMACs on 5301x DTSFlorian Fainelli
Add the Switch Register Access Block which is a special piece of hardware allowing us to perform indirect read/writes towards the integrated BCM5301X Ethernet switch. We also add the 4 Gigabit MAC Device Tree nodes within the brcm,bus-axi bus node to get proper binding between the BCMA instantiated core and the Device Tree nodes. We will need that to be able to reference Ethernet Device Tree nodes in a future patch adding the switch ports layout. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-04-22ARM: BCM5301X: Add DT entry for SPI controller and NOR flashRafał Miłecki
Controller is present on every BCM4708* board but only few devices have serial flash attached so mark it as disabled by default. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-04-13ARM: BCM5301X: Enable earlycon on tested devicesRafał Miłecki
This allows reporting & debugging problems occurring early in the boot process. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-04-13ARM: BCM5301X: Set vcc-gpio for USB controllers of few devicesRafał Miłecki
There are few devices that have USB power controlled using GPIO. Linux USB host driver (bcma-hcd) already supports this by reading vcc-gpio from DT. Set it properly for all known devices. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-11-20ARM: dts: enable clock support for BCM5301XJon Mason
Replace current device tree dummy clocks with real clock support for Broadcom Northstar SoCs. Signed-off-by: Jon Mason <jonmason@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-08-11ARM: BCM5301X: Add profiling supportFelix Fietkau
Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11ARM: BCM5301X: activate some additional options in pl310 cache controllerHauke Mehrtens
In the default Broadcom SDK the shared override is activated for this cache controller, do the same in the upstream code. Data and instruction prefetching is not activated by default for this cache controller on the bcm53xx SoC, do it manually like it is done in the vendor SDK. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2015-06-06ARM: BCM5301X: add IRQ numbers for PCIe controllerHauke Mehrtens
The driver for the PCIe controller was just added, this adds the missing definition of the IRQ numbers to device tree. The driver itself will be automatically detected by bcma. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-06-06ARM: BCM5301X: add NAND flash chip descriptionHauke Mehrtens
This adds the NAND flash chip description for a standard chip found connected to this SoC. This makes use of generic Broadcom NAND driver with the iProc interface. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2014-12-04ARM: BCM5301X: Add buttons for Netgear R6250Rafał Miłecki
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2014-12-01ARM: BCM5301X: Add IRQs to Broadcom's bus-axi in DTS fileHauke Mehrtens
IRQ support for Broadcom's bus-axi driver bcma was merged into John Linville's wireless tree and will show up in 3.19. This patch makes use of this feature in the DTS file for the the BCM5301X SoCs. I left the PCIe controller out, because this still needs some discussion. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2014-11-27ARM: BCM5301X: Add Broadcom's bus-axi to the DTS fileRafał Miłecki
This has been successfully tested on Netgear R6250 and two other development (unnamed) devices, all of them BCM4708 based. We also got a possitive feedback from R7000 (BCM4709) tester. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2014-02-19ARM: BCM5301X: add dts files for BCM4708 SoCHauke Mehrtens
This uses the newly added BCM5301X SoC code. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Christian Daudt <bcm@fixthebug.org> Signed-off-by: Matt Porter <mporter@linaro.org>