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2021-02-10ARM: dts: aspeed: ast2600evb: Add enable ehci and uhciRyan Chen
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> Link: https://lore.kernel.org/r/20201009024937.11246-4-ryan_chen@aspeedtech.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-19ARM: dts: aspeed: ast2600evb: Add MAC0Joel Stanley
MAC0 was not functional in the AST2600A0 SoC. This has been resolved with the A1, so allow use of this port on EVBs with the A1 and subsequent revisions. A0 EVBs will still boot with this change, but the first Ethernet device will not be functional. Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-05-05ARM: dts: aspeed: ast2600evb: Enable FSI masterJoel Stanley
Use the first FSI master. Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-07ARM: dts: aspeed: ast2600evb: Enable i2c busesJoel Stanley
With the exception of i2c10 and i2c11 which conflict with the pins for the third and forth MDIO controllers. i2c0 has an ADT7490 fan controller/thermal monitor device connected. The devicetree describes an adt74490 on i2c0, however bus that it appears on depends on jumper settings, so it may not be present on all EVBs. It is included to assist testing of I2C. Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: ast2600evb: Enable UART workaroundJoel Stanley
The UART has an issue on A0 that can be worked around by using the Synopsis driver. Tested-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: ast2600-evb: Add pinmux properties for enabled MACsAndrew Jeffery
All 2600-evb MACs use RGMII/MDIO. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: ast2600evb: Use custom flash layoutJoel Stanley
The AST2600 u-boot and kernel images have outgrown the OpenBMC layout. While BMC machines use 128MB SPI NOR chips, we only have 64MB on the EVB so use a layout that has a smaller region for the ro and rw filesystems. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: ast2600-evb: Enable FMC and SPI devicesCédric Le Goater
Signed-off-by: Cédric Le Goater <clg@kaod.org> Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: ast2600-evb: eMMC configurationAndrew Jeffery
Enable the eMMC controller and limit it to 52MHz to avoid the host controller reporting bus error conditions. Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-09-12ARM: dts: aspeed: Add AST2600 and EVBJoel Stanley
The AST2600 is a new SoC by ASPEED. It contains a dual core Cortex A7 CPU and shares many periperhals with the existing AST2400 and AST2500. Link: https://lore.kernel.org/r/20190911165614.31641-1-joel@jms.id.au Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>