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path: root/drivers/media/i2c/imx290.c
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Diffstat (limited to 'drivers/media/i2c/imx290.c')
-rw-r--r--drivers/media/i2c/imx290.c774
1 files changed, 679 insertions, 95 deletions
diff --git a/drivers/media/i2c/imx290.c b/drivers/media/i2c/imx290.c
index 157a0ed0a885..0057e0b98912 100644
--- a/drivers/media/i2c/imx290.c
+++ b/drivers/media/i2c/imx290.c
@@ -1,6 +1,12 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Sony IMX290 CMOS Image Sensor Driver
+ * Sony IMX290 & IMX327 CMOS Image Sensor Driver
+ *
+ * The IMX290 and IMX327 are very similar 1920x1080 1/2.8 CMOS image sensors.
+ * IMX327 can support up to 60fps, whilst IMX290 can support up to 120fps, but
+ * only 10bit and when connected over 4 CSI-2 lanes.
+ * The modules don't appear to have a mechanism to identify whether the mono or
+ * colour variant is connected, therefore it is done via compatible string.
*
* Copyright (C) 2019 FRAMOS GmbH.
*
@@ -13,6 +19,7 @@
#include <linux/gpio/consumer.h>
#include <linux/i2c.h>
#include <linux/module.h>
+#include <linux/of_device.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
@@ -22,12 +29,44 @@
#include <media/v4l2-fwnode.h>
#include <media/v4l2-subdev.h>
+enum imx290_clk_index {
+ CLK_37_125,
+ CLK_74_25,
+};
+
#define IMX290_STANDBY 0x3000
#define IMX290_REGHOLD 0x3001
#define IMX290_XMSTA 0x3002
+#define IMX290_FLIP_WINMODE 0x3007
+#define IMX290_FR_FDG_SEL 0x3009
+#define IMX290_BLKLEVEL_LOW 0x300a
+#define IMX290_BLKLEVEL_HIGH 0x300b
#define IMX290_GAIN 0x3014
-
-#define IMX290_DEFAULT_LINK_FREQ 445500000
+#define IMX290_VMAX_LOW 0x3018
+#define IMX290_VMAX_MAX 0x3fff
+#define IMX290_HMAX_LOW 0x301c
+#define IMX290_HMAX_HIGH 0x301d
+#define IMX290_HMAX_MIN_2LANE 4400 /* Min of 4400 pixels = 30fps */
+#define IMX290_HMAX_MIN_4LANE 2200 /* Min of 2200 pixels = 60fps */
+#define IMX290_HMAX_MAX 0xffff
+
+#define IMX290_EXPOSURE_MIN 2
+#define IMX290_EXPOSURE_STEP 1
+#define IMX290_EXPOSURE_LOW 0x3020
+#define IMX290_PGCTRL 0x308c
+#define IMX290_PHY_LANE_NUM 0x3407
+#define IMX290_CSI_LANE_MODE 0x3443
+
+#define IMX290_PGCTRL_REGEN BIT(0)
+#define IMX290_PGCTRL_THRU BIT(1)
+#define IMX290_PGCTRL_MODE(n) ((n) << 4)
+
+#define IMX290_NATIVE_WIDTH 1945U
+#define IMX290_NATIVE_HEIGHT 1109U
+#define IMX290_PIXEL_ARRAY_LEFT 4U
+#define IMX290_PIXEL_ARRAY_TOP 12U
+#define IMX290_PIXEL_ARRAY_WIDTH 1937U
+#define IMX290_PIXEL_ARRAY_HEIGHT 1097U
static const char * const imx290_supply_name[] = {
"vdda",
@@ -45,20 +84,31 @@ struct imx290_regval {
struct imx290_mode {
u32 width;
u32 height;
- u32 pixel_rate;
- u32 link_freq_index;
+ u32 hmax;
+ u32 vmax;
+ u8 link_freq_index;
+ struct v4l2_rect crop;
const struct imx290_regval *data;
u32 data_size;
+
+ /* Clock setup can vary. Index as enum imx290_clk_index */
+ const struct imx290_regval *clk_data[2];
+ u32 clk_size;
};
struct imx290 {
struct device *dev;
struct clk *xclk;
+ u32 xclk_freq;
struct regmap *regmap;
+ u8 nlanes;
+ u8 bpp;
+ u16 hmax_min;
+
+ const struct imx290_pixfmt *formats;
struct v4l2_subdev sd;
- struct v4l2_fwnode_endpoint ep;
struct media_pad pad;
struct v4l2_mbus_framefmt current_format;
const struct imx290_mode *current_mode;
@@ -69,16 +119,30 @@ struct imx290 {
struct v4l2_ctrl_handler ctrls;
struct v4l2_ctrl *link_freq;
struct v4l2_ctrl *pixel_rate;
+ struct v4l2_ctrl *hblank;
+ struct v4l2_ctrl *vblank;
+ struct v4l2_ctrl *hflip;
+ struct v4l2_ctrl *vflip;
+ struct v4l2_ctrl *exposure;
struct mutex lock;
};
struct imx290_pixfmt {
u32 code;
+ u8 bpp;
};
-static const struct imx290_pixfmt imx290_formats[] = {
- { MEDIA_BUS_FMT_SRGGB10_1X10 },
+#define IMX290_NUM_FORMATS 2
+
+static const struct imx290_pixfmt imx290_colour_formats[IMX290_NUM_FORMATS] = {
+ { MEDIA_BUS_FMT_SRGGB10_1X10, 10 },
+ { MEDIA_BUS_FMT_SRGGB12_1X12, 12 },
+};
+
+static const struct imx290_pixfmt imx290_mono_formats[IMX290_NUM_FORMATS] = {
+ { MEDIA_BUS_FMT_Y10_1X10, 10 },
+ { MEDIA_BUS_FMT_Y12_1X12, 12 },
};
static const struct regmap_config imx290_regmap_config = {
@@ -87,16 +151,20 @@ static const struct regmap_config imx290_regmap_config = {
.cache_type = REGCACHE_RBTREE,
};
+static const char * const imx290_test_pattern_menu[] = {
+ "Disabled",
+ "Sequence Pattern 1",
+ "Horizontal Color-bar Chart",
+ "Vertical Color-bar Chart",
+ "Sequence Pattern 2",
+ "Gradation Pattern 1",
+ "Gradation Pattern 2",
+ "000/555h Toggle Pattern",
+};
+
static const struct imx290_regval imx290_global_init_settings[] = {
{ 0x3007, 0x00 },
- { 0x3009, 0x00 },
- { 0x3018, 0x65 },
- { 0x3019, 0x04 },
{ 0x301a, 0x00 },
- { 0x3443, 0x03 },
- { 0x3444, 0x20 },
- { 0x3445, 0x25 },
- { 0x3407, 0x03 },
{ 0x303a, 0x0c },
{ 0x3040, 0x00 },
{ 0x3041, 0x00 },
@@ -150,6 +218,30 @@ static const struct imx290_regval imx290_global_init_settings[] = {
{ 0x33b3, 0x04 },
};
+static const struct imx290_regval imx290_37_125mhz_clock_1080p[] = {
+ { 0x305c, 0x18 },
+ { 0x305d, 0x03 },
+ { 0x305e, 0x20 },
+ { 0x305f, 0x01 },
+ { 0x315e, 0x1a },
+ { 0x3164, 0x1a },
+ { 0x3444, 0x20 },
+ { 0x3445, 0x25 },
+ { 0x3480, 0x49 },
+};
+
+static const struct imx290_regval imx290_74_250mhz_clock_1080p[] = {
+ { 0x305c, 0x0c },
+ { 0x305d, 0x03 },
+ { 0x305e, 0x10 },
+ { 0x305f, 0x01 },
+ { 0x315e, 0x1b },
+ { 0x3164, 0x1b },
+ { 0x3444, 0x40 },
+ { 0x3445, 0x4a },
+ { 0x3480, 0x92 },
+};
+
static const struct imx290_regval imx290_1080p_settings[] = {
/* mode settings */
{ 0x3007, 0x00 },
@@ -161,15 +253,7 @@ static const struct imx290_regval imx290_1080p_settings[] = {
{ 0x3419, 0x04 },
{ 0x3012, 0x64 },
{ 0x3013, 0x00 },
- { 0x305c, 0x18 },
- { 0x305d, 0x03 },
- { 0x305e, 0x20 },
- { 0x305f, 0x01 },
- { 0x315e, 0x1a },
- { 0x3164, 0x1a },
- { 0x3480, 0x49 },
/* data rate settings */
- { 0x3009, 0x01 },
{ 0x3405, 0x10 },
{ 0x3446, 0x57 },
{ 0x3447, 0x00 },
@@ -187,8 +271,30 @@ static const struct imx290_regval imx290_1080p_settings[] = {
{ 0x3453, 0x00 },
{ 0x3454, 0x17 },
{ 0x3455, 0x00 },
- { 0x301c, 0x98 },
- { 0x301d, 0x08 },
+};
+
+static const struct imx290_regval imx290_37_125mhz_clock_720p[] = {
+ { 0x305c, 0x20 },
+ { 0x305d, 0x00 },
+ { 0x305e, 0x20 },
+ { 0x305f, 0x01 },
+ { 0x315e, 0x1a },
+ { 0x3164, 0x1a },
+ { 0x3444, 0x20 },
+ { 0x3445, 0x25 },
+ { 0x3480, 0x49 },
+};
+
+static const struct imx290_regval imx290_74_250mhz_clock_720p[] = {
+ { 0x305c, 0x10 },
+ { 0x305d, 0x00 },
+ { 0x305e, 0x10 },
+ { 0x305f, 0x01 },
+ { 0x315e, 0x1b },
+ { 0x3164, 0x1b },
+ { 0x3444, 0x40 },
+ { 0x3445, 0x4a },
+ { 0x3480, 0x92 },
};
static const struct imx290_regval imx290_720p_settings[] = {
@@ -202,15 +308,7 @@ static const struct imx290_regval imx290_720p_settings[] = {
{ 0x3419, 0x02 },
{ 0x3012, 0x64 },
{ 0x3013, 0x00 },
- { 0x305c, 0x20 },
- { 0x305d, 0x00 },
- { 0x305e, 0x20 },
- { 0x305f, 0x01 },
- { 0x315e, 0x1a },
- { 0x3164, 0x1a },
- { 0x3480, 0x49 },
/* data rate settings */
- { 0x3009, 0x01 },
{ 0x3405, 0x10 },
{ 0x3446, 0x4f },
{ 0x3447, 0x00 },
@@ -228,8 +326,6 @@ static const struct imx290_regval imx290_720p_settings[] = {
{ 0x3453, 0x00 },
{ 0x3454, 0x17 },
{ 0x3455, 0x00 },
- { 0x301c, 0xe4 },
- { 0x301d, 0x0c },
};
static const struct imx290_regval imx290_10bit_settings[] = {
@@ -244,31 +340,153 @@ static const struct imx290_regval imx290_10bit_settings[] = {
{ 0x300b, 0x00},
};
+static const struct imx290_regval imx290_12bit_settings[] = {
+ { 0x3005, 0x01 },
+ { 0x3046, 0x01 },
+ { 0x3129, 0x00 },
+ { 0x317c, 0x00 },
+ { 0x31ec, 0x0e },
+ { 0x3441, 0x0c },
+ { 0x3442, 0x0c },
+ { 0x300a, 0xf0 },
+ { 0x300b, 0x00 },
+};
+
/* supported link frequencies */
-static const s64 imx290_link_freq[] = {
- IMX290_DEFAULT_LINK_FREQ,
+#define FREQ_INDEX_1080P 0
+#define FREQ_INDEX_720P 1
+static const s64 imx290_link_freq_2lanes[] = {
+ [FREQ_INDEX_1080P] = 445500000,
+ [FREQ_INDEX_720P] = 297000000,
+};
+static const s64 imx290_link_freq_4lanes[] = {
+ [FREQ_INDEX_1080P] = 222750000,
+ [FREQ_INDEX_720P] = 148500000,
};
+/*
+ * In this function and in the similar ones below We rely on imx290_probe()
+ * to ensure that nlanes is either 2 or 4.
+ */
+static inline const s64 *imx290_link_freqs_ptr(const struct imx290 *imx290)
+{
+ if (imx290->nlanes == 2)
+ return imx290_link_freq_2lanes;
+ else
+ return imx290_link_freq_4lanes;
+}
+
+static inline int imx290_link_freqs_num(const struct imx290 *imx290)
+{
+ if (imx290->nlanes == 2)
+ return ARRAY_SIZE(imx290_link_freq_2lanes);
+ else
+ return ARRAY_SIZE(imx290_link_freq_4lanes);
+}
+
/* Mode configs */
-static const struct imx290_mode imx290_modes[] = {
+static const struct imx290_mode imx290_modes_2lanes[] = {
{
.width = 1920,
.height = 1080,
+ .hmax = 0x1130,
+ .vmax = 0x0465,
+ .link_freq_index = FREQ_INDEX_1080P,
+ .crop = {
+ .left = 4 + 8,
+ .top = 12 + 8,
+ .width = 1920,
+ .height = 1080,
+ },
.data = imx290_1080p_settings,
.data_size = ARRAY_SIZE(imx290_1080p_settings),
- .pixel_rate = 178200000,
- .link_freq_index = 0,
+ .clk_data = {
+ [CLK_37_125] = imx290_37_125mhz_clock_1080p,
+ [CLK_74_25] = imx290_74_250mhz_clock_1080p,
+ },
+ .clk_size = ARRAY_SIZE(imx290_37_125mhz_clock_1080p),
},
{
.width = 1280,
.height = 720,
+ .hmax = 0x19c8,
+ .vmax = 0x02ee,
+ .link_freq_index = FREQ_INDEX_720P,
+ .crop = {
+ .left = 4 + 8 + 320,
+ .top = 12 + 8 + 180,
+ .width = 1280,
+ .height = 720,
+ },
.data = imx290_720p_settings,
.data_size = ARRAY_SIZE(imx290_720p_settings),
- .pixel_rate = 178200000,
- .link_freq_index = 0,
+ .clk_data = {
+ [CLK_37_125] = imx290_37_125mhz_clock_1080p,
+ [CLK_74_25] = imx290_74_250mhz_clock_1080p,
+ },
+ .clk_size = ARRAY_SIZE(imx290_37_125mhz_clock_1080p),
},
};
+static const struct imx290_mode imx290_modes_4lanes[] = {
+ {
+ .width = 1920,
+ .height = 1080,
+ .hmax = 0x0898,
+ .vmax = 0x0465,
+ .link_freq_index = FREQ_INDEX_1080P,
+ .crop = {
+ .left = 4 + 8,
+ .top = 12 + 8,
+ .width = 1920,
+ .height = 1080,
+ },
+ .data = imx290_1080p_settings,
+ .data_size = ARRAY_SIZE(imx290_1080p_settings),
+ .clk_data = {
+ [CLK_37_125] = imx290_37_125mhz_clock_720p,
+ [CLK_74_25] = imx290_74_250mhz_clock_720p,
+ },
+ .clk_size = ARRAY_SIZE(imx290_37_125mhz_clock_720p),
+ },
+ {
+ .width = 1280,
+ .height = 720,
+ .hmax = 0x0ce4,
+ .vmax = 0x02ee,
+ .link_freq_index = FREQ_INDEX_720P,
+ .crop = {
+ .left = 4 + 8 + 320,
+ .top = 12 + 8 + 180,
+ .width = 1280,
+ .height = 720,
+ },
+ .data = imx290_720p_settings,
+ .data_size = ARRAY_SIZE(imx290_720p_settings),
+ .clk_data = {
+ [CLK_37_125] = imx290_37_125mhz_clock_720p,
+ [CLK_74_25] = imx290_74_250mhz_clock_720p,
+ },
+ .clk_size = ARRAY_SIZE(imx290_37_125mhz_clock_720p),
+ },
+};
+
+static inline const struct imx290_mode *imx290_modes_ptr(const struct imx290 *imx290)
+{
+ if (imx290->nlanes == 2)
+ return imx290_modes_2lanes;
+ else
+ return imx290_modes_4lanes;
+}
+
+static inline int imx290_modes_num(const struct imx290 *imx290)
+{
+ if (imx290->nlanes == 2)
+ return ARRAY_SIZE(imx290_modes_2lanes);
+ else
+ return ARRAY_SIZE(imx290_modes_4lanes);
+}
+
static inline struct imx290 *to_imx290(struct v4l2_subdev *_sd)
{
return container_of(_sd, struct imx290, sd);
@@ -314,11 +532,11 @@ static int imx290_set_register_array(struct imx290 *imx290,
ret = imx290_write_reg(imx290, settings->reg, settings->val);
if (ret < 0)
return ret;
-
- /* Settle time is 10ms for all registers */
- msleep(10);
}
+ /* Provide 10ms settle time */
+ msleep(10);
+
return 0;
}
@@ -363,6 +581,46 @@ static int imx290_set_gain(struct imx290 *imx290, u32 value)
return ret;
}
+static int imx290_set_exposure(struct imx290 *imx290, u32 value)
+{
+ u32 exposure = (imx290->current_mode->height + imx290->vblank->val) -
+ value;
+ int ret;
+
+ ret = imx290_write_buffered_reg(imx290, IMX290_EXPOSURE_LOW, 3,
+ exposure);
+ if (ret)
+ dev_err(imx290->dev, "Unable to write exposure\n");
+
+ return ret;
+}
+
+static int imx290_set_hmax(struct imx290 *imx290, u32 val)
+{
+ u32 hmax = val + imx290->current_mode->width;
+ int ret;
+
+ ret = imx290_write_buffered_reg(imx290, IMX290_HMAX_LOW, 2,
+ hmax);
+ if (ret)
+ dev_err(imx290->dev, "Error setting HMAX register\n");
+
+ return ret;
+}
+
+static int imx290_set_vmax(struct imx290 *imx290, u32 val)
+{
+ u32 vmax = val + imx290->current_mode->height;
+ int ret;
+
+ ret = imx290_write_buffered_reg(imx290, IMX290_VMAX_LOW, 3,
+ vmax);
+ if (ret)
+ dev_err(imx290->dev, "Unable to write vmax\n");
+
+ return ret;
+}
+
/* Stop streaming */
static int imx290_stop_streaming(struct imx290 *imx290)
{
@@ -382,6 +640,7 @@ static int imx290_set_ctrl(struct v4l2_ctrl *ctrl)
struct imx290 *imx290 = container_of(ctrl->handler,
struct imx290, ctrls);
int ret = 0;
+ u8 val;
/* V4L2 controls values will be applied only when power is already up */
if (!pm_runtime_get_if_in_use(imx290->dev))
@@ -391,6 +650,46 @@ static int imx290_set_ctrl(struct v4l2_ctrl *ctrl)
case V4L2_CID_GAIN:
ret = imx290_set_gain(imx290, ctrl->val);
break;
+ case V4L2_CID_EXPOSURE:
+ ret = imx290_set_exposure(imx290, ctrl->val);
+ break;
+ case V4L2_CID_HBLANK:
+ ret = imx290_set_hmax(imx290, ctrl->val);
+ break;
+ case V4L2_CID_VBLANK:
+ ret = imx290_set_vmax(imx290, ctrl->val);
+ break;
+ case V4L2_CID_HFLIP:
+ case V4L2_CID_VFLIP:
+ /* WINMODE is in bits [6:4], so need to read-modify-write */
+ ret = imx290_read_reg(imx290, IMX290_FLIP_WINMODE, &val);
+ if (ret)
+ break;
+ val &= ~0x03;
+ val |= imx290->vflip->val | (imx290->hflip->val << 1);
+ ret = imx290_write_reg(imx290, IMX290_FLIP_WINMODE, val);
+ break;
+ case V4L2_CID_TEST_PATTERN:
+ if (ctrl->val) {
+ imx290_write_reg(imx290, IMX290_BLKLEVEL_LOW, 0x00);
+ imx290_write_reg(imx290, IMX290_BLKLEVEL_HIGH, 0x00);
+ msleep(10);
+ imx290_write_reg(imx290, IMX290_PGCTRL,
+ (u8)(IMX290_PGCTRL_REGEN |
+ IMX290_PGCTRL_THRU |
+ IMX290_PGCTRL_MODE(ctrl->val)));
+ } else {
+ imx290_write_reg(imx290, IMX290_PGCTRL, 0x00);
+ msleep(10);
+ if (imx290->bpp == 10)
+ imx290_write_reg(imx290, IMX290_BLKLEVEL_LOW,
+ 0x3c);
+ else /* 12 bits per pixel */
+ imx290_write_reg(imx290, IMX290_BLKLEVEL_LOW,
+ 0xf0);
+ imx290_write_reg(imx290, IMX290_BLKLEVEL_HIGH, 0x00);
+ }
+ break;
default:
ret = -EINVAL;
break;
@@ -409,10 +708,34 @@ static int imx290_enum_mbus_code(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_mbus_code_enum *code)
{
- if (code->index >= ARRAY_SIZE(imx290_formats))
+ const struct imx290 *imx290 = to_imx290(sd);
+
+ if (code->index >= IMX290_NUM_FORMATS)
return -EINVAL;
- code->code = imx290_formats[code->index].code;
+ code->code = imx290->formats[code->index].code;
+
+ return 0;
+}
+
+static int imx290_enum_frame_size(struct v4l2_subdev *sd,
+ struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_frame_size_enum *fse)
+{
+ const struct imx290 *imx290 = to_imx290(sd);
+ const struct imx290_mode *imx290_modes = imx290_modes_ptr(imx290);
+
+ if (fse->code != imx290->formats[0].code &&
+ fse->code != imx290->formats[1].code)
+ return -EINVAL;
+
+ if (fse->index >= imx290_modes_num(imx290))
+ return -EINVAL;
+
+ fse->min_width = imx290_modes[fse->index].width;
+ fse->max_width = imx290_modes[fse->index].width;
+ fse->min_height = imx290_modes[fse->index].height;
+ fse->max_height = imx290_modes[fse->index].height;
return 0;
}
@@ -439,6 +762,30 @@ static int imx290_get_fmt(struct v4l2_subdev *sd,
return 0;
}
+static inline u8 imx290_get_link_freq_index(struct imx290 *imx290)
+{
+ return imx290->current_mode->link_freq_index;
+}
+
+static s64 imx290_get_link_freq(struct imx290 *imx290)
+{
+ u8 index = imx290_get_link_freq_index(imx290);
+
+ return *(imx290_link_freqs_ptr(imx290) + index);
+}
+
+static u64 imx290_calc_pixel_rate(struct imx290 *imx290)
+{
+ s64 link_freq = imx290_get_link_freq(imx290);
+ u8 nlanes = imx290->nlanes;
+ u64 pixel_rate;
+
+ /* pixel rate = link_freq * 2 * nr_of_lanes / bits_per_sample */
+ pixel_rate = link_freq * 2 * nlanes;
+ do_div(pixel_rate, imx290->bpp);
+ return pixel_rate;
+}
+
static int imx290_set_fmt(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_format *fmt)
@@ -450,32 +797,68 @@ static int imx290_set_fmt(struct v4l2_subdev *sd,
mutex_lock(&imx290->lock);
- mode = v4l2_find_nearest_size(imx290_modes,
- ARRAY_SIZE(imx290_modes),
- width, height,
+ mode = v4l2_find_nearest_size(imx290_modes_ptr(imx290),
+ imx290_modes_num(imx290), width, height,
fmt->format.width, fmt->format.height);
fmt->format.width = mode->width;
fmt->format.height = mode->height;
- for (i = 0; i < ARRAY_SIZE(imx290_formats); i++)
- if (imx290_formats[i].code == fmt->format.code)
+ for (i = 0; i < IMX290_NUM_FORMATS; i++)
+ if (imx290->formats[i].code == fmt->format.code)
break;
- if (i >= ARRAY_SIZE(imx290_formats))
+ if (i >= IMX290_NUM_FORMATS)
i = 0;
- fmt->format.code = imx290_formats[i].code;
+ fmt->format.code = imx290->formats[i].code;
fmt->format.field = V4L2_FIELD_NONE;
+ fmt->format.colorspace = V4L2_COLORSPACE_SRGB;
+ fmt->format.ycbcr_enc =
+ V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->format.colorspace);
+ fmt->format.quantization =
+ V4L2_MAP_QUANTIZATION_DEFAULT(true, fmt->format.colorspace,
+ fmt->format.ycbcr_enc);
+ fmt->format.xfer_func =
+ V4L2_MAP_XFER_FUNC_DEFAULT(fmt->format.colorspace);
if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
format = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
} else {
format = &imx290->current_format;
- __v4l2_ctrl_s_ctrl(imx290->link_freq, mode->link_freq_index);
- __v4l2_ctrl_s_ctrl_int64(imx290->pixel_rate, mode->pixel_rate);
-
imx290->current_mode = mode;
+ imx290->bpp = imx290->formats[i].bpp;
+
+ if (imx290->link_freq)
+ __v4l2_ctrl_s_ctrl(imx290->link_freq,
+ imx290_get_link_freq_index(imx290));
+ if (imx290->pixel_rate)
+ __v4l2_ctrl_s_ctrl_int64(imx290->pixel_rate,
+ imx290_calc_pixel_rate(imx290));
+
+ if (imx290->hblank) {
+ __v4l2_ctrl_modify_range(imx290->hblank,
+ imx290->hmax_min - mode->width,
+ IMX290_HMAX_MAX - mode->width,
+ 1, mode->hmax - mode->width);
+ __v4l2_ctrl_s_ctrl(imx290->hblank,
+ mode->hmax - mode->width);
+ }
+ if (imx290->vblank) {
+ __v4l2_ctrl_modify_range(imx290->vblank,
+ mode->vmax - mode->height,
+ IMX290_VMAX_MAX - mode->height,
+ 1,
+ mode->vmax - mode->height);
+ __v4l2_ctrl_s_ctrl(imx290->vblank,
+ mode->vmax - mode->height);
+ }
+ if (imx290->exposure)
+ __v4l2_ctrl_modify_range(imx290->exposure,
+ mode->vmax - mode->height,
+ mode->vmax - 4,
+ IMX290_EXPOSURE_STEP,
+ mode->vmax - 4);
}
*format = fmt->format;
@@ -499,13 +882,13 @@ static int imx290_entity_init_cfg(struct v4l2_subdev *subdev,
return 0;
}
-static int imx290_write_current_format(struct imx290 *imx290,
- struct v4l2_mbus_framefmt *format)
+static int imx290_write_current_format(struct imx290 *imx290)
{
int ret;
- switch (format->code) {
+ switch (imx290->current_format.code) {
case MEDIA_BUS_FMT_SRGGB10_1X10:
+ case MEDIA_BUS_FMT_Y10_1X10:
ret = imx290_set_register_array(imx290, imx290_10bit_settings,
ARRAY_SIZE(
imx290_10bit_settings));
@@ -514,6 +897,16 @@ static int imx290_write_current_format(struct imx290 *imx290,
return ret;
}
break;
+ case MEDIA_BUS_FMT_SRGGB12_1X12:
+ case MEDIA_BUS_FMT_Y12_1X12:
+ ret = imx290_set_register_array(imx290, imx290_12bit_settings,
+ ARRAY_SIZE(
+ imx290_12bit_settings));
+ if (ret < 0) {
+ dev_err(imx290->dev, "Could not set format registers\n");
+ return ret;
+ }
+ break;
default:
dev_err(imx290->dev, "Unknown pixel format\n");
return -EINVAL;
@@ -522,9 +915,62 @@ static int imx290_write_current_format(struct imx290 *imx290,
return 0;
}
+static const struct v4l2_rect *
+__imx290_get_pad_crop(struct imx290 *imx290, struct v4l2_subdev_pad_config *cfg,
+ unsigned int pad, enum v4l2_subdev_format_whence which)
+{
+ switch (which) {
+ case V4L2_SUBDEV_FORMAT_TRY:
+ return v4l2_subdev_get_try_crop(&imx290->sd, cfg, pad);
+ case V4L2_SUBDEV_FORMAT_ACTIVE:
+ return &imx290->current_mode->crop;
+ }
+
+ return NULL;
+}
+
+static int imx290_get_selection(struct v4l2_subdev *sd,
+ struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_selection *sel)
+{
+ switch (sel->target) {
+ case V4L2_SEL_TGT_CROP: {
+ struct imx290 *imx290 = to_imx290(sd);
+
+ mutex_lock(&imx290->lock);
+ sel->r = *__imx290_get_pad_crop(imx290, cfg, sel->pad,
+ sel->which);
+ mutex_unlock(&imx290->lock);
+
+ return 0;
+ }
+
+ case V4L2_SEL_TGT_NATIVE_SIZE:
+ sel->r.top = 0;
+ sel->r.left = 0;
+ sel->r.width = IMX290_NATIVE_WIDTH;
+ sel->r.height = IMX290_NATIVE_HEIGHT;
+
+ return 0;
+
+ case V4L2_SEL_TGT_CROP_DEFAULT:
+ case V4L2_SEL_TGT_CROP_BOUNDS:
+ sel->r.top = IMX290_PIXEL_ARRAY_TOP;
+ sel->r.left = IMX290_PIXEL_ARRAY_LEFT;
+ sel->r.width = IMX290_PIXEL_ARRAY_WIDTH;
+ sel->r.height = IMX290_PIXEL_ARRAY_HEIGHT;
+
+ return 0;
+ }
+
+ return -EINVAL;
+}
+
/* Start streaming */
static int imx290_start_streaming(struct imx290 *imx290)
{
+ enum imx290_clk_index clk_idx = imx290->xclk_freq == 37125000 ?
+ CLK_37_125 : CLK_74_25;
int ret;
/* Set init register settings */
@@ -536,8 +982,16 @@ static int imx290_start_streaming(struct imx290 *imx290)
return ret;
}
- /* Set current frame format */
- ret = imx290_write_current_format(imx290, &imx290->current_format);
+ ret = imx290_set_register_array(imx290,
+ imx290->current_mode->clk_data[clk_idx],
+ imx290->current_mode->clk_size);
+ if (ret < 0) {
+ dev_err(imx290->dev, "Could not set clock registers\n");
+ return ret;
+ }
+
+ /* Apply the register values related to current frame format */
+ ret = imx290_write_current_format(imx290);
if (ret < 0) {
dev_err(imx290->dev, "Could not set frame format\n");
return ret;
@@ -590,6 +1044,9 @@ static int imx290_set_stream(struct v4l2_subdev *sd, int enable)
imx290_stop_streaming(imx290);
pm_runtime_put(imx290->dev);
}
+ /* vflip and hflip cannot change during streaming */
+ __v4l2_ctrl_grab(imx290->vflip, enable);
+ __v4l2_ctrl_grab(imx290->hflip, enable);
unlock_and_return:
@@ -607,6 +1064,49 @@ static int imx290_get_regulators(struct device *dev, struct imx290 *imx290)
imx290->supplies);
}
+static int imx290_set_data_lanes(struct imx290 *imx290)
+{
+ int ret = 0, laneval, frsel;
+
+ switch (imx290->nlanes) {
+ case 2:
+ laneval = 0x01;
+ frsel = 0x02;
+ break;
+ case 4:
+ laneval = 0x03;
+ frsel = 0x01;
+ break;
+ default:
+ /*
+ * We should never hit this since the data lane count is
+ * validated in probe itself
+ */
+ dev_err(imx290->dev, "Lane configuration not supported\n");
+ ret = -EINVAL;
+ goto exit;
+ }
+
+ ret = imx290_write_reg(imx290, IMX290_PHY_LANE_NUM, laneval);
+ if (ret) {
+ dev_err(imx290->dev, "Error setting Physical Lane number register\n");
+ goto exit;
+ }
+
+ ret = imx290_write_reg(imx290, IMX290_CSI_LANE_MODE, laneval);
+ if (ret) {
+ dev_err(imx290->dev, "Error setting CSI Lane mode register\n");
+ goto exit;
+ }
+
+ ret = imx290_write_reg(imx290, IMX290_FR_FDG_SEL, frsel);
+ if (ret)
+ dev_err(imx290->dev, "Error setting FR/FDG SEL register\n");
+
+exit:
+ return ret;
+}
+
static int imx290_power_on(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
@@ -631,6 +1131,9 @@ static int imx290_power_on(struct device *dev)
gpiod_set_value_cansleep(imx290->rst_gpio, 0);
usleep_range(30000, 31000);
+ /* Set data lane count */
+ imx290_set_data_lanes(imx290);
+
return 0;
}
@@ -648,7 +1151,7 @@ static int imx290_power_off(struct device *dev)
}
static const struct dev_pm_ops imx290_pm_ops = {
- SET_RUNTIME_PM_OPS(imx290_power_on, imx290_power_off, NULL)
+ SET_RUNTIME_PM_OPS(imx290_power_off, imx290_power_on, NULL)
};
static const struct v4l2_subdev_video_ops imx290_video_ops = {
@@ -658,8 +1161,10 @@ static const struct v4l2_subdev_video_ops imx290_video_ops = {
static const struct v4l2_subdev_pad_ops imx290_pad_ops = {
.init_cfg = imx290_entity_init_cfg,
.enum_mbus_code = imx290_enum_mbus_code,
+ .enum_frame_size = imx290_enum_frame_size,
.get_fmt = imx290_get_fmt,
.set_fmt = imx290_set_fmt,
+ .get_selection = imx290_get_selection,
};
static const struct v4l2_subdev_ops imx290_subdev_ops = {
@@ -671,12 +1176,46 @@ static const struct media_entity_operations imx290_subdev_entity_ops = {
.link_validate = v4l2_subdev_link_validate,
};
+/*
+ * Returns 0 if all link frequencies used by the driver for the given number
+ * of MIPI data lanes are mentioned in the device tree, or the value of the
+ * first missing frequency otherwise.
+ */
+static s64 imx290_check_link_freqs(const struct imx290 *imx290,
+ const struct v4l2_fwnode_endpoint *ep)
+{
+ int i, j;
+ const s64 *freqs = imx290_link_freqs_ptr(imx290);
+ int freqs_count = imx290_link_freqs_num(imx290);
+
+ for (i = 0; i < freqs_count; i++) {
+ for (j = 0; j < ep->nr_of_link_frequencies; j++)
+ if (freqs[i] == ep->link_frequencies[j])
+ break;
+ if (j == ep->nr_of_link_frequencies)
+ return freqs[i];
+ }
+ return 0;
+}
+
+static const struct of_device_id imx290_of_match[] = {
+ { .compatible = "sony,imx290", .data = imx290_colour_formats },
+ { .compatible = "sony,imx290-mono", .data = imx290_mono_formats },
+ { /* sentinel */ }
+};
+
static int imx290_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct fwnode_handle *endpoint;
+ /* Only CSI2 is supported for now: */
+ struct v4l2_fwnode_endpoint ep = {
+ .bus_type = V4L2_MBUS_CSI2_DPHY
+ };
+ const struct of_device_id *match;
+ const struct imx290_mode *mode;
struct imx290 *imx290;
- u32 xclk_freq;
+ s64 fq;
int ret;
imx290 = devm_kzalloc(dev, sizeof(*imx290), GFP_KERNEL);
@@ -690,41 +1229,53 @@ static int imx290_probe(struct i2c_client *client)
return -ENODEV;
}
+ match = of_match_device(imx290_of_match, dev);
+ if (!match)
+ return -ENODEV;
+ imx290->formats = (const struct imx290_pixfmt *)match->data;
+
endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL);
if (!endpoint) {
dev_err(dev, "Endpoint node not found\n");
return -EINVAL;
}
- ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &imx290->ep);
+ ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &ep);
fwnode_handle_put(endpoint);
- if (ret) {
+ if (ret == -ENXIO) {
+ dev_err(dev, "Unsupported bus type, should be CSI2\n");
+ goto free_err;
+ } else if (ret) {
dev_err(dev, "Parsing endpoint node failed\n");
goto free_err;
}
- if (!imx290->ep.nr_of_link_frequencies) {
- dev_err(dev, "link-frequency property not found in DT\n");
+ /* Get number of data lanes */
+ imx290->nlanes = ep.bus.mipi_csi2.num_data_lanes;
+ if (imx290->nlanes != 2 && imx290->nlanes != 4) {
+ dev_err(dev, "Invalid data lanes: %d\n", imx290->nlanes);
ret = -EINVAL;
goto free_err;
}
+ imx290->hmax_min = (imx290->nlanes == 2) ? IMX290_HMAX_MIN_2LANE :
+ IMX290_HMAX_MIN_4LANE;
- if (imx290->ep.link_frequencies[0] != IMX290_DEFAULT_LINK_FREQ) {
- dev_err(dev, "Unsupported link frequency\n");
+ dev_dbg(dev, "Using %u data lanes\n", imx290->nlanes);
+
+ if (!ep.nr_of_link_frequencies) {
+ dev_err(dev, "link-frequency property not found in DT\n");
ret = -EINVAL;
goto free_err;
}
- /* Only CSI2 is supported for now */
- if (imx290->ep.bus_type != V4L2_MBUS_CSI2_DPHY) {
- dev_err(dev, "Unsupported bus type, should be CSI2\n");
+ /* Check that link frequences for all the modes are in device tree */
+ fq = imx290_check_link_freqs(imx290, &ep);
+ if (fq) {
+ dev_err(dev, "Link frequency of %lld is not supported\n", fq);
ret = -EINVAL;
goto free_err;
}
- /* Set default mode to max resolution */
- imx290->current_mode = &imx290_modes[0];
-
/* get system clock (xclk) */
imx290->xclk = devm_clk_get(dev, "xclk");
if (IS_ERR(imx290->xclk)) {
@@ -734,21 +1285,21 @@ static int imx290_probe(struct i2c_client *client)
}
ret = fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency",
- &xclk_freq);
+ &imx290->xclk_freq);
if (ret) {
dev_err(dev, "Could not get xclk frequency\n");
goto free_err;
}
/* external clock must be 37.125 MHz */
- if (xclk_freq != 37125000) {
+ if (imx290->xclk_freq != 37125000 && imx290->xclk_freq != 74250000) {
dev_err(dev, "External clock frequency %u is not supported\n",
- xclk_freq);
+ imx290->xclk_freq);
ret = -EINVAL;
goto free_err;
}
- ret = clk_set_rate(imx290->xclk, xclk_freq);
+ ret = clk_set_rate(imx290->xclk, imx290->xclk_freq);
if (ret) {
dev_err(dev, "Could not set xclk frequency\n");
goto free_err;
@@ -770,23 +1321,60 @@ static int imx290_probe(struct i2c_client *client)
mutex_init(&imx290->lock);
- v4l2_ctrl_handler_init(&imx290->ctrls, 3);
+ /*
+ * Initialize the frame format. In particular, imx290->current_mode
+ * and imx290->bpp are set to defaults: imx290_calc_pixel_rate() call
+ * below relies on these fields.
+ */
+ imx290_entity_init_cfg(&imx290->sd, NULL);
+
+ v4l2_ctrl_handler_init(&imx290->ctrls, 4);
v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops,
- V4L2_CID_GAIN, 0, 72, 1, 0);
+ V4L2_CID_GAIN, 0, 238, 1, 0);
+
+ mode = imx290->current_mode;
+ imx290->hblank = v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops,
+ V4L2_CID_HBLANK,
+ imx290->hmax_min - mode->width,
+ IMX290_HMAX_MAX - mode->width, 1,
+ mode->hmax - mode->width);
+
+ imx290->vblank = v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops,
+ V4L2_CID_VBLANK,
+ mode->vmax - mode->height,
+ IMX290_VMAX_MAX - mode->height, 1,
+ mode->vmax - mode->height);
+
+ imx290->exposure = v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops,
+ V4L2_CID_EXPOSURE,
+ IMX290_EXPOSURE_MIN,
+ mode->vmax - 4,
+ IMX290_EXPOSURE_STEP,
+ mode->vmax - 4);
+
+ imx290->hflip = v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops,
+ V4L2_CID_HFLIP, 0, 1, 1, 0);
+ imx290->vflip = v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops,
+ V4L2_CID_VFLIP, 0, 1, 1, 0);
+
imx290->link_freq =
- v4l2_ctrl_new_int_menu(&imx290->ctrls,
- &imx290_ctrl_ops,
+ v4l2_ctrl_new_int_menu(&imx290->ctrls, &imx290_ctrl_ops,
V4L2_CID_LINK_FREQ,
- ARRAY_SIZE(imx290_link_freq) - 1,
- 0, imx290_link_freq);
+ imx290_link_freqs_num(imx290) - 1, 0,
+ imx290_link_freqs_ptr(imx290));
if (imx290->link_freq)
imx290->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
imx290->pixel_rate = v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops,
- V4L2_CID_PIXEL_RATE, 1,
- INT_MAX, 1,
- imx290_modes[0].pixel_rate);
+ V4L2_CID_PIXEL_RATE,
+ 1, INT_MAX, 1,
+ imx290_calc_pixel_rate(imx290));
+
+ v4l2_ctrl_new_std_menu_items(&imx290->ctrls, &imx290_ctrl_ops,
+ V4L2_CID_TEST_PATTERN,
+ ARRAY_SIZE(imx290_test_pattern_menu) - 1,
+ 0, 0, imx290_test_pattern_menu);
imx290->sd.ctrl_handler = &imx290->ctrls;
@@ -827,7 +1415,7 @@ static int imx290_probe(struct i2c_client *client)
pm_runtime_enable(dev);
pm_runtime_idle(dev);
- v4l2_fwnode_endpoint_free(&imx290->ep);
+ v4l2_fwnode_endpoint_free(&ep);
return 0;
@@ -837,7 +1425,7 @@ free_ctrl:
v4l2_ctrl_handler_free(&imx290->ctrls);
mutex_destroy(&imx290->lock);
free_err:
- v4l2_fwnode_endpoint_free(&imx290->ep);
+ v4l2_fwnode_endpoint_free(&ep);
return ret;
}
@@ -861,10 +1449,6 @@ static int imx290_remove(struct i2c_client *client)
return 0;
}
-static const struct of_device_id imx290_of_match[] = {
- { .compatible = "sony,imx290" },
- { /* sentinel */ }
-};
MODULE_DEVICE_TABLE(of, imx290_of_match);
static struct i2c_driver imx290_i2c_driver = {
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-05-24 04:21:14 +0000