diff options
Diffstat (limited to 'arch/arm64/boot/dts/xilinx/zynqmp.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 622 |
1 files changed, 592 insertions, 30 deletions
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 9aa67340a4d8..c2baf0f5f51d 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -12,6 +12,9 @@ * the License, or (at your option) any later version. */ +#include <dt-bindings/power/xlnx-zynqmp-power.h> +#include <dt-bindings/reset/xlnx-zynqmp-resets.h> + / { compatible = "xlnx,zynqmp"; #address-cells = <2>; @@ -71,7 +74,7 @@ }; }; - cpu_opp_table: cpu-opp-table { + cpu_opp_table: cpu_opp_table { compatible = "operating-points-v2"; opp-shared; opp00 { @@ -99,6 +102,28 @@ dcc: dcc { compatible = "arm,dcc"; status = "disabled"; + u-boot,dm-pre-reloc; + }; + + zynqmp_ipi { + compatible = "xlnx,zynqmp-ipi-mailbox"; + interrupt-parent = <&gic>; + interrupts = <0 35 4>; + xlnx,ipi-id = <0>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ipi_mailbox_pmu1: mailbox@ff990400 { + reg = <0x0 0xff9905c0 0x0 0x20>, + <0x0 0xff9905e0 0x0 0x20>, + <0x0 0xff990e80 0x0 0x20>, + <0x0 0xff990ea0 0x0 0x20>; + reg-names = "local_request_region", "local_response_region", + "remote_request_region", "remote_response_region"; + #mbox-cells = <1>; + xlnx,ipi-id = <4>; + }; }; pmu { @@ -115,6 +140,34 @@ method = "smc"; }; + firmware { + zynqmp_firmware: zynqmp-firmware { + compatible = "xlnx,zynqmp-firmware"; + method = "smc"; + #power-domain-cells = <0x1>; + u-boot,dm-pre-reloc; + + zynqmp_power: zynqmp-power { + compatible = "xlnx,zynqmp-power"; + interrupt-parent = <&gic>; + interrupts = <0 35 4>; + mboxes = <&ipi_mailbox_pmu1 0>, + <&ipi_mailbox_pmu1 1>; + mbox-names = "tx", "rx"; + }; + + zynqmp_reset: reset-controller { + compatible = "xlnx,zynqmp-reset"; + #reset-cells = <1>; + }; + + pinctrl0: pinctrl { + compatible = "xlnx,zynqmp-pinctrl"; + status = "disabled"; + }; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupt-parent = <&gic>; @@ -124,7 +177,94 @@ <1 10 0xf08>; }; - amba_apu: amba-apu@0 { + edac { + compatible = "arm,cortex-a53-edac"; + }; + + fpga_full: fpga-full { + compatible = "fpga-region"; + fpga-mgr = <&pcap>; + #address-cells = <2>; + #size-cells = <2>; + }; + + nvmem_firmware { + compatible = "xlnx,zynqmp-nvmem-fw"; + #address-cells = <1>; + #size-cells = <1>; + + soc_revision: soc_revision@0 { + reg = <0x0 0x4>; + }; + /* efuse access */ + efuse_dna: efuse_dna@c { + reg = <0xc 0xc>; + }; + efuse_usr0: efuse_usr0@20 { + reg = <0x20 0x4>; + }; + efuse_usr1: efuse_usr1@24 { + reg = <0x24 0x4>; + }; + efuse_usr2: efuse_usr2@28 { + reg = <0x28 0x4>; + }; + efuse_usr3: efuse_usr3@2c { + reg = <0x2c 0x4>; + }; + efuse_usr4: efuse_usr4@30 { + reg = <0x30 0x4>; + }; + efuse_usr5: efuse_usr5@34 { + reg = <0x34 0x4>; + }; + efuse_usr6: efuse_usr6@38 { + reg = <0x38 0x4>; + }; + efuse_usr7: efuse_usr7@3c { + reg = <0x3c 0x4>; + }; + efuse_miscusr: efuse_miscusr@40 { + reg = <0x40 0x4>; + }; + efuse_chash: efuse_chash@50 { + reg = <0x50 0x4>; + }; + efuse_pufmisc: efuse_pufmisc@54 { + reg = <0x54 0x4>; + }; + efuse_sec: efuse_sec@58 { + reg = <0x58 0x4>; + }; + efuse_spkid: efuse_spkid@5c { + reg = <0x5c 0x4>; + }; + efuse_ppk0hash: efuse_ppk0hash@a0 { + reg = <0xa0 0x30>; + }; + efuse_ppk1hash: efuse_ppk1hash@d0 { + reg = <0xd0 0x30>; + }; + }; + + pcap: pcap { + compatible = "xlnx,zynqmp-pcap-fpga"; + clock-names = "ref_clk"; + }; + + xlnx_rsa: zynqmp_rsa { + compatible = "xlnx,zynqmp-rsa"; + }; + + xlnx_keccak_384: sha384 { + compatible = "xlnx,zynqmp-keccak-384"; + }; + + xlnx_aes: zynqmp_aes { + compatible = "xlnx,zynqmp-aes"; + }; + + amba_apu: amba_apu@0 { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <1>; @@ -143,8 +283,23 @@ }; }; + smmu: smmu@fd800000 { + compatible = "arm,mmu-500"; + reg = <0x0 0xfd800000 0x0 0x20000>; + #iommu-cells = <1>; + status = "disabled"; + #global-interrupts = <1>; + interrupt-parent = <&gic>; + interrupts = <0 155 4>, + <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>, + <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>, + <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>, + <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>; + }; + amba: amba { compatible = "simple-bus"; + u-boot,dm-pre-reloc; #address-cells = <2>; #size-cells = <2>; ranges; @@ -158,6 +313,7 @@ interrupt-parent = <&gic>; tx-fifo-depth = <0x40>; rx-fifo-depth = <0x40>; + power-domains = <&zynqmp_firmware PD_CAN_0>; }; can1: can@ff070000 { @@ -169,6 +325,7 @@ interrupt-parent = <&gic>; tx-fifo-depth = <0x40>; rx-fifo-depth = <0x40>; + power-domains = <&zynqmp_firmware PD_CAN_1>; }; cci: cci@fd6e0000 { @@ -199,6 +356,9 @@ interrupts = <0 124 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14e8>; + power-domains = <&zynqmp_firmware PD_GDMA>; }; fpd_dma_chan2: dma@fd510000 { @@ -209,6 +369,9 @@ interrupts = <0 125 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14e9>; + power-domains = <&zynqmp_firmware PD_GDMA>; }; fpd_dma_chan3: dma@fd520000 { @@ -219,6 +382,9 @@ interrupts = <0 126 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14ea>; + power-domains = <&zynqmp_firmware PD_GDMA>; }; fpd_dma_chan4: dma@fd530000 { @@ -229,6 +395,9 @@ interrupts = <0 127 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14eb>; + power-domains = <&zynqmp_firmware PD_GDMA>; }; fpd_dma_chan5: dma@fd540000 { @@ -239,6 +408,9 @@ interrupts = <0 128 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14ec>; + power-domains = <&zynqmp_firmware PD_GDMA>; }; fpd_dma_chan6: dma@fd550000 { @@ -249,6 +421,9 @@ interrupts = <0 129 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14ed>; + power-domains = <&zynqmp_firmware PD_GDMA>; }; fpd_dma_chan7: dma@fd560000 { @@ -259,6 +434,9 @@ interrupts = <0 130 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14ee>; + power-domains = <&zynqmp_firmware PD_GDMA>; }; fpd_dma_chan8: dma@fd570000 { @@ -269,6 +447,20 @@ interrupts = <0 131 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <128>; + #stream-id-cells = <1>; + iommus = <&smmu 0x14ef>; + power-domains = <&zynqmp_firmware PD_GDMA>; + }; + + gpu: gpu@fd4b0000 { + status = "disabled"; + compatible = "arm,mali-400", "arm,mali-utgard"; + reg = <0x0 0xfd4b0000 0x0 0x10000>; + interrupt-parent = <&gic>; + interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>; + interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1"; + clock-names = "gpu", "gpu_pp0", "gpu_pp1"; + power-domains = <&zynqmp_firmware PD_GPU>; }; /* LPDDMA default allows only secured access. inorder to enable @@ -283,6 +475,9 @@ interrupts = <0 77 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + /* iommus = <&smmu 0x868>; */ + power-domains = <&zynqmp_firmware PD_ADMA>; }; lpd_dma_chan2: dma@ffa90000 { @@ -293,6 +488,9 @@ interrupts = <0 78 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + /* iommus = <&smmu 0x869>; */ + power-domains = <&zynqmp_firmware PD_ADMA>; }; lpd_dma_chan3: dma@ffaa0000 { @@ -303,6 +501,9 @@ interrupts = <0 79 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + /* iommus = <&smmu 0x86a>; */ + power-domains = <&zynqmp_firmware PD_ADMA>; }; lpd_dma_chan4: dma@ffab0000 { @@ -313,6 +514,9 @@ interrupts = <0 80 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + /* iommus = <&smmu 0x86b>; */ + power-domains = <&zynqmp_firmware PD_ADMA>; }; lpd_dma_chan5: dma@ffac0000 { @@ -323,6 +527,9 @@ interrupts = <0 81 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + /* iommus = <&smmu 0x86c>; */ + power-domains = <&zynqmp_firmware PD_ADMA>; }; lpd_dma_chan6: dma@ffad0000 { @@ -333,6 +540,9 @@ interrupts = <0 82 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + /* iommus = <&smmu 0x86d>; */ + power-domains = <&zynqmp_firmware PD_ADMA>; }; lpd_dma_chan7: dma@ffae0000 { @@ -343,6 +553,9 @@ interrupts = <0 83 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + /* iommus = <&smmu 0x86e>; */ + power-domains = <&zynqmp_firmware PD_ADMA>; }; lpd_dma_chan8: dma@ffaf0000 { @@ -353,6 +566,9 @@ interrupts = <0 84 4>; clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <64>; + #stream-id-cells = <1>; + /* iommus = <&smmu 0x86f>; */ + power-domains = <&zynqmp_firmware PD_ADMA>; }; mc: memory-controller@fd070000 { @@ -362,6 +578,20 @@ interrupts = <0 112 4>; }; + nand0: nand@ff100000 { + compatible = "arasan,nfc-v3p10"; + status = "disabled"; + reg = <0x0 0xff100000 0x0 0x1000>; + clock-names = "clk_sys", "clk_flash"; + interrupt-parent = <&gic>; + interrupts = <0 14 4>; + #address-cells = <1>; + #size-cells = <0>; + #stream-id-cells = <1>; + iommus = <&smmu 0x872>; + power-domains = <&zynqmp_firmware PD_NAND>; + }; + gem0: ethernet@ff0b0000 { compatible = "cdns,zynqmp-gem", "cdns,gem"; status = "disabled"; @@ -371,6 +601,9 @@ clock-names = "pclk", "hclk", "tx_clk"; #address-cells = <1>; #size-cells = <0>; + #stream-id-cells = <1>; + iommus = <&smmu 0x874>; + power-domains = <&zynqmp_firmware PD_ETH_0>; }; gem1: ethernet@ff0c0000 { @@ -382,6 +615,9 @@ clock-names = "pclk", "hclk", "tx_clk"; #address-cells = <1>; #size-cells = <0>; + #stream-id-cells = <1>; + iommus = <&smmu 0x875>; + power-domains = <&zynqmp_firmware PD_ETH_1>; }; gem2: ethernet@ff0d0000 { @@ -393,6 +629,9 @@ clock-names = "pclk", "hclk", "tx_clk"; #address-cells = <1>; #size-cells = <0>; + #stream-id-cells = <1>; + iommus = <&smmu 0x876>; + power-domains = <&zynqmp_firmware PD_ETH_2>; }; gem3: ethernet@ff0e0000 { @@ -404,18 +643,22 @@ clock-names = "pclk", "hclk", "tx_clk"; #address-cells = <1>; #size-cells = <0>; + #stream-id-cells = <1>; + iommus = <&smmu 0x877>; + power-domains = <&zynqmp_firmware PD_ETH_3>; }; gpio: gpio@ff0a0000 { compatible = "xlnx,zynqmp-gpio-1.0"; status = "disabled"; #gpio-cells = <0x2>; - gpio-controller; interrupt-parent = <&gic>; interrupts = <0 16 4>; interrupt-controller; #interrupt-cells = <2>; reg = <0x0 0xff0a0000 0x0 0x1000>; + gpio-controller; + power-domains = <&zynqmp_firmware PD_GPIO>; }; i2c0: i2c@ff020000 { @@ -426,6 +669,7 @@ reg = <0x0 0xff020000 0x0 0x1000>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&zynqmp_firmware PD_I2C_0>; }; i2c1: i2c@ff030000 { @@ -436,6 +680,86 @@ reg = <0x0 0xff030000 0x0 0x1000>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&zynqmp_firmware PD_I2C_1>; + }; + + ocm: memory-controller@ff960000 { + compatible = "xlnx,zynqmp-ocmc-1.0"; + reg = <0x0 0xff960000 0x0 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 10 4>; + }; + + perf_monitor_ocm: perf-monitor@ffa00000 { + compatible = "xlnx,axi-perf-monitor"; + reg = <0x0 0xffa00000 0x0 0x10000>; + interrupts = <0 25 4>; + interrupt-parent = <&gic>; + xlnx,enable-profile = <0>; + xlnx,enable-trace = <0>; + xlnx,num-monitor-slots = <1>; + xlnx,enable-event-count = <1>; + xlnx,enable-event-log = <1>; + xlnx,have-sampled-metric-cnt = <1>; + xlnx,num-of-counters = <8>; + xlnx,metric-count-width = <32>; + xlnx,metrics-sample-count-width = <32>; + xlnx,global-count-width = <32>; + xlnx,metric-count-scale = <1>; + }; + + perf_monitor_ddr: perf-monitor@fd0b0000 { + compatible = "xlnx,axi-perf-monitor"; + reg = <0x0 0xfd0b0000 0x0 0x10000>; + interrupts = <0 123 4>; + interrupt-parent = <&gic>; + xlnx,enable-profile = <0>; + xlnx,enable-trace = <0>; + xlnx,num-monitor-slots = <6>; + xlnx,enable-event-count = <1>; + xlnx,enable-event-log = <0>; + xlnx,have-sampled-metric-cnt = <1>; + xlnx,num-of-counters = <10>; + xlnx,metric-count-width = <32>; + xlnx,metrics-sample-count-width = <32>; + xlnx,global-count-width = <32>; + xlnx,metric-count-scale = <1>; + }; + + perf_monitor_cci: perf-monitor@fd490000 { + compatible = "xlnx,axi-perf-monitor"; + reg = <0x0 0xfd490000 0x0 0x10000>; + interrupts = <0 123 4>; + interrupt-parent = <&gic>; + xlnx,enable-profile = <0>; + xlnx,enable-trace = <0>; + xlnx,num-monitor-slots = <1>; + xlnx,enable-event-count = <1>; + xlnx,enable-event-log = <0>; + xlnx,have-sampled-metric-cnt = <1>; + xlnx,num-of-counters = <8>; + xlnx,metric-count-width = <32>; + xlnx,metrics-sample-count-width = <32>; + xlnx,global-count-width = <32>; + xlnx,metric-count-scale = <1>; + }; + + perf_monitor_lpd: perf-monitor@ffa10000 { + compatible = "xlnx,axi-perf-monitor"; + reg = <0x0 0xffa10000 0x0 0x10000>; + interrupts = <0 25 4>; + interrupt-parent = <&gic>; + xlnx,enable-profile = <0>; + xlnx,enable-trace = <0>; + xlnx,num-monitor-slots = <1>; + xlnx,enable-event-count = <1>; + xlnx,enable-event-log = <1>; + xlnx,have-sampled-metric-cnt = <1>; + xlnx,num-of-counters = <8>; + xlnx,metric-count-width = <32>; + xlnx,metrics-sample-count-width = <32>; + xlnx,global-count-width = <32>; + xlnx,metric-count-scale = <1>; }; pcie: pcie@fd0e0000 { @@ -467,6 +791,7 @@ <0x0 0x0 0x0 0x2 &pcie_intc 0x2>, <0x0 0x0 0x0 0x3 &pcie_intc 0x3>, <0x0 0x0 0x0 0x4 &pcie_intc 0x4>; + power-domains = <&zynqmp_firmware PD_PCIE>; pcie_intc: legacy-interrupt-controller { interrupt-controller; #address-cells = <0>; @@ -474,6 +799,23 @@ }; }; + qspi: spi@ff0f0000 { + u-boot,dm-pre-reloc; + compatible = "xlnx,zynqmp-qspi-1.0"; + status = "disabled"; + clock-names = "ref_clk", "pclk"; + interrupts = <0 15 4>; + interrupt-parent = <&gic>; + num-cs = <1>; + reg = <0x0 0xff0f0000 0x0 0x1000>, + <0x0 0xc0000000 0x0 0x8000000>; + #address-cells = <1>; + #size-cells = <0>; + #stream-id-cells = <1>; + iommus = <&smmu 0x873>; + power-domains = <&zynqmp_firmware PD_QSPI>; + }; + rtc: rtc@ffa60000 { compatible = "xlnx,zynqmp-rtc"; status = "disabled"; @@ -484,43 +826,87 @@ calibration = <0x8000>; }; + serdes: zynqmp_phy@fd400000 { + compatible = "xlnx,zynqmp-psgtr-v1.1"; + status = "disabled"; + reg = <0x0 0xfd400000 0x0 0x40000>, + <0x0 0xfd3d0000 0x0 0x1000>; + reg-names = "serdes", "siou"; + nvmem-cells = <&soc_revision>; + nvmem-cell-names = "soc_revision"; + resets = <&zynqmp_reset ZYNQMP_RESET_SATA>, + <&zynqmp_reset ZYNQMP_RESET_USB0_CORERESET>, + <&zynqmp_reset ZYNQMP_RESET_USB1_CORERESET>, + <&zynqmp_reset ZYNQMP_RESET_USB0_HIBERRESET>, + <&zynqmp_reset ZYNQMP_RESET_USB1_HIBERRESET>, + <&zynqmp_reset ZYNQMP_RESET_USB0_APB>, + <&zynqmp_reset ZYNQMP_RESET_USB1_APB>, + <&zynqmp_reset ZYNQMP_RESET_DP>, + <&zynqmp_reset ZYNQMP_RESET_GEM0>, + <&zynqmp_reset ZYNQMP_RESET_GEM1>, + <&zynqmp_reset ZYNQMP_RESET_GEM2>, + <&zynqmp_reset ZYNQMP_RESET_GEM3>; + reset-names = "sata_rst", "usb0_crst", "usb1_crst", + "usb0_hibrst", "usb1_hibrst", "usb0_apbrst", + "usb1_apbrst", "dp_rst", "gem0_rst", + "gem1_rst", "gem2_rst", "gem3_rst"; + lane0: lane0 { + #phy-cells = <4>; + }; + lane1: lane1 { + #phy-cells = <4>; + }; + lane2: lane2 { + #phy-cells = <4>; + }; + lane3: lane3 { + #phy-cells = <4>; + }; + }; + sata: ahci@fd0c0000 { compatible = "ceva,ahci-1v84"; status = "disabled"; reg = <0x0 0xfd0c0000 0x0 0x2000>; interrupt-parent = <&gic>; interrupts = <0 133 4>; + power-domains = <&zynqmp_firmware PD_SATA>; + #stream-id-cells = <4>; + /* iommus = <&smmu 0x4c0>, <&smmu 0x4c1>, */ + /* <&smmu 0x4c2>, <&smmu 0x4c3>; */ + /* dma-coherent; */ }; sdhci0: mmc@ff160000 { - compatible = "arasan,sdhci-8.9a"; + u-boot,dm-pre-reloc; + compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 48 4>; reg = <0x0 0xff160000 0x0 0x1000>; clock-names = "clk_xin", "clk_ahb"; + xlnx,device_id = <0>; + #stream-id-cells = <1>; + iommus = <&smmu 0x870>; + power-domains = <&zynqmp_firmware PD_SD_0>; + nvmem-cells = <&soc_revision>; + nvmem-cell-names = "soc_revision"; }; sdhci1: mmc@ff170000 { - compatible = "arasan,sdhci-8.9a"; + u-boot,dm-pre-reloc; + compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 49 4>; reg = <0x0 0xff170000 0x0 0x1000>; clock-names = "clk_xin", "clk_ahb"; - }; - - smmu: smmu@fd800000 { - compatible = "arm,mmu-500"; - reg = <0x0 0xfd800000 0x0 0x20000>; - status = "disabled"; - #global-interrupts = <1>; - interrupt-parent = <&gic>; - interrupts = <0 155 4>, - <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>, - <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>, - <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>, - <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>; + xlnx,device_id = <1>; + #stream-id-cells = <1>; + iommus = <&smmu 0x871>; + power-domains = <&zynqmp_firmware PD_SD_1>; + nvmem-cells = <&soc_revision>; + nvmem-cell-names = "soc_revision"; }; spi0: spi@ff040000 { @@ -532,6 +918,7 @@ clock-names = "ref_clk", "pclk"; #address-cells = <1>; #size-cells = <0>; + power-domains = <&zynqmp_firmware PD_SPI_0>; }; spi1: spi@ff050000 { @@ -543,6 +930,7 @@ clock-names = "ref_clk", "pclk"; #address-cells = <1>; #size-cells = <0>; + power-domains = <&zynqmp_firmware PD_SPI_1>; }; ttc0: timer@ff110000 { @@ -552,6 +940,7 @@ interrupts = <0 36 4>, <0 37 4>, <0 38 4>; reg = <0x0 0xff110000 0x0 0x1000>; timer-width = <32>; + power-domains = <&zynqmp_firmware PD_TTC_0>; }; ttc1: timer@ff120000 { @@ -561,6 +950,7 @@ interrupts = <0 39 4>, <0 40 4>, <0 41 4>; reg = <0x0 0xff120000 0x0 0x1000>; timer-width = <32>; + power-domains = <&zynqmp_firmware PD_TTC_1>; }; ttc2: timer@ff130000 { @@ -570,6 +960,7 @@ interrupts = <0 42 4>, <0 43 4>, <0 44 4>; reg = <0x0 0xff130000 0x0 0x1000>; timer-width = <32>; + power-domains = <&zynqmp_firmware PD_TTC_2>; }; ttc3: timer@ff140000 { @@ -579,42 +970,90 @@ interrupts = <0 45 4>, <0 46 4>, <0 47 4>; reg = <0x0 0xff140000 0x0 0x1000>; timer-width = <32>; + power-domains = <&zynqmp_firmware PD_TTC_3>; }; uart0: serial@ff000000 { + u-boot,dm-pre-reloc; compatible = "cdns,uart-r1p12", "xlnx,xuartps"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 21 4>; reg = <0x0 0xff000000 0x0 0x1000>; clock-names = "uart_clk", "pclk"; + power-domains = <&zynqmp_firmware PD_UART_0>; }; uart1: serial@ff010000 { + u-boot,dm-pre-reloc; compatible = "cdns,uart-r1p12", "xlnx,xuartps"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 22 4>; reg = <0x0 0xff010000 0x0 0x1000>; clock-names = "uart_clk", "pclk"; + power-domains = <&zynqmp_firmware PD_UART_1>; }; - usb0: usb@fe200000 { - compatible = "snps,dwc3"; + usb0: usb0@ff9d0000 { + #address-cells = <2>; + #size-cells = <2>; status = "disabled"; - interrupt-parent = <&gic>; - interrupts = <0 65 4>; - reg = <0x0 0xfe200000 0x0 0x40000>; - clock-names = "clk_xin", "clk_ahb"; + compatible = "xlnx,zynqmp-dwc3"; + reg = <0x0 0xff9d0000 0x0 0x100>; + clock-names = "bus_clk", "ref_clk"; + power-domains = <&zynqmp_firmware PD_USB_0>; + ranges; + nvmem-cells = <&soc_revision>; + nvmem-cell-names = "soc_revision"; + + dwc3_0: dwc3@fe200000 { + compatible = "snps,dwc3"; + status = "disabled"; + reg = <0x0 0xfe200000 0x0 0x40000>; + interrupt-parent = <&gic>; + interrupt-names = "dwc_usb3", "otg", "hiber"; + interrupts = <0 65 4>, <0 69 4>, <0 75 4>; + #stream-id-cells = <1>; + iommus = <&smmu 0x860>; + snps,quirk-frame-length-adjustment = <0x20>; + snps,refclk_fladj; + snps,enable_guctl1_resume_quirk; + snps,enable_guctl1_ipd_quirk; + snps,xhci-stream-quirk; + /* dma-coherent; */ + /* snps,enable-hibernation; */ + }; }; - usb1: usb@fe300000 { - compatible = "snps,dwc3"; + usb1: usb1@ff9e0000 { + #address-cells = <2>; + #size-cells = <2>; status = "disabled"; - interrupt-parent = <&gic>; - interrupts = <0 70 4>; - reg = <0x0 0xfe300000 0x0 0x40000>; - clock-names = "clk_xin", "clk_ahb"; + compatible = "xlnx,zynqmp-dwc3"; + reg = <0x0 0xff9e0000 0x0 0x100>; + clock-names = "bus_clk", "ref_clk"; + power-domains = <&zynqmp_firmware PD_USB_1>; + ranges; + nvmem-cells = <&soc_revision>; + nvmem-cell-names = "soc_revision"; + + dwc3_1: dwc3@fe300000 { + compatible = "snps,dwc3"; + status = "disabled"; + reg = <0x0 0xfe300000 0x0 0x40000>; + interrupt-parent = <&gic>; + interrupt-names = "dwc_usb3", "otg", "hiber"; + interrupts = <0 70 4>, <0 74 4>, <0 76 4>; + #stream-id-cells = <1>; + iommus = <&smmu 0x861>; + snps,quirk-frame-length-adjustment = <0x20>; + snps,refclk_fladj; + snps,enable_guctl1_resume_quirk; + snps,enable_guctl1_ipd_quirk; + snps,xhci-stream-quirk; + /* dma-coherent; */ + }; }; watchdog0: watchdog@fd4d0000 { @@ -623,7 +1062,130 @@ interrupt-parent = <&gic>; interrupts = <0 113 1>; reg = <0x0 0xfd4d0000 0x0 0x1000>; + timeout-sec = <60>; + reset-on-timeout; + }; + + lpd_watchdog: watchdog@ff150000 { + compatible = "cdns,wdt-r1p2"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 52 1>; + reg = <0x0 0xff150000 0x0 0x1000>; timeout-sec = <10>; }; + + xilinx_ams: ams@ffa50000 { + compatible = "xlnx,zynqmp-ams"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 56 4>; + interrupt-names = "ams-irq"; + reg = <0x0 0xffa50000 0x0 0x800>; + reg-names = "ams-base"; + #address-cells = <2>; + #size-cells = <2>; + #io-channel-cells = <1>; + ranges; + + ams_ps: ams_ps@ffa50800 { + compatible = "xlnx,zynqmp-ams-ps"; + status = "disabled"; + reg = <0x0 0xffa50800 0x0 0x400>; + }; + + ams_pl: ams_pl@ffa50c00 { + compatible = "xlnx,zynqmp-ams-pl"; + status = "disabled"; + reg = <0x0 0xffa50c00 0x0 0x400>; + }; + }; + + xlnx_dpdma: dma@fd4c0000 { + compatible = "xlnx,dpdma"; + status = "disabled"; + reg = <0x0 0xfd4c0000 0x0 0x1000>; + interrupts = <0 122 4>; + interrupt-parent = <&gic>; + clock-names = "axi_clk"; + power-domains = <&zynqmp_firmware PD_DP>; + dma-channels = <6>; + #dma-cells = <1>; + dma-video0channel { + compatible = "xlnx,video0"; + }; + dma-video1channel { + compatible = "xlnx,video1"; + }; + dma-video2channel { + compatible = "xlnx,video2"; + }; + dma-graphicschannel { + compatible = "xlnx,graphics"; + }; + dma-audio0channel { + compatible = "xlnx,audio0"; + }; + dma-audio1channel { + compatible = "xlnx,audio1"; + }; + }; + + zynqmp_dpsub: zynqmp-display@fd4a0000 { + compatible = "xlnx,zynqmp-dpsub-1.7"; + status = "disabled"; + reg = <0x0 0xfd4a0000 0x0 0x1000>, + <0x0 0xfd4aa000 0x0 0x1000>, + <0x0 0xfd4ab000 0x0 0x1000>, + <0x0 0xfd4ac000 0x0 0x1000>; + reg-names = "dp", "blend", "av_buf", "aud"; + interrupts = <0 119 4>; + interrupt-parent = <&gic>; + + clock-names = "dp_apb_clk", "dp_aud_clk", + "dp_vtc_pixel_clk_in"; + + power-domains = <&zynqmp_firmware PD_DP>; + + vid-layer { + dma-names = "vid0", "vid1", "vid2"; + dmas = <&xlnx_dpdma 0>, + <&xlnx_dpdma 1>, + <&xlnx_dpdma 2>; + }; + + gfx-layer { + dma-names = "gfx0"; + dmas = <&xlnx_dpdma 3>; + }; + + /* dummy node to indicate there's no child i2c device */ + i2c-bus { + }; + + zynqmp_dp_snd_codec0: zynqmp_dp_snd_codec0 { + compatible = "xlnx,dp-snd-codec"; + clock-names = "aud_clk"; + }; + + zynqmp_dp_snd_pcm0: zynqmp_dp_snd_pcm0 { + compatible = "xlnx,dp-snd-pcm"; + dmas = <&xlnx_dpdma 4>; + dma-names = "tx"; + }; + + zynqmp_dp_snd_pcm1: zynqmp_dp_snd_pcm1 { + compatible = "xlnx,dp-snd-pcm"; + dmas = <&xlnx_dpdma 5>; + dma-names = "tx"; + }; + + zynqmp_dp_snd_card0: zynqmp_dp_snd_card { + compatible = "xlnx,dp-snd-card"; + xlnx,dp-snd-pcm = <&zynqmp_dp_snd_pcm0>, + <&zynqmp_dp_snd_pcm1>; + xlnx,dp-snd-codec = <&zynqmp_dp_snd_codec0>; + }; + }; }; }; |