aboutsummaryrefslogtreecommitdiffstats
AgeCommit message (Collapse)Author
2015-12-01drivers/net: Update the LSI FEMAC Driver for Axxiastandard/axxia/baseJohn Jacques
The driver was calling free_irq() without first calling disable_irq() to synchronize pending and active handlers. This commit adds a call to disable_irq(). Signed-off-by: John Jacques <john.jacques@intel.com>
2015-12-01axxia: Remove References to AXXIA_NCR_RESET_CHECKJohn Jacques
This define is no longer used. Signed-off-by: John Jacques <john.jacques@intel.com>
2015-12-01drivers/misc/lsi-ncr.c: Move the Header to the Default PathJohn Jacques
Move lsi-ncr.h to include/linux as it is used in arch/arm/* and arch/powerpc/* among other places. All source files including lsi-ncr.h are updated as well. Signed-off-by: John Jacques <john.jacques@intel.com>
2015-12-01net: femac: Possible deadlock during nfs mount fixed.John Jacques
This is to fix mount.nfs over TCP generating the following circular dependency and possible DEADLOCK message. FEMAC driver has been converted to LLTX to avoid this issue. Tx lock is introduced in the FEMAC driver. CPU0 CPU1 ---- ---- lock(clock-AF_INET); lock(_xmit_ETHER#2); lock(clock-AF_INET); lock(_xmit_ETHER#2); *** DEADLOCK *** Signed-off-by: Sreedevi Joshi <sreedevi.joshi@intel.com> Signed-off-by: John Jacques <john.jacques@intel.com>
2015-12-01drivers/misc: Further NCR CleanupJohn Jacques
Only map the Axxia system controller when needed, and don't keep the mapping. Signed-off-by: John Jacques <john.jacques@intel.com>
2015-12-01arch/powerpc/axxia: Fix Build Error when SMP is Not EnabledJohn Jacques
The m*dcr() macros were called incorrectly when SMP was not enabled. Signed-off-by: John Jacques <john.jacques@intel.com>
2015-12-01arch/arm/mach-axxia: Fix Build Error when CONFIG_SMP=yJohn Jacques
The Axxia GIC driver was calling handle_IPI() when SMP was not enabled. Signed-off-by: John Jacques <john.jacques@intel.com>
2015-12-01drivers/misc/lsi-ncr.c: Cleanup and PerformanceJohn Jacques
The Axxia NCR code has been moved a number of times. Remove unused versions. For some targets, a low-level lock is not needed. Don't lock in those cases. Signed-off-by: John Jacques <john.jacques@intel.com>
2015-08-24axxiaarm: delete obsolete defconfigsCristian Bercaru
This patch deletes 2 arm defconfigs no longer used. Instead, the Axxia platforms use configuration fragments. Signed-off-by: Cristian Bercaru <cristian.bercaru@windriver.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
2015-05-15rapidio: axxia: fix array initializationCristian Bercaru
This patch ensures that 'axxia_rio_ds_port_irq_init' initializes the right input irq handlers: 'ib_dse_vsid_irq' instead of 'ob_dse_irq'. Mis-initializing 'ob_dse_irq' also caused an "array index out of bounds" exception. The size of 'ob_dse_irq' is 16 (RIO_MAX_NUM_OBDS_DSE), while the init index ranges from 0 to the size of 'ib_dse_vsid_irq' i.e. 32 (RIO_MAX_NUM_IBDS_VSID_M). gcc warns about the mis-initialization: "drivers/rapidio/devices/lsi/axxia-rio-ds.c:1857:41: warning: iteration 16u invokes undefined behavior [-Waggressive-loop-optimizations] ptr_ds_priv->ob_dse_irq[i].release_fn = release_ib_ds;" Signed-off-by: Cristian Bercaru <cristian.bercaru@windriver.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
2015-05-15char: hwrng: AXXIA HW Random Number Generator supportSreedevi Joshi
AXXIA TRNG block driver for random number generation has been added. This provides HW Random number generation using AXXIA HW block. When enabled in the device tree, /dev/hwrng device is available and random numbers can be read from there. Signed-off-by: Sreedevi Joshi <sreedevi.joshi@intel.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
2015-03-31arch/powerpc/kernel: Address IBM PPC476 erratum 48 (update)Sangeetha Rao
This patch updates the fix to PPC476 erratum 48 in order to use the correct calculation for L2 cache register for CPUs 4 and 5. Signed-off-by: Sangeetha Rao <sangeetha.rao@intel.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
2015-03-16arch/powerpc/kernel: Address IBM PPC476 TLB parity errorSangeetha Rao
Signed-off-by: Sangeetha Rao <sangeetha.rao@intel.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
2015-03-16arch/powerpc/kernel: Address IBM PPC476 erratum 48Sangeetha Rao
Signed-off-by: Sangeetha Rao <sangeetha.rao@intel.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
2015-03-16arch/powerpc/kernel: Address IBM PPC476 erratum 47Sangeetha Rao
Disable the BTAC in order to prevent errors in circumstances described by IBM PPC476 erratum 47. Signed-off-by: Sangeetha Rao <sangeetha.rao@intel.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
2015-03-16Revert "arch/powerpc/kernel: Address IBM PPC476 erratum 47"Bruce Ashfield
This reverts commit d49a60bb3e7545b772f285d4b25039e075e2cb3c.
2015-03-16Revert "arch/powerpc/kernel: Address IBM PPC476 erratum 48"Bruce Ashfield
This reverts commit be12b74ad8fae321bc039e386deb1f4579451546.
2015-03-16Revert "arch/powerpc/kernel: Address IBM PPC476 TLB parity error"Bruce Ashfield
This reverts commit ebaa511dad5bdca51b710e217dae24541936757b.
2015-03-13arch/powerpc/kernel: Address IBM PPC476 TLB parity errorCristian Bercaru
Signed-off-by: Sangeetha Rao <sangeetha.rao@intel.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
2015-03-13arch/powerpc/kernel: Address IBM PPC476 erratum 48Cristian Bercaru
Signed-off-by: Sangeetha Rao <sangeetha.rao@intel.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
2015-03-13arch/powerpc/kernel: Address IBM PPC476 erratum 47Cristian Bercaru
Disable the BTAC in order to prevent errors in circumstances described by IBM PPC476 erratum 47. Signed-off-by: Sangeetha Rao <sangeetha.rao@intel.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
2014-12-18arch/powerpc/sysdev: Added PCIe MSI support for AXM35xxSangeethaRao
Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
2014-12-18arch/powerpc: Add a Work Around for Axxia 3500 ResetsJohn Jacques
The work around is to switch the PPCs back to the reference clock before issuing a reset. As described in the defect: The reset_system issue is caused since the 6 counters are **NOT** reset by reset_system, but the PLL and clock switch that controls the counters **IS**. Workaround for this: switch clk_ppc to clk_ref before a reset_system or reset_chip. This logically should work, BUT no STA work has been done to validate this. Empirically, this seems to work. Signed-off-by: John Jacques <john.jacques@lsi.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
2014-12-18arch/powerpc: Fix Up the MDIO Offset and Period on AxxiaJohn Jacques
If the MDIO offset and period are defined in the device tree, use them. Otherwise, don't change anything. Signed-off-by: John Jacques <john.jacques@lsi.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
2014-12-18arch/arm/mach-axxia: Calculate delay calibration onceSangeethaRao
Added calibrate_delay_is_known() such that only the first core calculates delay calibration and rest of the cores use the calculated value by the axxia_calibrate_delay_converge(). Set LPS_PREC - number of bits of precision for the loops_per_jiffy. Each time we refine our estimate after the first takes 1.5/HZ seconds, so try to start with a good estimate. For the boot cpu we can skip the delay calibration and assign it a value calculated based on the timer frequency. For the rest of the CPUs we cannot assume that the timer frequency is same as the cpu frequency, hence do the calibration for those. Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
2014-12-18axxia-nand: Use the right Machine Types in the Axxia NAND DriverJohn Jacques
Signed-off-by: John Jacques <john.jacques@lsi.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
2014-12-18arch/powerpc: Updated Device Trees for Axxia TargetsJohn Jacques
- Updated compatibility strings to work with the latest boot loader. - Updated reg adresses for memory, I2C - Defined I2C devices for acp35xx - Remove unused dts files: lsi_acp342x.dts and lsi_acp344x.dts Signed-off-by: John Jacques <john.jacques@lsi.com> Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
2014-07-16arch/powerpc: Reset Updates for AxxiaJohn Jacques
Reset support for 3400/2500/3500 got removed when we were porting to Yocto quite some time back. It has never worked since that port. This restores the original reset code require to support reset on 3400/2500/3500. Signed-off-by: John Jacques <john.jacques@lsi.com>
2014-07-16arch/powerpc: Update the Axxia NAND Driver to support 3500John Jacques
The nand driver changes have to support multiple controllers on multiple targets. This is the simplest way I could see to get there. There is a change from using hard coded defines to using the device tree which was required to accomplish this. Signed-off-by: John Jacques <john.jacques@lsi.com>
2014-07-16arch/powerpc: Updated Device Trees for Axxia (3400/3500)John Jacques
Also added the 6th Core to the Default 3500 Device Tree Signed-off-by: John Jacques <john.jacques@lsi.com>
2014-07-16powerpc/sysdev/lsi:adding 3500 PCIe inbound mapping supportSangeethaRao
Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
2014-07-16misc: lsi-smmon: Add parameter panic_on_fatalAnders Berg
Added module parameter panic_on_fatal which when set will cause the driver to call panic() when an uncorrectable ECC error is detected. Signed-off-by: Anders Berg <anders.berg@avagotech.com>
2014-07-16misc: lsi-smmon: Bug when probing with IRQ pendingAnders Berg
We must not call the ncr_write function to unmask interrupts with the memory controller interrupt enabled, as this could cause the ISR to be invoked before ncr_write has released the lock used to serialize register accesses. To avoid this, temporarily disable the IRQ line while unmasking the interrupt sources in the controller. Signed-off-by: Anders Berg <anders.berg@avagotech.com>
2014-07-16gpio: pl061: Fix .init section mismatchAnders Berg
Signed-off-by: Anders Berg <anders.berg@avagotech.com>
2014-07-16spi: pl022: Fix .init section mismatchAnders Berg
Signed-off-by: Anders Berg <anders.berg@avagotech.com>
2014-07-16ARM: axxia: Fix .init section mismatchAnders Berg
Signed-off-by: Anders Berg <anders.berg@avagotech.com>
2014-07-16i2c: axxia: Fall back to polling mode when no IRQAnders Berg
If the device tree does not specify an interrupt property, the device driver falls back to polling the controller status. This is needed to support simulator models without interrupt capabilities. Signed-off-by: Anders Berg <anders.berg@avagotech.com>
2014-07-16i2c: axxia: Fix broken smbus block readAnders Berg
Changed the initial transfer size on block reads from 1 to I2C_SMBUS_BLOCK_MAX. The size is adjusted when the first byte (block length) is received. Having the initial size set to 1 could cause the controller to stop the transfer after the block length byte, if the transfer length register wasn't updated in time. Signed-off-by: Anders Berg <anders.berg@avagotech.com>
2014-07-16i2c: axxia: Report spurious IRQAnders Berg
Fixed ISR to return IRQ_NONE if no interrupt was pending (or no transfer was in progress). Signed-off-by: Anders Berg <anders.berg@avagotech.com>
2014-07-16i2c: axxia: Minor cleanup (cosmetic)Anders Berg
Remove unused definitions and remove redundant variable. Signed-off-by: Anders Berg <anders.berg@avagotech.com>
2014-07-16ARM: axxia: Support MSI on both PCIe controllersAnders Berg
Add support for PCIe MSI on both controllers. On AXM5516, PCIE0 has the ability to signal MSI interrupts on 16 separate lines to the CPU cores, where as PCIE1 only has a single interrupt line that is used for legacy, status/error and MSI. This patch adds MSI support on a controller with only one interrupt line. Signed-off-by: Anders Berg <anders.berg@lsi.com>
2014-07-16ARM: dts: axxia: Corrected IRQ for memory contollersAnders Berg
The interrupt numbers for the memory controllers was wrong (conflicting with assigned range for PCI MSI. This would cause a device using MSI to fail to request its IRQ. Signed-off-by: Anders Berg <anders.berg@lsi.com>
2014-07-16net: lsi_acp_net: Added new string to DT matchAnders Berg
Add a the vendor prefixed compatible string to the match table. Signed-off-by: Anders Berg <anders.berg@lsi.com>
2014-06-15axxia: Fixed typo in acpxxxx.dts fileJohn Jacques
This typo causes the build to break, the fix includes some cleanup to the file. Signed-off-by: John Jacques <john.jacques@lsi.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
2014-06-05Merge branch 'standard/base' into standard/axxia/baseBruce Ashfield
2014-06-05Merge branch 'ltsi' into standard/basestandard/tiny/common-pcstandard/tiny/basestandard/sys940xstandard/fri2standard/fishriverstandard/crownbaystandard/common-pc/basestandard/common-pc/atom-pcstandard/common-pc-64/sugarbaystandard/common-pc-64/romleystandard/common-pc-64/mohonpeakstandard/common-pc-64/jasperforeststandard/common-pc-64/crystalforeststandard/common-pc-64/chiefriverstandard/common-pc-64/basestandard/beagleboardstandard/baseBruce Ashfield
2014-06-05Merge tag 'v3.4.91' into ltsiltsiBruce Ashfield
This is the 3.4.91 stable release
2014-06-05Merge branch 'standard/base' into standard/axxia/baseBruce Ashfield
2014-06-05Merge branch 'ltsi' into standard/baseBruce Ashfield
2014-06-05Merge tag 'v3.4.90' into ltsiBruce Ashfield
This is the 3.4.90 stable release
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-05-07 21:40:11 +0000