diff options
Diffstat (limited to 'meta/recipes-extended/libaio/libaio/libaio_fix_for_x32.patch')
| -rw-r--r-- | meta/recipes-extended/libaio/libaio/libaio_fix_for_x32.patch | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/meta/recipes-extended/libaio/libaio/libaio_fix_for_x32.patch b/meta/recipes-extended/libaio/libaio/libaio_fix_for_x32.patch new file mode 100644 index 0000000000..508f5a12f1 --- /dev/null +++ b/meta/recipes-extended/libaio/libaio/libaio_fix_for_x32.patch @@ -0,0 +1,61 @@ +Upstream-Status: Pending + +Properly load arguments 5 an 6 for x86-64 syscall +Use asm ("r10") and asm ("r8") to load arguments 5 an 6 for x86-64 +syscall so that it works with both x32 and x86-64. + +Received this patch from H.J. Lu <hjl.tools@gmail.com> + +Signed-Off-By: Nitin A Kamble <nitin.a.kamble@intel.com> +2011/12/02 + +--- libaio-0.3.109/src/syscall-x86_64.h.x32 2009-10-09 11:17:02.000000000 -0700 ++++ libaio-0.3.109/src/syscall-x86_64.h 2011-12-02 09:09:07.537603224 -0800 +@@ -1,8 +1,18 @@ ++#ifndef __NR_io_setup + #define __NR_io_setup 206 ++#endif ++#ifndef __NR_io_destroy + #define __NR_io_destroy 207 ++#endif ++#ifndef __NR_io_getevents + #define __NR_io_getevents 208 ++#endif ++#ifndef __NR_io_submit + #define __NR_io_submit 209 ++#endif ++#ifndef __NR_io_cancel + #define __NR_io_cancel 210 ++#endif + + #define __syscall_clobber "r11","rcx","memory" + #define __syscall "syscall" +@@ -42,10 +52,11 @@ return __res; \ + type fname (type1 arg1, type2 arg2, type3 arg3, type4 arg4) \ + { \ + long __res; \ +-__asm__ volatile ("movq %5,%%r10 ;" __syscall \ ++register long __a4 asm ("r10") = (long) arg4; \ ++__asm__ volatile (__syscall \ + : "=a" (__res) \ + : "0" (__NR_##sname),"D" ((long)(arg1)),"S" ((long)(arg2)), \ +- "d" ((long)(arg3)),"g" ((long)(arg4)) : __syscall_clobber,"r10" ); \ ++ "d" ((long)(arg3)),"r" (__a4)); \ + return __res; \ + } + +@@ -54,10 +65,11 @@ return __res; \ + type fname (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5) \ + { \ + long __res; \ +-__asm__ volatile ("movq %5,%%r10 ; movq %6,%%r8 ; " __syscall \ ++register long __a4 asm ("r10") = (long) arg4; \ ++register long __a5 asm ("r8") = (long) arg5; \ ++__asm__ volatile ( __syscall \ + : "=a" (__res) \ + : "0" (__NR_##sname),"D" ((long)(arg1)),"S" ((long)(arg2)), \ +- "d" ((long)(arg3)),"g" ((long)(arg4)),"g" ((long)(arg5)) : \ +- __syscall_clobber,"r8","r10" ); \ ++ "d" ((long)(arg3)),"r" (__a4),"r" (__a5)); \ + return __res; \ + } |