diff options
Diffstat (limited to 'recipes-microblaze/gcc')
7 files changed, 0 insertions, 500 deletions
diff --git a/recipes-microblaze/gcc/files/0006-Patch-microblaze-Remove-SECONDARY_MEMORY_NEEDED.patch b/recipes-microblaze/gcc/files/0006-Patch-microblaze-Remove-SECONDARY_MEMORY_NEEDED.patch deleted file mode 100644 index 923756a5..00000000 --- a/recipes-microblaze/gcc/files/0006-Patch-microblaze-Remove-SECONDARY_MEMORY_NEEDED.patch +++ /dev/null @@ -1,35 +0,0 @@ -From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> -Subject: [PATCH 6/8] [Patch, microblaze]: Remove SECONDARY_MEMORY_NEEDED - -MicroBlaze doesn't have restrictions that would force us to -reload regs via memory. Don't define SECONDARY_MEMORY_NEEDED. -Fixes an ICE when compiling OpenSSL for linux. - -Changelog - -2013-03-18 Edgar E. Iglesias <edgar.iglesias@xilinx.com> - - * gcc/config/microblaze/microblaze.h: Remove SECONDARY_MEMORY_NEEDED - definition. - -Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> -Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@xilinx.com> -Upstream-Status: Pending - -diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index 074b78e..add69e8 100644 ---- a/gcc/config/microblaze/microblaze.h -+++ b/gcc/config/microblaze/microblaze.h -@@ -422,9 +422,6 @@ extern enum reg_class microblaze_regno_to_class[]; - || GET_MODE (X) == VOIDmode) \ - ? (GR_REGS) : (CLASS)))) - --#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \ -- (GET_MODE_CLASS (MODE) == MODE_INT) -- - /* Stack layout; function entry, exit and calling. */ - - #define STACK_GROWS_DOWNWARD --- -1.7.5.4 - diff --git a/recipes-microblaze/gcc/files/0007-Patch-microblaze-Add-SIZE_TYPE-and-PTRDIFF_TYPE-to-m.patch b/recipes-microblaze/gcc/files/0007-Patch-microblaze-Add-SIZE_TYPE-and-PTRDIFF_TYPE-to-m.patch deleted file mode 100644 index 33aee3a7..00000000 --- a/recipes-microblaze/gcc/files/0007-Patch-microblaze-Add-SIZE_TYPE-and-PTRDIFF_TYPE-to-m.patch +++ /dev/null @@ -1,39 +0,0 @@ -From: David Holsgrove <david.holsgrove@xilinx.com> -Subject: [PATCH 7/8] [Patch, microblaze]: Add SIZE_TYPE and PTRDIFF_TYPE to - microblaze.h - -Fixes warnings like; - -warning: format '%zX' expects argument of type 'size_t', -but argument 3 has type 'unsigned int' [-Wformat] - -Changelog - -2013-03-18 David Holsgrove <david.holsgrove@xilinx.com> - - * gcc/config/microblaze/microblaze.h: Define SIZE_TYPE - and PTRDIFF_TYPE. - -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Upstream-Status: Pending - -diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index add69e8..367e986 100644 ---- a/gcc/config/microblaze/microblaze.h -+++ b/gcc/config/microblaze/microblaze.h -@@ -228,6 +228,12 @@ extern enum pipeline_type microblaze_pipe; - #define STRICT_ALIGNMENT 1 - #define PCC_BITFIELD_TYPE_MATTERS 1 - -+#undef SIZE_TYPE -+#define SIZE_TYPE "unsigned int" -+ -+#undef PTRDIFF_TYPE -+#define PTRDIFF_TYPE "int" -+ - #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ - ((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \ - && (ALIGN) < BITS_PER_WORD \ --- -1.7.5.4 - diff --git a/recipes-microblaze/gcc/files/0008-Patch-microblaze-Add-branch_compare-instruction.patch b/recipes-microblaze/gcc/files/0008-Patch-microblaze-Add-branch_compare-instruction.patch deleted file mode 100644 index 4da74f3f..00000000 --- a/recipes-microblaze/gcc/files/0008-Patch-microblaze-Add-branch_compare-instruction.patch +++ /dev/null @@ -1,224 +0,0 @@ -From: David Holsgrove <david.holsgrove@xilinx.com> -Subject: [PATCH 8/8] [Patch, microblaze]: Add branch_compare instruction - -To facilitate optimization pass understanding of the conditional -branch for microblaze, remove the UNSPEC'd signed_compare / -unsigned_compare instructions, and replace with a complete -branch_compare which will output_asm_insn the correct cmp/cmpu -depending on comparison code and signed / unsigned. - -We then return the correct branch instruction. - -cbranchsi now calls an expanded microblaze_expand_conditional_branch -function which will carry out compare against zero, compare EQ/NE, -and all other compares appropriately. - --funroll-loops optimization pass can now proceed - -Changelog - -2013-03-19 David Holsgrove <david.holsgrove@xilinx.com> - - * gcc/config/microblaze/predicates.md: Add cmp_op predicate. - * gcc/config/microblaze/microblaze.md: Add branch_compare - instruction which uses cmp_op predicate and emits cmp insn - before branch. - * gcc/config/microblaze/microblaze.c - (microblaze_emit_compare): Rename to - microblaze_expand_conditional_branch and consolidate logic. - (microblaze_expand_conditional_branch): emit branch_compare - insn instead of handling cmp op separate from branch insn. - -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Upstream-Status: Pending - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index 4417289..84b58bf 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -3336,65 +3336,45 @@ microblaze_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) - emit_move_insn (mem, fnaddr); - } - --/* Emit instruction to perform compare. -- cmp is (compare_op op0 op1). */ --static rtx --microblaze_emit_compare (enum machine_mode mode, rtx cmp, enum rtx_code *cmp_code) -+/* Generate conditional branch -- first, generate test condition, -+ second, generate correct branch instruction. */ -+ -+void -+microblaze_expand_conditional_branch (enum machine_mode mode, rtx operands[]) - { -- rtx cmp_op0 = XEXP (cmp, 0); -- rtx cmp_op1 = XEXP (cmp, 1); -+ enum rtx_code code = GET_CODE (operands[0]); -+ rtx cmp_op0 = operands[1]; -+ rtx cmp_op1 = operands[2]; -+ rtx label1 = operands[3]; - rtx comp_reg = gen_reg_rtx (SImode); -- enum rtx_code code = *cmp_code; -- -+ rtx condition; -+ - gcc_assert ((GET_CODE (cmp_op0) == REG) || (GET_CODE (cmp_op0) == SUBREG)); - - /* If comparing against zero, just test source reg. */ -- if (cmp_op1 == const0_rtx) -- return cmp_op0; -+ if (cmp_op1 == const0_rtx) -+ { -+ comp_reg = cmp_op0; -+ condition = gen_rtx_fmt_ee (signed_condition (code), SImode, comp_reg, const0_rtx); -+ emit_jump_insn (gen_condjump (condition, label1)); -+ } - -- if (code == EQ || code == NE) -+ else if (code == EQ || code == NE) - { - /* Use xor for equal/not-equal comparison. */ - emit_insn (gen_xorsi3 (comp_reg, cmp_op0, cmp_op1)); -+ condition = gen_rtx_fmt_ee (signed_condition (code), SImode, comp_reg, const0_rtx); -+ emit_jump_insn (gen_condjump (condition, label1)); - } -- else if (code == GT || code == GTU || code == LE || code == LEU) -- { -- /* MicroBlaze compare is not symmetrical. */ -- /* Swap argument order. */ -- cmp_op1 = force_reg (mode, cmp_op1); -- if (code == GT || code == LE) -- emit_insn (gen_signed_compare (comp_reg, cmp_op0, cmp_op1)); -- else -- emit_insn (gen_unsigned_compare (comp_reg, cmp_op0, cmp_op1)); -- /* Translate test condition. */ -- *cmp_code = swap_condition (code); -- } -- else /* if (code == GE || code == GEU || code == LT || code == LTU) */ -+ else - { -+ /* Generate compare and branch in single instruction. */ - cmp_op1 = force_reg (mode, cmp_op1); -- if (code == GE || code == LT) -- emit_insn (gen_signed_compare (comp_reg, cmp_op1, cmp_op0)); -- else -- emit_insn (gen_unsigned_compare (comp_reg, cmp_op1, cmp_op0)); -+ condition = gen_rtx_fmt_ee (code, mode, cmp_op0, cmp_op1); -+ emit_jump_insn (gen_branch_compare(condition, cmp_op0, cmp_op1, label1)); - } -- -- return comp_reg; - } - --/* Generate conditional branch -- first, generate test condition, -- second, generate correct branch instruction. */ -- --void --microblaze_expand_conditional_branch (enum machine_mode mode, rtx operands[]) --{ -- enum rtx_code code = GET_CODE (operands[0]); -- rtx comp; -- rtx condition; -- -- comp = microblaze_emit_compare (mode, operands[0], &code); -- condition = gen_rtx_fmt_ee (signed_condition (code), SImode, comp, const0_rtx); -- emit_jump_insn (gen_condjump (condition, operands[3])); --} - - void - microblaze_expand_conditional_branch_sf (rtx operands[]) -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 49d8f01..9c1e1a3 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -1624,28 +1624,6 @@ - (set_attr "length" "4")] - ) - --(define_insn "signed_compare" -- [(set (match_operand:SI 0 "register_operand" "=d") -- (unspec -- [(match_operand:SI 1 "register_operand" "d") -- (match_operand:SI 2 "register_operand" "d")] UNSPEC_CMP))] -- "" -- "cmp\t%0,%1,%2" -- [(set_attr "type" "arith") -- (set_attr "mode" "SI") -- (set_attr "length" "4")]) -- --(define_insn "unsigned_compare" -- [(set (match_operand:SI 0 "register_operand" "=d") -- (unspec -- [(match_operand:SI 1 "register_operand" "d") -- (match_operand:SI 2 "register_operand" "d")] UNSPEC_CMPU))] -- "" -- "cmpu\t%0,%1,%2" -- [(set_attr "type" "arith") -- (set_attr "mode" "SI") -- (set_attr "length" "4")]) -- - ;;---------------------------------------------------------------- - ;; Setting a register from an floating point comparison. - ;;---------------------------------------------------------------- -@@ -1719,6 +1697,47 @@ - (set_attr "length" "4")] - ) - -+(define_insn "branch_compare" -+ [(set (pc) -+ (if_then_else (match_operator:SI 0 "cmp_op" -+ [(match_operand:SI 1 "register_operand" "d") -+ (match_operand:SI 2 "register_operand" "d") -+ ]) -+ (label_ref (match_operand 3)) -+ (pc))) -+ (clobber(reg:SI R_TMP))] -+ "" -+ { -+ operands[4] = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM); -+ enum rtx_code code = GET_CODE (operands[0]); -+ -+ if (code == GT || code == LE) -+ { -+ output_asm_insn ("cmp\tr18,%z1,%z2", operands); -+ code = swap_condition (code); -+ } -+ else if (code == GTU || code == LEU) -+ { -+ output_asm_insn ("cmpu\tr18,%z1,%z2", operands); -+ code = swap_condition (code); -+ } -+ else if (code == GE || code == LT) -+ { -+ output_asm_insn ("cmp\tr18,%z2,%z1", operands); -+ } -+ else if (code == GEU || code == LTU) -+ { -+ output_asm_insn ("cmpu\tr18,%z2,%z1", operands); -+ } -+ -+ operands[0] = gen_rtx_fmt_ee (signed_condition (code), SImode, operands[4], const0_rtx); -+ return "b%C0i%?\tr18,%3"; -+ } -+ [(set_attr "type" "branch") -+ (set_attr "mode" "none") -+ (set_attr "length" "12")] -+) -+ - ;;---------------------------------------------------------------- - ;; Unconditional branches - ;;---------------------------------------------------------------- -diff --git a/gcc/config/microblaze/predicates.md b/gcc/config/microblaze/predicates.md -index 5fd1bd4..2c23291 100644 ---- a/gcc/config/microblaze/predicates.md -+++ b/gcc/config/microblaze/predicates.md -@@ -119,3 +119,7 @@ - ;; Test for valid PIC call operand - (define_predicate "call_insn_plt_operand" - (match_test "PLT_ADDR_P (op)")) -+ -+;; Return if the code of this rtx pattern is a comparison. -+(define_predicate "cmp_op" -+ (match_code "gt,ge,gtu,geu,lt,le,ltu,leu")) --- -1.7.5.4 - diff --git a/recipes-microblaze/gcc/files/0462b5f-2014-02-23-David-Holsgrove-david.holsgrove.patch b/recipes-microblaze/gcc/files/0462b5f-2014-02-23-David-Holsgrove-david.holsgrove.patch deleted file mode 100644 index efd127de..00000000 --- a/recipes-microblaze/gcc/files/0462b5f-2014-02-23-David-Holsgrove-david.holsgrove.patch +++ /dev/null @@ -1,108 +0,0 @@ -From 0462b5fb1e91183c16e204e1a6cf436ef0d8d0f8 Mon Sep 17 00:00:00 2001 -From: eager <eager@138bc75d-0d04-0410-961f-82ee72b054a4> -Date: Sun, 23 Feb 2014 18:44:27 +0000 -Subject: [PATCH] 2014-02-23 David Holsgrove <david.holsgrove@xilinx.com> - - * /config/microblaze/microblaze.c: Add microblaze_asm_output_mi_thunk - and define TARGET_ASM_OUTPUT_MI_THUNK and - TARGET_ASM_CAN_OUTPUT_MI_THUNK. - -Upstream-Status: Backport ---- - gcc/config/microblaze/microblaze.c | 73 ++++++++++++++++++++++++++++++++++++++ - 2 files changed, 79 insertions(+) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index 985d26a..ba8109b 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -3087,6 +3087,73 @@ expand_pic_symbol_ref (enum machine_mode mode ATTRIBUTE_UNUSED, rtx op) - return result; - } - -+static void -+microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, -+ HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset, -+ tree function) -+{ -+ rtx this_rtx, insn, funexp; -+ -+ reload_completed = 1; -+ epilogue_completed = 1; -+ -+ /* Mark the end of the (empty) prologue. */ -+ emit_note (NOTE_INSN_PROLOGUE_END); -+ -+ /* Find the "this" pointer. If the function returns a structure, -+ the structure return pointer is in MB_ABI_FIRST_ARG_REGNUM. */ -+ if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function)) -+ this_rtx = gen_rtx_REG (Pmode, (MB_ABI_FIRST_ARG_REGNUM + 1)); -+ else -+ this_rtx = gen_rtx_REG (Pmode, MB_ABI_FIRST_ARG_REGNUM); -+ -+ /* Apply the constant offset, if required. */ -+ if (delta) -+ emit_insn (gen_addsi3 (this_rtx, this_rtx, GEN_INT (delta))); -+ -+ /* Apply the offset from the vtable, if required. */ -+ if (vcall_offset) -+ { -+ rtx vcall_offset_rtx = GEN_INT (vcall_offset); -+ rtx temp1 = gen_rtx_REG (Pmode, MB_ABI_TEMP1_REGNUM); -+ -+ emit_move_insn (temp1, gen_rtx_MEM (Pmode, this_rtx)); -+ -+ rtx loc = gen_rtx_PLUS (Pmode, temp1, vcall_offset_rtx); -+ emit_move_insn (temp1, gen_rtx_MEM (Pmode, loc)); -+ -+ emit_insn (gen_addsi3 (this_rtx, this_rtx, temp1)); -+ } -+ -+ /* Generate a tail call to the target function. */ -+ if (!TREE_USED (function)) -+ { -+ assemble_external (function); -+ TREE_USED (function) = 1; -+ } -+ -+ funexp = XEXP (DECL_RTL (function), 0); -+ rtx temp2 = gen_rtx_REG (Pmode, MB_ABI_TEMP2_REGNUM); -+ -+ if (flag_pic) -+ emit_move_insn (temp2, expand_pic_symbol_ref (Pmode, funexp)); -+ else -+ emit_move_insn (temp2, funexp); -+ -+ emit_insn (gen_indirect_jump (temp2)); -+ -+ /* Run just enough of rest_of_compilation. This sequence was -+ "borrowed" from rs6000.c. */ -+ insn = get_insns (); -+ shorten_branches (insn); -+ final_start_function (insn, file, 1); -+ final (insn, file, 1); -+ final_end_function (); -+ -+ reload_completed = 0; -+ epilogue_completed = 0; -+} -+ - bool - microblaze_expand_move (enum machine_mode mode, rtx operands[]) - { -@@ -3504,6 +3571,12 @@ microblaze_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x - #undef TARGET_SECONDARY_RELOAD - #define TARGET_SECONDARY_RELOAD microblaze_secondary_reload - -+#undef TARGET_ASM_OUTPUT_MI_THUNK -+#define TARGET_ASM_OUTPUT_MI_THUNK microblaze_asm_output_mi_thunk -+ -+#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK -+#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_const_tree_hwi_hwi_const_tree_true -+ - #undef TARGET_SCHED_ADJUST_COST - #define TARGET_SCHED_ADJUST_COST microblaze_adjust_cost - --- -1.9.0 - diff --git a/recipes-microblaze/gcc/files/Patch-microblaze-Fix-bswaphi2-implementation.patch b/recipes-microblaze/gcc/files/Patch-microblaze-Fix-bswaphi2-implementation.patch deleted file mode 100644 index b39dc4db..00000000 --- a/recipes-microblaze/gcc/files/Patch-microblaze-Fix-bswaphi2-implementation.patch +++ /dev/null @@ -1,44 +0,0 @@ -From: David Holsgrove <david.holsgrove@xilinx.com> -Subject: [PATCH] [Patch, microblaze]: Fix bswaphi2 implementation - -MicroBlaze insn swaph swaps the contents of register rA -as two halfwords placing result in rD; - -(rD)[0:15] <- (rA)[16:31] -(rD)[16:31] <- (rA)[0:15] - -gcc bswaphi2 is intended to reverse the order of the bytes -in the half integer in rA - -(rD)[8:15] <- (rA)[0:7] -(rD)[7:0] <- (rA)[8:15] -(rD)[24:31] <- (rA)[16:23] -(rD)[16:23] <- (rA)[24:31] - -Correct microblaze bswaphi2 insn pattern to be a -swapb followed by swaph - -Reported-by: Nathan Rossi <nathan.rossi@xilinx.com> -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.md | 3 ++- - 1 files changed, 2 insertions(+), 1 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index ae4ade7..c7485fc 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -367,7 +367,8 @@ - [(set (match_operand:HI 0 "register_operand" "=r") - (bswap:HI (match_operand:HI 1 "register_operand" "r")))] - "TARGET_REORDER" -- "swaph %0, %1" -+ "swapb %0, %1 -+ swaph %0, %0" - ) - - ;;---------------------------------------------------------------- --- -1.7.1 - diff --git a/recipes-microblaze/gcc/files/Patch-microblaze-cstoresf4-add-mode-and-ordered_comp.patch b/recipes-microblaze/gcc/files/Patch-microblaze-cstoresf4-add-mode-and-ordered_comp.patch deleted file mode 100644 index 934e7fa9..00000000 --- a/recipes-microblaze/gcc/files/Patch-microblaze-cstoresf4-add-mode-and-ordered_comp.patch +++ /dev/null @@ -1,44 +0,0 @@ -From: David Holsgrove <david.holsgrove@xilinx.com> -Subject: [PATCH] [Patch, microblaze]: cstoresf4, add mode and - ordered_comparison_operator - -Add SImode to comparison operator, prevents ICE during combine -rtl pass with error message; - -internal compiler error: in simplify_subreg, at simplify-rtx.c:5725 - -Use ordered_comparison_operator predicate to limit operators to -those fcmp can handle, and letting compiler reorder insns to -accomodate unordered as necessary - -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.md | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 786dabb..e9b032b 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -1650,7 +1650,7 @@ - ;;---------------------------------------------------------------- - (define_insn "cstoresf4" - [(set (match_operand:SI 0 "register_operand" "=r") -- (match_operator 1 "comparison_operator" -+ (match_operator:SI 1 "ordered_comparison_operator" - [(match_operand:SF 2 "register_operand" "r") - (match_operand:SF 3 "register_operand" "r")]))] - "TARGET_HARD_FLOAT" -@@ -1679,7 +1679,7 @@ - - (define_expand "cbranchsf4" - [(set (pc) -- (if_then_else (match_operator 0 "comparison_operator" -+ (if_then_else (match_operator 0 "ordered_comparison_operator" - [(match_operand:SF 1 "register_operand") - (match_operand:SF 2 "register_operand")]) - (label_ref (match_operand 3 "")) --- -1.7.9.5 - diff --git a/recipes-microblaze/gcc/gcc-microblaze-4.8.inc b/recipes-microblaze/gcc/gcc-microblaze-4.8.inc index f0578dbd..87f01816 100644 --- a/recipes-microblaze/gcc/gcc-microblaze-4.8.inc +++ b/recipes-microblaze/gcc/gcc-microblaze-4.8.inc @@ -5,12 +5,6 @@ SRC_URI_append += " \ file://0001-Patch-microblaze-Enable-DWARF-exception-handling-sup.patch \ file://0002-Patch-microblaze-Add-4-byte-implementation-for-atomi.patch \ file://0003-Patch-microblaze-Extend-jump-insn-to-accept-bri-to-S.patch \ - file://0462b5f-2014-02-23-David-Holsgrove-david.holsgrove.patch \ file://0005-Patch-microblaze-Add-fstack-usage-support.patch \ - file://0006-Patch-microblaze-Remove-SECONDARY_MEMORY_NEEDED.patch \ - file://0007-Patch-microblaze-Add-SIZE_TYPE-and-PTRDIFF_TYPE-to-m.patch \ - file://0008-Patch-microblaze-Add-branch_compare-instruction.patch \ - file://Patch-microblaze-Fix-bswaphi2-implementation.patch \ - file://Patch-microblaze-cstoresf4-add-mode-and-ordered_comp.patch \ file://gcc-Cherry-pick-mainline-patch-to-resolve-MB-k.patch \ " |