diff options
Diffstat (limited to 'recipes-microblaze/gcc')
| -rw-r--r-- | recipes-microblaze/gcc/files/microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch | 66 | ||||
| -rw-r--r-- | recipes-microblaze/gcc/gcc-source_5.2.bbappend | 7 |
2 files changed, 73 insertions, 0 deletions
diff --git a/recipes-microblaze/gcc/files/microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch b/recipes-microblaze/gcc/files/microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch new file mode 100644 index 00000000..446ff47d --- /dev/null +++ b/recipes-microblaze/gcc/files/microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch @@ -0,0 +1,66 @@ +From ba9d2df1fa18243bd9fd77e499caa0224a1a13bc Mon Sep 17 00:00:00 2001 +From: Nathan Rossi <nathan@nathanrossi.com> +Date: Thu, 12 Nov 2015 16:09:31 +1000 +Subject: [PATCH] microblaze.md: Improve 'adddi3' and 'subdi3' insn definitions + +Change adddi3 to handle DI immediates as the second operand, this +requires modification to the output template however reduces the need to +specify seperate templates for 16-bit positive/negative immediate +operands. The use of 32-bit immediates for the addi and addic +instructions is handled by the assembler, which will emit the imm +instructions when required. This conveniently handles the optimizable +cases where the immediate constant value does not need the higher half +words of the operands upper/lower words. + +Change the constraints of the subdi3 instruction definition such that it +does not match the second operand as an immediate value. This is because +there is no definition to handle this case nor is it possible to +implement purely with instructions as microblaze does not provide an +instruction to perform a forward arithmetic subtraction (it only +provides reverse 'rD = IMM - rA'). + +Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> +Upstream-Status: Unsubmitted +--- + gcc/config/microblaze/microblaze.md | 13 ++++++------- + 1 file changed, 6 insertions(+), 7 deletions(-) + +diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md +index 67e509c..1ab10b7 100644 +--- a/gcc/config/microblaze/microblaze.md ++++ b/gcc/config/microblaze/microblaze.md +@@ -480,17 +480,16 @@ + ;; Adding 2 DI operands in register or reg/imm + + (define_insn "adddi3" +- [(set (match_operand:DI 0 "register_operand" "=d,d,d") +- (plus:DI (match_operand:DI 1 "register_operand" "%d,d,d") +- (match_operand:DI 2 "arith_operand32" "d,P,N")))] ++ [(set (match_operand:DI 0 "register_operand" "=d,d") ++ (plus:DI (match_operand:DI 1 "register_operand" "%d,d") ++ (match_operand:DI 2 "arith_operand" "d,i")))] + "" + "@ + add\t%L0,%L1,%L2\;addc\t%M0,%M1,%M2 +- addi\t%L0,%L1,%2\;addc\t%M0,%M1,r0 +- addi\t%L0,%L1,%2\;addc\t%M0,%M1,r0\;addi\t%M0,%M0,-1" ++ addi\t%L0,%L1,%j2\;addic\t%M0,%M1,%h2" + [(set_attr "type" "darith") + (set_attr "mode" "DI") +- (set_attr "length" "8,8,12")]) ++ (set_attr "length" "8,8")]) + + ;;---------------------------------------------------------------- + ;; Subtraction +@@ -516,7 +515,7 @@ + (define_insn "subdi3" + [(set (match_operand:DI 0 "register_operand" "=&d") + (minus:DI (match_operand:DI 1 "register_operand" "d") +- (match_operand:DI 2 "arith_operand32" "d")))] ++ (match_operand:DI 2 "register_operand" "d")))] + "" + "rsub\t%L0,%L2,%L1\;rsubc\t%M0,%M2,%M1" + [(set_attr "type" "darith") +-- +2.6.2 + diff --git a/recipes-microblaze/gcc/gcc-source_5.2.bbappend b/recipes-microblaze/gcc/gcc-source_5.2.bbappend new file mode 100644 index 00000000..ce84c6b1 --- /dev/null +++ b/recipes-microblaze/gcc/gcc-source_5.2.bbappend @@ -0,0 +1,7 @@ + +# Add MicroBlaze Patches +FILESEXTRAPATHS_append := "${THISDIR}/files:" +SRC_URI_append += " \ + file://microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch \ + " + |