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-rw-r--r--recipes-microblaze/gcc/files/Patch-microblaze-Fix-bswaphi2-implementation.patch44
1 files changed, 44 insertions, 0 deletions
diff --git a/recipes-microblaze/gcc/files/Patch-microblaze-Fix-bswaphi2-implementation.patch b/recipes-microblaze/gcc/files/Patch-microblaze-Fix-bswaphi2-implementation.patch
new file mode 100644
index 00000000..b39dc4db
--- /dev/null
+++ b/recipes-microblaze/gcc/files/Patch-microblaze-Fix-bswaphi2-implementation.patch
@@ -0,0 +1,44 @@
+From: David Holsgrove <david.holsgrove@xilinx.com>
+Subject: [PATCH] [Patch, microblaze]: Fix bswaphi2 implementation
+
+MicroBlaze insn swaph swaps the contents of register rA
+as two halfwords placing result in rD;
+
+(rD)[0:15] <- (rA)[16:31]
+(rD)[16:31] <- (rA)[0:15]
+
+gcc bswaphi2 is intended to reverse the order of the bytes
+in the half integer in rA
+
+(rD)[8:15] <- (rA)[0:7]
+(rD)[7:0] <- (rA)[8:15]
+(rD)[24:31] <- (rA)[16:23]
+(rD)[16:23] <- (rA)[24:31]
+
+Correct microblaze bswaphi2 insn pattern to be a
+swapb followed by swaph
+
+Reported-by: Nathan Rossi <nathan.rossi@xilinx.com>
+Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
+Upstream-Status: Pending
+---
+ gcc/config/microblaze/microblaze.md | 3 ++-
+ 1 files changed, 2 insertions(+), 1 deletions(-)
+
+diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
+index ae4ade7..c7485fc 100644
+--- a/gcc/config/microblaze/microblaze.md
++++ b/gcc/config/microblaze/microblaze.md
+@@ -367,7 +367,8 @@
+ [(set (match_operand:HI 0 "register_operand" "=r")
+ (bswap:HI (match_operand:HI 1 "register_operand" "r")))]
+ "TARGET_REORDER"
+- "swaph %0, %1"
++ "swapb %0, %1
++ swaph %0, %0"
+ )
+
+ ;;----------------------------------------------------------------
+--
+1.7.1
+