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authorJaewon Lee <jaewon.lee@xilinx.com>2019-01-14 11:52:19 -0800
committerManjukumar Matha <manjukumar.harthikote-matha@xilinx.com>2019-08-15 16:59:12 -0700
commit5d7c5d2cc40c26ec6ddf1ec916ac326b7fb4021a (patch)
treebae93af28bef11f8e89f86f276294631f33f9435 /meta-xilinx-bsp
parentf3c8b1c9a8ae6a1690f7f5d907b65c588f65446a (diff)
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microblaze-kc705-Convert-microblaze-generic-to-k.patch:update patch
Update microblaze patch to convert microblaze generic to kc705 for 2019.1 release. Signed-off-by: Jaewon Lee <jaewon.lee@xilinx.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
Diffstat (limited to 'meta-xilinx-bsp')
-rw-r--r--meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-xlnx/v2018.3/microblaze-kc705-Convert-microblaze-generic-to-k.patch449
1 files changed, 207 insertions, 242 deletions
diff --git a/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-xlnx/v2018.3/microblaze-kc705-Convert-microblaze-generic-to-k.patch b/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-xlnx/v2018.3/microblaze-kc705-Convert-microblaze-generic-to-k.patch
index ce8771f..7550b68 100644
--- a/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-xlnx/v2018.3/microblaze-kc705-Convert-microblaze-generic-to-k.patch
+++ b/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-xlnx/v2018.3/microblaze-kc705-Convert-microblaze-generic-to-k.patch
@@ -1,26 +1,25 @@
-From 539838b4fe4afecd9b6874c5ac397ab7f5b343d4 Mon Sep 17 00:00:00 2001
-From: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
-Date: Tue, 10 Apr 2018 18:34:45 -0700
+From afe880f500cff7a9486379c5ad7a4f3379015a62 Mon Sep 17 00:00:00 2001
+From: Jaewon Lee <jaewon.lee@xilinx.com>
+Date: Mon, 14 Jan 2019 11:30:56 -0800
Subject: [PATCH] kc705-microblazeel: Convert microblaze-generic to
kc705-microblazeel
This is an update to earlier kc705-trd patch done by Nathan Rossi.
-Starting from v2016.1, KC705 will no longer refer to deprecated KC705
-TRD application.
Change the microblaze-generic board to match the kc705-microblazeel.
This patch is not intended for upstream and serves as an intermediate
solution until OF support in upstream u-boot allows for easy support for
custom microblaze boards.
+Signed-off-by: Jaewon Lee <jaewon.lee@xilinx.com>
Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
Upstream-Status: Not-Upstreamable [meta-xilinx/kc705 specific]
---
arch/microblaze/dts/microblaze-generic.dts | 590 ++++++++++++++++++++++++++++-
- board/xilinx/microblaze-generic/config.mk | 30 +-
- configs/microblaze-generic_defconfig | 57 ++-
- include/configs/microblaze-generic.h | 396 ++++++++-----------
- 4 files changed, 782 insertions(+), 291 deletions(-)
+ board/xilinx/microblaze-generic/config.mk | 28 +-
+ configs/microblaze-generic_defconfig | 75 ++--
+ include/configs/microblaze-generic.h | 348 ++++++++---------
+ 4 files changed, 782 insertions(+), 259 deletions(-)
diff --git a/arch/microblaze/dts/microblaze-generic.dts b/arch/microblaze/dts/microblaze-generic.dts
index 08a1396..f8e616b 100644
@@ -621,17 +620,15 @@ index 08a1396..f8e616b 100644
+};
+
diff --git a/board/xilinx/microblaze-generic/config.mk b/board/xilinx/microblaze-generic/config.mk
-index 1dee2d6..cb75fde 100644
+index a953977..cb75fde 100644
--- a/board/xilinx/microblaze-generic/config.mk
+++ b/board/xilinx/microblaze-generic/config.mk
-@@ -1,20 +1,10 @@
+@@ -1,18 +1,10 @@
+-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2007 - 2016 Michal Simek
-#
-# Michal SIMEK <monstr@monstr.eu>
--#
--# SPDX-License-Identifier: GPL-2.0+
--#
-
-CPU_VER := $(shell echo $(CONFIG_XILINX_MICROBLAZE0_HW_VER))
-
@@ -656,21 +653,24 @@ index 1dee2d6..cb75fde 100644
+PLATFORM_CPPFLAGS += -mcpu=v10.0
+PLATFORM_CPPFLAGS += -fgnu89-inline
diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig
-index 08d99f2..bac6939 100644
+index 02e62e2..8d64be4 100644
--- a/configs/microblaze-generic_defconfig
+++ b/configs/microblaze-generic_defconfig
-@@ -1,5 +1,4 @@
+@@ -1,73 +1,58 @@
CONFIG_MICROBLAZE=y
-CONFIG_SYS_TEXT_BASE=0x29000000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
-@@ -8,50 +7,50 @@ CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
+-CONFIG_SPL=y
+ CONFIG_TARGET_MICROBLAZE_GENERIC=y
+ CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
CONFIG_XILINX_MICROBLAZE0_USE_DIV=1
CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1
+-CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_TEXT_BASE=0x80400000
- CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
++CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
-CONFIG_BOOTDELAY=-1
@@ -678,13 +678,14 @@ index 08d99f2..bac6939 100644
-CONFIG_BOOTARGS="root=romfs"
+CONFIG_BOOTDELAY=4
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
--CONFIG_SPL=y
+-CONFIG_DISPLAY_BOARDINFO=y
-CONFIG_SPL_BOARD_INIT=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_OS_BASE=0x2c060000
CONFIG_HUSH_PARSER=y
+-# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PROMPT="U-Boot-mONStR> "
-CONFIG_CMD_IMLS=y
-CONFIG_CMD_SPL=y
@@ -693,50 +694,65 @@ index 08d99f2..bac6939 100644
-CONFIG_CMD_GPIO=y
CONFIG_CMD_SAVES=y
# CONFIG_CMD_SETEXPR is not set
--CONFIG_CMD_TFTPPUT=y
+CONFIG_SYS_ENET=y
+CONFIG_NET=y
+CONFIG_NETDEVICES=y
+CONFIG_CMD_NET=y
CONFIG_CMD_DHCP=y
+-CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_NFS=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_JFFS2=y
-CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
--CONFIG_ENV_IS_IN_FLASH=y
+-CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
-CONFIG_NETCONSOLE=y
-CONFIG_SPL_DM=y
--CONFIG_MTD_NOR_FLASH=y
--CONFIG_PHY_ATHEROS=y
--CONFIG_PHY_BROADCOM=y
--CONFIG_PHY_DAVICOM=y
--CONFIG_PHY_LXT=y
--CONFIG_PHY_MARVELL=y
--CONFIG_PHY_MICREL=y
--CONFIG_PHY_MICREL_KSZ90X1=y
--CONFIG_PHY_NATSEMI=y
--CONFIG_PHY_REALTEK=y
--CONFIG_PHY_VITESSE=y
- CONFIG_DM_ETH=y
++CONFIG_DM_ETH=y
+CONFIG_SYS_MALLOC_F=y
+CONFIG_SYS_GENERIC_BOARD=y
- CONFIG_XILINX_AXIEMAC=y
--CONFIG_XILINX_EMACLITE=y
- CONFIG_SYS_NS16550=y
--CONFIG_XILINX_UARTLITE=y
++CONFIG_XILINX_AXIEMAC=y
++CONFIG_SYS_NS16550=y
+CONFIG_CMD_FLASH=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_CMD_IMLS=y
+CONFIG_CMD_GPIO=y
+ CONFIG_DM_GPIO=y
+ CONFIG_XILINX_GPIO=y
+-CONFIG_LED=y
+-CONFIG_LED_GPIO=y
+-CONFIG_MTD_NOR_FLASH=y
+-CONFIG_MTD_DEVICE=y
+-CONFIG_FLASH_CFI_DRIVER=y
+-CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+-CONFIG_FLASH_CFI_MTD=y
+-CONFIG_SYS_FLASH_PROTECTION=y
+-CONFIG_SYS_FLASH_CFI=y
+-CONFIG_PHY_ATHEROS=y
+-CONFIG_PHY_BROADCOM=y
+-CONFIG_PHY_DAVICOM=y
+-CONFIG_PHY_LXT=y
+-CONFIG_PHY_MARVELL=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_NETCONSOLE=y
+CONFIG_XILINX_FSL_LINKS=0
+CONFIG_PHY_GIGE=y
+CONFIG_ENV_IS_IN_FLASH=y
-+CONFIG_PHY_MICREL=y
-+CONFIG_PHY_MICREL_KSZ90X1=y
+ CONFIG_PHY_MICREL=y
+ CONFIG_PHY_MICREL_KSZ90X1=y
+-CONFIG_PHY_NATSEMI=y
+-CONFIG_PHY_REALTEK=y
+-CONFIG_PHY_VITESSE=y
+-CONFIG_DM_ETH=y
+-CONFIG_XILINX_AXIEMAC=y
+-CONFIG_XILINX_EMACLITE=y
+-CONFIG_SYS_NS16550=y
+-CONFIG_XILINX_UARTLITE=y
+-CONFIG_SYSRESET_GPIO=y
+-CONFIG_SYSRESET_MICROBLAZE=y
+-CONFIG_WDT=y
+-CONFIG_XILINX_TB_WATCHDOG=y
+CONFIG_SPL_DM_SERIAL=y
+CONFIG_SPL_OF_LIBFDT=y
+CONFIG_PHY_XILINX=y
@@ -745,16 +761,15 @@ index 08d99f2..bac6939 100644
+# CONFIG_BOOTARGS is not set
+# CONFIG_USE_BOOTARGS is not set
diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
-index 16481cb..1377c5e 100644
+index ba0952c..fd1da2b 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
-@@ -1,254 +1,178 @@
+@@ -1,205 +1,173 @@
+-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2007-2010 Michal Simek
- *
- * Michal SIMEK <monstr@monstr.eu>
-- *
-- * SPDX-License-Identifier: GPL-2.0+
- */
-
#ifndef __CONFIG_H
@@ -771,17 +786,96 @@ index 16481cb..1377c5e 100644
-#undef SPIFLASH
-#undef RAMENV /* hold environment in flash */
-#else
--#ifdef XILINX_SPI_FLASH_BASEADDR
--#undef FLASH
--#define SPIFLASH
--#undef RAMENV /* hold environment in flash */
--#else
-#undef FLASH
-#undef SPIFLASH
-#define RAMENV /* hold environment in RAM */
-#endif
--#endif
--
++#define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400 }
++
++/* processor - microblaze_0 */
++#define XILINX_USE_MSR_INSTR 1
++#define XILINX_USE_ICACHE 1
++#define XILINX_USE_DCACHE 1
++#define XILINX_DCACHE_BYTE_SIZE 16384
++#define XILINX_PVR 2
++#define MICROBLAZE_V5
++#define CONFIG_CMD_IRQ
++#define CONFIG_DCACHE
++#define CONFIG_ICACHE
++
++/* main_memory - ddr3_sdram */
++
++
++/* uart - rs232_uart */
++#define CONFIG_SYS_NS16550_COM1 ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000)
++#define CONFIG_SYS_NS16550_REG_SIZE -4
++#define CONSOLE_ARG "console=console=ttyS0,115200\0"
++#define CONFIG_SYS_NS16550_SERIAL
++#define CONFIG_CONS_INDEX 1
++#define ESERIAL0 "eserial0=setenv stdout eserial0;setenv stdin eserial0\0"
++#define SERIAL_MULTI "serial=setenv stdout serial;setenv stdin serial\0"
++#define CONFIG_SYS_NS16550_CLK 200000000
++#define CONFIG_BAUDRATE 115200
++
++/* ethernet - axi_ethernet */
++#define CONFIG_PHY_XILINX
++#define CONFIG_MII
++#define CONFIG_PHY_MARVELL
++#define CONFIG_PHY_NATSEMI
++#define CONFIG_NET_MULTI
++#define CONFIG_PHY_REALTEK
++#define CONFIG_NETCONSOLE 1
++#define CONFIG_SERVERIP 172.25.229.115
++#define CONFIG_IPADDR
++
++/* nor_flash - linear_flash */
++#define CONFIG_SYS_FLASH_BASE 0x60000000
++#define CONFIG_FLASH_END 0x68000000
++#define CONFIG_SYS_MAX_FLASH_SECT 2048
++#define CONFIG_SYS_FLASH_PROTECTION
++#define CONFIG_SYS_FLASH_EMPTY_INFO
++#define CONFIG_SYS_FLASH_CFI
++#define CONFIG_FLASH_CFI_DRIVER
++#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
++#define CONFIG_SYS_MAX_FLASH_BANKS 1
++
++/* timer - axi_timer_0 */
++
++/* intc - microblaze_0_axi_intc */
++
++/* FPGA */
++
++/* Memory testing handling */
++#define CONFIG_SYS_MEMTEST_START 0x80000000
++#define CONFIG_SYS_MEMTEST_END (0x80000000 + 0x1000)
++#define CONFIG_SYS_LOAD_ADDR 0x80000000 /* default load address */
++
++/* global pointer options */
++#define CONFIG_SYS_GBL_DATA_OFFSET (0x40000000 - GENERATED_GBL_DATA_SIZE)
++
++/* Size of malloc() pool */
++#define SIZE 0x100000
++#define CONFIG_SYS_MALLOC_LEN SIZE
++#define CONFIG_SYS_MONITOR_LEN SIZE
++#define CONFIG_SYS_MONITOR_BASE (0x80000000 + CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN - GENERATED_BD_INFO_SIZE)
++#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
++
++/* stack */
++#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_F_LEN)
++
++/* No of_control support yet*/
++
++/* BOOTP options */
++#define CONFIG_BOOTP_SERVERIP
++#define CONFIG_BOOTP_BOOTFILESIZE
++#define CONFIG_BOOTP_BOOTPATH
++#define CONFIG_BOOTP_GATEWAY
++#define CONFIG_BOOTP_HOSTNAME
++#define CONFIG_BOOTP_MAY_FAIL
++#define CONFIG_BOOTP_DNS
++#define CONFIG_BOOTP_SUBNETMASK
++#define CONFIG_BOOTP_PXE
+
-/* uart */
-/* The following table includes the supported baudrates */
-# define CONFIG_SYS_BAUDRATE_TABLE \
@@ -790,22 +884,6 @@ index 16481cb..1377c5e 100644
-/* setting reset address */
-/*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/
-
--/* gpio */
--#ifdef XILINX_GPIO_BASEADDR
--# define CONFIG_XILINX_GPIO
--# define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
--#endif
--
--/* watchdog */
--#if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
--# define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR
--# define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ
--# ifndef CONFIG_SPL_BUILD
--# define CONFIG_HW_WATCHDOG
--# define CONFIG_XILINX_TB_WATCHDOG
--# endif
--#endif
--
-#define CONFIG_SYS_MALLOC_LEN 0xC0000
-
-/* Stack location before relocation */
@@ -833,8 +911,6 @@ index 16481cb..1377c5e 100644
-#ifdef FLASH
-# define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START
-# define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE
--# define CONFIG_SYS_FLASH_CFI 1
--# define CONFIG_FLASH_CFI_DRIVER 1
-/* ?empty sector */
-# define CONFIG_SYS_FLASH_EMPTY_INFO 1
-/* max number of memory banks */
@@ -842,9 +918,7 @@ index 16481cb..1377c5e 100644
-/* max number of sectors on one chip */
-# define CONFIG_SYS_MAX_FLASH_SECT 512
-/* hardware flash protection */
--# define CONFIG_SYS_FLASH_PROTECTION
-/* use buffered writes (20x faster) */
--# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
-# ifdef RAMENV
-# define CONFIG_ENV_SIZE 0x1000
-# define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
@@ -859,8 +933,6 @@ index 16481cb..1377c5e 100644
-#else /* !FLASH */
-
-#ifdef SPIFLASH
--# define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR
--# define CONFIG_SPI 1
-# define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
-# define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ
-# define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS
@@ -892,139 +964,53 @@ index 16481cb..1377c5e 100644
-#else
-# undef CONFIG_ICACHE
-#endif
--
++/*Command line configuration.*/
++#define CONFIG_CMDLINE_EDITING
++#define CONFIG_AUTO_COMPLETE
+
-#if defined(XILINX_USE_DCACHE)
-# define CONFIG_DCACHE
-#else
-# undef CONFIG_DCACHE
-#endif
--
++/* Miscellaneous configurable options */
++#define CONFIG_SYS_CBSIZE 2048/* Console I/O Buffer Size */
++#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
++#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
-#ifndef XILINX_DCACHE_BYTE_SIZE
-#define XILINX_DCACHE_BYTE_SIZE 32768
-#endif
--
+
-/*
- * BOOTP options
- */
-+#define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400 }
-+
-+/* processor - microblaze_0 */
-+#define XILINX_USE_MSR_INSTR 1
-+#define XILINX_USE_ICACHE 1
-+#define XILINX_USE_DCACHE 1
-+#define XILINX_DCACHE_BYTE_SIZE 16384
-+#define XILINX_PVR 2
-+#define MICROBLAZE_V5
-+#define CONFIG_CMD_IRQ
-+#define CONFIG_DCACHE
-+#define CONFIG_ICACHE
-+
-+/* main_memory - ddr3_sdram */
-+
-+
-+/* uart - rs232_uart */
-+#define CONFIG_SYS_NS16550_COM1 ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000)
-+#define CONFIG_SYS_NS16550_REG_SIZE -4
-+#define CONSOLE_ARG "console=console=ttyS0,115200\0"
-+#define CONFIG_SYS_NS16550_SERIAL
-+#define CONFIG_CONS_INDEX 1
-+#define ESERIAL0 "eserial0=setenv stdout eserial0;setenv stdin eserial0\0"
-+#define SERIAL_MULTI "serial=setenv stdout serial;setenv stdin serial\0"
-+#define CONFIG_SYS_NS16550_CLK 200000000
-+#define CONFIG_BAUDRATE 115200
-+
-+/* ethernet - axi_ethernet */
-+#define CONFIG_PHY_XILINX
-+#define CONFIG_MII
-+#define CONFIG_PHY_MARVELL
-+#define CONFIG_PHY_NATSEMI
-+#define CONFIG_NET_MULTI
-+#define CONFIG_PHY_REALTEK
-+#define CONFIG_NETCONSOLE 1
-+#define CONFIG_SERVERIP 172.25.229.115
-+#define CONFIG_IPADDR
-+
-+/* nor_flash - linear_flash */
-+#define CONFIG_SYS_FLASH_BASE 0x60000000
-+#define CONFIG_FLASH_END 0x68000000
-+#define CONFIG_SYS_MAX_FLASH_SECT 2048
-+#define CONFIG_SYS_FLASH_PROTECTION
-+#define CONFIG_SYS_FLASH_EMPTY_INFO
-+#define CONFIG_SYS_FLASH_CFI
-+#define CONFIG_FLASH_CFI_DRIVER
-+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
-+#define CONFIG_SYS_MAX_FLASH_BANKS 1
-+
-+/* timer - axi_timer_0 */
-+
-+/* gpio - reset_gpio */
-+#define XILINX_GPIO_BASEADDR 0x40000000
-+#define CONFIG_SYS_GPIO_0_ADDR 0x40000000
-+#define CONFIG_XILINX_GPIO
-+
-+/* intc - microblaze_0_axi_intc */
-+
-+/* FPGA */
-+
-+/* Memory testing handling */
-+#define CONFIG_SYS_MEMTEST_START 0x80000000
-+#define CONFIG_SYS_MEMTEST_END (0x80000000 + 0x1000)
-+#define CONFIG_SYS_LOAD_ADDR 0x80000000 /* default load address */
-+
-+/* global pointer options */
-+#define CONFIG_SYS_GBL_DATA_OFFSET (0x40000000 - GENERATED_GBL_DATA_SIZE)
-+
-+/* Size of malloc() pool */
-+#define SIZE 0x100000
-+#define CONFIG_SYS_MALLOC_LEN SIZE
-+#define CONFIG_SYS_MONITOR_LEN SIZE
-+#define CONFIG_SYS_MONITOR_BASE (0x80000000 + CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN - GENERATED_BD_INFO_SIZE)
-+#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
-+
-+/* stack */
-+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_F_LEN)
-+
-+/* No of_control support yet*/
-+
-+/* BOOTP options */
-+#define CONFIG_BOOTP_SERVERIP
- #define CONFIG_BOOTP_BOOTFILESIZE
- #define CONFIG_BOOTP_BOOTPATH
- #define CONFIG_BOOTP_GATEWAY
- #define CONFIG_BOOTP_HOSTNAME
-+#define CONFIG_BOOTP_MAY_FAIL
-+#define CONFIG_BOOTP_DNS
-+#define CONFIG_BOOTP_SUBNETMASK
-+#define CONFIG_BOOTP_PXE
+-#define CONFIG_BOOTP_BOOTFILESIZE
++/* Use the HUSH parser */
++#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
--#if defined(CONFIG_CMD_JFFS2)
--# define CONFIG_MTD_PARTITIONS
--#endif
--
--#if defined(CONFIG_CMD_UBI)
--# define CONFIG_MTD_PARTITIONS
--#endif
--
-#if defined(CONFIG_MTD_PARTITIONS)
-/* MTD partitions */
--#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
--#define CONFIG_FLASH_CFI_MTD
--
++#define CONFIG_ENV_VARS_UBOOT_CONFIG
++#define CONFIG_ENV_OVERWRITE /* Allow to overwrite the u-boot environment variables */
+
-/* default mtd partition table */
-#endif
--
++#define CONFIG_LMB
+
-/* size of console buffer */
-#define CONFIG_SYS_CBSIZE 512
-/* max number of command args */
-#define CONFIG_SYS_MAXARGS 15
--#define CONFIG_SYS_LONGHELP
-/* default load address */
-#define CONFIG_SYS_LOAD_ADDR 0
--
--#define CONFIG_HOSTNAME XILINX_BOARD_NAME
++/* FDT support */
++#define CONFIG_DISPLAY_BOARDINFO_LATE
+
+-#define CONFIG_HOSTNAME "microblaze-generic"
-#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
--
--/* architecture dependent code */
+
+ /* architecture dependent code */
-#define CONFIG_SYS_USR_EXCEP /* user exception */
-
-#define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo"
@@ -1041,66 +1027,8 @@ index 16481cb..1377c5e 100644
- "setenv stdin serial\0"
-#endif
-
-+/*Command line configuration.*/
- #define CONFIG_CMDLINE_EDITING
-+#define CONFIG_AUTO_COMPLETE
-
-/* Enable flat device tree support */
-#define CONFIG_LMB 1
--
--#if defined(CONFIG_XILINX_AXIEMAC)
--# define CONFIG_MII 1
--# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1
--#else
--# undef CONFIG_MII
--#endif
--
--/* SPL part */
--#define CONFIG_SPL_FRAMEWORK
-+/* Miscellaneous configurable options */
-+#define CONFIG_SYS_CBSIZE 2048/* Console I/O Buffer Size */
-+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-
--#ifdef CONFIG_SYS_FLASH_BASE
--# define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE
--#endif
--
--/* for booting directly linux */
-
--#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
-- 0x40000)
--#define CONFIG_SYS_FDT_SIZE (16<<10)
--#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \
-- 0x1000000)
-+/* Use the HUSH parser */
-+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-
--/* SP location before relocation, must use scratch RAM */
--/* BRAM start */
--#define CONFIG_SYS_INIT_RAM_ADDR 0x0
--/* BRAM size - will be generated */
--#define CONFIG_SYS_INIT_RAM_SIZE 0x100000
-+#define CONFIG_ENV_VARS_UBOOT_CONFIG
-+#define CONFIG_ENV_OVERWRITE /* Allow to overwrite the u-boot environment variables */
-
--# define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
-- CONFIG_SYS_INIT_RAM_SIZE - \
-- CONFIG_SYS_MALLOC_F_LEN)
-+#define CONFIG_LMB
-
--/* Just for sure that there is a space for stack */
--#define CONFIG_SPL_STACK_SIZE 0x100
-+/* FDT support */
-+#define CONFIG_DISPLAY_BOARDINFO_LATE
-
--#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
-
--#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \
-- CONFIG_SYS_INIT_RAM_ADDR - \
-- CONFIG_SYS_MALLOC_F_LEN - \
-- CONFIG_SPL_STACK_SIZE)
-+/* architecture dependent code */
+#define CONFIG_SYS_USR_EXCEP /* user exception */
+#define CONFIG_SYS_HZ 1000
+
@@ -1161,8 +1089,45 @@ index 16481cb..1377c5e 100644
+/* BOOTCOMMAND */
+#define CONFIG_BOOTCOMMAND "run default_bootcmd"
+-#if defined(CONFIG_XILINX_AXIEMAC)
+-# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1
+ #endif
+-
+-/* SPL part */
+-
+-#ifdef CONFIG_SYS_FLASH_BASE
+-# define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE
+-#endif
+-
+-/* for booting directly linux */
+-
+-#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
+- 0x40000)
+-#define CONFIG_SYS_FDT_SIZE (16 << 10)
+-#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \
+- 0x1000000)
+-
+-/* SP location before relocation, must use scratch RAM */
+-/* BRAM start */
+-#define CONFIG_SYS_INIT_RAM_ADDR 0x0
+-/* BRAM size - will be generated */
+-#define CONFIG_SYS_INIT_RAM_SIZE 0x100000
+-
+-# define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
+- CONFIG_SYS_INIT_RAM_SIZE - \
+- CONFIG_SYS_MALLOC_F_LEN)
+-
+-/* Just for sure that there is a space for stack */
+-#define CONFIG_SPL_STACK_SIZE 0x100
+-
+-#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
+-
+-#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \
+- CONFIG_SYS_INIT_RAM_ADDR - \
+- CONFIG_SYS_MALLOC_F_LEN - \
+- CONFIG_SPL_STACK_SIZE)
+-
-#endif /* __CONFIG_H */
-+#endif
--
-2.7.4
+2.7.5