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authorDenys Dmytriyenko <denys@ti.com>2020-10-14 02:23:34 +0000
committerDan Murphy <dmurphy@ti.com>2020-10-14 20:45:21 -0500
commit64f08a74a5e7fe279d293234827efd1705fe4dd3 (patch)
tree808f9902d1af2b9e0555f247359c62ed280c3238 /recipes-bsp
parent50ddd149216f4b7d106905d5a86af1f8d62a4f3b (diff)
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ti-sci-fw: now Cortex-R5 SPL can also be provided by u-boot-ti-mainline
Signed-off-by: Denys Dmytriyenko <denys@ti.com> Signed-off-by: Dan Murphy <dmurphy@ti.com>
Diffstat (limited to 'recipes-bsp')
-rw-r--r--recipes-bsp/ti-sci-fw/ti-sci-fw_git.bb2
1 files changed, 1 insertions, 1 deletions
diff --git a/recipes-bsp/ti-sci-fw/ti-sci-fw_git.bb b/recipes-bsp/ti-sci-fw/ti-sci-fw_git.bb
index 458b8921a..1239b278a 100644
--- a/recipes-bsp/ti-sci-fw/ti-sci-fw_git.bb
+++ b/recipes-bsp/ti-sci-fw/ti-sci-fw_git.bb
@@ -1,7 +1,7 @@
require recipes-bsp/ti-sci-fw/ti-sci-fw.inc
DEPENDS = "openssl-native u-boot-mkimage-native dtc-native"
-DEPENDS_append_j7200-evm-k3r5 = " u-boot-ti-staging"
+DEPENDS_append_j7200-evm-k3r5 = " virtual/bootloader"
CLEANBROKEN = "1"
PR = "r1"