diff options
297 files changed, 15654 insertions, 3951 deletions
diff --git a/.github/workflows/build-template.yml b/.github/workflows/build-template.yml new file mode 100644 index 0000000..3118434 --- /dev/null +++ b/.github/workflows/build-template.yml @@ -0,0 +1,113 @@ +on: + workflow_call: + inputs: + host: + required: true + type: string + images: + required: true + type: string + machines: + required: true + type: string + url: + required: true + type: string + branch: + required: true + type: string + ref: + required: true + type: string + ref_type: + type: string + default: ref + secrets: + TUXSUITE_TOKEN: + required: true + +env: + POKY_URL: https://git.yoctoproject.org/poky + DISTRO: poky + TCLIBC: glibc musl + KERNELS: linaro-qcomlt yocto + +jobs: + build: + name: ${{github.event_name}} - ${{github.ref}} + runs-on: ubuntu-latest + steps: + - name: Set up Python + uses: actions/setup-python@v5 + with: + python-version: "3.x" + - name: Install dependencies + run: | + python -m pip install --upgrade tuxsuite + - name: Setup tux plan + run: | + cat << EOF > plan.yaml + name: CI for ${{github.repository}} + description: ${{github.workflow}} - ${{github.ref}} + version: 1 + + common: &commondata + container: ${{inputs.host}} + envsetup: poky/oe-init-build-env + sources: + git_trees: + - branch: ${{inputs.branch}} + url: $POKY_URL + - ${{inputs.ref_type}}: ${{inputs.ref}} + url: ${{inputs.url}} + distro: $DISTRO + target: ${{inputs.images}} + bblayers_conf: + - BBLAYERS += '../$(echo ${{github.repository}} | cut -d'/' -f2)' + artifacts: [] + EOF + + for tclibc in ${TCLIBC}; do + for kernel in ${KERNELS}; do + cat << EOF >> plan.yaml + ${tclibc}-${kernel}: &${tclibc}-${kernel} + local_conf: + - INHERIT += 'buildstats buildstats-summary' + - INHERIT:remove = 'rm_work' + - TCLIBC := '${tclibc}' + - PREFERRED_PROVIDER_virtual/kernel := 'linux-${kernel}' + - INITRAMFS_IMAGE ?= 'initramfs-rootfs-image' + + EOF + done + done + + cat << EOF >> plan.yaml + jobs: + EOF + + # FIXME: loop over kernels instead of hardcoding them, need to support armv7a and modem first + for tclibc in ${TCLIBC}; do + cat << EOF >> plan.yaml + - name: ${tclibc} + bakes: + EOF + for machine in ${{inputs.machines}}; do + cat << EOF >> plan.yaml + - { <<: [*commondata, *${tclibc}-linaro-qcomlt], machine: ${machine}, name: ${machine}-${tclibc} } + EOF + if [ "${machine}" = "qcom-armv8a" -a "${{inputs.branch}}" = "master" ] ; then + cat << EOF >> plan.yaml + - { <<: [*commondata, *${tclibc}-yocto], machine: qcom-armv8a, name: qcom-armv8a-${tclibc}-yocto } + EOF + fi + done + done + + echo "Ready to submit this Tux Plan:" + cat plan.yaml + - name: Run build + run: | + tuxsuite plan plan.yaml + env: + TUXSUITE_TOKEN: ${{ secrets.TUXSUITE_TOKEN }} diff --git a/.github/workflows/daily.yml b/.github/workflows/daily.yml new file mode 100644 index 0000000..ae10b26 --- /dev/null +++ b/.github/workflows/daily.yml @@ -0,0 +1,42 @@ +name: Daily build + +on: + schedule: + - cron: '0 0 * * *' + +jobs: + master: + uses: ./.github/workflows/build-template.yml + with: + host: debian-bookworm + images: core-image-base core-image-weston core-image-x11 initramfs-test-image initramfs-test-full-image initramfs-firmware-image initramfs-rootfs-image cryptodev-module + machines: qcom-armv8a qcom-armv7a-modem qcom-armv7a + ref_type: branch + ref: master + branch: master + url: ${{github.server_url}}/${{github.repository}} + secrets: inherit + + kirkstone: + uses: ./.github/workflows/build-template.yml + with: + host: debian-bookworm + images: core-image-base core-image-weston core-image-x11 initramfs-test-image initramfs-test-full-image initramfs-firmware-image initramfs-rootfs-image cryptodev-module + machines: qcom-armv8a sdx55-mtp qcom-armv7a + ref_type: branch + ref: kirkstone + branch: kirkstone + url: ${{github.server_url}}/${{github.repository}} + secrets: inherit + + dunfell: + uses: ./.github/workflows/build-template.yml + with: + host: debian-bookworm + images: core-image-base core-image-weston core-image-x11 initramfs-test-image initramfs-test-full-image cryptodev-module + machines: qcom-armv8a + ref_type: branch + ref: dunfell + branch: dunfell + url: ${{github.server_url}}/${{github.repository}} + secrets: inherit diff --git a/.github/workflows/premerge.yml b/.github/workflows/premerge.yml new file mode 100644 index 0000000..ff9aa94 --- /dev/null +++ b/.github/workflows/premerge.yml @@ -0,0 +1,25 @@ +name: PR build + +on: + pull_request_target: + +jobs: + build: + uses: ./.github/workflows/build-template.yml + with: + host: debian-bookworm + images: core-image-base core-image-weston core-image-x11 initramfs-test-image initramfs-test-full-image initramfs-firmware-image initramfs-rootfs-image cryptodev-module + machines: qcom-armv8a qcom-armv7a-modem qcom-armv7a + ref: refs/pull/${{github.event.pull_request.number}}/merge + branch: ${{github.base_ref}} + url: ${{github.server_url}}/${{github.repository}} + secrets: inherit + + rpb: + uses: 96boards/oe-rpb-manifest/.github/workflows/build-template.yml@qcom/master + with: + local_repo: ${{github.repository}} + local_ref: refs/pull/${{github.event.pull_request.number}}/merge + branch: qcom/${{github.base_ref}} + secrets: + TUXSUITE_TOKEN: ${{ secrets.TUXSUITE_TOKEN }} diff --git a/.github/workflows/push.yml b/.github/workflows/push.yml new file mode 100644 index 0000000..c7bb05e --- /dev/null +++ b/.github/workflows/push.yml @@ -0,0 +1,21 @@ +name: Push build + +on: + push: + branches: + - master + - honister + - dunfell + +jobs: + build: + uses: ./.github/workflows/build-template.yml + with: + host: debian-bookworm + images: core-image-base core-image-weston core-image-x11 initramfs-test-image initramfs-test-full-image initramfs-firmware-image initramfs-rootfs-image cryptodev-module + machines: qcom-armv8a qcom-armv7a-modem qcom-armv7a + ref: ${{github.sha}} + ref_type: sha + branch: ${{github.ref_name}} + url: ${{github.server_url}}/${{github.repository}} + secrets: inherit @@ -1,5 +1,8 @@ # meta-qcom +![latest build](https://github.com/linaro/meta-qcom/actions/workflows/push.yml/badge.svg) +![daily builds](https://github.com/linaro/meta-qcom/actions/workflows/daily.yml/badge.svg) + ## Introduction OpenEmbedded/Yocto Project layer for Qualcomm based platforms. @@ -7,7 +10,7 @@ OpenEmbedded/Yocto Project layer for Qualcomm based platforms. This layer depends on: ``` -URI: git://github.com/openembedded/oe-core.git +URI: https://github.com/openembedded/openembedded-core.git layers: meta branch: master revision: HEAD @@ -16,7 +19,7 @@ revision: HEAD This layers has an optional dependency on meta-oe layer: ``` -URI: git://github.com/openembedded/meta-openembedded.git +URI: https://github.com/openembedded/meta-openembedded.git layers: meta-oe branch: master revision: HEAD @@ -27,28 +30,23 @@ in the build (e.g. it is used in BBLAYERS) then additional recipes from meta-qcom are added to the metadata. You can refer to meta-qcom/conf/layer.conf for the implementation details. -## Contributing - -If you want to contribute changes, you can send Github pull requests at -https://github.com/ndechesne/meta-qcom/pulls. - -Alternatively you can send patches to openembedded@lists.linaro.org, in which -case, please: - -* When creating patches, please use something like: +## Device support -`git format-patch -s --subject-prefix='meta-qcom][PATCH' origin` +All contemporary boards are supported by a single qcom-armv8a machine. Please +use it instead of using the per-board configuration file. In order to enable +support for the particular device extend the qcom-armv8a.conf file . -* When sending patches, please use something like: +## Contributing -`git send-email --to openembedded@lists.linaro.org <generated patch>` +If you want to contribute changes, you can send Github pull requests at +https://github.com/Linaro/meta-qcom/pulls. -You can discuss about this layer, on `#linaro` on FreeNode IRC network. +You can discuss about this layer, on `#linaro` on Libera Chat IRC network. ## Reporting issues -Please report any issue on https://github.com/ndechesne/meta-qcom/issues +Please report any issue on https://github.com/Linaro/meta-qcom/issues ## Maintainer(s) -Nicolas Dechesne <nicolas.dechesne@linaro.org> +Dmitry Baryshkov <dmitry.baryshkov@linaro.org> diff --git a/classes/linux-qcom-bootimg.bbclass b/classes/linux-qcom-bootimg.bbclass new file mode 100644 index 0000000..bc8a54f --- /dev/null +++ b/classes/linux-qcom-bootimg.bbclass @@ -0,0 +1,150 @@ +QIMG_DEPLOYDIR = "${WORKDIR}/qcom_deploy-${PN}" + +# Define INITRAMFS_IMAGE to create kernel+initramfs Android boot images in +# addition to default boot images. For example add the following line to your +# conf/local.conf: +# +# INITRAMFS_IMAGE = "initramfs-kerneltest-image" +# + +python __anonymous () { + if d.getVar('INITRAMFS_IMAGE') != '': + d.appendVarFlag('do_qcom_img_deploy', 'depends', ' ${INITRAMFS_IMAGE}:do_image_complete') +} + +python do_qcom_img_deploy() { + import shutil + import subprocess + + subdir = d.getVar("KERNEL_DEPLOYSUBDIR") + if subdir is not None: + qcom_deploy_dir = os.path.join(d.getVar("QIMG_DEPLOYDIR"), subdir) + image_dir = os.path.join(d.getVar("DEPLOY_DIR_IMAGE"), subdir) + else: + qcom_deploy_dir = d.getVar("QIMG_DEPLOYDIR") + image_dir = d.getVar("DEPLOY_DIR_IMAGE") + + initrd = None + if d.getVar('INITRAMFS_IMAGE') != '': + initrd_image_name = d.getVar("INITRAMFS_IMAGE_NAME") + baseinitrd = os.path.join(d.getVar("DEPLOY_DIR_IMAGE"), initrd_image_name) + for img in (".cpio.gz", ".cpio.lz4", ".cpio.lzo", ".cpio.lzma", ".cpio.xz", ".cpio"): + if os.path.exists(baseinitrd + img): + initrd = baseinitrd + img + break + if not initrd: + bb.fatal("Could not find initramfs image %s for bundling" % d.getVar("INITRAMFS_IMAGE")) + + B = d.getVar("B") + D = d.getVar("D") + kernel_output_dir = d.getVar("KERNEL_OUTPUT_DIR") + kernel_dtbdest = d.getVar("KERNEL_DTBDEST") + kernel = os.path.join(B, "kernel-dtb") + definitrd = os.path.join(B, "initrd.img") + mkbootimg = os.path.join(d.getVar("STAGING_BINDIR_NATIVE"), "skales", "mkbootimg") + kernel_image_name = d.getVar("KERNEL_IMAGE_NAME") + kernel_link_name = d.getVar("KERNEL_IMAGE_LINK_NAME") + output_img = os.path.join(qcom_deploy_dir, "boot-%s.img" % (kernel_link_name)) + output_sd_img = os.path.join(qcom_deploy_dir, "boot-sd-%s.img" % (kernel_link_name)) + + arch = d.getVar("ARCH") + if arch == "arm": + kernel_name = "zImage" + elif arch == "arm64": + kernel_name = "Image.gz" + else: + bb.fatal("Unuspported ARCH %s" % arch) + + if os.path.exists(output_img): + os.unlink(output_img) + if os.path.exists(output_sd_img): + os.unlink(output_sd_img) + + with open(definitrd, "w") as f: + f.write("This is not an initrd\n") + + for dtbf in d.getVar("KERNEL_DEVICETREE").split(): + dtb = os.path.basename(dtbf) + dtb_name = dtb.rsplit('.', 1)[0] + + def getVarDTB(name): + return d.getVarFlag(name, dtb_name) or d.getVar(name) + + def make_image_internal(output, output_link, rootfs, initrd = definitrd): + subprocess.check_call([mkbootimg, + "--kernel", kernel, + "--ramdisk", initrd, + "--output", output, + "--pagesize", getVarDTB("QCOM_BOOTIMG_PAGE_SIZE"), + "--base", getVarDTB("QCOM_BOOTIMG_KERNEL_BASE"), + "--cmdline", "root=%s rw rootwait %s %s" % (rootfs, consoles, getVarDTB("KERNEL_CMDLINE_EXTRA") or "")]) + if os.path.exists(output_link): + os.unlink(output_link) + os.symlink(os.path.basename(output), output_link) + + def make_image(template, rootfs): + output = os.path.join(qcom_deploy_dir, template % (dtb_name, kernel_image_name)) + output_link = os.path.join(qcom_deploy_dir, template % (dtb_name, kernel_link_name)) + make_image_internal(output, output_link, rootfs) + return output + + def make_initramfs_image(template, rootfs, initrd, initrd_image_name): + output = os.path.join(qcom_deploy_dir, template % (initrd_image_name, dtb_name, kernel_image_name)) + output_link = os.path.join(qcom_deploy_dir, template % (initrd_image_name, dtb_name, kernel_link_name)) + make_image_internal(output, output_link, rootfs, initrd) + output_link = os.path.join(qcom_deploy_dir, template % ("initramfs", dtb_name, kernel_link_name)) + if os.path.exists(output_link): + os.unlink(output_link) + os.symlink(os.path.basename(output), output_link) + return output + + consoles = ' '.join(map(lambda c: "console=%(tty)s,%(rate)sn8" % dict(zip(("rate", "tty"), c.split(';'))), getVarDTB("SERIAL_CONSOLES").split())) + + # prepare kernel image with appended dtb + with open(kernel, 'wb') as wfd: + with open(os.path.join(kernel_output_dir, kernel_name), 'rb') as rfd: + shutil.copyfileobj(rfd, wfd) + with open(os.path.join(D, kernel_dtbdest, dtb), 'rb') as rfd: + shutil.copyfileobj(rfd, wfd) + + rootfs = getVarDTB("QCOM_BOOTIMG_ROOTFS") + if not rootfs: + bb.fatal("QCOM_BOOTIMG_ROOTFS is undefined") + + output = make_image("boot-%s-%s.img", rootfs) + if not os.path.exists(output_img): + os.symlink(os.path.basename(output), output_img) + + if initrd: + make_initramfs_image("boot-%s-%s-%s.img", rootfs, initrd, d.getVar("INITRAMFS_IMAGE")) + + sd_rootfs = getVarDTB("SD_QCOM_BOOTIMG_ROOTFS") + if sd_rootfs: + output = make_image("boot-sd-%s-%s.img", sd_rootfs) + if not os.path.exists(output_sd_img): + os.symlink(os.path.basename(output), output_sd_img) + + if initrd: + make_initramfs_image("boot-sd-%s-%s-%s.img", rootfs, initrd, d.getVar("INITRAMFS_IMAGE")) +} + +do_qcom_img_deploy[depends] += "skales-native:do_populate_sysroot" +do_qcom_img_deploy[vardeps] = "QCOM_BOOTIMG_PAGE_SIZE QCOM_BOOTIMG_KERNEL_BASE KERNEL_CMDLINE_EXTRA QCOM_BOOTIMG_ROOTFS" + +addtask qcom_img_deploy after do_populate_sysroot do_packagedata do_bundle_initramfs before do_deploy + +# Setup sstate, see deploy.bbclass +SSTATETASKS += "do_qcom_img_deploy" +do_qcom_img_deploy[sstate-inputdirs] = "${QIMG_DEPLOYDIR}" +do_qcom_img_deploy[sstate-outputdirs] = "${DEPLOY_DIR_IMAGE}" + +python do_qcom_img_deploy_setscene () { + sstate_setscene(d) +} +addtask do_qcom_img_deploy_setscene +do_qcom_img_deploy[dirs] = "${QIMG_DEPLOYDIR} ${B}" +do_qcom_img_deploy[cleandirs] = "${QIMG_DEPLOYDIR}" +do_qcom_img_deploy[stamp-extra-info] = "${MACHINE_ARCH}" + +# We do not need kernel image in /boot, these images are flashed into separate partition. +RDEPENDS:${KERNEL_PACKAGE_NAME}-base = "" diff --git a/conf/layer.conf b/conf/layer.conf index 380bb02..0640b80 100644 --- a/conf/layer.conf +++ b/conf/layer.conf @@ -8,11 +8,15 @@ BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ BBFILE_COLLECTIONS += "qcom" BBFILE_PATTERN_qcom := "^${LAYERDIR}/" BBFILE_PRIORITY_qcom = "5" -LAYERSERIES_COMPAT_qcom = "zeus dunfell gatesgarth" + +LAYERDEPENDS_qcom = "core" +LAYERSERIES_COMPAT_qcom = "nanbield scarthgap" BBFILES_DYNAMIC += " \ openembedded-layer:${LAYERDIR}/dynamic-layers/openembedded-layer/*/*/*.bb \ openembedded-layer:${LAYERDIR}/dynamic-layers/openembedded-layer/*/*/*.bbappend \ networking-layer:${LAYERDIR}/dynamic-layers/networking-layer/*/*/*.bb \ networking-layer:${LAYERDIR}/dynamic-layers/networking-layer/*/*/*.bbappend \ + meta-linux-mainline:${LAYERDIR}/dynamic-layers/meta-linux-mainline/*/*/*.bb \ + meta-linux-mainline:${LAYERDIR}/dynamic-layers/meta-linux-mainline/*/*/*.bbappend \ " diff --git a/conf/machine/dragonboard-410c-32.conf b/conf/machine/dragonboard-410c-32.conf deleted file mode 100644 index 8d732ed..0000000 --- a/conf/machine/dragonboard-410c-32.conf +++ /dev/null @@ -1,20 +0,0 @@ -#@TYPE: Machine -#@NAME: dragonboard-410c-32 -#@DESCRIPTION: 32-bit machine configuration for the DragonBoard 410c (96boards), with Qualcomm Snapdragon 410 APQ8016. - -require conf/machine/include/qcom-apq8016.inc -require conf/machine/include/tune-cortexa8.inc - -MACHINE_FEATURES = "usbhost usbgadget alsa screen wifi bluetooth ext2" - -SERIAL_CONSOLE ?= "115200 ttyMSM0" - -# Building 32-bit kernel is not supported. -PREFERRED_PROVIDER_virtual/kernel = "linux-dummy" -RDEPENDS_kernel-base = "" - -MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += " \ - ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'mesa-driver-msm', '', d)} \ - ${@bb.utils.contains('DISTRO_FEATURES', 'bluez5', 'bluez5-noinst-tools', '', d)} \ - firmware-qcom-dragonboard410c \ -" diff --git a/conf/machine/dragonboard-410c.conf b/conf/machine/dragonboard-410c.conf deleted file mode 100644 index 08ff30d..0000000 --- a/conf/machine/dragonboard-410c.conf +++ /dev/null @@ -1,33 +0,0 @@ -#@TYPE: Machine -#@NAME: dragonboard-410c -#@DESCRIPTION: Machine configuration for the DragonBoard 410c (96boards), with Qualcomm Snapdragon 410 APQ8016. - -require conf/machine/include/qcom-apq8016.inc -require conf/machine/include/tune-cortexa53.inc - -MACHINE_FEATURES = "usbhost usbgadget alsa screen wifi bluetooth ext2" - -KERNEL_IMAGETYPE ?= "Image.gz" -KERNEL_DEVICETREE ?= "qcom/apq8016-sbc.dtb" - -SERIAL_CONSOLE ?= "115200 ttyMSM0" - -MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += " \ - kernel-modules \ - ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'linux-firmware-qcom-adreno-a3xx mesa-driver-msm', '', d)} \ - ${@bb.utils.contains('DISTRO_FEATURES', 'bluez5', 'bluez5-noinst-tools', '', d)} \ - firmware-qcom-dragonboard410c \ - linux-firmware-qcom-venus-1.8 \ -" - -QCOM_BOOTIMG_ROOTFS ?= "/dev/mmcblk0p14" - -# Define rootfs partiton (kernel argument) -SD_QCOM_BOOTIMG_ROOTFS ?= "/dev/mmcblk1p7" - -UBOOT_MACHINE ?= "dragonboard410c_defconfig" - -# Assemble SD card -IMAGE_FSTYPES += "wic.gz wic.bmap" -WKS_FILE = "dragonboard410c-sd.wks" -WKS_FILE_DEPENDS = "firmware-qcom-dragonboard410c-bootloader-sdcard" diff --git a/conf/machine/dragonboard-600c.conf b/conf/machine/dragonboard-600c.conf deleted file mode 100644 index 8c815f8..0000000 --- a/conf/machine/dragonboard-600c.conf +++ /dev/null @@ -1,21 +0,0 @@ -#@TYPE: Machine -#@NAME: Dragonboard 600c -#@DESCRIPTION: Machine configuration for the Dragonboard 600c, with Qualcomm Snapdragon 600 APQ8064. - -require conf/machine/include/qcom-apq8064.inc - -MACHINE_FEATURES = "usbhost usbgadget alsa screen wifi bluetooth ext2" - -MACHINE_EXTRA_RRECOMMENDS = " \ - kernel-modules \ - ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'mesa-driver-msm', '', d)} \ - ${@bb.utils.contains('DISTRO_FEATURES', 'bluez5', 'bluez5-noinst-tools', '', d)} \ - firmware-qcom-sd-600eval \ -" - -KERNEL_IMAGETYPE ?= "zImage" -KERNEL_DEVICETREE ?= "qcom-apq8064-db600c.dtb" - -SERIAL_CONSOLE ?= "115200 ttyMSM0" - -QCOM_BOOTIMG_ROOTFS ?= "/dev/mmcblk0p12" diff --git a/conf/machine/dragonboard-820c.conf b/conf/machine/dragonboard-820c.conf deleted file mode 100644 index ed61911..0000000 --- a/conf/machine/dragonboard-820c.conf +++ /dev/null @@ -1,27 +0,0 @@ -#@TYPE: Machine -#@NAME: dragonboard-820c -#@DESCRIPTION: Machine configuration for the DragonBoard 820c (96boards), with Qualcomm Snapdragon 820 APQ8096. - -require conf/machine/include/qcom-apq8096.inc - -MACHINE_FEATURES = "usbhost usbgadget alsa screen wifi bluetooth ext2" - -KERNEL_IMAGETYPE ?= "Image.gz" -KERNEL_DEVICETREE ?= "qcom/apq8096-db820c.dtb" - -SERIAL_CONSOLE ?= "115200 ttyMSM0" - -MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += " \ - firmware-qcom-dragonboard820c \ - kernel-modules \ - ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'linux-firmware-qcom-adreno-a530 mesa-driver-msm', '', d)} \ - ${@bb.utils.contains('DISTRO_FEATURES', 'wifi', 'linux-firmware-ath10k', '', d)} \ - linux-firmware-qcom-venus-4.2 \ -" - -QCOM_BOOTIMG_ROOTFS ?= "/dev/sda1" - -UBOOT_MACHINE ?= "dragonboard820c_defconfig" - -# UFS partitions setup with 4096 logical sector size -EXTRA_IMAGECMD_ext4 += " -b 4096 " diff --git a/conf/machine/dragonboard-845c.conf b/conf/machine/dragonboard-845c.conf deleted file mode 100644 index 8391ef6..0000000 --- a/conf/machine/dragonboard-845c.conf +++ /dev/null @@ -1,29 +0,0 @@ -#@TYPE: Machine -#@NAME: dragonboard-845c -#@DESCRIPTION: Machine configuration for the DragonBoard 845c (96boards), with Qualcomm Snapdragon 845 SDM845. - -require conf/machine/include/qcom-sdm845.inc - -MACHINE_FEATURES = "usbhost usbgadget alsa screen wifi bluetooth ext2" - -KERNEL_IMAGETYPE ?= "Image.gz" -KERNEL_DEVICETREE ?= "qcom/sdm845-db845c.dtb" - -SERIAL_CONSOLE ?= "115200 ttyMSM0" - -MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += " \ - firmware-qcom-dragonboard845c \ - kernel-modules \ - ${@bb.utils.contains('DISTRO_FEATURES', 'wifi', 'linux-firmware-ath10k linux-firmware-qcom-sdm845-modem', '', d)} \ - ${@bb.utils.contains('DISTRO_FEATURES', 'bluetooth', 'linux-firmware-qca linux-firmware-qcom-sdm845-modem', '', d)} \ - linux-firmware-qcom-sdm845-audio \ - linux-firmware-qcom-sdm845-compute \ - ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'linux-firmware-qcom-adreno-a630 mesa-driver-msm', '', d)} \ - linux-firmware-qcom-venus-5.2 \ -" - -# /dev/sda1 is 'rootfs' partition after installing the latest bootloader package from linaro -QCOM_BOOTIMG_ROOTFS ?= "/dev/sda1" - -# UFS partitions setup with 4096 logical sector size -EXTRA_IMAGECMD_ext4 += " -b 4096 " diff --git a/conf/machine/evb4k-qcs404.conf b/conf/machine/evb4k-qcs404.conf deleted file mode 100644 index 4021746..0000000 --- a/conf/machine/evb4k-qcs404.conf +++ /dev/null @@ -1,19 +0,0 @@ -#@TYPE: Machine -#@NAME: evb4k-qcs404 -#@DESCRIPTION: Machine configuration for the EVB-4K QCS404 with Qualcomm QCS404. - -require conf/machine/include/qcom-qcs404.inc -require conf/machine/include/tune-cortexa53.inc - -MACHINE_FEATURES = "usbhost usbgadget ext2" - -KERNEL_IMAGETYPE ?= "Image.gz" -KERNEL_DEVICETREE ?= "qcom/qcs404-evb-4000.dtb" - -SERIAL_CONSOLE ?= "115200 ttyMSM0" - -MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += " \ - kernel-modules \ -" - -QCOM_BOOTIMG_ROOTFS ?= "/dev/mmcblk0p27" diff --git a/conf/machine/ifc6410.conf b/conf/machine/ifc6410.conf deleted file mode 100644 index e0cffcf..0000000 --- a/conf/machine/ifc6410.conf +++ /dev/null @@ -1,22 +0,0 @@ -#@TYPE: Machine -#@NAME: ifc6410 -#@DESCRIPTION: Machine configuration for the Inforce IFC6410, with Qualcomm Snapdragon 600 APQ8064. - -require conf/machine/include/qcom-apq8064.inc - -# features -MACHINE_FEATURES = "alsa kernel26 screen usb keyboard wifi ext2 ext3" - -MACHINE_EXTRA_RRECOMMENDS = " \ - kernel-modules \ - ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'mesa-driver-msm', '', d)} \ -" - -KERNEL_IMAGETYPE ?= "zImage" -KERNEL_DEVICETREE ?= "qcom-apq8064-ifc6410.dtb" - -SERIAL_CONSOLE ?= "115200 ttyMSM0" - -QCOM_BOOTIMG_ROOTFS ?= "/dev/mmcblk0p12" - -INHERIT += "qcom-firmware-mount" diff --git a/conf/machine/include/qcom-apq8016.inc b/conf/machine/include/qcom-apq8016.inc index 80e097b..5414a7a 100644 --- a/conf/machine/include/qcom-apq8016.inc +++ b/conf/machine/include/qcom-apq8016.inc @@ -1,5 +1,6 @@ SOC_FAMILY = "apq8016" require conf/machine/include/qcom-common.inc +require conf/machine/include/arm/armv8a/tune-cortexa53.inc MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += " \ qrtr \ @@ -9,3 +10,6 @@ MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += " \ MACHINE_EXTRA_RRECOMMENDS += " \ fastrpc \ " + +# Android boot image settings +QCOM_BOOTIMG_PAGE_SIZE = "2048" diff --git a/conf/machine/include/qcom-apq8064.inc b/conf/machine/include/qcom-apq8064.inc index 96f880c..e2f0c25 100644 --- a/conf/machine/include/qcom-apq8064.inc +++ b/conf/machine/include/qcom-apq8064.inc @@ -1,3 +1,7 @@ SOC_FAMILY = "apq8064" require conf/machine/include/qcom-common.inc -require conf/machine/include/tune-cortexa8.inc +DEFAULTTUNE = "cortexa15thf-neon-vfpv4" +require conf/machine/include/arm/armv7a/tune-cortexa15.inc + +# Android boot image settings +QCOM_BOOTIMG_PAGE_SIZE = "2048" diff --git a/conf/machine/include/qcom-apq8096.inc b/conf/machine/include/qcom-apq8096.inc index 4f62b59..ea875b0 100644 --- a/conf/machine/include/qcom-apq8096.inc +++ b/conf/machine/include/qcom-apq8096.inc @@ -1,5 +1,6 @@ SOC_FAMILY = "apq8096" require conf/machine/include/qcom-common.inc +DEFAULTTUNE = "armv8a-crc-crypto" require conf/machine/include/arm/arch-armv8a.inc MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += " \ @@ -10,6 +11,3 @@ MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += " \ MACHINE_EXTRA_RRECOMMENDS += " \ fastrpc \ " - -# Android boot image settings -QCOM_BOOTIMG_PAGE_SIZE = "4096" diff --git a/conf/machine/include/qcom-common.inc b/conf/machine/include/qcom-common.inc index 272ab6a..da57da8 100644 --- a/conf/machine/include/qcom-common.inc +++ b/conf/machine/include/qcom-common.inc @@ -1,4 +1,4 @@ -SOC_FAMILY_prepend = "qcom:" +SOC_FAMILY:prepend = "qcom:" require conf/machine/include/soc-family.inc XSERVER_OPENGL ?= " \ @@ -11,8 +11,6 @@ XSERVER ?= " \ xserver-xorg-module-libint10 \ ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', '${XSERVER_OPENGL}', 'xf86-video-fbdev', d)} \ xf86-input-evdev \ - xf86-input-mouse \ - xf86-input-keyboard \ " PREFERRED_PROVIDER_virtual/egl ?= "mesa" @@ -20,7 +18,9 @@ PREFERRED_PROVIDER_virtual/libgl ?= "mesa" PREFERRED_PROVIDER_virtual/libgles1 ?= "mesa" PREFERRED_PROVIDER_virtual/libgles2 ?= "mesa" PREFERRED_PROVIDER_virtual/xserver ?= "xserver-xorg" -PREFERRED_PROVIDER_virtual/kernel ?= "linux-linaro-qcomlt" +PREFERRED_PROVIDER_virtual/kernel ??= "linux-linaro-qcomlt" + +PREFERRED_PROVIDER_android-tools-conf = "android-tools-conf-configfs" # Fastboot expects an ext4 image, which needs to be 4096 aligned IMAGE_FSTYPES ?= "ext4.gz" @@ -28,4 +28,30 @@ IMAGE_ROOTFS_ALIGNMENT ?= "4096" # Android boot image settings QCOM_BOOTIMG_KERNEL_BASE ?= "0x80000000" -QCOM_BOOTIMG_PAGE_SIZE ?= "2048" +QCOM_BOOTIMG_PAGE_SIZE ?= "4096" + +# Default serial console for QCOM devices +SERIAL_CONSOLES ?= "115200;ttyMSM0" + +# Increase INITRAMFS_MAXSIZE to 384 MiB to cover initramfs-kerneltest-full +# image. All our boards (except db410c) have 2GiB and db410c has 1GiB of RAM, +# so this image would fit. +INITRAMFS_MAXSIZE = "393216" + +# Use systemd-boot as the EFI bootloader +EFI_PROVIDER = "systemd-boot" + +# Install packages at root of ESP +EFI_PREFIX = "" + +# Location of dtb inside ESP +EFI_DTB_DIR ?= "${EFI_PREFIX}dtb" + +# Unified Kernel Image (UKI) name +EFI_LINUX_IMG ?= "linux-${MACHINE}.efi" + +# Place dtb at EFIDTDIR to seamlessly package +KERNEL_DTBDEST = "${EFI_DTB_DIR}" + +# UKI generation needs uncompressed Kernel image +KERNEL_IMAGETYPES:append = " Image" diff --git a/conf/machine/include/qcom-qcs404.inc b/conf/machine/include/qcom-qcs404.inc index eacc03c..90f9acb 100644 --- a/conf/machine/include/qcom-qcs404.inc +++ b/conf/machine/include/qcom-qcs404.inc @@ -5,6 +5,3 @@ require conf/machine/include/arm/arch-armv8a.inc MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += " \ qrtr \ " - -# Android boot image settings -QCOM_BOOTIMG_PAGE_SIZE = "4096" diff --git a/conf/machine/include/qcom-sa8155p.inc b/conf/machine/include/qcom-sa8155p.inc new file mode 100644 index 0000000..bcd508f --- /dev/null +++ b/conf/machine/include/qcom-sa8155p.inc @@ -0,0 +1,15 @@ +SOC_FAMILY = "sa8155p" +require conf/machine/include/qcom-common.inc +DEFAULTTUNE = "armv8-2a-crypto" +require conf/machine/include/arm/arch-armv8-2a.inc + +MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += " \ + pd-mapper \ + qrtr \ + rmtfs \ + tqftpserv \ +" + +MACHINE_EXTRA_RRECOMMENDS += " \ + fastrpc \ +" diff --git a/conf/machine/include/qcom-sdm845.inc b/conf/machine/include/qcom-sdm845.inc index da6ff9f..d197ca6 100644 --- a/conf/machine/include/qcom-sdm845.inc +++ b/conf/machine/include/qcom-sdm845.inc @@ -13,6 +13,3 @@ MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += " \ MACHINE_EXTRA_RRECOMMENDS += " \ fastrpc \ " - -# Android boot image settings -QCOM_BOOTIMG_PAGE_SIZE = "4096" diff --git a/conf/machine/include/qcom-sdx55.inc b/conf/machine/include/qcom-sdx55.inc new file mode 100644 index 0000000..67a9db0 --- /dev/null +++ b/conf/machine/include/qcom-sdx55.inc @@ -0,0 +1,12 @@ +SOC_FAMILY = "sdx55" +require conf/machine/include/qcom-common.inc +require conf/machine/include/arm/armv7a/tune-cortexa7.inc + +MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += " \ + qrtr \ + rmtfs \ +" + +# UBI filesystem settings +IMAGE_FSTYPES ?= "ubi" +QCOM_BOOTIMG_PAGE_SIZE ?= "4096" diff --git a/conf/machine/include/qcom-sm8250.inc b/conf/machine/include/qcom-sm8250.inc index fbdd7cb..c557147 100644 --- a/conf/machine/include/qcom-sm8250.inc +++ b/conf/machine/include/qcom-sm8250.inc @@ -13,6 +13,3 @@ MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += " \ MACHINE_EXTRA_RRECOMMENDS += " \ fastrpc \ " - -# Android boot image settings -QCOM_BOOTIMG_PAGE_SIZE ?= "4096" diff --git a/conf/machine/qcom-armv7a-modem.conf b/conf/machine/qcom-armv7a-modem.conf new file mode 100644 index 0000000..caa7f2b --- /dev/null +++ b/conf/machine/qcom-armv7a-modem.conf @@ -0,0 +1,37 @@ +#@TYPE: Machine +#@NAME: Qualcomm SDX/MDM devices +#@DESCRIPTION: Machine configuration for various Qualcomm SDX and MDM based boards + +require conf/machine/include/qcom-common.inc +# MDM9615 is Cortex-A5 + VFP4, so it should be compatible +require conf/machine/include/arm/armv7a/tune-cortexa7.inc + +MACHINE_FEATURES = "usbhost usbgadget" + +MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += " \ + qrtr \ + rmtfs \ +" + +KERNEL_IMAGETYPE ?= "zImage" +KERNEL_DEVICETREE ?= " \ + qcom/qcom-mdm9615-wp8548-mangoh-green.dtb \ + qcom/qcom-sdx55-mtp.dtb \ + qcom/qcom-sdx55-t55.dtb \ + qcom/qcom-sdx55-telit-fn980-tlb.dtb \ + qcom/qcom-sdx65-mtp.dtb \ +" + +SERIAL_CONSOLES[qcom-sdx55-telit-fn980-tlb] = "921600;ttyMSM0" + +# UBI filesystem settings +IMAGE_FSTYPES ?= "ubi" +QCOM_BOOTIMG_PAGE_SIZE ?= "4096" + +# UBI filesystem parameters +MKUBIFS_ARGS ?= "-m 4096 -e 253952 -c 1188" +UBINIZE_ARGS ?= "-m 4096 -p 256KiB -s 4096" + +# Use system partition for rootfs +UBI_VOLNAME ?= "system" +QCOM_BOOTIMG_ROOTFS ?= "ubi0:system" diff --git a/conf/machine/qcom-armv7a.conf b/conf/machine/qcom-armv7a.conf new file mode 100644 index 0000000..d8cb92f --- /dev/null +++ b/conf/machine/qcom-armv7a.conf @@ -0,0 +1,40 @@ +#@TYPE: Machine +#@NAME: Qualcomm Snapdragon ARMv7-a (with Krait cores) +#@DESCRIPTION: Unified 32-bit machine configuration for the devices with Qualcomm Snapdragon ARMv7-a based CPUs (S4 and later) +# +# Note: This machine targets Snapdragon S4 Plus/Pro/Prime and early (32-bit +# ARM) models of Snapdragon 400/600/800 series SoCs. It will most probably +# work on Snapdragon S4 (MSM8x25, Cortex-A5 with VFPv4) or on 32-bit IPQ SoCs +# +# Do not use this machine for SDXnn modems or for Snapdragon S1/S2/S3. + +require conf/machine/include/qcom-common.inc + +# Krait is not Cortex-A15, but its features are close enough +DEFAULTTUNE = "cortexa15thf-neon-vfpv4" +require conf/machine/include/arm/armv7a/tune-cortexa15.inc + +# Android boot image settings +QCOM_BOOTIMG_PAGE_SIZE = "2048" + +MACHINE_FEATURES = "alsa screen alsa bluetooth ext2 ext3 opengl usb usbhost usbgadget" + +KERNEL_IMAGETYPE ?= "zImage" +KERNEL_DEVICETREE ?= " \ + qcom/qcom-apq8064-asus-nexus7-flo.dtb \ + qcom/qcom-apq8064-ifc6410.dtb \ + qcom/qcom-apq8074-dragonboard.dtb \ + qcom/qcom-apq8084-ifc6540.dtb \ + qcom/qcom-msm8974-lge-nexus5-hammerhead.dtb \ +" + +MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += " \ + ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'mesa-driver-msm', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'wifi', 'wireless-regdb-static', '', d)} \ + packagegroup-firmware-ifc6410 \ + firmware-qcom-nexus7-2013 \ +" + +SERIAL_CONSOLE ?= "115200 ttyMSM0" + +QCOM_BOOTIMG_ROOTFS ?= "PARTLABEL=userdata" diff --git a/conf/machine/qcom-armv8a.conf b/conf/machine/qcom-armv8a.conf new file mode 100644 index 0000000..4ae1a24 --- /dev/null +++ b/conf/machine/qcom-armv8a.conf @@ -0,0 +1,64 @@ +require conf/machine/include/qcom-common.inc +require conf/machine/include/arm/arch-armv8a.inc + +MACHINE_FEATURES = "usbhost usbgadget alsa screen wifi bluetooth ext2" + +# UFS partitions in 820/845/RB5 setup with 4096 logical sector size +EXTRA_IMAGECMD:ext4 += " -b 4096 " + +PREFERRED_PROVIDER_virtual/kernel ?= "linux-yocto" + +# Support for dragonboard{410, 820, 845}c, rb5 +KERNEL_IMAGETYPE ?= "Image.gz" +SERIAL_CONSOLE ?= "115200 ttyMSM0" +KERNEL_DEVICETREE ?= " \ + qcom/apq8016-sbc.dtb \ + qcom/apq8096-db820c.dtb \ + qcom/sdm845-db845c.dtb \ + qcom/qcs404-evb-4000.dtb \ + qcom/qrb2210-rb1.dtb \ + qcom/qrb4210-rb2.dtb \ + qcom/qrb5165-rb5.dtb \ + qcom/sm8450-hdk.dtb \ +" + +# These DT are not upstreamed (yet) and currenty exist only as a patches against linux-yocto +KERNEL_DEVICETREE:append:pn-linux-yocto = " \ + qcom/qcm6490-idp.dtb \ + qcom/qcm6490-rb3.dtb \ +" + +QCOM_BOOTIMG_PAGE_SIZE[apq8016-sbc] ?= "2048" +QCOM_BOOTIMG_ROOTFS ?= "/dev/sda1" +QCOM_BOOTIMG_ROOTFS[apq8016-sbc] ?= "/dev/mmcblk0p14" +QCOM_BOOTIMG_ROOTFS[sm8450-hdk] ?= "PARTLABEL=userdata" +QCOM_BOOTIMG_ROOTFS[qcs404-evb-4000] ?= "/dev/mmcblk0p27" +QCOM_BOOTIMG_ROOTFS[qrb2210-rb1] ?= "PARTLABEL=userdata" +QCOM_BOOTIMG_ROOTFS[qrb4210-rb2] ?= "PARTLABEL=userdata" +SD_QCOM_BOOTIMG_ROOTFS[apq8016-sbc] ?= "/dev/mmcblk1p7" +KERNEL_CMDLINE_EXTRA[sdm845-db845c] ?= "clk_ignore_unused pd_ignore_unused" + +# Userspace tools +MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += " \ + pd-mapper \ + qrtr \ + rmtfs \ + tqftpserv \ +" + +MACHINE_EXTRA_RRECOMMENDS += " \ + fastrpc \ +" + +# Modules and firmware for all supported machines +MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += " \ + kernel-modules \ + ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'mesa-driver-msm', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'wifi', 'wireless-regdb-static', '', d)} \ + packagegroup-firmware-dragonboard410c \ + packagegroup-firmware-dragonboard820c \ + packagegroup-firmware-dragonboard845c \ + packagegroup-firmware-rb1 \ + packagegroup-firmware-rb2 \ + packagegroup-firmware-rb5 \ +" diff --git a/conf/machine/qrb5165-rb5.conf b/conf/machine/qrb5165-rb5.conf deleted file mode 100644 index 3da36ad..0000000 --- a/conf/machine/qrb5165-rb5.conf +++ /dev/null @@ -1,27 +0,0 @@ -#@TYPE: Machine -#@NAME: RB5 Robotics platform -#@DESCRIPTION: Machine configuration for the RB5 development board, with Qualcomm Snapdragon 865 QRB5165. - -require conf/machine/include/qcom-sm8250.inc - -MACHINE_FEATURES = "usbhost usbgadget alsa screen wifi bluetooth ext2" - -KERNEL_IMAGETYPE ?= "Image.gz" -KERNEL_DEVICETREE ?= "qcom/qrb5165-rb5.dtb" - -SERIAL_CONSOLE ?= "115200 ttyMSM0" - -MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += " \ - kernel-modules \ - firmware-qcom-rb5 \ - ${@bb.utils.contains('DISTRO_FEATURES', 'bluetooth', 'linux-firmware-qca', '', d)} \ - ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'mesa-driver-msm', '', d)} \ -" -# linux-firmware-qcom-adreno-a650 - -# 'userdata' is sda8 with older firmware/GPT and sda6 with newer firmware. -# Allow kernel to resolve it on it's own. Wipe it and use for our build. -QCOM_BOOTIMG_ROOTFS ?= "PARTLABEL=userdata" - -# UFS partitions setup with 4096 logical sector size -EXTRA_IMAGECMD_ext4 += " -b 4096 " diff --git a/conf/machine/sd-600eval.conf b/conf/machine/sd-600eval.conf deleted file mode 100644 index f8c061a..0000000 --- a/conf/machine/sd-600eval.conf +++ /dev/null @@ -1,21 +0,0 @@ -#@TYPE: Machine -#@NAME: SD 600eval -#@DESCRIPTION: Machine configuration for the Arrow SD 600eval, with Qualcomm Snapdragon 600 APQ8064. - -require conf/machine/include/qcom-apq8064.inc - -MACHINE_FEATURES = "usbhost usbgadget alsa screen wifi bluetooth ext2" - -MACHINE_EXTRA_RRECOMMENDS = " \ - kernel-modules \ - ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'mesa-driver-msm', '', d)} \ - ${@bb.utils.contains('DISTRO_FEATURES', 'bluez5', 'bluez5-noinst-tools', '', d)} \ - firmware-qcom-sd-600eval \ -" - -KERNEL_IMAGETYPE ?= "zImage" -KERNEL_DEVICETREE ?= "qcom-apq8064-arrow-sd-600eval.dtb" - -SERIAL_CONSOLE ?= "115200 ttyMSM0" - -QCOM_BOOTIMG_ROOTFS ?= "/dev/mmcblk0p12" diff --git a/conf/machine/sm8250-mtp.conf b/conf/machine/sm8250-mtp.conf deleted file mode 100644 index 17a8887..0000000 --- a/conf/machine/sm8250-mtp.conf +++ /dev/null @@ -1,25 +0,0 @@ -#@TYPE: Machine -#@NAME: SM8250-MTP -#@DESCRIPTION: Machine configuration for the SM8250-MTP development board, with Qualcomm Snapdragon 865 SM8250. - -require conf/machine/include/qcom-sm8250.inc - -MACHINE_FEATURES = "usbhost usbgadget alsa screen wifi bluetooth ext2" - -KERNEL_IMAGETYPE ?= "Image.gz" -KERNEL_DEVICETREE ?= "qcom/sm8250-mtp.dtb" - -SERIAL_CONSOLE ?= "115200 ttyMSM0" - -MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += " \ - kernel-modules \ - ${@bb.utils.contains('DISTRO_FEATURES', 'bluetooth', 'linux-firmware-qca', '', d)} \ - ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'mesa-driver-msm', '', d)} \ -" -# linux-firmware-qcom-adreno-a650 - -# /dev/sda15 is 'userdata' partition, so wipe it and use for our build -QCOM_BOOTIMG_ROOTFS ?= "/dev/sda15" - -# UFS partitions setup with 4096 logical sector size -EXTRA_IMAGECMD_ext4 += " -b 4096 " diff --git a/dynamic-layers/meta-linux-mainline/recipes-kernel/linux/linux-mainline.bbappend b/dynamic-layers/meta-linux-mainline/recipes-kernel/linux/linux-mainline.bbappend new file mode 100644 index 0000000..2fefa5b --- /dev/null +++ b/dynamic-layers/meta-linux-mainline/recipes-kernel/linux/linux-mainline.bbappend @@ -0,0 +1 @@ +include linux-mainline.inc diff --git a/dynamic-layers/meta-linux-mainline/recipes-kernel/linux/linux-mainline.inc b/dynamic-layers/meta-linux-mainline/recipes-kernel/linux/linux-mainline.inc new file mode 100644 index 0000000..b1cfb69 --- /dev/null +++ b/dynamic-layers/meta-linux-mainline/recipes-kernel/linux/linux-mainline.inc @@ -0,0 +1,4 @@ +require recipes-kernel/linux/linux-qcom-bootimg.inc + +KBUILD_DEFCONFIG:qcom = "defconfig" +KBUILD_DEFCONFIG:qcom:arm = "qcom_defconfig" diff --git a/dynamic-layers/meta-linux-mainline/recipes-kernel/linux/linux-stable_%.bbappend b/dynamic-layers/meta-linux-mainline/recipes-kernel/linux/linux-stable_%.bbappend new file mode 100644 index 0000000..2fefa5b --- /dev/null +++ b/dynamic-layers/meta-linux-mainline/recipes-kernel/linux/linux-stable_%.bbappend @@ -0,0 +1 @@ +include linux-mainline.inc diff --git a/dynamic-layers/networking-layer/recipes-test/images/initramfs-test-image.bbappend b/dynamic-layers/networking-layer/recipes-test/images/initramfs-test-image.bbappend deleted file mode 100644 index bd946f8..0000000 --- a/dynamic-layers/networking-layer/recipes-test/images/initramfs-test-image.bbappend +++ /dev/null @@ -1,5 +0,0 @@ -PACKAGE_INSTALL += " \ - iperf2 \ - iperf3 \ - tcpdump \ -" diff --git a/dynamic-layers/openembedded-layer/recipes-devtools/android-tools/android-tools-adbd-cmdline.bb b/dynamic-layers/openembedded-layer/recipes-devtools/android-tools/android-tools-adbd-cmdline.bb new file mode 100644 index 0000000..482109a --- /dev/null +++ b/dynamic-layers/openembedded-layer/recipes-devtools/android-tools/android-tools-adbd-cmdline.bb @@ -0,0 +1,17 @@ +DESCRIPTION = "An override for adbd unit - start adbd depending on the kernel command line" +SECTION = "console/utils" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +SRC_URI = " \ + file://50-adbd-cmdline.conf \ +" + +do_install() { + install -d ${D}${systemd_unitdir}/system/android-tools-adbd.service.d + install -m 0644 ${WORKDIR}/50-adbd-cmdline.conf ${D}${systemd_unitdir}/system/android-tools-adbd.service.d +} + +FILES:${PN} += " \ + ${systemd_unitdir}/system/ \ +" diff --git a/dynamic-layers/openembedded-layer/recipes-devtools/android-tools/android-tools-adbd-cmdline/50-adbd-cmdline.conf b/dynamic-layers/openembedded-layer/recipes-devtools/android-tools/android-tools-adbd-cmdline/50-adbd-cmdline.conf new file mode 100644 index 0000000..b1613e0 --- /dev/null +++ b/dynamic-layers/openembedded-layer/recipes-devtools/android-tools/android-tools-adbd-cmdline/50-adbd-cmdline.conf @@ -0,0 +1,6 @@ +[Unit] +# Clear all conditions +ConditionPathExists= +# And start if kernel adbd argument is provided or if the file exists +ConditionPathExists=|/var/usb-debugging-enabled +ConditionKernelCommandLine=|adbd diff --git a/dynamic-layers/openembedded-layer/recipes-devtools/android-tools/android-tools-conf-configfs/qcom/android-gadget-setup.machine b/dynamic-layers/openembedded-layer/recipes-devtools/android-tools/android-tools-conf-configfs/qcom/android-gadget-setup.machine new file mode 100644 index 0000000..09ca8d5 --- /dev/null +++ b/dynamic-layers/openembedded-layer/recipes-devtools/android-tools/android-tools-conf-configfs/qcom/android-gadget-setup.machine @@ -0,0 +1,5 @@ +manufacturer=Qualcomm +model=`hostname` +androidserial="$(sed -n -e '/androidboot.serialno/ s/.*androidboot.serialno=\([^ ]*\).*/\1/gp ' /proc/cmdline)" +[ -n "$androidserial" ] && serial="$androidserial" +true diff --git a/dynamic-layers/openembedded-layer/recipes-devtools/android-tools/android-tools-conf-configfs_%.bbappend b/dynamic-layers/openembedded-layer/recipes-devtools/android-tools/android-tools-conf-configfs_%.bbappend new file mode 100644 index 0000000..124e8b8 --- /dev/null +++ b/dynamic-layers/openembedded-layer/recipes-devtools/android-tools/android-tools-conf-configfs_%.bbappend @@ -0,0 +1,5 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:" + +SRC_URI:append:qcom = " \ + file://android-gadget-setup.machine \ +" diff --git a/dynamic-layers/openembedded-layer/recipes-navigation/gpsd/gpsd/0001-Introduce-Qualcomm-PDS-service-support.patch b/dynamic-layers/openembedded-layer/recipes-navigation/gpsd/gpsd-3.23.1/0001-Introduce-Qualcomm-PDS-service-support.patch index 9709932..6df450b 100644 --- a/dynamic-layers/openembedded-layer/recipes-navigation/gpsd/gpsd/0001-Introduce-Qualcomm-PDS-service-support.patch +++ b/dynamic-layers/openembedded-layer/recipes-navigation/gpsd/gpsd-3.23.1/0001-Introduce-Qualcomm-PDS-service-support.patch @@ -1,4 +1,4 @@ -From 3f46e63ff08afba0ad532d4cac1957499769dc69 Mon Sep 17 00:00:00 2001 +From 0f0a1495b3b2ae9da09ea1a05510492bae05a928 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson <bjorn.andersson@linaro.org> Date: Wed, 4 Apr 2018 04:29:09 +0000 Subject: [PATCH] Introduce Qualcomm PDS service support @@ -33,33 +33,35 @@ string "any". Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: AnÃbal Limón <anibal.limon@linaro.org> --- - SConstruct | 10 ++ - driver_pds.c | 325 +++++++++++++++++++++++++++++++++++++++++++++++++ - driver_pds.h | 20 +++ - drivers.c | 5 + - gpsd.h | 2 + - libgpsd_core.c | 15 ++- - 6 files changed, 376 insertions(+), 1 deletion(-) - create mode 100644 driver_pds.c - create mode 100644 driver_pds.h + SConscript | 11 ++ + drivers/driver_pds.c | 406 +++++++++++++++++++++++++++++++++++++++++++ + drivers/drivers.c | 5 + + gpsd/libgpsd_core.c | 16 +- + include/driver_pds.h | 20 +++ + include/gpsd.h | 9 + + man/gpsd.adoc | 8 + + 7 files changed, 474 insertions(+), 1 deletion(-) + create mode 100644 drivers/driver_pds.c + create mode 100644 include/driver_pds.h -diff --git a/SConstruct b/SConstruct -index 33e0ff326..d4ae81979 100644 ---- a/SConstruct -+++ b/SConstruct -@@ -192,6 +192,7 @@ boolopts = ( +diff --git a/SConscript b/SConscript +index e3fed4c27..cae23de9c 100644 +--- a/SConscript ++++ b/SConscript +@@ -315,6 +315,8 @@ boolopts = ( ("tripmate", True, "DeLorme TripMate support"), ("tsip", True, "Trimble TSIP support"), ("ublox", True, "u-blox Protocol support"), -+ ("pds", True, "Qualcomm PDS support"), ++ ("pds", sys.platform.startswith('linux'), ++ "Qualcomm PDS support"), # Non-GPS protocols ("aivdm", True, "AIVDM support"), ("gpsclock", True, "GPSClock support"), -@@ -977,6 +978,14 @@ else: +@@ -1156,6 +1158,14 @@ if not cleaning and not helping: announce("You do not have kernel CANbus available.") config.env["nmea2000"] = False -+ if config.CheckHeader(["bits/sockaddr.h", "linux/qrtr.h"]): ++ if config.CheckHeader(["linux/qrtr.h"]): + confdefs.append("#define HAVE_LINUX_QRTR_H 1\n") + announce("You have kernel QRTR available.") + else: @@ -70,35 +72,47 @@ index 33e0ff326..d4ae81979 100644 # check for C11 or better, and __STDC__NO_ATOMICS__ is not defined # before looking for stdatomic.h if ((config.CheckC11() and -@@ -1407,6 +1416,7 @@ libgpsd_sources = [ - "driver_nmea0183.c", - "driver_nmea2000.c", - "driver_oncore.c", -+ "driver_pds.c", - "driver_rtcm2.c", - "driver_rtcm3.c", - "drivers.c", -diff --git a/driver_pds.c b/driver_pds.c +@@ -1684,6 +1694,7 @@ libgpsd_sources = [ + "drivers/driver_nmea0183.c", + "drivers/driver_nmea2000.c", + "drivers/driver_oncore.c", ++ "drivers/driver_pds.c", + "drivers/driver_rtcm2.c", + "drivers/driver_rtcm3.c", + "drivers/drivers.c", +diff --git a/drivers/driver_pds.c b/drivers/driver_pds.c new file mode 100644 -index 000000000..734b40f83 +index 000000000..2ac77ec17 --- /dev/null -+++ b/driver_pds.c -@@ -0,0 +1,325 @@ ++++ b/drivers/driver_pds.c +@@ -0,0 +1,406 @@ ++/* ++ * Qualcomm PDS Interface driver. ++ * ++ * Tested in Dragonboard410c (APQ8016) PDS service. ++ * ++ * This file is Copyright 2020 by Linaro Limited ++ * SPDX-License-Identifier: BSD-2-clause ++ */ ++ ++#include "../include/gpsd_config.h" /* must be before all includes */ ++ +#include <sys/socket.h> +#include <errno.h> +#include <fcntl.h> +#include <stdlib.h> +#include <unistd.h> -+#include "gpsd.h" -+#include "libgps.h" ++#include "../include/gpsd.h" + +#if defined(PDS_ENABLE) -+#include "driver_pds.h" ++#include "../include/driver_pds.h" + +#include <linux/qrtr.h> + ++#define QMI_PDS_MAX 16 +#define QMI_PDS_SERVICE_ID 0x10 +#define QMI_PDS_VERSION 0x2 ++#define QMI_PDS_PATH_STARTS 6 + +struct qmi_header { + uint8_t type; @@ -113,6 +127,8 @@ index 000000000..734b40f83 + uint8_t value[]; +} __attribute__((__packed__)); + ++static struct gps_device_t *pds_devices[QMI_PDS_MAX]; ++ +#define QMI_REQUEST 0 +#define QMI_INDICATION 4 + @@ -127,7 +143,84 @@ index 000000000..734b40f83 +#define QMI_LOC_EVENT_NMEA 0x26 +#define QMI_TLV_NMEA 1 + -+static ssize_t qmi_pds_get(struct gps_device_t *session) ++static ssize_t qmi_pds_connect(struct gps_device_t *session) ++{ ++ struct sockaddr_qrtr sq; ++ socklen_t sl = sizeof(sq); ++ struct qrtr_ctrl_pkt pkt; ++ char *hostname; ++ char *endptr; ++ int ret; ++ ++ session->lexer.outbuflen = 0; ++ ++ hostname = session->gpsdata.dev.path + QMI_PDS_PATH_STARTS; ++ if (!strcmp(hostname, "any")) { ++ session->driver.pds.hostid = -1; ++ } else { ++ session->driver.pds.hostid = (int)strtol(hostname, &endptr, 10); ++ if (endptr == hostname) { ++ GPSD_LOG(LOG_ERROR, &session->context->errout, ++ "QRTR open: Invalid node id.\n"); ++ return -1; ++ } ++ } ++ ++ ret = recvfrom(session->gpsdata.gps_fd, &pkt, sizeof(pkt), 0, ++ (struct sockaddr *)&sq, &sl); ++ if (ret < 0) { ++ GPSD_LOG(LOG_ERROR, &session->context->errout, ++ "QRTR connect: Unable to receive lookup request.\n"); ++ return -1; ++ } ++ ++ if (sl != sizeof(sq) || sq.sq_port != QRTR_PORT_CTRL) { ++ GPSD_LOG(LOG_INFO, &session->context->errout, ++ "QRTR connect: Received message is not ctrl message, ignoring.\n"); ++ return 1; ++ } ++ ++ if (pkt.cmd != QRTR_TYPE_NEW_SERVER) ++ return 1; ++ ++ /* All fields zero indicates end of lookup response */ ++ if (!pkt.server.service && !pkt.server.instance && ++ !pkt.server.node && !pkt.server.port) { ++ GPSD_LOG(LOG_ERROR, &session->context->errout, ++ "QRTR connect: End of lookup, No PDS service found for %s.\n", ++ session->gpsdata.dev.path); ++ return -1; ++ } ++ ++ /* Filter results based on specified node */ ++ if (session->driver.pds.hostid != -1 && ++ session->driver.pds.hostid != (int)pkt.server.node) ++ return 1; ++ ++ session->driver.pds.pds_node = pkt.server.node; ++ session->driver.pds.pds_port = pkt.server.port; ++ ++ GPSD_LOG(LOG_INF, &session->context->errout, ++ "QRTR open: Found PDS at %d %d.\n", ++ session->driver.pds.pds_node, ++ session->driver.pds.pds_port); ++ ++ sq.sq_family = AF_QIPCRTR; ++ sq.sq_node = session->driver.pds.pds_node; ++ sq.sq_port = session->driver.pds.pds_port; ++ ret = connect(session->gpsdata.gps_fd, (struct sockaddr *)&sq, sizeof(sq)); ++ if (ret < 0) { ++ GPSD_LOG(LOG_ERROR, &session->context->errout, ++ "QRTR connect: Failed to connect socket to PDS Service.\n"); ++ return -1; ++ } ++ ++ session->driver.pds.ready = 1; ++ session->device_type->event_hook(session, event_reactivate); ++ return 1; ++} ++ ++static ssize_t qmi_pds_get_packet(struct gps_device_t *session) +{ + struct sockaddr_qrtr sq; + socklen_t sl = sizeof(sq); @@ -151,8 +244,6 @@ index 000000000..734b40f83 + + /* TODO: Validate sq to be our peer */ + -+ session->lexer.type = QMI_PDS_PACKET; -+ + hdr = buf; + if (hdr->type != QMI_INDICATION || + hdr->msg != QMI_LOC_EVENT_NMEA) { @@ -169,6 +260,7 @@ index 000000000..734b40f83 + + if (tlv->key == QMI_TLV_NMEA) { + memcpy(session->lexer.outbuffer, tlv->value, tlv->len); ++ session->lexer.type = NMEA_PACKET; + session->lexer.outbuffer[tlv->len] = 0; + session->lexer.outbuflen = tlv->len; + break; @@ -180,9 +272,12 @@ index 000000000..734b40f83 + return ret; +} + -+static gps_mask_t qmi_pds_parse_input(struct gps_device_t *session) ++static ssize_t qmi_pds_get(struct gps_device_t *session) +{ -+ return nmea_parse((char *)session->lexer.outbuffer, session); ++ if (!session->driver.pds.ready) ++ return qmi_pds_connect(session); ++ else ++ return qmi_pds_get_packet(session); +} + +static void qmi_pds_event_hook(struct gps_device_t *session, event_t event) @@ -197,6 +292,9 @@ index 000000000..734b40f83 + + switch (event) { + case event_deactivate: ++ if (!session->driver.pds.ready) ++ return; ++ + ptr = buf; + hdr = (struct qmi_header *)ptr; + hdr->type = QMI_REQUEST; @@ -219,6 +317,9 @@ index 000000000..734b40f83 + } + break; + case event_reactivate: ++ if (!session->driver.pds.ready) ++ return; ++ + ptr = buf; + hdr = (struct qmi_header *)ptr; + hdr->type = QMI_REQUEST; @@ -266,40 +367,67 @@ index 000000000..734b40f83 + } +} + ++static ssize_t qmi_control_send(struct gps_device_t *session, ++ char *buf, size_t buflen) ++{ ++ /* do not write if -b (readonly) option set */ ++ if (session->context->readonly) ++ return true; ++ ++ session->msgbuflen = buflen; ++ (void)memcpy(session->msgbuf, buf, buflen); ++ return gpsd_write(session, session->msgbuf, session->msgbuflen); ++} ++ +int qmi_pds_open(struct gps_device_t *session) +{ + struct sockaddr_qrtr sq_ctrl; -+ struct qrtr_ctrl_pkt pkt; -+ struct sockaddr_qrtr sq; -+ unsigned int pds_node = 0; -+ unsigned int pds_port = 0; + socklen_t sl = sizeof(sq_ctrl); -+ char *hostname; -+ char *endptr; -+ int hostid; ++ struct qrtr_ctrl_pkt pkt; + int flags; + int sock; + int ret; ++ int i; + -+ hostname = session->gpsdata.dev.path + 6; -+ if (!strcmp(hostname, "any")) { -+ hostid = -1; -+ } else { -+ hostid = (int)strtol(hostname, &endptr, 10); -+ if (endptr == hostname) { ++ if (session->gpsdata.dev.path == NULL || ++ strlen(session->gpsdata.dev.path) < QMI_PDS_PATH_STARTS) { ++ GPSD_LOG(LOG_ERROR, &session->context->errout, ++ "QRTR open: Invalid PDS path.\n"); ++ return -1; ++ } ++ ++ for (i = 0; i < QMI_PDS_MAX; i++) { ++ if (pds_devices[i] == NULL) ++ continue; ++ ++ if (strcmp(pds_devices[i]->gpsdata.dev.path, ++ session->gpsdata.dev.path) == 0) { + GPSD_LOG(LOG_ERROR, &session->context->errout, -+ "QRTR open: Invalid node id.\n"); ++ "QRTR open: Invalid PDS path already specified.\n"); + return -1; + } + } + ++ for (i = 0; i < QMI_PDS_MAX; i++) { ++ if (pds_devices[i] == NULL) ++ break; ++ } ++ if (i == QMI_PDS_MAX) { ++ GPSD_LOG(LOG_ERROR, &session->context->errout, ++ "QRTR open: Limit of PDS devices reached.\n"); ++ return -1; ++ } ++ pds_devices[i] = session; + + sock = socket(AF_QIPCRTR, SOCK_DGRAM, 0); -+ if (sock < 0) { ++ if (BAD_SOCKET(sock)) { + GPSD_LOG(LOG_ERROR, &session->context->errout, + "QRTR open: Unable to get QRTR socket.\n"); + return -1; + } ++ flags = fcntl(sock, F_GETFL, 0); ++ flags |= O_NONBLOCK; ++ fcntl(sock, F_SETFL, flags); + + ret = getsockname(sock, (struct sockaddr *)&sq_ctrl, &sl); + if (ret < 0 || sq_ctrl.sq_family != AF_QIPCRTR || sl != sizeof(sq_ctrl)) { @@ -323,123 +451,52 @@ index 000000000..734b40f83 + return -1; + } + -+ for (;;) { -+ sl = sizeof(sq); -+ -+ ret = recvfrom(sock, &pkt, sizeof(pkt), 0, (struct sockaddr *)&sq, &sl); -+ if (ret < 0) { -+ GPSD_LOG(LOG_ERROR, &session->context->errout, -+ "QRTR open: Unable to receive lookup request.\n"); -+ close(sock); -+ return -1; -+ } -+ -+ if (sl != sizeof(sq) || sq.sq_node != sq_ctrl.sq_node || -+ sq.sq_port != sq_ctrl.sq_port) { -+ GPSD_LOG(LOG_ERROR, &session->context->errout, -+ "QRTR open: Received message is not ctrl message, ignoring.\n"); -+ continue; -+ } -+ -+ if (pkt.cmd != QRTR_TYPE_NEW_SERVER) -+ continue; -+ -+ /* All fields zero indicates end of lookup response */ -+ if (!pkt.server.service && !pkt.server.instance && -+ !pkt.server.node && !pkt.server.port) -+ break; -+ -+ /* Filter results based on specified node */ -+ if (hostid != -1 && hostid != (int)pkt.server.node) -+ continue; -+ -+ pds_node = pkt.server.node; -+ pds_port = pkt.server.port; -+ } -+ -+ if (!pds_node && !pds_port) { -+ GPSD_LOG(LOG_ERROR, &session->context->errout, -+ "QRTR open: No PDS service found.\n"); -+ close(sock); -+ return -1; -+ } -+ -+ flags = fcntl(sock, F_GETFL, 0); -+ flags |= O_NONBLOCK; -+ fcntl(sock, F_SETFL, flags); -+ -+ GPSD_LOG(LOG_INF, &session->context->errout, -+ "QRTR open: Found PDS at %d %d.\n", pds_node, pds_port); -+ -+ sq.sq_family = AF_QIPCRTR; -+ sq.sq_node = pds_node; -+ sq.sq_port = pds_port; -+ ret = connect(sock, (struct sockaddr *)&sq, sizeof(sq)); -+ if (ret < 0) { -+ GPSD_LOG(LOG_ERROR, &session->context->errout, -+ "QRTR open: Failed to connect socket.\n"); -+ close(sock); -+ return -1; -+ } -+ + gpsd_switch_driver(session, "Qualcomm PDS"); + session->gpsdata.gps_fd = sock; -+ session->sourcetype = source_qrtr; -+ session->servicetype = service_sensor; ++ session->sourcetype = SOURCE_QRTR; ++ session->servicetype = SERVICE_SENSOR; + + return session->gpsdata.gps_fd; +} + +void qmi_pds_close(struct gps_device_t *session) +{ ++ int i; ++ + if (!BAD_SOCKET(session->gpsdata.gps_fd)) { + close(session->gpsdata.gps_fd); + INVALIDATE_SOCKET(session->gpsdata.gps_fd); + } ++ ++ for (i = 0; i < QMI_PDS_MAX; i++) { ++ if (pds_devices[i] == NULL) ++ continue; ++ ++ if (strcmp(pds_devices[i]->gpsdata.dev.path, ++ session->gpsdata.dev.path) == 0) { ++ pds_devices[i] = NULL; ++ break; ++ } ++ } +} + +const struct gps_type_t driver_pds = { + .type_name = "Qualcomm PDS", /* full name of type */ -+ .packet_type = QMI_PDS_PACKET, /* associated lexer packet type */ ++ .packet_type = NMEA_PACKET, /* associated lexer packet type */ + .flags = DRIVER_STICKY, /* remember this */ + .channels = 12, /* not an actual GPS at all */ + .get_packet = qmi_pds_get, /* how to get a packet */ -+ .parse_packet = qmi_pds_parse_input, /* how to interpret a packet */ ++ .parse_packet = generic_parse_input, /* how to interpret a packet */ + .event_hook = qmi_pds_event_hook, ++ .control_send = qmi_control_send, +}; + +#endif /* of defined(PDS_ENABLE) */ -diff --git a/driver_pds.h b/driver_pds.h -new file mode 100644 -index 000000000..3b373743d ---- /dev/null -+++ b/driver_pds.h -@@ -0,0 +1,20 @@ -+/* -+ * PDS on QRTR. -+ * -+ * The entry points for driver_pds -+ * -+ * This file is Copyright (c) 2018 by the GPSD project -+ * SPDX-License-Identifier: BSD-2-clause -+ */ -+ -+#ifndef _DRIVER_PDS_H_ -+#define _DRIVER_PDS_H_ -+ -+#if defined(PDS_ENABLE) -+ -+int qmi_pds_open(struct gps_device_t *session); -+ -+void qmi_pds_close(struct gps_device_t *session); -+ -+#endif /* of defined(PDS_ENABLE) */ -+#endif /* of ifndef _DRIVER_PDS_H_ */ -diff --git a/drivers.c b/drivers.c -index 39e3d0a4c..7d788e1ab 100644 ---- a/drivers.c -+++ b/drivers.c -@@ -1747,6 +1747,7 @@ extern const struct gps_type_t driver_greis; +diff --git a/drivers/drivers.c b/drivers/drivers.c +index 5c7c67b30..47a292423 100644 +--- a/drivers/drivers.c ++++ b/drivers/drivers.c +@@ -1694,6 +1694,7 @@ extern const struct gps_type_t driver_greis; extern const struct gps_type_t driver_italk; extern const struct gps_type_t driver_navcom; extern const struct gps_type_t driver_nmea2000; @@ -447,7 +504,7 @@ index 39e3d0a4c..7d788e1ab 100644 extern const struct gps_type_t driver_oncore; extern const struct gps_type_t driver_sirf; extern const struct gps_type_t driver_skytraq; -@@ -1844,6 +1845,10 @@ static const struct gps_type_t *gpsd_driver_array[] = { +@@ -1787,6 +1788,10 @@ static const struct gps_type_t *gpsd_driver_array[] = { &driver_nmea2000, #endif /* NMEA2000_ENABLE */ @@ -458,73 +515,126 @@ index 39e3d0a4c..7d788e1ab 100644 #ifdef RTCM104V2_ENABLE &driver_rtcm104v2, #endif /* RTCM104V2_ENABLE */ -diff --git a/gpsd.h b/gpsd.h -index 57e4b0553..e9f61cc71 100644 ---- a/gpsd.h -+++ b/gpsd.h -@@ -209,6 +209,7 @@ struct gps_lexer_t { - #define GEOSTAR_PACKET 14 - #define NMEA2000_PACKET 15 - #define GREIS_PACKET 16 -+#define QMI_PDS_PACKET 16 - #define MAX_GPSPACKET_TYPE 16 /* increment this as necessary */ - #define RTCM2_PACKET 17 - #define RTCM3_PACKET 18 -@@ -447,6 +448,7 @@ typedef enum {source_unknown, - source_usb, /* potential GPS source, discoverable */ - source_bluetooth, /* potential GPS source, discoverable */ - source_can, /* potential GPS source, fixed CAN format */ -+ source_qrtr, /* potential GPS source, discoverable */ - source_pty, /* PTY: we don't require exclusive access */ - source_tcp, /* TCP/IP stream: case detected but not used */ - source_udp, /* UDP stream: case detected but not used */ -diff --git a/libgpsd_core.c b/libgpsd_core.c -index 52bf8e5ae..a8a2ec0d3 100644 ---- a/libgpsd_core.c -+++ b/libgpsd_core.c +diff --git a/gpsd/libgpsd_core.c b/gpsd/libgpsd_core.c +index 60a7c2e2f..ceebb1a2a 100644 +--- a/gpsd/libgpsd_core.c ++++ b/gpsd/libgpsd_core.c @@ -39,6 +39,9 @@ #if defined(NMEA2000_ENABLE) - #include "driver_nmea2000.h" + #include "../include/driver_nmea2000.h" #endif /* defined(NMEA2000_ENABLE) */ +#if defined(PDS_ENABLE) -+#include "driver_pds.h" ++#include "../include/driver_pds.h" +#endif /* defined(PDS_ENABLE) */ + // pass low-level data to devices straight through ssize_t gpsd_write(struct gps_device_t *session, - const char *buf, -@@ -351,6 +354,11 @@ void gpsd_deactivate(struct gps_device_t *session) - (void)nmea2000_close(session); - else - #endif /* of defined(NMEA2000_ENABLE) */ +@@ -358,6 +361,11 @@ void gpsd_deactivate(struct gps_device_t *session) + } else + #endif // of defined(NMEA2000_ENABLE) + { +#if defined(PDS_ENABLE) -+ if (session->sourcetype == source_qrtr) ++ if (SOURCE_QRTR == session->sourcetype) + (void)qmi_pds_close(session); + else +#endif /* of defined(PDS_ENABLE) */ (void)gpsd_close(session); - if (session->mode == O_OPTIMIZE) - gpsd_run_device_hook(&session->context->errout, -@@ -553,6 +561,11 @@ int gpsd_open(struct gps_device_t *session) - return nmea2000_open(session); } - #endif /* defined(NMEA2000_ENABLE) */ + if (O_OPTIMIZE == session->mode) { +@@ -629,6 +637,11 @@ int gpsd_open(struct gps_device_t *session) + #endif // defined(NMEA2000_ENABLE) + /* fall through to plain serial open. + * could be a naked /dev/ppsX */ +#if defined(PDS_ENABLE) + if (str_starts_with(session->gpsdata.dev.path, "pds://")) { + return qmi_pds_open(session); + } +#endif /* defined(PDS_ENABLE) */ - /* fall through to plain serial open */ - /* could be a naked /dev/ppsX */ return gpsd_serial_open(session); -@@ -581,7 +594,7 @@ int gpsd_activate(struct gps_device_t *session, const int mode) + } + +@@ -656,7 +669,8 @@ int gpsd_activate(struct gps_device_t *session, const int mode) #ifdef NON_NMEA0183_ENABLE - /* if it's a sensor, it must be probed */ - if ((session->servicetype == service_sensor) && -- (session->sourcetype != source_can)) { -+ (session->sourcetype != source_can && session->sourcetype != source_qrtr)) { - const struct gps_type_t **dp; + // if it's a sensor, it must be probed + if ((SERVICE_SENSOR == session->servicetype) && +- (SOURCE_CAN != session->sourcetype)) { ++ (SOURCE_CAN != session->sourcetype) && ++ (SOURCE_QRTR != session->sourcetype)) { + const struct gps_type_t **dp; + + for (dp = gpsd_drivers; *dp; dp++) { +diff --git a/include/driver_pds.h b/include/driver_pds.h +new file mode 100644 +index 000000000..3b373743d +--- /dev/null ++++ b/include/driver_pds.h +@@ -0,0 +1,20 @@ ++/* ++ * PDS on QRTR. ++ * ++ * The entry points for driver_pds ++ * ++ * This file is Copyright (c) 2018 by the GPSD project ++ * SPDX-License-Identifier: BSD-2-clause ++ */ ++ ++#ifndef _DRIVER_PDS_H_ ++#define _DRIVER_PDS_H_ ++ ++#if defined(PDS_ENABLE) ++ ++int qmi_pds_open(struct gps_device_t *session); ++ ++void qmi_pds_close(struct gps_device_t *session); ++ ++#endif /* of defined(PDS_ENABLE) */ ++#endif /* of ifndef _DRIVER_PDS_H_ */ +diff --git a/include/gpsd.h b/include/gpsd.h +index 110c5601f..b55f1913c 100644 +--- a/include/gpsd.h ++++ b/include/gpsd.h +@@ -464,6 +464,7 @@ typedef enum {SOURCE_UNKNOWN, + SOURCE_USB, // potential GPS source, discoverable + SOURCE_BLUETOOTH, // potential GPS source, discoverable + SOURCE_CAN, // potential GPS source, fixed CAN format ++ SOURCE_QRTR, // potential GPS source, discoverable + SOURCE_PTY, // PTY: we don't require exclusive access + SOURCE_TCP, // TCP/IP stream: case detected but not used + SOURCE_UDP, // UDP stream: case detected but not used +@@ -800,6 +801,14 @@ struct gps_device_t { + char ais_channel; + } aivdm; + #endif /* AIVDM_ENABLE */ ++#ifdef PDS_ENABLE ++ struct { ++ int ready; ++ int hostid; ++ unsigned int pds_node; ++ unsigned int pds_port; ++ } pds; ++#endif /* PDS_ENABLE */ + } driver; + + /* +diff --git a/man/gpsd.adoc b/man/gpsd.adoc +index 348c6b2b0..61013a8c3 100644 +--- a/man/gpsd.adoc ++++ b/man/gpsd.adoc +@@ -242,6 +242,14 @@ NMEA2000 CAN data:: + there is more than one unit on the CAN bus that provides GPS data, + *gpsd* chooses the unit from which a GPS message is first seen. Example: + *nmea2000://can0*. ++PDS service data:: ++ URI with the prefix "pds://", followed by "any" or host id ++ a numerical identifier of the PDS node. Only Linux socket PDS interfaces ++ are supported. The daemon will open a AF_QIPCRTR socket sending/listening for ++ UDP datagrams arriving in form of the QRTR encoded messages for setup and after ++ QMI encoded messages containing GPS NMEA data. ++ If "any" is send the PDS driver chooses the first PDS service ++ found. Example: *pds://any* or *pds://0*. - for (dp = gpsd_drivers; *dp; dp++) { + (The "ais:://" source type supported in some older versions of the + daemon has been retired in favor of the more general "tcp://".) -- -2.27.0.rc0 +2.33.0 diff --git a/dynamic-layers/openembedded-layer/recipes-navigation/gpsd/gpsd-3.24/0001-Introduce-Qualcomm-PDS-service-support.patch b/dynamic-layers/openembedded-layer/recipes-navigation/gpsd/gpsd-3.24/0001-Introduce-Qualcomm-PDS-service-support.patch new file mode 100644 index 0000000..639e84a --- /dev/null +++ b/dynamic-layers/openembedded-layer/recipes-navigation/gpsd/gpsd-3.24/0001-Introduce-Qualcomm-PDS-service-support.patch @@ -0,0 +1,640 @@ +From 0f0a1495b3b2ae9da09ea1a05510492bae05a928 Mon Sep 17 00:00:00 2001 +From: Bjorn Andersson <bjorn.andersson@linaro.org> +Date: Wed, 4 Apr 2018 04:29:09 +0000 +Subject: [PATCH] Introduce Qualcomm PDS service support +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The Qualcomm PDS service provides location data on a wide range of +Qualcomm platforms. It used QMI encoded messages sent over a shared +memory link, implemented in Linux as AF_QIPCRTR. + +A special service is available on port -2 on the local node in the +network, which provides functionality to the node address and port of +registered services by id. As the driver is opened this mechanism is +used to search for a registered PDS service in the system. + +As the PDS driver is activated two messages are sent to the PDS service, +the first one configures which events the service will send to the +client (in our case NMEA reports) and the second starts the transmission +of these packets. Similarly when the driver is deactivated a stop +request is sent to the service. + +Between the start and stop request the PDS service will send NMEA +messages to the PDS client at a rate of 1 Hz, the NMEA string is +extracted from the QMI encoded message and handed to the nmea_parse() +function. + +The PDS driver is selected by the url pds://<host>, where host is either +a numerical identifier of the node in the AF_QIPCRTR network or the +string "any". + +Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> +Signed-off-by: AnÃbal Limón <anibal.limon@linaro.org> +--- + SConscript | 11 ++ + drivers/driver_pds.c | 406 +++++++++++++++++++++++++++++++++++++++++++ + drivers/drivers.c | 5 + + gpsd/libgpsd_core.c | 16 +- + include/driver_pds.h | 20 +++ + include/gpsd.h | 9 + + man/gpsd.adoc | 8 + + 7 files changed, 474 insertions(+), 1 deletion(-) + create mode 100644 drivers/driver_pds.c + create mode 100644 include/driver_pds.h + +diff --git a/SConscript b/SConscript +index e3fed4c27..cae23de9c 100644 +--- a/SConscript ++++ b/SConscript +@@ -315,6 +315,8 @@ boolopts = ( + ("tripmate", True, "DeLorme TripMate support"), + ("tsip", True, "Trimble TSIP support"), + ("ublox", True, "u-blox Protocol support"), ++ ("pds", sys.platform.startswith('linux'), ++ "Qualcomm PDS support"), + # Non-GPS protocols + ("aivdm", True, "AIVDM support"), + ("gpsclock", True, "Furuno GPSClock support"), +@@ -1156,6 +1158,14 @@ if not cleaning and not helping: + announce("You do not have kernel CANbus available.") + config.env["nmea2000"] = False + ++ if config.CheckHeader(["linux/qrtr.h"]): ++ confdefs.append("#define HAVE_LINUX_QRTR_H 1\n") ++ announce("You have kernel QRTR available.") ++ else: ++ confdefs.append("/* #undef HAVE_LINUX_QRTR_H */\n") ++ announce("You do not have kernel QRTR available.") ++ env["pds"] = False ++ + # check for C11 or better, and __STDC__NO_ATOMICS__ is not defined + # before looking for stdatomic.h + if ((config.CheckC11() and +@@ -1684,6 +1694,7 @@ libgpsd_sources = [ + "drivers/driver_nmea0183.c", + "drivers/driver_nmea2000.c", + "drivers/driver_oncore.c", ++ "drivers/driver_pds.c", + "drivers/driver_rtcm2.c", + "drivers/driver_rtcm3.c", + "drivers/drivers.c", +diff --git a/drivers/driver_pds.c b/drivers/driver_pds.c +new file mode 100644 +index 000000000..2ac77ec17 +--- /dev/null ++++ b/drivers/driver_pds.c +@@ -0,0 +1,406 @@ ++/* ++ * Qualcomm PDS Interface driver. ++ * ++ * Tested in Dragonboard410c (APQ8016) PDS service. ++ * ++ * This file is Copyright 2020 by Linaro Limited ++ * SPDX-License-Identifier: BSD-2-clause ++ */ ++ ++#include "../include/gpsd_config.h" /* must be before all includes */ ++ ++#include <sys/socket.h> ++#include <errno.h> ++#include <fcntl.h> ++#include <stdlib.h> ++#include <unistd.h> ++#include "../include/gpsd.h" ++ ++#if defined(PDS_ENABLE) ++#include "../include/driver_pds.h" ++ ++#include <linux/qrtr.h> ++ ++#define QMI_PDS_MAX 16 ++#define QMI_PDS_SERVICE_ID 0x10 ++#define QMI_PDS_VERSION 0x2 ++#define QMI_PDS_PATH_STARTS 6 ++ ++struct qmi_header { ++ uint8_t type; ++ uint16_t txn; ++ uint16_t msg; ++ uint16_t len; ++} __attribute__((__packed__)); ++ ++struct qmi_tlv { ++ uint8_t key; ++ uint16_t len; ++ uint8_t value[]; ++} __attribute__((__packed__)); ++ ++static struct gps_device_t *pds_devices[QMI_PDS_MAX]; ++ ++#define QMI_REQUEST 0 ++#define QMI_INDICATION 4 ++ ++#define QMI_LOC_REG_EVENTS 0x21 ++#define QMI_TLV_EVENT_MASK 1 ++#define QMI_EVENT_MASK_NMEA 4 ++ ++#define QMI_LOC_START 0x22 ++#define QMI_LOC_STOP 0x23 ++#define QMI_TLV_SESSION_ID 1 ++ ++#define QMI_LOC_EVENT_NMEA 0x26 ++#define QMI_TLV_NMEA 1 ++ ++static ssize_t qmi_pds_connect(struct gps_device_t *session) ++{ ++ struct sockaddr_qrtr sq; ++ socklen_t sl = sizeof(sq); ++ struct qrtr_ctrl_pkt pkt; ++ char *hostname; ++ char *endptr; ++ int ret; ++ ++ session->lexer.outbuflen = 0; ++ ++ hostname = session->gpsdata.dev.path + QMI_PDS_PATH_STARTS; ++ if (!strcmp(hostname, "any")) { ++ session->driver.pds.hostid = -1; ++ } else { ++ session->driver.pds.hostid = (int)strtol(hostname, &endptr, 10); ++ if (endptr == hostname) { ++ GPSD_LOG(LOG_ERROR, &session->context->errout, ++ "QRTR open: Invalid node id.\n"); ++ return -1; ++ } ++ } ++ ++ ret = recvfrom(session->gpsdata.gps_fd, &pkt, sizeof(pkt), 0, ++ (struct sockaddr *)&sq, &sl); ++ if (ret < 0) { ++ GPSD_LOG(LOG_ERROR, &session->context->errout, ++ "QRTR connect: Unable to receive lookup request.\n"); ++ return -1; ++ } ++ ++ if (sl != sizeof(sq) || sq.sq_port != QRTR_PORT_CTRL) { ++ GPSD_LOG(LOG_INFO, &session->context->errout, ++ "QRTR connect: Received message is not ctrl message, ignoring.\n"); ++ return 1; ++ } ++ ++ if (pkt.cmd != QRTR_TYPE_NEW_SERVER) ++ return 1; ++ ++ /* All fields zero indicates end of lookup response */ ++ if (!pkt.server.service && !pkt.server.instance && ++ !pkt.server.node && !pkt.server.port) { ++ GPSD_LOG(LOG_ERROR, &session->context->errout, ++ "QRTR connect: End of lookup, No PDS service found for %s.\n", ++ session->gpsdata.dev.path); ++ return -1; ++ } ++ ++ /* Filter results based on specified node */ ++ if (session->driver.pds.hostid != -1 && ++ session->driver.pds.hostid != (int)pkt.server.node) ++ return 1; ++ ++ session->driver.pds.pds_node = pkt.server.node; ++ session->driver.pds.pds_port = pkt.server.port; ++ ++ GPSD_LOG(LOG_INF, &session->context->errout, ++ "QRTR open: Found PDS at %d %d.\n", ++ session->driver.pds.pds_node, ++ session->driver.pds.pds_port); ++ ++ sq.sq_family = AF_QIPCRTR; ++ sq.sq_node = session->driver.pds.pds_node; ++ sq.sq_port = session->driver.pds.pds_port; ++ ret = connect(session->gpsdata.gps_fd, (struct sockaddr *)&sq, sizeof(sq)); ++ if (ret < 0) { ++ GPSD_LOG(LOG_ERROR, &session->context->errout, ++ "QRTR connect: Failed to connect socket to PDS Service.\n"); ++ return -1; ++ } ++ ++ session->driver.pds.ready = 1; ++ session->device_type->event_hook(session, event_reactivate); ++ return 1; ++} ++ ++static ssize_t qmi_pds_get_packet(struct gps_device_t *session) ++{ ++ struct sockaddr_qrtr sq; ++ socklen_t sl = sizeof(sq); ++ struct qmi_header *hdr; ++ struct qmi_tlv *tlv; ++ size_t buflen = sizeof(session->lexer.inbuffer); ++ size_t offset; ++ void *buf = session->lexer.inbuffer; ++ int ret; ++ ++ ret = recvfrom(session->gpsdata.gps_fd, buf, buflen, 0, ++ (struct sockaddr *)&sq, &sl); ++ if (ret < 0 && errno == EAGAIN) { ++ session->lexer.outbuflen = 0; ++ return 1; ++ } else if (ret < 0) { ++ GPSD_LOG(LOG_ERROR, &session->context->errout, ++ "QRTR get: Unable to receive packet.\n"); ++ return -1; ++ } ++ ++ /* TODO: Validate sq to be our peer */ ++ ++ hdr = buf; ++ if (hdr->type != QMI_INDICATION || ++ hdr->msg != QMI_LOC_EVENT_NMEA) { ++ session->lexer.outbuflen = 0; ++ return ret; ++ } ++ ++ offset = sizeof(*hdr); ++ while (offset < (size_t)ret) { ++ tlv = (struct qmi_tlv *)((char*)buf + offset); ++ ++ if (offset + sizeof(*tlv) + tlv->len > (size_t)ret) ++ break; ++ ++ if (tlv->key == QMI_TLV_NMEA) { ++ memcpy(session->lexer.outbuffer, tlv->value, tlv->len); ++ session->lexer.type = NMEA_PACKET; ++ session->lexer.outbuffer[tlv->len] = 0; ++ session->lexer.outbuflen = tlv->len; ++ break; ++ } ++ ++ offset += tlv->len; ++ } ++ ++ return ret; ++} ++ ++static ssize_t qmi_pds_get(struct gps_device_t *session) ++{ ++ if (!session->driver.pds.ready) ++ return qmi_pds_connect(session); ++ else ++ return qmi_pds_get_packet(session); ++} ++ ++static void qmi_pds_event_hook(struct gps_device_t *session, event_t event) ++{ ++ struct qmi_header *hdr; ++ struct qmi_tlv *tlv; ++ static int txn_id; ++ char buf[128]; ++ char *ptr; ++ int sock = session->gpsdata.gps_fd; ++ int ret; ++ ++ switch (event) { ++ case event_deactivate: ++ if (!session->driver.pds.ready) ++ return; ++ ++ ptr = buf; ++ hdr = (struct qmi_header *)ptr; ++ hdr->type = QMI_REQUEST; ++ hdr->txn = txn_id++; ++ hdr->msg = QMI_LOC_STOP; ++ hdr->len = sizeof(*tlv) + sizeof(uint8_t); ++ ptr += sizeof(*hdr); ++ ++ tlv = (struct qmi_tlv *)ptr; ++ tlv->key = QMI_TLV_SESSION_ID; ++ tlv->len = sizeof(uint8_t); ++ *(uint8_t*)tlv->value = 1; ++ ptr += sizeof(*tlv) + sizeof(uint8_t); ++ ++ ret = send(sock, buf, ptr - buf, 0); ++ if (ret < 0) { ++ GPSD_LOG(LOG_ERROR, &session->context->errout, ++ "QRTR event_hook: failed to send STOP request.\n"); ++ return; ++ } ++ break; ++ case event_reactivate: ++ if (!session->driver.pds.ready) ++ return; ++ ++ ptr = buf; ++ hdr = (struct qmi_header *)ptr; ++ hdr->type = QMI_REQUEST; ++ hdr->txn = txn_id++; ++ hdr->msg = QMI_LOC_REG_EVENTS; ++ hdr->len = sizeof(*tlv) + sizeof(uint64_t); ++ ptr += sizeof(*hdr); ++ ++ tlv = (struct qmi_tlv *)ptr; ++ tlv->key = QMI_TLV_EVENT_MASK; ++ tlv->len = sizeof(uint64_t); ++ *(uint64_t*)tlv->value = QMI_EVENT_MASK_NMEA; ++ ptr += sizeof(*tlv) + sizeof(uint64_t); ++ ++ ret = send(sock, buf, ptr - buf, 0); ++ if (ret < 0) { ++ GPSD_LOG(LOG_ERROR, &session->context->errout, ++ "QRTR event_hook: failed to send REG_EVENTS request.\n"); ++ return; ++ } ++ ++ ptr = buf; ++ hdr = (struct qmi_header *)ptr; ++ hdr->type = QMI_REQUEST; ++ hdr->txn = txn_id++; ++ hdr->msg = QMI_LOC_START; ++ hdr->len = sizeof(*tlv) + sizeof(uint8_t); ++ ptr += sizeof(*hdr); ++ ++ tlv = (struct qmi_tlv *)(buf + sizeof(*hdr)); ++ tlv->key = QMI_TLV_SESSION_ID; ++ tlv->len = sizeof(uint8_t); ++ *(uint8_t*)tlv->value = 1; ++ ptr += sizeof(*tlv) + sizeof(uint8_t); ++ ++ ret = send(sock, buf, ptr - buf, 0); ++ if (ret < 0) { ++ GPSD_LOG(LOG_ERROR, &session->context->errout, ++ "QRTR event_hook: failed to send START request.\n"); ++ return; ++ } ++ break; ++ default: ++ break; ++ } ++} ++ ++static ssize_t qmi_control_send(struct gps_device_t *session, ++ char *buf, size_t buflen) ++{ ++ /* do not write if -b (readonly) option set */ ++ if (session->context->readonly) ++ return true; ++ ++ session->msgbuflen = buflen; ++ (void)memcpy(session->msgbuf, buf, buflen); ++ return gpsd_write(session, session->msgbuf, session->msgbuflen); ++} ++ ++int qmi_pds_open(struct gps_device_t *session) ++{ ++ struct sockaddr_qrtr sq_ctrl; ++ socklen_t sl = sizeof(sq_ctrl); ++ struct qrtr_ctrl_pkt pkt; ++ int flags; ++ int sock; ++ int ret; ++ int i; ++ ++ if (session->gpsdata.dev.path == NULL || ++ strlen(session->gpsdata.dev.path) < QMI_PDS_PATH_STARTS) { ++ GPSD_LOG(LOG_ERROR, &session->context->errout, ++ "QRTR open: Invalid PDS path.\n"); ++ return -1; ++ } ++ ++ for (i = 0; i < QMI_PDS_MAX; i++) { ++ if (pds_devices[i] == NULL) ++ continue; ++ ++ if (strcmp(pds_devices[i]->gpsdata.dev.path, ++ session->gpsdata.dev.path) == 0) { ++ GPSD_LOG(LOG_ERROR, &session->context->errout, ++ "QRTR open: Invalid PDS path already specified.\n"); ++ return -1; ++ } ++ } ++ ++ for (i = 0; i < QMI_PDS_MAX; i++) { ++ if (pds_devices[i] == NULL) ++ break; ++ } ++ if (i == QMI_PDS_MAX) { ++ GPSD_LOG(LOG_ERROR, &session->context->errout, ++ "QRTR open: Limit of PDS devices reached.\n"); ++ return -1; ++ } ++ pds_devices[i] = session; ++ ++ sock = socket(AF_QIPCRTR, SOCK_DGRAM, 0); ++ if (BAD_SOCKET(sock)) { ++ GPSD_LOG(LOG_ERROR, &session->context->errout, ++ "QRTR open: Unable to get QRTR socket.\n"); ++ return -1; ++ } ++ flags = fcntl(sock, F_GETFL, 0); ++ flags |= O_NONBLOCK; ++ fcntl(sock, F_SETFL, flags); ++ ++ ret = getsockname(sock, (struct sockaddr *)&sq_ctrl, &sl); ++ if (ret < 0 || sq_ctrl.sq_family != AF_QIPCRTR || sl != sizeof(sq_ctrl)) { ++ GPSD_LOG(LOG_ERROR, &session->context->errout, ++ "QRTR open: Unable to acquire local address.\n"); ++ close(sock); ++ return -1; ++ } ++ ++ memset(&pkt, 0, sizeof(pkt)); ++ pkt.cmd = QRTR_TYPE_NEW_LOOKUP; ++ pkt.server.service = QMI_PDS_SERVICE_ID; ++ pkt.server.instance = QMI_PDS_VERSION; ++ ++ sq_ctrl.sq_port = QRTR_PORT_CTRL; ++ ret = sendto(sock, &pkt, sizeof(pkt), 0, (struct sockaddr *)&sq_ctrl, sizeof(sq_ctrl)); ++ if (ret < 0) { ++ GPSD_LOG(LOG_ERROR, &session->context->errout, ++ "QRTR open: Unable to send lookup request.\n"); ++ close(sock); ++ return -1; ++ } ++ ++ gpsd_switch_driver(session, "Qualcomm PDS"); ++ session->gpsdata.gps_fd = sock; ++ session->sourcetype = SOURCE_QRTR; ++ session->servicetype = SERVICE_SENSOR; ++ ++ return session->gpsdata.gps_fd; ++} ++ ++void qmi_pds_close(struct gps_device_t *session) ++{ ++ int i; ++ ++ if (!BAD_SOCKET(session->gpsdata.gps_fd)) { ++ close(session->gpsdata.gps_fd); ++ INVALIDATE_SOCKET(session->gpsdata.gps_fd); ++ } ++ ++ for (i = 0; i < QMI_PDS_MAX; i++) { ++ if (pds_devices[i] == NULL) ++ continue; ++ ++ if (strcmp(pds_devices[i]->gpsdata.dev.path, ++ session->gpsdata.dev.path) == 0) { ++ pds_devices[i] = NULL; ++ break; ++ } ++ } ++} ++ ++const struct gps_type_t driver_pds = { ++ .type_name = "Qualcomm PDS", /* full name of type */ ++ .packet_type = NMEA_PACKET, /* associated lexer packet type */ ++ .flags = DRIVER_STICKY, /* remember this */ ++ .channels = 12, /* not an actual GPS at all */ ++ .get_packet = qmi_pds_get, /* how to get a packet */ ++ .parse_packet = generic_parse_input, /* how to interpret a packet */ ++ .event_hook = qmi_pds_event_hook, ++ .control_send = qmi_control_send, ++}; ++ ++#endif /* of defined(PDS_ENABLE) */ +diff --git a/drivers/drivers.c b/drivers/drivers.c +index 5c7c67b30..47a292423 100644 +--- a/drivers/drivers.c ++++ b/drivers/drivers.c +@@ -1694,6 +1694,7 @@ extern const struct gps_type_t driver_greis; + extern const struct gps_type_t driver_italk; + extern const struct gps_type_t driver_navcom; + extern const struct gps_type_t driver_nmea2000; ++extern const struct gps_type_t driver_pds; + extern const struct gps_type_t driver_oncore; + extern const struct gps_type_t driver_sirf; + extern const struct gps_type_t driver_skytraq; +@@ -1787,6 +1788,10 @@ static const struct gps_type_t *gpsd_driver_array[] = { + &driver_nmea2000, + #endif // NMEA2000_ENABLE + ++#ifdef PDS_ENABLE ++ &driver_pds, ++#endif /* PDS_ENABLE */ ++ + #ifdef RTCM104V2_ENABLE + &driver_rtcm104v2, + #endif // RTCM104V2_ENABLE +diff --git a/gpsd/libgpsd_core.c b/gpsd/libgpsd_core.c +index 60a7c2e2f..ceebb1a2a 100644 +--- a/gpsd/libgpsd_core.c ++++ b/gpsd/libgpsd_core.c +@@ -39,6 +39,9 @@ + #if defined(NMEA2000_ENABLE) + #include "../include/driver_nmea2000.h" + #endif // defined(NMEA2000_ENABLE) ++#if defined(PDS_ENABLE) ++#include "../include/driver_pds.h" ++#endif /* defined(PDS_ENABLE) */ + + // pass low-level data to devices straight through + ssize_t gpsd_write(struct gps_device_t *session, +@@ -358,6 +361,11 @@ void gpsd_deactivate(struct gps_device_t *session) + (void)nmea2000_close(session); + } else + #endif // NMEA2000_ENABLE ++#if defined(PDS_ENABLE) ++ if (SOURCE_QRTR == session->sourcetype) ++ (void)qmi_pds_close(session); ++ else ++#endif /* of defined(PDS_ENABLE) */ + { + // could be serial, udp://, tcp://, etc. + gpsd_close(session); +@@ -629,6 +637,11 @@ int gpsd_open(struct gps_device_t *session) + #endif // defined(NMEA2000_ENABLE) + /* fall through to plain serial open. + * could be a naked /dev/ppsX */ ++#if defined(PDS_ENABLE) ++ if (str_starts_with(session->gpsdata.dev.path, "pds://")) { ++ return qmi_pds_open(session); ++ } ++#endif /* defined(PDS_ENABLE) */ + return gpsd_serial_open(session); + } + +@@ -656,7 +669,8 @@ int gpsd_activate(struct gps_device_t *session, const int mode) + #ifdef NON_NMEA0183_ENABLE + // if it's a sensor, it must be probed + if ((SERVICE_SENSOR == session->servicetype) && +- (SOURCE_CAN != session->sourcetype)) { ++ (SOURCE_CAN != session->sourcetype) && ++ (SOURCE_QRTR != session->sourcetype)) { + const struct gps_type_t **dp; + + for (dp = gpsd_drivers; *dp; dp++) { +diff --git a/include/driver_pds.h b/include/driver_pds.h +new file mode 100644 +index 000000000..3b373743d +--- /dev/null ++++ b/include/driver_pds.h +@@ -0,0 +1,20 @@ ++/* ++ * PDS on QRTR. ++ * ++ * The entry points for driver_pds ++ * ++ * This file is Copyright (c) 2018 by the GPSD project ++ * SPDX-License-Identifier: BSD-2-clause ++ */ ++ ++#ifndef _DRIVER_PDS_H_ ++#define _DRIVER_PDS_H_ ++ ++#if defined(PDS_ENABLE) ++ ++int qmi_pds_open(struct gps_device_t *session); ++ ++void qmi_pds_close(struct gps_device_t *session); ++ ++#endif /* of defined(PDS_ENABLE) */ ++#endif /* of ifndef _DRIVER_PDS_H_ */ +diff --git a/include/gpsd.h b/include/gpsd.h +index 110c5601f..b55f1913c 100644 +--- a/include/gpsd.h ++++ b/include/gpsd.h +@@ -464,6 +464,7 @@ typedef enum {SOURCE_UNKNOWN, + SOURCE_USB, // potential GPS source, discoverable + SOURCE_BLUETOOTH, // potential GPS source, discoverable + SOURCE_CAN, // potential GPS source, fixed CAN format ++ SOURCE_QRTR, // potential GPS source, discoverable + SOURCE_PTY, // PTY: we don't require exclusive access + SOURCE_TCP, // TCP/IP stream: case detected but not used + SOURCE_UDP, // UDP stream: case detected but not used +@@ -800,6 +801,14 @@ struct gps_device_t { + char ais_channel; + } aivdm; + #endif /* AIVDM_ENABLE */ ++#ifdef PDS_ENABLE ++ struct { ++ int ready; ++ int hostid; ++ unsigned int pds_node; ++ unsigned int pds_port; ++ } pds; ++#endif /* PDS_ENABLE */ + } driver; + + /* +diff --git a/man/gpsd.adoc b/man/gpsd.adoc +index 348c6b2b0..61013a8c3 100644 +--- a/man/gpsd.adoc ++++ b/man/gpsd.adoc +@@ -242,6 +242,14 @@ NMEA2000 CAN data:: + there is more than one unit on the CAN bus that provides GPS data, + *gpsd* chooses the unit from which a GPS message is first seen. Example: + *nmea2000://can0*. ++PDS service data:: ++ URI with the prefix "pds://", followed by "any" or host id ++ a numerical identifier of the PDS node. Only Linux socket PDS interfaces ++ are supported. The daemon will open a AF_QIPCRTR socket sending/listening for ++ UDP datagrams arriving in form of the QRTR encoded messages for setup and after ++ QMI encoded messages containing GPS NMEA data. ++ If "any" is send the PDS driver chooses the first PDS service ++ found. Example: *pds://any* or *pds://0*. + + (The "ais:://" source type supported in some older versions of the + daemon has been retired in favor of the more general "tcp://".) +-- +2.33.0 + diff --git a/dynamic-layers/openembedded-layer/recipes-navigation/gpsd/gpsd_%.bbappend b/dynamic-layers/openembedded-layer/recipes-navigation/gpsd/gpsd_%.bbappend index ec85ae2..5b3a849 100644 --- a/dynamic-layers/openembedded-layer/recipes-navigation/gpsd/gpsd_%.bbappend +++ b/dynamic-layers/openembedded-layer/recipes-navigation/gpsd/gpsd_%.bbappend @@ -1,4 +1,11 @@ -FILESEXTRAPATHS_prepend := "${THISDIR}/${BPN}:" +# We can not use PV here, it will be expanded too early (to the '%' value). +# Thus use a temporal variable which substituted later. Note the difference +# between immediate expansion (to get THISDIR) and regular expansion. +# +# The order of these assignments is also important + +FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}-${gpsPV}:${THISDIR}/${BPN}:" +gpsPV = "${PV}" SRC_URI += " \ file://0001-Introduce-Qualcomm-PDS-service-support.patch \ diff --git a/dynamic-layers/openembedded-layer/recipes-test/images/initramfs-test-image.bbappend b/dynamic-layers/openembedded-layer/recipes-test/images/initramfs-test-image.bbappend deleted file mode 100644 index 16f4e3c..0000000 --- a/dynamic-layers/openembedded-layer/recipes-test/images/initramfs-test-image.bbappend +++ /dev/null @@ -1,3 +0,0 @@ -PACKAGE_INSTALL += " \ - devmem2 \ -" diff --git a/recipes-bsp/firmware-nexus/firmware-qcom-nexus.inc b/recipes-bsp/firmware-nexus/firmware-qcom-nexus.inc new file mode 100644 index 0000000..892bf6d --- /dev/null +++ b/recipes-bsp/firmware-nexus/firmware-qcom-nexus.inc @@ -0,0 +1,28 @@ +LICENSE = "Proprietary" +LIC_FILES_CHKSUM = "file://license.txt;md5=0d238870f50c84250a14191d17aaf1d5" + +SRC_URI = "https://dl.google.com/dl/android/aosp/qcom-${FW_QCOM_NAME}-${AOSP_BUILD}-${CHECKSUM_qcom}.tgz;name=qcom" + +PV = "${AOSP_BUILD}" + +require recipes-bsp/firmware/firmware-qcom.inc + +DEPENDS += "pil-squasher-native" + +# extract the license file +do_extract() { + head -n 280 ${WORKDIR}/extract-qcom-${FW_QCOM_NAME}.sh | tail -n +16 > ${S}/license.txt + tail -n +315 ${WORKDIR}/extract-qcom-${FW_QCOM_NAME}.sh | tar xzfv - -C ${S} +} +addtask extract after do_unpack before do_patch + +do_compile() { + for fw in ${S}/vendor/qcom/${FW_QCOM_NAME}/proprietary/*.mdt ; do + pil-squasher ${B}/`basename $fw mdt`mbn $fw + done +} + +do_install() { + install -d ${D}${FW_QCOM_PATH} + install -m 0644 license.txt ${D}${FW_QCOM_PATH} +} diff --git a/recipes-bsp/firmware-nexus/firmware-qcom-nexus4.bb b/recipes-bsp/firmware-nexus/firmware-qcom-nexus4.bb new file mode 100644 index 0000000..58e7e3f --- /dev/null +++ b/recipes-bsp/firmware-nexus/firmware-qcom-nexus4.bb @@ -0,0 +1,33 @@ +DESCRIPTION = "QCOM Firmware for LGE Google Nexus 4" + +LICENSE = "Proprietary" +LIC_FILES_CHKSUM = "file://license.txt;md5=0d238870f50c84250a14191d17aaf1d5" + +FW_QCOM_NAME = "mako" +FW_QCOM_SUBDIR = "apq8064/LGE/${FW_QCOM_NAME}" +AOSP_BUILD = "lmy48t" +CHECKSUM_qcom = "8c489b7e" + +SRC_URI[qcom.sha256sum] = "d87a4e4958c5750818fd525c32c7b6a659cd8da7e0dd46d92c16ad8c5aa1bf68" + +require recipes-bsp/firmware-nexus/firmware-qcom-nexus.inc + +SRC_URI += "git://android.googlesource.com/device/lge/${FW_QCOM_NAME};protocol=https;branch=master;name=aosp" +SRCREV_aosp = "33f0114334f9304dd69a8dfac24bc7f3d195d3be" +PV:append = "+git${SRCPV}" + +RDEPENDS:${PN} += "linux-firmware-qcom-adreno-a3xx" + +do_install:append() { + install -d ${D}${FW_QCOM_PATH} + + install -m 0644 dsps.mbn ${D}${FW_QCOM_PATH} + install -m 0644 q6.mbn ${D}${FW_QCOM_PATH} + install -m 0644 vidc.mbn ${D}${FW_QCOM_PATH} + install -m 0644 wcnss.mbn ${D}${FW_QCOM_PATH} + + install -m 0644 vendor/qcom/${FW_QCOM_NAME}/proprietary/vidc_1080p.fw ${D}${FW_QCOM_PATH} + + install -m 0644 ${WORKDIR}/git/WCNSS_cfg.dat ${D}${FW_QCOM_PATH} + install -m 0644 ${WORKDIR}/git/WCNSS_qcom_wlan_nv.bin ${D}${FW_QCOM_PATH} +} diff --git a/recipes-bsp/firmware-nexus/firmware-qcom-nexus5.bb b/recipes-bsp/firmware-nexus/firmware-qcom-nexus5.bb new file mode 100644 index 0000000..f11fc9a --- /dev/null +++ b/recipes-bsp/firmware-nexus/firmware-qcom-nexus5.bb @@ -0,0 +1,23 @@ +DESCRIPTION = "QCOM Firmware for LGE Google Nexus 5" + +FW_QCOM_NAME = "hammerhead" +FW_QCOM_SUBDIR = "msm8974/LGE/${FW_QCOM_NAME}" +AOSP_BUILD = "m4b30z" +CHECKSUM_qcom = "d6c0fe26" +CHECKSUM_factory = "625c027b" + +SRC_URI[qcom.sha256sum] = "f8c29461e279b311958f9476ef78b9ab654aeb9903f5c2912f11d5d4bcfd021d" +SRC_URI[factory.sha256sum] = "625c027b21afe6de7c3d0de66e3a42000269dd00c2ef9a5347007734537f3ea2" + +RDEPENDS:${PN} += "linux-firmware-qcom-adreno-a3xx" + +require recipes-bsp/firmware-nexus/firmware-qcom-nexus.inc +RADIO_VFAT = "1" +require recipes-bsp/firmware-nexus/firmware-qcom-radio.inc + +do_install:append() { + install -d ${D}${FW_QCOM_PATH} + + install -m 0644 adsp.mbn ${D}${FW_QCOM_PATH} + install -m 0644 venus.mbn ${D}${FW_QCOM_PATH} +} diff --git a/recipes-bsp/firmware-nexus/firmware-qcom-nexus5x.bb b/recipes-bsp/firmware-nexus/firmware-qcom-nexus5x.bb new file mode 100644 index 0000000..317ea5a --- /dev/null +++ b/recipes-bsp/firmware-nexus/firmware-qcom-nexus5x.bb @@ -0,0 +1,17 @@ +DESCRIPTION = "QCOM Firmware for LGE Google Nexus 5X" + +LIC_FILES_CHKSUM = "file://license.txt;md5=76ab107d8eb5f8a7927011ac29447b4a" + +FW_QCOM_NAME = "bullhead" +FW_QCOM_SUBDIR = "msm8992/LGE/${FW_QCOM_NAME}" +VENDOR = "lge" +AOSP_BUILD = "opm7.181205.001" +CHECKSUM_vendor = "bb4176a6" +CHECKSUM_factory = "5f189d84" + +SRC_URI[vendor.sha256sum] = "eaba58f7219eb477697869454138d151b38a1589db1ab40cec1b4525774fe869" +SRC_URI[factory.sha256sum] = "5f189d84781a26b49aca0de84a941a32ae0150da0aab89f1d7709d56c31b3c0a" + +require firmware-qcom-pixel.inc +RADIO_VFAT = "1" +require firmware-qcom-radio.inc diff --git a/recipes-bsp/firmware-nexus/firmware-qcom-nexus6.bb b/recipes-bsp/firmware-nexus/firmware-qcom-nexus6.bb new file mode 100644 index 0000000..9d6df42 --- /dev/null +++ b/recipes-bsp/firmware-nexus/firmware-qcom-nexus6.bb @@ -0,0 +1,19 @@ +DESCRIPTION = "QCOM Firmware for Motorola Google Nexus 6" + +FW_QCOM_NAME = "shamu" +FW_QCOM_SUBDIR = "apq8084/Motorola/${FW_QCOM_NAME}" +AOSP_BUILD = "ngi77b" +CHECKSUM_qcom = "b5a5aacc" + +SRC_URI[qcom.sha256sum] = "811ccc3c8bd4b832a26fc36aac5a46af7000d849c7217032e1d0819bfb2000dc" + +RDEPENDS:${PN} += "linux-firmware-qcom-adreno-a4xx" + +require recipes-bsp/firmware-nexus/firmware-qcom-nexus.inc + +do_install:append() { + install -d ${D}${FW_QCOM_PATH} + + install -m 0644 adsp.mbn ${D}${FW_QCOM_PATH} + install -m 0644 venus.mbn ${D}${FW_QCOM_PATH} +} diff --git a/recipes-bsp/firmware-nexus/firmware-qcom-nexus6p.bb b/recipes-bsp/firmware-nexus/firmware-qcom-nexus6p.bb new file mode 100644 index 0000000..aa69cb5 --- /dev/null +++ b/recipes-bsp/firmware-nexus/firmware-qcom-nexus6p.bb @@ -0,0 +1,16 @@ +DESCRIPTION = "QCOM Firmware for LGE Google Nexus 6P" + +LIC_FILES_CHKSUM = "file://license.txt;md5=ab57c77a2230b7254cd6be1f1c0d6806" + +FW_QCOM_NAME = "angler" +FW_QCOM_SUBDIR = "msm8994/Huawei/${FW_QCOM_NAME}" +VENDOR = "huawei" +AOSP_BUILD = "opm7.181205.001" +CHECKSUM_vendor = "52ed73ce" +CHECKSUM_factory = "b75ce068" + +SRC_URI[vendor.sha256sum] = "2eb9a77de059739d33c7fad07e34034f03a93d70eea39460bb0d9278e5763053" +SRC_URI[factory.sha256sum] = "b75ce068f23a0e793805f80fccbc081eca52861ef5eb080c47f502de4c3f9713" + +require firmware-qcom-pixel.inc +require firmware-qcom-radio.inc diff --git a/recipes-bsp/firmware-nexus/firmware-qcom-nexus7-2013.bb b/recipes-bsp/firmware-nexus/firmware-qcom-nexus7-2013.bb new file mode 100644 index 0000000..f9ef2e2 --- /dev/null +++ b/recipes-bsp/firmware-nexus/firmware-qcom-nexus7-2013.bb @@ -0,0 +1,33 @@ +DESCRIPTION = "QCOM Firmware for Asus Google Nexus 7 (2013)" + +FW_QCOM_NAME = "flo" +FW_QCOM_SUBDIR = "apq8064/Asus/${FW_QCOM_NAME}" +AOSP_BUILD = "mob30x" +CHECKSUM_qcom = "43963492" + +SRC_URI[qcom.sha256sum] = "1ccc740a461be8ea84369b1c13fc89cb3f26f8bc1400fedec8b3dd1f630a7994" + +RDEPENDS:${PN} += "linux-firmware-qcom-adreno-a3xx" + +require recipes-bsp/firmware-nexus/firmware-qcom-nexus.inc + +SRC_URI += "git://android.googlesource.com/device/asus/${FW_QCOM_NAME};protocol=https;branch=master;name=aosp" +SRCREV_aosp = "9d9fee956a9c4c7be4f69f7a472d3fc0e759c2dd" +PV:append = "+git${SRCPV}" + +do_install:append() { + install -d ${D}${FW_QCOM_PATH} + + install -m 0644 dsps.mbn ${D}${FW_QCOM_PATH} + install -m 0644 gss.mbn ${D}${FW_QCOM_PATH} + install -m 0644 q6.mbn ${D}${FW_QCOM_PATH} + install -m 0644 vidc.mbn ${D}${FW_QCOM_PATH} + install -m 0644 wcnss.mbn ${D}${FW_QCOM_PATH} + + install -m 0644 vendor/qcom/${FW_QCOM_NAME}/proprietary/vidcfw.elf ${D}${FW_QCOM_PATH} + install -m 0644 vendor/qcom/${FW_QCOM_NAME}/proprietary/vidc_1080p.fw ${D}${FW_QCOM_PATH} + + install -m 0644 ${WORKDIR}/git/WCNSS_cfg.dat ${D}${FW_QCOM_PATH} + install -m 0644 ${WORKDIR}/git/WCNSS_qcom_wlan_nv_deb.bin ${D}${FW_QCOM_PATH} + install -m 0644 ${WORKDIR}/git/WCNSS_qcom_wlan_nv_flo.bin ${D}${FW_QCOM_PATH}/WCNSS_qcom_wlan_nv.bin +} diff --git a/recipes-bsp/firmware-nexus/firmware-qcom-pixel.bb b/recipes-bsp/firmware-nexus/firmware-qcom-pixel.bb new file mode 100644 index 0000000..0d5886c --- /dev/null +++ b/recipes-bsp/firmware-nexus/firmware-qcom-pixel.bb @@ -0,0 +1,17 @@ +DESCRIPTION = "QCOM Firmware for Google Pixel / Pixel XL" + +FW_QCOM_NAME = "sailfish" +FW_QCOM_SUBDIR = "msm8996/Google/${FW_QCOM_NAME}" +EXTRA_DEVICE_SUBDIR = "msm8996/Google/marlin" +AOSP_BUILD = "qp1a.191005.007.a3" +CHECKSUM_vendor = "a1615a0f" +CHECKSUM_factory = "d4552659" + +SRC_URI[vendor.sha256sum] = "1cfffa986c4640a8bb3466f69a6f9bf511b4b6a8cb06fb0e1474a331e53876d6" +SRC_URI[factory.sha256sum] = "d455265945bb936a653730031af7d7a4aba70dc0c775024666a53491c9833b61" + +RDEPENDS:${PN} += "linux-firmware-qcom-adreno-a530" + +require firmware-qcom-pixel.inc +RADIO_ROOTDIR = "1" +require firmware-qcom-radio.inc diff --git a/recipes-bsp/firmware-nexus/firmware-qcom-pixel.inc b/recipes-bsp/firmware-nexus/firmware-qcom-pixel.inc new file mode 100644 index 0000000..c354631 --- /dev/null +++ b/recipes-bsp/firmware-nexus/firmware-qcom-pixel.inc @@ -0,0 +1,79 @@ +LICENSE = "Proprietary" +LIC_FILES_CHKSUM ?= "file://license.txt;md5=63a79fa5adc049f2e411b1f700cf0f19" + +VENDOR ?= "google_devices" +EXTRA_DEVICE_SUBDIR ??= "" + +SRC_URI = "https://dl.google.com/dl/android/aosp/${VENDOR}-${FW_QCOM_NAME}-${AOSP_BUILD}-${CHECKSUM_vendor}.tgz;name=vendor" + +PV = "${AOSP_BUILD}" + +require recipes-bsp/firmware/firmware-qcom.inc + +DEPENDS += "pil-squasher-native" + +VENDOR_IMG_SPARSE ?= "1" + +# extract the license file +do_extract() { + head -n 280 ${WORKDIR}/extract-${VENDOR}-${FW_QCOM_NAME}.sh | tail -n +16 > ${S}/license.txt + tail -n +315 ${WORKDIR}/extract-${VENDOR}-${FW_QCOM_NAME}.sh | tar xzfv - -C ${S} + if [ "${VENDOR_IMG_SPARSE}" = "1" ] ; then + simg2img ${S}/vendor/${VENDOR}/${FW_QCOM_NAME}/proprietary/vendor.img ${B}/vendor.img + else + rm -f ${B}/vendor.img + ln -sr ${S}/vendor/${VENDOR}/${FW_QCOM_NAME}/proprietary/vendor.img ${B}/vendor.img + fi + + # FIXME: also extract fastrpc shell + mkdir -p ${B}/firmware + debugfs ${B}/vendor.img -R 'ls -p /firmware' | \ + grep '^/[0-9]*/100' | cut -d/ -f6 > ${B}/firmware/fw.lst + debugfs ${B}/vendor.img -R 'ls -p /firmware' | \ + grep '^/[0-9]*/100' | cut -d/ -f6 | \ + while read name ; do echo "dump /firmware/$name ${B}/firmware/$name" ; done | \ + debugfs ${B}/vendor.img + + radio="${S}/vendor/${VENDOR}/${FW_QCOM_NAME}/proprietary/radio.img" + if [ -r "${radio}" ] ; then + rm -rf "${radio}_images" + qc_image_unpacker -i "${radio}" -f || exit 1 + + if ! [ -r "${radio}_images"/modem ] ; then + echo "modem image not found" + exit 1 + fi + + mkdir -p ${B}/firmware + mcopy -i "${radio}_images"/modem ::/image/* ${B}/firmware/ + mdir -i "${radio}_images"/modem ::/image + fi +} +addtask extract after do_unpack before do_patch +do_extract[depends] += "rust-android-sparse-native:do_populate_sysroot e2fsprogs-native:do_populate_sysroot qc-image-unpacker-native:do_populate_sysroot mtools-native:do_populate_sysroot" + +do_compile() { + for fw in ${B}/firmware/*.mdt ; do + pil-squasher ${B}/`basename $fw mdt`mbn $fw || exit 1 + done +} + +do_install() { + install -d ${D}${FW_QCOM_PATH} + for fw in adsp cdsp ipa_fws modem slpi venus ; do + ls ${B}/$fw*.mbn && install -m 0644 ${B}/$fw*.mbn ${D}${FW_QCOM_PATH} + done + + ls ${B}/firmware/*.jsn && install -m 0644 ${B}/firmware/*.jsn ${D}${FW_QCOM_PATH} + + ls ${B}/firmware/a[0-9]*_gmu.bin && install -m 0644 ${B}/firmware/a[0-9]*_gmu.bin ${D}${FW_QCOM_PATH} + ls ${B}/a[0-9]*.mbn && install -m 0644 ${B}/a[0-9]*.mbn ${D}${FW_QCOM_PATH} + + install -m 0644 license.txt ${D}${FW_QCOM_PATH} + + # Remove duplicates + rm -f ${D}${FW_QCOM_PATH}/a630_gmu.bin + rm -f ${D}${FW_QCOM_PATH}/a650_gmu.bin + + [ -z "${EXTRA_DEVICE_SUBDIR}" ] || ln -sr ${D}${FW_QCOM_PATH} ${D}${FW_QCOM_BASE_PATH}/${EXTRA_DEVICE_SUBDIR} +} diff --git a/recipes-bsp/firmware-nexus/firmware-qcom-pixel2.bb b/recipes-bsp/firmware-nexus/firmware-qcom-pixel2.bb new file mode 100644 index 0000000..8a43922 --- /dev/null +++ b/recipes-bsp/firmware-nexus/firmware-qcom-pixel2.bb @@ -0,0 +1,17 @@ +DESCRIPTION = "QCOM Firmware for Google Pixel 2 / 2XL" + +FW_QCOM_NAME = "walleye" +FW_QCOM_SUBDIR = "msm8998/Google/${FW_QCOM_NAME}" +EXTRA_DEVICE_SUBDIR = "msm8998/Google/taimen" +AOSP_BUILD = "rp1a.201005.004.a1" +CHECKSUM_vendor = "2fdea26a" + +SRC_URI[vendor.sha256sum] = "4ec6cf5dfd6616ae39cf61f95657662e4b17dd193b6ab30547ef016359cfc118" + +RDEPENDS:${PN} += "linux-firmware-qcom-adreno-a530" + +require firmware-qcom-pixel.inc + +do_install:append() { + install -m 0644 ${B}/firmware/a540_gpmu.fw2 ${D}${FW_QCOM_PATH} +} diff --git a/recipes-bsp/firmware-nexus/firmware-qcom-pixel3.bb b/recipes-bsp/firmware-nexus/firmware-qcom-pixel3.bb new file mode 100644 index 0000000..cf64e35 --- /dev/null +++ b/recipes-bsp/firmware-nexus/firmware-qcom-pixel3.bb @@ -0,0 +1,13 @@ +DESCRIPTION = "QCOM Firmware for Google Pixel 3 / 3 XL" + +FW_QCOM_NAME = "blueline" +FW_QCOM_SUBDIR = "sdm845/Google/${FW_QCOM_NAME}" +EXTRA_DEVICE_SUBDIR = "sdm845/Google/crosshatch" +AOSP_BUILD = "sp1a.210812.016.c1" +CHECKSUM_vendor = "0b9f3bc0" + +SRC_URI[vendor.sha256sum] = "5e48f4769d3cdba3c958f956d13df56b60e18e8fe03893d38f4125b421ab7ff9" + +RDEPENDS:${PN} += "linux-firmware-qcom-adreno-a630" + +require firmware-qcom-pixel.inc diff --git a/recipes-bsp/firmware-nexus/firmware-qcom-pixel3a.bb b/recipes-bsp/firmware-nexus/firmware-qcom-pixel3a.bb new file mode 100644 index 0000000..4431055 --- /dev/null +++ b/recipes-bsp/firmware-nexus/firmware-qcom-pixel3a.bb @@ -0,0 +1,13 @@ +DESCRIPTION = "QCOM Firmware for Google Pixel 3a / 3a XL" + +FW_QCOM_NAME = "sargo" +FW_QCOM_SUBDIR = "sdm670/Google/${FW_QCOM_NAME}" +EXTRA_DEVICE_SUBDIR = "sdm670/Google/bonito" +AOSP_BUILD = "sp2a.220505.008" +CHECKSUM_vendor = "772e1993" + +SRC_URI[vendor.sha256sum] = "702c4563207f77eefa7822ffbfaf0cc8a33059140f417b2deda1844ae4bb097c" + +RDEPENDS:${PN} += "linux-firmware-qcom-adreno-a630" + +require firmware-qcom-pixel.inc diff --git a/recipes-bsp/firmware-nexus/firmware-qcom-pixel4.bb b/recipes-bsp/firmware-nexus/firmware-qcom-pixel4.bb new file mode 100644 index 0000000..af88c70 --- /dev/null +++ b/recipes-bsp/firmware-nexus/firmware-qcom-pixel4.bb @@ -0,0 +1,14 @@ +DESCRIPTION = "QCOM Firmware for Google Pixel 4 / 4 XL" + +FW_QCOM_NAME = "flame" +FW_QCOM_SUBDIR = "sm8150/Google/${FW_QCOM_NAME}" +EXTRA_DEVICE_SUBDIR = "sm8150/Google/coral" +AOSP_BUILD = "tp1a.221005.002" +CHECKSUM_vendor = "bed97aaa" + +SRC_URI[vendor.sha256sum] = "6644a17f9a5ac25b7f63fa3130b8ab0b8dbe768915fabadce3da9cab5dd39e35" + +RDEPENDS:${PN} += "linux-firmware-qcom-adreno-a630" + +VENDOR_IMG_SPARSE = "0" +require firmware-qcom-pixel.inc diff --git a/recipes-bsp/firmware-nexus/firmware-qcom-pixel4a-5g.bb b/recipes-bsp/firmware-nexus/firmware-qcom-pixel4a-5g.bb new file mode 100644 index 0000000..989038b --- /dev/null +++ b/recipes-bsp/firmware-nexus/firmware-qcom-pixel4a-5g.bb @@ -0,0 +1,13 @@ +DESCRIPTION = "QCOM Firmware for Google Pixel 4a (5G)" + +FW_QCOM_NAME = "bramble" +FW_QCOM_SUBDIR = "sm7250/Google/${FW_QCOM_NAME}" +AOSP_BUILD = "tp1a.221105.002" +CHECKSUM_vendor = "793c7b07" + +SRC_URI[vendor.sha256sum] = "b643f4f01a87750094049e0854abc6f2b506560bdc556fcc449eb9c2ff19038e" + +RDEPENDS:${PN} += "linux-firmware-qcom-adreno-a650" + +VENDOR_IMG_SPARSE = "0" +require firmware-qcom-pixel.inc diff --git a/recipes-bsp/firmware-nexus/firmware-qcom-pixel4a.bb b/recipes-bsp/firmware-nexus/firmware-qcom-pixel4a.bb new file mode 100644 index 0000000..07490c3 --- /dev/null +++ b/recipes-bsp/firmware-nexus/firmware-qcom-pixel4a.bb @@ -0,0 +1,13 @@ +DESCRIPTION = "QCOM Firmware for Google Pixel 4a" + +FW_QCOM_NAME = "sunfish" +FW_QCOM_SUBDIR = "sdm730/Google/${FW_QCOM_NAME}" +AOSP_BUILD = "tp1a.221105.002" +CHECKSUM_vendor = "6d6cfc6a" + +SRC_URI[vendor.sha256sum] = "5013b1aad7ae7a0724f08e26bf73954464d8a314b8c10f21f4e62e49237907c5" + +RDEPENDS:${PN} += "linux-firmware-qcom-adreno-a630" + +VENDOR_IMG_SPARSE = "0" +require firmware-qcom-pixel.inc diff --git a/recipes-bsp/firmware-nexus/firmware-qcom-pixel5.bb b/recipes-bsp/firmware-nexus/firmware-qcom-pixel5.bb new file mode 100644 index 0000000..bf5e855 --- /dev/null +++ b/recipes-bsp/firmware-nexus/firmware-qcom-pixel5.bb @@ -0,0 +1,13 @@ +DESCRIPTION = "QCOM Firmware for Google Pixel 5" + +FW_QCOM_NAME = "redfin" +FW_QCOM_SUBDIR = "sm7250/Google/${FW_QCOM_NAME}" +AOSP_BUILD = "tp1a.221105.002" +CHECKSUM_vendor = "2b78e8a6" + +SRC_URI[vendor.sha256sum] = "e2ab6c9024c282ace3fca7d66522075c4fc5188bcb00b3fb9dd8230056aef93f" + +RDEPENDS:${PN} += "linux-firmware-qcom-adreno-a650" + +VENDOR_IMG_SPARSE = "0" +require firmware-qcom-pixel.inc diff --git a/recipes-bsp/firmware-nexus/firmware-qcom-pixel5a-5g.bb b/recipes-bsp/firmware-nexus/firmware-qcom-pixel5a-5g.bb new file mode 100644 index 0000000..3ac989c --- /dev/null +++ b/recipes-bsp/firmware-nexus/firmware-qcom-pixel5a-5g.bb @@ -0,0 +1,13 @@ +DESCRIPTION = "QCOM Firmware for Google Pixel 5a 5G" + +FW_QCOM_NAME = "barbet" +FW_QCOM_SUBDIR = "sm7250/Google/${FW_QCOM_NAME}" +AOSP_BUILD = "tp1a.221105.002" +CHECKSUM_vendor = "425252ac" + +SRC_URI[vendor.sha256sum] = "72ccf1e403824214bfbfeccac55c865bb179b15ff50f9066f87bde4c925fbc27" + +RDEPENDS:${PN} += "linux-firmware-qcom-adreno-a650" + +VENDOR_IMG_SPARSE = "0" +require firmware-qcom-pixel.inc diff --git a/recipes-bsp/firmware-nexus/firmware-qcom-radio.inc b/recipes-bsp/firmware-nexus/firmware-qcom-radio.inc new file mode 100644 index 0000000..4310684 --- /dev/null +++ b/recipes-bsp/firmware-nexus/firmware-qcom-radio.inc @@ -0,0 +1,34 @@ +FACTORY_NAME ?= "${FW_QCOM_NAME}" +SRC_URI += "https://dl.google.com/dl/android/aosp/${FACTORY_NAME}-${AOSP_BUILD}-factory-${CHECKSUM_factory}.zip;name=factory" + +DEPENDS += "pil-squasher-native qc-image-unpacker-native" + +do_extract[depends] += "mtools-native:do_populate_sysroot" + +do_extract:append() { + mkdir -p ${B}/radio + radio="${WORKDIR}/${FACTORY_NAME}-${AOSP_BUILD}/radio-*img" + if [ "${RADIO_VFAT}" = "1" ] ; then + mcopy -i $radio ::/image/* ${B}/radio + else + rm -rf ${radio}_images + qc_image_unpacker -i $radio -f || exit 1 + if [ "${RADIO_ROOTDIR}" = "1" ] ; then + mcopy -i ${radio}_images/modem ::/* ${B}/radio + else + mcopy -i ${radio}_images/modem ::/image/* ${B}/radio + fi + fi +} + +do_compile:append() { + pil-squasher ${B}/radio/modem.mbn ${B}/radio/modem.mdt + if [ -r ${B}/radio/mba.mdt ] ; then + pil-squasher ${B}/radio/mba.mbn ${B}/radio/mba.mdt + fi +} + +do_install:append() { + install -d ${D}${FW_QCOM_PATH} + install -m 0644 ${B}/radio/*.mbn ${D}${FW_QCOM_PATH} +} diff --git a/recipes-bsp/firmware/files/lib-firmware-modem.service b/recipes-bsp/firmware/files/lib-firmware-modem.service deleted file mode 100644 index 9962a0d..0000000 --- a/recipes-bsp/firmware/files/lib-firmware-modem.service +++ /dev/null @@ -1,19 +0,0 @@ -[Unit] -Description=Mount partition with preflashed firmware ('modem_a') -ConditionPathExists=/lib/firmware/modem -Before=systemd-udevd-control.socket -After=local-fs-pre.target -Before=local-fs.target -Before=umount.target -Conflicts=umount.target -DefaultDependencies=no - -[Install] -WantedBy=local-fs.target - -[Service] -Type=oneshot -RemainAfterExit=true -# sde4 = modem_a -ExecStart=mount -t vfat -o ro /dev/sde4 /lib/firmware/modem -ExecStop=umount /lib/firmware/modem diff --git a/recipes-bsp/firmware/files/lib-firmware-system.service b/recipes-bsp/firmware/files/lib-firmware-system.service deleted file mode 100644 index 2e6efc7..0000000 --- a/recipes-bsp/firmware/files/lib-firmware-system.service +++ /dev/null @@ -1,19 +0,0 @@ -[Unit] -Description=Mount partition with system root for for firmware files ('system_a') -ConditionPathExists=/lib/firmware/system -Before=systemd-udevd-control.socket -After=local-fs-pre.target -Before=local-fs.target -Before=umount.target -Conflicts=umount.target -DefaultDependencies=no - -[Install] -WantedBy=local-fs.target - -[Service] -Type=oneshot -RemainAfterExit=true -# sda6 = system_a -ExecStart=mount -t ext4 -o ro /dev/sda6 /lib/firmware/system -ExecStop=umount /lib/firmware/system diff --git a/recipes-bsp/firmware/firmware-ath6kl_git.bb b/recipes-bsp/firmware/firmware-ath6kl_git.bb new file mode 100644 index 0000000..81d237a --- /dev/null +++ b/recipes-bsp/firmware/firmware-ath6kl_git.bb @@ -0,0 +1,49 @@ +# Extra firmware files, which are covered by the separate license. +# They are not a part of linux-firmware and will never be: +# https://lists.infradead.org/pipermail/ath6kl/2017-July/000296.html + +SUMMARY = "Additional firmware files for Qualcomm/Atheros Ath6k SoC" + +LICENSE = "Firmware-qualcommAthos_ath6kl" +LIC_FILES_CHKSUM = "file://LICENSE.qca_firmware;md5=2a397c0e988f4c52d3d526133b617c8d" +NO_GENERIC_LICENSE[Firmware-qualcommAthos_ath6kl] = "LICENSE.qca_firmware" + +SRC_URI = "git://github.com/qca/ath6kl-firmware;protocol=https;branch=master" +SRCREV = "2e02576c1dab6fd35118eea1004f50aaaed3794f" + +PV = "3.5.0.349-1+git${SRCPV}" + +S = "${WORKDIR}/git" + +inherit allarch + +CLEANBROKEN = "1" + +do_compile() { + : +} + +FWDIR = "${nonarch_base_libdir}/firmware" + +do_install() { + install -d ${D}${FWDIR}/ath6k/AR6004/hw1.3 + install -d ${D}${FWDIR}/ath6k/AR6004/hw3.0 + + install -m 0644 ath6k/AR6004/hw1.3/* ${D}${FWDIR}/ath6k/AR6004/hw1.3 + install -m 0644 ath6k/AR6004/hw3.0/* ${D}${FWDIR}/ath6k/AR6004/hw3.0 + + install -m 0644 LICENSE.qca_firmware ${D}${FWDIR} +} + +FILES:${PN} += "${FWDIR}" + +# There is a conflict between linux-firmware version and and the updated one + +inherit update-alternatives +ALTERNATIVE:${PN} = "ar6004-hw13-bdata" +ALTERNATIVE_LINK_NAME[ar6004-hw13-bdata] = "${nonarch_base_libdir}/firmware/ath6k/AR6004/hw1.3/bdata.bin" +ALTERNATIVE_PRIORITY = "100" + +# Firmware files are generally not ran on the CPU, so they can be +# allarch despite being architecture specific +INSANE_SKIP = "arch" diff --git a/recipes-bsp/firmware/firmware-qcom-adreno.inc b/recipes-bsp/firmware/firmware-qcom-adreno.inc new file mode 100644 index 0000000..2fad318 --- /dev/null +++ b/recipes-bsp/firmware/firmware-qcom-adreno.inc @@ -0,0 +1,40 @@ +# Handle Adreno firmware unpacking in a generic way +# Include the file to be able to dissect the archive. +# If ADRENO_URI is defined, the image will be dissected automatically +# Handle fwpath=... as a path to Adreno firmware inside the archive + +ADRENO_URI ??= "" + +# Conditionally populate SRC_URI. We have to do it here rather than in python +# script to let base.bbclass to pick up dependencies +SRC_URI += "${@['', '${ADRENO_URI};subdir=adreno;name=adreno'][d.getVar('ADRENO_URI') != ''] }" + +# the file is unpacked to this dir, clean it up +do_unpack[cleandirs] = "${WORKDIR}/adreno" + +DEPENDS += "pil-squasher-native" + +python () { + uri = d.getVar("ADRENO_URI") + if uri == "": + bb.warn("%s: not packaging ADRENO firmware. Please provide ADRENO_URI" % d.getVar("PN")) + else: + urldata = bb.fetch2.FetchData(d.getVar("ADRENO_URI"), d) + if "fwpath" in urldata.parm: + d.setVar("ADRENO_PATH", urldata.parm["fwpath"]) + else: + d.setVar("ADRENO_PATH", "") +} + +do_compile:append() { + if [ -n "${ADRENO_URI}" ] ; then + for fw in ${WORKDIR}/adreno/${ADRENO_PATH}/*_zap.mdt ; do + pil-squasher ${B}/`basename $fw mdt`mbn $fw || exit 1 + done + for fw in ${FW_QCOM_LIST} ; do + if [ -r ${WORKDIR}/adreno/${ADRENO_PATH}/$fw ] ; then + cp ${WORKDIR}/adreno/${ADRENO_PATH}/$fw ${B}/ + fi + done + fi +} diff --git a/recipes-bsp/firmware/firmware-qcom-dragonboard-apq8074.bb b/recipes-bsp/firmware/firmware-qcom-dragonboard-apq8074.bb new file mode 100644 index 0000000..595c41e --- /dev/null +++ b/recipes-bsp/firmware/firmware-qcom-dragonboard-apq8074.bb @@ -0,0 +1,21 @@ +# Specify location of the corresponding NON-HLOS.bin file by adding +# NHLOS_URI:pn-firmware-qcom-dragonboard-apq8074 = "..." to local.conf. Use +# "file://" if the file is provided locally. + +DESCRIPTION = "QCOM Firmware for Dragonboard APQ8074 board" + +LICENSE = "CLOSED" + +# dragonboard8074 firmware is unsigned, so install into generic location +FW_QCOM_NAME = "apq8074" + +FW_QCOM_LIST = "adsp.mbn mba.mbn modem.mbn wcnss.mbn" + +require recipes-bsp/firmware/firmware-qcom.inc +require recipes-bsp/firmware/firmware-qcom-nhlos.inc + +SPLIT_FIRMWARE_PACKAGES = " \ + linux-firmware-qcom-${FW_QCOM_NAME}-audio \ + linux-firmware-qcom-${FW_QCOM_NAME}-modem \ + linux-firmware-qcom-${FW_QCOM_NAME}-wifi \ +" diff --git a/recipes-bsp/firmware/firmware-qcom-dragonboard410c.inc b/recipes-bsp/firmware/firmware-qcom-dragonboard410c.inc new file mode 100644 index 0000000..1acb8d0 --- /dev/null +++ b/recipes-bsp/firmware/firmware-qcom-dragonboard410c.inc @@ -0,0 +1,17 @@ +DESCRIPTION = "QCOM Firmware for DragonBoard 410c" + +LICENSE = "Proprietary" +LIC_FILES_CHKSUM = "file://LICENSE;md5=4d087ee0965cb059f1b2f9429e166f64" + +FW_QCOM_NAME = "apq8016" + +require recipes-bsp/firmware/firmware-qcom.inc + +S = "${WORKDIR}/linux-board-support-package-r${PV}" + +do_install() { + install -d ${D}${FW_QCOM_PATH} + + install -d ${D}${sysconfdir}/ + install -m 0644 LICENSE ${D}${sysconfdir}/QCOM-LINUX-BOARD-SUPPORT-LICENSE-${PN} +} diff --git a/recipes-bsp/firmware/firmware-qcom-dragonboard410c_1034.2.1.bb b/recipes-bsp/firmware/firmware-qcom-dragonboard410c_1034.2.1.bb index 7ea3a7d..6f188bc 100644 --- a/recipes-bsp/firmware/firmware-qcom-dragonboard410c_1034.2.1.bb +++ b/recipes-bsp/firmware/firmware-qcom-dragonboard410c_1034.2.1.bb @@ -1,40 +1,5 @@ -DESCRIPTION = "QCOM Firmware for DragonBoard 410c" - -LICENSE = "Proprietary" -LIC_FILES_CHKSUM = "file://LICENSE;md5=4d087ee0965cb059f1b2f9429e166f64" +require recipes-bsp/firmware/firmware-qcom-dragonboard410c.inc SRC_URI = "http://releases.linaro.org/96boards/dragonboard410c/qualcomm/firmware/linux-board-support-package-r${PV}.zip" SRC_URI[md5sum] = "25c241bfd5fb2e55e8185752d5fe92ce" SRC_URI[sha256sum] = "46953b974c5c58c7ca66db414437c0268b033ac9d28127e98d9c4e1a49359da5" - -DEPENDS += "mtools-native" - -PACKAGE_ARCH = "${MACHINE_ARCH}" - -S = "${WORKDIR}/linux-board-support-package-r${PV}" - -do_compile() { - : -} - -do_install() { - install -d ${D}${nonarch_base_libdir}/firmware/ - - install -d ${D}/boot - cp ./efs-seed/fs_image_linux.tar.gz.mbn.img ${D}/boot/modem_fsg - - cp -r ./proprietary-linux/wlan ${D}${nonarch_base_libdir}/firmware/ - - install -d ${D}${nonarch_base_libdir}/firmware/qcom/msm8916 - MTOOLS_SKIP_CHECK=1 mcopy -i ./bootloaders-linux/NON-HLOS.bin \ - ::image/modem.* ::image/mba.mbn ::image/wcnss.* ${D}${nonarch_base_libdir}/firmware/qcom/msm8916 - - install -d ${D}${sysconfdir}/ - install -m 0644 LICENSE ${D}${sysconfdir}/QCOM-LINUX-BOARD-SUPPORT-LICENSE-${PN} -} - -FILES_${PN} += "/boot/modem_fsg" -FILES_${PN} += "${nonarch_base_libdir}/firmware/wlan/*" -FILES_${PN} += "${nonarch_base_libdir}/firmware/qcom/msm8916/*" - -INSANE_SKIP_${PN} += "arch" diff --git a/recipes-bsp/firmware/firmware-qcom-dragonboard410c_1036.1.bb b/recipes-bsp/firmware/firmware-qcom-dragonboard410c_1036.1.bb new file mode 100644 index 0000000..194c3e5 --- /dev/null +++ b/recipes-bsp/firmware/firmware-qcom-dragonboard410c_1036.1.bb @@ -0,0 +1,15 @@ +# This firmware is not released for redistribution, however it can be +# downloaded from https://developer.qualcomm.com/hardware/dragonboard-410c +# +# Add the following line to local.conf to use it: +# PREFERRED_VERSION_firmware-qcom-dragonboard410c = "1036.1" +# You have to manually put the downloaded file into ${DL_DIR} + +require recipes-bsp/firmware/firmware-qcom-dragonboard410c.inc + +SRC_URI = '${@oe.utils.conditional("PREFERRED_VERSION_firmware-qcom-dragonboard410c", "1036.1", "file://dragonboard_410c.zip.1.0-r1036.1.zip", "", d)}' +SRC_URI[md5sum] = "3092fccf7a97fa319d7732a98425f9d4" +SRC_URI[sha256sum] = "93070f58fa3aa6467baa881935c37c4da2df2a8af3248746931ce3d11a3a1200" + +# This should not be selected by default as the firmware archive is behind the accept&click wall. +DEFAULT_PREFERENCE = "-1" diff --git a/recipes-bsp/firmware/firmware-qcom-dragonboard820c_01700.1.bb b/recipes-bsp/firmware/firmware-qcom-dragonboard820c_01700.1.bb index 494db0d..816a8ae 100644 --- a/recipes-bsp/firmware/firmware-qcom-dragonboard820c_01700.1.bb +++ b/recipes-bsp/firmware/firmware-qcom-dragonboard820c_01700.1.bb @@ -7,23 +7,22 @@ SRC_URI = "https://releases.linaro.org/96boards/dragonboard820c/qualcomm/firmwar SRC_URI[md5sum] = "587138c5e677342db9a88d5c8747ec6c" SRC_URI[sha256sum] = "6ee9c461b2b5dd2d3bd705bb5ea3f44b319ecb909b2772f305ce12439e089cd9" -PACKAGE_ARCH = "${MACHINE_ARCH}" +FW_QCOM_NAME = "apq8096" -S = "${WORKDIR}/linux-board-support-package-r${PV}" +require recipes-bsp/firmware/firmware-qcom.inc -do_compile() { - : -} +S = "${WORKDIR}/linux-board-support-package-r${PV}" do_install() { install -d ${D}${nonarch_base_libdir}/firmware/ - install -d ${D}${nonarch_base_libdir}/firmware/qcom/msm8996/ + install -d ${D}${FW_QCOM_PATH}/ - install -m 0444 ./proprietary-linux/adsp*.* ${D}${nonarch_base_libdir}/firmware/qcom/msm8996/ + install -m 0444 ./bootloaders-linux/adspso.bin ${D}${FW_QCOM_PATH}/ install -d ${D}${sysconfdir}/ install -m 0644 LICENSE ${D}${sysconfdir}/QCOM-LINUX-BOARD-SUPPORT-LICENSE-${PN} } -FILES_${PN} += "${nonarch_base_libdir}/firmware/*" -INSANE_SKIP_${PN} += "arch" +SPLIT_FIRMWARE_PACKAGES = " \ + ${PN}-dspso \ +" diff --git a/recipes-bsp/firmware/firmware-qcom-dragonboard845c_20190529180356-v4.bb b/recipes-bsp/firmware/firmware-qcom-dragonboard845c_20190529180356-v4.bb index f151ac7..b2760e8 100644 --- a/recipes-bsp/firmware/firmware-qcom-dragonboard845c_20190529180356-v4.bb +++ b/recipes-bsp/firmware/firmware-qcom-dragonboard845c_20190529180356-v4.bb @@ -3,42 +3,28 @@ DESCRIPTION = "QCOM Firmware for DragonBoard 845c" LICENSE = "Proprietary" LIC_FILES_CHKSUM = "file://LICENSE.qcom.txt;md5=cbbe399f2c983ad51768f4561587f000" -SRC_URI = "https://releases.linaro.org/96boards/dragonboard845c/qualcomm/firmware/RB3_firmware_${PV}.zip \ - git://github.com/alimon/qca-swiss-army-knife \ - file://generate_board-2_json.sh" +SRC_URI = "https://releases.linaro.org/96boards/dragonboard845c/qualcomm/firmware/RB3_firmware_${PV}.zip;subdir=${BP}" SRC_URI[md5sum] = "ad69855a1275547b16d94a1b5405ac62" SRC_URI[sha256sum] = "4289d2f2a7124b104d0274879e702aae9b1e50c42eec3747f8584c6744ef65e3" -SRCREV = "0c01a2abc3e9855b71f0fbea2c335011104d9ec0" -PACKAGE_ARCH = "${MACHINE_ARCH}" -DEPENDS += "bash-native" -inherit python3native +FW_QCOM_NAME = "sdm845" -S = "${WORKDIR}" +require recipes-bsp/firmware/firmware-qcom.inc -do_compile() { - # Build board-2.bin needed by WiFi - mkdir -p bdf - cp ./38-bdwlan_split/bdwlan*.* bdf - bash generate_board-2_json.sh bdf board-2.json - python3 git/tools/scripts/ath10k/ath10k-bdencoder -c board-2.json -o board-2.bin -} +DEPENDS += "pil-squasher-native" do_install() { install -d ${D}${nonarch_base_libdir}/firmware/ - install -d ${D}${nonarch_base_libdir}/firmware/qcom/sdm845 + install -d ${D}${FW_QCOM_PATH} - install -m 0444 ./17-USB3-201-202-FW/K2026090.mem ${D}${nonarch_base_libdir}/firmware/ - install -m 0444 ./18-adreno-fw/a630_zap*.* ${D}${nonarch_base_libdir}/firmware/qcom/ - install -m 0444 ./20-adsp_split/firmware/adsp*.* ${D}${nonarch_base_libdir}/firmware/qcom/sdm845 - install -m 0444 ./21-cdsp_split/firmware/cdsp*.* ${D}${nonarch_base_libdir}/firmware/qcom/sdm845 + install -m 0444 ./08-dspso/dspso.bin ${D}${FW_QCOM_PATH} - install -d ${D}${nonarch_base_libdir}/firmware/ath10k/WCN3990/hw1.0/ - install -m 0444 ./board-2.bin ${D}${nonarch_base_libdir}/firmware/ath10k/WCN3990/hw1.0/ + install -m 0444 ./17-USB3-201-202-FW/K2026090.mem ${D}${nonarch_base_libdir}/firmware/renesas_usb_fw.mem install -d ${D}${sysconfdir}/ install -m 0644 LICENSE.qcom.txt ${D}${sysconfdir}/QCOM-LINUX-BOARD-SUPPORT-LICENSE-${PN} } -FILES_${PN} += "${nonarch_base_libdir}/firmware/*" -INSANE_SKIP_${PN} += "arch" +SPLIT_FIRMWARE_PACKAGES = " \ + ${PN}-dspso \ +" diff --git a/recipes-bsp/firmware/firmware-qcom-ifc6410.bb b/recipes-bsp/firmware/firmware-qcom-ifc6410.bb new file mode 100644 index 0000000..1fbeac2 --- /dev/null +++ b/recipes-bsp/firmware/firmware-qcom-ifc6410.bb @@ -0,0 +1,22 @@ +# Specify location of the corresponding NON-HLOS.bin file by adding +# NHLOS_URI:pn-firmware-qcom-ifc6410 = "..." to local.conf. Use "file://" +# if the file is provided locally. + +DESCRIPTION = "QCOM Firmware for Inforce IFC6410 board" + +LICENSE = "CLOSED" + +# ifc6410 firmware is unsigned, so install into generic location +FW_QCOM_NAME = "apq8064" + +FW_QCOM_LIST = "dsps.mbn gss.mbn q6.mbn wcnss.mbn" + +require recipes-bsp/firmware/firmware-qcom.inc +require recipes-bsp/firmware/firmware-qcom-nhlos.inc + +SPLIT_FIRMWARE_PACKAGES = " \ + linux-firmware-qcom-${FW_QCOM_NAME}-dsps \ + linux-firmware-qcom-${FW_QCOM_NAME}-gss \ + linux-firmware-qcom-${FW_QCOM_NAME}-q6 \ + linux-firmware-qcom-${FW_QCOM_NAME}-wifi \ +" diff --git a/recipes-bsp/firmware/firmware-qcom-ifc6560.bb b/recipes-bsp/firmware/firmware-qcom-ifc6560.bb new file mode 100644 index 0000000..03aca78 --- /dev/null +++ b/recipes-bsp/firmware/firmware-qcom-ifc6560.bb @@ -0,0 +1,30 @@ +# Specify location of the corresponding NON-HLOS.bin file by adding +# NHLOS_URI:pn-firmware-qcom-ifc6560 = "..." to local.conf. Use "file://" +# if the file is provided locally. + +DESCRIPTION = "QCOM Firmware for Inforce IFC6560 board" + +LICENSE = "CLOSED" + +# ifc6560 isn't locked, so install firmware into generic location +FW_QCOM_NAME = "sda660" + +FW_QCOM_LIST = "\ + a508_zap.mbn a512_zap.mbn \ + adsp.mbn \ + cdsp.mbn \ + mba.mbn modem.mbn modemuw.jsn \ + venus.mbn \ +" + +require recipes-bsp/firmware/firmware-qcom.inc +require recipes-bsp/firmware/firmware-qcom-nhlos.inc +require recipes-bsp/firmware/firmware-qcom-adreno.inc + +SPLIT_FIRMWARE_PACKAGES = "\ + linux-firmware-qcom-${FW_QCOM_NAME}-adreno \ + linux-firmware-qcom-${FW_QCOM_NAME}-audio \ + linux-firmware-qcom-${FW_QCOM_NAME}-compute \ + linux-firmware-qcom-${FW_QCOM_NAME}-modem \ + linux-firmware-qcom-${FW_QCOM_NAME}-venus \ +" diff --git a/recipes-bsp/firmware/firmware-qcom-nhlos.inc b/recipes-bsp/firmware/firmware-qcom-nhlos.inc new file mode 100644 index 0000000..a4d5808 --- /dev/null +++ b/recipes-bsp/firmware/firmware-qcom-nhlos.inc @@ -0,0 +1,60 @@ +# Handle NON-HLOS.bin unpacking in a generic way +# Include the file to be able to dissect the image using handle_nonhlos_image() +# If NHLOS_URI is defined, the image will be dissected automatically + +NHLOS_URI ??= "" + +# List all firmware files to be installed +FW_QCOM_LIST ??= "" + +DEPENDS += "pil-squasher-native mtools-native" + +# Conditionally populate SRC_URI. We have to do it here rather than in python +# script to let base.bbclass to pick up dependencies +SRC_URI += "${NHLOS_URI}" + +handle_nonhlos_image() { + mkdir -p ${B}/firmware + mcopy -n -s -i "$1" ::/* ${B}/firmware/ + for fw in ${B}/firmware/image/*.mdt ; do + pil-squasher ${B}/`basename $fw mdt`mbn $fw || exit 1 + done +} + +# If the URL is the file:// URI, the whole local path will be duplicated in the WORKDIR. +# Otherwise we just need the last (filename) part of the path. +def get_nhlos_path(path): + from urllib.parse import urlparse + if path == "": + return "" + url = urlparse(path) + if url.scheme == "file": + return url.path + return url.path.rsplit('/', 1)[1] + +do_compile:prepend() { + if [ -n "${NHLOS_URI}" ] ; then + handle_nonhlos_image ${WORKDIR}/${@get_nhlos_path(d.getVar("NHLOS_URI"))} + fi +} + +do_install:prepend() { + install -d ${D}${FW_QCOM_PATH} + + for fw in ${FW_QCOM_LIST} ; do + if [ -r ${B}/$fw ] ; then + install -m 0644 ${B}/$fw ${D}${FW_QCOM_PATH} + fi + + if [ -r ${B}/firmware/image/$fw ] ; then + install -m 0644 ${B}/firmware/image/$fw ${D}${FW_QCOM_PATH} + fi + done +} + +# If firmware files are not provided, do not download/package anything +python () { + uri = d.getVar("NHLOS_URI") + if uri == "": + bb.warn("%s: not packaging NHLOS firmware. Please provide HNLOS_URI" % d.getVar("PN")) +} diff --git a/recipes-bsp/firmware/firmware-qcom-rb1_20230823-v2.bb b/recipes-bsp/firmware/firmware-qcom-rb1_20230823-v2.bb new file mode 100644 index 0000000..3d8a802 --- /dev/null +++ b/recipes-bsp/firmware/firmware-qcom-rb1_20230823-v2.bb @@ -0,0 +1,25 @@ +DESCRIPTION = "QCOM Firmware for Qualcomm Robotics RB1 platform" + +LICENSE = "Proprietary" +LIC_FILES_CHKSUM = "file://LICENSE.qcom.txt;md5=cbbe399f2c983ad51768f4561587f000" + +SRC_URI = "http://releases.linaro.org/96boards/rb1/qualcomm/firmware/RB1_firmware_${PV}.zip;subdir=${BP}" +SRC_URI[md5sum] = "db892ca115845938c6672d756448d512" +SRC_URI[sha256sum] = "e7f95cc61d601f6267f87741c333ec5663a6fb538c79770dc094c2556fa757c0" + +FW_QCOM_NAME = "qcm2290" + +require recipes-bsp/firmware/firmware-qcom.inc + +do_install() { + install -d ${D}${sysconfdir}/ + install -m 0644 LICENSE.qcom.txt ${D}${sysconfdir}/QCOM-LINUX-BOARD-SUPPORT-LICENSE-${PN} + + install -d ${D}${FW_QCOM_PATH} + + install -m 0444 04-dspso/dspso.bin ${D}${FW_QCOM_PATH} +} + +SPLIT_FIRMWARE_PACKAGES = " \ + ${PN}-dspso \ +" diff --git a/recipes-bsp/firmware/firmware-qcom-rb2_20230823-v2.bb b/recipes-bsp/firmware/firmware-qcom-rb2_20230823-v2.bb new file mode 100644 index 0000000..480985a --- /dev/null +++ b/recipes-bsp/firmware/firmware-qcom-rb2_20230823-v2.bb @@ -0,0 +1,25 @@ +DESCRIPTION = "QCOM Firmware for Qualcomm Robotics RB2 platform" + +LICENSE = "Proprietary" +LIC_FILES_CHKSUM = "file://LICENSE.qcom.txt;md5=cbbe399f2c983ad51768f4561587f000" + +SRC_URI = "http://releases.linaro.org/96boards/rb2/qualcomm/firmware/RB2_firmware_${PV}.zip;subdir=${BP}" +SRC_URI[md5sum] = "53b6cda776cb534883e6c2a048ad97ec" +SRC_URI[sha256sum] = "5d96c6f224cd4667afd47770b6cd0ad2ad912fe67fec86f4478ad8dcffae8531" + +FW_QCOM_NAME = "qrb4210" + +require recipes-bsp/firmware/firmware-qcom.inc + +do_install() { + install -d ${D}${sysconfdir}/ + install -m 0644 LICENSE.qcom.txt ${D}${sysconfdir}/QCOM-LINUX-BOARD-SUPPORT-LICENSE-${PN} + + install -d ${D}${FW_QCOM_PATH} + + install -m 0444 04-dspso/dspso.bin ${D}${FW_QCOM_PATH} +} + +SPLIT_FIRMWARE_PACKAGES = " \ + ${PN}-dspso \ +" diff --git a/recipes-bsp/firmware/firmware-qcom-rb5_1.0.bb b/recipes-bsp/firmware/firmware-qcom-rb5_1.0.bb deleted file mode 100644 index 394699b..0000000 --- a/recipes-bsp/firmware/firmware-qcom-rb5_1.0.bb +++ /dev/null @@ -1,110 +0,0 @@ -# Provide base URI of NHLOS_Binaries.zip and adreno_1.0_qrb5165_rb5.tar.gz -# files. Use "file://" if those files are copied into -# recipes-bsp/firmware/files/ directory. -# NHLOS_URI ?= "file://" -# ADRENO_URI ?= "file://" - -DESCRIPTION = "QCOM Firmware for Qualcomm Robotics RB5 platform" - -LICENSE = "Proprietary" - -# There is no license file in the archive -#LIC_FILES_CHKSUM = "file://license.txt;md5=" -ERROR_QA_remove = "license-checksum" - -NHLOS_ARCHIVE = "NHLOS_Binaries.zip" -ADRENO_ARCHIVE = "adreno_1.0_qrb5165_rb5.tar.gz" - -SRC_URI_NHLOS = "${NHLOS_URI}${NHLOS_ARCHIVE}" -SRC_URI_ADRENO = "${ADRENO_URI}${ADRENO_ARCHIVE};unpack=0" - -PACKAGE_ARCH = "${MACHINE_ARCH}" - -# do_unpack is written in Python, so let's use do_compile here -do_compile() { - if [ -r ${WORKDIR}/${ADRENO_ARCHIVE} ] ; then - tar xzf ${WORKDIR}/${ADRENO_ARCHIVE} .//lib/firmware - fi -} - -do_install() { - if [ -n "${ADRENO_URI}" ] ; then - install -d ${D}${nonarch_base_libdir}/firmware/qcom - install -m 0444 ./lib/firmware/a650_*.* ${D}${nonarch_base_libdir}/firmware/qcom - else - install -d ${D}${nonarch_base_libdir}/firmware/qcom - install -d ${D}${nonarch_base_libdir}/firmware/system - - install -d ${D}${systemd_system_unitdir} - install -m 0644 ${WORKDIR}/lib-firmware-system.service ${D}${systemd_system_unitdir} - - # Symlink firmware to proper paths. - for img in a650_gmu.bin a650_sqe.fw a650_zap.mdt a650_zap.elf a650_zap.b00 a650_zap.b01 a650_zap.b02 - do - ln -s ../system/lib/firmware/${img} ${D}${nonarch_base_libdir}/firmware/qcom - done - fi - - if [ -n "${NHLOS_URI}" ] ; then - cd ${WORKDIR}/NHLOS_Binaries - install -d ${D}${nonarch_base_libdir}/firmware/qcom/sm8250 - install -m 0444 adsp.b* adsp.mdt adspr.jsn adspua.jsn ${D}${nonarch_base_libdir}/firmware/qcom/sm8250 - install -m 0444 cdsp.b* cdsp.mdt cdspr.jsn ${D}${nonarch_base_libdir}/firmware/qcom/sm8250 - install -m 0444 slpi.b* slpi.mdt ${D}${nonarch_base_libdir}/firmware/qcom/sm8250 - install -m 0444 venus.b* venus.mdt ${D}${nonarch_base_libdir}/firmware/qcom/sm8250 - - install -m 0444 verinfo/Ver_Info.txt ${D}${nonarch_base_libdir}/firmware/qcom/sm8250 - cd .. - else - install -d ${D}${nonarch_base_libdir}/firmware/qcom/sm8250 - install -d ${D}${nonarch_base_libdir}/firmware/modem - - install -d ${D}${systemd_system_unitdir} - install -m 0644 ${WORKDIR}/lib-firmware-modem.service ${D}${systemd_system_unitdir} - - # Unfortunately Qualcomm firmware partition uses different layout there, so we have to symlink firmware to proper paths. - # Bettere be safe than sorry. Install more links that are actually present there in case firmware is changed. - for base in adsp cdsp slpi venus - do - for idx in $(seq 0 20) - do - ln -s ../../modem/image/$base.b`printf %02d $idx` ${D}${nonarch_base_libdir}/firmware/qcom/sm8250 - done - ln -s ../../modem/image/${base}.mdt ${D}${nonarch_base_libdir}/firmware/qcom/sm8250 - done - for img in adspr adspua cdspr - do - ln -s ../../modem/image/${img}.jsn ${D}${nonarch_base_libdir}/firmware/qcom/sm8250 - done - fi -} - -inherit systemd - -FILES_${PN} += "${nonarch_base_libdir}/firmware/" -INSANE_SKIP_${PN} += "arch" -INHIBIT_PACKAGE_DEBUG_SPLIT = "1" -INHIBIT_PACKAGE_STRIP = "1" -INHIBIT_DEFAULT_DEPS = "1" - -# We list firmware-qcom-rb5 in RRECOMMENDS, so we can not skip the recipe here -# If firmware files are not provided, do not download/package anything -python () { - if d.getVar("NHLOS_URI") == "" and d.getVar("ADRENO_URI") == "": - bb.warn("Not packaging RB5 firmware. Please update HNLOS_URI and ADRENO_URI") - - uri = d.getVar("NHLOS_URI") - if uri != None and uri != "": - d.appendVar("SRC_URI", " ${SRC_URI_NHLOS}") - d.appendVarFlag('do_unpack', 'depends', ' unzip-native:do_populate_sysroot') - else: - d.appendVar("SRC_URI", " file://lib-firmware-modem.service") - d.appendVar("SYSTEMD_SERVICE_" + d.getVar("PN"), " lib-firmware-modem.service") - - uri = d.getVar("ADRENO_URI") - if uri != None and uri != "": - d.appendVar("SRC_URI", " ${SRC_URI_ADRENO}") - else: - d.appendVar("SRC_URI", " file://lib-firmware-system.service") - d.appendVar("SYSTEMD_SERVICE_" + d.getVar("PN"), " lib-firmware-system.service") -} diff --git a/recipes-bsp/firmware/firmware-qcom-rb5_20210331-v4.bb b/recipes-bsp/firmware/firmware-qcom-rb5_20210331-v4.bb new file mode 100644 index 0000000..201c646 --- /dev/null +++ b/recipes-bsp/firmware/firmware-qcom-rb5_20210331-v4.bb @@ -0,0 +1,32 @@ +DESCRIPTION = "QCOM Firmware for Qualcomm Robotics RB5 platform" + +LICENSE = "Proprietary" +LIC_FILES_CHKSUM = "file://LICENSE.qcom.txt;md5=cbbe399f2c983ad51768f4561587f000" + +SRC_URI = " \ + http://releases.linaro.org/96boards/rb5/qualcomm/firmware/RB5_firmware_${PV}.zip;subdir=${BP} \ +" +SRC_URI[md5sum] = "d65ec09ba18dcafe291c870e0516c290" +SRC_URI[sha256sum] = "30e2c02be32de9f809b590f4fe76d9eb66d35f8c7d13b1f2850beb3d793192cc" + +# From v2 to v4 the versioning has changed, so add epoch +# 20210118133815-v2 +# 20210331-v4 +PE = "1" + +FW_QCOM_NAME = "sm8250" + +require recipes-bsp/firmware/firmware-qcom.inc + +do_install() { + install -d ${D}${FW_QCOM_PATH} + + install -m 0444 ./08-dspso/dspso.bin ${D}${FW_QCOM_PATH} + + install -d ${D}${sysconfdir}/ + install -m 0644 LICENSE.qcom.txt ${D}${sysconfdir}/QCOM-LINUX-BOARD-SUPPORT-LICENSE-${PN} +} + +SPLIT_FIRMWARE_PACKAGES = " \ + ${PN}-dspso \ +" diff --git a/recipes-bsp/firmware/firmware-qcom-sd-600eval_1.0.bb b/recipes-bsp/firmware/firmware-qcom-sd-600eval_1.0.bb deleted file mode 100644 index 89e9411..0000000 --- a/recipes-bsp/firmware/firmware-qcom-sd-600eval_1.0.bb +++ /dev/null @@ -1,27 +0,0 @@ -DESCRIPTION = "QCOM Firmware for Arrow SD 600eval" - -LICENSE = "Proprietary" -LIC_FILES_CHKSUM = "file://license.txt;md5=c09af6bc68c68f92e6a711634ee5cb14" - -SRC_URI = "https://eragon.einfochips.com/pub/media/datasheet/SD_600eval-linux_proprietary_firmware-v${PV}.zip" -SRC_URI[md5sum] = "0903e9f656d3cea005ecc8e26f1243b2" -SRC_URI[sha256sum] = "fdffcb2cedc0d0215ee3dec95ce3683a780d9280960d27200379fbe1b21af979" - -PACKAGE_ARCH = "${MACHINE_ARCH}" - -S = "${WORKDIR}/SD_600eval-linux_proprietary_firmware-v${PV}" - -do_compile() { - : -} - -do_install() { - install -d ${D}${nonarch_base_libdir}/firmware/ - cp -R --no-dereference --preserve=mode,links * ${D}${nonarch_base_libdir}/firmware/ - - install -d ${D}${sysconfdir}/ - install -m 0644 license.txt ${D}${sysconfdir}/ -} - -FILES_${PN} += "${nonarch_base_libdir}/firmware/*" -INSANE_SKIP_${PN} += "arch already-stripped" diff --git a/recipes-bsp/firmware/firmware-qcom-sm8150-hdk.bb b/recipes-bsp/firmware/firmware-qcom-sm8150-hdk.bb new file mode 100644 index 0000000..73c8a9b --- /dev/null +++ b/recipes-bsp/firmware/firmware-qcom-sm8150-hdk.bb @@ -0,0 +1,41 @@ +# Specify location of the corresponding NON-HLOS.bin file by adding +# NHLOS_URI:pn-firmware-qcom-sm8350-hdk = "..." to local.conf. Use "file://" +# if the file is provided locally. + +DESCRIPTION = "QCOM Firmware for SM8150 HDK (aka HDK855) board" + +LICENSE = "CLOSED" + +FW_QCOM_NAME = "sm8150" + +FW_QCOM_LIST = "\ + a640_zap.mbn \ + adsp.mbn adspr.jsn adspua.jsn \ + cdsp.mbn cdspr.jsn \ + ipa_fws.mbn \ + modem.mbn modemuw.jsn \ + slpi.mbn slpir.jsn \ +" + +require recipes-bsp/firmware/firmware-qcom.inc +require recipes-bsp/firmware/firmware-qcom-nhlos.inc +include recipes-bsp/firmware/firmware-qcom-adreno.inc + +SPLIT_FIRMWARE_PACKAGES = "\ + linux-firmware-qcom-${FW_QCOM_NAME}-adreno \ + linux-firmware-qcom-${FW_QCOM_NAME}-audio \ + linux-firmware-qcom-${FW_QCOM_NAME}-compute \ + linux-firmware-qcom-${FW_QCOM_NAME}-ipa \ + linux-firmware-qcom-${FW_QCOM_NAME}-modem \ + linux-firmware-qcom-${FW_QCOM_NAME}-sensors \ + linux-firmware-qcom-adreno-a640 \ +" + +do_install:append() { + if [ -n "${ADRENO_URI}" ] ; then + install -m 0644 ${WORKDIR}/adreno/${ADRENO_PATH}/a640_gmu.bin ${D}${FW_QCOM_BASE_PATH} + fi +} + +FILES:linux-firmware-qcom-adreno-a640 += "${FW_QCOM_BASE_PATH}/a640_gmu.bin" +RDEPENDS:linux-firmware-qcom-adreno-a640 += "linux-firmware-qcom-adreno-a630" diff --git a/recipes-bsp/firmware/firmware-qcom-sm8350-hdk.bb b/recipes-bsp/firmware/firmware-qcom-sm8350-hdk.bb new file mode 100644 index 0000000..f412673 --- /dev/null +++ b/recipes-bsp/firmware/firmware-qcom-sm8350-hdk.bb @@ -0,0 +1,31 @@ +# Specify location of the corresponding NON-HLOS.bin file by adding +# NHLOS_URI:pn-firmware-qcom-sm8350-hdk = "..." to local.conf. Use "file://" +# if the file is provided locally. + +DESCRIPTION = "QCOM Firmware for SM8350 HDK (aka HDK888) board" + +LICENSE = "CLOSED" + +FW_QCOM_NAME = "sm8350" + +FW_QCOM_LIST = "\ + a660_zap.mbn a615_zap.mbn \ + adsp.mbn adspr.jsn adspua.jsn battmgr.jsn \ + cdsp.mbn cdspr.jsn \ + ipa_fws.mbn \ + modem.mbn modemr.jsn \ + slpi.mbn slpir.jsn \ +" + +require recipes-bsp/firmware/firmware-qcom.inc +require recipes-bsp/firmware/firmware-qcom-nhlos.inc +require recipes-bsp/firmware/firmware-qcom-adreno.inc + +SPLIT_FIRMWARE_PACKAGES = "\ + linux-firmware-qcom-${FW_QCOM_NAME}-adreno \ + linux-firmware-qcom-${FW_QCOM_NAME}-audio \ + linux-firmware-qcom-${FW_QCOM_NAME}-compute \ + linux-firmware-qcom-${FW_QCOM_NAME}-ipa \ + linux-firmware-qcom-${FW_QCOM_NAME}-modem \ + linux-firmware-qcom-${FW_QCOM_NAME}-sensors \ +" diff --git a/recipes-bsp/firmware/firmware-qcom-sm8450-hdk.bb b/recipes-bsp/firmware/firmware-qcom-sm8450-hdk.bb new file mode 100644 index 0000000..b928bd6 --- /dev/null +++ b/recipes-bsp/firmware/firmware-qcom-sm8450-hdk.bb @@ -0,0 +1,44 @@ +# Specify location of the corresponding NON-HLOS.bin file by adding +# NHLOS_URI:pn-firmware-qcom-sm8450-hdk = "..." to local.conf. Use "file://" +# if the file is provided locally. + +DESCRIPTION = "QCOM Firmware for SM8450 HDK board" + +LICENSE = "CLOSED" + +FW_QCOM_NAME = "sm8450" + +FW_QCOM_LIST = "\ + a730_zap.mbn \ + adsp.mbn adspr.jsn adspua.jsn battmgr.jsn \ + cdsp.mbn cdspr.jsn \ + ipa_fws.mbn \ + modem.mbn modemr.jsn \ + slpi.mbn slpir.jsn slpius.jsn \ +" + +require recipes-bsp/firmware/firmware-qcom.inc +require recipes-bsp/firmware/firmware-qcom-nhlos.inc +require recipes-bsp/firmware/firmware-qcom-adreno.inc + +SPLIT_FIRMWARE_PACKAGES = "\ + linux-firmware-qcom-${FW_QCOM_NAME}-adreno \ + linux-firmware-qcom-${FW_QCOM_NAME}-audio \ + linux-firmware-qcom-${FW_QCOM_NAME}-compute \ + linux-firmware-qcom-${FW_QCOM_NAME}-ipa \ + linux-firmware-qcom-${FW_QCOM_NAME}-modem \ + linux-firmware-qcom-${FW_QCOM_NAME}-sensors \ + linux-firmware-qcom-adreno-a730 \ + linux-firmware-qcom-adreno-gmu-a700 \ +" + +do_install:append() { + if [ -n "${ADRENO_URI}" ] ; then + install -m 0644 ${WORKDIR}/adreno/${ADRENO_PATH}/a730_sqe.fw ${D}${FW_QCOM_BASE_PATH} + install -m 0644 ${WORKDIR}/adreno/${ADRENO_PATH}/gmu_gen70000.bin ${D}${FW_QCOM_BASE_PATH} + fi +} + +FILES:linux-firmware-qcom-adreno-a730 += "${FW_QCOM_BASE_PATH}/a730_sqe.fw" +FILES:linux-firmware-qcom-adreno-gmu-a700 += "${FW_QCOM_BASE_PATH}/gmu_gen70000.bin" +RDEPENDS:linux-firmware-qcom-adreno-a730 += "linux-firmware-qcom-adreno-gmu-a700" diff --git a/recipes-bsp/firmware/firmware-qcom.inc b/recipes-bsp/firmware/firmware-qcom.inc new file mode 100644 index 0000000..b892f90 --- /dev/null +++ b/recipes-bsp/firmware/firmware-qcom.inc @@ -0,0 +1,57 @@ +inherit allarch + +FILES:${PN} += "${nonarch_base_libdir}/firmware/" + +INSANE_SKIP:${PN} += "arch already-stripped" + +# Default settings +# package name part in linux-firmware-qcom-...-audio +FW_QCOM_NAME ?= "unset" +# Subdir inside /lib/firmware/qcom. Typically it is equal to FW_QCOM_NAME but might differ in complex cases (like C630 Yoga). +FW_QCOM_SUBDIR ?= "${FW_QCOM_NAME}" +FW_QCOM_BASE_PATH = "${nonarch_base_libdir}/firmware/qcom" +FW_QCOM_PATH = "${FW_QCOM_BASE_PATH}/${FW_QCOM_SUBDIR}" + +SPLIT_FIRMWARE_PACKAGES ?= "" + +PACKAGE_BEFORE_PN += "${SPLIT_FIRMWARE_PACKAGES}" +# RRECOMMEND all non-split packages split from this recipe. Split firmware files re usually replaced with the squashed ones. +RRECOMMENDS:${PN} += "${@ ' '.join(filter(lambda p: not p.endswith('-split'), d.getVar('SPLIT_FIRMWARE_PACKAGES').split())) }" + +# Default settings for several split packages +FILES:${PN}-dspso += "${FW_QCOM_BASE_PATH}/*/*dspso.bin" +FILES:linux-firmware-qcom-${FW_QCOM_NAME}-adreno = "${FW_QCOM_PATH}/*_zap.mbn" +FILES:linux-firmware-qcom-${FW_QCOM_NAME}-audio = "${FW_QCOM_PATH}/adsp.mbn ${FW_QCOM_PATH}/adsp*.jsn" +FILES:linux-firmware-qcom-${FW_QCOM_NAME}-audio-split = "${FW_QCOM_PATH}/adsp.mdt ${FW_QCOM_PATH}/adsp.b*" +FILES:linux-firmware-qcom-${FW_QCOM_NAME}-compute = "${FW_QCOM_PATH}/cdsp.mbn ${FW_QCOM_PATH}/cdsp*.jsn" +FILES:linux-firmware-qcom-${FW_QCOM_NAME}-compute-split = "${FW_QCOM_PATH}/cdsp.mdt ${FW_QCOM_PATH}/cdsp.b*" +FILES:linux-firmware-qcom-${FW_QCOM_NAME}-dsps = "${FW_QCOM_PATH}/dsps.mbn" +FILES:linux-firmware-qcom-${FW_QCOM_NAME}-gss = "${FW_QCOM_PATH}/gss.mbn" +FILES:linux-firmware-qcom-${FW_QCOM_NAME}-ipa = "${FW_QCOM_PATH}/ipa_fws.mbn" +FILES:linux-firmware-qcom-${FW_QCOM_NAME}-modem = "${FW_QCOM_PATH}/mba.mbn ${FW_QCOM_PATH}/modem.mbn ${FW_QCOM_PATH}/modem*.jsn" +FILES:linux-firmware-qcom-${FW_QCOM_NAME}-modem-split = "${FW_QCOM_PATH}/modem.mdt ${FW_QCOM_PATH}/modem.b*" +FILES:linux-firmware-qcom-${FW_QCOM_NAME}-q6 = "${FW_QCOM_PATH}/q6.mbn" +FILES:linux-firmware-qcom-${FW_QCOM_NAME}-sensors = "${FW_QCOM_PATH}/slpi.mbn ${FW_QCOM_PATH}/slpi*.jsn" +FILES:linux-firmware-qcom-${FW_QCOM_NAME}-sensors-split = "${FW_QCOM_PATH}/slpi.mdt ${FW_QCOM_PATH}/slpi.b*" +FILES:linux-firmware-qcom-${FW_QCOM_NAME}-venus = "${FW_QCOM_PATH}/venus.mbn ${FW_QCOM_PATH}/vidc*" +FILES:linux-firmware-qcom-${FW_QCOM_NAME}-wifi = "${FW_QCOM_PATH}/wcnss.mbn ${FW_QCOM_PATH}/wlanmdsp.mbn" +FILES:linux-firmware-qcom-${FW_QCOM_NAME}-wifi-split = "${FW_QCOM_PATH}/wcnss.mdt ${FW_QCOM_PATH}/wcnss.b*" + +python() { + pn = d.getVar("PN") + insanes = d.getVar("INSANE_SKIP:%s" % pn) + for pkg in d.getVar("SPLIT_FIRMWARE_PACKAGES").split(): + # Depend on the main package to get the license file + d.appendVar("RDEPENDS:" + pkg, " " + pn) + # and append the INSANE_SKIP of the main package to pass QA + d.appendVar("INSANE_SKIP:" + pkg, " " + insanes) + # If it's a package with the split frmware, depend on non-split files (for jsn files, etc) + if pkg.endswith("-split"): + d.appendVar("RDEPENDS:" + pkg, " " + pkg[:-6]) + if d.getVar("FW_QCOM_NAME") == "unset" and d.getVar("SPLIT_FIRMWARE_PACKAGES") != "": + bb.error("%s: split firmware-qcom packages engaged, but FW_QCOM_NAME is not defined" % pn) +} + +INHIBIT_PACKAGE_DEBUG_SPLIT = "1" +INHIBIT_PACKAGE_STRIP = "1" +INHIBIT_DEFAULT_DEPS = "1" diff --git a/recipes-bsp/firmware/firmware-wcn6855_git.bb b/recipes-bsp/firmware/firmware-wcn6855_git.bb new file mode 100644 index 0000000..2283519 --- /dev/null +++ b/recipes-bsp/firmware/firmware-wcn6855_git.bb @@ -0,0 +1,52 @@ +SUMMARY = "Firmware files for Qualcomm/Atheros WCN6855 SoC" + +LICENSE = "Firmware-qualcommAthos_ath10k" +LIC_FILES_CHKSUM = "file://LICENSE.QualcommAtheros_ath10k;md5=cb42b686ee5f5cb890275e4321db60a8" +NO_GENERIC_LICENSE[Firmware-qualcommAthos_ath10k] = "LICENSE.QualcommAtheros_ath10k" + +SRC_URI = "git://chromium.googlesource.com/chromiumos/third_party/linux-firmware;protocol=https;branch=master" +SRCREV = "d233ddd89abe06448070471963a58c0a7da81d79" + +PV = "1.1-01720.1+git${SRCPV}" + +S = "${WORKDIR}/git" + +inherit allarch + +CLEANBROKEN = "1" + +do_compile() { + : +} + +FWDIR = "${nonarch_base_libdir}/firmware/ath11k/WCN6855/hw2.0" +FWDIR21 = "${nonarch_base_libdir}/firmware/ath11k/WCN6855/hw2.1" + +do_install() { + install -d ${D}${FWDIR} + + install -m 0644 ath11k/WCN6855/hw2.0/* ${D}${FWDIR} + + install -d ${D}${FWDIR21} + ln -sr ${D}${FWDIR}/board.bin ${D}${FWDIR21}/ +} + +inherit update-alternatives + +ALTERNATIVE:${PN} += "wcn6855-hw20-amss wcn6855-hw20-m3 wcn6855-hw20-regdb" +ALTERNATIVE_LINK_NAME[wcn6855-hw20-amss] = "${nonarch_base_libdir}/firmware/ath11k/WCN6855/hw2.0/amss.bin" +ALTERNATIVE_LINK_NAME[wcn6855-hw20-m3] = "${nonarch_base_libdir}/firmware/ath11k/WCN6855/hw2.0/m3.bin" +ALTERNATIVE_LINK_NAME[wcn6855-hw20-regdb] = "${nonarch_base_libdir}/firmware/ath11k/WCN6855/hw2.0/regdb.bin" +ALTERNATIVE_PRIORITY = "100" + +PACKAGE_BEFORE_PN = "${PN}-board" + +RDEPENDS:${PN}-board += "${PN}" +RDEPENDS:${PN} += "linux-firmware-ath10k-license" + +FILES:${PN} = "${FWDIR}" +FILES:${PN}-board = "${FWDIR}/board*.bin ${FWDIR21}/board*.bin" + +# Firmware files are generally not ran on the CPU, so they can be +# allarch despite being architecture specific +INSANE_SKIP = "arch" diff --git a/recipes-bsp/images/initramfs-firmware-db8074-image.bb b/recipes-bsp/images/initramfs-firmware-db8074-image.bb new file mode 100644 index 0000000..c531a23 --- /dev/null +++ b/recipes-bsp/images/initramfs-firmware-db8074-image.bb @@ -0,0 +1,7 @@ +DESCRIPTION = "Tiny ramdisk image with Dragonboard APQ8074 firmware files" + +PACKAGE_INSTALL += " \ + packagegroup-firmware-dragonboard-apq8074 \ +" + +require initramfs-firmware-image.inc diff --git a/recipes-bsp/images/initramfs-firmware-ifc6560-image.bb b/recipes-bsp/images/initramfs-firmware-ifc6560-image.bb new file mode 100644 index 0000000..c667b77 --- /dev/null +++ b/recipes-bsp/images/initramfs-firmware-ifc6560-image.bb @@ -0,0 +1,16 @@ +DESCRIPTION = "Tiny ramdisk image with all Nexus and Pixel devices firmware files" + +PACKAGE_INSTALL += " \ + packagegroup-firmware-ifc6560 \ +" + +BAD_RECOMMENDATIONS = "\ + linux-firmware-qcom-sda660-audio \ + linux-firmware-qcom-sda660-compute \ + linux-firmware-qcom-sda660-modem \ + linux-firmware-qcom-sda660-venus \ + linux-firmware-qca \ + linux-firmware-ath10k \ +" + +require initramfs-firmware-image.inc diff --git a/recipes-bsp/images/initramfs-firmware-image.bb b/recipes-bsp/images/initramfs-firmware-image.bb new file mode 100644 index 0000000..61b2e95 --- /dev/null +++ b/recipes-bsp/images/initramfs-firmware-image.bb @@ -0,0 +1,29 @@ +DESCRIPTION = "Tiny ramdisk image with firmware files" + +# Do not install anything by default +PACKAGE_INSTALL = "" + +PACKAGE_INSTALL:qcom-armv8a = " \ + packagegroup-firmware-dragonboard410c \ + packagegroup-firmware-dragonboard820c \ + packagegroup-firmware-dragonboard845c \ + packagegroup-firmware-rb1 \ + packagegroup-firmware-rb2 \ + packagegroup-firmware-rb5 \ + ${@bb.utils.contains('DISTRO_FEATURES', 'wifi', 'wireless-regdb-static', '', d)} \ +" + +BAD_RECOMMENDATIONS = " \ + firmware-qcom-dragonboard820c-dspso \ + firmware-qcom-dragonboard845c-dspso \ + firmware-qcom-rb1-dspso \ + firmware-qcom-rb2-dspso \ + firmware-qcom-rb5-dspso \ +" + +PACKAGE_INSTALL:qcom-armv7a = " \ + packagegroup-firmware-ifc6410 \ + firmware-qcom-nexus7-2013 \ +" + +require initramfs-firmware-image.inc diff --git a/recipes-bsp/images/initramfs-firmware-image.inc b/recipes-bsp/images/initramfs-firmware-image.inc new file mode 100644 index 0000000..2ce4f36 --- /dev/null +++ b/recipes-bsp/images/initramfs-firmware-image.inc @@ -0,0 +1,17 @@ +# We do not use kernel image or kernel modules in the image, so remove the +# dependency on the kernel +KERNELDEPMODDEPEND = "" +KERNEL_DEPLOY_DEPEND = "" + +IMAGE_LINGUAS = "" +LICENSE = "MIT" + +IMAGE_FSTYPES = "${INITRAMFS_FSTYPES}" +IMAGE_NAME_SUFFIX ?= "" +inherit core-image + +IMAGE_ROOTFS_SIZE = "8192" +IMAGE_ROOTFS_EXTRA_SPACE = "0" + +# Inhibit installing /init +IMAGE_BUILDING_DEBUGFS = "true" diff --git a/recipes-bsp/images/initramfs-firmware-nexus-image.bb b/recipes-bsp/images/initramfs-firmware-nexus-image.bb new file mode 100644 index 0000000..668d993 --- /dev/null +++ b/recipes-bsp/images/initramfs-firmware-nexus-image.bb @@ -0,0 +1,24 @@ +DESCRIPTION = "Tiny ramdisk image with all Nexus and Pixel devices firmware files" + +# Firmware support for newer Nexus and Pixel devices depends on simg2img, which +# is provided by the meta-oe only. So they are split into the bbappend in +# dynamic-layers/openembedded-layer. +PACKAGE_INSTALL += " \ + firmware-qcom-nexus4 \ + firmware-qcom-nexus5 \ + firmware-qcom-nexus5x \ + firmware-qcom-nexus6 \ + firmware-qcom-nexus6p \ + firmware-qcom-nexus7-2013 \ + firmware-qcom-pixel \ + firmware-qcom-pixel2 \ + firmware-qcom-pixel3 \ + firmware-qcom-pixel3a \ + firmware-qcom-pixel4 \ + firmware-qcom-pixel4a \ + firmware-qcom-pixel4a-5g \ + firmware-qcom-pixel5 \ + firmware-qcom-pixel5a-5g \ +" + +require initramfs-firmware-image.inc diff --git a/recipes-bsp/images/initramfs-firmware-rb12-image.bb b/recipes-bsp/images/initramfs-firmware-rb12-image.bb new file mode 100644 index 0000000..30c793a --- /dev/null +++ b/recipes-bsp/images/initramfs-firmware-rb12-image.bb @@ -0,0 +1,14 @@ +DESCRIPTION = "Tiny ramdisk image with RB1/RB2 devices firmware files" + +PACKAGE_INSTALL += " \ + packagegroup-firmware-rb1 \ + packagegroup-firmware-rb2 \ +" + +BAD_RECOMMENDATIONS = " \ + firmware-qcom-rb1-dspso \ + firmware-qcom-rb2-dspso \ + linux-firmware-qcom-venus-6.0 \ +" + +require initramfs-firmware-image.inc diff --git a/recipes-bsp/images/initramfs-firmware-sm8150-hdk-image.bb b/recipes-bsp/images/initramfs-firmware-sm8150-hdk-image.bb new file mode 100644 index 0000000..3ffcbe7 --- /dev/null +++ b/recipes-bsp/images/initramfs-firmware-sm8150-hdk-image.bb @@ -0,0 +1,11 @@ +DESCRIPTION = "Tiny ramdisk image with SM8150 HDK devices firmware files" + +PACKAGE_INSTALL += " \ + packagegroup-firmware-sm8150-hdk \ +" + +BAD_RECOMMENDATIONS = " \ + linux-firmware-qcom-sm8150-sensors \ +" + +require initramfs-firmware-image.inc diff --git a/recipes-bsp/images/initramfs-firmware-sm8350-hdk-image.bb b/recipes-bsp/images/initramfs-firmware-sm8350-hdk-image.bb new file mode 100644 index 0000000..587012e --- /dev/null +++ b/recipes-bsp/images/initramfs-firmware-sm8350-hdk-image.bb @@ -0,0 +1,11 @@ +DESCRIPTION = "Tiny ramdisk image with SM8350 HDK devices firmware files" + +PACKAGE_INSTALL += " \ + packagegroup-firmware-sm8350-hdk \ +" + +BAD_RECOMMENDATIONS = " \ + linux-firmware-qcom-sm8350-sensors \ +" + +require initramfs-firmware-image.inc diff --git a/recipes-bsp/images/initramfs-firmware-sm8450-hdk-image.bb b/recipes-bsp/images/initramfs-firmware-sm8450-hdk-image.bb new file mode 100644 index 0000000..4c2cf62 --- /dev/null +++ b/recipes-bsp/images/initramfs-firmware-sm8450-hdk-image.bb @@ -0,0 +1,11 @@ +DESCRIPTION = "Tiny ramdisk image with SM8450 HDK devices firmware files" + +PACKAGE_INSTALL += " \ + packagegroup-firmware-sm8450-hdk \ +" + +BAD_RECOMMENDATIONS = " \ + linux-firmware-qcom-sm8450-sensors \ +" + +require initramfs-firmware-image.inc diff --git a/recipes-bsp/packagegroups/packagegroup-firmware-dragonboard-apq8074.bb b/recipes-bsp/packagegroups/packagegroup-firmware-dragonboard-apq8074.bb new file mode 100644 index 0000000..7432a89 --- /dev/null +++ b/recipes-bsp/packagegroups/packagegroup-firmware-dragonboard-apq8074.bb @@ -0,0 +1,10 @@ +SUMMARY = "Firmware packages for the Dragonboard APQ8074 board" + +inherit packagegroup + +RRECOMMENDS:${PN} += " \ + ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'linux-firmware-qcom-adreno-a3xx', '', d)} \ + linux-firmware-qcom-apq8074-audio \ + linux-firmware-qcom-apq8074-modem \ + linux-firmware-qcom-apq8074-wifi \ +" diff --git a/recipes-bsp/packagegroups/packagegroup-firmware-dragonboard410c.bb b/recipes-bsp/packagegroups/packagegroup-firmware-dragonboard410c.bb new file mode 100644 index 0000000..8b55a3b --- /dev/null +++ b/recipes-bsp/packagegroups/packagegroup-firmware-dragonboard410c.bb @@ -0,0 +1,11 @@ +SUMMARY = "Firmware packages for the DragonBoard 410c board" + +inherit packagegroup + +RRECOMMENDS:${PN} += " \ + firmware-qcom-dragonboard410c \ + ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'linux-firmware-qcom-adreno-a3xx', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'wifi', 'linux-firmware-qcom-apq8016-wifi', '', d)} \ + linux-firmware-qcom-apq8016-modem \ + linux-firmware-qcom-venus-1.8 \ +" diff --git a/recipes-bsp/packagegroups/packagegroup-firmware-dragonboard820c.bb b/recipes-bsp/packagegroups/packagegroup-firmware-dragonboard820c.bb new file mode 100644 index 0000000..d7339a4 --- /dev/null +++ b/recipes-bsp/packagegroups/packagegroup-firmware-dragonboard820c.bb @@ -0,0 +1,13 @@ +SUMMARY = "Firmware packages for the DragonBoard 820c board" + +inherit packagegroup + +RRECOMMENDS:${PN} += " \ + firmware-qcom-dragonboard820c \ + ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'linux-firmware-qcom-adreno-a530 linux-firmware-qcom-apq8096-adreno', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'wifi', 'linux-firmware-ath10k', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'bluetooth', 'linux-firmware-qca', '', d)} \ + linux-firmware-qcom-apq8096-audio \ + linux-firmware-qcom-apq8096-modem \ + linux-firmware-qcom-venus-4.2 \ +" diff --git a/recipes-bsp/packagegroups/packagegroup-firmware-dragonboard845c.bb b/recipes-bsp/packagegroups/packagegroup-firmware-dragonboard845c.bb new file mode 100644 index 0000000..66b9005 --- /dev/null +++ b/recipes-bsp/packagegroups/packagegroup-firmware-dragonboard845c.bb @@ -0,0 +1,13 @@ +SUMMARY = "Firmware packages for the DragonBoard 845c board" + +inherit packagegroup + +RRECOMMENDS:${PN} += " \ + firmware-qcom-dragonboard845c \ + ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'linux-firmware-qcom-adreno-a630 linux-firmware-qcom-sdm845-adreno', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'wifi', 'linux-firmware-ath10k linux-firmware-qcom-sdm845-modem', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'bluetooth', 'linux-firmware-qca linux-firmware-qcom-sdm845-modem', '', d)} \ + linux-firmware-qcom-sdm845-audio \ + linux-firmware-qcom-sdm845-compute \ + linux-firmware-qcom-venus-5.2 \ +" diff --git a/recipes-bsp/packagegroups/packagegroup-firmware-ifc6410.bb b/recipes-bsp/packagegroups/packagegroup-firmware-ifc6410.bb new file mode 100644 index 0000000..8b22ef8 --- /dev/null +++ b/recipes-bsp/packagegroups/packagegroup-firmware-ifc6410.bb @@ -0,0 +1,14 @@ +SUMMARY = "Firmware packages for the IFC6410 board" + +inherit packagegroup + +RRECOMMENDS:${PN} += " \ + ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'linux-firmware-qcom-adreno-a3xx', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'wifi', 'linux-firmware-ath6k firmware-ath6kl', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'bluetooth', 'linux-firmware-ar3k', '', d)} \ + firmware-qcom-ifc6410 \ + linux-firmware-qcom-apq8064-dsps \ + linux-firmware-qcom-apq8064-gss \ + linux-firmware-qcom-apq8064-q6 \ + linux-firmware-qcom-apq8064-wifi \ +" diff --git a/recipes-bsp/packagegroups/packagegroup-firmware-ifc6560.bb b/recipes-bsp/packagegroups/packagegroup-firmware-ifc6560.bb new file mode 100644 index 0000000..8b3507b --- /dev/null +++ b/recipes-bsp/packagegroups/packagegroup-firmware-ifc6560.bb @@ -0,0 +1,14 @@ +SUMMARY = "Firmware packages for the IFC6560 board" + +inherit packagegroup + +RRECOMMENDS:${PN} += " \ + ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'linux-firmware-qcom-adreno-a530 linux-firmware-qcom-sda660-adreno', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'bluetooth', 'linux-firmware-qca', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'wifi', 'linux-firmware-ath10k', '', d)} \ + firmware-qcom-ifc6560 \ + linux-firmware-qcom-sda660-audio \ + linux-firmware-qcom-sda660-compute \ + linux-firmware-qcom-sda660-modem \ + linux-firmware-qcom-sda660-venus \ +" diff --git a/recipes-bsp/packagegroups/packagegroup-firmware-lenovo-x13s.bb b/recipes-bsp/packagegroups/packagegroup-firmware-lenovo-x13s.bb new file mode 100644 index 0000000..dc63332 --- /dev/null +++ b/recipes-bsp/packagegroups/packagegroup-firmware-lenovo-x13s.bb @@ -0,0 +1,12 @@ +SUMMARY = "Firmware packages for the Lenovo X13s laptop" + +inherit packagegroup + +RRECOMMENDS:${PN} += " \ + ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'linux-firmware-qcom-sc8280xp-lenovo-x13s-adreno', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'wifi', 'linux-firmware-ath11k', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'bluetooth', 'linux-firmware-qca', '', d)} \ + linux-firmware-qcom-sc8280xp-lenovo-x13s-audio \ + linux-firmware-qcom-sc8280xp-lenovo-x13s-compute \ + linux-firmware-qcom-sc8280xp-lenovo-x13s-sensors \ +" diff --git a/recipes-bsp/packagegroups/packagegroup-firmware-rb1.bb b/recipes-bsp/packagegroups/packagegroup-firmware-rb1.bb new file mode 100644 index 0000000..6ff96ab --- /dev/null +++ b/recipes-bsp/packagegroups/packagegroup-firmware-rb1.bb @@ -0,0 +1,13 @@ +SUMMARY = "Firmware packages for the RB1 Robotics platform" + +inherit packagegroup + +RRECOMMENDS:${PN} += " \ + firmware-qcom-rb1 \ + ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'linux-firmware-qcom-adreno-a630 linux-firmware-qcom-qcm2290-adreno', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'wifi', 'linux-firmware-ath10k linux-firmware-qcom-qcm2290-wifi ', '', d)} \ + linux-firmware-lt9611uxc \ + linux-firmware-qcom-qcm2290-audio \ + linux-firmware-qcom-qcm2290-modem \ + linux-firmware-qcom-venus-6.0 \ +" diff --git a/recipes-bsp/packagegroups/packagegroup-firmware-rb2.bb b/recipes-bsp/packagegroups/packagegroup-firmware-rb2.bb new file mode 100644 index 0000000..9f622df --- /dev/null +++ b/recipes-bsp/packagegroups/packagegroup-firmware-rb2.bb @@ -0,0 +1,14 @@ +SUMMARY = "Firmware packages for the RB2 Robotics platform" + +inherit packagegroup + +RRECOMMENDS:${PN} += " \ + firmware-qcom-rb2 \ + ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'linux-firmware-qcom-adreno-a630 linux-firmware-qcom-qrb4210-adreno', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'wifi', 'linux-firmware-ath10k linux-firmware-qcom-qrb4210-wifi', '', d)} \ + linux-firmware-lt9611uxc \ + linux-firmware-qcom-qrb4210-audio \ + linux-firmware-qcom-qrb4210-compute \ + linux-firmware-qcom-qrb4210-modem \ + linux-firmware-qcom-venus-6.0 \ +" diff --git a/recipes-bsp/packagegroups/packagegroup-firmware-rb5.bb b/recipes-bsp/packagegroups/packagegroup-firmware-rb5.bb new file mode 100644 index 0000000..b0f0702 --- /dev/null +++ b/recipes-bsp/packagegroups/packagegroup-firmware-rb5.bb @@ -0,0 +1,14 @@ +SUMMARY = "Firmware packages for the RB5 Robotics platform" + +inherit packagegroup + +RRECOMMENDS:${PN} += " \ + firmware-qcom-rb5 \ + ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'linux-firmware-qcom-adreno-a650 linux-firmware-qcom-sm8250-adreno', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'wifi', 'linux-firmware-ath11k', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'bluetooth', 'linux-firmware-qca', '', d)} \ + linux-firmware-lt9611uxc \ + linux-firmware-qcom-sm8250-audio \ + linux-firmware-qcom-sm8250-compute \ + linux-firmware-qcom-vpu-1.0 \ +" diff --git a/recipes-bsp/packagegroups/packagegroup-firmware-sm8150-hdk.bb b/recipes-bsp/packagegroups/packagegroup-firmware-sm8150-hdk.bb new file mode 100644 index 0000000..935b8b6 --- /dev/null +++ b/recipes-bsp/packagegroups/packagegroup-firmware-sm8150-hdk.bb @@ -0,0 +1,15 @@ +SUMMARY = "Firmware packages for the SM8150-HDK (aka HDK855) board" + +inherit packagegroup + +RRECOMMENDS:${PN} += " \ + ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'linux-firmware-qcom-adreno-a640 linux-firmware-qcom-sm8150-adreno', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'bluetooth', 'linux-firmware-qca', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'wifi', 'linux-firmware-ath11k', '', d)} \ + firmware-qcom-sm8150-hdk \ + linux-firmware-qcom-sm8150-audio \ + linux-firmware-qcom-sm8150-compute \ + linux-firmware-qcom-sm8150-ipa \ + linux-firmware-qcom-sm8150-modem \ + linux-firmware-qcom-sm8150-sensors \ +" diff --git a/recipes-bsp/packagegroups/packagegroup-firmware-sm8350-hdk.bb b/recipes-bsp/packagegroups/packagegroup-firmware-sm8350-hdk.bb new file mode 100644 index 0000000..0b1f548 --- /dev/null +++ b/recipes-bsp/packagegroups/packagegroup-firmware-sm8350-hdk.bb @@ -0,0 +1,17 @@ +SUMMARY = "Firmware packages for the SM8350-HDK (aka HDK888) board" + +inherit packagegroup + +RRECOMMENDS:${PN} += " \ + ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'linux-firmware-qcom-adreno-a660', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'bluetooth', 'linux-firmware-qca', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'wifi', 'linux-firmware-ath11k', '', d)} \ + firmware-qcom-sm8350-hdk \ + linux-firmware-qcom-sm8350-adreno \ + linux-firmware-qcom-sm8350-audio \ + linux-firmware-qcom-sm8350-compute \ + linux-firmware-qcom-sm8350-ipa \ + linux-firmware-qcom-sm8350-modem \ + linux-firmware-qcom-sm8350-sensors \ + linux-firmware-qcom-vpu-2.0 \ +" diff --git a/recipes-bsp/packagegroups/packagegroup-firmware-sm8450-hdk.bb b/recipes-bsp/packagegroups/packagegroup-firmware-sm8450-hdk.bb new file mode 100644 index 0000000..e895ca4 --- /dev/null +++ b/recipes-bsp/packagegroups/packagegroup-firmware-sm8450-hdk.bb @@ -0,0 +1,14 @@ +SUMMARY = "Firmware packages for the SM8450-HDK board" + +inherit packagegroup + +RRECOMMENDS:${PN} += " \ + ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'linux-firmware-qcom-adreno-a730 linux-firmware-qcom-sm8450-adreno', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'bluetooth', 'linux-firmware-qca', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'wifi', 'linux-firmware-ath11k', '', d)} \ + firmware-qcom-sm8450-hdk \ + linux-firmware-qcom-sm8450-audio \ + linux-firmware-qcom-sm8450-compute \ + linux-firmware-qcom-sm8450-modem \ + linux-firmware-qcom-sm8450-sensors \ +" diff --git a/recipes-devtools/debugcc/debugcc_git.bb b/recipes-devtools/debugcc/debugcc_git.bb new file mode 100644 index 0000000..6907a61 --- /dev/null +++ b/recipes-devtools/debugcc/debugcc_git.bb @@ -0,0 +1,26 @@ +SUMMARY = "A tool to debug Qualcomm clock controllers." +HOMEPAGE = "https://github.com/andersson/debugcc/" +SECTION = "devel" + +LICENSE = "BSD-3-Clause" +LIC_FILES_CHKSUM = "file://debugcc.c;beginline=5;endline=29;md5=5598b6b886a3af944e4d19bb7d947095" + +SRC_URI = "\ + git://github.com/andersson/debugcc.git;branch=master;protocol=https \ +" + +SRCREV = "1f2d56984ec60e6ca0a18718c75c4e593542cefc" + +PV = "0.0+git${SRCPV}" + +S = "${WORKDIR}/git" + +EXTRA_OEMAKE = "CC='${CC}' CPPFLAGS='${CPPFLAGS}' CFLAGS='${CFLAGS}' LDFLAGS='${LDFLAGS}'" + +do_install() { + install -d ${D}${bindir} + install -m 0755 ${B}/debugcc ${D}${bindir} + for f in ${B}/*-debugcc ; do + ln -r -s -T ${D}${bindir}/debugcc ${D}${bindir}/`basename $f` + done +} diff --git a/recipes-devtools/pil-squasher/pil-squasher_git.bb b/recipes-devtools/pil-squasher/pil-squasher_git.bb new file mode 100644 index 0000000..0095282 --- /dev/null +++ b/recipes-devtools/pil-squasher/pil-squasher_git.bb @@ -0,0 +1,21 @@ +SUMMARY = "MDT to MBN conversion tool" +HOMEPAGE = "https://github.com/andersson/pil-squasher.git" +SECTION = "devel" + +LICENSE = "BSD-3-Clause" +LIC_FILES_CHKSUM = "file://pil-squasher.c;beginline=1;endline=30;md5=632a4253d26470c9301255e9a3dc31a0" + +SRCREV = "e8573feaad506f5f41227d8abd905312426607c1" +SRC_URI = " \ + git://github.com/andersson/${BPN}.git;branch=master;protocol=https \ +" + +PV = "0.0+${SRCPV}" + +S = "${WORKDIR}/git" + +do_install () { + oe_runmake install DESTDIR=${D} prefix=${prefix} +} + +BBCLASSEXTEND = "native nativesdk" diff --git a/recipes-devtools/qc-image-unpacker/qc-image-unpacker/0001-Move-image-format-detection-to-separate-handlers.patch b/recipes-devtools/qc-image-unpacker/qc-image-unpacker/0001-Move-image-format-detection-to-separate-handlers.patch new file mode 100644 index 0000000..468d9db --- /dev/null +++ b/recipes-devtools/qc-image-unpacker/qc-image-unpacker/0001-Move-image-format-detection-to-separate-handlers.patch @@ -0,0 +1,140 @@ +From 6b8c83b622984360e4b130e8dd9206c0bca5bffb Mon Sep 17 00:00:00 2001 +From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Date: Wed, 10 Nov 2021 01:13:00 +0300 +Subject: [PATCH 1/4] Move image format detection to separate handlers + +In preparation to adding another file format, separate header checks +into foo_image_detect() functions, to keep all the details away from the +main file. + +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +--- + src/meta_image.c | 12 ++++++++++++ + src/meta_image.h | 1 + + src/packed_image.c | 12 ++++++++++++ + src/packed_image.h | 1 + + src/qc_image_unpacker.c | 16 ++++++++-------- + 5 files changed, 34 insertions(+), 8 deletions(-) + +diff --git a/src/meta_image.c b/src/meta_image.c +index eecf87871a44..300b3fecd796 100644 +--- a/src/meta_image.c ++++ b/src/meta_image.c +@@ -25,6 +25,18 @@ + #include "common.h" + #include "utils.h" + ++bool meta_image_detect(u1 *buf, size_t bufSz) ++{ ++ meta_header_t *pMetaHeader; ++ ++ if (bufSz < sizeof(meta_header_t)) ++ return false; ++ ++ pMetaHeader = (meta_header_t *)buf; ++ ++ return pMetaHeader->magic == META_IMG_MAGIC; ++} ++ + bool meta_image_extract(u1 *buf, size_t bufSz, char *filePath, char *outputDir) { + meta_header_t *pMetaHeader; + meta_img_header_entry_t *pImgHeaderEntry; +diff --git a/src/meta_image.h b/src/meta_image.h +index 67c1b6d7835f..2bae503f89df 100644 +--- a/src/meta_image.h ++++ b/src/meta_image.h +@@ -44,6 +44,7 @@ typedef struct meta_img_header_entry { + u4 size; + } meta_img_header_entry_t; + ++bool meta_image_detect(u1 *, size_t); + bool meta_image_extract(u1 *, size_t, char *, char *); + + #endif +diff --git a/src/packed_image.c b/src/packed_image.c +index 4117b14f81a0..585772a2cfac 100644 +--- a/src/packed_image.c ++++ b/src/packed_image.c +@@ -25,6 +25,18 @@ + #include "common.h" + #include "utils.h" + ++bool packed_image_detect(u1 *buf, size_t bufSz) ++{ ++ packed_header_t *pPackedHeader; ++ ++ if (bufSz < sizeof(packed_header_t)) ++ return false; ++ ++ pPackedHeader = (packed_header_t *)buf; ++ ++ return pPackedHeader->magic == PACKED_IMG_MAGIC; ++} ++ + static bool process_fbpt(u1 *buf, size_t bufSz) { + fbpt_header_t *pFBPT = (fbpt_header_t *)buf; + if (pFBPT->signature != FBPT_SIGNATURE) { +diff --git a/src/packed_image.h b/src/packed_image.h +index f66ce2cf22f2..fba081dc1426 100644 +--- a/src/packed_image.h ++++ b/src/packed_image.h +@@ -110,6 +110,7 @@ typedef struct fbpt_entry { + char pad[2]; // Usually is 0x3030 + } fbpt_entry_t; // sizeof == 124 + ++bool packed_image_detect(u1 *, size_t); + bool packed_image_extract(u1 *, size_t, char *, char *); + + #endif +diff --git a/src/qc_image_unpacker.c b/src/qc_image_unpacker.c +index 4fbe8fa6ad6e..44d737803ea0 100644 +--- a/src/qc_image_unpacker.c ++++ b/src/qc_image_unpacker.c +@@ -122,8 +122,6 @@ int main(int argc, char **argv) { + off_t fileSz = 0; + int srcfd = -1; + u1 *buf = NULL; +- meta_header_t *pMetaHeader; +- packed_header_t *pPackedHeader; + + LOGMSG(l_DEBUG, "Processing '%s'", pFiles.files[f]); + +@@ -133,27 +131,29 @@ int main(int argc, char **argv) { + continue; + } + +- if ((size_t)fileSz < sizeof(meta_header_t) && (size_t)fileSz < sizeof(packed_header_t)) { ++ /* ++ * Check only if we have something to detect here. ++ * Individual _image_detect() functions check header size. ++ */ ++ if ((size_t)fileSz < sizeof(u4)) { + LOGMSG(l_ERROR, "Invalid input size - skipping '%s'", pFiles.files[f]); + goto next_file; + } + +- pMetaHeader = (meta_header_t *)buf; +- pPackedHeader = (packed_header_t *)buf; +- if (pMetaHeader->magic == META_IMG_MAGIC) { ++ if (meta_image_detect(buf, (size_t)fileSz)) { + LOGMSG(l_DEBUG, "Meta image header found"); + if (!meta_image_extract(buf, (size_t)fileSz, pFiles.files[f], pRunArgs.outputDir)) { + LOGMSG(l_ERROR, "Skipping '%s'", pFiles.files[f]); + goto next_file; + } +- } else if (pPackedHeader->magic == PACKED_IMG_MAGIC) { ++ } else if (packed_image_detect(buf, (size_t)fileSz)) { + LOGMSG(l_DEBUG, "packed image header found"); + if (!packed_image_extract(buf, (size_t)fileSz, pFiles.files[f], pRunArgs.outputDir)) { + LOGMSG(l_ERROR, "Skipping '%s'", pFiles.files[f]); + goto next_file; + } + } else { +- LOGMSG(l_ERROR, "Invalid magic header 0x%x - skipping '%s'", pMetaHeader->magic, ++ LOGMSG(l_ERROR, "Invalid magic header 0x%x - skipping '%s'", *(u4*)buf, + pFiles.files[f]); + goto next_file; + } +-- +2.35.1 + diff --git a/recipes-devtools/qc-image-unpacker/qc-image-unpacker/0002-Add-support-for-bootldr-images.patch b/recipes-devtools/qc-image-unpacker/qc-image-unpacker/0002-Add-support-for-bootldr-images.patch new file mode 100644 index 0000000..69be8a9 --- /dev/null +++ b/recipes-devtools/qc-image-unpacker/qc-image-unpacker/0002-Add-support-for-bootldr-images.patch @@ -0,0 +1,239 @@ +From edc81e94e416e45b49c698456c9c6e5cd2caa041 Mon Sep 17 00:00:00 2001 +From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Date: Wed, 10 Nov 2021 01:14:53 +0300 +Subject: [PATCH 2/4] Add support for bootldr images + +Add support for BOOTLDR! images found e.g. in the Pixel2/2XL binary +blobs archive. They are used with the msm8998 (SDM835) Snapdragon SoCs. + +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +--- + src/bootldr_image.c | 132 ++++++++++++++++++++++++++++++++++++++++ + src/bootldr_image.h | 50 +++++++++++++++ + src/qc_image_unpacker.c | 7 +++ + 3 files changed, 189 insertions(+) + create mode 100644 src/bootldr_image.c + create mode 100644 src/bootldr_image.h + +diff --git a/src/bootldr_image.c b/src/bootldr_image.c +new file mode 100644 +index 000000000000..739f6eb2a9c6 +--- /dev/null ++++ b/src/bootldr_image.c +@@ -0,0 +1,132 @@ ++/* ++ ++ qc_image_unpacker ++ ----------------------------------------- ++ ++ Dmitry Baryshkov <dmitry.baryshkov@linaro.org> ++ Copyright 2019 - 2020 by CENSUS S.A. All Rights Reserved. ++ Copyright 2021 by Linaro Ltd. ++ ++ Licensed under the Apache License, Version 2.0 (the "License"); ++ you may not use this file except in compliance with the License. ++ You may obtain a copy of the License at ++ ++ http://www.apache.org/licenses/LICENSE-2.0 ++ ++ Unless required by applicable law or agreed to in writing, software ++ distributed under the License is distributed on an "AS IS" BASIS, ++ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. ++ See the License for the specific language governing permissions and ++ limitations under the License. ++ ++*/ ++ ++#include "bootldr_image.h" ++ ++#include "common.h" ++#include "utils.h" ++ ++bool bootldr_image_detect(u1 *buf, size_t bufSz) ++{ ++ bootldr_header_t *pBootLdrHeader; ++ ++ if (bufSz < sizeof(bootldr_header_t)) ++ return false; ++ ++ pBootLdrHeader = (bootldr_header_t *)buf; ++ ++ return (pBootLdrHeader->magic1 == BOOTLDR_IMG_MAGIC1) && ++ (pBootLdrHeader->magic2 == BOOTLDR_IMG_MAGIC2); ++} ++ ++bool bootldr_image_extract(u1 *buf, size_t bufSz, char *filePath, char *outputDir) { ++ bootldr_header_t *pBootLdrHeader; ++ bootldr_img_header_entry_t *pImgHeaderEntry; ++ u4 i = 0, j = 0, images, start_offset; ++ u1 *pImageEnd = NULL; ++ bool PnameTerminated = false; ++ char outPath[PATH_MAX], outFile[PATH_MAX]; ++ ++ if (bufSz < sizeof(bootldr_header_t)) { ++ LOGMSG(l_ERROR, "Invalid input size (%zu < %zu)", bufSz, sizeof(bootldr_header_t)); ++ return false; ++ } ++ ++ pBootLdrHeader = (bootldr_header_t *)buf; ++ if (pBootLdrHeader->magic1 != BOOTLDR_IMG_MAGIC1) { ++ LOGMSG(l_ERROR, "Invalid magic header (0x%x != 0x%x)", pBootLdrHeader->magic1, BOOTLDR_IMG_MAGIC1); ++ return false; ++ } ++ ++ if (pBootLdrHeader->magic2 != BOOTLDR_IMG_MAGIC2) { ++ LOGMSG(l_ERROR, "Invalid magic header (0x%x != 0x%x)", pBootLdrHeader->magic2, BOOTLDR_IMG_MAGIC2); ++ return false; ++ } ++ ++ pImgHeaderEntry = (bootldr_img_header_entry_t *)(buf + sizeof(bootldr_header_t)); ++ images = pBootLdrHeader->images; ++ start_offset = pBootLdrHeader->start_offset; ++ ++ if ((size_t)bufSz <= sizeof(bootldr_header_t) + images * sizeof(bootldr_img_header_entry_t)) { ++ LOGMSG(l_ERROR, "The size is smaller than image header size + entry size"); ++ return false; ++ } ++ ++ pImageEnd = buf + bufSz; ++ ++ // Create output root directory to place extracted images ++ memset(outPath, 0, sizeof(outPath)); ++ snprintf(outPath, sizeof(outPath), "%s/%s_images", outputDir, utils_fileBasename(filePath)); ++ if (mkdir(outPath, 0755)) { ++ LOGMSG_P(l_ERROR, "mkdir(%s) failed", outPath); ++ return false; ++ } ++ ++ LOGMSG(l_DEBUG, "Processing '%u' images", images); ++ for (i = 0; i < images; i++) { ++ int dstfd = -1; ++ PnameTerminated = false; ++ if (pImgHeaderEntry[i].ptn_name[0] == 0x00 || ++ pImgHeaderEntry[i].size == 0) ++ break; ++ ++ if (pImageEnd < buf + start_offset + pImgHeaderEntry[i].size) { ++ LOGMSG(l_ERROR, "Image size mismatch"); ++ return false; ++ } ++ ++ for (j = 0; j < BOOTLDR_PARTITION_NAME_SZ; j++) { ++ if (!(pImgHeaderEntry[i].ptn_name[j])) { ++ PnameTerminated = true; ++ break; ++ } ++ } ++ if (!PnameTerminated) { ++ LOGMSG(l_ERROR, "ptn_name string not terminated properly"); ++ return false; ++ } ++ ++ // Write output file ++ memset(outFile, 0, sizeof(outFile)); ++ if (snprintf(outFile, sizeof(outFile), "%s/%s", outPath, pImgHeaderEntry[i].ptn_name) < 0) { ++ LOGMSG(l_ERROR, "Failed to construct output path string"); ++ return false; ++ } ++ dstfd = open(outFile, O_CREAT | O_EXCL | O_RDWR, 0644); ++ if (dstfd == -1) { ++ LOGMSG_P(l_ERROR, "Couldn't create output file '%s' in input directory", outFile); ++ return false; ++ } ++ ++ if (!utils_writeToFd(dstfd, buf + start_offset, pImgHeaderEntry[i].size)) { ++ close(dstfd); ++ return false; ++ } ++ ++ close(dstfd); ++ ++ start_offset += pImgHeaderEntry[i].size; ++ } ++ ++ return true; ++} +diff --git a/src/bootldr_image.h b/src/bootldr_image.h +new file mode 100644 +index 000000000000..15e188491b79 +--- /dev/null ++++ b/src/bootldr_image.h +@@ -0,0 +1,50 @@ ++/* ++ ++ qc_image_unpacker ++ ----------------------------------------- ++ ++ Dmitry Baryshkov <dmitry.baryshkov@linaro.org> ++ Copyright 2019 - 2020 by CENSUS S.A. All Rights Reserved. ++ Copyright 2021 by Linaro Ltd. ++ ++ Licensed under the Apache License, Version 2.0 (the "License"); ++ you may not use this file except in compliance with the License. ++ You may obtain a copy of the License at ++ ++ http://www.apache.org/licenses/LICENSE-2.0 ++ ++ Unless required by applicable law or agreed to in writing, software ++ distributed under the License is distributed on an "AS IS" BASIS, ++ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. ++ See the License for the specific language governing permissions and ++ limitations under the License. ++ ++*/ ++ ++#ifndef _BOOTLDR_IMAGE_H_ ++#define _BOOTLDR_IMAGE_H_ ++ ++#include "common.h" ++ ++#define BOOTLDR_IMG_MAGIC1 0x544f4f42 ++#define BOOTLDR_IMG_MAGIC2 0x2152444c ++#define BOOTLDR_PARTITION_NAME_SZ 0x40 ++//#define MAX_IMAGES_IN_BOOTLDRIMG 32 ++ ++typedef struct bootldr_header { ++ u4 magic1; ++ u4 magic2; ++ u4 images; ++ u4 start_offset; ++ u4 full_size; ++} bootldr_header_t; ++ ++typedef struct bootldr_img_header_entry { ++ char ptn_name[BOOTLDR_PARTITION_NAME_SZ]; ++ u4 size; ++} bootldr_img_header_entry_t; ++ ++bool bootldr_image_detect(u1 *, size_t); ++bool bootldr_image_extract(u1 *, size_t, char *, char *); ++ ++#endif +diff --git a/src/qc_image_unpacker.c b/src/qc_image_unpacker.c +index 44d737803ea0..ea7fd0779645 100644 +--- a/src/qc_image_unpacker.c ++++ b/src/qc_image_unpacker.c +@@ -25,6 +25,7 @@ + + #include "common.h" + #include "log.h" ++#include "bootldr_image.h" + #include "meta_image.h" + #include "packed_image.h" + #include "utils.h" +@@ -152,6 +153,12 @@ int main(int argc, char **argv) { + LOGMSG(l_ERROR, "Skipping '%s'", pFiles.files[f]); + goto next_file; + } ++ } else if (bootldr_image_detect(buf, (size_t)fileSz)) { ++ LOGMSG(l_DEBUG, "bootldr image header found"); ++ if (!bootldr_image_extract(buf, (size_t)fileSz, pFiles.files[f], pRunArgs.outputDir)) { ++ LOGMSG(l_ERROR, "Skipping '%s'", pFiles.files[f]); ++ goto next_file; ++ } + } else { + LOGMSG(l_ERROR, "Invalid magic header 0x%x - skipping '%s'", *(u4*)buf, + pFiles.files[f]); +-- +2.35.1 + diff --git a/recipes-devtools/qc-image-unpacker/qc-image-unpacker/0003-Do-not-let-dirname-tamper-with-inputFile.patch b/recipes-devtools/qc-image-unpacker/qc-image-unpacker/0003-Do-not-let-dirname-tamper-with-inputFile.patch new file mode 100644 index 0000000..11bddd7 --- /dev/null +++ b/recipes-devtools/qc-image-unpacker/qc-image-unpacker/0003-Do-not-let-dirname-tamper-with-inputFile.patch @@ -0,0 +1,30 @@ +From 86690e6824c175e1fa7710ead34beb1d73c5a850 Mon Sep 17 00:00:00 2001 +From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Date: Wed, 10 Nov 2021 01:21:46 +0300 +Subject: [PATCH 3/4] Do not let dirname tamper with inputFile + +The function dirname() can change passed string, resulting in +pFiles.inputFile being changed. To prevent pFiles.inputFile change, pass +a copy of the string to the dirname(). + +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +--- + src/qc_image_unpacker.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/src/qc_image_unpacker.c b/src/qc_image_unpacker.c +index ea7fd0779645..faddf6b1dd21 100644 +--- a/src/qc_image_unpacker.c ++++ b/src/qc_image_unpacker.c +@@ -114,7 +114,7 @@ int main(int argc, char **argv) { + // It output directory not set, put extracted images under input directory + if (!pRunArgs.outputDir) + pRunArgs.outputDir = +- utils_isValidDir(pFiles.inputFile) ? pFiles.inputFile : dirname(pFiles.inputFile); ++ utils_isValidDir(pFiles.inputFile) ? pFiles.inputFile : dirname(strdup(pFiles.inputFile)); + + size_t processedImgs = 0; + LOGMSG(l_INFO, "Processing %zu file(s) from %s", pFiles.fileCnt, pFiles.inputFile); +-- +2.35.1 + diff --git a/recipes-devtools/qc-image-unpacker/qc-image-unpacker/0004-Fail-if-an-image-can-not-be-opened.patch b/recipes-devtools/qc-image-unpacker/qc-image-unpacker/0004-Fail-if-an-image-can-not-be-opened.patch new file mode 100644 index 0000000..45ef04c --- /dev/null +++ b/recipes-devtools/qc-image-unpacker/qc-image-unpacker/0004-Fail-if-an-image-can-not-be-opened.patch @@ -0,0 +1,63 @@ +From 9358721f0eed626d744437170b29dd6a18276ade Mon Sep 17 00:00:00 2001 +From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Date: Wed, 10 Nov 2021 01:29:29 +0300 +Subject: [PATCH 4/4] Fail if an image can not be opened + +In order to be sure that the images are really processed, fail if an +image can not be opened. + +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +--- + src/qc_image_unpacker.c | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +diff --git a/src/qc_image_unpacker.c b/src/qc_image_unpacker.c +index faddf6b1dd21..bf5507bc011a 100644 +--- a/src/qc_image_unpacker.c ++++ b/src/qc_image_unpacker.c +@@ -138,36 +138,36 @@ int main(int argc, char **argv) { + */ + if ((size_t)fileSz < sizeof(u4)) { + LOGMSG(l_ERROR, "Invalid input size - skipping '%s'", pFiles.files[f]); +- goto next_file; ++ exit(EXIT_FAILURE); + } + + if (meta_image_detect(buf, (size_t)fileSz)) { + LOGMSG(l_DEBUG, "Meta image header found"); + if (!meta_image_extract(buf, (size_t)fileSz, pFiles.files[f], pRunArgs.outputDir)) { + LOGMSG(l_ERROR, "Skipping '%s'", pFiles.files[f]); +- goto next_file; ++ exit(EXIT_FAILURE); + } + } else if (packed_image_detect(buf, (size_t)fileSz)) { + LOGMSG(l_DEBUG, "packed image header found"); + if (!packed_image_extract(buf, (size_t)fileSz, pFiles.files[f], pRunArgs.outputDir)) { + LOGMSG(l_ERROR, "Skipping '%s'", pFiles.files[f]); +- goto next_file; ++ exit(EXIT_FAILURE); + } + } else if (bootldr_image_detect(buf, (size_t)fileSz)) { + LOGMSG(l_DEBUG, "bootldr image header found"); + if (!bootldr_image_extract(buf, (size_t)fileSz, pFiles.files[f], pRunArgs.outputDir)) { + LOGMSG(l_ERROR, "Skipping '%s'", pFiles.files[f]); +- goto next_file; ++ exit(EXIT_FAILURE); + } + } else { + LOGMSG(l_ERROR, "Invalid magic header 0x%x - skipping '%s'", *(u4*)buf, + pFiles.files[f]); +- goto next_file; ++ exit(EXIT_FAILURE); + } + + processedImgs++; + +- next_file: ++ //next_file: + // Clean-up + munmap(buf, fileSz); + buf = NULL; +-- +2.35.1 + diff --git a/recipes-devtools/qc-image-unpacker/qc-image-unpacker_git.bb b/recipes-devtools/qc-image-unpacker/qc-image-unpacker_git.bb new file mode 100644 index 0000000..ab92253 --- /dev/null +++ b/recipes-devtools/qc-image-unpacker/qc-image-unpacker_git.bb @@ -0,0 +1,28 @@ +SUMMARY = "Android Qualcomm Image Unpacker" +HOMEPAGE = "https://github.com/anestisb/qc_image_unpacker" +SECTION = "devel" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://../LICENSE;md5=138532bb21858341808df2740a1d13bf" + +SRC_URI = " \ + git://github.com/anestisb/qc_image_unpacker;protocol=https;branch=master\ + file://0001-Move-image-format-detection-to-separate-handlers.patch;patchdir=.. \ + file://0002-Add-support-for-bootldr-images.patch;patchdir=.. \ + file://0003-Do-not-let-dirname-tamper-with-inputFile.patch;patchdir=.. \ + file://0004-Fail-if-an-image-can-not-be-opened.patch;patchdir=.. \ +" + +SRCREV = "dbaf73822205753c9a7722b330f74673cad183a5" + +PV = "0.2.0+${SRCPV}" +S = "${WORKDIR}/git/src" + +DEPENDS = "zlib" + +do_install() { + install -d ${D}${bindir} + install -m 0755 ${S}/qc_image_unpacker ${D}${bindir} +} + +BBCLASSEXTEND = "native nativesdk" diff --git a/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/0001-ath10k-bdencoder-Switch-to-python3.patch b/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/0001-ath10k-bdencoder-Switch-to-python3.patch new file mode 100644 index 0000000..3be757b --- /dev/null +++ b/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/0001-ath10k-bdencoder-Switch-to-python3.patch @@ -0,0 +1,146 @@ +From 71d960adea6e5287ac80e976e58865f59328f6c4 Mon Sep 17 00:00:00 2001 +From: Sven Eckelmann <sven@narfation.org> +Date: Wed, 14 Oct 2020 15:52:02 +0200 +Subject: [PATCH 1/2] ath10k-bdencoder: Switch to python3 + +Python 2.x is EOL since January 2020. The first distributions already +started to drop the interpreters from their next distribution release. Just +add some minor changes to make it python3 compatible. + +Signed-off-by: Sven Eckelmann <sven@narfation.org> +--- + tools/scripts/ath10k/ath10k-bdencoder | 35 ++++++++++++++------------- + 1 file changed, 18 insertions(+), 17 deletions(-) + +diff --git a/tools/scripts/ath10k/ath10k-bdencoder b/tools/scripts/ath10k/ath10k-bdencoder +index 5f41a6be9446..1635e87b6f5f 100755 +--- a/tools/scripts/ath10k/ath10k-bdencoder ++++ b/tools/scripts/ath10k/ath10k-bdencoder +@@ -1,4 +1,4 @@ +-#!/usr/bin/python ++#!/usr/bin/python3 + # + # Copyright (c) 2015 Qualcomm Atheros, Inc. + # Copyright (c) 2018, The Linux Foundation. All rights reserved. +@@ -33,7 +33,7 @@ import mailbox + MAX_BUF_LEN = 2000000 + + # the signature length also includes null byte and padding +-ATH10K_BOARD_SIGNATURE = "QCA-ATH10K-BOARD" ++ATH10K_BOARD_SIGNATURE = b"QCA-ATH10K-BOARD" + ATH10K_BOARD_SIGNATURE_LEN = 20 + + PADDING_MAGIC = 0x6d +@@ -83,7 +83,7 @@ def add_ie(buf, offset, id, value): + def xclip(msg): + p = subprocess.Popen(['xclip', '-selection', 'clipboard'], + stdin=subprocess.PIPE) +- p.communicate(msg) ++ p.communicate(msg.encode()) + + + # to workaround annoying python feature of returning negative hex values +@@ -105,7 +105,8 @@ class BoardName(): + def parse_ie(buf, offset, length): + self = BoardName() + fmt = '<%ds' % length +- (self.name, ) = struct.unpack_from(fmt, buf, offset) ++ (name, ) = struct.unpack_from(fmt, buf, offset) ++ self.name = name.decode() + + logging.debug('BoardName.parse_ie(): offset %d length %d self %s' % + (offset, length, self)) +@@ -310,7 +311,7 @@ class BoardContainer: + allnames.append(name) + + def _add_signature(self, buf, offset): +- signature = ATH10K_BOARD_SIGNATURE + '\0' ++ signature = ATH10K_BOARD_SIGNATURE + b'\0' + length = len(signature) + pad_len = padding_needed(length) + length = length + pad_len +@@ -321,7 +322,7 @@ class BoardContainer: + struct.pack_into('<B', padding, i, PADDING_MAGIC) + + fmt = '<%ds%ds' % (len(signature), pad_len) +- struct.pack_into(fmt, buf, offset, signature.encode(), padding.raw) ++ struct.pack_into(fmt, buf, offset, signature, padding.raw) + offset += length + + # make sure ATH10K_BOARD_SIGNATURE_LEN is correct +@@ -445,7 +446,7 @@ def cmd_extract(args): + b['data'] = filename + mapping.append(b) + +- f = open(filename, 'w') ++ f = open(filename, 'wb') + f.write(board.data.data) + f.close() + +@@ -483,11 +484,11 @@ def diff_boardfiles(filename1, filename2, diff): + + container1 = BoardContainer().open(filename1) + (temp1_fd, temp1_pathname) = tempfile.mkstemp() +- os.write(temp1_fd, container1.get_summary(sort=True)) ++ os.write(temp1_fd, container1.get_summary(sort=True).encode()) + + container2 = BoardContainer().open(filename2) + (temp2_fd, temp2_pathname) = tempfile.mkstemp() +- os.write(temp2_fd, container2.get_summary(sort=True)) ++ os.write(temp2_fd, container2.get_summary(sort=True).encode()) + + # this function is used both with --diff and --diffstat + if diff: +@@ -509,7 +510,7 @@ def diff_boardfiles(filename1, filename2, diff): + print('Failed to run wdiff: %s' % (e)) + return 1 + +- result += '%s\n' % (output) ++ result += '%s\n' % (output.decode()) + + # create simple statistics about changes in board images + +@@ -577,7 +578,7 @@ def cmd_add_board(args): + new_filename = args.add_board[1] + new_names = args.add_board[2:] + +- f = open(new_filename, 'r') ++ f = open(new_filename, 'rb') + new_data = f.read() + f.close() + +@@ -620,15 +621,15 @@ def cmd_add_mbox(args): + name = filename.rstrip(BIN_SUFFIX) + board_files[name] = part.get_payload(decode=True) + +- print 'Found mail "%s" with %d board files' % (msg['Subject'], +- len(board_files)) ++ print('Found mail "%s" with %d board files' % (msg['Subject'], ++ len(board_files))) + + # copy the original file for diff + (temp_fd, temp_pathname) = tempfile.mkstemp() + shutil.copyfile(board_filename, temp_pathname) + + container = BoardContainer.open(board_filename) +- for name, data in board_files.iteritems(): ++ for name, data in board_files.items(): + names = [name] + container.add_board(data, names) + +@@ -650,9 +651,9 @@ def cmd_add_mbox(args): + + os.remove(temp_pathname) + +- print '----------------------------------------------' +- print applied_msg +- print '----------------------------------------------' ++ print('----------------------------------------------') ++ print(applied_msg) ++ print('----------------------------------------------') + + xclip(applied_msg) + +-- +2.29.2 + diff --git a/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/0001-read-powers-port-to-python3.patch b/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/0001-read-powers-port-to-python3.patch new file mode 100644 index 0000000..5c69e81 --- /dev/null +++ b/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/0001-read-powers-port-to-python3.patch @@ -0,0 +1,212 @@ +From 4ffa07ff681c628750ba7c66e8a97f5f57b35fa0 Mon Sep 17 00:00:00 2001 +From: Dmitry Baryshkov <dbaryshkov@gmail.com> +Date: Thu, 17 Dec 2020 00:37:39 +0300 +Subject: [PATCH 1/3] read-powers: port to python3 + +Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com> +--- + tools/scripts/ath9k/read-powers | 74 ++++++++++++++++----------------- + 1 file changed, 37 insertions(+), 37 deletions(-) + +diff --git a/tools/scripts/ath9k/read-powers b/tools/scripts/ath9k/read-powers +index 1d430e78b695..535747db8f0b 100755 +--- a/tools/scripts/ath9k/read-powers ++++ b/tools/scripts/ath9k/read-powers +@@ -1,4 +1,4 @@ +-#!/usr/bin/python ++#!/usr/bin/env python3 + # + # Copyright (c) 2010 Atheros Communications Inc. + # +@@ -117,7 +117,7 @@ def powertx_rate1 (val): + ofdm_rates["12"] = (val >> 16) & 0xff + ofdm_rates["18"] = (val >> 24) & 0xff + +- print "%010s: 0x%08x" % ("Rate 1", val) ++ print("%010s: 0x%08x" % ("Rate 1", val)) + + def powertx_rate2 (val): + ofdm_rates["24"] = (val >> 0) & 0xff; +@@ -125,7 +125,7 @@ def powertx_rate2 (val): + ofdm_rates["48"] = (val >> 16) & 0xff + ofdm_rates["54"] = (val >> 24) & 0xff + +- print "%010s: 0x%08x" % ("Rate 2", val) ++ print("%010s: 0x%08x" % ("Rate 2", val)) + + def powertx_rate3 (val): + cck_rates["1L"] = (val >> 0) & 0xff; +@@ -134,7 +134,7 @@ def powertx_rate3 (val): + cck_rates["2L"] = (val >> 16) & 0xff; + cck_rates["2S"] = (val >> 24) & 0xff; + +- print "%010s: 0x%08x" % ("Rate 3", val) ++ print("%010s: 0x%08x" % ("Rate 3", val)) + + def powertx_rate4 (val): + cck_rates["5.5L"] = (val >> 0) & 0xff; +@@ -142,7 +142,7 @@ def powertx_rate4 (val): + cck_rates["11L"] = (val >> 16) & 0xff + cck_rates["11S"] = (val >> 24) & 0xff + +- print "%010s: 0x%08x" % ("Rate 4", val) ++ print("%010s: 0x%08x" % ("Rate 4", val)) + + def powertx_rate5 (val): + mcs_rates_ht20["0"] = (val >> 0) & 0xff; +@@ -165,7 +165,7 @@ def powertx_rate5 (val): + + mcs_rates_ht20["5"] = (val >> 24) & 0xff + +- print "%010s: 0x%08x" % ("Rate 5", val) ++ print("%010s: 0x%08x" % ("Rate 5", val)) + + def powertx_rate6 (val): + mcs_rates_ht20["6"] = (val >> 0) & 0xff; +@@ -173,7 +173,7 @@ def powertx_rate6 (val): + mcs_rates_ht20["12"] = (val >> 16) & 0xff + mcs_rates_ht20["13"] = (val >> 24) & 0xff + +- print "%010s: 0x%08x" % ("Rate 6", val) ++ print("%010s: 0x%08x" % ("Rate 6", val)) + + def powertx_rate7 (val): + mcs_rates_ht40["0"] = (val >> 0) & 0xff; +@@ -196,7 +196,7 @@ def powertx_rate7 (val): + + mcs_rates_ht40["5"] = (val >> 24) & 0xff + +- print "%010s: 0x%08x" % ("Rate 7", val) ++ print("%010s: 0x%08x" % ("Rate 7", val)) + + def powertx_rate8 (val): + mcs_rates_ht40["6"] = (val >> 0) & 0xff; +@@ -204,7 +204,7 @@ def powertx_rate8 (val): + mcs_rates_ht40["12"] = (val >> 16) & 0xff + mcs_rates_ht40["13"] = (val >> 24) & 0xff + +- print "%010s: 0x%08x" % ("Rate 8", val) ++ print("%010s: 0x%08x" % ("Rate 8", val)) + + # What is 40 dup CCK, 40 dup OFDM, 20 ext cck, 20 ext ODFM ? + def powertx_rate9 (val): +@@ -213,7 +213,7 @@ def powertx_rate9 (val): + ext_dup_rates["20 ext CCK"] = (val >> 16) & 0xff + ext_dup_rates["20 ext OFDM"] = (val >> 24) & 0xff + +- print "%010s: 0x%08x" % ("Rate 9", val) ++ print("%010s: 0x%08x" % ("Rate 9", val)) + + def powertx_rate10 (val): + mcs_rates_ht20["14"] = (val >> 0) & 0xff; +@@ -221,7 +221,7 @@ def powertx_rate10 (val): + mcs_rates_ht20["20"] = (val >> 16) & 0xff + mcs_rates_ht20["21"] = (val >> 24) & 0xff + +- print "%010s: 0x%08x" % ("Rate 10", val) ++ print("%010s: 0x%08x" % ("Rate 10", val)) + + def powertx_rate11 (val): + mcs_rates_ht20["22"] = (val >> 0) & 0xff; +@@ -230,7 +230,7 @@ def powertx_rate11 (val): + mcs_rates_ht40["22"] = (val >> 16) & 0xff + mcs_rates_ht40["23"] = (val >> 24) & 0xff + +- print "%010s: 0x%08x" % ("Rate 11", val) ++ print("%010s: 0x%08x" % ("Rate 11", val)) + + def powertx_rate12 (val): + mcs_rates_ht40["14"] = (val >> 0) & 0xff; +@@ -238,7 +238,7 @@ def powertx_rate12 (val): + mcs_rates_ht40["20"] = (val >> 16) & 0xff + mcs_rates_ht40["21"] = (val >> 24) & 0xff + +- print "%010s: 0x%08x" % ("Rate 12", val) ++ print("%010s: 0x%08x" % ("Rate 12", val)) + + registers = { + "0x00a3c0" : powertx_rate1, +@@ -256,43 +256,43 @@ registers = { + } + + def process_cck_rates(): +- print "CCK Rates" +- print "======================" +- for rate, double_dbm in cck_rates.iteritems(): ++ print("CCK Rates") ++ print("======================") ++ for rate, double_dbm in cck_rates.items(): + dbm = "%.2f dBm" % (double_dbm / 2) +- print "%010s %010s" % (rate + " Mbps", dbm) ++ print("%010s %010s" % (rate + " Mbps", dbm)) + + def process_ofdm_rates(): +- print "OFDM Rates" +- print "======================" +- for rate, double_dbm in sorted(map(lambda (k,v): (int(k,0), v), ofdm_rates.iteritems())): ++ print("OFDM Rates") ++ print("======================") ++ for rate, double_dbm in sorted(ofdm_rates.items(), key=lambda i: int(i[0], 0)): + rate_s = "%s" % rate + dbm = "%.02f dBm" % (double_dbm / 2) +- print "%010s %010s" % (rate_s + " Mbps", dbm) ++ print("%010s %010s" % (rate_s + " Mbps", dbm)) + + def process_mcs_ht20_rates(): +- print "MCS20 Rates" +- print "======================" +- for rate, double_dbm in sorted(map(lambda (k,v): (int(k,0), v), mcs_rates_ht20.iteritems())): ++ print("MCS20 Rates") ++ print("======================") ++ for rate, double_dbm in sorted(mcs_rates_ht20.items(), key=lambda i: int(i[0], 0)): + rate_s = "%s" % rate + dbm = "%.02f dBm" % (double_dbm / 2) +- print "%010s %010s" % ("MCS" + rate_s, dbm) ++ print("%010s %010s" % ("MCS" + rate_s, dbm)) + + + def process_mcs_ht40_rates(): +- print "MCS40 Rates" +- print "======================" +- for rate, double_dbm in sorted(map(lambda (k,v): (int(k,0), v), mcs_rates_ht40.iteritems())): ++ print("MCS40 Rates") ++ print("======================") ++ for rate, double_dbm in sorted(mcs_rates_ht40.items(), key=lambda i: int(i[0], 0)): + rate_s = "%s" % rate + dbm = "%.2f dBm" % (double_dbm / 2) +- print "%010s %010s" % ("MCS" + rate_s, dbm) ++ print("%010s %010s" % ("MCS" + rate_s, dbm)) + + def process_ext_dup_rates(): +- print "EXT-DUP Rates" +- print "==========================" +- for rate, double_dbm in ext_dup_rates.iteritems(): ++ print("EXT-DUP Rates") ++ print("==========================") ++ for rate, double_dbm in ext_dup_rates.items(): + dbm = "%.2f dBm" % (double_dbm / 2) +- print "%015s %010s" % (rate, dbm) ++ print("%015s %010s" % (rate, dbm)) + + def print_power_reg (reg, val): + if not reg in map(lambda x: int(x, 0), registers.keys()): +@@ -300,12 +300,12 @@ def print_power_reg (reg, val): + registers.get("0x%06x" % reg)(val) + + try: +- print "Power register" +- print "======================" ++ print("Power register") ++ print("======================") + for line in sys.stdin.readlines(): +- reg, val = map(lambda x: int(x, 0), string.split(line)) ++ reg, val = map(lambda x: int(x, 0), line.split()) + print_power_reg(reg, val) +- print "-------------------------------------" ++ print("-------------------------------------") + + process_cck_rates() + process_ofdm_rates() +-- +2.29.2 + diff --git a/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/0002-ath10k-bdencoder-Add-option-to-switch-to-ath11k-mode.patch b/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/0002-ath10k-bdencoder-Add-option-to-switch-to-ath11k-mode.patch new file mode 100644 index 0000000..b5aa1c8 --- /dev/null +++ b/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/0002-ath10k-bdencoder-Add-option-to-switch-to-ath11k-mode.patch @@ -0,0 +1,116 @@ +From 68fd447a4d1e137307927fb9c0d9e05c6559bc96 Mon Sep 17 00:00:00 2001 +From: Sven Eckelmann <sven@narfation.org> +Date: Wed, 14 Oct 2020 17:26:19 +0200 +Subject: [PATCH 2/2] ath10k-bdencoder: Add option to switch to ath11k mode + +The board-2.bin also exists on ath11k but there is no encoder available at +the moment. Just use an option to change the two positions where the ath11k +differs from the ath10k board-2.bin + +Signed-off-by: Sven Eckelmann <sven@narfation.org> +[DB: fixed firmware url] +Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com> +--- + tools/scripts/ath10k/ath10k-bdencoder | 35 ++++++++++++++++++++++++--- + 1 file changed, 31 insertions(+), 4 deletions(-) + +diff --git a/tools/scripts/ath10k/ath10k-bdencoder b/tools/scripts/ath10k/ath10k-bdencoder +index 1635e87b6f5f..d613f6340bf9 100755 +--- a/tools/scripts/ath10k/ath10k-bdencoder ++++ b/tools/scripts/ath10k/ath10k-bdencoder +@@ -34,6 +34,8 @@ MAX_BUF_LEN = 2000000 + + # the signature length also includes null byte and padding + ATH10K_BOARD_SIGNATURE = b"QCA-ATH10K-BOARD" ++ATH11K_BOARD_SIGNATURE = b"QCA-ATH11K-BOARD" ++BOARD_SIGNATURE = b'' + ATH10K_BOARD_SIGNATURE_LEN = 20 + + PADDING_MAGIC = 0x6d +@@ -44,6 +46,7 @@ TYPE_LENGTH_SIZE = 8 + BIN_SUFFIX = '.bin' + + ATH10K_FIRMWARE_URL = 'https://github.com/kvalo/ath10k-firmware/commit' ++ATH11K_FIRMWARE_URL = 'https://github.com/kvalo/ath11k-firmware/commit' + + ATH10K_BD_IE_BOARD = 0 + ATH10K_BD_IE_BOARD_EXT = 1 +@@ -311,7 +314,7 @@ class BoardContainer: + allnames.append(name) + + def _add_signature(self, buf, offset): +- signature = ATH10K_BOARD_SIGNATURE + b'\0' ++ signature = BOARD_SIGNATURE + b'\0' + length = len(signature) + pad_len = padding_needed(length) + length = length + pad_len +@@ -343,10 +346,10 @@ class BoardContainer: + + offset = 0 + +- fmt = '<%dsb' % (len(ATH10K_BOARD_SIGNATURE)) ++ fmt = '<%dsb' % (len(BOARD_SIGNATURE)) + (signature, null) = struct.unpack_from(fmt, buf, offset) + +- if signature != ATH10K_BOARD_SIGNATURE or null != 0: ++ if signature != BOARD_SIGNATURE or null != 0: + print("invalid signature found in %s" % name) + return 1 + +@@ -600,6 +603,11 @@ def git_get_head_id(): + + + def cmd_add_mbox(args): ++ if args.mode == 10: ++ firmware_url = ATH10K_FIRMWARE_URL ++ elif args.mode == 11: ++ firmware_url = ATH11K_FIRMWARE_URL ++ + board_filename = args.add_mbox[0] + mbox_filename = args.add_mbox[1] + +@@ -658,8 +666,19 @@ def cmd_add_mbox(args): + xclip(applied_msg) + + ++def mode_parse(v): ++ if v == 'ath10k': ++ return 10 ++ elif v == 'ath11k': ++ return 11 ++ else: ++ raise argparse.ArgumentTypeError('ath10k or ath11k expected.') ++ ++ + def main(): +- description = '''ath10k board-N.bin files manegement tool ++ global BOARD_SIGNATURE ++ ++ description = '''ath10k/ath11k board-N.bin files management tool + + ath10k-bdencoder is for creating (--create), listing (--info) and + comparing (--diff, --diffstat) ath10k board-N.bin files. The +@@ -709,12 +728,20 @@ can use --extract switch to see examples from real board-N.bin files. + parser.add_argument("-o", "--output", metavar="BOARD_FILE", + help='name of the output file, otherwise the default is: %s' % + (DEFAULT_BOARD_FILE)) ++ parser.add_argument("-m", "--mode", metavar='MODE', ++ help='select between ath10k and ath11k mode (default: ath10k)', ++ default=10, type=mode_parse) + + args = parser.parse_args() + + if args.verbose: + logging.basicConfig(level=logging.DEBUG) + ++ if args.mode == 10: ++ BOARD_SIGNATURE = ATH10K_BOARD_SIGNATURE ++ elif args.mode == 11: ++ BOARD_SIGNATURE = ATH11K_BOARD_SIGNATURE ++ + if args.create: + return cmd_create(args) + elif args.extract: +-- +2.29.2 + diff --git a/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/0002-ath10k-fwencoder-port-to-python3.patch b/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/0002-ath10k-fwencoder-port-to-python3.patch new file mode 100644 index 0000000..1c3c648 --- /dev/null +++ b/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/0002-ath10k-fwencoder-port-to-python3.patch @@ -0,0 +1,272 @@ +From 3d23932fd812e1ec7a989ca7e594fcf04d42c8a6 Mon Sep 17 00:00:00 2001 +From: Dmitry Baryshkov <dbaryshkov@gmail.com> +Date: Thu, 17 Dec 2020 01:32:47 +0300 +Subject: [PATCH 2/3] ath10k-fwencoder: port to python3 + +Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com> +--- + tools/scripts/ath10k/ath10k-fwencoder | 70 +++++++++++++-------------- + 1 file changed, 35 insertions(+), 35 deletions(-) + +diff --git a/tools/scripts/ath10k/ath10k-fwencoder b/tools/scripts/ath10k/ath10k-fwencoder +index 6934a694e832..bbbe0344f014 100755 +--- a/tools/scripts/ath10k/ath10k-fwencoder ++++ b/tools/scripts/ath10k/ath10k-fwencoder +@@ -1,4 +1,4 @@ +-#!/usr/bin/python ++#!/usr/bin/env python3 + # + # Copyright (c) 2012-2015 Qualcomm Atheros, Inc. + # +@@ -30,7 +30,7 @@ import hashlib + + DEFAULT_FW_API_VERSION = 4 + +-ATH10K_SIGNATURE = "QCA-ATH10K" ++ATH10K_SIGNATURE = b"QCA-ATH10K" + MAX_LEN = 2000000 + + ATH10K_FW_IE_FW_VERSION = 0 +@@ -327,7 +327,7 @@ class Ath10kFirmwareContainer(object): + elif is_int(s): + version = s + else: +- print 'Error: Invalid HTT OP version: %s' % s ++ print('Error: Invalid HTT OP version: %s' % s) + return 1 + + self.htt_op_version = version +@@ -337,7 +337,7 @@ class Ath10kFirmwareContainer(object): + + # find value from the dict + try: +- name = [key for key, value in htt_op_version_map.iteritems() ++ name = [key for key, value in htt_op_version_map.items() + if value == version][0] + except IndexError: + name = str(version) +@@ -353,7 +353,7 @@ class Ath10kFirmwareContainer(object): + elif is_int(s): + version = s + else: +- print 'Error: Invalid WMI OP version: %s' % s ++ print('Error: Invalid WMI OP version: %s' % s) + return 1 + + self.wmi_op_version = version +@@ -363,7 +363,7 @@ class Ath10kFirmwareContainer(object): + + # find value from the dict + try: +- name = [key for key, value in wmi_op_version_map.iteritems() ++ name = [key for key, value in wmi_op_version_map.items() + if value == version][0] + except IndexError: + name = str(version) +@@ -376,7 +376,7 @@ class Ath10kFirmwareContainer(object): + enabled = [] + for capa in self.features: + if capa not in feature_map: +- print "Error: '%s' not found from the feature map" % capa ++ print("Error: '%s' not found from the feature map" % capa) + return 1 + + enabled.append(feature_map[capa]) +@@ -434,7 +434,7 @@ class Ath10kFirmwareContainer(object): + self.fw_version = fw_version + # reserve one byte for null + if len(self.fw_version) > ETHTOOL_FWVERS_LEN - 1: +- print 'Firmware version string too long: %d' % (len(self.fw_version)) ++ print('Firmware version string too long: %d' % (len(self.fw_version))) + return 1 + + def get_fw_version(self): +@@ -500,7 +500,7 @@ class Ath10kFirmwareContainer(object): + elif e == ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: + self.fw_code_swap_image = c.elements[e] + else: +- print "Unknown IE: ", e ++ print("Unknown IE: ", e) + + def save(self, filename): + self.container = FirmwareContainer(ATH10K_SIGNATURE) +@@ -585,7 +585,7 @@ def write_file(filename, buf): + def info(options, args): + + if len(args) != 1: +- print 'Filename missing' ++ print('Filename missing') + return 1 + + filename = args[0] +@@ -593,13 +593,13 @@ def info(options, args): + c = Ath10kFirmwareContainer() + c.load(filename) + +- print c.get_summary() ++ print(c.get_summary()) + + + def dump(options, args): + + if len(args) != 1: +- print 'Filename missing' ++ print('Filename missing') + return 1 + + filename = args[0] +@@ -607,34 +607,34 @@ def dump(options, args): + c = Ath10kFirmwareContainer() + c.load(filename) + +- print "ath10k-fwencoder --create \\" ++ print("ath10k-fwencoder --create \\") + + if c.get_fw_version(): +- print "--firmware-version=%s \\" % c.get_fw_version() ++ print("--firmware-version=%s \\" % c.get_fw_version()) + + if c.get_timestamp() and options.show_timestamp: +- print "--timestamp=%u \\" % c.get_timestamp() ++ print("--timestamp=%u \\" % c.get_timestamp()) + + if c.get_features(): +- print "--features=%s \\" % c.get_features() ++ print("--features=%s \\" % c.get_features()) + + if c.get_fw_image(): + name = "athwlan.bin" +- print "--firmware=%s \\" % name ++ print("--firmware=%s \\" % name) + + if c.get_otp_image(): + name = "otp.bin" +- print "--otp=%s \\" % name ++ print("--otp=%s \\" % name) + + if c.get_wmi_op_version(): +- print '--set-wmi-op-version=%s \\' % c.get_wmi_op_version() ++ print('--set-wmi-op-version=%s \\' % c.get_wmi_op_version()) + + if c.get_htt_op_version(): +- print '--set-htt-op-version=%s \\' % (c.get_htt_op_version()) ++ print('--set-htt-op-version=%s \\' % (c.get_htt_op_version())) + + if c.get_fw_code_swap_image(): + name = "athwlan.codeswap.bin" +- print "--firmware-codeswap=%s \\" % name ++ print("--firmware-codeswap=%s \\" % name) + + print + +@@ -642,7 +642,7 @@ def dump(options, args): + def extract(options, args): + + if len(args) != 1: +- print 'Filename missing' ++ print('Filename missing') + return 1 + + filename = args[0] +@@ -653,24 +653,24 @@ def extract(options, args): + if c.get_fw_image(): + name = "athwlan.bin" + write_file(name, c.get_fw_image()) +- print '%s extracted: %d B' % (name, len(c.get_fw_image())) ++ print('%s extracted: %d B' % (name, len(c.get_fw_image()))) + + if c.get_otp_image(): + name = "otp.bin" + write_file(name, c.get_otp_image()) +- print '%s extracted: %d B' % (name, len(c.get_otp_image())) ++ print('%s extracted: %d B' % (name, len(c.get_otp_image()))) + + if c.get_fw_code_swap_image(): + name = "athwlan.codeswap.bin" + write_file(name, c.get_fw_code_swap_image()) +- print '%s extracted: %d B' % (name, len(c.get_fw_code_swap_image())) ++ print('%s extracted: %d B' % (name, len(c.get_fw_code_swap_image()))) + + print + + + def modify(options, args): + if len(args) != 1: +- print 'Filename missing' ++ print('Filename missing') + return 1 + + filename = args[0] +@@ -710,7 +710,7 @@ def modify(options, args): + + file_len = c.save(filename) + +- print '%s modified: %d B' % (filename, file_len) ++ print('%s modified: %d B' % (filename, file_len)) + + + def create(options): +@@ -752,25 +752,25 @@ def create(options): + + file_len = c.save(output) + +- print '%s created: %d B' % (output, file_len) ++ print('%s created: %d B' % (output, file_len)) + + + def cmd_crc32(options, args): + if len(args) != 1: +- print 'Filename missing' ++ print('Filename missing') + return 1 + + filename = args[0] + + f = open(filename, 'r') + buf = f.read() +- print '%08x' % (_crc32(buf)) ++ print('%08x' % (_crc32(buf))) + f.close() + + + def cmd_diff(options, args): + if len(args) != 2: +- print 'Usage: ath10k-fwencoder --diff FILE FILE' ++ print('Usage: ath10k-fwencoder --diff FILE FILE') + return 1 + + filename1 = args[0] +@@ -804,7 +804,7 @@ def cmd_diff(options, args): + logger.error('Failed to run wdiff: %s' % (e)) + return 1 + +- print output ++ print(output) + + os.close(temp1_fd) + os.close(temp2_fd) +@@ -896,10 +896,10 @@ def main(): + try: + return create(options) + except FWEncoderError as e: +- print 'Create failed: %s' % e ++ print('Create failed: %s' % e) + sys.exit(2) + except Exception as e: +- print 'Create failed: %s' % e ++ print('Create failed: %s' % e) + traceback.print_exc() + sys.exit(3) + elif options.dump: +@@ -915,7 +915,7 @@ def main(): + elif options.diff: + return cmd_diff(options, args) + else: +- print 'Action command missing' ++ print('Action command missing') + return 1 + + if __name__ == "__main__": +-- +2.29.2 + diff --git a/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/0003-scripts-port-to-python3.patch b/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/0003-scripts-port-to-python3.patch new file mode 100644 index 0000000..bfdad9f --- /dev/null +++ b/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/0003-scripts-port-to-python3.patch @@ -0,0 +1,34 @@ +From 26ca6eff75f78fec9efff4a69fca7103b97f1ab1 Mon Sep 17 00:00:00 2001 +From: Dmitry Baryshkov <dbaryshkov@gmail.com> +Date: Thu, 17 Dec 2020 01:33:01 +0300 +Subject: [PATCH 3/3] scripts: port to python3 + +Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com> +--- + tools/scripts/ath10k/ath10k-fw-repo | 2 +- + tools/scripts/ath11k/ath11k-fw-repo | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/tools/scripts/ath10k/ath10k-fw-repo b/tools/scripts/ath10k/ath10k-fw-repo +index 00b6d859209a..4cf044c04c5a 100755 +--- a/tools/scripts/ath10k/ath10k-fw-repo ++++ b/tools/scripts/ath10k/ath10k-fw-repo +@@ -1,4 +1,4 @@ +-#!/usr/bin/python ++#!/usr/bin/env python3 + # + # Copyright (c) 2016 Qualcomm Atheros, Inc. + # Copyright (c) 2018, The Linux Foundation. All rights reserved. +diff --git a/tools/scripts/ath11k/ath11k-fw-repo b/tools/scripts/ath11k/ath11k-fw-repo +index 1ac6023aaf12..51ca33c5dd7b 100755 +--- a/tools/scripts/ath11k/ath11k-fw-repo ++++ b/tools/scripts/ath11k/ath11k-fw-repo +@@ -1,4 +1,4 @@ +-#!/usr/bin/python ++#!/usr/bin/env python3 + # + # Copyright (c) 2016 Qualcomm Atheros, Inc. + # Copyright (c) 2018,2020 The Linux Foundation. All rights reserved. +-- +2.29.2 + diff --git a/recipes-bsp/firmware/firmware-qcom-dragonboard845c/generate_board-2_json.sh b/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/ath10k-generate-board-2_json.sh index 3a1d532..373689f 100644 --- a/recipes-bsp/firmware/firmware-qcom-dragonboard845c/generate_board-2_json.sh +++ b/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/ath10k-generate-board-2_json.sh @@ -1,20 +1,27 @@ +#!/bin/sh + JSON="$2" iter=0 echo "[" > "${JSON}" for file in $1/bdwlan.*; do - [[ $file == *.txt ]] && continue + case `basename "${file}"` in + *.txt) + continue + ;; + bdwlan.bin) + file_ext="ff" + ;; + bdwlan.*) + file_ext="$(basename "${file}" | sed -E 's:^.*\.b?0*([0-9a-f]+)$:\1:')" + ;; + esac iter=$((iter+1)) [ $iter -ne 1 ] && echo " }," >> "${JSON}" echo " {" >> "${JSON}" echo " \"data\": \"$file\"," >> "${JSON}" - if [[ $file == */bdwlan.bin ]]; then - file_ext="ff" - else - file_ext="$(printf '%x\n' "$(basename "${file}" | sed -E 's:^.*\.b?([0-9a-f]*)$:0x\1:')")" - fi echo " \"names\": [\"bus=snoc,qmi-board-id=${file_ext}\"]" >> "${JSON}" done diff --git a/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/ath10k-generate-pci-board-2_json.sh b/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/ath10k-generate-pci-board-2_json.sh new file mode 100644 index 0000000..403c8f2 --- /dev/null +++ b/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/ath10k-generate-pci-board-2_json.sh @@ -0,0 +1,30 @@ +#!/bin/sh + +JSON="$2" + +iter=0 +echo "[" > "${JSON}" +for file in $1/bdwlan*.*; do + case `basename "${file}"` in + *.txt) + continue + ;; + bdwlan*.bin) + file_ext="ff" + ;; + bdwlan*.b*) + file_ext="$(basename "${file}" | sed -E 's:^.*\.b?0*([0-9a-f]+)$:\1:')" + ;; + esac + + iter=$((iter+1)) + [ $iter -ne 1 ] && echo " }," >> "${JSON}" + + echo " {" >> "${JSON}" + echo " \"data\": \"$file\"," >> "${JSON}" + echo " \"names\": [\"bus=pci,bmi-chip-id=0,bmi-board-id=${file_ext}\"]" >> "${JSON}" +done + +echo " }" >> "${JSON}" +echo "]" >> "${JSON}" + diff --git a/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/ath11k-generate-board-2_json.sh b/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/ath11k-generate-board-2_json.sh new file mode 100644 index 0000000..0e3cc10 --- /dev/null +++ b/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife/ath11k-generate-board-2_json.sh @@ -0,0 +1,23 @@ +#!/bin/sh + +JSON="$2" + +iter=0 +echo "[" > "${JSON}" +for file in $1/bdwlan.elf $1/bdwlan.e* ; do + iter=$((iter+1)) + [ $iter -ne 1 ] && echo " }," >> "${JSON}" + + echo " {" >> "${JSON}" + echo " \"data\": \"$file\"," >> "${JSON}" + if [ `basename $file` = "bdwlan.elf" ]; then + file_ext="255" + else + file_ext="$(( $(basename "${file}" | sed -E 's:^.*\.e?([0-9a-f]*)$:0x\1:') ))" + fi + echo " \"names\": [\"bus=pci,qmi-chip-id=0,qmi-board-id=${file_ext}\"]" >> "${JSON}" +done + +echo " }" >> "${JSON}" +echo "]" >> "${JSON}" + diff --git a/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife_git.bb b/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife_git.bb new file mode 100644 index 0000000..5d81eaf --- /dev/null +++ b/recipes-devtools/qca-swiss-army-knife/qca-swiss-army-knife_git.bb @@ -0,0 +1,34 @@ +SUMMARY = "A set of utilities to help QCA driver development." +HOMEPAGE = "https://github.com/qca/qca-swiss-army-knife" +SECTION = "devel" + +LICENSE = "ISC" +LIC_FILES_CHKSUM = "file://LICENSE;md5=884c3f3a874b2a0cfa283c7db0e5d604" + +SRCREV = "5ede3cc07e9a52f115101c28f833242b772eeaab" +SRC_URI = " \ + git://github.com/qca/${BPN}.git;branch=master;protocol=https \ + file://0001-ath10k-bdencoder-Switch-to-python3.patch \ + file://0002-ath10k-bdencoder-Add-option-to-switch-to-ath11k-mode.patch \ + file://0001-read-powers-port-to-python3.patch \ + file://0002-ath10k-fwencoder-port-to-python3.patch \ + file://0003-scripts-port-to-python3.patch \ + file://ath10k-generate-board-2_json.sh \ + file://ath10k-generate-pci-board-2_json.sh \ + file://ath11k-generate-board-2_json.sh \ +" + +PV = "0.0+${SRCPV}" +S = "${WORKDIR}/git" + +do_install () { + install -d ${D}/${bindir} + install -m 0755 tools/scripts/*/* ${D}/${bindir} + install -m 0755 ${WORKDIR}/ath10k-generate-board-2_json.sh ${D}/${bindir} + install -m 0755 ${WORKDIR}/ath10k-generate-pci-board-2_json.sh ${D}/${bindir} + install -m 0755 ${WORKDIR}/ath11k-generate-board-2_json.sh ${D}/${bindir} +} + +BBCLASSEXTEND = "native nativesdk" + +RDEPENDS:${PN} += "perl python3-core" diff --git a/recipes-devtools/qdl/qdl_git.bb b/recipes-devtools/qdl/qdl_git.bb index aba3cec..b053388 100644 --- a/recipes-devtools/qdl/qdl_git.bb +++ b/recipes-devtools/qdl/qdl_git.bb @@ -6,7 +6,7 @@ LICENSE = "BSD-3-Clause" LIC_FILES_CHKSUM = "file://qdl.c;beginline=1;endline=31;md5=1c7d712d897368d3d3c161e5493efc6a" DEPENDS = "libxml2" -DEPENDS_append_class-target = " udev " +DEPENDS:append:class-target = " udev " inherit pkgconfig diff --git a/recipes-devtools/skales/skales_git.bb b/recipes-devtools/skales/skales_git.bb index 782d20c..6e80204 100644 --- a/recipes-devtools/skales/skales_git.bb +++ b/recipes-devtools/skales/skales_git.bb @@ -1,15 +1,15 @@ SUMMARY = "Tools to create boot images for QCOM SoC" -HOMEPAGE = "https://www.codeaurora.org/cgit/quic/kernel/skales/" +HOMEPAGE = "https://git.codelinaro.org/clo/qsdk/oss/tools/skales" SECTION = "devel" LICENSE = "BSD-3-Clause" LIC_FILES_CHKSUM = "file://mkbootimg;beginline=3;endline=29;md5=114b84083e657f3886bfa2c1e5de7deb" -SRCREV = "6eac9e943de53c4aaaede3697e9226a47686fe25" +SRCREV = "1ccd3e924f6955b1c9d5f921e5311c8db8411787" PV = "1.5.0+git${SRCPV}" -SRC_URI = "git://source.codeaurora.org/quic/kernel/skales;protocol=http \ +SRC_URI = "git://git.codelinaro.org/clo/qsdk/oss/tools/skales.git;protocol=https;branch=caf_migration/skales/master \ file://0002-mkbootimg-use-python3.patch \ " diff --git a/recipes-graphics/mesa/files/0001-meson-misdetects-64bit-atomics-on-mips-clang.patch b/recipes-graphics/mesa/files/0001-meson-misdetects-64bit-atomics-on-mips-clang.patch index 7fbbe98..35e65e4 100644 --- a/recipes-graphics/mesa/files/0001-meson-misdetects-64bit-atomics-on-mips-clang.patch +++ b/recipes-graphics/mesa/files/0001-meson-misdetects-64bit-atomics-on-mips-clang.patch @@ -1,10 +1,11 @@ -From 515bded412d2624a6a9744838a7a0da7b402f612 Mon Sep 17 00:00:00 2001 +From 994f33977973baeda1956d253827fc3953bfab55 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Mon, 13 Jan 2020 15:23:47 -0800 Subject: [PATCH] meson misdetects 64bit atomics on mips/clang Upstream-Status: Pending Signed-off-by: Khem Raj <raj.khem@gmail.com> + --- src/util/u_atomic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) @@ -22,6 +23,3 @@ index e4bffa8534e..58e1dddca35 100644 #include <stdint.h> #include <pthread.h> --- -2.28.0 - diff --git a/recipes-graphics/mesa/files/0001-meson.build-check-for-all-linux-host_os-combinations.patch b/recipes-graphics/mesa/files/0001-meson.build-check-for-all-linux-host_os-combinations.patch index 2a78921..dc89ffc 100644 --- a/recipes-graphics/mesa/files/0001-meson.build-check-for-all-linux-host_os-combinations.patch +++ b/recipes-graphics/mesa/files/0001-meson.build-check-for-all-linux-host_os-combinations.patch @@ -1,4 +1,4 @@ -From 08c1591085f88190884809aeaf562d5a963399f7 Mon Sep 17 00:00:00 2001 +From fdcbfd2841eb34f44bdf51aeb4ef45811b66fd75 Mon Sep 17 00:00:00 2001 From: Alistair Francis <alistair@alistair23.me> Date: Thu, 14 Nov 2019 13:04:49 -0800 Subject: [PATCH] meson.build: check for all linux host_os combinations @@ -14,15 +14,16 @@ Signed-off-by: Anuj Mittal <anuj.mittal@intel.com> Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Signed-off-by: Alistair Francis <alistair@alistair23.me> + --- meson.build | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/meson.build b/meson.build -index be007953c8b..e3e1dbfb116 100644 +index ff333961a0d..5931260dd3d 100644 --- a/meson.build +++ b/meson.build -@@ -152,7 +152,7 @@ with_any_opengl = with_opengl or with_gles1 or with_gles2 +@@ -158,7 +158,7 @@ with_any_opengl = with_opengl or with_gles1 or with_gles2 # Only build shared_glapi if at least one OpenGL API is enabled with_shared_glapi = with_shared_glapi and with_any_opengl @@ -31,15 +32,12 @@ index be007953c8b..e3e1dbfb116 100644 dri_drivers = get_option('dri-drivers') if dri_drivers.contains('auto') -@@ -928,7 +928,7 @@ if cc.compiles('__uint128_t foo(void) { return 0; }', +@@ -1000,7 +1000,7 @@ if cc.compiles('__uint128_t foo(void) { return 0; }', endif # TODO: this is very incomplete --if ['linux', 'cygwin', 'gnu', 'freebsd', 'gnu/kfreebsd'].contains(host_machine.system()) -+if ['cygwin', 'gnu', 'gnu/kfreebsd'].contains(host_machine.system()) or host_machine.system().startswith('linux') +-if ['linux', 'cygwin', 'gnu', 'freebsd', 'gnu/kfreebsd', 'haiku'].contains(host_machine.system()) ++if ['linux', 'cygwin', 'gnu', 'freebsd', 'gnu/kfreebsd', 'haiku'].contains(host_machine.system()) or host_machine.system().startswith('linux') pre_args += '-D_GNU_SOURCE' elif host_machine.system() == 'sunos' pre_args += '-D__EXTENSIONS__' --- -2.28.0 - diff --git a/recipes-graphics/mesa/files/0002-meson.build-make-TLS-ELF-optional.patch b/recipes-graphics/mesa/files/0002-meson.build-make-TLS-ELF-optional.patch index 8c0bab0..043217c 100644 --- a/recipes-graphics/mesa/files/0002-meson.build-make-TLS-ELF-optional.patch +++ b/recipes-graphics/mesa/files/0002-meson.build-make-TLS-ELF-optional.patch @@ -1,4 +1,4 @@ -From 16012eb00fa76343b35365e96ef24806c65948e1 Mon Sep 17 00:00:00 2001 +From 8f767113d5b8a2ee89cd069d54243f8b0ac9a218 Mon Sep 17 00:00:00 2001 From: Alistair Francis <alistair@alistair23.me> Date: Wed, 2 Sep 2020 15:28:50 -0500 Subject: [PATCH] meson.build: make TLS ELF optional @@ -14,23 +14,23 @@ Signed-off-by: Alistair Francis <alistair@alistair23.me> 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/meson.build b/meson.build -index e3e1dbfb116..791a42a083e 100644 +index 9b4e5e28864..15eacbe6918 100644 --- a/meson.build +++ b/meson.build -@@ -428,7 +428,7 @@ endif +@@ -509,7 +509,7 @@ foreach platform : _platforms + endforeach - # Android uses emutls for versions <= P/28. For USE_ELF_TLS we need ELF TLS. use_elf_tls = false --if not ['windows', 'freebsd', 'openbsd'].contains(host_machine.system()) and (not with_platform_android or get_option('platform-sdk-version') >= 29) +-if not with_platform_windows or not with_shared_glapi +if (not with_platform_android or get_option('platform-sdk-version') >= 29) and get_option('elf-tls') pre_args += '-DUSE_ELF_TLS' use_elf_tls = true - endif + diff --git a/meson_options.txt b/meson_options.txt -index a0cf4abca92..d472772373e 100644 +index fd0d99f2f9a..f994c22ac61 100644 --- a/meson_options.txt +++ b/meson_options.txt -@@ -368,6 +368,12 @@ option( +@@ -455,6 +455,12 @@ option( value : true, description : 'Enable direct rendering in GLX and EGL for DRI', ) @@ -44,5 +44,5 @@ index a0cf4abca92..d472772373e 100644 'prefer-iris', type : 'boolean', -- -2.28.0 +2.34.0 diff --git a/recipes-graphics/mesa/files/0003-Allow-enable-DRI-without-DRI-drivers.patch b/recipes-graphics/mesa/files/0003-Allow-enable-DRI-without-DRI-drivers.patch deleted file mode 100644 index d6511b8..0000000 --- a/recipes-graphics/mesa/files/0003-Allow-enable-DRI-without-DRI-drivers.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 6e550e092e1329e8ba8da6eb0b86b7b48def2b13 Mon Sep 17 00:00:00 2001 -From: Fabio Berton <fabio.berton@ossystems.com.br> -Date: Wed, 12 Jun 2019 14:18:31 -0300 -Subject: [PATCH] Allow enable DRI without DRI drivers - -Upstream-Status: Pending - -Signed-off-by: Andrei Gherzan <andrei@gherzan.ro> -Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br> -Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> ---- - meson.build | 2 +- - meson_options.txt | 6 ++++++ - 2 files changed, 7 insertions(+), 1 deletion(-) - -diff --git a/meson.build b/meson.build -index 791a42a083e..2bc7d3a3556 100644 ---- a/meson.build -+++ b/meson.build -@@ -182,7 +182,7 @@ with_dri_r200 = dri_drivers.contains('r200') - with_dri_nouveau = dri_drivers.contains('nouveau') - with_dri_swrast = dri_drivers.contains('swrast') - --with_dri = dri_drivers.length() != 0 -+with_dri = get_option('dri') or (dri_drivers.length() != 0 and dri_drivers != ['']) - - gallium_drivers = get_option('gallium-drivers') - if gallium_drivers.contains('auto') -diff --git a/meson_options.txt b/meson_options.txt -index d472772373e..0d8fd65e07e 100644 ---- a/meson_options.txt -+++ b/meson_options.txt -@@ -42,6 +42,12 @@ option( - choices : ['auto', 'true', 'false', 'disabled', 'enabled'], - description : 'enable support for dri3' - ) -+option( -+ 'dri', -+ type : 'boolean', -+ value : false, -+ description : 'enable support for dri' -+) - option( - 'dri-drivers', - type : 'array', --- -2.28.0 - diff --git a/recipes-graphics/mesa/files/0004-Revert-mesa-Enable-asm-unconditionally-now-that-gen_.patch b/recipes-graphics/mesa/files/0004-Revert-mesa-Enable-asm-unconditionally-now-that-gen_.patch deleted file mode 100644 index 1cda3df..0000000 --- a/recipes-graphics/mesa/files/0004-Revert-mesa-Enable-asm-unconditionally-now-that-gen_.patch +++ /dev/null @@ -1,222 +0,0 @@ -From cfd31ff9b1bfa69c6a1b3486386a7eb28d9e925a Mon Sep 17 00:00:00 2001 -From: Alistair Francis <alistair@alistair23.me> -Date: Wed, 2 Sep 2020 15:31:59 -0500 -Subject: [PATCH] Revert "mesa: Enable asm unconditionally, now that - gen_matypes is gone." - -This reverts commit 20294dceebc23236e33b22578245f7e6f41b6997. - -Upstream-Status: Inappropriate [configuration] -Signed-off-by: Alistair Francis <alistair@alistair23.me> ---- - Android.common.mk | 3 + - Android.mk | 7 +++ - meson.build | 96 +++++++++++++++++++---------- - meson_options.txt | 6 ++ - src/mesa/Android.libmesa_dricore.mk | 2 + - src/mesa/Android.libmesa_st_mesa.mk | 2 + - 6 files changed, 83 insertions(+), 33 deletions(-) - -diff --git a/Android.common.mk b/Android.common.mk -index 9141ef951d6..cec6f7888c3 100644 ---- a/Android.common.mk -+++ b/Android.common.mk -@@ -103,9 +103,12 @@ ifeq ($(shell test $(PLATFORM_SDK_VERSION) -ge 26 && echo true),true) - LOCAL_CFLAGS += -DHAVE_SYS_SHM_H - endif - -+ifeq ($(strip $(MESA_ENABLE_ASM)),true) - ifeq ($(TARGET_ARCH),x86) - LOCAL_CFLAGS += \ - -DUSE_X86_ASM -+ -+endif - endif - ifeq ($(ARCH_ARM_HAVE_NEON),true) - LOCAL_CFLAGS_arm += -DUSE_ARM_ASM -diff --git a/Android.mk b/Android.mk -index aa2e7f7610e..adc0db69584 100644 ---- a/Android.mk -+++ b/Android.mk -@@ -90,6 +90,13 @@ endif - - $(foreach d, $(MESA_BUILD_CLASSIC) $(MESA_BUILD_GALLIUM), $(eval $(d) := true)) - -+# host and target must be the same arch to generate matypes.h -+ifeq ($(TARGET_ARCH),$(HOST_ARCH)) -+MESA_ENABLE_ASM := true -+else -+MESA_ENABLE_ASM := false -+endif -+ - ifneq ($(filter true, $(HAVE_GALLIUM_RADEONSI)),) - MESA_ENABLE_LLVM := true - endif -diff --git a/meson.build b/meson.build -index 2bc7d3a3556..c0159c155fb 100644 ---- a/meson.build -+++ b/meson.build -@@ -52,6 +52,9 @@ pre_args = [ - with_vulkan_icd_dir = get_option('vulkan-icd-dir') - with_tests = get_option('build-tests') - with_aco_tests = get_option('build-aco-tests') -+with_valgrind = get_option('valgrind') -+with_libunwind = get_option('libunwind') -+with_asm = get_option('asm') - with_glx_read_only_text = get_option('glx-read-only-text') - with_glx_direct = get_option('glx-direct') - with_osmesa = get_option('osmesa') -@@ -1149,41 +1152,68 @@ dep_ws2_32 = cc.find_library('ws2_32', required : with_platform_windows) - - # TODO: shared/static? Is this even worth doing? - -+# When cross compiling we generally need to turn off the use of assembly, -+# because mesa's assembly relies on building an executable for the host system, -+# and running it to get information about struct sizes. There is at least one -+# case of cross compiling where we can use asm, and that's x86_64 -> x86 when -+# host OS == build OS, since in that case the build machine can run the host's -+# binaries. -+if with_asm and meson.is_cross_build() -+ if build_machine.system() != host_machine.system() -+ # TODO: It may be possible to do this with an exe_wrapper (like wine). -+ message('Cross compiling from one OS to another, disabling assembly.') -+ with_asm = false -+ elif not (build_machine.cpu_family().startswith('x86') and host_machine.cpu_family() == 'x86') -+ # FIXME: Gentoo always sets -m32 for x86_64 -> x86 builds, resulting in an -+ # x86 -> x86 cross compile. We use startswith rather than == to handle this -+ # case. -+ # TODO: There may be other cases where the 64 bit version of the -+ # architecture can run 32 bit binaries (aarch64 and armv7 for example) -+ message(''' -+ Cross compiling to different architectures, and the host cannot run -+ the build machine's binaries. Disabling assembly. -+ ''') -+ with_asm = false -+ endif -+endif -+ - with_asm_arch = '' --if host_machine.cpu_family() == 'x86' -- if system_has_kms_drm or host_machine.system() == 'gnu' -- with_asm_arch = 'x86' -- pre_args += ['-DUSE_X86_ASM', '-DUSE_MMX_ASM', '-DUSE_3DNOW_ASM', -- '-DUSE_SSE_ASM'] -- -- if with_glx_read_only_text -- pre_args += ['-DGLX_X86_READONLY_TEXT'] -+if with_asm -+ if host_machine.cpu_family() == 'x86' -+ if system_has_kms_drm or host_machine.system() == 'gnu' -+ with_asm_arch = 'x86' -+ pre_args += ['-DUSE_X86_ASM', '-DUSE_MMX_ASM', '-DUSE_3DNOW_ASM', -+ '-DUSE_SSE_ASM'] -+ -+ if with_glx_read_only_text -+ pre_args += ['-DGLX_X86_READONLY_TEXT'] -+ endif -+ endif -+ elif host_machine.cpu_family() == 'x86_64' -+ if system_has_kms_drm -+ with_asm_arch = 'x86_64' -+ pre_args += ['-DUSE_X86_64_ASM'] -+ endif -+ elif host_machine.cpu_family() == 'arm' -+ if system_has_kms_drm -+ with_asm_arch = 'arm' -+ pre_args += ['-DUSE_ARM_ASM'] -+ endif -+ elif host_machine.cpu_family() == 'aarch64' -+ if system_has_kms_drm -+ with_asm_arch = 'aarch64' -+ pre_args += ['-DUSE_AARCH64_ASM'] -+ endif -+ elif host_machine.cpu_family() == 'sparc64' -+ if system_has_kms_drm -+ with_asm_arch = 'sparc' -+ pre_args += ['-DUSE_SPARC_ASM'] -+ endif -+ elif host_machine.cpu_family().startswith('ppc64') and host_machine.endian() == 'little' -+ if system_has_kms_drm -+ with_asm_arch = 'ppc64le' -+ pre_args += ['-DUSE_PPC64LE_ASM'] - endif -- endif --elif host_machine.cpu_family() == 'x86_64' -- if system_has_kms_drm -- with_asm_arch = 'x86_64' -- pre_args += ['-DUSE_X86_64_ASM'] -- endif --elif host_machine.cpu_family() == 'arm' -- if system_has_kms_drm -- with_asm_arch = 'arm' -- pre_args += ['-DUSE_ARM_ASM'] -- endif --elif host_machine.cpu_family() == 'aarch64' -- if system_has_kms_drm -- with_asm_arch = 'aarch64' -- pre_args += ['-DUSE_AARCH64_ASM'] -- endif --elif host_machine.cpu_family() == 'sparc64' -- if system_has_kms_drm -- with_asm_arch = 'sparc' -- pre_args += ['-DUSE_SPARC_ASM'] -- endif --elif host_machine.cpu_family().startswith('ppc64') and host_machine.endian() == 'little' -- if system_has_kms_drm -- with_asm_arch = 'ppc64le' -- pre_args += ['-DUSE_PPC64LE_ASM'] - endif - endif - -diff --git a/meson_options.txt b/meson_options.txt -index 0d8fd65e07e..0fc28d69c93 100644 ---- a/meson_options.txt -+++ b/meson_options.txt -@@ -254,6 +254,12 @@ option( - value : false, - description : 'Enable GLVND support.' - ) -+option( -+ 'asm', -+ type : 'boolean', -+ value : true, -+ description : 'Build assembly code if possible' -+) - option( - 'glx-read-only-text', - type : 'boolean', -diff --git a/src/mesa/Android.libmesa_dricore.mk b/src/mesa/Android.libmesa_dricore.mk -index 8eb6aabe836..792117767b4 100644 ---- a/src/mesa/Android.libmesa_dricore.mk -+++ b/src/mesa/Android.libmesa_dricore.mk -@@ -39,9 +39,11 @@ LOCAL_MODULE_CLASS := STATIC_LIBRARIES - LOCAL_SRC_FILES := \ - $(MESA_FILES) - -+ifeq ($(strip $(MESA_ENABLE_ASM)),true) - ifeq ($(TARGET_ARCH),x86) - LOCAL_SRC_FILES += $(X86_FILES) - endif # x86 -+endif # MESA_ENABLE_ASM - - ifeq ($(ARCH_X86_HAVE_SSE4_1),true) - LOCAL_WHOLE_STATIC_LIBRARIES := \ -diff --git a/src/mesa/Android.libmesa_st_mesa.mk b/src/mesa/Android.libmesa_st_mesa.mk -index 16153a3c5bd..ddfd03059c5 100644 ---- a/src/mesa/Android.libmesa_st_mesa.mk -+++ b/src/mesa/Android.libmesa_st_mesa.mk -@@ -42,9 +42,11 @@ LOCAL_GENERATED_SOURCES := \ - $(MESA_GEN_GLSL_H) \ - $(MESA_GEN_NIR_H) - -+ifeq ($(strip $(MESA_ENABLE_ASM)),true) - ifeq ($(TARGET_ARCH),x86) - LOCAL_SRC_FILES += $(X86_FILES) - endif # x86 -+endif # MESA_ENABLE_ASM - - ifeq ($(ARCH_X86_HAVE_SSE4_1),true) - LOCAL_WHOLE_STATIC_LIBRARIES := \ --- -2.28.0 - diff --git a/recipes-graphics/mesa/files/fix-meson-config-compat.patch b/recipes-graphics/mesa/files/fix-meson-config-compat.patch deleted file mode 100644 index 433d120..0000000 --- a/recipes-graphics/mesa/files/fix-meson-config-compat.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 61d70cfa52df2a434196875ab0c0b67d2ffe2293 Mon Sep 17 00:00:00 2001 -From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> -Date: Wed, 2 Sep 2020 15:37:55 -0500 -Subject: [PATCH] mesa: adapt meson script to restore compatibility with - release one - -During this development cycle meson script was changed to stop accepting -empty values. This causes issues using some build options from OE-core's -mesa.inc. Restore this compatibility by patching in support for empty -values. - -Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> ---- - meson_options.txt | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - -diff --git a/meson_options.txt b/meson_options.txt -index c9d9d4d13bf..e3fe51aa371 100644 ---- a/meson_options.txt -+++ b/meson_options.txt -@@ -52,7 +52,7 @@ option( - 'dri-drivers', - type : 'array', - value : ['auto'], -- choices : ['auto', 'i915', 'i965', 'r100', 'r200', 'nouveau', 'swrast'], -+ choices : ['', 'auto', 'i915', 'i965', 'r100', 'r200', 'nouveau', 'swrast'], - description : 'List of dri drivers to build. If this is set to auto all drivers applicable to the target OS/architecture will be built' - ) - option( -@@ -72,7 +72,7 @@ option( - type : 'array', - value : ['auto'], - choices : [ -- 'auto', 'kmsro', 'radeonsi', 'r300', 'r600', 'nouveau', 'freedreno', -+ '', 'auto', 'kmsro', 'radeonsi', 'r300', 'r600', 'nouveau', 'freedreno', - 'swrast', 'v3d', 'vc4', 'etnaviv', 'tegra', 'i915', 'svga', 'virgl', - 'swr', 'panfrost', 'iris', 'lima', 'zink' - ], -@@ -179,7 +179,7 @@ option( - 'vulkan-drivers', - type : 'array', - value : ['auto'], -- choices : ['auto', 'amd', 'broadcom', 'freedreno', 'intel', 'swrast'], -+ choices : ['', 'auto', 'amd', 'broadcom', 'freedreno', 'intel', 'swrast'], - description : 'List of vulkan drivers to build. If this is set to auto all drivers applicable to the target OS/architecture will be built' - ) - option( --- -2.28.0 - diff --git a/recipes-graphics/mesa/mesa_%.bbappend b/recipes-graphics/mesa/mesa_%.bbappend index 1ab9b43..3f4a6e2 100644 --- a/recipes-graphics/mesa/mesa_%.bbappend +++ b/recipes-graphics/mesa/mesa_%.bbappend @@ -1,9 +1,10 @@ -FILESEXTRAPATHS_prepend := "${THISDIR}/${BPN}:" +FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:" # Enable freedreno driver PACKAGECONFIG_FREEDRENO = "\ freedreno \ - ${@bb.utils.contains('DISTRO_FEATURES', 'x11', 'xa', '', d)} \ + tools \ + ${@bb.utils.contains('BBFILE_COLLECTIONS', 'openembedded-layer', 'freedreno-fdperf', '', d)} \ " -PACKAGECONFIG_append_qcom = "${PACKAGECONFIG_FREEDRENO}" +PACKAGECONFIG:append:qcom = "${PACKAGECONFIG_FREEDRENO}" diff --git a/recipes-graphics/mesa/mesa_20.3.0-rc2.bb b/recipes-graphics/mesa/mesa_20.3.0-rc2.bb deleted file mode 100644 index 188dd63..0000000 --- a/recipes-graphics/mesa/mesa_20.3.0-rc2.bb +++ /dev/null @@ -1,14 +0,0 @@ -require recipes-graphics/mesa/mesa.inc - -FILESEXTRAPATHS_prepend := "${COREBASE}/meta/recipes-graphics/mesa/files:" - -SRC_URI[sha256sum] = "671bfc98724ca04ccda3255d9aa7fe3c730b10477446983a708305d00e9f5b5b" - -SRC_URI_remove = " \ - file://0001-meson-Add-xcb-fixes-to-loader-when-using-x11-and-dri.patch \ - file://0005-vc4-use-intmax_t-for-formatted-output-of-timespec-me.patch \ -" - -# Do not select this version by default -DEFAULT_PREFERENCE = "-1" -DEFAULT_PREFERENCE_sm8250 = "1" diff --git a/recipes-graphics/mesa/mesa_git.bb b/recipes-graphics/mesa/mesa_git.bb index 5940e8c..fda9950 100644 --- a/recipes-graphics/mesa/mesa_git.bb +++ b/recipes-graphics/mesa/mesa_git.bb @@ -1,34 +1,34 @@ require recipes-graphics/mesa/mesa.inc -SRC_URI = "git://gitlab.freedesktop.org/mesa/mesa.git;protocol=https \ +SRC_URI = "git://gitlab.freedesktop.org/mesa/mesa.git;protocol=https;branch=main \ file://0001-meson.build-check-for-all-linux-host_os-combinations.patch \ file://0002-meson.build-make-TLS-ELF-optional.patch \ - file://0003-Allow-enable-DRI-without-DRI-drivers.patch \ - file://0004-Revert-mesa-Enable-asm-unconditionally-now-that-gen_.patch \ file://0001-meson-misdetects-64bit-atomics-on-mips-clang.patch \ - file://fix-meson-config-compat.patch \ " -LIC_FILES_CHKSUM = "file://docs/license.rst;md5=9aa1bc48c9826ad9fdb16661f6930496" +LIC_FILES_CHKSUM = "file://docs/license.rst;md5=17a4ea65de7a9ab42437f3131e616a7f" -SRCREV = "aed8d30b507568b7fc0f32afca012f8def5aca16" -#SRCREV_sm8250 = "${AUTOREV}" +SRCREV := "${@oe.utils.conditional("MESA_DEV", "1", "${AUTOREV}", "26677008b9a7c0ef82f2a7f4b479d3cb06097c66", d)}" +DEFAULT_PREFERENCE = "${@oe.utils.conditional("MESA_DEV", "1", "1", "-1", d)}" -PLATFORMS_remove = "drm surfaceless" +PLATFORMS:remove = "drm surfaceless" +PACKAGECONFIG[osmesa] = "-Dosmesa=true,-Dosmesa=false" +DRIDRIVERS:remove = "swrast" +DRIDRIVERS:append = ",auto" +DRIDRIVERS:class-native = ",auto" +DRIDRIVERS:class-nativesdk = ",auto" S = "${WORKDIR}/git" -PV = "20.4-dev+git${SRCPV}" - -# Do not select this version by default -DEFAULT_PREFERENCE = "-1" +PV = "2x.x-dev+git${SRCPV}" +ERROR_QA:remove = "version-going-backwards" # Add package to install require files to run tests for mesa PACKAGES =+ "mesa-ci" -FILES_${PN}-ci = "${bindir}/deqp-runner.sh ${datadir}/mesa/deqp-*" -do_install_append () { +FILES:${PN}-ci = "${bindir}/deqp-runner.sh ${datadir}/mesa/deqp-*" +do_install:append () { install -d ${D}/${datadir}/mesa - install -m 0644 ${S}/.gitlab-ci/deqp-default-skips.txt ${D}/${datadir}/mesa/ - for f in ${S}/.gitlab-ci/deqp-freedreno-*; do + install -m 0644 ${S}/.gitlab-ci/all-skips.txt ${D}/${datadir}/mesa/ + for f in ${S}/src/freedreno/ci/deqp-freedreno-*; do install -m 0644 $f ${D}/${datadir}/mesa/ done diff --git a/recipes-graphics/xorg-xserver/xserver-xf86-config_0.1.bbappend b/recipes-graphics/xorg-xserver/xserver-xf86-config_0.1.bbappend index 72d991c..4fc41d0 100644 --- a/recipes-graphics/xorg-xserver/xserver-xf86-config_0.1.bbappend +++ b/recipes-graphics/xorg-xserver/xserver-xf86-config_0.1.bbappend @@ -1 +1 @@ -FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" diff --git a/recipes-graphics/xorg-xserver/xserver-xorg_%.bbappend b/recipes-graphics/xorg-xserver/xserver-xorg_%.bbappend index 7221b69..7fc43f6 100644 --- a/recipes-graphics/xorg-xserver/xserver-xorg_%.bbappend +++ b/recipes-graphics/xorg-xserver/xserver-xorg_%.bbappend @@ -1,3 +1,3 @@ # We want to use modesetting + glamor with mesa freedreno driver # http://bloggingthemonkey.blogspot.fr/2016/11/a-quick-note-for-usersdistros.html -PACKAGECONFIG_append_qcom = "${@bb.utils.contains('DISTRO_FEATURES', 'opengl', ' dri3 xshmfence glamor', '', d)}" +PACKAGECONFIG:append:qcom = "${@bb.utils.contains('DISTRO_FEATURES', 'opengl', ' dri3 glamor', '', d)}" diff --git a/recipes-kernel/images/esp-qcom-image.bb b/recipes-kernel/images/esp-qcom-image.bb new file mode 100644 index 0000000..2749752 --- /dev/null +++ b/recipes-kernel/images/esp-qcom-image.bb @@ -0,0 +1,20 @@ +DESCRIPTION = "EFI System Partition Image to boot Qualcomm boards" + +COMPATIBLE_HOST = '(x86_64.*|arm.*|aarch64.*)-(linux.*)' + +PACKAGE_INSTALL = " \ + kernel-devicetree \ + linux-qcom-uki \ + systemd-boot \ + systemd-bootconf \ +" + +KERNELDEPMODDEPEND = "" +KERNEL_DEPLOY_DEPEND = "" + +inherit image + +IMAGE_FSTYPES = "vfat" +IMAGE_FSTYPES_DEBUGFS = "" + +LINGUAS_INSTALL = "" diff --git a/recipes-kernel/images/initramfs-qcom-image.bb b/recipes-kernel/images/initramfs-qcom-image.bb new file mode 100644 index 0000000..411a096 --- /dev/null +++ b/recipes-kernel/images/initramfs-qcom-image.bb @@ -0,0 +1,5 @@ +require initramfs-rootfs-image.bb + +DESCRIPTION = "Ramdisk image for pivoting into rootfs extended to boot Qualcomm boards" + +PACKAGE_INSTALL += "packagegroup-qcom-boot" diff --git a/recipes-kernel/images/initramfs-rootfs-image.bb b/recipes-kernel/images/initramfs-rootfs-image.bb new file mode 100644 index 0000000..028f212 --- /dev/null +++ b/recipes-kernel/images/initramfs-rootfs-image.bb @@ -0,0 +1,27 @@ +DESCRIPTION = "Ramdisk image for pivoting into rootfs" + +PACKAGE_INSTALL = " \ + base-passwd \ + initramfs-module-copy-modules \ + initramfs-module-rootfs \ + initramfs-module-udev \ + ${VIRTUAL-RUNTIME_base-utils} \ + ${MACHINE_ESSENTIAL_EXTRA_RDEPENDS} \ + ${ROOTFS_BOOTSTRAP_INSTALL} \ +" + +# Do not pollute the initrd image with rootfs features +IMAGE_FEATURES = "debug-tweaks" +IMAGE_LINGUAS = "" + +LICENSE = "MIT" + +IMAGE_FSTYPES = "${INITRAMFS_FSTYPES}" +IMAGE_NAME_SUFFIX ?= "" +inherit core-image + +IMAGE_ROOTFS_SIZE = "8192" +IMAGE_ROOTFS_EXTRA_SPACE = "0" + +# Exclude all kernel images from the rootfs +PACKAGE_EXCLUDE = "kernel-image-*" diff --git a/recipes-kernel/images/linux-qcom-uki.bb b/recipes-kernel/images/linux-qcom-uki.bb new file mode 100644 index 0000000..0d34b60 --- /dev/null +++ b/recipes-kernel/images/linux-qcom-uki.bb @@ -0,0 +1,89 @@ +SUMMARY = "Qualcomm linux kernel UKI creation" + +DESCRIPTION = "Pack kernel image as a UKI (Unified Kernel Image) \ +by combining UEFI stub from systemd-boot, the kernel Image, initramfs, \ +optional dtb, osrelease info and other metadata like kernel cmdline." + +LICENSE = "BSD-3-Clause-Clear" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/BSD-3-Clause-Clear;md5=7a434440b651f4a472ca93716d01033a" + +COMPATIBLE_HOST = '(arm.*|aarch64.*)-(linux.*)' + +inherit python3native image-artifact-names linux-kernel-base + +DEPENDS = " systemd-boot-native python3-native python3-pefile-native \ + os-release systemd-boot virtual/kernel " + +require conf/image-uefi.conf + +KERNEL_VERSION = "${@get_kernelversion_file('${STAGING_KERNEL_BUILDDIR}')}" + +do_configure[depends] += " \ + systemd-boot:do_deploy \ + virtual/kernel:do_deploy \ + " +do_configure[depends] += "${@ '${INITRAMFS_IMAGE}:do_image_complete' if d.getVar('INITRAMFS_IMAGE') else ''}" + +do_compile() { + # Construct the ukify command + ukify_cmd="" + + # Ramdisk + if [ -n "${INITRAMFS_IMAGE}" ]; then + initrd="" + for img in ${INITRAMFS_FSTYPES}; do + if [ -e "${DEPLOY_DIR_IMAGE}/${INITRAMFS_IMAGE_NAME}.$img" ]; then + initrd="${DEPLOY_DIR_IMAGE}/${INITRAMFS_IMAGE_NAME}.$img" + break + fi + done + [ -f $initrd ] && echo "Creating UKI with $initrd" || bbfatal "$initrd is not a valid initrd to create UKI." + ukify_cmd="$ukify_cmd --initrd=$initrd" + fi + + # Kernel Image + # Note: systemd-boot can't handle compressed kernel image. + kernel_image="${DEPLOY_DIR_IMAGE}/Image" + [ -f $kernel_image ] && echo "Creating UKI with $kernel_image" || bbfatal "No valid kernel image to create UKI. Add 'Image' to KERNEL_IMAGETYPES." + ukify_cmd="$ukify_cmd --linux=$kernel_image" + + # Kernel version + ukify_cmd="$ukify_cmd --uname ${KERNEL_VERSION}" + + # Kernel cmdline + if [ -n "${KERNEL_CMDLINE_EXTRA}" ]; then + ukify_cmd="$ukify_cmd --cmdline='${KERNEL_CMDLINE_EXTRA}'" + fi + + # Architecture + ukify_cmd="$ukify_cmd --efi-arch ${EFI_ARCH}" + + # OS-release + osrelease="${RECIPE_SYSROOT}${libdir}/os-release" + ukify_cmd="$ukify_cmd --os-release @$osrelease" + + # Stub + stub="${DEPLOY_DIR_IMAGE}/linux${EFI_ARCH}.efi.stub" + [ -f $stub ] && echo "Creating UKI with $stub" || bbfatal "$stub is not a valid stub to create UKI." + ukify_cmd="$ukify_cmd --stub $stub" + + # Output + mkdir -p "${B}${EFI_UKI_PATH}" + output="${B}${EFI_UKI_PATH}/${EFI_LINUX_IMG}" + rm -f $output + ukify_cmd="$ukify_cmd --output=$output" + + # Call ukify to generate uki. + echo "ukify cmd:$ukify_cmd" + ukify build $ukify_cmd +} + +do_install() { + install -Dm 0755 ${B}${EFI_UKI_PATH}/${EFI_LINUX_IMG} ${D}${EFI_UKI_PATH}/${EFI_LINUX_IMG} +} + +FILES:${PN} = "${EFI_UKI_PATH}/${EFI_LINUX_IMG}" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +SKIP_RECIPE[linux-qcom-uki] ?= "${@bb.utils.contains('KERNEL_IMAGETYPES', 'Image', '', 'systemd-boot needs uncompressed kernel image. Add "Image" to KERNEL_IMAGETYPES.', d)}" diff --git a/recipes-kernel/linux-firmware/linux-firmware_%.bbappend b/recipes-kernel/linux-firmware/linux-firmware_%.bbappend new file mode 100644 index 0000000..a60e935 --- /dev/null +++ b/recipes-kernel/linux-firmware/linux-firmware_%.bbappend @@ -0,0 +1,16 @@ +# To make the layer pass yocto-check-layer only inherit update-alternatives when building for qualcomm +ALTERNATIVES_CLASS = "" +ALTERNATIVES_CLASS:qcom = "update-alternatives" + +inherit ${ALTERNATIVES_CLASS} + +# firmware-ath6kl provides updated bdata.bin, which can not be accepted into main linux-firmware repo +ALTERNATIVE:${PN}-ath6k:qcom = "ar6004-hw13-bdata" +ALTERNATIVE_LINK_NAME[ar6004-hw13-bdata] = "${nonarch_base_libdir}/firmware/ath6k/AR6004/hw1.3/bdata.bin" + +ALTERNATIVE:${PN}-ath11k:qcom += "wcn6855-hw20-amss wcn6855-hw20-m3 wcn6855-hw20-regdb wcn6855-hw20-notice wcn6855-hw20-board-2" +ALTERNATIVE_LINK_NAME[wcn6855-hw20-amss] = "${nonarch_base_libdir}/firmware/ath11k/WCN6855/hw2.0/amss.bin" +ALTERNATIVE_LINK_NAME[wcn6855-hw20-m3] = "${nonarch_base_libdir}/firmware/ath11k/WCN6855/hw2.0/m3.bin" +ALTERNATIVE_LINK_NAME[wcn6855-hw20-regdb] = "${nonarch_base_libdir}/firmware/ath11k/WCN6855/hw2.0/regdb.bin" +ALTERNATIVE_LINK_NAME[wcn6855-hw20-notice] = "${nonarch_base_libdir}/firmware/ath11k/WCN6855/hw2.0/Notice.txt" +ALTERNATIVE_LINK_NAME[wcn6855-hw20-board-2] = "${nonarch_base_libdir}/firmware/ath11k/WCN6855/hw2.0/board-2.bin" diff --git a/recipes-kernel/linux/linux-linaro-qcom.inc b/recipes-kernel/linux/linux-linaro-qcom.inc index 21f0ae6..f7c1c96 100644 --- a/recipes-kernel/linux/linux-linaro-qcom.inc +++ b/recipes-kernel/linux/linux-linaro-qcom.inc @@ -1,27 +1,33 @@ -# Copyright (C) 2014 Linaro +# Copyright (C) 2014-2021 Linaro # Copyright (C) 2012, 2013 O.S. Systems Software LTDA. # Released under the MIT license (see COPYING.MIT for the terms) -DESCRIPTION = "Linux kernel for MSM platforms" -LICENSE = "GPLv2" +DESCRIPTION ??= "Linaro Qualcomm Landing team ${PV} Kernel" +LICENSE = "GPL-2.0-only" +LIC_FILES_CHKSUM = "file://COPYING;md5=6bc538ed5bd9a7fc9398086aedcd7e46" inherit kernel -# Put a local version until we have a true SRCREV to point to -LOCALVERSION ?= "+linaro" +LOCALVERSION ?= "-linaro-lt-qcom" SCMVERSION ?= "y" -LINUX_LINARO_QCOM_GIT ?= "git://git.linaro.org/landing-teams/working/qualcomm/kernel.git;protocol=https" +SRCBRANCH = "release/qcomlt-${PV}" + +COMPATIBLE_MACHINE = "(qcom)" + +LINUX_LINARO_QCOM_GIT ?= "git://git.codelinaro.org/linaro/qcomlt/kernel.git;protocol=https" SRC_URI = "${LINUX_LINARO_QCOM_GIT};branch=${SRCBRANCH}" S = "${WORKDIR}/git" -KERNEL_DEFCONFIG_aarch64 ?= "${S}/arch/arm64/configs/defconfig" -KERNEL_DEFCONFIG_apq8064 ?= "${S}/arch/arm/configs/qcom_defconfig" +KERNEL_DEFCONFIG:aarch64 ?= "${S}/arch/arm64/configs/defconfig" +KERNEL_DEFCONFIG:arm ?= "${S}/arch/arm/configs/qcom_defconfig" KERNEL_CONFIG_FRAGMENTS += "${S}/kernel/configs/distro.config" +inherit linux-qcom-bootimg + kernel_conf_variable() { - CONF_SED_SCRIPT="$CONF_SED_SCRIPT /CONFIG_$1[ =]/d;" + sed -e "/CONFIG_$1[ =]/d;" -i ${B}/.config if test "$2" = "n" then echo "# CONFIG_$1 is not set" >> ${B}/.config @@ -30,19 +36,16 @@ kernel_conf_variable() { fi } -do_configure_prepend() { - echo "" > ${B}/.config - CONF_SED_SCRIPT="" - - kernel_conf_variable LOCALVERSION "\"${LOCALVERSION}\"" - kernel_conf_variable LOCALVERSION_AUTO y - +do_configure:prepend() { if [ -f '${WORKDIR}/defconfig' ]; then - sed -e "${CONF_SED_SCRIPT}" < '${WORKDIR}/defconfig' >> '${B}/.config' + cp '${WORKDIR}/defconfig' '${B}/.config' else - sed -e "${CONF_SED_SCRIPT}" < '${KERNEL_DEFCONFIG}' >> '${B}/.config' + cp '${KERNEL_DEFCONFIG}' '${B}/.config' fi + kernel_conf_variable LOCALVERSION "\"${LOCALVERSION}\"" + kernel_conf_variable LOCALVERSION_AUTO y + if [ "${SCMVERSION}" = "y" ]; then # Add GIT revision to the local version head=`git --git-dir=${S}/.git rev-parse --verify --short HEAD 2> /dev/null` @@ -76,17 +79,8 @@ do_configure_prepend() { # Now that all the fragments are located merge them. ( cd ${WORKDIR} && ${S}/scripts/kconfig/merge_config.sh -m -r -O ${B} ${B}/.config ${KERNEL_CONFIG_FRAGMENTS} 1>&2 ) fi - - yes '' | oe_runmake -C ${S} O=${B} oldconfig - oe_runmake -C ${S} O=${B} savedefconfig && cp ${B}/defconfig ${WORKDIR}/defconfig.saved } -# append DTB -do_compile_append() { - if ! [ -e ${B}/arch/${ARCH}/boot/dts/${KERNEL_DEVICETREE} ] ; then - oe_runmake ${KERNEL_DEVICETREE} - fi - cp arch/${ARCH}/boot/${KERNEL_IMAGETYPE} arch/${ARCH}/boot/${KERNEL_IMAGETYPE}.backup - cat arch/${ARCH}/boot/${KERNEL_IMAGETYPE}.backup arch/${ARCH}/boot/dts/${KERNEL_DEVICETREE} > arch/${ARCH}/boot/${KERNEL_IMAGETYPE} - rm -f arch/${ARCH}/boot/${KERNEL_IMAGETYPE}.backup +do_configure:append() { + oe_runmake -C ${S} O=${B} savedefconfig && cp ${B}/defconfig ${WORKDIR}/defconfig.saved } diff --git a/recipes-kernel/linux/linux-linaro-qcomlt-5.7/0001-arm64-dts-qcom-sm8250-Add-USB-and-PHY-device-nodes.patch b/recipes-kernel/linux/linux-linaro-qcomlt-5.7/0001-arm64-dts-qcom-sm8250-Add-USB-and-PHY-device-nodes.patch deleted file mode 100644 index 2975a2a..0000000 --- a/recipes-kernel/linux/linux-linaro-qcomlt-5.7/0001-arm64-dts-qcom-sm8250-Add-USB-and-PHY-device-nodes.patch +++ /dev/null @@ -1,207 +0,0 @@ -From e4a349e3fce09e441f6568ca318be66709386514 Mon Sep 17 00:00:00 2001 -From: Jonathan Marek <jonathan@marek.ca> -Date: Tue, 9 Jun 2020 15:40:24 -0400 -Subject: [PATCH] arm64: dts: qcom: sm8250: Add USB and PHY device nodes - -Add device nodes for the USB3 controller, QMP SS PHY and -SNPS HS PHY. - -Signed-off-by: Jonathan Marek <jonathan@marek.ca> ---- - arch/arm64/boot/dts/qcom/sm8250.dtsi | 180 +++++++++++++++++++++++++++ - 1 file changed, 180 insertions(+) - -diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi -index cc6c65883d88..68f9a3ce9760 100644 ---- a/arch/arm64/boot/dts/qcom/sm8250.dtsi -+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi -@@ -1097,6 +1097,186 @@ intc: interrupt-controller@17a00000 { - interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; - }; - -+ usb_1_hsphy: phy@88e3000 { -+ compatible = "qcom,sm8250-usb-hs-phy", -+ "qcom,usb-snps-hs-7nm-phy"; -+ reg = <0 0x088e3000 0 0x400>; -+ status = "disabled"; -+ #phy-cells = <0>; -+ -+ clocks = <&rpmhcc RPMH_CXO_CLK>; -+ clock-names = "ref"; -+ -+ resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; -+ }; -+ -+ usb_2_hsphy: phy@88e4000 { -+ compatible = "qcom,sm8250-usb-hs-phy", -+ "qcom,usb-snps-hs-7nm-phy"; -+ reg = <0 0x088e4000 0 0x400>; -+ status = "disabled"; -+ #phy-cells = <0>; -+ -+ clocks = <&rpmhcc RPMH_CXO_CLK>; -+ clock-names = "ref"; -+ -+ resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; -+ }; -+ -+ usb_1_qmpphy: phy@88e9000 { -+ compatible = "qcom,sm8250-qmp-usb3-phy"; -+ reg = <0 0x088e9000 0 0x200>, -+ <0 0x088e8000 0 0x20>; -+ reg-names = "reg-base", "dp_com"; -+ status = "disabled"; -+ #clock-cells = <1>; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ ranges; -+ -+ clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, -+ <&rpmhcc RPMH_CXO_CLK>, -+ <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; -+ clock-names = "aux", "ref_clk_src", "com_aux"; -+ -+ resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, -+ <&gcc GCC_USB3_PHY_PRIM_BCR>; -+ reset-names = "phy", "common"; -+ -+ usb_1_ssphy: lanes@88e9200 { -+ reg = <0 0x088e9200 0 0x200>, -+ <0 0x088e9400 0 0x200>, -+ <0 0x088e9c00 0 0x400>, -+ <0 0x088e9600 0 0x200>, -+ <0 0x088e9800 0 0x200>, -+ <0 0x088e9a00 0 0x100>; -+ #phy-cells = <0>; -+ clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; -+ clock-names = "pipe0"; -+ clock-output-names = "usb3_phy_pipe_clk_src"; -+ }; -+ }; -+ -+ usb_2_qmpphy: phy@88eb000 { -+ compatible = "qcom,sm8250-qmp-usb3-uni-phy"; -+ reg = <0 0x088eb000 0 0x200>; -+ status = "disabled"; -+ #clock-cells = <1>; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ ranges; -+ -+ clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, -+ <&rpmhcc RPMH_CXO_CLK>, -+ <&gcc GCC_USB3_SEC_CLKREF_EN>, -+ <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>; -+ clock-names = "aux", "ref_clk_src", "ref", "com_aux"; -+ -+ resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>, -+ <&gcc GCC_USB3_PHY_SEC_BCR>; -+ reset-names = "phy", "common"; -+ -+ usb_2_ssphy: lane@88eb200 { -+ reg = <0 0x088eb200 0 0x200>, -+ <0 0x088eb400 0 0x200>, -+ <0 0x088eb800 0 0x800>; -+ #phy-cells = <0>; -+ clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; -+ clock-names = "pipe0"; -+ clock-output-names = "usb3_uni_phy_pipe_clk_src"; -+ }; -+ }; -+ -+ usb_1: usb@a6f8800 { -+ compatible = "qcom,sm8250-dwc3", "qcom,dwc3"; -+ reg = <0 0x0a6f8800 0 0x400>; -+ status = "disabled"; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ ranges; -+ dma-ranges; -+ -+ clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, -+ <&gcc GCC_USB30_PRIM_MASTER_CLK>, -+ <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, -+ <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, -+ <&gcc GCC_USB30_PRIM_SLEEP_CLK>, -+ <&gcc GCC_USB3_SEC_CLKREF_EN>; -+ clock-names = "cfg_noc", "core", "iface", "mock_utmi", -+ "sleep", "xo"; -+ -+ assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, -+ <&gcc GCC_USB30_PRIM_MASTER_CLK>; -+ assigned-clock-rates = <19200000>, <200000000>; -+ -+ interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, -+ <&pdc 14 IRQ_TYPE_EDGE_BOTH>, -+ <&pdc 15 IRQ_TYPE_EDGE_BOTH>, -+ <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", -+ "dm_hs_phy_irq", "ss_phy_irq"; -+ -+ power-domains = <&gcc USB30_PRIM_GDSC>; -+ -+ resets = <&gcc GCC_USB30_PRIM_BCR>; -+ -+ usb_1_dwc3: dwc3@a600000 { -+ compatible = "snps,dwc3"; -+ reg = <0 0x0a600000 0 0xcd00>; -+ interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; -+ //iommus = <&apps_smmu 0x0 0x0>; -+ snps,dis_u2_susphy_quirk; -+ snps,dis_enblslpm_quirk; -+ phys = <&usb_1_hsphy>, <&usb_1_ssphy>; -+ phy-names = "usb2-phy", "usb3-phy"; -+ }; -+ }; -+ -+ usb_2: usb@a8f8800 { -+ compatible = "qcom,sm8250-dwc3", "qcom,dwc3"; -+ reg = <0 0x0a8f8800 0 0x400>; -+ status = "disabled"; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ ranges; -+ dma-ranges; -+ -+ clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, -+ <&gcc GCC_USB30_SEC_MASTER_CLK>, -+ <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, -+ <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, -+ <&gcc GCC_USB30_SEC_SLEEP_CLK>, -+ <&gcc GCC_USB3_SEC_CLKREF_EN>; -+ clock-names = "cfg_noc", "core", "iface", "mock_utmi", -+ "sleep", "xo"; -+ -+ assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, -+ <&gcc GCC_USB30_SEC_MASTER_CLK>; -+ assigned-clock-rates = <19200000>, <200000000>; -+ -+ interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, -+ <&pdc 12 IRQ_TYPE_EDGE_BOTH>, -+ <&pdc 13 IRQ_TYPE_EDGE_BOTH>, -+ <&pdc 16 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", -+ "dm_hs_phy_irq", "ss_phy_irq"; -+ -+ power-domains = <&gcc USB30_SEC_GDSC>; -+ -+ resets = <&gcc GCC_USB30_SEC_BCR>; -+ -+ usb_2_dwc3: dwc3@a800000 { -+ compatible = "snps,dwc3"; -+ reg = <0 0x0a800000 0 0xcd00>; -+ interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; -+ //iommus = <&apps_smmu 0x20 0>; -+ snps,dis_u2_susphy_quirk; -+ snps,dis_enblslpm_quirk; -+ phys = <&usb_2_hsphy>, <&usb_2_ssphy>; -+ phy-names = "usb2-phy", "usb3-phy"; -+ }; -+ }; -+ - pdc: interrupt-controller@b220000 { - compatible = "qcom,sm8250-pdc", "qcom,pdc"; - reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>; --- -2.27.0 - diff --git a/recipes-kernel/linux/linux-linaro-qcomlt-5.7/0001-arm64-dts-qcom-sm8250-Add-support-for-SDC2.patch b/recipes-kernel/linux/linux-linaro-qcomlt-5.7/0001-arm64-dts-qcom-sm8250-Add-support-for-SDC2.patch deleted file mode 100644 index b5e15c5..0000000 --- a/recipes-kernel/linux/linux-linaro-qcomlt-5.7/0001-arm64-dts-qcom-sm8250-Add-support-for-SDC2.patch +++ /dev/null @@ -1,45 +0,0 @@ -From a1b05da240efec1780dc654dd12efe518e4a5068 Mon Sep 17 00:00:00 2001 -From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> -Date: Tue, 9 Jun 2020 11:10:58 +0530 -Subject: [PATCH] arm64: dts: qcom: sm8250: Add support for SDC2 - -Add support for SDC2 which can be used to interface uSD card. - -Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> ---- - arch/arm64/boot/dts/qcom/sm8250.dtsi | 19 +++++++++++++++++++ - 1 file changed, 19 insertions(+) - -diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi -index 68f9a3ce9760..8e4abe5aa01f 100644 ---- a/arch/arm64/boot/dts/qcom/sm8250.dtsi -+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi -@@ -983,6 +983,25 @@ ufs_mem_phy_lanes: lanes@1d87400 { - }; - }; - -+ sdhc_2: sdhci@8804000 { -+ compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"; -+ reg = <0 0x08804000 0 0x1000>; -+ -+ interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, -+ <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-names = "hc_irq", "pwr_irq"; -+ -+ clocks = <&gcc GCC_SDCC2_AHB_CLK>, -+ <&gcc GCC_SDCC2_APPS_CLK>; -+ clock-names = "iface", "core"; -+ //iommus = <&apps_smmu 0xa0 0xf>; -+ qcom,dll-config = <0x0007642c>; -+ qcom,ddr-config = <0x80040868>; -+ power-domains = <&rpmhpd SM8250_CX>; -+ -+ status = "disabled"; -+ }; -+ - intc: interrupt-controller@17a00000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <3>; --- -2.27.0 - diff --git a/recipes-kernel/linux/linux-linaro-qcomlt-5.7/0001-arm64-dts-qcom-sm8250-Rename-UART2-node-to-UART12.patch b/recipes-kernel/linux/linux-linaro-qcomlt-5.7/0001-arm64-dts-qcom-sm8250-Rename-UART2-node-to-UART12.patch deleted file mode 100644 index 6eb26cd..0000000 --- a/recipes-kernel/linux/linux-linaro-qcomlt-5.7/0001-arm64-dts-qcom-sm8250-Rename-UART2-node-to-UART12.patch +++ /dev/null @@ -1,74 +0,0 @@ -From 7239ad605113c0945c94f0f75cfbeb3b1a38deb7 Mon Sep 17 00:00:00 2001 -From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> -Date: Mon, 29 Jun 2020 21:09:02 +0530 -Subject: [PATCH] arm64: dts: qcom: sm8250: Rename UART2 node to UART12 - -The UART12 node has been mistakenly mentioned as UART2. Let's fix that -for both SM8250 SoC and MTP board and also add pinctrl definition for -it. - -Fixes: 60378f1a171e ("arm64: dts: qcom: sm8250: Add sm8250 dts file") -Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> ---- - arch/arm64/boot/dts/qcom/sm8250-mtp.dts | 4 ++-- - arch/arm64/boot/dts/qcom/sm8250.dtsi | 11 ++++++++++- - 2 files changed, 12 insertions(+), 3 deletions(-) - -diff --git a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts -index e9acda9f5b83..e844da89e688 100644 ---- a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts -+++ b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts -@@ -13,7 +13,7 @@ / { - compatible = "qcom,sm8250-mtp"; - - aliases { -- serial0 = &uart2; -+ serial0 = &uart12; - }; - - chosen { -@@ -359,7 +359,7 @@ &tlmm { - gpio-reserved-ranges = <28 4>, <40 4>; - }; - --&uart2 { -+&uart12 { - status = "okay"; - }; - -diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi -index 3ecc780a005d..ba8e8b8a90d2 100644 ---- a/arch/arm64/boot/dts/qcom/sm8250.dtsi -+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi -@@ -865,11 +865,13 @@ spi12: spi@a90000 { - status = "disabled"; - }; - -- uart2: serial@a90000 { -+ uart12: serial@a90000 { - compatible = "qcom,geni-debug-uart"; - reg = <0x0 0x00a90000 0x0 0x4000>; - clock-names = "se"; - clocks = <&gcc 113>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_uart12_default>; - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; -@@ -1839,6 +1841,13 @@ config { - bias-disable; - }; - }; -+ -+ qup_uart12_default: qup-uart12-default { -+ mux { -+ pins = "gpio34", "gpio35"; -+ function = "qup12"; -+ }; -+ }; - }; - - timer@17c20000 { --- -2.27.0 - diff --git a/recipes-kernel/linux/linux-linaro-qcomlt-5.7/0001-arm64-dts-qcom-sm8250-add-I2C-and-SPI-nodes.patch b/recipes-kernel/linux/linux-linaro-qcomlt-5.7/0001-arm64-dts-qcom-sm8250-add-I2C-and-SPI-nodes.patch deleted file mode 100644 index 8183286..0000000 --- a/recipes-kernel/linux/linux-linaro-qcomlt-5.7/0001-arm64-dts-qcom-sm8250-add-I2C-and-SPI-nodes.patch +++ /dev/null @@ -1,1202 +0,0 @@ -From ba21e7e0130be07dadf415e277524b6544680656 Mon Sep 17 00:00:00 2001 -From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> -Date: Wed, 3 Jun 2020 18:42:42 +0300 -Subject: [PATCH] arm64: dts: qcom: sm8250: add I2C and SPI nodes - -Much like SDM845 each serial engine has 4 pins attached. Add all -possible I2C and SPI nodes for all 20 serial engines. - -Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> ---- - arch/arm64/boot/dts/qcom/sm8250.dtsi | 1147 ++++++++++++++++++++++++++ - 1 file changed, 1147 insertions(+) - -diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi -index 384839cb036c..37d3abeabf87 100644 ---- a/arch/arm64/boot/dts/qcom/sm8250.dtsi -+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi -@@ -15,6 +15,49 @@ / { - #address-cells = <2>; - #size-cells = <2>; - -+ aliases { -+ i2c0 = &i2c0; -+ i2c1 = &i2c1; -+ i2c2 = &i2c2; -+ i2c3 = &i2c3; -+ i2c4 = &i2c4; -+ i2c5 = &i2c5; -+ i2c6 = &i2c6; -+ i2c7 = &i2c7; -+ i2c8 = &i2c8; -+ i2c9 = &i2c9; -+ i2c10 = &i2c10; -+ i2c11 = &i2c11; -+ i2c12 = &i2c12; -+ i2c13 = &i2c13; -+ i2c14 = &i2c14; -+ i2c15 = &i2c15; -+ i2c16 = &i2c16; -+ i2c17 = &i2c17; -+ i2c18 = &i2c18; -+ i2c19 = &i2c19; -+ spi0 = &spi0; -+ spi1 = &spi1; -+ spi2 = &spi2; -+ spi3 = &spi3; -+ spi4 = &spi4; -+ spi5 = &spi5; -+ spi6 = &spi6; -+ spi7 = &spi7; -+ spi8 = &spi8; -+ spi9 = &spi9; -+ spi10 = &spi10; -+ spi11 = &spi11; -+ spi12 = &spi12; -+ spi13 = &spi13; -+ spi14 = &spi14; -+ spi15 = &spi15; -+ spi16 = &spi16; -+ spi17 = &spi17; -+ spi18 = &spi18; -+ spi19 = &spi19; -+ }; -+ - chosen { }; - - clocks { -@@ -294,6 +337,394 @@ gcc: clock-controller@100000 { - clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>; - }; - -+ qupv3_id_2: geniqup@8c0000 { -+ compatible = "qcom,geni-se-qup"; -+ reg = <0x0 0x008c0000 0x0 0x6000>; -+ clock-names = "m-ahb", "s-ahb"; -+ clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>, -+ <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ ranges; -+ status = "disabled"; -+ -+ i2c14: i2c@880000 { -+ compatible = "qcom,geni-i2c"; -+ reg = <0 0x00880000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_i2c14_default>; -+ interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi14: spi@880000 { -+ compatible = "qcom,geni-spi"; -+ reg = <0 0x00880000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_spi14_default>; -+ interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c15: i2c@884000 { -+ compatible = "qcom,geni-i2c"; -+ reg = <0 0x00884000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_i2c15_default>; -+ interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi15: spi@884000 { -+ compatible = "qcom,geni-spi"; -+ reg = <0 0x00884000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_spi15_default>; -+ interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c16: i2c@888000 { -+ compatible = "qcom,geni-i2c"; -+ reg = <0 0x00888000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_i2c16_default>; -+ interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi16: spi@888000 { -+ compatible = "qcom,geni-spi"; -+ reg = <0 0x00888000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_spi16_default>; -+ interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c17: i2c@88c000 { -+ compatible = "qcom,geni-i2c"; -+ reg = <0 0x0088c000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_i2c17_default>; -+ interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi17: spi@88c000 { -+ compatible = "qcom,geni-spi"; -+ reg = <0 0x0088c000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_spi17_default>; -+ interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c18: i2c@890000 { -+ compatible = "qcom,geni-i2c"; -+ reg = <0 0x00890000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_i2c18_default>; -+ interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi18: spi@890000 { -+ compatible = "qcom,geni-spi"; -+ reg = <0 0x00890000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_spi18_default>; -+ interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c19: i2c@894000 { -+ compatible = "qcom,geni-i2c"; -+ reg = <0 0x00894000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_i2c19_default>; -+ interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi19: spi@894000 { -+ compatible = "qcom,geni-spi"; -+ reg = <0 0x00894000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_spi19_default>; -+ interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ }; -+ -+ qupv3_id_0: geniqup@9c0000 { -+ compatible = "qcom,geni-se-qup"; -+ reg = <0x0 0x009c0000 0x0 0x6000>; -+ clock-names = "m-ahb", "s-ahb"; -+ clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, -+ <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ ranges; -+ status = "disabled"; -+ -+ i2c0: i2c@980000 { -+ compatible = "qcom,geni-i2c"; -+ reg = <0 0x00980000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_i2c0_default>; -+ interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi0: spi@980000 { -+ compatible = "qcom,geni-spi"; -+ reg = <0 0x00980000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_spi0_default>; -+ interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c1: i2c@984000 { -+ compatible = "qcom,geni-i2c"; -+ reg = <0 0x00984000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_i2c1_default>; -+ interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi1: spi@984000 { -+ compatible = "qcom,geni-spi"; -+ reg = <0 0x00984000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_spi1_default>; -+ interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c2: i2c@988000 { -+ compatible = "qcom,geni-i2c"; -+ reg = <0 0x00988000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_i2c2_default>; -+ interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi2: spi@988000 { -+ compatible = "qcom,geni-spi"; -+ reg = <0 0x00988000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_spi2_default>; -+ interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c3: i2c@98c000 { -+ compatible = "qcom,geni-i2c"; -+ reg = <0 0x0098c000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_i2c3_default>; -+ interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi3: spi@98c000 { -+ compatible = "qcom,geni-spi"; -+ reg = <0 0x0098c000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_spi3_default>; -+ interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c4: i2c@990000 { -+ compatible = "qcom,geni-i2c"; -+ reg = <0 0x00990000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_i2c4_default>; -+ interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi4: spi@990000 { -+ compatible = "qcom,geni-spi"; -+ reg = <0 0x00990000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_spi4_default>; -+ interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c5: i2c@994000 { -+ compatible = "qcom,geni-i2c"; -+ reg = <0 0x00994000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_i2c5_default>; -+ interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi5: spi@994000 { -+ compatible = "qcom,geni-spi"; -+ reg = <0 0x00994000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_spi5_default>; -+ interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c6: i2c@998000 { -+ compatible = "qcom,geni-i2c"; -+ reg = <0 0x00998000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_i2c6_default>; -+ interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi6: spi@998000 { -+ compatible = "qcom,geni-spi"; -+ reg = <0 0x00998000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_spi6_default>; -+ interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c7: i2c@99c000 { -+ compatible = "qcom,geni-i2c"; -+ reg = <0 0x0099c000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_i2c7_default>; -+ interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi7: spi@99c000 { -+ compatible = "qcom,geni-spi"; -+ reg = <0 0x0099c000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_spi7_default>; -+ interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ }; -+ - qupv3_id_1: geniqup@ac0000 { - compatible = "qcom,geni-se-qup"; - reg = <0x0 0x00ac0000 0x0 0x6000>; -@@ -304,6 +735,136 @@ qupv3_id_1: geniqup@ac0000 { - ranges; - status = "disabled"; - -+ i2c8: i2c@a80000 { -+ compatible = "qcom,geni-i2c"; -+ reg = <0 0x00a80000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_i2c8_default>; -+ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi8: spi@a80000 { -+ compatible = "qcom,geni-spi"; -+ reg = <0 0x00a80000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_spi8_default>; -+ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c9: i2c@a84000 { -+ compatible = "qcom,geni-i2c"; -+ reg = <0 0x00a84000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_i2c9_default>; -+ interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi9: spi@a84000 { -+ compatible = "qcom,geni-spi"; -+ reg = <0 0x00a84000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_spi9_default>; -+ interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c10: i2c@a88000 { -+ compatible = "qcom,geni-i2c"; -+ reg = <0 0x00a88000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_i2c10_default>; -+ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi10: spi@a88000 { -+ compatible = "qcom,geni-spi"; -+ reg = <0 0x00a88000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_spi10_default>; -+ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c11: i2c@a8c000 { -+ compatible = "qcom,geni-i2c"; -+ reg = <0 0x00a8c000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_i2c11_default>; -+ interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi11: spi@a8c000 { -+ compatible = "qcom,geni-spi"; -+ reg = <0 0x00a8c000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_spi11_default>; -+ interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c12: i2c@a90000 { -+ compatible = "qcom,geni-i2c"; -+ reg = <0 0x00a90000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_i2c12_default>; -+ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi12: spi@a90000 { -+ compatible = "qcom,geni-spi"; -+ reg = <0 0x00a90000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_spi12_default>; -+ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ - uart2: serial@a90000 { - compatible = "qcom,geni-debug-uart"; - reg = <0x0 0x00a90000 0x0 0x4000>; -@@ -312,6 +873,32 @@ uart2: serial@a90000 { - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; -+ -+ i2c13: i2c@a94000 { -+ compatible = "qcom,geni-i2c"; -+ reg = <0 0x00a94000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_i2c13_default>; -+ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi13: spi@a94000 { -+ compatible = "qcom,geni-spi"; -+ reg = <0 0x00a94000 0 0x4000>; -+ clock-names = "se"; -+ clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&qup_spi13_default>; -+ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; - }; - - ufs_mem_hc: ufshc@1d84000 { -@@ -512,6 +1099,566 @@ tlmm: pinctrl@f100000 { - #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 180>; - wakeup-parent = <&pdc>; -+ -+ qup_i2c0_default: qup-i2c0-default { -+ mux { -+ pins = "gpio28", "gpio29"; -+ function = "qup0"; -+ }; -+ -+ config { -+ pins = "gpio28", "gpio29"; -+ drive-strength = <2>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_i2c1_default: qup-i2c1-default { -+ pinmux { -+ pins = "gpio4", "gpio5"; -+ function = "qup1"; -+ }; -+ -+ config { -+ pins = "gpio4", "gpio5"; -+ drive-strength = <2>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_i2c2_default: qup-i2c2-default { -+ mux { -+ pins = "gpio115", "gpio116"; -+ function = "qup2"; -+ }; -+ -+ config { -+ pins = "gpio115", "gpio116"; -+ drive-strength = <2>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_i2c3_default: qup-i2c3-default { -+ mux { -+ pins = "gpio119", "gpio120"; -+ function = "qup3"; -+ }; -+ -+ config { -+ pins = "gpio119", "gpio120"; -+ drive-strength = <2>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_i2c4_default: qup-i2c4-default { -+ mux { -+ pins = "gpio8", "gpio9"; -+ function = "qup4"; -+ }; -+ -+ config { -+ pins = "gpio8", "gpio9"; -+ drive-strength = <2>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_i2c5_default: qup-i2c5-default { -+ mux { -+ pins = "gpio12", "gpio13"; -+ function = "qup5"; -+ }; -+ -+ config { -+ pins = "gpio12", "gpio13"; -+ drive-strength = <2>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_i2c6_default: qup-i2c6-default { -+ mux { -+ pins = "gpio16", "gpio17"; -+ function = "qup6"; -+ }; -+ -+ config { -+ pins = "gpio16", "gpio17"; -+ drive-strength = <2>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_i2c7_default: qup-i2c7-default { -+ mux { -+ pins = "gpio20", "gpio21"; -+ function = "qup7"; -+ }; -+ -+ config { -+ pins = "gpio20", "gpio21"; -+ drive-strength = <2>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_i2c8_default: qup-i2c8-default { -+ mux { -+ pins = "gpio24", "gpio25"; -+ function = "qup8"; -+ }; -+ -+ config { -+ pins = "gpio24", "gpio25"; -+ drive-strength = <2>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_i2c9_default: qup-i2c9-default { -+ mux { -+ pins = "gpio125", "gpio126"; -+ function = "qup9"; -+ }; -+ -+ config { -+ pins = "gpio125", "gpio126"; -+ drive-strength = <2>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_i2c10_default: qup-i2c10-default { -+ mux { -+ pins = "gpio129", "gpio130"; -+ function = "qup10"; -+ }; -+ -+ config { -+ pins = "gpio129", "gpio130"; -+ drive-strength = <2>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_i2c11_default: qup-i2c11-default { -+ mux { -+ pins = "gpio60", "gpio61"; -+ function = "qup11"; -+ }; -+ -+ config { -+ pins = "gpio60", "gpio61"; -+ drive-strength = <2>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_i2c12_default: qup-i2c12-default { -+ mux { -+ pins = "gpio32", "gpio33"; -+ function = "qup12"; -+ }; -+ -+ config { -+ pins = "gpio32", "gpio33"; -+ drive-strength = <2>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_i2c13_default: qup-i2c13-default { -+ mux { -+ pins = "gpio36", "gpio37"; -+ function = "qup13"; -+ }; -+ -+ config { -+ pins = "gpio36", "gpio37"; -+ drive-strength = <2>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_i2c14_default: qup-i2c14-default { -+ mux { -+ pins = "gpio40", "gpio41"; -+ function = "qup14"; -+ }; -+ -+ config { -+ pins = "gpio40", "gpio41"; -+ drive-strength = <2>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_i2c15_default: qup-i2c15-default { -+ mux { -+ pins = "gpio44", "gpio45"; -+ function = "qup15"; -+ }; -+ -+ config { -+ pins = "gpio44", "gpio45"; -+ drive-strength = <2>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_i2c16_default: qup-i2c16-default { -+ mux { -+ pins = "gpio48", "gpio49"; -+ function = "qup16"; -+ }; -+ -+ config { -+ pins = "gpio48", "gpio49"; -+ drive-strength = <2>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_i2c17_default: qup-i2c17-default { -+ mux { -+ pins = "gpio52", "gpio53"; -+ function = "qup17"; -+ }; -+ -+ config { -+ pins = "gpio52", "gpio53"; -+ drive-strength = <2>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_i2c18_default: qup-i2c18-default { -+ mux { -+ pins = "gpio56", "gpio57"; -+ function = "qup18"; -+ }; -+ -+ config { -+ pins = "gpio56", "gpio57"; -+ drive-strength = <2>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_i2c19_default: qup-i2c19-default { -+ mux { -+ pins = "gpio0", "gpio1"; -+ function = "qup19"; -+ }; -+ -+ config { -+ pins = "gpio0", "gpio1"; -+ drive-strength = <2>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_spi0_default: qup-spi0-default { -+ mux { -+ pins = "gpio28", "gpio29", -+ "gpio30", "gpio31"; -+ function = "qup0"; -+ }; -+ -+ config { -+ pins = "gpio28", "gpio29", -+ "gpio30", "gpio31"; -+ drive-strength = <6>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_spi1_default: qup-spi1-default { -+ mux { -+ pins = "gpio4", "gpio5", -+ "gpio6", "gpio7"; -+ function = "qup1"; -+ }; -+ -+ config { -+ pins = "gpio4", "gpio5", -+ "gpio6", "gpio7"; -+ drive-strength = <6>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_spi2_default: qup-spi2-default { -+ mux { -+ pins = "gpio115", "gpio116", -+ "gpio117", "gpio118"; -+ function = "qup2"; -+ }; -+ -+ config { -+ pins = "gpio115", "gpio116", -+ "gpio117", "gpio118"; -+ drive-strength = <6>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_spi3_default: qup-spi3-default { -+ mux { -+ pins = "gpio119", "gpio120", -+ "gpio121", "gpio122"; -+ function = "qup3"; -+ }; -+ -+ config { -+ pins = "gpio119", "gpio120", -+ "gpio121", "gpio122"; -+ drive-strength = <6>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_spi4_default: qup-spi4-default { -+ mux { -+ pins = "gpio8", "gpio9", -+ "gpio10", "gpio11"; -+ function = "qup4"; -+ }; -+ -+ config { -+ pins = "gpio8", "gpio9", -+ "gpio10", "gpio11"; -+ drive-strength = <6>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_spi5_default: qup-spi5-default { -+ mux { -+ pins = "gpio12", "gpio13", -+ "gpio14", "gpio15"; -+ function = "qup5"; -+ }; -+ -+ config { -+ pins = "gpio12", "gpio13", -+ "gpio14", "gpio15"; -+ drive-strength = <6>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_spi6_default: qup-spi6-default { -+ mux { -+ pins = "gpio16", "gpio17", -+ "gpio18", "gpio19"; -+ function = "qup6"; -+ }; -+ -+ config { -+ pins = "gpio16", "gpio17", -+ "gpio18", "gpio19"; -+ drive-strength = <6>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_spi7_default: qup-spi7-default { -+ mux { -+ pins = "gpio20", "gpio21", -+ "gpio22", "gpio23"; -+ function = "qup7"; -+ }; -+ -+ config { -+ pins = "gpio20", "gpio21", -+ "gpio22", "gpio23"; -+ drive-strength = <6>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_spi8_default: qup-spi8-default { -+ mux { -+ pins = "gpio24", "gpio25", -+ "gpio26", "gpio27"; -+ function = "qup8"; -+ }; -+ -+ config { -+ pins = "gpio24", "gpio25", -+ "gpio26", "gpio27"; -+ drive-strength = <6>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_spi9_default: qup-spi9-default { -+ mux { -+ pins = "gpio125", "gpio126", -+ "gpio127", "gpio128"; -+ function = "qup9"; -+ }; -+ -+ config { -+ pins = "gpio125", "gpio126", -+ "gpio127", "gpio128"; -+ drive-strength = <6>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_spi10_default: qup-spi10-default { -+ mux { -+ pins = "gpio129", "gpio130", -+ "gpio131", "gpio132"; -+ function = "qup10"; -+ }; -+ -+ config { -+ pins = "gpio129", "gpio130", -+ "gpio131", "gpio132"; -+ drive-strength = <6>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_spi11_default: qup-spi11-default { -+ mux { -+ pins = "gpio60", "gpio61", -+ "gpio62", "gpio63"; -+ function = "qup11"; -+ }; -+ -+ config { -+ pins = "gpio60", "gpio61", -+ "gpio62", "gpio63"; -+ drive-strength = <6>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_spi12_default: qup-spi12-default { -+ mux { -+ pins = "gpio32", "gpio33", -+ "gpio34", "gpio35"; -+ function = "qup12"; -+ }; -+ -+ config { -+ pins = "gpio32", "gpio33", -+ "gpio34", "gpio35"; -+ drive-strength = <6>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_spi13_default: qup-spi13-default { -+ mux { -+ pins = "gpio36", "gpio37", -+ "gpio38", "gpio39"; -+ function = "qup13"; -+ }; -+ -+ config { -+ pins = "gpio36", "gpio37", -+ "gpio38", "gpio39"; -+ drive-strength = <6>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_spi14_default: qup-spi14-default { -+ mux { -+ pins = "gpio40", "gpio41", -+ "gpio42", "gpio43"; -+ function = "qup14"; -+ }; -+ -+ config { -+ pins = "gpio40", "gpio41", -+ "gpio42", "gpio43"; -+ drive-strength = <6>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_spi15_default: qup-spi15-default { -+ mux { -+ pins = "gpio44", "gpio45", -+ "gpio46", "gpio47"; -+ function = "qup15"; -+ }; -+ -+ config { -+ pins = "gpio44", "gpio45", -+ "gpio46", "gpio47"; -+ drive-strength = <6>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_spi16_default: qup-spi16-default { -+ mux { -+ pins = "gpio48", "gpio49", -+ "gpio50", "gpio51"; -+ function = "qup16"; -+ }; -+ -+ config { -+ pins = "gpio48", "gpio49", -+ "gpio50", "gpio51"; -+ drive-strength = <6>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_spi17_default: qup-spi17-default { -+ mux { -+ pins = "gpio52", "gpio53", -+ "gpio54", "gpio55"; -+ function = "qup17"; -+ }; -+ -+ config { -+ pins = "gpio52", "gpio53", -+ "gpio54", "gpio55"; -+ drive-strength = <6>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_spi18_default: qup-spi18-default { -+ mux { -+ pins = "gpio56", "gpio57", -+ "gpio58", "gpio59"; -+ function = "qup18"; -+ }; -+ -+ config { -+ pins = "gpio56", "gpio57", -+ "gpio58", "gpio59"; -+ drive-strength = <6>; -+ bias-disable; -+ }; -+ }; -+ -+ qup_spi19_default: qup-spi19-default { -+ mux { -+ pins = "gpio0", "gpio1", -+ "gpio2", "gpio3"; -+ function = "qup19"; -+ }; -+ -+ config { -+ pins = "gpio0", "gpio1", -+ "gpio2", "gpio3"; -+ drive-strength = <6>; -+ bias-disable; -+ }; -+ }; - }; - - timer@17c20000 { --- -2.27.0 - diff --git a/recipes-kernel/linux/linux-linaro-qcomlt-5.7/0001-arm64-dts-qcom-sm8250-change-spmi-node-label.patch b/recipes-kernel/linux/linux-linaro-qcomlt-5.7/0001-arm64-dts-qcom-sm8250-change-spmi-node-label.patch deleted file mode 100644 index 1913a6f..0000000 --- a/recipes-kernel/linux/linux-linaro-qcomlt-5.7/0001-arm64-dts-qcom-sm8250-change-spmi-node-label.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 6cdc941e6bf4df72844bd8b0fef2eff65d2c0726 Mon Sep 17 00:00:00 2001 -From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> -Date: Thu, 4 Jun 2020 00:41:53 +0300 -Subject: [PATCH] arm64: dts: qcom: sm8250: change spmi node label - -PMIC dtsi files (pm8150*.dtsi) expect to have spmi_bus label, rather -than just spmi. Rename spmi label accordingly. - -Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> ---- - arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi -index 1e2862bbfb11..9dd27aecdfda 100644 ---- a/arch/arm64/boot/dts/qcom/sm8250.dtsi -+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi -@@ -991,7 +991,7 @@ pdc: interrupt-controller@b220000 { - interrupt-controller; - }; - -- spmi: qcom,spmi@c440000 { -+ spmi_bus: qcom,spmi@c440000 { - compatible = "qcom,spmi-pmic-arb"; - reg = <0x0 0x0c440000 0x0 0x0001100>, - <0x0 0x0c600000 0x0 0x2000000>, --- -2.27.0 - diff --git a/recipes-kernel/linux/linux-linaro-qcomlt-5.7/qrb5165-rb5-enable.patch b/recipes-kernel/linux/linux-linaro-qcomlt-5.7/qrb5165-rb5-enable.patch deleted file mode 100644 index 278c9e5..0000000 --- a/recipes-kernel/linux/linux-linaro-qcomlt-5.7/qrb5165-rb5-enable.patch +++ /dev/null @@ -1,9 +0,0 @@ -Index: git/arch/arm64/boot/dts/qcom/Makefile -=================================================================== ---- git.orig/arch/arm64/boot/dts/qcom/Makefile -+++ git/arch/arm64/boot/dts/qcom/Makefile -@@ -26,3 +26,4 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8150-mtp.dt - dtb-$(CONFIG_ARCH_QCOM) += sm8250-mtp.dtb - dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb - dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb -+dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5.dtb diff --git a/recipes-kernel/linux/linux-linaro-qcomlt-5.7/qrb5165-rb5.dts b/recipes-kernel/linux/linux-linaro-qcomlt-5.7/qrb5165-rb5.dts deleted file mode 100644 index 09003da..0000000 --- a/recipes-kernel/linux/linux-linaro-qcomlt-5.7/qrb5165-rb5.dts +++ /dev/null @@ -1,760 +0,0 @@ -// SPDX-License-Identifier: BSD-3-Clause -/* - * Copyright (c) 2020, Linaro Ltd. - */ - -/dts-v1/; - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/regulator/qcom,rpmh-regulator.h> -#include "sm8250.dtsi" -#include "pm8150.dtsi" -#include "pm8150b.dtsi" -#include "pm8150l.dtsi" - -/ { - model = "Qualcomm Technologies, Inc. Robotics RB5"; - compatible = "qcom,qrb5165-rb5", "qcom,sm8250"; - - aliases { - serial0 = &uart12; - sdhc2 = &sdhc_2; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - dc12v: dc12v-regulator { - compatible = "regulator-fixed"; - regulator-name = "DC12V"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - regulator-always-on; - }; - - leds { - compatible = "gpio-leds"; - - user4 { - label = "green:user4"; - gpios = <&pm8150_gpios 10 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "panic-indicator"; - default-state = "off"; - }; - - wlan { - label = "yellow:wlan"; - gpios = <&pm8150_gpios 9 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "phy0tx"; - default-state = "off"; - }; - - bt { - label = "blue:bt"; - gpios = <&pm8150_gpios 7 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "bluetooth-power"; - default-state = "off"; - }; - - }; - - vbat: vbat-regulator { - compatible = "regulator-fixed"; - regulator-name = "VBAT"; - - vin-supply = <&dc12v>; - regulator-min-microvolt = <4200000>; - regulator-max-microvolt = <4200000>; - regulator-always-on; - }; - - vbat_som: vbat-som-regulator { - compatible = "regulator-fixed"; - regulator-name = "VBAT_SOM"; - - vin-supply = <&dc12v>; - regulator-min-microvolt = <4200000>; - regulator-max-microvolt = <4200000>; - regulator-always-on; - }; - - vdc_3v3: vdc-3v3-regulator { - compatible = "regulator-fixed"; - regulator-name = "VDC_3V3"; - vin-supply = <&dc12v>; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vdc_5v: vdc-5v-regulator { - compatible = "regulator-fixed"; - regulator-name = "VDC_5V"; - - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <500000>; - regulator-always-on; - vin-supply = <&vreg_l11c_3p3>; - }; - - vph_pwr: vph-pwr-regulator { - compatible = "regulator-fixed"; - regulator-name = "vph_pwr"; - regulator-min-microvolt = <3700000>; - regulator-max-microvolt = <3700000>; - }; - - vreg_s4a_1p8: vreg-s4a-1p8 { - compatible = "regulator-fixed"; - regulator-name = "vreg_s4a_1p8"; - - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - vin-supply = <&vph_pwr>; - }; - - vreg_s6c_0p88: smpc6-regulator { - compatible = "regulator-fixed"; - regulator-name = "vreg_s6c_0p88"; - - regulator-min-microvolt = <752000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - vin-supply = <&vph_pwr>; - }; -}; - -&apps_rsc { - pm8150-rpmh-regulators { - compatible = "qcom,pm8150-rpmh-regulators"; - qcom,pmic-id = "a"; - - vdd-s1-supply = <&vph_pwr>; - vdd-s2-supply = <&vph_pwr>; - vdd-s3-supply = <&vph_pwr>; - vdd-s4-supply = <&vph_pwr>; - vdd-s5-supply = <&vph_pwr>; - vdd-s6-supply = <&vph_pwr>; - vdd-s7-supply = <&vph_pwr>; - vdd-s8-supply = <&vph_pwr>; - vdd-s9-supply = <&vph_pwr>; - vdd-s10-supply = <&vph_pwr>; - vdd-l2-l10-supply = <&vreg_bob>; - vdd-l3-l4-l5-l18-supply = <&vreg_s6a_0p95>; - vdd-l6-l9-supply = <&vreg_s8c_1p3>; - vdd-l7-l12-l14-l15-supply = <&vreg_s5a_1p9>; - vdd-l13-l16-l17-supply = <&vreg_bob>; - - vreg_s5a_1p9: smps5 { - regulator-name = "vreg_s5a_1p9"; - regulator-min-microvolt = <1904000>; - regulator-max-microvolt = <2000000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_s6a_0p95: smps6 { - regulator-name = "vreg_s6a_0p95"; - regulator-min-microvolt = <920000>; - regulator-max-microvolt = <1128000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l2a_3p1: ldo2 { - regulator-name = "vreg_l2a_3p1"; - regulator-min-microvolt = <3072000>; - regulator-max-microvolt = <3072000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l3a_0p9: ldo3 { - regulator-name = "vreg_l3a_0p9"; - regulator-min-microvolt = <928000>; - regulator-max-microvolt = <932000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l5a_0p875: ldo5 { - regulator-name = "vreg_l5a_0p875"; - regulator-min-microvolt = <880000>; - regulator-max-microvolt = <880000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l6a_1p2: ldo6 { - regulator-name = "vreg_l6a_1p2"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l7a_1p7: ldo7 { - regulator-name = "vreg_l7a_1p7"; - regulator-min-microvolt = <1704000>; - regulator-max-microvolt = <1800000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l9a_1p2: ldo9 { - regulator-name = "vreg_l9a_1p2"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l10a_1p8: ldo10 { - regulator-name = "vreg_l10a_1p8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l12a_1p8: ldo12 { - regulator-name = "vreg_l12a_1p8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l13a_ts_3p0: ldo13 { - regulator-name = "vreg_l13a_ts_3p0"; - regulator-min-microvolt = <3008000>; - regulator-max-microvolt = <3008000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l14a_1p8: ldo14 { - regulator-name = "vreg_l14a_1p8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1880000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l15a_11ad_io_1p8: ldo15 { - regulator-name = "vreg_l15a_11ad_io_1p8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l16a_2p7: ldo16 { - regulator-name = "vreg_l16a_2p7"; - regulator-min-microvolt = <2704000>; - regulator-max-microvolt = <2960000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l17a_3p0: ldo17 { - regulator-name = "vreg_l17a_3p0"; - regulator-min-microvolt = <2856000>; - regulator-max-microvolt = <3008000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l18a_0p92: ldo18 { - regulator-name = "vreg_l18a_0p92"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <912000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - }; - - pm8150l-rpmh-regulators { - compatible = "qcom,pm8150l-rpmh-regulators"; - qcom,pmic-id = "c"; - - vdd-s1-supply = <&vph_pwr>; - vdd-s2-supply = <&vph_pwr>; - vdd-s3-supply = <&vph_pwr>; - vdd-s4-supply = <&vph_pwr>; - vdd-s5-supply = <&vph_pwr>; - vdd-s6-supply = <&vph_pwr>; - vdd-s7-supply = <&vph_pwr>; - vdd-s8-supply = <&vph_pwr>; - vdd-l1-l8-supply = <&vreg_s4a_1p8>; - vdd-l2-l3-supply = <&vreg_s8c_1p3>; - vdd-l4-l5-l6-supply = <&vreg_bob>; - vdd-l7-l11-supply = <&vreg_bob>; - vdd-l9-l10-supply = <&vreg_bob>; - vdd-bob-supply = <&vph_pwr>; - - vreg_bob: bob { - regulator-name = "vreg_bob"; - regulator-min-microvolt = <3008000>; - regulator-max-microvolt = <4000000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; - }; - - vreg_s8c_1p3: smps8 { - regulator-name = "vreg_s8c_1p3"; - regulator-min-microvolt = <1352000>; - regulator-max-microvolt = <1352000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l1c_1p8: ldo1 { - regulator-name = "vreg_l1c_1p8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l2c_1p2: ldo2 { - regulator-name = "vreg_l2c_1p2"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l3c_0p92: ldo3 { - regulator-name = "vreg_l3c_0p92"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <800000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l4c_1p7: ldo4 { - regulator-name = "vreg_l4c_1p7"; - regulator-min-microvolt = <1704000>; - regulator-max-microvolt = <2928000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l5c_1p8: ldo5 { - regulator-name = "vreg_l5c_1p8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <2928000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l6c_2p9: ldo6 { - regulator-name = "vreg_l6c_2p9"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <2960000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l7c_cam_vcm0_2p85: ldo7 { - regulator-name = "vreg_l7c_cam_vcm0_2p85"; - regulator-min-microvolt = <2856000>; - regulator-max-microvolt = <3104000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l8c_1p8: ldo8 { - regulator-name = "vreg_l8c_1p8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l9c_2p9: ldo9 { - regulator-name = "vreg_l9c_2p9"; - regulator-min-microvolt = <2704000>; - regulator-max-microvolt = <2960000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l10c_3p0: ldo10 { - regulator-name = "vreg_l10c_3p0"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l11c_3p3: ldo11 { - regulator-name = "vreg_l11c_3p3"; - regulator-min-microvolt = <3296000>; - regulator-max-microvolt = <3296000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - regulator-always-on; - }; - }; - - pm8009-rpmh-regulators { - compatible = "qcom,pm8009-rpmh-regulators"; - qcom,pmic-id = "f"; - - vdd-s1-supply = <&vph_pwr>; - vdd-s2-supply = <&vph_pwr>; - vdd-l2-supply = <&vreg_s8c_1p3>; - vdd-l5-l6-supply = <&vreg_bob>; - vdd-l7-supply = <&vreg_s4a_1p8>; - - vreg_l1f_cam_dvdd1_1p1: ldo1 { - regulator-name = "vreg_l1f_cam_dvdd1_1p1"; - regulator-min-microvolt = <1104000>; - regulator-max-microvolt = <1104000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l2f_cam_dvdd0_1p2: ldo2 { - regulator-name = "vreg_l2f_cam_dvdd0_1p2"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l3f_cam_dvdd2_1p05: ldo3 { - regulator-name = "vreg_l3f_cam_dvdd2_1p05"; - regulator-min-microvolt = <1056000>; - regulator-max-microvolt = <1056000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l5f_cam_avdd0_2p85: ldo5 { - regulator-name = "vreg_l5f_cam_avdd0_2p85"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l6f_cam_avdd1_2p85: ldo6 { - regulator-name = "vreg_l6f_cam_avdd1_2p85"; - regulator-min-microvolt = <2856000>; - regulator-max-microvolt = <2856000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - - vreg_l7f_1p8: ldo7 { - regulator-name = "vreg_l7f_1p8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; - }; - }; -}; - -/* LS-I2C0 */ -&i2c4 { - status = "okay"; -}; - -&i2c5 { - status = "okay"; -}; - -/* LS-I2C1 */ -&i2c15 { - status = "okay"; -}; - -&pm8150_gpios { - gpio-reserved-ranges = <1 1>, <3 2>, <7 1>; - gpio-line-names = - "NC", - "OPTION2", - "PM_GPIO-F", - "PM_SLP_CLK_IN", - "OPTION1", - "VOL_UP_N", - "PM8250_GPIO7", /* Blue LED */ - "SP_ARI_PWR_ALARM", - "GPIO_9_P", /* Yellow LED */ - "GPIO_10_P"; /* Green LED */ -}; - -&pm8150b_gpios { - gpio-line-names = - "NC", - "NC", - "NC", - "NC", - "HAP_BOOST_EN", /* SOM */ - "SMB_STAT", /* SOM */ - "NC", - "NC", - "SDM_FORCE_USB_BOOT", - "NC", - "NC", - "NC"; -}; - -&pm8150l_gpios { - gpio-line-names = - "NC", - "PM3003A_EN", - "NC", - "NC", - "PM_GPIO5", /* HDMI RST_N */ - "PM_GPIO-A", /* PWM */ - "PM_GPIO7", - "NC", - "NC", - "PM_GPIO-B", - "NC", - "PM3003A_MODE"; -}; - -&qupv3_id_0 { - status = "okay"; -}; - -&qupv3_id_1 { - status = "okay"; -}; - -&qupv3_id_2 { - status = "okay"; -}; - -/* CAN */ -&spi0 { - status = "okay"; -}; - -&tlmm { - gpio-reserved-ranges = <40 4>; - gpio-line-names = - "GPIO-MM", - "GPIO-NN", - "GPIO-OO", - "GPIO-PP", - "GPIO-A", - "GPIO-C", - "GPIO-E", - "GPIO-D", - "I2C0-SDA", - "I2C0-SCL", - "GPIO-TT", /* GPIO_10 */ - "NC", - "GPIO_12_I2C_SDA", - "GPIO_13_I2C_SCL", - "GPIO-X", - "GPIO_15_RGMII_INT", - "HST_BT_UART_CTS", - "HST_BT_UART_RFR", - "HST_BT_UART_TX", - "HST_BT_UART_RX", - "HST_WLAN_EN", /* GPIO_20 */ - "HST_BT_EN", - "GPIO-AAA", - "GPIO-BBB", - "GPIO-CCC", - "GPIO-Z", - "GPIO-DDD", - "GPIO-BB", - "GPIO_28_CAN_SPI_MISO", - "GPIO_29_CAN_SPI_MOSI", - "GPIO_30_CAN_SPI_CLK", /* GPIO_30 */ - "GPIO_31_CAN_SPI_CS", - "GPIO-UU", - "NC", - "UART1_TXD_SOM", - "UART1_RXD_SOM", - "UART0_CTS", - "UART0_RTS", - "UART0_TXD", - "UART0_RXD", - "SPI1_MISO", /* GPIO_40 */ - "SPI1_MOSI", - "SPI1_CLK", - "SPI1_CS", - "I2C1_SDA", - "I2C1_SCL", - "GPIO-F", - "GPIO-JJ", - "Board_ID1", - "Board_ID2", - "NC", /* GPIO_50 */ - "NC", - "SPI0_MISO", - "SPI0_MOSI", - "SPI0_SCLK", - "SPI0_CS", - "GPIO-QQ", - "GPIO-RR", - "USB2LAN_RESET", - "USB2LAN_EXTWAKE", - "NC", /* GPIO_60 */ - "NC", - "NC", - "LT9611_INT", - "GPIO-AA", - "USB_CC_DIR", - "GPIO-G", - "GPIO-LL", - "USB_DP_HPD_1P8", - "NC", - "NC", /* GPIO_70 */ - "SD_CMD", - "SD_DAT3", - "SD_SCLK", - "SD_DAT2", - "SD_DAT1", - "SD_DAT0", /* BOOT_CFG3 */ - "SD_UFS_CARD_DET_N", - "GPIO-II", - "PCIE0_RST_N", - "PCIE0_CLK_REQ_N", /* GPIO_80 */ - "PCIE0_WAKE_N", - "GPIO-CC", - "GPIO-DD", - "GPIO-EE", - "GPIO-FF", - "GPIO-GG", - "GPIO-HH", - "GPIO-VV", - "GPIO-WW", - "NC", /* GPIO_90 */ - "NC", - "GPIO-K", - "GPIO-I", - "CSI0_MCLK", - "CSI1_MCLK", - "CSI2_MCLK", - "CSI3_MCLK", - "GPIO-AA", /* CSI4_MCLK */ - "GPIO-BB", /* CSI5_MCLK */ - "GPIO-KK", /* GPIO_100 */ - "CCI_I2C_SDA0", - "CCI_I2C_SCL0", - "CCI_I2C_SDA1", - "CCI_I2C_SCL1", - "CCI_I2C_SDA2", - "CCI_I2C_SCL2", - "CCI_I2C_SDA3", - "CCI_I2C_SCL3", - "GPIO-L", - "NC", /* GPIO_110 */ - "NC", - "ACCEL_INT", - "GYRO_INT", - "GPIO-J", - "GPIO-YY", - "GPIO-H", - "GPIO-ZZ", - "NC", - "NC", - "NC", /* GPIO_120 */ - "NC", - "MAG_INT", - "MAG_DRDY_INT", - "HST_SW_CTRL", - "GPIO-M", - "GPIO-N", - "GPIO-O", - "GPIO-P", - "PS_INT", - "WSA1_EN", /* GPIO_130 */ - "USB_HUB_RESET", - "SDM_FORCE_USB_BOOT", - "I2S1_CLK_HDMI", - "I2S1_DATA0_HDMI", - "I2S1_WS_HDMI", - "GPIO-B", - "GPIO_137", /* To LT9611_I2S_MCLK_3V3 */ - "PCM_CLK", - "PCM_DI", - "PCM_DO", /* GPIO_140 */ - "PCM_FS", - "HST_SLIM_CLK", - "HST_SLIM_DATA", - "GPIO-U", - "GPIO-Y", - "GPIO-R", - "GPIO-Q", - "GPIO-S", - "GPIO-T", - "GPIO-V", /* GPIO_150 */ - "GPIO-W", - "DMIC_CLK1", - "DMIC_DATA1", - "DMIC_CLK2", - "DMIC_DATA2", - "WSA_SWR_CLK", - "WSA_SWR_DATA", - "DMIC_CLK3", - "DMIC_DATA3", - "I2C4_SDA", /* GPIO_160 */ - "I2C4_SCL", - "SPI3_CS1", - "SPI3_CS2", - "SPI2_MISO_LS3", - "SPI2_MOSI_LS3", - "SPI2_CLK_LS3", - "SPI2_ACCEL_CS_LS3", - "SPI2_CS1", - "NC", - "GPIO-SS", /* GPIO_170 */ - "GPIO-XX", - "SPI3_MISO", - "SPI3_MOSI", - "SPI3_CLK", - "SPI3_CS", - "HST_BLE_SNS_UART_TX", - "HST_BLE_SNS_UART_RX", - "HST_WLAN_UART_TX", - "HST_WLAN_UART_RX"; -}; - -&uart12 { - status = "okay"; -}; - -&ufs_mem_hc { - status = "okay"; - - vcc-supply = <&vreg_l17a_3p0>; - vcc-max-microamp = <800000>; - vccq-supply = <&vreg_l6a_1p2>; - vccq-max-microamp = <800000>; - vccq2-supply = <&vreg_s4a_1p8>; - vccq2-max-microamp = <800000>; -}; - -&ufs_mem_phy { - status = "okay"; - - vdda-phy-supply = <&vreg_l5a_0p875>; - vdda-max-microamp = <89900>; - vdda-pll-supply = <&vreg_l9a_1p2>; - vdda-pll-max-microamp = <18800>; -}; - -&usb_1 { - status = "okay"; -}; - -&usb_1_dwc3 { - dr_mode = "peripheral"; -}; - -&usb_1_hsphy { - status = "okay"; - - vdda-pll-supply = <&vreg_l5a_0p875>; - vdda33-supply = <&vreg_l2a_3p1>; - vdda18-supply = <&vreg_l12a_1p8>; -}; - -&usb_1_qmpphy { - status = "okay"; - - vdda-phy-supply = <&vreg_l9a_1p2>; - vdda-pll-supply = <&vreg_l18a_0p92>; -}; - -&usb_2 { - status = "okay"; -}; - -&usb_2_dwc3 { - dr_mode = "host"; -}; - -&usb_2_hsphy { - status = "okay"; - - vdda-pll-supply = <&vreg_l5a_0p875>; - vdda33-supply = <&vreg_l2a_3p1>; - vdda18-supply = <&vreg_l12a_1p8>; -}; - -&usb_2_qmpphy { - status = "okay"; - - vdda-phy-supply = <&vreg_l9a_1p2>; - vdda-pll-supply = <&vreg_l18a_0p92>; -}; diff --git a/recipes-kernel/linux/linux-linaro-qcomlt-dev.bb b/recipes-kernel/linux/linux-linaro-qcomlt-dev.bb deleted file mode 100644 index 9794e42..0000000 --- a/recipes-kernel/linux/linux-linaro-qcomlt-dev.bb +++ /dev/null @@ -1,25 +0,0 @@ -# Copyright (C) 2014-2020 Linaro -# Released under the MIT license (see COPYING.MIT for the terms) -# -# This recipe is disabled by default. -# To enable it add the following line to conf/local.conf: -# PREFERRED_PROVIDER_virtual/kernel = "linux-linaro-qcomlt-dev" - -DESCRIPTION = "Linaro Qualcomm Landing team Integration Kernel ${PV}" -LIC_FILES_CHKSUM = "file://COPYING;md5=6bc538ed5bd9a7fc9398086aedcd7e46" - -require recipes-kernel/linux/linux-linaro-qcom.inc -require recipes-kernel/linux/linux-qcom-bootimg.inc - -SRCBRANCH ?= "integration-linux-qcomlt" -#SRCREV ?= "${AUTOREV}" -SRCREV = "7b0c8f86e1ef16d58c582de5a0f0331f82640096" - -LINUX_VERSION = "5.10-rc+" -PV = "${LINUX_VERSION}+git${SRCPV}" - -# Wifi firmware has a recognizable arch :( -ERROR_QA_remove = "arch" - -# Disable by default -DEFAULT_PREFERENCE = "-1" diff --git a/recipes-kernel/linux/linux-linaro-qcomlt_5.10.bb b/recipes-kernel/linux/linux-linaro-qcomlt_5.10.bb deleted file mode 100644 index edb3ae1..0000000 --- a/recipes-kernel/linux/linux-linaro-qcomlt_5.10.bb +++ /dev/null @@ -1,15 +0,0 @@ -# Copyright (C) 2014-2020 Linaro -# Released under the MIT license (see COPYING.MIT for the terms) - -DESCRIPTION = "Linaro Qualcomm Landing team 5.10 Kernel" -LIC_FILES_CHKSUM = "file://COPYING;md5=6bc538ed5bd9a7fc9398086aedcd7e46" - -require recipes-kernel/linux/linux-linaro-qcom.inc -require recipes-kernel/linux/linux-qcom-bootimg.inc - -LOCALVERSION ?= "-linaro-lt-qcom" - -SRCBRANCH = "release/rb5/qcomlt-5.10" -SRCREV = "c25428281e134832eb0a687fb2ed7a17f5f7a0a1" - -COMPATIBLE_MACHINE = "(sm8250)" diff --git a/recipes-kernel/linux/linux-linaro-qcomlt_5.7.bb b/recipes-kernel/linux/linux-linaro-qcomlt_5.7.bb deleted file mode 100644 index d59db58..0000000 --- a/recipes-kernel/linux/linux-linaro-qcomlt_5.7.bb +++ /dev/null @@ -1,29 +0,0 @@ -# Copyright (C) 2014-2019 Linaro -# Released under the MIT license (see COPYING.MIT for the terms) - -DESCRIPTION = "Linaro Qualcomm Landing team 5.7 Kernel" -LIC_FILES_CHKSUM = "file://COPYING;md5=6bc538ed5bd9a7fc9398086aedcd7e46" - -inherit python3native - -require recipes-kernel/linux/linux-linaro-qcom.inc -require recipes-kernel/linux/linux-qcom-bootimg.inc - -SRC_URI_append_qrb5165-rb5 = " \ - file://qrb5165-rb5.dts;subdir=git/arch/arm64/boot/dts/qcom \ - file://qrb5165-rb5-enable.patch \ - file://0001-arm64-dts-qcom-sm8250-change-spmi-node-label.patch \ - file://0001-arm64-dts-qcom-sm8250-add-I2C-and-SPI-nodes.patch \ - file://0001-arm64-dts-qcom-sm8250-Add-USB-and-PHY-device-nodes.patch \ - file://0001-arm64-dts-qcom-sm8250-Rename-UART2-node-to-UART12.patch \ - file://0001-arm64-dts-qcom-sm8250-Add-support-for-SDC2.patch \ -" - -LOCALVERSION ?= "-linaro-lt-qcom" -SRCBRANCH ?= "release/qcomlt-5.7" -SRCREV ?= "4af49ea41ecf17e5e6243f3ac81dfc2f84d8a3a1" - -COMPATIBLE_MACHINE = "(apq8016|apq8096|sdm845|sm8250)" - -# Wifi firmware has a recognizable arch :( -ERROR_QA_remove = "arch" diff --git a/recipes-kernel/linux/linux-linaro-qcomlt_5.9.bb b/recipes-kernel/linux/linux-linaro-qcomlt_5.9.bb deleted file mode 100644 index afc22b0..0000000 --- a/recipes-kernel/linux/linux-linaro-qcomlt_5.9.bb +++ /dev/null @@ -1,18 +0,0 @@ -# Copyright (C) 2014-2019 Linaro -# Released under the MIT license (see COPYING.MIT for the terms) - -DESCRIPTION = "Linaro Qualcomm Landing team 5.9 Kernel" -LIC_FILES_CHKSUM = "file://COPYING;md5=6bc538ed5bd9a7fc9398086aedcd7e46" - -require recipes-kernel/linux/linux-linaro-qcom.inc -require recipes-kernel/linux/linux-qcom-bootimg.inc - -LOCALVERSION ?= "-linaro-lt-qcom" - -SRCBRANCH ?= "release/qcomlt-5.9" -SRCREV ?= "dfc69bfc93c0d2f943d21340e55a61c391794a71" - -SRCBRANCH_sm8250 = "release/rb5/qcomlt-5.9" -SRCREV_sm8250 = "6d5a9a5da79684f69e4c66a7cf9108ab4e77025f" - -COMPATIBLE_MACHINE = "(apq8016|apq8096|sdm845|sm8250)" diff --git a/recipes-kernel/linux/linux-linaro-qcomlt_6.6.bb b/recipes-kernel/linux/linux-linaro-qcomlt_6.6.bb new file mode 100644 index 0000000..dda348f --- /dev/null +++ b/recipes-kernel/linux/linux-linaro-qcomlt_6.6.bb @@ -0,0 +1,6 @@ +# Copyright (C) 2021 Linaro +# Released under the MIT license (see COPYING.MIT for the terms) + +require recipes-kernel/linux/linux-linaro-qcom.inc + +SRCREV = "13f77d4021f2afbd93b08735e0aa076828d52357" diff --git a/recipes-kernel/linux/linux-qcom-bootimg.inc b/recipes-kernel/linux/linux-qcom-bootimg.inc deleted file mode 100644 index c48d286..0000000 --- a/recipes-kernel/linux/linux-qcom-bootimg.inc +++ /dev/null @@ -1,48 +0,0 @@ -DEPENDS += "skales-native" - -QCOM_BOOTIMG_ROOTFS ?= "undefined" -SD_QCOM_BOOTIMG_ROOTFS ?= "undefined" - -# set output file names -BOOT_IMAGE_BASE_NAME = "boot-${KERNEL_IMAGE_NAME}" -BOOT_IMAGE_SYMLINK_NAME = "boot-${KERNEL_IMAGE_LINK_NAME}" -SD_BOOT_IMAGE_BASE_NAME = "boot-sd${KERNEL_IMAGE_NAME}" -SD_BOOT_IMAGE_SYMLINK_NAME = "boot-sd-${KERNEL_IMAGE_LINK_NAME}" -KERNEL_CMDLINE = "root=${1} rw rootwait console=${ttydev},${baudrate}n8" -KERNEL_CMDLINE_append_dragonboard-845c = " clk_ignore_unused pd_ignore_unused" - -# param ${1} partition where rootfs is located -# param ${2} output boot image file name -priv_make_image() { - ${STAGING_BINDIR_NATIVE}/skales/mkbootimg --kernel ${B}/arch/${ARCH}/boot/${KERNEL_IMAGETYPE} \ - --ramdisk ${B}/initrd.img \ - --output ${DEPLOYDIR}/${2}.img \ - --pagesize ${QCOM_BOOTIMG_PAGE_SIZE} \ - --base ${QCOM_BOOTIMG_KERNEL_BASE} \ - --cmdline "${KERNEL_CMDLINE}" -} - -do_deploy_append() { - - tmp="${SERIAL_CONSOLES}" - baudrate=`echo $tmp | sed 's/\;.*//'` - ttydev=`echo $tmp | sed -e 's/^[0-9]*\;//' -e 's/\s.*//' -e 's/\;.*//'` - - # mkbootimg requires an initrd file, make fake one that will be ignored - # during boot - echo "This is not an initrd" > ${B}/initrd.img - - # don't build bootimg if rootfs partition is not defined - if [ "${QCOM_BOOTIMG_ROOTFS}" = "undefined" ]; then - bbfatal "Rootfs partition must be defined" - fi - - priv_make_image ${QCOM_BOOTIMG_ROOTFS} ${BOOT_IMAGE_BASE_NAME} - ln -sf ${BOOT_IMAGE_BASE_NAME}.img ${DEPLOYDIR}/${BOOT_IMAGE_SYMLINK_NAME}.img - - # build sd boot image only for machines supporting it. - if [ "${SD_QCOM_BOOTIMG_ROOTFS}" != "undefined" ]; then - priv_make_image ${SD_QCOM_BOOTIMG_ROOTFS} ${SD_BOOT_IMAGE_BASE_NAME} - ln -sf ${SD_BOOT_IMAGE_BASE_NAME}.img ${DEPLOYDIR}/${SD_BOOT_IMAGE_SYMLINK_NAME}.img - fi -} diff --git a/recipes-kernel/linux/linux-yocto/0001-arm64-dts-qcom-qcm2290-temporarily-disable-cluster-i.patch b/recipes-kernel/linux/linux-yocto/0001-arm64-dts-qcom-qcm2290-temporarily-disable-cluster-i.patch new file mode 100644 index 0000000..80ff01e --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0001-arm64-dts-qcom-qcm2290-temporarily-disable-cluster-i.patch @@ -0,0 +1,61 @@ +From bf26272a429b9e33ba5e8bc9ada9ec794b5e8610 Mon Sep 17 00:00:00 2001 +From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Date: Wed, 19 Jul 2023 21:04:47 +0300 +Subject: [PATCH] arm64: dts: qcom: qcm2290: temporarily disable cluster idle + state + +For some reason cluster idle state causes the board to hang after boot. +Disable it to make it work properly. + +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Inappropriate [need to find the issue first] +--- + arch/arm64/boot/dts/qcom/qcm2290.dtsi | 10 ++++++---- + 1 file changed, 6 insertions(+), 4 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi +index 1d1de156f8f0..d1f0aa828234 100644 +--- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi ++++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi +@@ -170,32 +170,34 @@ psci { + + CPU_PD0: power-domain-cpu0 { + #power-domain-cells = <0>; +- power-domains = <&CLUSTER_PD>; ++ //power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD1: power-domain-cpu1 { + #power-domain-cells = <0>; +- power-domains = <&CLUSTER_PD>; ++ //power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD2: power-domain-cpu2 { + #power-domain-cells = <0>; +- power-domains = <&CLUSTER_PD>; ++ //power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD3: power-domain-cpu3 { + #power-domain-cells = <0>; +- power-domains = <&CLUSTER_PD>; ++ //power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP>; + }; + ++#if 0 + CLUSTER_PD: power-domain-cpu-cluster { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_SLEEP>; + }; ++#endif + }; + + reserved_memory: reserved-memory { +-- +2.42.0 + diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom-apq8064.cfg b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom-apq8064.cfg new file mode 100644 index 0000000..c633a6a --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom-apq8064.cfg @@ -0,0 +1,19 @@ +# SPDX-License-Identifier: MIT + +CONFIG_ARCH_MSM8960=y +CONFIG_MSM_GCC_8960=y +CONFIG_MSM_LCC_8960=y +CONFIG_MSM_MMCC_8960=y +CONFIG_PINCTRL_APQ8064=y + +CONFIG_PHY_QCOM_APQ8064_SATA=y + +CONFIG_QCOM_CLK_RPM=y +CONFIG_REGULATOR_QCOM_RPM=y +CONFIG_RPMSG_QCOM_GLINK_RPM=y +CONFIG_RPMSG_QCOM_GLINK_SMEM=y + +# legacy boards +CONFIG_RPMSG_QCOM_SMD=y + +CONFIG_MSM_IOMMU=y diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom-apq8064.scc b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom-apq8064.scc new file mode 100644 index 0000000..3040257 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom-apq8064.scc @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: MIT + +#kconf hardware qcom-rpm.cfg +kconf hardware qcom-apq8064.cfg diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom-armv7a-standard.scc b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom-armv7a-standard.scc new file mode 100644 index 0000000..240f154 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom-armv7a-standard.scc @@ -0,0 +1,26 @@ +# SPDX-License-Identifier: MIT + +define KMACHINE qcom-armv7a +define KTYPE standard +define KARCH arm + +include ktypes/standard/standard.scc nocfg +branch qcom-armv7a + +include qcom-armv7a.scc + +#include features/bluetooth/bluetooth.scc +include features/cgroups/cgroups.scc +include features/fuse/fuse.scc +include features/transparent-hugepage/transparent-hugepage.cfg +include features/usb-net/usb-net.scc + +include cfg/fs/devtmpfs.scc +include cfg/fs/debugfs.scc +include cfg/fs/ext2.scc +include cfg/fs/ext4.scc +include cfg/fs/vfat.scc + +include cfg/timer/no_hz.scc + +#kconf hardware qcom-extra.cfg diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom-armv7a.scc b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom-armv7a.scc new file mode 100644 index 0000000..7006b1a --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom-armv7a.scc @@ -0,0 +1,19 @@ +# SPDX-License-Identifier: MIT + +kconf hardware qcom.cfg + +include qcom-apq8064.scc +#include qcom-msm8974.scc + +include features/i2c/i2c.scc +include features/hrt/hrt.scc +include features/net/net.scc +include features/pci/pci.scc +include features/power/arm.scc +include features/spi/spi.scc +include features/usb/usb-base.scc +include features/leds/leds.scc +include features/pwm/pwm.scc + +include cfg/timer/rtc.scc +include cfg/dmaengine.scc diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom-msm8974.cfg b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom-msm8974.cfg new file mode 100644 index 0000000..3a21c88 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom-msm8974.cfg @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: MIT + +CONFIG_ARCH_MSM8974=y +CONFIG_MSM_GCC_8974=y +CONFIG_MSM_MMCC_8974=y +CONFIG_INTERCONNECT_QCOM_MSM8974=y +CONFIG_PINCTRL_MSM8X74=y + +CONFIG_EXTCON_QCOM_SPMI_MISC=y diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom-msm8974.scc b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom-msm8974.scc new file mode 100644 index 0000000..eb866ed --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom-msm8974.scc @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: MIT + +kconf hardware qcom-rpm.cfg +kconf hardware qcom-msm8974.cfg diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom-rpm.cfg b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom-rpm.cfg new file mode 120000 index 0000000..a39c26f --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom-rpm.cfg @@ -0,0 +1 @@ +../qcom-armv8a/qcom-rpm.cfg
\ No newline at end of file diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom.cfg b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom.cfg new file mode 100644 index 0000000..99eff38 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv7a/qcom.cfg @@ -0,0 +1,204 @@ +# SPDX-License-Identifier: MIT + +CONFIG_ARCH_QCOM=y +CONFIG_ARM_QCOM_CPUFREQ_NVMEM=y +CONFIG_CMA=y +CONFIG_DMA_CMA=y +CONFIG_ARM_THUMBEE=y +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_VDSO=y + +CONFIG_SMP=y +CONFIG_SCHED_MC=y + +CONFIG_ARM_APPENDED_DTB=y +CONFIG_ARM_ATAG_DTB_COMPAT=y + +# CONFIG_ARM_CPUIDLE is not set +CONFIG_ARM_QCOM_SPM_CPUIDLE=y + +CONFIG_QCOM_SMSM=y + +CONFIG_QRTR=y +CONFIG_QRTR_SMD=y +CONFIG_QRTR_MHI=m + +CONFIG_BT=m +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_QCA=y + +CONFIG_COMMON_CLK_QCOM=y +CONFIG_KRAITCC=y +CONFIG_KPSS_XCC=y + +CONFIG_QCOM_GSBI=y + +CONFIG_CRYPTO_DEV_QCE=m +CONFIG_CRYPTO_DEV_QCOM_RNG=y + +CONFIG_HWSPINLOCK=y +CONFIG_HWSPINLOCK_QCOM=y + +CONFIG_INTERCONNECT=y +CONFIG_INTERCONNECT_QCOM=y + +CONFIG_MAILBOX=y + +CONFIG_MHI_BUS=m + +CONFIG_NVMEM=y +CONFIG_NVMEM_QCOM_QFPROM=y + +CONFIG_PCIE_QCOM=y + +CONFIG_PINCTRL_MSM=y +CONFIG_PINCTRL_QCOM_SPMI_PMIC=y +CONFIG_PINCTRL_QCOM_SSBI_PMIC=y + +CONFIG_QCOM_Q6V5_ADSP=m +CONFIG_QCOM_Q6V5_MSS=m +CONFIG_QCOM_Q6V5_PAS=m +CONFIG_QCOM_SYSMON=m +CONFIG_QCOM_Q6V5_WCSS=m +CONFIG_QCOM_WCNSS_PIL=m + +CONFIG_REMOTEPROC=y + +CONFIG_QCOM_APR=m +CONFIG_QCOM_FASTRPC=m +CONFIG_QCOM_IPA=m +CONFIG_QCOM_SMEM=y +CONFIG_QCOM_ICC_BWMON=y + +CONFIG_SERIAL_DEV_BUS=y + +CONFIG_SOUND=m +CONFIG_SND=m +CONFIG_SND_SOC=m +CONFIG_SND_SOC_QCOM=m +CONFIG_SND_SOC_HDMI_CODEC=m +CONFIG_SOUNDWIRE=m +CONFIG_SOUNDWIRE_QCOM=m + +# CONFIG_MOUSE_PS2 is not set +# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_GPIO=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_PM8941_PWRKEY=y +CONFIG_INPUT_PMIC8XXX_PWRKEY=y +CONFIG_SERIAL_MSM=y +CONFIG_SERIAL_MSM_CONSOLE=y + +CONFIG_I2C_QUP=y +CONFIG_SPI_QUP=y + +CONFIG_MFD_PM8XXX=y +CONFIG_MFD_QCOM_RPM=y + +CONFIG_SPMI=y +CONFIG_SPMI_MSM_PMIC_ARB=y +CONFIG_MFD_SPMI_PMIC=y + +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_MSM=y +CONFIG_POWER_RESET_QCOM_PON=y +CONFIG_REBOOT_MODE=y + +CONFIG_IIO=y +CONFIG_QCOM_SPMI_IADC=m + +CONFIG_THERMAL=y +CONFIG_THERMAL_HWMON=y +CONFIG_PM_DEVFREQ=y +CONFIG_DEVFREQ_THERMAL=y +CONFIG_QCOM_TSENS=y +CONFIG_QCOM_SPMI_ADC_TM5=m + +CONFIG_WATCHDOG_CORE=y +CONFIG_QCOM_WDT=y + +CONFIG_SLIMBUS=m + +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_QCOM_SPMI=y +CONFIG_REGULATOR_QCOM_USB_VBUS=y + +CONFIG_DRM=y +CONFIG_DRM_MSM=y +CONFIG_DRM_MSM_MDP4=y +CONFIG_DRM_MSM_MDP5=y +# CONFIG_DRM_MSM_DPU is not set +# CONFIG_DRM_MSM_DP is not set +CONFIG_DRM_MSM_DSI=y +CONFIG_DRM_MSM_DSI_28NM_PHY=y +CONFIG_DRM_MSM_DSI_20NM_PHY=y +CONFIG_DRM_MSM_DSI_28NM_8960_PHY=y +# CONFIG_DRM_MSM_DSI_14NM_PHY is not set +# CONFIG_DRM_MSM_DSI_10NM_PHY is not set +# CONFIG_DRM_MSM_DSI_7NM_PHY is not set +CONFIG_DRM_MSM_HDMI=y +CONFIG_DRM_PANEL_SIMPLE=y +CONFIG_DRM_DISPLAY_CONNECTOR=y + +CONFIG_BACKLIGHT_CLASS_DEVICE=y + +CONFIG_FB=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_LOGO=y + +CONFIG_EXTCON=y + +CONFIG_USB_GADGET=y +CONFIG_USB_CONFIGFS=y +CONFIG_USB_CONFIGFS_F_FS=y + +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_CHIPIDEA_MSM=y + +CONFIG_USB_DWC3=y + + +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_MSM=y + +CONFIG_CFG80211=m +CONFIG_MAC80211=m +CONFIG_CRYPTO_MICHAEL_MIC=m + +CONFIG_LEDS_CLASS_MULTICOLOR=y +CONFIG_LEDS_QCOM_LPG=y + +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_DRV_PM8XXX=y + +CONFIG_QCOM_BAM_DMA=y +CONFIG_QCOM_LLCC=y +CONFIG_QCOM_OCMEM=y +CONFIG_QCOM_RMTFS_MEM=y +CONFIG_QCOM_SOCINFO=y +CONFIG_QCOM_SPM=y +CONFIG_QCOM_STATS=y +CONFIG_QCOM_WCNSS_CTRL=m +CONFIG_QCOM_SMP2P=y + +CONFIG_RESET_QCOM_PDC=y + +CONFIG_QCOM_PM8XXX_XOADC=y + +CONFIG_GENERIC_PHY=y +CONFIG_PHY_QCOM_QMP=y +# CONFIG_PHY_QCOM_QMP_PCIE is not set +# CONFIG_PHY_QCOM_QMP_UFS is not set +CONFIG_PHY_QCOM_QMP_USB=y +CONFIG_PHY_QCOM_USB_HS=y + +CONFIG_SLIM_QCOM_CTRL=m +CONFIG_SLIM_QCOM_NGD_CTRL=m diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-armv8a-standard.scc b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-armv8a-standard.scc new file mode 100644 index 0000000..499d0b2 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-armv8a-standard.scc @@ -0,0 +1,29 @@ +# SPDX-License-Identifier: MIT + +define KMACHINE qcom-armv8a +define KTYPE standard +define KARCH arm64 + +include ktypes/standard/standard.scc nocfg +branch qcom-armv8a + +include qcom-armv8a.scc + +#include features/bluetooth/bluetooth.scc +include features/cgroups/cgroups.scc +include features/fuse/fuse.scc +include features/transparent-hugepage/transparent-hugepage.cfg +include features/usb-net/usb-net.scc + +include cfg/fs/devtmpfs.scc +include cfg/fs/debugfs.scc +include cfg/fs/ext2.scc +include cfg/fs/ext4.scc +include cfg/fs/vfat.scc + +include cfg/timer/no_hz.scc + +# enable the ability to run 32 bit apps +include arch/arm/32bit-compat.scc + +kconf hardware qcom-extra.cfg diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-armv8a.scc b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-armv8a.scc new file mode 100644 index 0000000..06ae07c --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-armv8a.scc @@ -0,0 +1,25 @@ +# SPDX-License-Identifier: MIT + +kconf hardware qcom.cfg + +include qcom-msm8916.scc +include qcom-msm8996.scc +include qcom-qcm2290.scc +include qcom-qcm6490.scc +include qcom-sdm845.scc +include qcom-sm6115.scc +include qcom-sm8250.scc +include qcom-sm8450.scc + +include features/i2c/i2c.scc +include features/hrt/hrt.scc +include features/net/net.scc +include features/pci/pci.scc +include features/power/arm.scc +include features/spi/spi.scc +include features/usb/usb-base.scc +include features/leds/leds.scc +include features/pwm/pwm.scc + +include cfg/timer/rtc.scc +include cfg/dmaengine.scc diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-extra.cfg b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-extra.cfg new file mode 100644 index 0000000..9b1384f --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-extra.cfg @@ -0,0 +1,30 @@ +# SPDX-License-Identifier: MIT + +CONFIG_BPF_SYSCALL=y +CONFIG_CGROUP_BPF=y + +CONFIG_AUTOFS_FS=y + +CONFIG_TYPEC_MUX_GPIO_SBU=y +CONFIG_TYPEC_MUX_NB7VPQ904M=y +CONFIG_TYPEC_MUX_FSA4480=y +CONFIG_TYPEC_DP_ALTMODE=y + +CONFIG_DRM_LONTIUM_LT9611=y +CONFIG_DRM_LONTIUM_LT9611UXC=y +CONFIG_DRM_I2C_ADV7511=y +CONFIG_DRM_I2C_ADV7511_AUDIO=y +CONFIG_DRM_I2C_ADV7511_CEC=y + +CONFIG_USB_XHCI_PCI_RENESAS=y + +CONFIG_USB_HSIC_USB3503=y + +CONFIG_PERF_EVENTS=y + +CONFIG_USB_HUB_USB251XB=y + +CONFIG_ATL1C=m + +CONFIG_CAN=m +CONFIG_CAN_MCP251XFD=m diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-msm8916.cfg b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-msm8916.cfg new file mode 100644 index 0000000..9c9a712 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-msm8916.cfg @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: MIT + +CONFIG_PINCTRL_MSM8916=y + +CONFIG_QCOM_A53PLL=y +CONFIG_QCOM_CLK_APCS_MSM8916=y +CONFIG_MSM_GCC_8916=y + +CONFIG_INTERCONNECT_QCOM_MSM8916=y + +CONFIG_QCOM_IOMMU=y + +CONFIG_PM8916_WATCHDOG=y + +CONFIG_SND_SOC_APQ8016_SBC=m +CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m +CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m + +CONFIG_EXTCON=y +CONFIG_EXTCON_USB_GPIO=y + +CONFIG_USB_ULPI_BUS=y +CONFIG_PHY_QCOM_USB_HS=y + +CONFIG_QCOM_SPMI_TEMP_ALARM=y +CONFIG_QCOM_SPMI_VADC=y + +CONFIG_QCOM_SMSM=y + +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_MSM=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y + +CONFIG_WCN36XX=m diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-msm8916.scc b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-msm8916.scc new file mode 100644 index 0000000..4b21237 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-msm8916.scc @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: MIT + +kconf hardware qcom-rpm.cfg +kconf hardware qcom-msm8916.cfg diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-msm8996.cfg b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-msm8996.cfg new file mode 100644 index 0000000..d636c96 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-msm8996.cfg @@ -0,0 +1,25 @@ +# SPDX-License-Identifier: MIT + +CONFIG_PINCTRL_MSM8996=y + +CONFIG_QCOM_CLK_APCC_MSM8996=y +CONFIG_MSM_GCC_8996=y +CONFIG_MSM_MMCC_8996=y +CONFIG_INTERCONNECT_QCOM_MSM8996=y + +CONFIG_PHY_QCOM_QMP_PCIE_8996=y + +CONFIG_SND_SOC_MSM8996=m + +CONFIG_SND_SOC_WCD9335=m + +CONFIG_PHY_QCOM_QUSB2=y + +CONFIG_EXTCON=y +CONFIG_EXTCON_USB_GPIO=y + +CONFIG_QCOM_SPMI_TEMP_ALARM=y +CONFIG_QCOM_SPMI_VADC=y + +CONFIG_ATH10K=m +CONFIG_ATH10K_PCI=m diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-msm8996.scc b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-msm8996.scc new file mode 100644 index 0000000..ef71826 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-msm8996.scc @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: MIT + +kconf hardware qcom-rpm.cfg +kconf hardware qcom-msm8996.cfg diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-qcm2290.cfg b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-qcm2290.cfg new file mode 100644 index 0000000..1ff457d --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-qcm2290.cfg @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: MIT + +CONFIG_PINCTRL_QCM2290=y +CONFIG_QCM_GCC_2290=y +CONFIG_QCM_DISPCC_2290=y +CONFIG_INTERCONNECT_QCOM_QCM2290=y + +CONFIG_PHY_QCOM_QUSB2=y diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-qcm2290.scc b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-qcm2290.scc new file mode 100644 index 0000000..ab2f061 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-qcm2290.scc @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: MIT + +kconf hardware qcom-rpm.cfg +kconf hardware qcom-qcm2290.cfg diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-qcm6490.cfg b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-qcm6490.cfg new file mode 100644 index 0000000..a1da8cb --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-qcm6490.cfg @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: MIT + +CONFIG_PINCTRL_SC7280=y +CONFIG_PINCTRL_SC7280_LPASS_LPI=m +CONFIG_SND_SOC_SC7280=m +CONFIG_INTERCONNECT_QCOM_SC7280=y + +CONFIG_SC_CAMCC_7280=m +CONFIG_SC_DISPCC_7280=y +CONFIG_SC_GCC_7280=y +CONFIG_SC_GPUCC_7280=y +CONFIG_SC_LPASS_CORECC_7280=m +CONFIG_SC_VIDEOCC_7280=m + +CONFIG_PHY_QCOM_USB_HS=y +CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=y +CONFIG_USB_DWC3_QCOM=y +CONFIG_PHY_QCOM_QMP_COMBO=y diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-qcm6490.scc b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-qcm6490.scc new file mode 100644 index 0000000..bf53a47 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-qcm6490.scc @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: MIT + +kconf hardware qcom-rpmh.cfg +kconf hardware qcom-qcm6490.cfg diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-rpm.cfg b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-rpm.cfg new file mode 100644 index 0000000..7fb1025 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-rpm.cfg @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: MIT + +CONFIG_RPMSG_QCOM_GLINK_RPM=y +CONFIG_REGULATOR_QCOM_SMD_RPM=y +CONFIG_QCOM_MPM=y +CONFIG_QCOM_SMD_RPM=y +CONFIG_QCOM_RPMPD=y +CONFIG_QCOM_CLK_SMD_RPM=y + +# legacy boards +CONFIG_RPMSG_QCOM_SMD=y diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-rpmh.cfg b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-rpmh.cfg new file mode 100644 index 0000000..f914280 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-rpmh.cfg @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: MIT + +CONFIG_QCOM_RPMH=y +CONFIG_QCOM_RPMHPD=y +CONFIG_QCOM_COMMAND_DB=y +CONFIG_RPMSG_QCOM_GLINK_SMEM=y +CONFIG_QCOM_AOSS_QMP=y +CONFIG_REGULATOR_QCOM_RPMH=y +CONFIG_QCOM_CLK_RPMH=y diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sdm845.cfg b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sdm845.cfg new file mode 100644 index 0000000..ee337aa --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sdm845.cfg @@ -0,0 +1,26 @@ +# SPDX-License-Identifier: MIT + +CONFIG_PINCTRL_SDM845=y +CONFIG_SDM_CAMCC_845=m +CONFIG_SDM_GCC_845=y +CONFIG_SDM_GPUCC_845=y +CONFIG_SDM_VIDEOCC_845=m +CONFIG_SDM_DISPCC_845=y +CONFIG_INTERCONNECT_QCOM_SDM845=y + +CONFIG_MFD_WCD934X=m +CONFIG_GPIO_WCD934X=m +CONFIG_SND_SOC_WCD934X=m +CONFIG_SND_SOC_SDM845=m + +CONFIG_QCOM_LMH=y +CONFIG_PHY_QCOM_QUSB2=y + +CONFIG_QCOM_SPMI_TEMP_ALARM=y +CONFIG_QCOM_SPMI_ADC5=y + +CONFIG_QCOM_SPMI_RRADC=m +CONFIG_REGULATOR_QCOM_LABIBB=m + +CONFIG_ATH10K=m +CONFIG_ATH10K_SNOC=m diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sdm845.scc b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sdm845.scc new file mode 100644 index 0000000..0446f2a --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sdm845.scc @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: MIT + +kconf hardware qcom-rpmh.cfg +kconf hardware qcom-sdm845.cfg diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sm6115.cfg b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sm6115.cfg new file mode 100644 index 0000000..2bb223a --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sm6115.cfg @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: MIT + +CONFIG_PINCTRL_SM6115=y +CONFIG_SM_DISPCC_6115=y +CONFIG_SM_GCC_6115=y +CONFIG_SM_GPUCC_6115=y +CONFIG_INTERCONNECT_QCOM_SM6115=y + +CONFIG_PHY_QCOM_QUSB2=y + +CONFIG_QCOM_SPMI_TEMP_ALARM=y +CONFIG_QCOM_SPMI_ADC5=y diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sm6115.scc b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sm6115.scc new file mode 100644 index 0000000..a7411aa --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sm6115.scc @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: MIT + +kconf hardware qcom-rpm.cfg +kconf hardware qcom-sm6115.cfg diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sm8250.cfg b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sm8250.cfg new file mode 100644 index 0000000..25fc04f --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sm8250.cfg @@ -0,0 +1,30 @@ +# SPDX-License-Identifier: MIT + +CONFIG_PINCTRL_SM8250=y +CONFIG_PINCTRL_SM8250_LPASS_LPI=m +CONFIG_SM_CAMCC_8250=m +CONFIG_SM_DISPCC_8250=y +CONFIG_SM_GCC_8250=y +CONFIG_SM_GPUCC_8250=y +CONFIG_SM_VIDEOCC_8250=m +CONFIG_CLK_GFM_LPASS_SM8250=m +CONFIG_INTERCONNECT_QCOM_SM8250=y + +CONFIG_SND_SOC_WCD938X=m +CONFIG_SND_SOC_WCD938X_SDW=m +CONFIG_SND_SOC_SM8250=m + +CONFIG_TYPEC_TCPM=y +CONFIG_TYPEC_QCOM_PMIC=y + +CONFIG_QCOM_IPCC=y + +CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=y + +CONFIG_QCOM_SPMI_TEMP_ALARM=y +CONFIG_QCOM_SPMI_ADC5=y + +CONFIG_MFD_QCOM_QCA639X=y + +CONFIG_ATH11K=m +CONFIG_ATH11K_PCI=m diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sm8250.scc b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sm8250.scc new file mode 100644 index 0000000..cbd485d --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sm8250.scc @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: MIT + +kconf hardware qcom-rpmh.cfg +kconf hardware qcom-sm8250.cfg diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sm8450.cfg b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sm8450.cfg new file mode 100644 index 0000000..88939b0 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sm8450.cfg @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: MIT + +CONFIG_PINCTRL_SM8450=y +CONFIG_PINCTRL_SM8450_LPASS_LPI=m +CONFIG_SM_CAMCC_8450=m +CONFIG_SM_DISPCC_8450=y +CONFIG_SM_GCC_8450=y +CONFIG_SM_GPUCC_8450=y +CONFIG_SM_VIDEOCC_8450=m +CONFIG_INTERCONNECT_QCOM_SM8450=y + +CONFIG_QCOM_IPCC=y + +CONFIG_TYPEC_UCSI=y +CONFIG_UCSI_PMIC_GLINK=y +CONFIG_QCOM_PMIC_GLINK=y +CONFIG_BATTERY_QCOM_BATTMGR=m + +CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=y + +CONFIG_QCOM_SPMI_TEMP_ALARM=y +CONFIG_QCOM_SPMI_ADC5=y + +CONFIG_MFD_QCOM_QCA639X=y + +CONFIG_ATH11K=m +CONFIG_ATH11K_PCI=m diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sm8450.scc b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sm8450.scc new file mode 100644 index 0000000..d9a02c0 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-sm8450.scc @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: MIT + +kconf hardware qcom-rpmh.cfg +kconf hardware qcom-sm8450.cfg diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom.cfg b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom.cfg new file mode 100644 index 0000000..631fc43 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom.cfg @@ -0,0 +1,230 @@ +# SPDX-License-Identifier: MIT + +CONFIG_ARCH_QCOM=y +CONFIG_ARM_PSCI_CPUIDLE=y +CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y +CONFIG_ARM_QCOM_CPUFREQ_NVMEM=y +CONFIG_ARM_QCOM_CPUFREQ_HW=y +CONFIG_CMA=y +CONFIG_DMA_CMA=y + +CONFIG_SCHED_MC=y + +CONFIG_QRTR=y +CONFIG_QRTR_SMD=y +CONFIG_QRTR_MHI=m + +CONFIG_BT=m +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_QCA=y + +CONFIG_COMMON_CLK_QCOM=y + +CONFIG_CRYPTO_DEV_QCE=m +CONFIG_CRYPTO_DEV_QCOM_RNG=y + +CONFIG_HWSPINLOCK=y +CONFIG_HWSPINLOCK_QCOM=y + +CONFIG_INTERCONNECT=y +CONFIG_INTERCONNECT_QCOM=y +CONFIG_INTERCONNECT_QCOM_OSM_L3=y + +CONFIG_MAILBOX=y +CONFIG_QCOM_APCS_IPC=y + +CONFIG_MHI_BUS=m + +CONFIG_NVMEM=y +CONFIG_NVMEM_QCOM_QFPROM=y + +CONFIG_ARM_SMMU=y +CONFIG_ARM_SMMU_QCOM=y + +CONFIG_PCIE_QCOM=y +CONFIG_PCIE_QCOM_EP=m + +CONFIG_PCI_ENDPOINT=y +CONFIG_PCI_ENDPOINT_CONFIGFS=y + +CONFIG_PINCTRL_MSM=y +CONFIG_PINCTRL_LPASS_LPI=m +CONFIG_PINCTRL_QCOM_SPMI_PMIC=y + +CONFIG_QCOM_Q6V5_ADSP=m +CONFIG_QCOM_Q6V5_MSS=m +CONFIG_QCOM_Q6V5_PAS=m +CONFIG_QCOM_SYSMON=m +CONFIG_QCOM_Q6V5_WCSS=m +CONFIG_QCOM_WCNSS_PIL=m + +CONFIG_REMOTEPROC=y + +CONFIG_QCOM_APR=m +CONFIG_QCOM_FASTRPC=m +CONFIG_QCOM_IPA=m +CONFIG_QCOM_SMEM=y +CONFIG_QCOM_ICC_BWMON=y + +CONFIG_SERIAL_DEV_BUS=y + +CONFIG_SOUND=m +CONFIG_SND=m +CONFIG_SND_SOC=m +CONFIG_SND_SOC_QCOM=m +CONFIG_SND_SOC_HDMI_CODEC=m +CONFIG_SOUNDWIRE=m +CONFIG_SOUNDWIRE_QCOM=m + +# CONFIG_MOUSE_PS2 is not set +# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_GPIO=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_PM8941_PWRKEY=y +CONFIG_SERIAL_MSM=y +CONFIG_SERIAL_MSM_CONSOLE=y + +CONFIG_QCOM_GENI_SE=y +CONFIG_SERIAL_QCOM_GENI=y +CONFIG_SERIAL_QCOM_GENI_CONSOLE=y +CONFIG_I2C_QCOM_GENI=y +CONFIG_I2C_QUP=y +CONFIG_SPI_QUP=y +CONFIG_SPI_QCOM_GENI=y + +CONFIG_SPMI=y +CONFIG_SPMI_MSM_PMIC_ARB=y +CONFIG_MFD_SPMI_PMIC=y + +CONFIG_POWER_RESET_MSM=y +CONFIG_POWER_RESET_QCOM_PON=y +CONFIG_REBOOT_MODE=y + +CONFIG_IIO=y +CONFIG_QCOM_SPMI_IADC=m + +CONFIG_THERMAL=y +CONFIG_THERMAL_HWMON=y +CONFIG_PM_DEVFREQ=y +CONFIG_DEVFREQ_THERMAL=y +CONFIG_QCOM_TSENS=y +CONFIG_QCOM_SPMI_ADC_TM5=m + +CONFIG_WATCHDOG_CORE=y +CONFIG_QCOM_WDT=y + +CONFIG_SLIMBUS=m + +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_QCOM_SPMI=y +CONFIG_REGULATOR_QCOM_USB_VBUS=y + +CONFIG_DRM=y +CONFIG_DRM_MSM=y +CONFIG_DRM_MSM_MDP5=y +CONFIG_DRM_MSM_DPU=y +CONFIG_DRM_MSM_DP=y +CONFIG_DRM_MSM_DSI=y +CONFIG_DRM_MSM_DSI_28NM_PHY=y +CONFIG_DRM_MSM_DSI_20NM_PHY=y +CONFIG_DRM_MSM_DSI_28NM_8960_PHY=y +CONFIG_DRM_MSM_DSI_14NM_PHY=y +CONFIG_DRM_MSM_DSI_10NM_PHY=y +CONFIG_DRM_MSM_DSI_7NM_PHY=y +CONFIG_DRM_MSM_HDMI=y +CONFIG_DRM_PANEL_SIMPLE=y +CONFIG_DRM_DISPLAY_CONNECTOR=y + +CONFIG_BACKLIGHT_CLASS_DEVICE=y + +CONFIG_FB=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_LOGO=y + +CONFIG_SND_SOC_WSA881X=m +CONFIG_SND_SOC_WSA883X=m + +CONFIG_SND_SOC_LPASS_WSA_MACRO=m +CONFIG_SND_SOC_LPASS_VA_MACRO=m +CONFIG_SND_SOC_LPASS_RX_MACRO=m +CONFIG_SND_SOC_LPASS_TX_MACRO=m + +CONFIG_TYPEC=y +CONFIG_USB_GADGET=y +CONFIG_USB_CONFIGFS=y +CONFIG_USB_CONFIGFS_F_FS=y + +CONFIG_USB_XHCI_HCD=y + +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_MSM=y + +CONFIG_SCSI=y +CONFIG_SCSI_UFSHCD=y +CONFIG_SCSI_UFS_BSG=y +CONFIG_SCSI_UFS_HWMON=y +CONFIG_SCSI_UFSHCD_PLATFORM=y +CONFIG_SCSI_UFS_QCOM=y + +CONFIG_CFG80211=m +CONFIG_MAC80211=m +CONFIG_CRYPTO_MICHAEL_MIC=m + +CONFIG_LEDS_CLASS_MULTICOLOR=y +CONFIG_LEDS_QCOM_LPG=y + +CONFIG_USB_DWC3=y + +CONFIG_RAS=y +CONFIG_EDAC=y +CONFIG_EDAC_QCOM=y + +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_DRV_PM8XXX=y + +CONFIG_QCOM_BAM_DMA=y +CONFIG_QCOM_GPI_DMA=y +CONFIG_QCOM_LLCC=y +CONFIG_QCOM_OCMEM=y +CONFIG_QCOM_RMTFS_MEM=y +CONFIG_QCOM_SOCINFO=y +CONFIG_QCOM_STATS=y +CONFIG_QCOM_WCNSS_CTRL=m +CONFIG_QCOM_SMP2P=y + +CONFIG_RESET_QCOM_AOSS=y +CONFIG_RESET_QCOM_PDC=y +CONFIG_QCOM_PDC=y + +CONFIG_I2C_QCOM_CCI=m + +CONFIG_GENERIC_PHY=y +CONFIG_PHY_QCOM_QMP=y +CONFIG_PHY_QCOM_QMP_PCIE=y +CONFIG_PHY_QCOM_QMP_UFS=y +CONFIG_PHY_QCOM_QMP_USB=y + +CONFIG_SLIM_QCOM_CTRL=m +CONFIG_SLIM_QCOM_NGD_CTRL=m + +CONFIG_MEDIA_SUPPORT=m +CONFIG_MEDIA_PLATFORM_SUPPORT=y +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_V4L_MEM2MEM_DRIVERS=y +CONFIG_VIDEO_QCOM_CAMSS=m +CONFIG_VIDEO_QCOM_VENUS=m + +CONFIG_CORESIGHT=m +CONFIG_CORESIGHT_LINK_AND_SINK_TMC=m +CONFIG_CORESIGHT_SINK_TPIU=m +CONFIG_CORESIGHT_SOURCE_ETM4X=m +CONFIG_CORESIGHT_STM=m +CONFIG_CORESIGHT_CPU_DEBUG=m +CONFIG_CORESIGHT_CTI=m +CONFIG_CORESIGHT_TPDM=m +CONFIG_CORESIGHT_TPDA=m + +CONFIG_ARM64_VA_BITS_48=y diff --git a/recipes-kernel/linux/linux-yocto/generic-drivers/0001-FROMLIST-dma-heap-Add-proper-kref-handling-on-dma-bu.patch b/recipes-kernel/linux/linux-yocto/generic-drivers/0001-FROMLIST-dma-heap-Add-proper-kref-handling-on-dma-bu.patch new file mode 100644 index 0000000..87fefa9 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/generic-drivers/0001-FROMLIST-dma-heap-Add-proper-kref-handling-on-dma-bu.patch @@ -0,0 +1,145 @@ +From dd2c03120004f3bfed8b4f6500c33957b1bae807 Mon Sep 17 00:00:00 2001 +From: John Stultz <jstultz@google.com> +Date: Mon, 11 Sep 2023 10:30:31 +0800 +Subject: [PATCH 1/2] FROMLIST: dma-heap: Add proper kref handling on dma-buf + heaps + +Add proper refcounting on the dma_heap structure. +While existing heaps are built-in, we may eventually +have heaps loaded from modules, and we'll need to be +able to properly handle the references to the heaps + +Also moves minor tracking into the heap structure so +we can properly free things. + +[Yong: Just add comment for "minor" and "refcount"] +Signed-off-by: John Stultz <jstultz@google.com> +Signed-off-by: T.J. Mercier <tjmercier@google.com> +Signed-off-by: Yong Wu <yong.wu@mediatek.com> +Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Submitted [https://lore.kernel.org/lkml/20230911023038.30649-3-yong.wu@mediatek.com/] +--- + drivers/dma-buf/dma-heap.c | 38 ++++++++++++++++++++++++++++++++++---- + include/linux/dma-heap.h | 6 ++++++ + 2 files changed, 40 insertions(+), 4 deletions(-) + +diff --git a/drivers/dma-buf/dma-heap.c b/drivers/dma-buf/dma-heap.c +index 84ae708fafe7..59328045975a 100644 +--- a/drivers/dma-buf/dma-heap.c ++++ b/drivers/dma-buf/dma-heap.c +@@ -12,6 +12,7 @@ + #include <linux/dma-buf.h> + #include <linux/err.h> + #include <linux/xarray.h> ++#include <linux/kref.h> + #include <linux/list.h> + #include <linux/slab.h> + #include <linux/nospec.h> +@@ -31,6 +32,8 @@ + * @heap_devt heap device node + * @list list head connecting to list of heaps + * @heap_cdev heap char device ++ * @minor: heap device node minor number ++ * @refcount: reference counter for this heap device + * + * Represents a heap of memory from which buffers can be made. + */ +@@ -41,6 +44,8 @@ struct dma_heap { + dev_t heap_devt; + struct list_head list; + struct cdev heap_cdev; ++ int minor; ++ struct kref refcount; + }; + + static LIST_HEAD(heap_list); +@@ -220,7 +225,6 @@ struct dma_heap *dma_heap_add(const struct dma_heap_export_info *exp_info) + { + struct dma_heap *heap, *h, *err_ret; + struct device *dev_ret; +- unsigned int minor; + int ret; + + if (!exp_info->name || !strcmp(exp_info->name, "")) { +@@ -237,12 +241,13 @@ struct dma_heap *dma_heap_add(const struct dma_heap_export_info *exp_info) + if (!heap) + return ERR_PTR(-ENOMEM); + ++ kref_init(&heap->refcount); + heap->name = exp_info->name; + heap->ops = exp_info->ops; + heap->priv = exp_info->priv; + + /* Find unused minor number */ +- ret = xa_alloc(&dma_heap_minors, &minor, heap, ++ ret = xa_alloc(&dma_heap_minors, &heap->minor, heap, + XA_LIMIT(0, NUM_HEAP_MINORS - 1), GFP_KERNEL); + if (ret < 0) { + pr_err("dma_heap: Unable to get minor number for heap\n"); +@@ -251,7 +256,7 @@ struct dma_heap *dma_heap_add(const struct dma_heap_export_info *exp_info) + } + + /* Create device */ +- heap->heap_devt = MKDEV(MAJOR(dma_heap_devt), minor); ++ heap->heap_devt = MKDEV(MAJOR(dma_heap_devt), heap->minor); + + cdev_init(&heap->heap_cdev, &dma_heap_fops); + ret = cdev_add(&heap->heap_cdev, heap->heap_devt, 1); +@@ -295,12 +300,37 @@ struct dma_heap *dma_heap_add(const struct dma_heap_export_info *exp_info) + err2: + cdev_del(&heap->heap_cdev); + err1: +- xa_erase(&dma_heap_minors, minor); ++ xa_erase(&dma_heap_minors, heap->minor); + err0: + kfree(heap); + return err_ret; + } + ++static void dma_heap_release(struct kref *ref) ++{ ++ struct dma_heap *heap = container_of(ref, struct dma_heap, refcount); ++ ++ /* Note, we already holding the heap_list_lock here */ ++ list_del(&heap->list); ++ ++ device_destroy(dma_heap_class, heap->heap_devt); ++ cdev_del(&heap->heap_cdev); ++ xa_erase(&dma_heap_minors, heap->minor); ++ ++ kfree(heap); ++} ++ ++void dma_heap_put(struct dma_heap *h) ++{ ++ /* ++ * Take the heap_list_lock now to avoid racing with code ++ * scanning the list and then taking a kref. ++ */ ++ mutex_lock(&heap_list_lock); ++ kref_put(&h->refcount, dma_heap_release); ++ mutex_unlock(&heap_list_lock); ++} ++ + static char *dma_heap_devnode(const struct device *dev, umode_t *mode) + { + return kasprintf(GFP_KERNEL, "dma_heap/%s", dev_name(dev)); +diff --git a/include/linux/dma-heap.h b/include/linux/dma-heap.h +index 0c05561cad6e..f8c986dd9a8b 100644 +--- a/include/linux/dma-heap.h ++++ b/include/linux/dma-heap.h +@@ -65,4 +65,10 @@ const char *dma_heap_get_name(struct dma_heap *heap); + */ + struct dma_heap *dma_heap_add(const struct dma_heap_export_info *exp_info); + ++/** ++ * dma_heap_put - drops a reference to a dmabuf heap, potentially freeing it ++ * @heap: the heap whose reference count to decrement ++ */ ++void dma_heap_put(struct dma_heap *heap); ++ + #endif /* _DMA_HEAPS_H */ +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/generic-drivers/0002-FROMLIST-dma-heap-Provide-accessors-so-that-in-kerne.patch b/recipes-kernel/linux/linux-yocto/generic-drivers/0002-FROMLIST-dma-heap-Provide-accessors-so-that-in-kerne.patch new file mode 100644 index 0000000..f65b7cb --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/generic-drivers/0002-FROMLIST-dma-heap-Provide-accessors-so-that-in-kerne.patch @@ -0,0 +1,180 @@ +From fd0d8a09c8d928459d37ae535825018bb0594357 Mon Sep 17 00:00:00 2001 +From: John Stultz <jstultz@google.com> +Date: Mon, 11 Sep 2023 10:30:32 +0800 +Subject: [PATCH 2/2] FROMLIST: dma-heap: Provide accessors so that in-kernel + drivers can allocate dmabufs from specific heaps + +This allows drivers who don't want to create their own +DMA-BUF exporter to be able to allocate DMA-BUFs directly +from existing DMA-BUF Heaps. + +There is some concern that the premise of DMA-BUF heaps is +that userland knows better about what type of heap memory +is needed for a pipeline, so it would likely be best for +drivers to import and fill DMA-BUFs allocated by userland +instead of allocating one themselves, but this is still +up for debate. + +[Yong: Fix the checkpatch alignment warning] +Signed-off-by: John Stultz <jstultz@google.com> +Signed-off-by: T.J. Mercier <tjmercier@google.com> +Signed-off-by: Yong Wu <yong.wu@mediatek.com> +Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Submitted [https://lore.kernel.org/lkml/20230911023038.30649-4-yong.wu@mediatek.com/] +--- + drivers/dma-buf/dma-heap.c | 60 ++++++++++++++++++++++++++++---------- + include/linux/dma-heap.h | 25 ++++++++++++++++ + 2 files changed, 69 insertions(+), 16 deletions(-) + +diff --git a/drivers/dma-buf/dma-heap.c b/drivers/dma-buf/dma-heap.c +index 59328045975a..e17705427b23 100644 +--- a/drivers/dma-buf/dma-heap.c ++++ b/drivers/dma-buf/dma-heap.c +@@ -54,12 +54,15 @@ static dev_t dma_heap_devt; + static struct class *dma_heap_class; + static DEFINE_XARRAY_ALLOC(dma_heap_minors); + +-static int dma_heap_buffer_alloc(struct dma_heap *heap, size_t len, +- unsigned int fd_flags, +- unsigned int heap_flags) ++struct dma_buf *dma_heap_buffer_alloc(struct dma_heap *heap, size_t len, ++ unsigned int fd_flags, ++ unsigned int heap_flags) + { +- struct dma_buf *dmabuf; +- int fd; ++ if (fd_flags & ~DMA_HEAP_VALID_FD_FLAGS) ++ return ERR_PTR(-EINVAL); ++ ++ if (heap_flags & ~DMA_HEAP_VALID_HEAP_FLAGS) ++ return ERR_PTR(-EINVAL); + + /* + * Allocations from all heaps have to begin +@@ -67,9 +70,20 @@ static int dma_heap_buffer_alloc(struct dma_heap *heap, size_t len, + */ + len = PAGE_ALIGN(len); + if (!len) +- return -EINVAL; ++ return ERR_PTR(-EINVAL); + +- dmabuf = heap->ops->allocate(heap, len, fd_flags, heap_flags); ++ return heap->ops->allocate(heap, len, fd_flags, heap_flags); ++} ++EXPORT_SYMBOL_GPL(dma_heap_buffer_alloc); ++ ++static int dma_heap_bufferfd_alloc(struct dma_heap *heap, size_t len, ++ unsigned int fd_flags, ++ unsigned int heap_flags) ++{ ++ struct dma_buf *dmabuf; ++ int fd; ++ ++ dmabuf = dma_heap_buffer_alloc(heap, len, fd_flags, heap_flags); + if (IS_ERR(dmabuf)) + return PTR_ERR(dmabuf); + +@@ -107,15 +121,9 @@ static long dma_heap_ioctl_allocate(struct file *file, void *data) + if (heap_allocation->fd) + return -EINVAL; + +- if (heap_allocation->fd_flags & ~DMA_HEAP_VALID_FD_FLAGS) +- return -EINVAL; +- +- if (heap_allocation->heap_flags & ~DMA_HEAP_VALID_HEAP_FLAGS) +- return -EINVAL; +- +- fd = dma_heap_buffer_alloc(heap, heap_allocation->len, +- heap_allocation->fd_flags, +- heap_allocation->heap_flags); ++ fd = dma_heap_bufferfd_alloc(heap, heap_allocation->len, ++ heap_allocation->fd_flags, ++ heap_allocation->heap_flags); + if (fd < 0) + return fd; + +@@ -220,6 +228,7 @@ const char *dma_heap_get_name(struct dma_heap *heap) + { + return heap->name; + } ++EXPORT_SYMBOL_GPL(dma_heap_get_name); + + struct dma_heap *dma_heap_add(const struct dma_heap_export_info *exp_info) + { +@@ -305,6 +314,24 @@ struct dma_heap *dma_heap_add(const struct dma_heap_export_info *exp_info) + kfree(heap); + return err_ret; + } ++EXPORT_SYMBOL_GPL(dma_heap_add); ++ ++struct dma_heap *dma_heap_find(const char *name) ++{ ++ struct dma_heap *h; ++ ++ mutex_lock(&heap_list_lock); ++ list_for_each_entry(h, &heap_list, list) { ++ if (!strcmp(h->name, name)) { ++ kref_get(&h->refcount); ++ mutex_unlock(&heap_list_lock); ++ return h; ++ } ++ } ++ mutex_unlock(&heap_list_lock); ++ return NULL; ++} ++EXPORT_SYMBOL_GPL(dma_heap_find); + + static void dma_heap_release(struct kref *ref) + { +@@ -330,6 +357,7 @@ void dma_heap_put(struct dma_heap *h) + kref_put(&h->refcount, dma_heap_release); + mutex_unlock(&heap_list_lock); + } ++EXPORT_SYMBOL_GPL(dma_heap_put); + + static char *dma_heap_devnode(const struct device *dev, umode_t *mode) + { +diff --git a/include/linux/dma-heap.h b/include/linux/dma-heap.h +index f8c986dd9a8b..31f44d83f11b 100644 +--- a/include/linux/dma-heap.h ++++ b/include/linux/dma-heap.h +@@ -65,10 +65,35 @@ const char *dma_heap_get_name(struct dma_heap *heap); + */ + struct dma_heap *dma_heap_add(const struct dma_heap_export_info *exp_info); + ++/** ++ * dma_heap_find - get the heap registered with the specified name ++ * @name: Name of the DMA-Heap to find ++ * ++ * Returns: ++ * The DMA-Heap with the provided name. ++ * ++ * NOTE: DMA-Heaps returned from this function MUST be released using ++ * dma_heap_put() when the user is done to enable the heap to be unloaded. ++ */ ++struct dma_heap *dma_heap_find(const char *name); ++ + /** + * dma_heap_put - drops a reference to a dmabuf heap, potentially freeing it + * @heap: the heap whose reference count to decrement + */ + void dma_heap_put(struct dma_heap *heap); + ++/** ++ * dma_heap_buffer_alloc - Allocate dma-buf from a dma_heap ++ * @heap: DMA-Heap to allocate from ++ * @len: size to allocate in bytes ++ * @fd_flags: flags to set on returned dma-buf fd ++ * @heap_flags: flags to pass to the dma heap ++ * ++ * This is for internal dma-buf allocations only. Free returned buffers with dma_buf_put(). ++ */ ++struct dma_buf *dma_heap_buffer_alloc(struct dma_heap *heap, size_t len, ++ unsigned int fd_flags, ++ unsigned int heap_flags); ++ + #endif /* _DMA_HEAPS_H */ +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0001-interconnect-qcom-icc-rpm-Add-AB-IB-calculations-coe.patch b/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0001-interconnect-qcom-icc-rpm-Add-AB-IB-calculations-coe.patch new file mode 100644 index 0000000..6b8e76f --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0001-interconnect-qcom-icc-rpm-Add-AB-IB-calculations-coe.patch @@ -0,0 +1,97 @@ +From dd014803f260b337daaabcde259daf70d5b26b5e Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Fri, 25 Aug 2023 17:38:23 +0200 +Subject: [PATCH 1/9] interconnect: qcom: icc-rpm: Add AB/IB calculations + coefficients + +Presumably due to the hardware being so complex, some nodes (or busses) +have different (usually higher) requirements for bandwidth than what +the usual calculations would suggest. + +Looking at the available downstream files, it seems like AB values are +adjusted per-bus and IB values are adjusted per-node. +With that in mind, introduce percentage-based coefficient struct members +and use them in the calculations. + +One thing to note is that the IB coefficient is inverse (100/ib_percent) +which feels a bit backwards, but it's necessary for precision.. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20230726-topic-icc_coeff-v4-1-c04b60caa467@linaro.org +Signed-off-by: Georgi Djakov <djakov@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git dd014803f260] +--- + drivers/interconnect/qcom/icc-rpm.c | 18 +++++++++++++++--- + drivers/interconnect/qcom/icc-rpm.h | 6 ++++++ + 2 files changed, 21 insertions(+), 3 deletions(-) + +diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c +index 2c16917ba1fd..8b02aa8aa96a 100644 +--- a/drivers/interconnect/qcom/icc-rpm.c ++++ b/drivers/interconnect/qcom/icc-rpm.c +@@ -298,7 +298,8 @@ static int qcom_icc_bw_aggregate(struct icc_node *node, u32 tag, u32 avg_bw, + */ + static void qcom_icc_bus_aggregate(struct icc_provider *provider, u64 *agg_clk_rate) + { +- u64 agg_avg_rate, agg_rate; ++ struct qcom_icc_provider *qp = to_qcom_provider(provider); ++ u64 agg_avg_rate, agg_peak_rate, agg_rate; + struct qcom_icc_node *qn; + struct icc_node *node; + int i; +@@ -315,8 +316,19 @@ static void qcom_icc_bus_aggregate(struct icc_provider *provider, u64 *agg_clk_r + else + agg_avg_rate = qn->sum_avg[i]; + +- agg_rate = max_t(u64, agg_avg_rate, qn->max_peak[i]); +- do_div(agg_rate, qn->buswidth); ++ if (qp->ab_coeff) { ++ agg_avg_rate = agg_avg_rate * qp->ab_coeff; ++ agg_avg_rate = div_u64(agg_avg_rate, 100); ++ } ++ ++ if (qp->ib_coeff) { ++ agg_peak_rate = qn->max_peak[i] * 100; ++ agg_peak_rate = div_u64(qn->max_peak[i], qp->ib_coeff); ++ } else { ++ agg_peak_rate = qn->max_peak[i]; ++ } ++ ++ agg_rate = max_t(u64, agg_avg_rate, agg_peak_rate); + + agg_clk_rate[i] = max_t(u64, agg_clk_rate[i], agg_rate); + } +diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h +index eed3451af3e6..5e7d6a4fd2f3 100644 +--- a/drivers/interconnect/qcom/icc-rpm.h ++++ b/drivers/interconnect/qcom/icc-rpm.h +@@ -44,6 +44,8 @@ struct rpm_clk_resource { + * @type: the ICC provider type + * @regmap: regmap for QoS registers read/write access + * @qos_offset: offset to QoS registers ++ * @ab_coeff: a percentage-based coefficient for compensating the AB calculations ++ * @ib_coeff: an inverse-percentage-based coefficient for compensating the IB calculations + * @bus_clk_rate: bus clock rate in Hz + * @bus_clk_desc: a pointer to a rpm_clk_resource description of bus clocks + * @bus_clk: a pointer to a HLOS-owned bus clock +@@ -57,6 +59,8 @@ struct qcom_icc_provider { + enum qcom_icc_type type; + struct regmap *regmap; + unsigned int qos_offset; ++ u16 ab_coeff; ++ u16 ib_coeff; + u32 bus_clk_rate[QCOM_SMD_RPM_STATE_NUM]; + const struct rpm_clk_resource *bus_clk_desc; + struct clk *bus_clk; +@@ -123,6 +127,8 @@ struct qcom_icc_desc { + enum qcom_icc_type type; + const struct regmap_config *regmap_cfg; + unsigned int qos_offset; ++ u16 ab_coeff; ++ u16 ib_coeff; + }; + + /* Valid for all bus types */ +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0002-interconnect-qcom-icc-rpm-Separate-out-clock-rate-ca.patch b/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0002-interconnect-qcom-icc-rpm-Separate-out-clock-rate-ca.patch new file mode 100644 index 0000000..be1d79f --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0002-interconnect-qcom-icc-rpm-Separate-out-clock-rate-ca.patch @@ -0,0 +1,100 @@ +From db8fc1002c53bc17a3ca6fad2c524de42b77c146 Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Fri, 25 Aug 2023 17:38:24 +0200 +Subject: [PATCH 2/9] interconnect: qcom: icc-rpm: Separate out clock rate + calulcations + +In preparation for also setting per-node clock rates, separate out the +logic that computes it. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20230726-topic-icc_coeff-v4-2-c04b60caa467@linaro.org +Signed-off-by: Georgi Djakov <djakov@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git db8fc1002c53] +--- + drivers/interconnect/qcom/icc-rpm.c | 53 ++++++++++++++++------------- + 1 file changed, 30 insertions(+), 23 deletions(-) + +diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c +index 8b02aa8aa96a..8c1bfd65d774 100644 +--- a/drivers/interconnect/qcom/icc-rpm.c ++++ b/drivers/interconnect/qcom/icc-rpm.c +@@ -291,6 +291,32 @@ static int qcom_icc_bw_aggregate(struct icc_node *node, u32 tag, u32 avg_bw, + return 0; + } + ++static u64 qcom_icc_calc_rate(struct qcom_icc_provider *qp, struct qcom_icc_node *qn, int ctx) ++{ ++ u64 agg_avg_rate, agg_peak_rate, agg_rate; ++ ++ if (qn->channels) ++ agg_avg_rate = div_u64(qn->sum_avg[ctx], qn->channels); ++ else ++ agg_avg_rate = qn->sum_avg[ctx]; ++ ++ if (qp->ab_coeff) { ++ agg_avg_rate = agg_avg_rate * qp->ab_coeff; ++ agg_avg_rate = div_u64(agg_avg_rate, 100); ++ } ++ ++ if (qp->ib_coeff) { ++ agg_peak_rate = qn->max_peak[ctx] * 100; ++ agg_peak_rate = div_u64(qn->max_peak[ctx], qp->ib_coeff); ++ } else { ++ agg_peak_rate = qn->max_peak[ctx]; ++ } ++ ++ agg_rate = max_t(u64, agg_avg_rate, agg_peak_rate); ++ ++ return div_u64(agg_rate, qn->buswidth); ++} ++ + /** + * qcom_icc_bus_aggregate - calculate bus clock rates by traversing all nodes + * @provider: generic interconnect provider +@@ -299,10 +325,9 @@ static int qcom_icc_bw_aggregate(struct icc_node *node, u32 tag, u32 avg_bw, + static void qcom_icc_bus_aggregate(struct icc_provider *provider, u64 *agg_clk_rate) + { + struct qcom_icc_provider *qp = to_qcom_provider(provider); +- u64 agg_avg_rate, agg_peak_rate, agg_rate; + struct qcom_icc_node *qn; + struct icc_node *node; +- int i; ++ int ctx; + + /* + * Iterate nodes on the provider, aggregate bandwidth requests for +@@ -310,27 +335,9 @@ static void qcom_icc_bus_aggregate(struct icc_provider *provider, u64 *agg_clk_r + */ + list_for_each_entry(node, &provider->nodes, node_list) { + qn = node->data; +- for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) { +- if (qn->channels) +- agg_avg_rate = div_u64(qn->sum_avg[i], qn->channels); +- else +- agg_avg_rate = qn->sum_avg[i]; +- +- if (qp->ab_coeff) { +- agg_avg_rate = agg_avg_rate * qp->ab_coeff; +- agg_avg_rate = div_u64(agg_avg_rate, 100); +- } +- +- if (qp->ib_coeff) { +- agg_peak_rate = qn->max_peak[i] * 100; +- agg_peak_rate = div_u64(qn->max_peak[i], qp->ib_coeff); +- } else { +- agg_peak_rate = qn->max_peak[i]; +- } +- +- agg_rate = max_t(u64, agg_avg_rate, agg_peak_rate); +- +- agg_clk_rate[i] = max_t(u64, agg_clk_rate[i], agg_rate); ++ for (ctx = 0; ctx < QCOM_SMD_RPM_STATE_NUM; ctx++) { ++ agg_clk_rate[ctx] = max_t(u64, agg_clk_rate[ctx], ++ qcom_icc_calc_rate(qp, qn, ctx)); + } + } + } +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0003-interconnect-qcom-icc-rpm-Let-nodes-drive-their-own-.patch b/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0003-interconnect-qcom-icc-rpm-Let-nodes-drive-their-own-.patch new file mode 100644 index 0000000..f71cf3d --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0003-interconnect-qcom-icc-rpm-Let-nodes-drive-their-own-.patch @@ -0,0 +1,99 @@ +From 919791d82d3b878094e9edc39b0d9a4eafcc0860 Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Fri, 25 Aug 2023 17:38:25 +0200 +Subject: [PATCH 3/9] interconnect: qcom: icc-rpm: Let nodes drive their own + bus clock + +If this hardware couldn't get messier, some nodes are supposed to drive +their own bus clock.. Presumably to connect to some intermediate +interface between the node itself and the bus it's (supposed to be) +connected to. + +Expand the node struct with the necessary data and hook up the +allocations & calculations. + +Note that the node-specific AB/IB coefficients contribute (by design) +to both the node-level and the bus-level aggregation. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20230726-topic-icc_coeff-v4-3-c04b60caa467@linaro.org +Signed-off-by: Georgi Djakov <djakov@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 919791d82d3b] +--- + drivers/interconnect/qcom/icc-rpm.c | 27 +++++++++++++++++++++++++++ + drivers/interconnect/qcom/icc-rpm.h | 4 ++++ + 2 files changed, 31 insertions(+) + +diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c +index 8c1bfd65d774..1d3af4e9ead8 100644 +--- a/drivers/interconnect/qcom/icc-rpm.c ++++ b/drivers/interconnect/qcom/icc-rpm.c +@@ -414,6 +414,33 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) + qp->bus_clk_rate[QCOM_SMD_RPM_SLEEP_STATE] = sleep_rate; + } + ++ /* Handle the node-specific clock */ ++ if (!src_qn->bus_clk_desc) ++ return 0; ++ ++ active_rate = qcom_icc_calc_rate(qp, src_qn, QCOM_SMD_RPM_ACTIVE_STATE); ++ sleep_rate = qcom_icc_calc_rate(qp, src_qn, QCOM_SMD_RPM_SLEEP_STATE); ++ ++ if (active_rate != src_qn->bus_clk_rate[QCOM_SMD_RPM_ACTIVE_STATE]) { ++ ret = qcom_icc_rpm_set_bus_rate(src_qn->bus_clk_desc, QCOM_SMD_RPM_ACTIVE_STATE, ++ active_rate); ++ if (ret) ++ return ret; ++ ++ /* Cache the rate after we've successfully committed it to RPM */ ++ src_qn->bus_clk_rate[QCOM_SMD_RPM_ACTIVE_STATE] = active_rate; ++ } ++ ++ if (sleep_rate != src_qn->bus_clk_rate[QCOM_SMD_RPM_SLEEP_STATE]) { ++ ret = qcom_icc_rpm_set_bus_rate(src_qn->bus_clk_desc, QCOM_SMD_RPM_SLEEP_STATE, ++ sleep_rate); ++ if (ret) ++ return ret; ++ ++ /* Cache the rate after we've successfully committed it to RPM */ ++ src_qn->bus_clk_rate[QCOM_SMD_RPM_SLEEP_STATE] = sleep_rate; ++ } ++ + return 0; + } + +diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h +index 5e7d6a4fd2f3..725e0d4840e4 100644 +--- a/drivers/interconnect/qcom/icc-rpm.h ++++ b/drivers/interconnect/qcom/icc-rpm.h +@@ -97,11 +97,13 @@ struct qcom_icc_qos { + * @num_links: the total number of @links + * @channels: number of channels at this node (e.g. DDR channels) + * @buswidth: width of the interconnect between a node and the bus (bytes) ++ * @bus_clk_desc: a pointer to a rpm_clk_resource description of bus clocks + * @sum_avg: current sum aggregate value of all avg bw requests + * @max_peak: current max aggregate value of all peak bw requests + * @mas_rpm_id: RPM id for devices that are bus masters + * @slv_rpm_id: RPM id for devices that are bus slaves + * @qos: NoC QoS setting parameters ++ * @bus_clk_rate: a pointer to an array containing bus clock rates in Hz + */ + struct qcom_icc_node { + unsigned char *name; +@@ -110,11 +112,13 @@ struct qcom_icc_node { + u16 num_links; + u16 channels; + u16 buswidth; ++ const struct rpm_clk_resource *bus_clk_desc; + u64 sum_avg[QCOM_SMD_RPM_STATE_NUM]; + u64 max_peak[QCOM_SMD_RPM_STATE_NUM]; + int mas_rpm_id; + int slv_rpm_id; + struct qcom_icc_qos qos; ++ u32 bus_clk_rate[QCOM_SMD_RPM_STATE_NUM]; + }; + + struct qcom_icc_desc { +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0004-interconnect-qcom-icc-rpm-Check-for-node-specific-ra.patch b/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0004-interconnect-qcom-icc-rpm-Check-for-node-specific-ra.patch new file mode 100644 index 0000000..faee1be --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0004-interconnect-qcom-icc-rpm-Check-for-node-specific-ra.patch @@ -0,0 +1,82 @@ +From ba3f826639782587b70a684dae79d39f6d3c433e Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Fri, 25 Aug 2023 17:38:26 +0200 +Subject: [PATCH 4/9] interconnect: qcom: icc-rpm: Check for node-specific rate + coefficients + +Some nodes may have different coefficients than the general values for +bus they're attached to. Check for that and use them if present. See +[1], [2] for reference. + +[1] https://github.com/sonyxperiadev/kernel/commit/7456d9779af9ad6bb9c7ee6f33d5c5a8d3648e24 +[2] https://github.com/artem/android_kernel_sony_msm8996/commit/bf7a8985dcaf0eab5bc2562d2d6775e7e29c0f30 +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20230726-topic-icc_coeff-v4-4-c04b60caa467@linaro.org +Signed-off-by: Georgi Djakov <djakov@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git ba3f82663978] +--- + drivers/interconnect/qcom/icc-rpm.c | 14 ++++++++++---- + drivers/interconnect/qcom/icc-rpm.h | 4 ++++ + 2 files changed, 14 insertions(+), 4 deletions(-) + +diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c +index 1d3af4e9ead8..9c40314e03b5 100644 +--- a/drivers/interconnect/qcom/icc-rpm.c ++++ b/drivers/interconnect/qcom/icc-rpm.c +@@ -300,14 +300,14 @@ static u64 qcom_icc_calc_rate(struct qcom_icc_provider *qp, struct qcom_icc_node + else + agg_avg_rate = qn->sum_avg[ctx]; + +- if (qp->ab_coeff) { +- agg_avg_rate = agg_avg_rate * qp->ab_coeff; ++ if (qn->ab_coeff) { ++ agg_avg_rate = agg_avg_rate * qn->ab_coeff; + agg_avg_rate = div_u64(agg_avg_rate, 100); + } + +- if (qp->ib_coeff) { ++ if (qn->ib_coeff) { + agg_peak_rate = qn->max_peak[ctx] * 100; +- agg_peak_rate = div_u64(qn->max_peak[ctx], qp->ib_coeff); ++ agg_peak_rate = div_u64(qn->max_peak[ctx], qn->ib_coeff); + } else { + agg_peak_rate = qn->max_peak[ctx]; + } +@@ -563,6 +563,12 @@ int qnoc_probe(struct platform_device *pdev) + for (i = 0; i < num_nodes; i++) { + size_t j; + ++ if (!qnodes[i]->ab_coeff) ++ qnodes[i]->ab_coeff = qp->ab_coeff; ++ ++ if (!qnodes[i]->ib_coeff) ++ qnodes[i]->ib_coeff = qp->ib_coeff; ++ + node = icc_node_create(qnodes[i]->id); + if (IS_ERR(node)) { + ret = PTR_ERR(node); +diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h +index 725e0d4840e4..4abf99ce2690 100644 +--- a/drivers/interconnect/qcom/icc-rpm.h ++++ b/drivers/interconnect/qcom/icc-rpm.h +@@ -103,6 +103,8 @@ struct qcom_icc_qos { + * @mas_rpm_id: RPM id for devices that are bus masters + * @slv_rpm_id: RPM id for devices that are bus slaves + * @qos: NoC QoS setting parameters ++ * @ab_coeff: a percentage-based coefficient for compensating the AB calculations ++ * @ib_coeff: an inverse-percentage-based coefficient for compensating the IB calculations + * @bus_clk_rate: a pointer to an array containing bus clock rates in Hz + */ + struct qcom_icc_node { +@@ -118,6 +120,8 @@ struct qcom_icc_node { + int mas_rpm_id; + int slv_rpm_id; + struct qcom_icc_qos qos; ++ u16 ab_coeff; ++ u16 ib_coeff; + u32 bus_clk_rate[QCOM_SMD_RPM_STATE_NUM]; + }; + +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0005-interconnect-qcom-qcm2290-Hook-up-MAS_APPS_PROC-s-bu.patch b/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0005-interconnect-qcom-qcm2290-Hook-up-MAS_APPS_PROC-s-bu.patch new file mode 100644 index 0000000..4a0bbb4 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0005-interconnect-qcom-qcm2290-Hook-up-MAS_APPS_PROC-s-bu.patch @@ -0,0 +1,69 @@ +From fa35757ae0a5a88bd1b7df8578ee9dac9d147c64 Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Fri, 25 Aug 2023 17:38:27 +0200 +Subject: [PATCH 5/9] interconnect: qcom: qcm2290: Hook up MAS_APPS_PROC's bus + clock + +This single node has its own clock which seems to be responsible for +transactions between CPUSS (CPU + some stuff) and the GNOC. See [1] +for reference. + +Define it and hook it up. + +[1] https://android.googlesource.com/kernel/msm-extra/devicetree/+/02f8c342b23c20a5cf967df649814be37a08227c%5E%21/#F0 +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20230726-topic-icc_coeff-v4-5-c04b60caa467@linaro.org +Signed-off-by: Georgi Djakov <djakov@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git fa35757ae0a5] +--- + drivers/interconnect/qcom/icc-rpm-clocks.c | 6 ++++++ + drivers/interconnect/qcom/icc-rpm.h | 1 + + drivers/interconnect/qcom/qcm2290.c | 3 +++ + 3 files changed, 10 insertions(+) + +diff --git a/drivers/interconnect/qcom/icc-rpm-clocks.c b/drivers/interconnect/qcom/icc-rpm-clocks.c +index 63c82a91bbc7..ac1677de7dfd 100644 +--- a/drivers/interconnect/qcom/icc-rpm-clocks.c ++++ b/drivers/interconnect/qcom/icc-rpm-clocks.c +@@ -25,6 +25,12 @@ const struct rpm_clk_resource bimc_clk = { + }; + EXPORT_SYMBOL_GPL(bimc_clk); + ++const struct rpm_clk_resource mem_1_clk = { ++ .resource_type = QCOM_SMD_RPM_MEM_CLK, ++ .clock_id = 1, ++}; ++EXPORT_SYMBOL_GPL(mem_1_clk); ++ + const struct rpm_clk_resource bus_0_clk = { + .resource_type = QCOM_SMD_RPM_BUS_CLK, + .clock_id = 0, +diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h +index 4abf99ce2690..a13768cfd231 100644 +--- a/drivers/interconnect/qcom/icc-rpm.h ++++ b/drivers/interconnect/qcom/icc-rpm.h +@@ -152,6 +152,7 @@ extern const struct rpm_clk_resource bimc_clk; + extern const struct rpm_clk_resource bus_0_clk; + extern const struct rpm_clk_resource bus_1_clk; + extern const struct rpm_clk_resource bus_2_clk; ++extern const struct rpm_clk_resource mem_1_clk; + extern const struct rpm_clk_resource mmaxi_0_clk; + extern const struct rpm_clk_resource mmaxi_1_clk; + extern const struct rpm_clk_resource qup_clk; +diff --git a/drivers/interconnect/qcom/qcm2290.c b/drivers/interconnect/qcom/qcm2290.c +index 5bc4b7516608..026e4c82d6d4 100644 +--- a/drivers/interconnect/qcom/qcm2290.c ++++ b/drivers/interconnect/qcom/qcm2290.c +@@ -112,6 +112,9 @@ static struct qcom_icc_node mas_appss_proc = { + .qos.qos_mode = NOC_QOS_MODE_FIXED, + .qos.prio_level = 0, + .qos.areq_prio = 0, ++ .bus_clk_desc = &mem_1_clk, ++ .ab_coeff = 159, ++ .ib_coeff = 96, + .mas_rpm_id = 0, + .slv_rpm_id = -1, + .num_links = ARRAY_SIZE(mas_appss_proc_links), +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0006-interconnect-qcom-qcm2290-Set-AB-coefficients.patch b/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0006-interconnect-qcom-qcm2290-Set-AB-coefficients.patch new file mode 100644 index 0000000..3062f49 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0006-interconnect-qcom-qcm2290-Set-AB-coefficients.patch @@ -0,0 +1,47 @@ +From 8657ed471196f4dc8e7917453a39363e0014840c Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Fri, 25 Aug 2023 17:38:28 +0200 +Subject: [PATCH 6/9] interconnect: qcom: qcm2290: Set AB coefficients + +Some buses need additional manual adjustments atop the usual +calculations. Fill in the missing coefficients. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20230726-topic-icc_coeff-v4-6-c04b60caa467@linaro.org +Signed-off-by: Georgi Djakov <djakov@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 8657ed471196] +--- + drivers/interconnect/qcom/qcm2290.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/interconnect/qcom/qcm2290.c b/drivers/interconnect/qcom/qcm2290.c +index 026e4c82d6d4..7abc0c449220 100644 +--- a/drivers/interconnect/qcom/qcm2290.c ++++ b/drivers/interconnect/qcom/qcm2290.c +@@ -1202,6 +1202,7 @@ static const struct qcom_icc_desc qcm2290_bimc = { + .keep_alive = true, + /* M_REG_BASE() in vendor msm_bus_bimc_adhoc driver */ + .qos_offset = 0x8000, ++ .ab_coeff = 153, + }; + + static struct qcom_icc_node * const qcm2290_cnoc_nodes[] = { +@@ -1332,6 +1333,7 @@ static const struct qcom_icc_desc qcm2290_mmnrt_virt = { + .regmap_cfg = &qcm2290_snoc_regmap_config, + .keep_alive = true, + .qos_offset = 0x15000, ++ .ab_coeff = 142, + }; + + static struct qcom_icc_node * const qcm2290_mmrt_virt_nodes[] = { +@@ -1348,6 +1350,7 @@ static const struct qcom_icc_desc qcm2290_mmrt_virt = { + .regmap_cfg = &qcm2290_snoc_regmap_config, + .keep_alive = true, + .qos_offset = 0x15000, ++ .ab_coeff = 139, + }; + + static const struct of_device_id qcm2290_noc_of_match[] = { +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0007-interconnect-qcom-qcm2290-Update-EBI-channel-configu.patch b/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0007-interconnect-qcom-qcm2290-Update-EBI-channel-configu.patch new file mode 100644 index 0000000..c6960d8 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0007-interconnect-qcom-qcm2290-Update-EBI-channel-configu.patch @@ -0,0 +1,43 @@ +From 550064a85ba564cfb508a995f45e39a6ad0e26ed Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Fri, 25 Aug 2023 17:38:29 +0200 +Subject: [PATCH 7/9] interconnect: qcom: qcm2290: Update EBI channel + configuration + +QCM2290 can support two memory configurations: single-channel, 32-bit +wide LPDDR3 @ up to 933MHz (bus clock) or dual-channel, 16-bit wide +LPDDR4X @ up to 1804 MHz. The interconnect driver in its current form +seems to gravitate towards the first one, however there are no LPDDR3- +equipped boards upstream and we still don't have a great way to discern +the DDR generations on the kernel side. + +To make DDR scaling possible on the only currently-supported 2290 +board, stick with the LPDDR4X config by default. The side effect on any +potential LPDDR3 board would be that the requested bus clock rate is +too high (but still capped to the firmware-configured FMAX). + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20230726-topic-icc_coeff-v4-7-c04b60caa467@linaro.org +Signed-off-by: Georgi Djakov <djakov@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 550064a85ba5] +--- + drivers/interconnect/qcom/qcm2290.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/interconnect/qcom/qcm2290.c b/drivers/interconnect/qcom/qcm2290.c +index 7abc0c449220..b88cf9a022e0 100644 +--- a/drivers/interconnect/qcom/qcm2290.c ++++ b/drivers/interconnect/qcom/qcm2290.c +@@ -678,7 +678,8 @@ static struct qcom_icc_node mas_gfx3d = { + static struct qcom_icc_node slv_ebi1 = { + .name = "slv_ebi1", + .id = QCM2290_SLAVE_EBI1, +- .buswidth = 8, ++ .buswidth = 4, ++ .channels = 2, + .mas_rpm_id = -1, + .slv_rpm_id = 0, + }; +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0008-interconnect-qcom-sdm660-Set-AB-IB-coefficients.patch b/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0008-interconnect-qcom-sdm660-Set-AB-IB-coefficients.patch new file mode 100644 index 0000000..af67d8c --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0008-interconnect-qcom-sdm660-Set-AB-IB-coefficients.patch @@ -0,0 +1,55 @@ +From a4a9251760185af9ca7ff1592a05a0eabfe0cd00 Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Fri, 25 Aug 2023 17:38:30 +0200 +Subject: [PATCH 8/9] interconnect: qcom: sdm660: Set AB/IB coefficients + +Some buses and nodes need additional manual adjustments atop the usual +calculations. Fill in the missing coefficients. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20230726-topic-icc_coeff-v4-8-c04b60caa467@linaro.org +Signed-off-by: Georgi Djakov <djakov@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git a4a925176018] +--- + drivers/interconnect/qcom/sdm660.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/interconnect/qcom/sdm660.c b/drivers/interconnect/qcom/sdm660.c +index 36962f7bd7bb..7392bebba334 100644 +--- a/drivers/interconnect/qcom/sdm660.c ++++ b/drivers/interconnect/qcom/sdm660.c +@@ -602,6 +602,7 @@ static struct qcom_icc_node mas_mdp_p0 = { + .name = "mas_mdp_p0", + .id = SDM660_MASTER_MDP_P0, + .buswidth = 16, ++ .ib_coeff = 50, + .mas_rpm_id = 8, + .slv_rpm_id = -1, + .qos.ap_owned = true, +@@ -621,6 +622,7 @@ static struct qcom_icc_node mas_mdp_p1 = { + .name = "mas_mdp_p1", + .id = SDM660_MASTER_MDP_P1, + .buswidth = 16, ++ .ib_coeff = 50, + .mas_rpm_id = 61, + .slv_rpm_id = -1, + .qos.ap_owned = true, +@@ -1540,6 +1542,7 @@ static const struct qcom_icc_desc sdm660_bimc = { + .num_nodes = ARRAY_SIZE(sdm660_bimc_nodes), + .bus_clk_desc = &bimc_clk, + .regmap_cfg = &sdm660_bimc_regmap_config, ++ .ab_coeff = 153, + }; + + static struct qcom_icc_node * const sdm660_cnoc_nodes[] = { +@@ -1659,6 +1662,7 @@ static const struct qcom_icc_desc sdm660_mnoc = { + .intf_clocks = mm_intf_clocks, + .num_intf_clocks = ARRAY_SIZE(mm_intf_clocks), + .regmap_cfg = &sdm660_mnoc_regmap_config, ++ .ab_coeff = 153, + }; + + static struct qcom_icc_node * const sdm660_snoc_nodes[] = { +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0009-interconnect-qcom-msm8996-Set-AB-IB-coefficients.patch b/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0009-interconnect-qcom-msm8996-Set-AB-IB-coefficients.patch new file mode 100644 index 0000000..ff49eb0 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/generic-drivers/icc/0009-interconnect-qcom-msm8996-Set-AB-IB-coefficients.patch @@ -0,0 +1,59 @@ +From 1255f23c219a74f2577c9ca5521abeb36db35d3b Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Fri, 25 Aug 2023 17:38:31 +0200 +Subject: [PATCH 9/9] interconnect: qcom: msm8996: Set AB/IB coefficients + +Some buses and nodes need additional manual adjustments atop the usual +calculations. Fill in the missing coefficients. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20230726-topic-icc_coeff-v4-9-c04b60caa467@linaro.org +Signed-off-by: Georgi Djakov <djakov@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 1255f23c219a] +--- + drivers/interconnect/qcom/msm8996.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c +index 88683dfa468f..b73566c9b21f 100644 +--- a/drivers/interconnect/qcom/msm8996.c ++++ b/drivers/interconnect/qcom/msm8996.c +@@ -448,6 +448,7 @@ static struct qcom_icc_node mas_mdp_p0 = { + .name = "mas_mdp_p0", + .id = MSM8996_MASTER_MDP_PORT0, + .buswidth = 32, ++ .ib_coeff = 25, + .mas_rpm_id = 8, + .slv_rpm_id = -1, + .qos.ap_owned = true, +@@ -463,6 +464,7 @@ static struct qcom_icc_node mas_mdp_p1 = { + .name = "mas_mdp_p1", + .id = MSM8996_MASTER_MDP_PORT1, + .buswidth = 32, ++ .ib_coeff = 25, + .mas_rpm_id = 61, + .slv_rpm_id = -1, + .qos.ap_owned = true, +@@ -1889,7 +1891,8 @@ static const struct qcom_icc_desc msm8996_bimc = { + .nodes = bimc_nodes, + .num_nodes = ARRAY_SIZE(bimc_nodes), + .bus_clk_desc = &bimc_clk, +- .regmap_cfg = &msm8996_bimc_regmap_config ++ .regmap_cfg = &msm8996_bimc_regmap_config, ++ .ab_coeff = 154, + }; + + static struct qcom_icc_node * const cnoc_nodes[] = { +@@ -2004,7 +2007,8 @@ static const struct qcom_icc_desc msm8996_mnoc = { + .bus_clk_desc = &mmaxi_0_clk, + .intf_clocks = mm_intf_clocks, + .num_intf_clocks = ARRAY_SIZE(mm_intf_clocks), +- .regmap_cfg = &msm8996_mnoc_regmap_config ++ .regmap_cfg = &msm8996_mnoc_regmap_config, ++ .ab_coeff = 154, + }; + + static struct qcom_icc_node * const pnoc_nodes[] = { +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/generic-drivers/mdss-icc/0001_drm_msm_mdss_switch_mdss_to_use_devm_of_icc_get.patch b/recipes-kernel/linux/linux-yocto/generic-drivers/mdss-icc/0001_drm_msm_mdss_switch_mdss_to_use_devm_of_icc_get.patch new file mode 100644 index 0000000..0620692 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/generic-drivers/mdss-icc/0001_drm_msm_mdss_switch_mdss_to_use_devm_of_icc_get.patch @@ -0,0 +1,64 @@ +From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Subject: drm/msm/mdss: switch mdss to use devm_of_icc_get() +Date: Sun, 03 Dec 2023 01:42:44 +0300 + +Stop using hand-written reset function for ICC release, use +devm_of_icc_get() instead. + +Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Backport [https://gitlab.freedesktop.org/lumag/msm/-/commit/ded61d7dc5a0] +--- + drivers/gpu/drm/msm/msm_mdss.c | 16 ++-------------- + 1 file changed, 2 insertions(+), 14 deletions(-) + +diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c +index 29bb38f0bb2c..53bc496ace99 100644 +--- a/drivers/gpu/drm/msm/msm_mdss.c ++++ b/drivers/gpu/drm/msm/msm_mdss.c +@@ -50,14 +50,14 @@ static int msm_mdss_parse_data_bus_icc_path(struct device *dev, + struct icc_path *path0; + struct icc_path *path1; + +- path0 = of_icc_get(dev, "mdp0-mem"); ++ path0 = devm_of_icc_get(dev, "mdp0-mem"); + if (IS_ERR_OR_NULL(path0)) + return PTR_ERR_OR_ZERO(path0); + + msm_mdss->path[0] = path0; + msm_mdss->num_paths = 1; + +- path1 = of_icc_get(dev, "mdp1-mem"); ++ path1 = devm_of_icc_get(dev, "mdp1-mem"); + if (!IS_ERR_OR_NULL(path1)) { + msm_mdss->path[1] = path1; + msm_mdss->num_paths++; +@@ -66,15 +66,6 @@ static int msm_mdss_parse_data_bus_icc_path(struct device *dev, + return 0; + } + +-static void msm_mdss_put_icc_path(void *data) +-{ +- struct msm_mdss *msm_mdss = data; +- int i; +- +- for (i = 0; i < msm_mdss->num_paths; i++) +- icc_put(msm_mdss->path[i]); +-} +- + static void msm_mdss_icc_request_bw(struct msm_mdss *msm_mdss, unsigned long bw) + { + int i; +@@ -391,9 +382,6 @@ static struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5 + dev_dbg(&pdev->dev, "mapped mdss address space @%pK\n", msm_mdss->mmio); + + ret = msm_mdss_parse_data_bus_icc_path(&pdev->dev, msm_mdss); +- if (ret) +- return ERR_PTR(ret); +- ret = devm_add_action_or_reset(&pdev->dev, msm_mdss_put_icc_path, msm_mdss); + if (ret) + return ERR_PTR(ret); + +-- +2.39.2 diff --git a/recipes-kernel/linux/linux-yocto/generic-drivers/mdss-icc/0002_drm_msm_mdss_rename_path_references_to_mdp_path.patch b/recipes-kernel/linux/linux-yocto/generic-drivers/mdss-icc/0002_drm_msm_mdss_rename_path_references_to_mdp_path.patch new file mode 100644 index 0000000..6416729 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/generic-drivers/mdss-icc/0002_drm_msm_mdss_rename_path_references_to_mdp_path.patch @@ -0,0 +1,66 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: drm/msm/mdss: Rename path references to mdp_path +Date: Sun, 03 Dec 2023 01:42:45 +0300 + +The DPU1 driver needs to handle all MDPn<->DDR paths, as well as +CPU<->SLAVE_DISPLAY_CFG. The former ones share how their values are +calculated, but the latter one has static predefines spanning all SoCs. + +In preparation for supporting the CPU<->SLAVE_DISPLAY_CFG path, rename +the path-related struct members to include "mdp_". + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Backport [https://gitlab.freedesktop.org/lumag/msm/-/commit/fabaf176322d] +--- + drivers/gpu/drm/msm/msm_mdss.c | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c +index 53bc496ace99..e1b208fd072e 100644 +--- a/drivers/gpu/drm/msm/msm_mdss.c ++++ b/drivers/gpu/drm/msm/msm_mdss.c +@@ -40,8 +40,8 @@ struct msm_mdss { + struct irq_domain *domain; + } irq_controller; + const struct msm_mdss_data *mdss_data; +- struct icc_path *path[2]; +- u32 num_paths; ++ struct icc_path *mdp_path[2]; ++ u32 num_mdp_paths; + }; + + static int msm_mdss_parse_data_bus_icc_path(struct device *dev, +@@ -54,13 +54,13 @@ static int msm_mdss_parse_data_bus_icc_path(struct device *dev, + if (IS_ERR_OR_NULL(path0)) + return PTR_ERR_OR_ZERO(path0); + +- msm_mdss->path[0] = path0; +- msm_mdss->num_paths = 1; ++ msm_mdss->mdp_path[0] = path0; ++ msm_mdss->num_mdp_paths = 1; + + path1 = devm_of_icc_get(dev, "mdp1-mem"); + if (!IS_ERR_OR_NULL(path1)) { +- msm_mdss->path[1] = path1; +- msm_mdss->num_paths++; ++ msm_mdss->mdp_path[1] = path1; ++ msm_mdss->num_mdp_paths++; + } + + return 0; +@@ -70,8 +70,8 @@ static void msm_mdss_icc_request_bw(struct msm_mdss *msm_mdss, unsigned long bw) + { + int i; + +- for (i = 0; i < msm_mdss->num_paths; i++) +- icc_set_bw(msm_mdss->path[i], 0, Bps_to_icc(bw)); ++ for (i = 0; i < msm_mdss->num_mdp_paths; i++) ++ icc_set_bw(msm_mdss->mdp_path[i], 0, Bps_to_icc(bw)); + } + + static void msm_mdss_irq(struct irq_desc *desc) +-- +2.39.2 diff --git a/recipes-kernel/linux/linux-yocto/generic-drivers/mdss-icc/0002_dt_bindings_display_msm_add_reg_bus_and_rotator_interconnects.patch b/recipes-kernel/linux/linux-yocto/generic-drivers/mdss-icc/0002_dt_bindings_display_msm_add_reg_bus_and_rotator_interconnects.patch new file mode 100644 index 0000000..f2822ae --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/generic-drivers/mdss-icc/0002_dt_bindings_display_msm_add_reg_bus_and_rotator_interconnects.patch @@ -0,0 +1,287 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: dt-bindings: display: msm: Add reg bus and rotator interconnects +Date: Wed, 29 Nov 2023 15:43:59 +0100 + +Apart from the already handled data bus (MAS_MDP_Pn<->DDR), there are +other connection paths: +- a path that connects rotator block to the DDR. +- a path that needs to be handled to ensure MDSS register access + functions properly, namely the "reg bus", a.k.a the CPU-MDSS CFG + interconnect. + +Describe these paths to allow using them in device trees and in the +driver. + +Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Backport [https://gitlab.freedesktop.org/lumag/msm/-/commit/a1ed5860efd3] +--- + .../devicetree/bindings/display/msm/mdss-common.yaml | 18 ++++++++++++++---- + .../bindings/display/msm/qcom,qcm2290-mdss.yaml | 14 ++++++++++---- + .../bindings/display/msm/qcom,sc7180-mdss.yaml | 14 ++++++++++---- + .../bindings/display/msm/qcom,sc7280-mdss.yaml | 14 ++++++++++---- + .../bindings/display/msm/qcom,sm6115-mdss.yaml | 10 ++++++++++ + .../bindings/display/msm/qcom,sm6125-mdss.yaml | 8 ++++++-- + .../bindings/display/msm/qcom,sm6350-mdss.yaml | 8 ++++++-- + .../bindings/display/msm/qcom,sm6375-mdss.yaml | 8 ++++++-- + .../bindings/display/msm/qcom,sm8450-mdss.yaml | 13 ++++++++----- + 9 files changed, 80 insertions(+), 27 deletions(-) + +diff --git a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml +index f69196e4cc76..c6305a6e0334 100644 +--- a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml ++++ b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml +@@ -61,17 +61,27 @@ properties: + + ranges: true + ++ # This is not a perfect description, but it's impossible to discern and match ++ # the entries like we do with interconnect-names + interconnects: + minItems: 1 + items: + - description: Interconnect path from mdp0 (or a single mdp) port to the data bus + - description: Interconnect path from mdp1 port to the data bus ++ - description: Interconnect path from CPU to the reg bus + + interconnect-names: +- minItems: 1 +- items: +- - const: mdp0-mem +- - const: mdp1-mem ++ oneOf: ++ - minItems: 1 ++ items: ++ - const: mdp0-mem ++ - const: cpu-cfg ++ ++ - minItems: 2 ++ items: ++ - const: mdp0-mem ++ - const: mdp1-mem ++ - const: cpu-cfg + + resets: + items: +diff --git a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml +index d71a8e09a798..f0cdb5422688 100644 +--- a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml ++++ b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml +@@ -36,10 +36,14 @@ properties: + maxItems: 2 + + interconnects: +- maxItems: 1 ++ items: ++ - description: Interconnect path from mdp0 port to the data bus ++ - description: Interconnect path from CPU to the reg bus + + interconnect-names: +- maxItems: 1 ++ items: ++ - const: mdp0-mem ++ - const: cpu-cfg + + patternProperties: + "^display-controller@[0-9a-f]+$": +@@ -98,8 +102,10 @@ examples: + interrupt-controller; + #interrupt-cells = <1>; + +- interconnects = <&mmrt_virt MASTER_MDP0 &bimc SLAVE_EBI1>; +- interconnect-names = "mdp0-mem"; ++ interconnects = <&mmrt_virt MASTER_MDP0 &bimc SLAVE_EBI1>, ++ <&bimc MASTER_APPSS_PROC &config_noc SLAVE_DISPLAY_CFG>; ++ interconnect-names = "mdp0-mem", ++ "cpu-cfg"; + + iommus = <&apps_smmu 0x420 0x2>, + <&apps_smmu 0x421 0x0>; +diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml +index 3432a2407caa..7a0555b15ddf 100644 +--- a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml ++++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml +@@ -36,10 +36,14 @@ properties: + maxItems: 1 + + interconnects: +- maxItems: 1 ++ items: ++ - description: Interconnect path from mdp0 port to the data bus ++ - description: Interconnect path from CPU to the reg bus + + interconnect-names: +- maxItems: 1 ++ items: ++ - const: mdp0-mem ++ - const: cpu-cfg + + patternProperties: + "^display-controller@[0-9a-f]+$": +@@ -106,8 +110,10 @@ examples: + interrupt-controller; + #interrupt-cells = <1>; + +- interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>; +- interconnect-names = "mdp0-mem"; ++ interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>, ++ <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_DISPLAY_CFG>; ++ interconnect-names = "mdp0-mem", ++ "cpu-cfg"; + + iommus = <&apps_smmu 0x800 0x2>; + ranges; +diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml +index bbb727831fca..2947f27e0585 100644 +--- a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml ++++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml +@@ -36,10 +36,14 @@ properties: + maxItems: 1 + + interconnects: +- maxItems: 1 ++ items: ++ - description: Interconnect path from mdp0 port to the data bus ++ - description: Interconnect path from CPU to the reg bus + + interconnect-names: +- maxItems: 1 ++ items: ++ - const: mdp0-mem ++ - const: cpu-cfg + + patternProperties: + "^display-controller@[0-9a-f]+$": +@@ -118,8 +122,10 @@ examples: + interrupt-controller; + #interrupt-cells = <1>; + +- interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>; +- interconnect-names = "mdp0-mem"; ++ interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>, ++ <&gem_noc MASTER_APPSS_PROC &cnoc2 SLAVE_DISPLAY_CFG>; ++ interconnect-names = "mdp0-mem", ++ "cpu-cfg"; + + iommus = <&apps_smmu 0x900 0x402>; + ranges; +diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml +index dde5c2acead5..309de1953c88 100644 +--- a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml ++++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml +@@ -29,6 +29,16 @@ properties: + iommus: + maxItems: 2 + ++ interconnects: ++ items: ++ - description: Interconnect path from mdp0 port to the data bus ++ - description: Interconnect path from CPU to the reg bus ++ ++ interconnect-names: ++ items: ++ - const: mdp0-mem ++ - const: cpu-cfg ++ + patternProperties: + "^display-controller@[0-9a-f]+$": + type: object +diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6125-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6125-mdss.yaml +index 671c2c2aa896..3deb9dc81c9c 100644 +--- a/Documentation/devicetree/bindings/display/msm/qcom,sm6125-mdss.yaml ++++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6125-mdss.yaml +@@ -35,10 +35,14 @@ properties: + maxItems: 1 + + interconnects: +- maxItems: 2 ++ items: ++ - description: Interconnect path from mdp0 port to the data bus ++ - description: Interconnect path from CPU to the reg bus + + interconnect-names: +- maxItems: 2 ++ items: ++ - const: mdp0-mem ++ - const: cpu-cfg + + patternProperties: + "^display-controller@[0-9a-f]+$": +diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml +index e1dcb453762e..c9ba1fae8042 100644 +--- a/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml ++++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml +@@ -35,10 +35,14 @@ properties: + maxItems: 1 + + interconnects: +- maxItems: 2 ++ items: ++ - description: Interconnect path from mdp0 port to the data bus ++ - description: Interconnect path from CPU to the reg bus + + interconnect-names: +- maxItems: 2 ++ items: ++ - const: mdp0-mem ++ - const: cpu-cfg + + patternProperties: + "^display-controller@[0-9a-f]+$": +diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml +index b15c3950f09d..8e8a288d318c 100644 +--- a/Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml ++++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml +@@ -35,10 +35,14 @@ properties: + maxItems: 1 + + interconnects: +- maxItems: 2 ++ items: ++ - description: Interconnect path from mdp0 port to the data bus ++ - description: Interconnect path from CPU to the reg bus + + interconnect-names: +- maxItems: 2 ++ items: ++ - const: mdp0-mem ++ - const: cpu-cfg + + patternProperties: + "^display-controller@[0-9a-f]+$": +diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml +index 001b26e65301..747a2e9665f4 100644 +--- a/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml ++++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml +@@ -30,10 +30,10 @@ properties: + maxItems: 1 + + interconnects: +- maxItems: 2 ++ maxItems: 3 + + interconnect-names: +- maxItems: 2 ++ maxItems: 3 + + patternProperties: + "^display-controller@[0-9a-f]+$": +@@ -91,9 +91,12 @@ examples: + reg = <0x0ae00000 0x1000>; + reg-names = "mdss"; + +- interconnects = <&mmss_noc MASTER_MDP_DISP 0 &mc_virt SLAVE_EBI1_DISP 0>, +- <&mmss_noc MASTER_MDP_DISP 0 &mc_virt SLAVE_EBI1_DISP 0>; +- interconnect-names = "mdp0-mem", "mdp1-mem"; ++ interconnects = <&mmss_noc MASTER_MDP_DISP &mc_virt SLAVE_EBI1_DISP>, ++ <&mmss_noc MASTER_MDP_DISP &mc_virt SLAVE_EBI1_DISP>, ++ <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_DISPLAY_CFG>; ++ interconnect-names = "mdp0-mem", ++ "mdp1-mem", ++ "cpu-cfg"; + + resets = <&dispcc DISP_CC_MDSS_CORE_BCR>; + +-- +2.43.0 diff --git a/recipes-kernel/linux/linux-yocto/generic-drivers/mdss-icc/0003_drm_msm_mdss_inline_msm_mdss_icc_request_bw.patch b/recipes-kernel/linux/linux-yocto/generic-drivers/mdss-icc/0003_drm_msm_mdss_inline_msm_mdss_icc_request_bw.patch new file mode 100644 index 0000000..5e430b1 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/generic-drivers/mdss-icc/0003_drm_msm_mdss_inline_msm_mdss_icc_request_bw.patch @@ -0,0 +1,69 @@ +From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Subject: drm/msm/mdss: inline msm_mdss_icc_request_bw() +Date: Sun, 03 Dec 2023 01:42:46 +0300 + +There are just two places where we set the bandwidth: in the resume and +in the suspend paths. Drop the wrapping function +msm_mdss_icc_request_bw() and call icc_set_bw() directly. + +Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Backport [https://gitlab.freedesktop.org/lumag/msm/-/commit/7323694e118a] +--- + drivers/gpu/drm/msm/msm_mdss.c | 19 ++++++++----------- + 1 file changed, 8 insertions(+), 11 deletions(-) + +diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c +index e1b208fd072e..eeca281e9d6d 100644 +--- a/drivers/gpu/drm/msm/msm_mdss.c ++++ b/drivers/gpu/drm/msm/msm_mdss.c +@@ -66,14 +66,6 @@ static int msm_mdss_parse_data_bus_icc_path(struct device *dev, + return 0; + } + +-static void msm_mdss_icc_request_bw(struct msm_mdss *msm_mdss, unsigned long bw) +-{ +- int i; +- +- for (i = 0; i < msm_mdss->num_mdp_paths; i++) +- icc_set_bw(msm_mdss->mdp_path[i], 0, Bps_to_icc(bw)); +-} +- + static void msm_mdss_irq(struct irq_desc *desc) + { + struct msm_mdss *msm_mdss = irq_desc_get_handler_data(desc); +@@ -227,14 +219,15 @@ const struct msm_mdss_data *msm_mdss_get_mdss_data(struct device *dev) + + static int msm_mdss_enable(struct msm_mdss *msm_mdss) + { +- int ret; ++ int ret, i; + + /* + * Several components have AXI clocks that can only be turned on if + * the interconnect is enabled (non-zero bandwidth). Let's make sure + * that the interconnects are at least at a minimum amount. + */ +- msm_mdss_icc_request_bw(msm_mdss, MIN_IB_BW); ++ for (i = 0; i < msm_mdss->num_mdp_paths; i++) ++ icc_set_bw(msm_mdss->mdp_path[i], 0, Bps_to_icc(MIN_IB_BW)); + + ret = clk_bulk_prepare_enable(msm_mdss->num_clocks, msm_mdss->clocks); + if (ret) { +@@ -286,8 +279,12 @@ static int msm_mdss_enable(struct msm_mdss *msm_mdss) + + static int msm_mdss_disable(struct msm_mdss *msm_mdss) + { ++ int i; ++ + clk_bulk_disable_unprepare(msm_mdss->num_clocks, msm_mdss->clocks); +- msm_mdss_icc_request_bw(msm_mdss, 0); ++ ++ for (i = 0; i < msm_mdss->num_mdp_paths; i++) ++ icc_set_bw(msm_mdss->mdp_path[i], 0, 0); + + return 0; + } +-- +2.39.2 diff --git a/recipes-kernel/linux/linux-yocto/generic-drivers/mdss-icc/0004_drm_msm_mdss_handle_the_reg_bus_icc_path.patch b/recipes-kernel/linux/linux-yocto/generic-drivers/mdss-icc/0004_drm_msm_mdss_handle_the_reg_bus_icc_path.patch new file mode 100644 index 0000000..87a4b37 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/generic-drivers/mdss-icc/0004_drm_msm_mdss_handle_the_reg_bus_icc_path.patch @@ -0,0 +1,238 @@ +From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Subject: drm/msm/mdss: Handle the reg bus ICC path +Date: Sun, 03 Dec 2023 01:42:47 +0300 + +Apart from the already handled data bus (MAS_MDP_Pn<->DDR), there's +another path that needs to be handled to ensure MDSS functions properly, +namely the "reg bus", a.k.a the CPU-MDSS interconnect. + +Gating that path may have a variety of effects, from none to otherwise +inexplicable DSI timeouts. + +Provide a way for MDSS driver to vote on this bus. + +A note regarding vote values. Newer platforms have corresponding +bandwidth values in the vendor DT files. For the older platforms there +was a static vote in the mdss_mdp and rotator drivers. I choose to be +conservative here and choose this value as a default. + +Co-developed-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Backport [https://gitlab.freedesktop.org/lumag/msm/-/commit/a55c8ff252d3] +--- + drivers/gpu/drm/msm/msm_mdss.c | 49 +++++++++++++++++++++++++++++++--- + drivers/gpu/drm/msm/msm_mdss.h | 1 + + 2 files changed, 46 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c +index eeca281e9d6d..18b07619d6fc 100644 +--- a/drivers/gpu/drm/msm/msm_mdss.c ++++ b/drivers/gpu/drm/msm/msm_mdss.c +@@ -28,6 +28,8 @@ + + #define MIN_IB_BW 400000000UL /* Min ib vote 400MB */ + ++#define DEFAULT_REG_BW 153600 /* Used in mdss fbdev driver */ ++ + struct msm_mdss { + struct device *dev; + +@@ -42,6 +44,7 @@ struct msm_mdss { + const struct msm_mdss_data *mdss_data; + struct icc_path *mdp_path[2]; + u32 num_mdp_paths; ++ struct icc_path *reg_bus_path; + }; + + static int msm_mdss_parse_data_bus_icc_path(struct device *dev, +@@ -49,6 +52,7 @@ static int msm_mdss_parse_data_bus_icc_path(struct device *dev, + { + struct icc_path *path0; + struct icc_path *path1; ++ struct icc_path *reg_bus_path; + + path0 = devm_of_icc_get(dev, "mdp0-mem"); + if (IS_ERR_OR_NULL(path0)) +@@ -63,6 +67,10 @@ static int msm_mdss_parse_data_bus_icc_path(struct device *dev, + msm_mdss->num_mdp_paths++; + } + ++ reg_bus_path = of_icc_get(dev, "cpu-cfg"); ++ if (!IS_ERR_OR_NULL(reg_bus_path)) ++ msm_mdss->reg_bus_path = reg_bus_path; ++ + return 0; + } + +@@ -229,6 +237,13 @@ static int msm_mdss_enable(struct msm_mdss *msm_mdss) + for (i = 0; i < msm_mdss->num_mdp_paths; i++) + icc_set_bw(msm_mdss->mdp_path[i], 0, Bps_to_icc(MIN_IB_BW)); + ++ if (msm_mdss->mdss_data && msm_mdss->mdss_data->reg_bus_bw) ++ icc_set_bw(msm_mdss->reg_bus_path, 0, ++ msm_mdss->mdss_data->reg_bus_bw); ++ else ++ icc_set_bw(msm_mdss->reg_bus_path, 0, ++ DEFAULT_REG_BW); ++ + ret = clk_bulk_prepare_enable(msm_mdss->num_clocks, msm_mdss->clocks); + if (ret) { + dev_err(msm_mdss->dev, "clock enable failed, ret:%d\n", ret); +@@ -286,6 +301,9 @@ static int msm_mdss_disable(struct msm_mdss *msm_mdss) + for (i = 0; i < msm_mdss->num_mdp_paths; i++) + icc_set_bw(msm_mdss->mdp_path[i], 0, 0); + ++ if (msm_mdss->reg_bus_path) ++ icc_set_bw(msm_mdss->reg_bus_path, 0, 0); ++ + return 0; + } + +@@ -372,6 +390,8 @@ static struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5 + if (!msm_mdss) + return ERR_PTR(-ENOMEM); + ++ msm_mdss->mdss_data = of_device_get_match_data(&pdev->dev); ++ + msm_mdss->mmio = devm_platform_ioremap_resource_byname(pdev, is_mdp5 ? "mdss_phys" : "mdss"); + if (IS_ERR(msm_mdss->mmio)) + return ERR_CAST(msm_mdss->mmio); +@@ -462,8 +482,6 @@ static int mdss_probe(struct platform_device *pdev) + if (IS_ERR(mdss)) + return PTR_ERR(mdss); + +- mdss->mdss_data = of_device_get_match_data(&pdev->dev); +- + platform_set_drvdata(pdev, mdss); + + /* +@@ -495,11 +513,13 @@ static const struct msm_mdss_data msm8998_data = { + .ubwc_enc_version = UBWC_1_0, + .ubwc_dec_version = UBWC_1_0, + .highest_bank_bit = 2, ++ .reg_bus_bw = 76800, + }; + + static const struct msm_mdss_data qcm2290_data = { + /* no UBWC */ + .highest_bank_bit = 0x2, ++ .reg_bus_bw = 76800, + }; + + static const struct msm_mdss_data sc7180_data = { +@@ -507,6 +527,7 @@ static const struct msm_mdss_data sc7180_data = { + .ubwc_dec_version = UBWC_2_0, + .ubwc_static = 0x1e, + .highest_bank_bit = 0x3, ++ .reg_bus_bw = 76800, + }; + + static const struct msm_mdss_data sc7280_data = { +@@ -516,6 +537,7 @@ static const struct msm_mdss_data sc7280_data = { + .ubwc_static = 1, + .highest_bank_bit = 1, + .macrotile_mode = 1, ++ .reg_bus_bw = 74000, + }; + + static const struct msm_mdss_data sc8180x_data = { +@@ -523,6 +545,7 @@ static const struct msm_mdss_data sc8180x_data = { + .ubwc_dec_version = UBWC_3_0, + .highest_bank_bit = 3, + .macrotile_mode = 1, ++ .reg_bus_bw = 76800, + }; + + static const struct msm_mdss_data sc8280xp_data = { +@@ -532,12 +555,14 @@ static const struct msm_mdss_data sc8280xp_data = { + .ubwc_static = 1, + .highest_bank_bit = 3, + .macrotile_mode = 1, ++ .reg_bus_bw = 76800, + }; + + static const struct msm_mdss_data sdm845_data = { + .ubwc_enc_version = UBWC_2_0, + .ubwc_dec_version = UBWC_2_0, + .highest_bank_bit = 2, ++ .reg_bus_bw = 76800, + }; + + static const struct msm_mdss_data sm6350_data = { +@@ -546,12 +571,14 @@ static const struct msm_mdss_data sm6350_data = { + .ubwc_swizzle = 6, + .ubwc_static = 0x1e, + .highest_bank_bit = 1, ++ .reg_bus_bw = 76800, + }; + + static const struct msm_mdss_data sm8150_data = { + .ubwc_enc_version = UBWC_3_0, + .ubwc_dec_version = UBWC_3_0, + .highest_bank_bit = 2, ++ .reg_bus_bw = 76800, + }; + + static const struct msm_mdss_data sm6115_data = { +@@ -560,6 +587,7 @@ static const struct msm_mdss_data sm6115_data = { + .ubwc_swizzle = 7, + .ubwc_static = 0x11f, + .highest_bank_bit = 0x1, ++ .reg_bus_bw = 76800, + }; + + static const struct msm_mdss_data sm6125_data = { +@@ -577,6 +605,18 @@ static const struct msm_mdss_data sm8250_data = { + /* TODO: highest_bank_bit = 2 for LP_DDR4 */ + .highest_bank_bit = 3, + .macrotile_mode = 1, ++ .reg_bus_bw = 76800, ++}; ++ ++static const struct msm_mdss_data sm8350_data = { ++ .ubwc_enc_version = UBWC_4_0, ++ .ubwc_dec_version = UBWC_4_0, ++ .ubwc_swizzle = 6, ++ .ubwc_static = 1, ++ /* TODO: highest_bank_bit = 2 for LP_DDR4 */ ++ .highest_bank_bit = 3, ++ .macrotile_mode = 1, ++ .reg_bus_bw = 74000, + }; + + static const struct msm_mdss_data sm8550_data = { +@@ -587,6 +627,7 @@ static const struct msm_mdss_data sm8550_data = { + /* TODO: highest_bank_bit = 2 for LP_DDR4 */ + .highest_bank_bit = 3, + .macrotile_mode = 1, ++ .reg_bus_bw = 57000, + }; + static const struct of_device_id mdss_dt_match[] = { + { .compatible = "qcom,mdss" }, +@@ -603,8 +644,8 @@ static const struct of_device_id mdss_dt_match[] = { + { .compatible = "qcom,sm6375-mdss", .data = &sm6350_data }, + { .compatible = "qcom,sm8150-mdss", .data = &sm8150_data }, + { .compatible = "qcom,sm8250-mdss", .data = &sm8250_data }, +- { .compatible = "qcom,sm8350-mdss", .data = &sm8250_data }, +- { .compatible = "qcom,sm8450-mdss", .data = &sm8250_data }, ++ { .compatible = "qcom,sm8350-mdss", .data = &sm8350_data }, ++ { .compatible = "qcom,sm8450-mdss", .data = &sm8350_data }, + { .compatible = "qcom,sm8550-mdss", .data = &sm8550_data }, + {} + }; +diff --git a/drivers/gpu/drm/msm/msm_mdss.h b/drivers/gpu/drm/msm/msm_mdss.h +index 02bbab42adbc..3afef4b1786d 100644 +--- a/drivers/gpu/drm/msm/msm_mdss.h ++++ b/drivers/gpu/drm/msm/msm_mdss.h +@@ -14,6 +14,7 @@ struct msm_mdss_data { + u32 ubwc_static; + u32 highest_bank_bit; + u32 macrotile_mode; ++ u32 reg_bus_bw; + }; + + #define UBWC_1_0 0x10000000 +-- +2.39.2 diff --git a/recipes-kernel/linux/linux-yocto/generic-drivers/mpm/0001-dt-bindings-interrupt-controller-mpm-Pass-MSG-RAM-sl.patch b/recipes-kernel/linux/linux-yocto/generic-drivers/mpm/0001-dt-bindings-interrupt-controller-mpm-Pass-MSG-RAM-sl.patch new file mode 100644 index 0000000..4614771 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/generic-drivers/mpm/0001-dt-bindings-interrupt-controller-mpm-Pass-MSG-RAM-sl.patch @@ -0,0 +1,72 @@ +From d974d3afa058b6857c95e860493542807d4a2eec Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Wed, 5 Apr 2023 12:48:34 +0200 +Subject: [PATCH 1/2] dt-bindings: interrupt-controller: mpm: Pass MSG RAM + slice through phandle + +Due to the wild nature of the Qualcomm RPM Message RAM, we can't really +use 'reg' to point to the MPM's slice of Message RAM without cutting into +an already-defined RPM MSG RAM node used for GLINK and SMEM. + +Document passing the register space as a slice of SRAM through the +qcom,rpm-msg-ram property. This also makes 'reg' deprecated. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git d974d3afa058] +--- + .../bindings/interrupt-controller/qcom,mpm.yaml | 12 +++++++++--- + 1 file changed, 9 insertions(+), 3 deletions(-) + +diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml +index 6a206111d4e0..ec957949a440 100644 +--- a/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml ++++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml +@@ -29,6 +29,12 @@ properties: + maxItems: 1 + description: + Specifies the base address and size of vMPM registers in RPM MSG RAM. ++ deprecated: true ++ ++ qcom,rpm-msg-ram: ++ $ref: /schemas/types.yaml#/definitions/phandle ++ description: ++ Phandle to the APSS MPM slice of the RPM Message RAM + + interrupts: + maxItems: 1 +@@ -67,23 +73,22 @@ properties: + + required: + - compatible +- - reg + - interrupts + - mboxes + - interrupt-controller + - '#interrupt-cells' + - qcom,mpm-pin-count + - qcom,mpm-pin-map ++ - qcom,rpm-msg-ram + + additionalProperties: false + + examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> +- mpm: interrupt-controller@45f01b8 { ++ mpm: interrupt-controller { + compatible = "qcom,mpm"; + interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; +- reg = <0x45f01b8 0x1000>; + mboxes = <&apcs_glb 1>; + interrupt-controller; + #interrupt-cells = <2>; +@@ -96,5 +101,6 @@ examples: + <86 183>, + <90 260>, + <91 260>; ++ qcom,rpm-msg-ram = <&apss_mpm>; + #power-domain-cells = <0>; + }; +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/generic-drivers/mpm/0002-irqchip-irq-qcom-mpm-Support-passing-a-slice-of-SRAM.patch b/recipes-kernel/linux/linux-yocto/generic-drivers/mpm/0002-irqchip-irq-qcom-mpm-Support-passing-a-slice-of-SRAM.patch new file mode 100644 index 0000000..bb9a7c3 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/generic-drivers/mpm/0002-irqchip-irq-qcom-mpm-Support-passing-a-slice-of-SRAM.patch @@ -0,0 +1,78 @@ +From 24ac56bf8085adf448b6db9574d9b16ed5cd6c0b Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Wed, 5 Apr 2023 12:48:35 +0200 +Subject: [PATCH 2/2] irqchip: irq-qcom-mpm: Support passing a slice of SRAM as + reg space + +The MPM hardware is accessible to us from the ARM CPUs through a shared +memory region (RPM MSG RAM) that's also concurrently accessed by other +kinds of cores on the system (like modem, ADSP etc.). Modeling this +relation in a (somewhat) sane manner in the device tree basically +requires us to either present the MPM as a child of said memory region +(which makes little sense, as a mapped memory carveout is not a bus), +define nodes which bleed their register spaces into one another, or +passing their slice of the MSG RAM through some kind of a property. + +Go with the third option and add a way to map a region passed through +the "qcom,rpm-msg-ram" property as our register space. + +The current way of using 'reg' is preserved for ABI reasons. + +Acked-by: Shawn Guo <shawn.guo@linaro.org> +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 24ac56bf8085] +--- + drivers/irqchip/irq-qcom-mpm.c | 21 ++++++++++++++++++--- + 1 file changed, 18 insertions(+), 3 deletions(-) + +diff --git a/drivers/irqchip/irq-qcom-mpm.c b/drivers/irqchip/irq-qcom-mpm.c +index 7124565234a5..7115e3056aa5 100644 +--- a/drivers/irqchip/irq-qcom-mpm.c ++++ b/drivers/irqchip/irq-qcom-mpm.c +@@ -14,6 +14,7 @@ + #include <linux/mailbox_client.h> + #include <linux/module.h> + #include <linux/of.h> ++#include <linux/of_address.h> + #include <linux/of_platform.h> + #include <linux/platform_device.h> + #include <linux/pm_domain.h> +@@ -322,8 +323,10 @@ static int qcom_mpm_init(struct device_node *np, struct device_node *parent) + struct device *dev = &pdev->dev; + struct irq_domain *parent_domain; + struct generic_pm_domain *genpd; ++ struct device_node *msgram_np; + struct qcom_mpm_priv *priv; + unsigned int pin_cnt; ++ struct resource res; + int i, irq; + int ret; + +@@ -374,9 +377,21 @@ static int qcom_mpm_init(struct device_node *np, struct device_node *parent) + + raw_spin_lock_init(&priv->lock); + +- priv->base = devm_platform_ioremap_resource(pdev, 0); +- if (IS_ERR(priv->base)) +- return PTR_ERR(priv->base); ++ /* If we have a handle to an RPM message ram partition, use it. */ ++ msgram_np = of_parse_phandle(np, "qcom,rpm-msg-ram", 0); ++ if (msgram_np) { ++ ret = of_address_to_resource(msgram_np, 0, &res); ++ /* Don't use devm_ioremap_resource, as we're accessing a shared region. */ ++ priv->base = devm_ioremap(dev, res.start, resource_size(&res)); ++ of_node_put(msgram_np); ++ if (IS_ERR(priv->base)) ++ return PTR_ERR(priv->base); ++ } else { ++ /* Otherwise, fall back to simple MMIO. */ ++ priv->base = devm_platform_ioremap_resource(pdev, 0); ++ if (IS_ERR(priv->base)) ++ return PTR_ERR(priv->base); ++ } + + for (i = 0; i < priv->reg_stride; i++) { + qcom_mpm_write(priv, MPM_REG_ENABLE, i, 0); +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/qca6390-driver/0001-dt-bindings-mfd-qcom-qca639x-add-binding-for-QCA639x.patch b/recipes-kernel/linux/linux-yocto/qca6390-driver/0001-dt-bindings-mfd-qcom-qca639x-add-binding-for-QCA639x.patch new file mode 100644 index 0000000..a9881f0 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qca6390-driver/0001-dt-bindings-mfd-qcom-qca639x-add-binding-for-QCA639x.patch @@ -0,0 +1,111 @@ +From 3b909d078f454238bb9e8ec454a891765df968f6 Mon Sep 17 00:00:00 2001 +From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Date: Sun, 20 Dec 2020 18:47:57 +0300 +Subject: [PATCH 1/5] dt-bindings: mfd: qcom,qca639x: add binding for QCA639x + defvice + +Qualcomm QCA639x is a family of WiFi + Bluetooth SoCs, with BT part +being controlled through the UART and WiFi being present on PCIe bus. +Both blocks share common power sources. Add binding to describe power +sequencing required to power up this device. + +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Inappropriate +--- + .../devicetree/bindings/mfd/qcom,qca639x.yaml | 84 +++++++++++++++++++ + 1 file changed, 84 insertions(+) + create mode 100644 Documentation/devicetree/bindings/mfd/qcom,qca639x.yaml + +diff --git a/Documentation/devicetree/bindings/mfd/qcom,qca639x.yaml b/Documentation/devicetree/bindings/mfd/qcom,qca639x.yaml +new file mode 100644 +index 000000000000..d43c75da136f +--- /dev/null ++++ b/Documentation/devicetree/bindings/mfd/qcom,qca639x.yaml +@@ -0,0 +1,84 @@ ++# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) ++%YAML 1.2 ++--- ++$id: "http://devicetree.org/schemas/mfd/qcom,qca639x.yaml#" ++$schema: "http://devicetree.org/meta-schemas/core.yaml#" ++ ++title: Qualcomm QCA639x WiFi + Bluetoot SoC bindings ++ ++maintainers: ++ - Andy Gross <agross@kernel.org> ++ - Bjorn Andersson <bjorn.andersson@linaro.org> ++ ++description: | ++ This binding describes thes Qualcomm QCA6390 or QCA6391 power supplies and ++ enablement pins. ++ ++properties: ++ compatible: ++ const: qcom,qca639x ++ ++ '#power-domain-cells': ++ const: 0 ++ ++ pinctrl-0: true ++ pinctrl-1: true ++ ++ pinctrl-names: ++ items: ++ - const: default ++ - const: active ++ ++ vddaon-supply: ++ description: ++ 0.95V always-on LDO power input ++ ++ vddpmu-supply: ++ description: ++ 0.95V LDO power input to PMU ++ ++ vddrfa1-supply: ++ description: ++ 0.95V LDO power input to RFA ++ ++ vddrfa2-supply: ++ description: ++ 1.25V LDO power input to RFA ++ ++ vddrfa3-supply: ++ description: ++ 2V LDO power input to RFA ++ ++ vddpcie1-supply: ++ description: ++ 1.25V LDO power input to PCIe part ++ ++ vddpcie2-supply: ++ description: ++ 2V LDO power input to PCIe part ++ ++ vddio-supply: ++ description: ++ 1.8V VIO input ++ ++additionalProperties: false ++ ++examples: ++ - | ++ qca639x: qca639x { ++ compatible = "qcom,qca639x"; ++ #power-domain-cells = <0>; ++ ++ vddaon-supply = <&vreg_s6a_0p95>; ++ vddpmu-supply = <&vreg_s2f_0p95>; ++ vddrfa1-supply = <&vreg_s2f_0p95>; ++ vddrfa2-supply = <&vreg_s8c_1p3>; ++ vddrfa3-supply = <&vreg_s5a_1p9>; ++ vddpcie1-supply = <&vreg_s8c_1p3>; ++ vddpcie2-supply = <&vreg_s5a_1p9>; ++ vddio-supply = <&vreg_s4a_1p8>; ++ pinctrl-names = "default", "active"; ++ pinctrl-0 = <&wlan_default_state &bt_default_state>; ++ pinctrl-1 = <&wlan_active_state &bt_active_state>; ++ }; ++... +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/qca6390-driver/0002-mfd-qca639x-add-support-for-QCA639x-powerup-sequence.patch b/recipes-kernel/linux/linux-yocto/qca6390-driver/0002-mfd-qca639x-add-support-for-QCA639x-powerup-sequence.patch new file mode 100644 index 0000000..2621853 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qca6390-driver/0002-mfd-qca639x-add-support-for-QCA639x-powerup-sequence.patch @@ -0,0 +1,225 @@ +From 6cca247e22ac57fcc99241fee201056c1967278e Mon Sep 17 00:00:00 2001 +From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Date: Fri, 18 Dec 2020 16:24:56 +0300 +Subject: [PATCH 2/5] mfd: qca639x: add support for QCA639x powerup sequence + +Qualcomm QCA639x is a family of WiFi + Bluetooth SoCs, with BT part +being controlled through the UART and WiFi being present on PCIe +bus. Both blocks share common power sources. So add mfd device driver +handling power sequencing of QCA6390/1. + +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Inappropriate +--- + drivers/mfd/Kconfig | 12 +++ + drivers/mfd/Makefile | 1 + + drivers/mfd/qcom-qca639x.c | 162 +++++++++++++++++++++++++++++++++++++ + 3 files changed, 175 insertions(+) + create mode 100644 drivers/mfd/qcom-qca639x.c + +diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig +index e90463c4441c..9abb4df8d66b 100644 +--- a/drivers/mfd/Kconfig ++++ b/drivers/mfd/Kconfig +@@ -1086,6 +1086,18 @@ config MFD_PM8XXX + Say M here if you want to include support for PM8xxx chips as a + module. This will build a module called "pm8xxx-core". + ++config MFD_QCOM_QCA639X ++ tristate "Qualcomm QCA639x WiFi/Bluetooth module support" ++ depends on REGULATOR && PM_GENERIC_DOMAINS ++ help ++ If you say yes to this option, support will be included for Qualcomm ++ QCA639x family of WiFi and Bluetooth SoCs. Note, this driver supports ++ only power control for this SoC, you still have to enable individual ++ Bluetooth and WiFi drivers. ++ ++ Say M here if you want to include support for QCA639x chips as a ++ module. This will build a module called "qcom-qca639x". ++ + config MFD_QCOM_RPM + tristate "Qualcomm Resource Power Manager (RPM)" + depends on ARCH_QCOM && OF +diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile +index 1d2392f06f78..f7f25ef9e17a 100644 +--- a/drivers/mfd/Makefile ++++ b/drivers/mfd/Makefile +@@ -197,6 +197,7 @@ obj-$(CONFIG_MFD_SI476X_CORE) += si476x-core.o + obj-$(CONFIG_MFD_CS5535) += cs5535-mfd.o + obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o omap-usb-tll.o + obj-$(CONFIG_MFD_PM8XXX) += qcom-pm8xxx.o ssbi.o ++obj-$(CONFIG_MFD_QCOM_QCA639X) += qcom-qca639x.o + obj-$(CONFIG_MFD_QCOM_RPM) += qcom_rpm.o + obj-$(CONFIG_MFD_SPMI_PMIC) += qcom-spmi-pmic.o + obj-$(CONFIG_TPS65911_COMPARATOR) += tps65911-comparator.o +diff --git a/drivers/mfd/qcom-qca639x.c b/drivers/mfd/qcom-qca639x.c +new file mode 100644 +index 000000000000..b31e4b65bec5 +--- /dev/null ++++ b/drivers/mfd/qcom-qca639x.c +@@ -0,0 +1,162 @@ ++#include <linux/delay.h> ++#include <linux/init.h> ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/pinctrl/consumer.h> ++#include <linux/pinctrl/devinfo.h> ++#include <linux/platform_device.h> ++#include <linux/pm_domain.h> ++#include <linux/regulator/consumer.h> ++#include <linux/slab.h> ++ ++#define MAX_NUM_REGULATORS 8 ++ ++static struct vreg { ++ const char *name; ++ unsigned int load_uA; ++} vregs [MAX_NUM_REGULATORS] = { ++ /* 2.0 V */ ++ { "vddpcie2", 15000 }, ++ { "vddrfa3", 400000 }, ++ ++ /* 0.95 V */ ++ { "vddaon", 100000 }, ++ { "vddpmu", 1250000 }, ++ { "vddrfa1", 200000 }, ++ ++ /* 1.35 V */ ++ { "vddrfa2", 400000 }, ++ { "vddpcie1", 35000 }, ++ ++ /* 1.8 V */ ++ { "vddio", 20000 }, ++}; ++ ++struct qca639x_data { ++ struct regulator_bulk_data regulators[MAX_NUM_REGULATORS]; ++ size_t num_vregs; ++ struct device *dev; ++ struct pinctrl_state *active_state; ++ struct generic_pm_domain pd; ++}; ++ ++#define domain_to_data(domain) container_of(domain, struct qca639x_data, pd) ++ ++static int qca639x_power_on(struct generic_pm_domain *domain) ++{ ++ struct qca639x_data *data = domain_to_data(domain); ++ int ret; ++ ++ dev_warn(&domain->dev, "DUMMY POWER ON\n"); ++ ++ ret = regulator_bulk_enable(data->num_vregs, data->regulators); ++ if (ret) { ++ dev_err(data->dev, "Failed to enable regulators"); ++ return ret; ++ } ++ ++ /* Wait for 1ms before toggling enable pins. */ ++ msleep(1); ++ ++ ret = pinctrl_select_state(data->dev->pins->p, data->active_state); ++ if (ret) { ++ dev_err(data->dev, "Failed to select active state"); ++ return ret; ++ } ++ ++ /* Wait for all power levels to stabilize */ ++ msleep(6); ++ ++ return 0; ++} ++ ++static int qca639x_power_off(struct generic_pm_domain *domain) ++{ ++ struct qca639x_data *data = domain_to_data(domain); ++ ++ dev_warn(&domain->dev, "DUMMY POWER OFF\n"); ++ ++ pinctrl_select_default_state(data->dev); ++ regulator_bulk_disable(data->num_vregs, data->regulators); ++ ++ return 0; ++} ++ ++static int qca639x_probe(struct platform_device *pdev) ++{ ++ struct qca639x_data *data; ++ struct device *dev = &pdev->dev; ++ int i, ret; ++ ++ if (!dev->pins || IS_ERR_OR_NULL(dev->pins->default_state)) ++ return -EINVAL; ++ ++ data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); ++ if (!data) ++ return -ENOMEM; ++ ++ data->dev = dev; ++ data->num_vregs = ARRAY_SIZE(vregs); ++ ++ data->active_state = pinctrl_lookup_state(dev->pins->p, "active"); ++ if (IS_ERR(data->active_state)) { ++ ret = PTR_ERR(data->active_state); ++ dev_err(dev, "Failed to get active_state: %d\n", ret); ++ return ret; ++ } ++ ++ for (i = 0; i < data->num_vregs; i++) ++ data->regulators[i].supply = vregs[i].name; ++ ret = devm_regulator_bulk_get(dev, data->num_vregs, data->regulators); ++ if (ret < 0) ++ return ret; ++ ++ for (i = 0; i < data->num_vregs; i++) { ++ ret = regulator_set_load(data->regulators[i].consumer, vregs[i].load_uA); ++ if (ret) ++ return ret; ++ } ++ ++ data->pd.name = dev_name(dev); ++ data->pd.power_on = qca639x_power_on; ++ data->pd.power_off = qca639x_power_off; ++ ++ ret = pm_genpd_init(&data->pd, NULL, true); ++ if (ret < 0) ++ return ret; ++ ++ ret = of_genpd_add_provider_simple(dev->of_node, &data->pd); ++ if (ret < 0) { ++ pm_genpd_remove(&data->pd); ++ return ret; ++ } ++ ++ platform_set_drvdata(pdev, data); ++ ++ return 0; ++} ++ ++static int qca639x_remove(struct platform_device *pdev) ++{ ++ struct qca639x_data *data = platform_get_drvdata(pdev); ++ ++ pm_genpd_remove(&data->pd); ++ ++ return 0; ++} ++ ++static const struct of_device_id qca639x_of_match[] = { ++ { .compatible = "qcom,qca639x" }, ++}; ++ ++static struct platform_driver qca639x_driver = { ++ .probe = qca639x_probe, ++ .remove = qca639x_remove, ++ .driver = { ++ .name = "qca639x", ++ .of_match_table = qca639x_of_match, ++ }, ++}; ++ ++module_platform_driver(qca639x_driver); ++MODULE_LICENSE("GPL v2"); +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/qca6390-driver/0003-mfd-qcom-qca639x-switch-to-platform-config-data.patch b/recipes-kernel/linux/linux-yocto/qca6390-driver/0003-mfd-qcom-qca639x-switch-to-platform-config-data.patch new file mode 100644 index 0000000..72458ef --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qca6390-driver/0003-mfd-qcom-qca639x-switch-to-platform-config-data.patch @@ -0,0 +1,189 @@ +From bf19679f9a583a5bfd0cb711984fbe456af652fd Mon Sep 17 00:00:00 2001 +From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Date: Sat, 26 Feb 2022 21:13:18 +0300 +Subject: [PATCH 3/5] mfd: qcom-qca639x: switch to platform config data + +Change qcom-qca639x to use platform config data, in preparation to +supporting other devices. + +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Inappropriate +--- + drivers/mfd/qcom-qca639x.c | 74 +++++++++++++++++++++++--------------- + 1 file changed, 46 insertions(+), 28 deletions(-) + +diff --git a/drivers/mfd/qcom-qca639x.c b/drivers/mfd/qcom-qca639x.c +index b31e4b65bec5..22792561dbad 100644 +--- a/drivers/mfd/qcom-qca639x.c ++++ b/drivers/mfd/qcom-qca639x.c +@@ -1,4 +1,5 @@ + #include <linux/delay.h> ++#include <linux/gpio/consumer.h> + #include <linux/init.h> + #include <linux/kernel.h> + #include <linux/module.h> +@@ -6,15 +7,21 @@ + #include <linux/pinctrl/devinfo.h> + #include <linux/platform_device.h> + #include <linux/pm_domain.h> ++#include <linux/property.h> + #include <linux/regulator/consumer.h> + #include <linux/slab.h> + +-#define MAX_NUM_REGULATORS 8 +- +-static struct vreg { ++struct vreg { + const char *name; + unsigned int load_uA; +-} vregs [MAX_NUM_REGULATORS] = { ++}; ++ ++struct qca_cfg_data { ++ const struct vreg *vregs; ++ size_t num_vregs; ++}; ++ ++static const struct vreg qca6390_vregs[] = { + /* 2.0 V */ + { "vddpcie2", 15000 }, + { "vddrfa3", 400000 }, +@@ -32,19 +39,24 @@ static struct vreg { + { "vddio", 20000 }, + }; + +-struct qca639x_data { +- struct regulator_bulk_data regulators[MAX_NUM_REGULATORS]; ++static const struct qca_cfg_data qca6390_cfg_data = { ++ .vregs = qca6390_vregs, ++ .num_vregs = ARRAY_SIZE(qca6390_vregs), ++}; ++ ++struct qca_data { + size_t num_vregs; + struct device *dev; + struct pinctrl_state *active_state; + struct generic_pm_domain pd; ++ struct regulator_bulk_data regulators[]; + }; + +-#define domain_to_data(domain) container_of(domain, struct qca639x_data, pd) ++#define domain_to_data(domain) container_of(domain, struct qca_data, pd) + +-static int qca639x_power_on(struct generic_pm_domain *domain) ++static int qca_power_on(struct generic_pm_domain *domain) + { +- struct qca639x_data *data = domain_to_data(domain); ++ struct qca_data *data = domain_to_data(domain); + int ret; + + dev_warn(&domain->dev, "DUMMY POWER ON\n"); +@@ -70,9 +82,9 @@ static int qca639x_power_on(struct generic_pm_domain *domain) + return 0; + } + +-static int qca639x_power_off(struct generic_pm_domain *domain) ++static int qca_power_off(struct generic_pm_domain *domain) + { +- struct qca639x_data *data = domain_to_data(domain); ++ struct qca_data *data = domain_to_data(domain); + + dev_warn(&domain->dev, "DUMMY POWER OFF\n"); + +@@ -82,21 +94,26 @@ static int qca639x_power_off(struct generic_pm_domain *domain) + return 0; + } + +-static int qca639x_probe(struct platform_device *pdev) ++static int qca_probe(struct platform_device *pdev) + { +- struct qca639x_data *data; ++ const struct qca_cfg_data *cfg; ++ struct qca_data *data; + struct device *dev = &pdev->dev; + int i, ret; + ++ cfg = device_get_match_data(&pdev->dev); ++ if (!cfg) ++ return -EINVAL; ++ + if (!dev->pins || IS_ERR_OR_NULL(dev->pins->default_state)) + return -EINVAL; + +- data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); ++ data = devm_kzalloc(dev, struct_size(data, regulators, cfg->num_vregs), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->dev = dev; +- data->num_vregs = ARRAY_SIZE(vregs); ++ data->num_vregs = cfg->num_vregs; + + data->active_state = pinctrl_lookup_state(dev->pins->p, "active"); + if (IS_ERR(data->active_state)) { +@@ -106,20 +123,20 @@ static int qca639x_probe(struct platform_device *pdev) + } + + for (i = 0; i < data->num_vregs; i++) +- data->regulators[i].supply = vregs[i].name; ++ data->regulators[i].supply = cfg->vregs[i].name; + ret = devm_regulator_bulk_get(dev, data->num_vregs, data->regulators); + if (ret < 0) + return ret; + + for (i = 0; i < data->num_vregs; i++) { +- ret = regulator_set_load(data->regulators[i].consumer, vregs[i].load_uA); ++ ret = regulator_set_load(data->regulators[i].consumer, cfg->vregs[i].load_uA); + if (ret) + return ret; + } + + data->pd.name = dev_name(dev); +- data->pd.power_on = qca639x_power_on; +- data->pd.power_off = qca639x_power_off; ++ data->pd.power_on = qca_power_on; ++ data->pd.power_off = qca_power_off; + + ret = pm_genpd_init(&data->pd, NULL, true); + if (ret < 0) +@@ -136,27 +153,28 @@ static int qca639x_probe(struct platform_device *pdev) + return 0; + } + +-static int qca639x_remove(struct platform_device *pdev) ++static int qca_remove(struct platform_device *pdev) + { +- struct qca639x_data *data = platform_get_drvdata(pdev); ++ struct qca_data *data = platform_get_drvdata(pdev); + + pm_genpd_remove(&data->pd); + + return 0; + } + +-static const struct of_device_id qca639x_of_match[] = { +- { .compatible = "qcom,qca639x" }, ++static const struct of_device_id qca_of_match[] = { ++ { .compatible = "qcom,qca6390", .data = &qca6390_cfg_data }, ++ { }, + }; + +-static struct platform_driver qca639x_driver = { +- .probe = qca639x_probe, +- .remove = qca639x_remove, ++static struct platform_driver qca_driver = { ++ .probe = qca_probe, ++ .remove = qca_remove, + .driver = { + .name = "qca639x", +- .of_match_table = qca639x_of_match, ++ .of_match_table = qca_of_match, + }, + }; + +-module_platform_driver(qca639x_driver); ++module_platform_driver(qca_driver); + MODULE_LICENSE("GPL v2"); +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/qca6390-driver/0004-mfd-qcom-qca639x-change-qca639x-to-use-gpios-rather-.patch b/recipes-kernel/linux/linux-yocto/qca6390-driver/0004-mfd-qcom-qca639x-change-qca639x-to-use-gpios-rather-.patch new file mode 100644 index 0000000..4520e37 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qca6390-driver/0004-mfd-qcom-qca639x-change-qca639x-to-use-gpios-rather-.patch @@ -0,0 +1,90 @@ +From 3f07b11f1bf49c153df0248de9128ffdad0792f8 Mon Sep 17 00:00:00 2001 +From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Date: Sat, 26 Feb 2022 21:17:22 +0300 +Subject: [PATCH 4/5] mfd: qcom-qca639x: change qca639x to use gpios rather + than pinctrl + +Use gpio interface instead of pinctrl interface to toggle enable pins. + +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Inappropriate +--- + drivers/mfd/qcom-qca639x.c | 33 +++++++++++++++++++-------------- + 1 file changed, 19 insertions(+), 14 deletions(-) + +diff --git a/drivers/mfd/qcom-qca639x.c b/drivers/mfd/qcom-qca639x.c +index 22792561dbad..4de860e9bbd0 100644 +--- a/drivers/mfd/qcom-qca639x.c ++++ b/drivers/mfd/qcom-qca639x.c +@@ -47,8 +47,9 @@ static const struct qca_cfg_data qca6390_cfg_data = { + struct qca_data { + size_t num_vregs; + struct device *dev; +- struct pinctrl_state *active_state; + struct generic_pm_domain pd; ++ struct gpio_desc *wlan_en_gpio; ++ struct gpio_desc *bt_en_gpio; + struct regulator_bulk_data regulators[]; + }; + +@@ -70,11 +71,10 @@ static int qca_power_on(struct generic_pm_domain *domain) + /* Wait for 1ms before toggling enable pins. */ + msleep(1); + +- ret = pinctrl_select_state(data->dev->pins->p, data->active_state); +- if (ret) { +- dev_err(data->dev, "Failed to select active state"); +- return ret; +- } ++ if (data->wlan_en_gpio) ++ gpiod_set_value(data->wlan_en_gpio, 1); ++ if (data->bt_en_gpio) ++ gpiod_set_value(data->bt_en_gpio, 1); + + /* Wait for all power levels to stabilize */ + msleep(6); +@@ -88,7 +88,11 @@ static int qca_power_off(struct generic_pm_domain *domain) + + dev_warn(&domain->dev, "DUMMY POWER OFF\n"); + +- pinctrl_select_default_state(data->dev); ++ if (data->wlan_en_gpio) ++ gpiod_set_value(data->wlan_en_gpio, 0); ++ if (data->bt_en_gpio) ++ gpiod_set_value(data->bt_en_gpio, 0); ++ + regulator_bulk_disable(data->num_vregs, data->regulators); + + return 0; +@@ -115,13 +119,6 @@ static int qca_probe(struct platform_device *pdev) + data->dev = dev; + data->num_vregs = cfg->num_vregs; + +- data->active_state = pinctrl_lookup_state(dev->pins->p, "active"); +- if (IS_ERR(data->active_state)) { +- ret = PTR_ERR(data->active_state); +- dev_err(dev, "Failed to get active_state: %d\n", ret); +- return ret; +- } +- + for (i = 0; i < data->num_vregs; i++) + data->regulators[i].supply = cfg->vregs[i].name; + ret = devm_regulator_bulk_get(dev, data->num_vregs, data->regulators); +@@ -134,6 +131,14 @@ static int qca_probe(struct platform_device *pdev) + return ret; + } + ++ data->wlan_en_gpio = devm_gpiod_get_optional(&pdev->dev, "wlan-en", GPIOD_OUT_LOW); ++ if (IS_ERR(data->wlan_en_gpio)) ++ return PTR_ERR(data->wlan_en_gpio); ++ ++ data->bt_en_gpio = devm_gpiod_get_optional(&pdev->dev, "bt-en", GPIOD_OUT_LOW); ++ if (IS_ERR(data->bt_en_gpio)) ++ return PTR_ERR(data->bt_en_gpio); ++ + data->pd.name = dev_name(dev); + data->pd.power_on = qca_power_on; + data->pd.power_off = qca_power_off; +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/qca6390-driver/0005-mfd-qcom-qca639x-Add-support-for-WCN6855.patch b/recipes-kernel/linux/linux-yocto/qca6390-driver/0005-mfd-qcom-qca639x-Add-support-for-WCN6855.patch new file mode 100644 index 0000000..734e778 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qca6390-driver/0005-mfd-qcom-qca639x-Add-support-for-WCN6855.patch @@ -0,0 +1,111 @@ +From 87c18e7aa2071dc0c95b76360671c3b3f2dcedec Mon Sep 17 00:00:00 2001 +From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Date: Sat, 26 Feb 2022 21:52:08 +0300 +Subject: [PATCH 5/5] mfd: qcom-qca639x: Add support for WCN6855 + +Add support for powering up WCN6855 WiFi/BT chip. + +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Inappropriate +--- + drivers/mfd/qcom-qca639x.c | 49 ++++++++++++++++++++++++++++++++++++++ + 1 file changed, 49 insertions(+) + +diff --git a/drivers/mfd/qcom-qca639x.c b/drivers/mfd/qcom-qca639x.c +index 4de860e9bbd0..16ff767a34b0 100644 +--- a/drivers/mfd/qcom-qca639x.c ++++ b/drivers/mfd/qcom-qca639x.c +@@ -44,10 +44,38 @@ static const struct qca_cfg_data qca6390_cfg_data = { + .num_vregs = ARRAY_SIZE(qca6390_vregs), + }; + ++static const struct vreg wcn6855_vregs[] = { ++ /* 2.8 V */ ++ { "vddasd" }, /* external antenna switch */ ++ ++ /* 0.95 V */ ++ { "vddaon" }, ++ { "vddcx" }, ++ { "vddmx" }, ++ ++ /* 1.9 V - 2.1 V */ ++ { "vddrfa1" }, ++ ++ /* 1.35 V */ ++ { "vddrfa2" }, ++ ++ /* 2.2 V, optional */ ++ { "vddrfa3" }, ++ ++ /* 1.8 V */ ++ { "vddio" }, ++}; ++ ++static const struct qca_cfg_data wcn6855_cfg_data = { ++ .vregs = wcn6855_vregs, ++ .num_vregs = ARRAY_SIZE(wcn6855_vregs), ++}; ++ + struct qca_data { + size_t num_vregs; + struct device *dev; + struct generic_pm_domain pd; ++ struct gpio_desc *xo_clk_gpio; + struct gpio_desc *wlan_en_gpio; + struct gpio_desc *bt_en_gpio; + struct regulator_bulk_data regulators[]; +@@ -71,11 +99,24 @@ static int qca_power_on(struct generic_pm_domain *domain) + /* Wait for 1ms before toggling enable pins. */ + msleep(1); + ++ if (data->xo_clk_gpio) { ++ gpiod_set_value(data->xo_clk_gpio, 1); ++ ++ /*XO CLK must be asserted for some time before WLAN_EN */ ++ usleep_range(100, 200); ++ } ++ + if (data->wlan_en_gpio) + gpiod_set_value(data->wlan_en_gpio, 1); + if (data->bt_en_gpio) + gpiod_set_value(data->bt_en_gpio, 1); + ++ if (data->xo_clk_gpio) { ++ /* Assert XO CLK ~(2-5)ms before off for valid latch in HW */ ++ usleep_range(2000, 5000); ++ gpiod_set_value(data->xo_clk_gpio, 0); ++ } ++ + /* Wait for all power levels to stabilize */ + msleep(6); + +@@ -126,11 +167,18 @@ static int qca_probe(struct platform_device *pdev) + return ret; + + for (i = 0; i < data->num_vregs; i++) { ++ if (!cfg->vregs[i].load_uA) ++ continue; ++ + ret = regulator_set_load(data->regulators[i].consumer, cfg->vregs[i].load_uA); + if (ret) + return ret; + } + ++ data->xo_clk_gpio = devm_gpiod_get_optional(&pdev->dev, "xo-clk", GPIOD_OUT_LOW); ++ if (IS_ERR(data->xo_clk_gpio)) ++ return PTR_ERR(data->xo_clk_gpio); ++ + data->wlan_en_gpio = devm_gpiod_get_optional(&pdev->dev, "wlan-en", GPIOD_OUT_LOW); + if (IS_ERR(data->wlan_en_gpio)) + return PTR_ERR(data->wlan_en_gpio); +@@ -169,6 +217,7 @@ static int qca_remove(struct platform_device *pdev) + + static const struct of_device_id qca_of_match[] = { + { .compatible = "qcom,qca6390", .data = &qca6390_cfg_data }, ++ { .compatible = "qcom,wcn6855", .data = &wcn6855_cfg_data }, + { }, + }; + +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/qca6390-dts/0001-arm64-dts-qcom-qrb5165-rb5-add-qca639x-power-domain.patch b/recipes-kernel/linux/linux-yocto/qca6390-dts/0001-arm64-dts-qcom-qrb5165-rb5-add-qca639x-power-domain.patch new file mode 100644 index 0000000..8cff6ab --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qca6390-dts/0001-arm64-dts-qcom-qrb5165-rb5-add-qca639x-power-domain.patch @@ -0,0 +1,66 @@ +From 97722f4d4058a76bc63042d5a3f6e239d6b6d943 Mon Sep 17 00:00:00 2001 +From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Date: Sun, 20 Dec 2020 02:44:08 +0300 +Subject: [PATCH 1/3] arm64: dts: qcom: qrb5165-rb5: add qca639x power domain + +Add QCA639x power sequencing device to be used as power domain for +respective bluetooth and WiFi devices. + +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Inappropriate +--- + arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 31 ++++++++++++++++++++++++ + 1 file changed, 31 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +index dd924331b0ee..b781f33d6d2f 100644 +--- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts ++++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +@@ -230,6 +230,26 @@ vreg_s4a_1p8: vreg-s4a-1p8 { + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; ++ ++ qca639x: qca639x { ++ compatible = "qcom,qca6390"; ++ #power-domain-cells = <0>; ++ ++ vddaon-supply = <&vreg_s6a_0p95>; ++ vddpmu-supply = <&vreg_s2f_0p95>; ++ vddrfa1-supply = <&vreg_s2f_0p95>; ++ vddrfa2-supply = <&vreg_s8c_1p3>; ++ vddrfa3-supply = <&vreg_s5a_1p9>; ++ vddpcie1-supply = <&vreg_s8c_1p3>; ++ vddpcie2-supply = <&vreg_s5a_1p9>; ++ vddio-supply = <&vreg_s4a_1p8>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wlan_en_state>; ++ ++ wlan-en-gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>; ++ }; ++ + }; + + &adsp { +@@ -1243,6 +1263,17 @@ sdc2_card_det_n: sd-card-det-n-state { + function = "gpio"; + bias-pull-up; + }; ++ ++ wlan_en_state: wlan-default-state { ++ wlan-en { ++ pins = "gpio20"; ++ function = "gpio"; ++ ++ drive-strength = <16>; ++ output-low; ++ bias-pull-up; ++ }; ++ }; + }; + + &uart12 { +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/qca6390-dts/0002-arm64-dts-qcom-Add-Bluetooth-support-on-RB5.patch b/recipes-kernel/linux/linux-yocto/qca6390-dts/0002-arm64-dts-qcom-Add-Bluetooth-support-on-RB5.patch new file mode 100644 index 0000000..9a038e4 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qca6390-dts/0002-arm64-dts-qcom-Add-Bluetooth-support-on-RB5.patch @@ -0,0 +1,66 @@ +From e3316d8e314678931c80d2a1b70ffd53f759dc6f Mon Sep 17 00:00:00 2001 +From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> +Date: Wed, 2 Sep 2020 09:03:29 +0530 +Subject: [PATCH 2/3] arm64: dts: qcom: Add Bluetooth support on RB5 + +Add Bluetooth support on RB5 using the onboard QCA6391 WLAN+BT chipset. + +Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Inappropriate +--- + arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 24 ++++++++++++++++++++++++ + 1 file changed, 24 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +index b781f33d6d2f..586ac20ff956 100644 +--- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts ++++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +@@ -22,6 +22,7 @@ / { + + aliases { + serial0 = &uart12; ++ serial1 = &uart6; + sdhc2 = &sdhc_2; + }; + +@@ -1232,6 +1233,17 @@ &tlmm { + "HST_WLAN_UART_TX", + "HST_WLAN_UART_RX"; + ++ bt_en_state: bt-default-state { ++ bt-en { ++ pins = "gpio21"; ++ function = "gpio"; ++ ++ drive-strength = <16>; ++ output-low; ++ bias-pull-up; ++ }; ++ }; ++ + lt9611_irq_pin: lt9611-irq-state { + pins = "gpio63"; + function = "gpio"; +@@ -1276,6 +1288,18 @@ wlan-en { + }; + }; + ++&uart6 { ++ status = "okay"; ++ bluetooth { ++ compatible = "qcom,qca6390-bt"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&bt_en_state>; ++ ++ power-domains = <&qca639x>; ++ enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>; ++ }; ++}; ++ + &uart12 { + status = "okay"; + }; +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/qca6390-dts/0003-arm64-dtb-qcom-qrb5165-rb5-add-power-domain-to-pcie0.patch b/recipes-kernel/linux/linux-yocto/qca6390-dts/0003-arm64-dtb-qcom-qrb5165-rb5-add-power-domain-to-pcie0.patch new file mode 100644 index 0000000..0d868f8 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qca6390-dts/0003-arm64-dtb-qcom-qrb5165-rb5-add-power-domain-to-pcie0.patch @@ -0,0 +1,35 @@ +From 0e2a4a6117aeffeb6150e0a23d90c6748ab809bf Mon Sep 17 00:00:00 2001 +From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Date: Sun, 20 Dec 2020 03:17:50 +0300 +Subject: [PATCH 3/3] arm64: dtb: qcom: qrb5165-rb5: add power domain to pcie0 + phy + +If QCA6391 chip (connected to PCIe0) is not powered at the PCIe probe +time, PCIe0 bus probe will timeout and the device will not be detected. +To ease device power up support, use qca639x as pcie0 phy power-domain. +This allows us to make sure that QCA6391 chip is powered on before PCIe0 +probe happens. + +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Inappropriate +--- + arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +index 586ac20ff956..c86b020d525e 100644 +--- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts ++++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +@@ -704,6 +704,9 @@ &pcie0_phy { + status = "okay"; + vdda-phy-supply = <&vreg_l5a_0p88>; + vdda-pll-supply = <&vreg_l9a_1p2>; ++ ++ /* Power on QCA639x chip, otherwise PCIe bus timeouts */ ++ power-domains = <&qca639x>; + }; + + &pcie1 { +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-FROMLIST-dt-bindings-arm-qcom-Add-QCM6490-IDP-board.patch b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-FROMLIST-dt-bindings-arm-qcom-Add-QCM6490-IDP-board.patch new file mode 100644 index 0000000..ccec02e --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-FROMLIST-dt-bindings-arm-qcom-Add-QCM6490-IDP-board.patch @@ -0,0 +1,31 @@ +From 4cd742fb7632a39176bc2a2006e1cb1d01efe473 Mon Sep 17 00:00:00 2001 +From: Komal Bajaj <quic_kbajaj@quicinc.com> +Date: Wed, 27 Sep 2023 10:53:52 +0530 +Subject: [PATCH] FROMLIST: dt-bindings: arm: qcom: Add QCM6490 IDP board + +Document the qcom,qcm6490-idp board based off qcm6490 SoC. + +Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> +Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> +Signed-off-by: Salendarsingh Gaud <quic_sgaud@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Submitted [https://lore.kernel.org/linux-arm-msm/20231003175456.14774-2-quic_kbajaj@quicinc.com/] +--- + Documentation/devicetree/bindings/arm/qcom.yaml | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml +index 5d2cbddb6ab8..fcc301d8c4b5 100644 +--- a/Documentation/devicetree/bindings/arm/qcom.yaml ++++ b/Documentation/devicetree/bindings/arm/qcom.yaml +@@ -386,6 +386,7 @@ properties: + - items: + - enum: + - fairphone,fp5 ++ - qcom,qcm6490-idp + - const: qcom,qcm6490 + + - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-PENDING-arm64-dts-qcom-qcm6490-Add-UFS-nodes-for-IDP.patch b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-PENDING-arm64-dts-qcom-qcm6490-Add-UFS-nodes-for-IDP.patch new file mode 100644 index 0000000..1bcbdce --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-PENDING-arm64-dts-qcom-qcm6490-Add-UFS-nodes-for-IDP.patch @@ -0,0 +1,50 @@ +From 4aed09eb7fca388f4ebf0dbd7b732a70cac6f6c6 Mon Sep 17 00:00:00 2001 +From: Manish Pandey <quic_mapa@quicinc.com> +Date: Tue, 17 Oct 2023 23:46:10 +0530 +Subject: [PATCH 1/2] PENDING: arm64: dts: qcom: qcm6490: Add UFS nodes for IDP + +Add UFS host controller and Phy nodes for Qualcomm +qcm6490 IDP Board. + +Change-Id: If756cf2396ad0d82e7c607738068a634c5a1919a +Signed-off-by: Manish Pandey <quic_mapa@quicinc.com> +Signed-off-by: Salendarsingh Gaud <quic_sgaud@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 19 +++++++++++++++++++ + 1 file changed, 19 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +index 9b1bf7d1c98d..7d609317af82 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +@@ -303,6 +303,25 @@ &uart5 { + status = "okay"; + }; + ++&ufs_mem_hc { ++ reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>; ++ vcc-supply = <&vreg_l7b_2p9>; ++ vcc-max-microamp = <800000>; ++ vccq-supply = <&vreg_l9b_1p2>; ++ vccq-max-microamp = <900000>; ++ vccq2-supply = <&vreg_l9b_1p2>; ++ vccq2-max-microamp = <900000>; ++ ++ status = "okay"; ++}; ++ ++&ufs_mem_phy { ++ vdda-phy-supply = <&vreg_l10c_0p8>; ++ vdda-pll-supply = <&vreg_l6b_1p2>; ++ ++ status = "okay"; ++}; ++ + &usb_1 { + status = "okay"; + }; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-PENDING-dt-bindings-arm-qcom-Add-QCM6490-RB3-board.patch b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-PENDING-dt-bindings-arm-qcom-Add-QCM6490-RB3-board.patch new file mode 100644 index 0000000..7b61519 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0001-PENDING-dt-bindings-arm-qcom-Add-QCM6490-RB3-board.patch @@ -0,0 +1,29 @@ +From a0fc2104e8484205228819b1aa498fbd51c86ba0 Mon Sep 17 00:00:00 2001 +From: Naina Mehta <quic_nainmeht@quicinc.com> +Date: Tue, 17 Oct 2023 13:29:51 +0530 +Subject: [PATCH 1/2] PENDING: dt-bindings: arm: qcom: Add QCM6490 RB3 board + +Document the qcom,qcm6490-rb3 board based off qcm6490 SoC. + +Signed-off-by: Naina Mehta <quic_nainmeht@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Pending +--- + Documentation/devicetree/bindings/arm/qcom.yaml | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml +index fcc301d8c4b5..6481bd03b0de 100644 +--- a/Documentation/devicetree/bindings/arm/qcom.yaml ++++ b/Documentation/devicetree/bindings/arm/qcom.yaml +@@ -387,6 +387,7 @@ properties: + - enum: + - fairphone,fp5 + - qcom,qcm6490-idp ++ - qcom,qcm6490-rb3 + - const: qcom,qcm6490 + + - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0002-PENDING-arm64-dts-qcom-Add-UFS-nodes-for-qcm6490-rb3.patch b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0002-PENDING-arm64-dts-qcom-Add-UFS-nodes-for-qcm6490-rb3.patch new file mode 100644 index 0000000..2e0a5bf --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0002-PENDING-arm64-dts-qcom-Add-UFS-nodes-for-qcm6490-rb3.patch @@ -0,0 +1,48 @@ +From d92bdf898e27e77de384cf1fa13793b62b9cd95a Mon Sep 17 00:00:00 2001 +From: Manish Pandey <quic_mapa@quicinc.com> +Date: Wed, 1 Nov 2023 11:58:28 +0530 +Subject: [PATCH 2/2] PENDING: arm64: dts: qcom: Add UFS nodes for qcm6490-rb3 + +Add UFS host controller and Phy nodes for Qualcomm +qcm6490-rb3 Board. + +Signed-off-by: Manish Pandey <quic_mapa@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490-rb3.dts | 19 +++++++++++++++++++ + 1 file changed, 19 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts b/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts +index ddc286157b8f..47ea7d3b5f51 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts +@@ -292,6 +292,25 @@ &uart5 { + status = "okay"; + }; + ++&ufs_mem_hc { ++ reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>; ++ vcc-supply = <&vreg_l7b_2p952>; ++ vcc-max-microamp = <800000>; ++ vccq-supply = <&vreg_l9b_1p2>; ++ vccq-max-microamp = <900000>; ++ vccq2-supply = <&vreg_l9b_1p2>; ++ vccq2-max-microamp = <900000>; ++ ++ status = "okay"; ++}; ++ ++&ufs_mem_phy { ++ vdda-phy-supply = <&vreg_l10c_0p88>; ++ vdda-pll-supply = <&vreg_l6b_1p2>; ++ ++ status = "okay"; ++}; ++ + &usb_1 { + status = "okay"; + }; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0002-PENDING-arm64-dts-qcom-Add-qcm6490-rb3-support.patch b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0002-PENDING-arm64-dts-qcom-Add-qcm6490-rb3-support.patch new file mode 100644 index 0000000..de9982a --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-board-dts/0002-PENDING-arm64-dts-qcom-Add-qcm6490-rb3-support.patch @@ -0,0 +1,353 @@ +From 95a6f8a80e901dc1fe35793e51d761ea05eae90d Mon Sep 17 00:00:00 2001 +From: Naina Mehta <quic_nainmeht@quicinc.com> +Date: Tue, 17 Oct 2023 18:59:20 +0530 +Subject: [PATCH 2/2] PENDING: arm64: dts: qcom: Add qcm6490 rb3 support + +Add device tree file for rb3 board for qcm6490 SoC. + +Signed-off-by: Naina Mehta <quic_nainmeht@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/Makefile | 1 + + arch/arm64/boot/dts/qcom/qcm6490-rb3.dts | 316 +++++++++++++++++++++++ + 2 files changed, 317 insertions(+) + create mode 100644 arch/arm64/boot/dts/qcom/qcm6490-rb3.dts + +diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile +index f597224e3dcb..c21079c18bb4 100644 +--- a/arch/arm64/boot/dts/qcom/Makefile ++++ b/arch/arm64/boot/dts/qcom/Makefile +@@ -79,6 +79,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-maple.dtb + dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-poplar.dtb + dtb-$(CONFIG_ARCH_QCOM) += msm8998-xiaomi-sagit.dtb + dtb-$(CONFIG_ARCH_QCOM) += qcm6490-idp.dtb ++dtb-$(CONFIG_ARCH_QCOM) += qcm6490-rb3.dtb + dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb + dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb + dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts b/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts +new file mode 100644 +index 000000000000..ddc286157b8f +--- /dev/null ++++ b/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts +@@ -0,0 +1,316 @@ ++// SPDX-License-Identifier: BSD-3-Clause ++/* ++ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. ++ */ ++ ++/dts-v1/; ++ ++/* PM7250B is configured to use SID8/9 */ ++#define PM7250B_SID 8 ++#define PM7250B_SID1 9 ++ ++#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> ++#include <dt-bindings/regulator/qcom,rpmh-regulator.h> ++#include "qcm6490.dtsi" ++#include "pm7250b.dtsi" ++#include "pm7325.dtsi" ++#include "pm8350c.dtsi" ++#include "pmk8350.dtsi" ++ ++/ { ++ model = "Qualcomm Robotics RB3 Gen2"; ++ compatible = "qcom,qcm6490-rb3", "qcom,qcm6490"; ++ ++ aliases { ++ serial0 = &uart5; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++}; ++ ++&apps_rsc { ++ regulators-0 { ++ compatible = "qcom,pm7325-rpmh-regulators"; ++ qcom,pmic-id = "b"; ++ ++ vreg_s1b_1p872: smps1 { ++ regulator-min-microvolt = <1840000>; ++ regulator-max-microvolt = <2040000>; ++ }; ++ ++ vreg_s2b_0p876: smps2 { ++ regulator-min-microvolt = <570070>; ++ regulator-max-microvolt = <1050000>; ++ }; ++ ++ vreg_s7b_0p972: smps7 { ++ regulator-min-microvolt = <535000>; ++ regulator-max-microvolt = <1120000>; ++ }; ++ ++ vreg_s8b_1p272: smps8 { ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1500000>; ++ }; ++ ++ vreg_l1b_0p912: ldo1 { ++ regulator-min-microvolt = <825000>; ++ regulator-max-microvolt = <925000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l2b_3p072: ldo2 { ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l3b_0p504: ldo3 { ++ regulator-min-microvolt = <312000>; ++ regulator-max-microvolt = <910000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l4b_0p752: ldo4 { ++ regulator-min-microvolt = <752000>; ++ regulator-max-microvolt = <820000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l5b_0p752: ldo5 { ++ regulator-min-microvolt = <552000>; ++ regulator-max-microvolt = <832000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l6b_1p2: ldo6 { ++ regulator-min-microvolt = <1140000>; ++ regulator-max-microvolt = <1260000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l7b_2p952: ldo7 { ++ regulator-min-microvolt = <2400000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l8b_0p904: ldo8 { ++ regulator-min-microvolt = <870000>; ++ regulator-max-microvolt = <970000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l9b_1p2: ldo9 { ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1304000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l11b_1p504: ldo11 { ++ regulator-min-microvolt = <1504000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l12b_0p751: ldo12 { ++ regulator-min-microvolt = <751000>; ++ regulator-max-microvolt = <824000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l13b_0p53: ldo13 { ++ regulator-min-microvolt = <530000>; ++ regulator-max-microvolt = <824000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l14b_1p08: ldo14 { ++ regulator-min-microvolt = <1080000>; ++ regulator-max-microvolt = <1304000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l15b_0p765: ldo15 { ++ regulator-min-microvolt = <765000>; ++ regulator-max-microvolt = <1020000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l16b_1p1: ldo16 { ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1300000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l17b_1p7: ldo17 { ++ regulator-min-microvolt = <1700000>; ++ regulator-max-microvolt = <1900000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l18b_1p8: ldo18 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l19b_1p8: ldo19 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ }; ++ ++ regulators-1 { ++ compatible = "qcom,pm8350c-rpmh-regulators"; ++ qcom,pmic-id = "c"; ++ ++ vreg_s1c_2p19: smps1 { ++ regulator-min-microvolt = <2190000>; ++ regulator-max-microvolt = <2210000>; ++ }; ++ ++ vreg_s2c_0p752: smps2 { ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <800000>; ++ }; ++ ++ vreg_s5c_0p752: smps5 { ++ regulator-min-microvolt = <465000>; ++ regulator-max-microvolt = <1050000>; ++ }; ++ ++ vreg_s7c_0p752: smps7 { ++ regulator-min-microvolt = <465000>; ++ regulator-max-microvolt = <800000>; ++ }; ++ ++ vreg_s9c_1p084: smps9 { ++ regulator-min-microvolt = <1010000>; ++ regulator-max-microvolt = <1170000>; ++ }; ++ ++ vreg_s10c_0p752:smps10 { ++ regulator-min-microvolt = <752000>; ++ regulator-max-microvolt = <800000>; ++ }; ++ ++ vreg_l1c_1p8: ldo1 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1980000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l2c_1p62: ldo2 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <1980000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l3c_2p8: ldo3 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <3540000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l4c_1p62: ldo4 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l5c_1p62: ldo5 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l6c_2p96: ldo6 { ++ regulator-min-microvolt = <1650000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l7c_3p0: ldo7 { ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l8c_1p62: ldo8 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l9c_2p96: ldo9 { ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l10c_0p88:ldo10 { ++ regulator-min-microvolt = <720000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l11c_2p8: ldo11 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l12c_1p65: ldo12 { ++ regulator-min-microvolt = <1650000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l13c_2p7: ldo13 { ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_bob_3p296: bob { ++ regulator-min-microvolt = <3008000>; ++ regulator-max-microvolt = <3960000>; ++ }; ++ }; ++}; ++ ++&qupv3_id_0 { ++ status = "okay"; ++}; ++ ++&uart5 { ++ compatible = "qcom,geni-debug-uart"; ++ status = "okay"; ++}; ++ ++&usb_1 { ++ status = "okay"; ++}; ++ ++&usb_1_dwc3 { ++ dr_mode = "peripheral"; ++}; ++ ++&usb_1_hsphy { ++ vdda-pll-supply = <&vreg_l10c_0p88>; ++ vdda18-supply = <&vreg_l1c_1p8>; ++ vdda33-supply = <&vreg_l2b_3p072>; ++ ++ status = "okay"; ++}; ++ ++&usb_1_qmpphy { ++ vdda-phy-supply = <&vreg_l6b_1p2>; ++ vdda-pll-supply = <&vreg_l1b_0p912>; ++ ++ status = "okay"; ++}; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-drivers/0001-FROMGIT-phy-qcom-qmp-ufs-Add-Phy-Configuration-suppo.patch b/recipes-kernel/linux/linux-yocto/qcm6490-drivers/0001-FROMGIT-phy-qcom-qmp-ufs-Add-Phy-Configuration-suppo.patch new file mode 100644 index 0000000..cf2871c --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-drivers/0001-FROMGIT-phy-qcom-qmp-ufs-Add-Phy-Configuration-suppo.patch @@ -0,0 +1,188 @@ +From 801864e94d84f552d78e934bfe706183d7cc6901 Mon Sep 17 00:00:00 2001 +From: Nitin Rawat <quic_nitirawa@quicinc.com> +Date: Tue, 19 Sep 2023 02:20:37 +0530 +Subject: [PATCH] FROMGIT: phy: qcom-qmp-ufs: Add Phy Configuration support for + SC7280 + +Add SC7280 specific register layout and table configs. + +Co-developed-by: Manish Pandey <quic_mapa@quicinc.com> +Signed-off-by: Manish Pandey <quic_mapa@quicinc.com> +Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> +Signed-off-by: Salendarsingh Gaud <quic_sgaud@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 8abe9792d1ff7e60f911b56e8a2537be7e903576] +--- + drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 142 ++++++++++++++++++++++++ + 1 file changed, 142 insertions(+) + +diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c +index 8c877b668bb9..0aca2abd77d3 100644 +--- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c ++++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c +@@ -178,6 +178,111 @@ static const struct qmp_phy_init_tbl msm8996_ufsphy_rx[] = { + QMP_PHY_INIT_CFG(QSERDES_RX_RX_EQU_ADAPTOR_CNTRL2, 0x0E), + }; + ++static const struct qmp_phy_init_tbl sc7280_ufsphy_tx[] = { ++ QMP_PHY_INIT_CFG(QSERDES_V4_TX_PWM_GEAR_1_DIVIDER_BAND0_1, 0x06), ++ QMP_PHY_INIT_CFG(QSERDES_V4_TX_PWM_GEAR_2_DIVIDER_BAND0_1, 0x03), ++ QMP_PHY_INIT_CFG(QSERDES_V4_TX_PWM_GEAR_3_DIVIDER_BAND0_1, 0x01), ++ QMP_PHY_INIT_CFG(QSERDES_V4_TX_PWM_GEAR_4_DIVIDER_BAND0_1, 0x00), ++ QMP_PHY_INIT_CFG(QSERDES_V4_TX_LANE_MODE_1, 0x35), ++ QMP_PHY_INIT_CFG(QSERDES_V4_TX_TRAN_DRVR_EMP_EN, 0x0c), ++}; ++ ++static const struct qmp_phy_init_tbl sc7280_ufsphy_rx[] = { ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_SIGDET_LVL, 0x24), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_SIGDET_CNTRL, 0x0f), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_SIGDET_DEGLITCH_CNTRL, 0x1e), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_BAND, 0x18), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_FASTLOCK_FO_GAIN, 0x0a), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_SO_SATURATION_AND_ENABLE, 0x5a), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_PI_CONTROLS, 0xf1), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_FASTLOCK_COUNT_LOW, 0x80), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_PI_CTRL2, 0x80), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_FO_GAIN, 0x0e), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_SO_GAIN, 0x04), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_TERM_BW, 0x1b), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL2, 0x06), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL3, 0x04), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL4, 0x1d), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_OFFSET_ADAPTOR_CNTRL2, 0x00), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_IDAC_MEASURE_TIME, 0x10), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_IDAC_TSETTLE_LOW, 0xc0), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_IDAC_TSETTLE_HIGH, 0x00), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_00_LOW, 0x6d), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_00_HIGH, 0x6d), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_00_HIGH2, 0xed), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_00_HIGH3, 0x3b), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_00_HIGH4, 0x3c), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_LOW, 0xe0), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_HIGH, 0xc8), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_HIGH2, 0xc8), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_HIGH3, 0x3b), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_HIGH4, 0xb1), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_10_LOW, 0xe0), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_10_HIGH, 0xc8), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_10_HIGH2, 0xc8), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_10_HIGH3, 0x3b), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_10_HIGH4, 0xb1), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_DCC_CTRL1, 0x0c), ++}; ++ ++static const struct qmp_phy_init_tbl sc7280_ufsphy_pcs[] = { ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_RX_SIGDET_CTRL2, 0x6d), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_TX_LARGE_AMP_DRV_LVL, 0x0a), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_TX_SMALL_AMP_DRV_LVL, 0x02), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_TX_MID_TERM_CTRL1, 0x43), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_DEBUG_BUS_CLKSEL, 0x1f), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_RX_MIN_HIBERN8_TIME, 0xff), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_MULTI_LANE_CTRL1, 0x02), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_PLL_CNTL, 0x03), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_TIMER_20US_CORECLK_STEPS_MSB, 0x16), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_TIMER_20US_CORECLK_STEPS_LSB, 0xd8), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_TX_PWM_GEAR_BAND, 0xaa), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_TX_HS_GEAR_BAND, 0x06), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_TX_HSGEAR_CAPABILITY, 0x03), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_RX_HSGEAR_CAPABILITY, 0x03), ++}; ++ ++static const struct qmp_phy_init_tbl sc7280_ufsphy_hs_g4_rx[] = { ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_SIGDET_LVL, 0x24), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_SIGDET_CNTRL, 0x0f), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_SIGDET_DEGLITCH_CNTRL, 0x1e), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_BAND, 0x18), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_FASTLOCK_FO_GAIN, 0x0a), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_SO_SATURATION_AND_ENABLE, 0x5a), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_PI_CONTROLS, 0xf1), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_FASTLOCK_COUNT_LOW, 0x80), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_PI_CTRL2, 0x81), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_FO_GAIN, 0x0e), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_SO_GAIN, 0x04), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_TERM_BW, 0x6f), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL1, 0x04), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL2, 0x00), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL3, 0x09), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL4, 0x07), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1, 0x17), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_OFFSET_ADAPTOR_CNTRL2, 0x00), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_IDAC_MEASURE_TIME, 0x20), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_IDAC_TSETTLE_LOW, 0x80), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_IDAC_TSETTLE_HIGH, 0x01), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_00_LOW, 0x3f), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_00_HIGH, 0xff), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_00_HIGH2, 0xff), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_00_HIGH3, 0x7f), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_00_HIGH4, 0x2c), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_LOW, 0x6d), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_HIGH, 0x6d), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_HIGH2, 0xed), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_HIGH3, 0x3b), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_HIGH4, 0x3c), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_10_LOW, 0xe0), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_10_HIGH, 0xc8), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_10_HIGH2, 0xc8), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_10_HIGH3, 0x3b), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_10_HIGH4, 0xb1), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_DCC_CTRL1, 0x0c), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_GM_CAL, 0x0f), ++}; ++ + static const struct qmp_phy_init_tbl sm6115_ufsphy_serdes[] = { + QMP_PHY_INIT_CFG(QSERDES_COM_CMN_CONFIG, 0x0e), + QMP_PHY_INIT_CFG(QSERDES_COM_SYSCLK_EN_SEL, 0x14), +@@ -887,6 +992,40 @@ static const struct qmp_phy_cfg sa8775p_ufsphy_cfg = { + .regs = ufsphy_v5_regs_layout, + }; + ++static const struct qmp_phy_cfg sc7280_ufsphy_cfg = { ++ .lanes = 2, ++ ++ .offsets = &qmp_ufs_offsets, ++ ++ .tbls = { ++ .serdes = sm8150_ufsphy_serdes, ++ .serdes_num = ARRAY_SIZE(sm8150_ufsphy_serdes), ++ .tx = sc7280_ufsphy_tx, ++ .tx_num = ARRAY_SIZE(sc7280_ufsphy_tx), ++ .rx = sc7280_ufsphy_rx, ++ .rx_num = ARRAY_SIZE(sc7280_ufsphy_rx), ++ .pcs = sc7280_ufsphy_pcs, ++ .pcs_num = ARRAY_SIZE(sc7280_ufsphy_pcs), ++ }, ++ .tbls_hs_b = { ++ .serdes = sm8150_ufsphy_hs_b_serdes, ++ .serdes_num = ARRAY_SIZE(sm8150_ufsphy_hs_b_serdes), ++ }, ++ .tbls_hs_g4 = { ++ .tx = sm8250_ufsphy_hs_g4_tx, ++ .tx_num = ARRAY_SIZE(sm8250_ufsphy_hs_g4_tx), ++ .rx = sc7280_ufsphy_hs_g4_rx, ++ .rx_num = ARRAY_SIZE(sc7280_ufsphy_hs_g4_rx), ++ .pcs = sm8150_ufsphy_hs_g4_pcs, ++ .pcs_num = ARRAY_SIZE(sm8150_ufsphy_hs_g4_pcs), ++ }, ++ .clk_list = sm8450_ufs_phy_clk_l, ++ .num_clks = ARRAY_SIZE(sm8450_ufs_phy_clk_l), ++ .vreg_list = qmp_phy_vreg_l, ++ .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), ++ .regs = ufsphy_v4_regs_layout, ++}; ++ + static const struct qmp_phy_cfg sc8280xp_ufsphy_cfg = { + .lanes = 2, + +@@ -1637,6 +1776,9 @@ static const struct of_device_id qmp_ufs_of_match_table[] = { + }, { + .compatible = "qcom,sa8775p-qmp-ufs-phy", + .data = &sa8775p_ufsphy_cfg, ++ }, { ++ .compatible = "qcom,sc7280-qmp-ufs-phy", ++ .data = &sc7280_ufsphy_cfg, + }, { + .compatible = "qcom,sc8180x-qmp-ufs-phy", + .data = &sm8150_ufsphy_cfg, +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-drivers/0001-PENDING-clk-qcom-gcc-Enable-the-force-mem-core-for-U.patch b/recipes-kernel/linux/linux-yocto/qcm6490-drivers/0001-PENDING-clk-qcom-gcc-Enable-the-force-mem-core-for-U.patch new file mode 100644 index 0000000..d2b87cf --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-drivers/0001-PENDING-clk-qcom-gcc-Enable-the-force-mem-core-for-U.patch @@ -0,0 +1,210 @@ +From 5dab9b1ec029bd145a387fc02447306467d6d9d3 Mon Sep 17 00:00:00 2001 +From: Taniya Das <quic_tdas@quicinc.com> +Date: Mon, 30 Oct 2023 23:24:19 +0530 +Subject: [PATCH] PENDING: clk: qcom: gcc: Enable the force mem core for UFS + ICE clock + +Enable the force mem core for UFS ICE clock. Update the gdsc +transition delays to the recommended values for functional correctness. + +Signed-off-by: Taniya Das <quic_tdas@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Pending +--- + drivers/clk/qcom/camcc-sc7280.c | 19 +++++++++++++++++++ + drivers/clk/qcom/gcc-sc7280.c | 13 +++++++++++++ + drivers/clk/qcom/gpucc-sc7280.c | 7 +++++++ + drivers/clk/qcom/videocc-sc7280.c | 7 +++++++ + 4 files changed, 46 insertions(+) + +diff --git a/drivers/clk/qcom/camcc-sc7280.c b/drivers/clk/qcom/camcc-sc7280.c +index 4396fddba7a6..c1b71b4865e7 100644 +--- a/drivers/clk/qcom/camcc-sc7280.c ++++ b/drivers/clk/qcom/camcc-sc7280.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: GPL-2.0-only + /* + * Copyright (c) 2021, The Linux Foundation. All rights reserved. ++ * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include <linux/clk-provider.h> +@@ -2247,6 +2248,9 @@ static struct clk_branch cam_cc_sleep_clk = { + + static struct gdsc cam_cc_titan_top_gdsc = { + .gdscr = 0xc194, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "cam_cc_titan_top_gdsc", + }, +@@ -2256,6 +2260,9 @@ static struct gdsc cam_cc_titan_top_gdsc = { + + static struct gdsc cam_cc_bps_gdsc = { + .gdscr = 0x7004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "cam_cc_bps_gdsc", + }, +@@ -2265,6 +2272,9 @@ static struct gdsc cam_cc_bps_gdsc = { + + static struct gdsc cam_cc_ife_0_gdsc = { + .gdscr = 0xa004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "cam_cc_ife_0_gdsc", + }, +@@ -2274,6 +2284,9 @@ static struct gdsc cam_cc_ife_0_gdsc = { + + static struct gdsc cam_cc_ife_1_gdsc = { + .gdscr = 0xb004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "cam_cc_ife_1_gdsc", + }, +@@ -2283,6 +2296,9 @@ static struct gdsc cam_cc_ife_1_gdsc = { + + static struct gdsc cam_cc_ife_2_gdsc = { + .gdscr = 0xb070, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "cam_cc_ife_2_gdsc", + }, +@@ -2292,6 +2308,9 @@ static struct gdsc cam_cc_ife_2_gdsc = { + + static struct gdsc cam_cc_ipe_0_gdsc = { + .gdscr = 0x8004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "cam_cc_ipe_0_gdsc", + }, +diff --git a/drivers/clk/qcom/gcc-sc7280.c b/drivers/clk/qcom/gcc-sc7280.c +index 1dc804154031..dbb2fcb4e96a 100644 +--- a/drivers/clk/qcom/gcc-sc7280.c ++++ b/drivers/clk/qcom/gcc-sc7280.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: GPL-2.0-only + /* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. ++ * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include <linux/clk-provider.h> +@@ -3094,6 +3095,9 @@ static struct clk_branch gcc_wpss_rscp_clk = { + + static struct gdsc gcc_pcie_0_gdsc = { + .gdscr = 0x6b004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "gcc_pcie_0_gdsc", + }, +@@ -3112,6 +3116,9 @@ static struct gdsc gcc_pcie_1_gdsc = { + + static struct gdsc gcc_ufs_phy_gdsc = { + .gdscr = 0x77004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "gcc_ufs_phy_gdsc", + }, +@@ -3121,6 +3128,9 @@ static struct gdsc gcc_ufs_phy_gdsc = { + + static struct gdsc gcc_usb30_prim_gdsc = { + .gdscr = 0xf004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "gcc_usb30_prim_gdsc", + }, +@@ -3467,6 +3477,9 @@ static int gcc_sc7280_probe(struct platform_device *pdev) + regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0)); + regmap_update_bits(regmap, 0x7100C, BIT(13), BIT(13)); + ++ /* FORCE_MEM_CORE_ON for ufs phy ice core clocks */ ++ qcom_branch_set_force_mem_core(regmap, gcc_ufs_phy_ice_core_clk, true); ++ + ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks, + ARRAY_SIZE(gcc_dfs_clocks)); + if (ret) +diff --git a/drivers/clk/qcom/gpucc-sc7280.c b/drivers/clk/qcom/gpucc-sc7280.c +index 1490cd45a654..a30d9941644d 100644 +--- a/drivers/clk/qcom/gpucc-sc7280.c ++++ b/drivers/clk/qcom/gpucc-sc7280.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: GPL-2.0-only + /* + * Copyright (c) 2021, The Linux Foundation. All rights reserved. ++ * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include <linux/clk-provider.h> +@@ -379,6 +380,9 @@ static struct clk_branch gpu_cc_sleep_clk = { + + static struct gdsc cx_gdsc = { + .gdscr = 0x106c, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0x2, + .gds_hw_ctrl = 0x1540, + .pd = { + .name = "cx_gdsc", +@@ -389,6 +393,9 @@ static struct gdsc cx_gdsc = { + + static struct gdsc gx_gdsc = { + .gdscr = 0x100c, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0x2, + .clamp_io_ctrl = 0x1508, + .pd = { + .name = "gx_gdsc", +diff --git a/drivers/clk/qcom/videocc-sc7280.c b/drivers/clk/qcom/videocc-sc7280.c +index 615695d82319..425b7d1dc3cc 100644 +--- a/drivers/clk/qcom/videocc-sc7280.c ++++ b/drivers/clk/qcom/videocc-sc7280.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: GPL-2.0-only + /* + * Copyright (c) 2021, The Linux Foundation. All rights reserved. ++ * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include <linux/clk-provider.h> +@@ -232,6 +233,9 @@ static struct clk_branch video_cc_venus_ahb_clk = { + + static struct gdsc mvs0_gdsc = { + .gdscr = 0x3004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0x6, + .pd = { + .name = "mvs0_gdsc", + }, +@@ -241,6 +245,9 @@ static struct gdsc mvs0_gdsc = { + + static struct gdsc mvsc_gdsc = { + .gdscr = 0x2004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0x6, + .pd = { + .name = "mvsc_gdsc", + }, +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-drivers/0001-PENDING-dt-bindings-clock-Add-qcom-adsp-skip-pll-pro.patch b/recipes-kernel/linux/linux-yocto/qcm6490-drivers/0001-PENDING-dt-bindings-clock-Add-qcom-adsp-skip-pll-pro.patch new file mode 100644 index 0000000..db0156e --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-drivers/0001-PENDING-dt-bindings-clock-Add-qcom-adsp-skip-pll-pro.patch @@ -0,0 +1,35 @@ +From 8a67d7619a576a3f95be7d27910c89bb801f6d03 Mon Sep 17 00:00:00 2001 +From: Taniya Das <quic_tdas@quicinc.com> +Date: Wed, 1 Nov 2023 10:30:17 +0530 +Subject: [PATCH 1/2] PENDING: dt-bindings: clock: Add "qcom,adsp-skip-pll" + property + +Add support for "qcom,adsp-skip-pll" so as to avoid configuring the +LPASS PLL. + +Signed-off-by: Taniya Das <quic_tdas@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Pending +--- + .../devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml +index 447cdc447a0c..5587d4ca82a6 100644 +--- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml ++++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml +@@ -49,6 +49,11 @@ properties: + peripheral loader. + type: boolean + ++ qcom,adsp-skip-pll: ++ description: ++ Indicates if the LPASS PLL configuration would be skipped. ++ type: boolean ++ + required: + - compatible + - reg +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-drivers/0002-PENDING-clk-qcom-lpassaudiocc-Add-support-to-skip-PL.patch b/recipes-kernel/linux/linux-yocto/qcm6490-drivers/0002-PENDING-clk-qcom-lpassaudiocc-Add-support-to-skip-PL.patch new file mode 100644 index 0000000..4dffe50 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-drivers/0002-PENDING-clk-qcom-lpassaudiocc-Add-support-to-skip-PL.patch @@ -0,0 +1,59 @@ +From 96ef94902f0ce507d21cefb3ffaf841640556cff Mon Sep 17 00:00:00 2001 +From: Taniya Das <quic_tdas@quicinc.com> +Date: Tue, 31 Oct 2023 23:56:38 +0530 +Subject: [PATCH 2/2] PENDING: clk: qcom: lpassaudiocc: Add support to skip PLL + configuration + +On certain targets the PLL configuration should be skipped, thus add a +device property to support the same. + +Signed-off-by: Taniya Das <quic_tdas@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Pending +--- + drivers/clk/qcom/lpassaudiocc-sc7280.c | 14 ++++++++++---- + 1 file changed, 10 insertions(+), 4 deletions(-) + +diff --git a/drivers/clk/qcom/lpassaudiocc-sc7280.c b/drivers/clk/qcom/lpassaudiocc-sc7280.c +index 134eb1529ede..5322ff53a3e1 100644 +--- a/drivers/clk/qcom/lpassaudiocc-sc7280.c ++++ b/drivers/clk/qcom/lpassaudiocc-sc7280.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: GPL-2.0-only + /* + * Copyright (c) 2021, The Linux Foundation. All rights reserved. ++ * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include <linux/clk-provider.h> +@@ -765,11 +766,13 @@ static int lpass_audio_cc_sc7280_probe(struct platform_device *pdev) + goto exit; + } + +- clk_zonda_pll_configure(&lpass_audio_cc_pll, regmap, &lpass_audio_cc_pll_config); ++ if (!of_property_read_bool(pdev->dev.of_node, "qcom,adsp-skip-pll")) { ++ clk_zonda_pll_configure(&lpass_audio_cc_pll, regmap, &lpass_audio_cc_pll_config); + +- /* PLL settings */ +- regmap_write(regmap, 0x4, 0x3b); +- regmap_write(regmap, 0x8, 0xff05); ++ /* PLL settings */ ++ regmap_write(regmap, 0x4, 0x3b); ++ regmap_write(regmap, 0x8, 0xff05); ++ } + + ret = qcom_cc_really_probe(pdev, &lpass_audio_cc_sc7280_desc, regmap); + if (ret) { +@@ -777,6 +780,9 @@ static int lpass_audio_cc_sc7280_probe(struct platform_device *pdev) + goto exit; + } + ++ lpass_audio_cc_sc7280_regmap_config.name = "lpassaudio_cc_reset"; ++ lpass_audio_cc_sc7280_regmap_config.max_register = 0xc8; ++ + ret = qcom_cc_probe_by_index(pdev, 1, &lpass_audio_cc_reset_sc7280_desc); + if (ret) { + dev_err(&pdev->dev, "Failed to register LPASS AUDIO CC Resets\n"); +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0001-FROMLIST-arm64-dts-qcom-sc7280-Add-UFS-nodes-for-sc7.patch b/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0001-FROMLIST-arm64-dts-qcom-sc7280-Add-UFS-nodes-for-sc7.patch new file mode 100644 index 0000000..3b17ae4 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0001-FROMLIST-arm64-dts-qcom-sc7280-Add-UFS-nodes-for-sc7.patch @@ -0,0 +1,97 @@ +From 92c06bd8d2125f45ff52c9a6819c6cd8bf7a575d Mon Sep 17 00:00:00 2001 +From: Nitin Rawat <quic_nitirawa@quicinc.com> +Date: Fri, 29 Sep 2023 18:49:34 +0530 +Subject: [PATCH] FROMLIST: arm64: dts: qcom: sc7280: Add UFS nodes for sc7280 + soc + +Add UFS host controller and PHY nodes for sc7280 soc. + +Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> +Signed-off-by: Manish Pandey <quic_mapa@quicinc.com> +Signed-off-by: Salendarsingh Gaud <quic_sgaud@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Submitted [https://lore.kernel.org/all/20230929131936.29421-3-quic_nitirawa@quicinc.com/] +--- + arch/arm64/boot/dts/qcom/sc7280.dtsi | 66 ++++++++++++++++++++++++++++ + 1 file changed, 66 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi +index 042908048d09..19705df517dd 100644 +--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi ++++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi +@@ -3321,6 +3321,72 @@ opp-202000000 { + }; + }; + ++ ufs_mem_hc: ufs@1d84000 { ++ compatible = "qcom,sc7280-ufshc", "qcom,ufshc", ++ "jedec,ufs-2.0"; ++ reg = <0x0 0x01d84000 0x0 0x3000>; ++ interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; ++ phys = <&ufs_mem_phy>; ++ phy-names = "ufsphy"; ++ lanes-per-direction = <2>; ++ #reset-cells = <1>; ++ resets = <&gcc GCC_UFS_PHY_BCR>; ++ reset-names = "rst"; ++ ++ power-domains = <&gcc GCC_UFS_PHY_GDSC>; ++ required-opps = <&rpmhpd_opp_nom>; ++ ++ iommus = <&apps_smmu 0x80 0x0>; ++ dma-coherent; ++ ++ interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>, ++ <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_UFS_MEM_CFG 0>; ++ ++ clocks = <&gcc GCC_UFS_PHY_AXI_CLK>, ++ <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, ++ <&gcc GCC_UFS_PHY_AHB_CLK>, ++ <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, ++ <&rpmhcc RPMH_CXO_CLK>, ++ <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, ++ <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, ++ <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; ++ clock-names = "core_clk", ++ "bus_aggr_clk", ++ "iface_clk", ++ "core_clk_unipro", ++ "ref_clk", ++ "tx_lane0_sync_clk", ++ "rx_lane0_sync_clk", ++ "rx_lane1_sync_clk"; ++ freq-table-hz = ++ <75000000 300000000>, ++ <0 0>, ++ <0 0>, ++ <75000000 300000000>, ++ <0 0>, ++ <0 0>, ++ <0 0>, ++ <0 0>; ++ status = "disabled"; ++ }; ++ ++ ufs_mem_phy: phy@1d87000 { ++ compatible = "qcom,sc7280-qmp-ufs-phy"; ++ reg = <0x0 0x01d87000 0x0 0xe00>; ++ clocks = <&rpmhcc RPMH_CXO_CLK>, ++ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, ++ <&gcc GCC_UFS_1_CLKREF_EN>; ++ clock-names = "ref", "ref_aux", "qref"; ++ ++ resets = <&ufs_mem_hc 0>; ++ reset-names = "ufsphy"; ++ ++ #clock-cells = <1>; ++ #phy-cells = <0>; ++ ++ status = "disabled"; ++ }; ++ + usb_1_hsphy: phy@88e3000 { + compatible = "qcom,sc7280-usb-hs-phy", + "qcom,usb-snps-hs-7nm-phy"; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0001-FROMLIST-dt-bindings-arm-qcom-Add-QCM6490-Fairphone-.patch b/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0001-FROMLIST-dt-bindings-arm-qcom-Add-QCM6490-Fairphone-.patch new file mode 100644 index 0000000..3250e15 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0001-FROMLIST-dt-bindings-arm-qcom-Add-QCM6490-Fairphone-.patch @@ -0,0 +1,44 @@ +From 5b76f570d28a806bd95390d762c0465d3da83b48 Mon Sep 17 00:00:00 2001 +From: Luca Weiss <luca.weiss@fairphone.com> +Date: Tue, 19 Sep 2023 14:46:00 +0200 +Subject: [PATCH 1/3] FROMLIST: dt-bindings: arm: qcom: Add QCM6490 Fairphone 5 + +Fairphone 5 is a smartphone based on the QCM6490 SoC. + +Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> +Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> +Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> +Signed-off-by: Salendarsingh Gaud <quic_sgaud@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Submitted [https://lore.kernel.org/linux-arm-msm/20230919-fp5-initial-v2-6-14bb7cedadf5@fairphone.com/] +--- + Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml +index 450f616774e0..5d2cbddb6ab8 100644 +--- a/Documentation/devicetree/bindings/arm/qcom.yaml ++++ b/Documentation/devicetree/bindings/arm/qcom.yaml +@@ -49,6 +49,7 @@ description: | + msm8998 + qcs404 + qcm2290 ++ qcm6490 + qdu1000 + qrb2210 + qrb4210 +@@ -382,6 +383,11 @@ properties: + - const: qcom,qrb2210 + - const: qcom,qcm2290 + ++ - items: ++ - enum: ++ - fairphone,fp5 ++ - const: qcom,qcm6490 ++ + - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform + items: + - enum: +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0001-PENDING-arm64-dts-qcm6490-Update-the-protected-clock.patch b/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0001-PENDING-arm64-dts-qcm6490-Update-the-protected-clock.patch new file mode 100644 index 0000000..4dabe20 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0001-PENDING-arm64-dts-qcm6490-Update-the-protected-clock.patch @@ -0,0 +1,79 @@ +From af40873b3994a00cc0c0afd0c35ff44c412edfd3 Mon Sep 17 00:00:00 2001 +From: Taniya Das <quic_tdas@quicinc.com> +Date: Mon, 30 Oct 2023 23:29:06 +0530 +Subject: [PATCH] PENDING: arm64: dts: qcm6490: Update the protected clocks for + QCM6490 + +Certain clocks are not accessible on QCM6490 board and thus require them +to be marked protected. +Also disable the LPASS nodes which are not to be used. + +Signed-off-by: Taniya Das <quic_tdas@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490.dtsi | 48 +++++++++++++++++++++++++++ + 1 file changed, 48 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490.dtsi b/arch/arm64/boot/dts/qcom/qcm6490.dtsi +index b93270cae9ae..cccb50ce6269 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490.dtsi ++++ b/arch/arm64/boot/dts/qcom/qcm6490.dtsi +@@ -81,6 +81,54 @@ trusted_apps_mem: trusted_apps@c1800000 { + }; + }; + ++&gcc { ++ protected-clocks = <GCC_AGGRE_NOC_PCIE_1_AXI_CLK> ,<GCC_PCIE_1_AUX_CLK>, ++ <GCC_PCIE_1_AUX_CLK_SRC>, <GCC_PCIE_1_CFG_AHB_CLK>, ++ <GCC_PCIE_1_MSTR_AXI_CLK>, <GCC_PCIE_1_PHY_RCHNG_CLK_SRC>, ++ <GCC_PCIE_1_PIPE_CLK>, <GCC_PCIE_1_PIPE_CLK_SRC>, ++ <GCC_PCIE_1_SLV_AXI_CLK>, <GCC_PCIE_1_SLV_Q2A_AXI_CLK>, ++ <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, <GCC_QSPI_CORE_CLK>, ++ <GCC_QSPI_CORE_CLK_SRC>,<GCC_USB30_SEC_MASTER_CLK>, ++ <GCC_USB30_SEC_MASTER_CLK_SRC>, <GCC_USB30_SEC_MOCK_UTMI_CLK>, ++ <GCC_USB30_SEC_MOCK_UTMI_CLK_SRC>, ++ <GCC_USB30_SEC_MOCK_UTMI_POSTDIV_CLK_SRC>, <GCC_USB30_SEC_SLEEP_CLK>, ++ <GCC_USB3_SEC_PHY_AUX_CLK>, <GCC_USB3_SEC_PHY_AUX_CLK_SRC>, ++ <GCC_USB3_SEC_PHY_COM_AUX_CLK>, <GCC_USB3_SEC_PHY_PIPE_CLK>, ++ <GCC_USB3_SEC_PHY_PIPE_CLK_SRC>, <GCC_CFG_NOC_LPASS_CLK>, ++ <GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC>, <GCC_MSS_CFG_AHB_CLK>, ++ <GCC_MSS_OFFLINE_AXI_CLK>, <GCC_MSS_SNOC_AXI_CLK>, ++ <GCC_MSS_Q6_MEMNOC_AXI_CLK>, <GCC_MSS_Q6SS_BOOT_CLK_SRC>, ++ <GCC_SEC_CTRL_CLK_SRC>, <GCC_WPSS_AHB_CLK>, ++ <GCC_WPSS_AHB_BDG_MST_CLK>, <GCC_WPSS_RSCP_CLK>; ++}; ++ ++&lpass_audiocc { ++ qcom,adsp-skip-pll; ++ protected-clocks = <LPASS_AUDIO_CC_CDIV_RX_MCLK_DIV_CLK_SRC>, ++ <LPASS_AUDIO_CC_CODEC_MEM0_CLK>, <LPASS_AUDIO_CC_CODEC_MEM1_CLK>, ++ <LPASS_AUDIO_CC_CODEC_MEM2_CLK>, <LPASS_AUDIO_CC_CODEC_MEM_CLK>, ++ <LPASS_AUDIO_CC_EXT_MCLK0_CLK>, <LPASS_AUDIO_CC_EXT_MCLK0_CLK_SRC>, ++ <LPASS_AUDIO_CC_EXT_MCLK1_CLK>, <LPASS_AUDIO_CC_EXT_MCLK1_CLK_SRC>, ++ <LPASS_AUDIO_CC_PLL>, <LPASS_AUDIO_CC_PLL_OUT_AUX2>, ++ <LPASS_AUDIO_CC_PLL_OUT_AUX2_DIV_CLK_SRC>, ++ <LPASS_AUDIO_CC_PLL_OUT_MAIN_DIV_CLK_SRC>, ++ <LPASS_AUDIO_CC_RX_MCLK_2X_CLK>, <LPASS_AUDIO_CC_RX_MCLK_CLK>, ++ <LPASS_AUDIO_CC_RX_MCLK_CLK_SRC>; ++ /delete-property/ power-domains; ++}; ++ ++&lpass_aon { ++ status = "disabled"; ++}; ++ ++&lpass_core { ++ status = "disabled"; ++}; ++ ++&lpass_hm { ++ status = "disabled"; ++}; ++ + &video_mem { + reg = <0x0 0x8a700000 0x0 0x500000>; + }; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0001-PENDING-arm64-dts-qcom-sc7280-Add-interconnect-paths.patch b/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0001-PENDING-arm64-dts-qcom-sc7280-Add-interconnect-paths.patch new file mode 100644 index 0000000..ef6ef52 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0001-PENDING-arm64-dts-qcom-sc7280-Add-interconnect-paths.patch @@ -0,0 +1,31 @@ +From 0fd82fdf7e1a5d6bb1924129849ed351806e1a3d Mon Sep 17 00:00:00 2001 +From: Manish Pandey <quic_mapa@quicinc.com> +Date: Fri, 3 Nov 2023 10:11:01 +0530 +Subject: [PATCH] PENDING: arm64: dts: qcom: sc7280: Add interconnect paths to + UFSHC + +QCOM UFS host controller requires interconnect path configuration +for proper working. So add them for SC7280 SoC. + +Signed-off-by: Manish Pandey <quic_mapa@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/sc7280.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi +index 19705df517dd..1217de1d3266 100644 +--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi ++++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi +@@ -3341,6 +3341,7 @@ ufs_mem_hc: ufs@1d84000 { + + interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_UFS_MEM_CFG 0>; ++ interconnect-names = "ufs-ddr", "cpu-ufs"; + + clocks = <&gcc GCC_UFS_PHY_AXI_CLK>, + <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0001-PENDING-dt-bindings-pinctrl-qcom-sc7280-pinctrl-add-.patch b/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0001-PENDING-dt-bindings-pinctrl-qcom-sc7280-pinctrl-add-.patch new file mode 100644 index 0000000..05eb140 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0001-PENDING-dt-bindings-pinctrl-qcom-sc7280-pinctrl-add-.patch @@ -0,0 +1,32 @@ +From 86cb0766a6e9ad295c9f719adc5f02fd94eb2199 Mon Sep 17 00:00:00 2001 +From: Atul Dhudase <quic_adhudase@quicinc.com> +Date: Tue, 31 Oct 2023 11:18:40 +0530 +Subject: [PATCH 1/2] PENDING: dt-bindings: pinctrl: qcom,sc7280-pinctrl: add + gpio-reserved-ranges + +Add gpio-reserved-ranges property for SC7280 (used on QCM6490 boards). + +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Pending +--- + .../devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml +index 368d44ff5468..c8735ab97e40 100644 +--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml ++++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml +@@ -41,6 +41,10 @@ properties: + gpio-ranges: + maxItems: 1 + ++ gpio-reserved-ranges: ++ minItems: 1 ++ maxItems: 88 ++ + gpio-line-names: + maxItems: 175 + +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0002-FROMLIST-arm64-dts-qcom-Use-QCOM_SCM_VMID-defines-fo.patch b/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0002-FROMLIST-arm64-dts-qcom-Use-QCOM_SCM_VMID-defines-fo.patch new file mode 100644 index 0000000..89b2931 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0002-FROMLIST-arm64-dts-qcom-Use-QCOM_SCM_VMID-defines-fo.patch @@ -0,0 +1,384 @@ +From e2392806ad7d9cfdbcb456cb08ba4f19f4601d2f Mon Sep 17 00:00:00 2001 +From: Luca Weiss <luca.weiss@fairphone.com> +Date: Thu, 5 Oct 2023 16:47:31 +0530 +Subject: [PATCH 2/3] FROMLIST: arm64: dts: qcom: Use QCOM_SCM_VMID defines for + qcom,vmid + +Since we have those defines available in a header, let's use them +everywhere where qcom,vmid property is used. + +Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> +Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> +Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> +Signed-off-by: Salendarsingh Gaud <quic_sgaud@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Submitted [https://lore.kernel.org/linux-arm-msm/20230818-qcom-vmid-defines-v1-1-45b610c96b13@fairphone.com/] +--- + arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi | 2 +- + arch/arm64/boot/dts/qcom/msm8996.dtsi | 3 ++- + arch/arm64/boot/dts/qcom/msm8998.dtsi | 3 ++- + arch/arm64/boot/dts/qcom/sc7180.dtsi | 3 ++- + arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 ++- + arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts | 3 ++- + arch/arm64/boot/dts/qcom/sc8180x-primus.dts | 3 ++- + arch/arm64/boot/dts/qcom/sdm630.dtsi | 3 ++- + arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi | 2 +- + arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi | 2 +- + arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi | 2 +- + arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts | 2 +- + arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- + arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 3 ++- + arch/arm64/boot/dts/qcom/sm8150.dtsi | 3 ++- + arch/arm64/boot/dts/qcom/sm8350.dtsi | 3 ++- + arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara.dtsi | 2 +- + arch/arm64/boot/dts/qcom/sm8450.dtsi | 3 ++- + arch/arm64/boot/dts/qcom/sm8550.dtsi | 3 ++- + 19 files changed, 31 insertions(+), 19 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi +index 3c5719640fab..1a55f84bbb90 100644 +--- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi ++++ b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi +@@ -115,7 +115,7 @@ rmtfs@f6c00000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; + }; + + /delete-node/ mba@91500000; +diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi +index 2ea3117438c3..9478ce84d1c5 100644 +--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi ++++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi +@@ -8,6 +8,7 @@ + #include <dt-bindings/clock/qcom,rpmcc.h> + #include <dt-bindings/interconnect/qcom,msm8996.h> + #include <dt-bindings/interconnect/qcom,msm8996-cbf.h> ++#include <dt-bindings/firmware/qcom,scm.h> + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/soc/qcom,apr.h> +@@ -431,7 +432,7 @@ rmtfs_mem: rmtfs { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; + }; + + mpss_mem: mpss@88800000 { +diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi +index ed764d02819f..f3e1dc5f67e3 100644 +--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi ++++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi +@@ -6,6 +6,7 @@ + #include <dt-bindings/clock/qcom,gpucc-msm8998.h> + #include <dt-bindings/clock/qcom,mmcc-msm8998.h> + #include <dt-bindings/clock/qcom,rpmcc.h> ++#include <dt-bindings/firmware/qcom,scm.h> + #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/gpio/gpio.h> + +@@ -56,7 +57,7 @@ rmtfs_mem: memory@88f00000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; + }; + + spss_mem: memory@8ab00000 { +diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi +index 06df931d8cad..63b6300844a9 100644 +--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi ++++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi +@@ -11,6 +11,7 @@ + #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h> + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/clock/qcom,videocc-sc7180.h> ++#include <dt-bindings/firmware/qcom,scm.h> + #include <dt-bindings/interconnect/qcom,icc.h> + #include <dt-bindings/interconnect/qcom,osm-l3.h> + #include <dt-bindings/interconnect/qcom,sc7180.h> +@@ -620,7 +621,7 @@ rmtfs_mem: memory@94600000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; + }; + }; + +diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi +index 925428a5f6ae..042908048d09 100644 +--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi ++++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi +@@ -13,6 +13,7 @@ + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/clock/qcom,videocc-sc7280.h> + #include <dt-bindings/dma/qcom-gpi.h> ++#include <dt-bindings/firmware/qcom,scm.h> + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interconnect/qcom,osm-l3.h> + #include <dt-bindings/interconnect/qcom,sc7280.h> +@@ -156,7 +157,7 @@ rmtfs_mem: memory@9c900000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; + }; + }; + +diff --git a/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts b/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts +index fe3b366e1435..3f459d685f26 100644 +--- a/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts ++++ b/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts +@@ -6,6 +6,7 @@ + + /dts-v1/; + ++#include <dt-bindings/firmware/qcom,scm.h> + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/input/gpio-keys.h> + #include <dt-bindings/input/input.h> +@@ -52,7 +53,7 @@ rmtfs_mem: rmtfs-region@85500000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; + }; + + wlan_mem: wlan-region@8bc00000 { +diff --git a/arch/arm64/boot/dts/qcom/sc8180x-primus.dts b/arch/arm64/boot/dts/qcom/sc8180x-primus.dts +index fc038474cb71..8e06df27a344 100644 +--- a/arch/arm64/boot/dts/qcom/sc8180x-primus.dts ++++ b/arch/arm64/boot/dts/qcom/sc8180x-primus.dts +@@ -6,6 +6,7 @@ + + /dts-v1/; + ++#include <dt-bindings/firmware/qcom,scm.h> + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/input/gpio-keys.h> + #include <dt-bindings/input/input.h> +@@ -57,7 +58,7 @@ rmtfs_mem: rmtfs-region@85500000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; + }; + + wlan_mem: wlan-region@8bc00000 { +diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi +index 759b3a5964cc..691cddd02897 100644 +--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi ++++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi +@@ -8,6 +8,7 @@ + #include <dt-bindings/clock/qcom,gpucc-sdm660.h> + #include <dt-bindings/clock/qcom,mmcc-sdm660.h> + #include <dt-bindings/clock/qcom,rpmcc.h> ++#include <dt-bindings/firmware/qcom,scm.h> + #include <dt-bindings/interconnect/qcom,sdm660.h> + #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/gpio/gpio.h> +@@ -385,7 +386,7 @@ rmtfs_mem: memory@85e00000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; + }; + + smem_region: smem-mem@86000000 { +diff --git a/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi +index f942c5afea9b..99dafc6716e7 100644 +--- a/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi ++++ b/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi +@@ -111,7 +111,7 @@ rmtfs_mem: memory@f0801000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; + }; + + /* rmtfs upper guard */ +diff --git a/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi +index 122c7128dea9..b523b5fff702 100644 +--- a/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi ++++ b/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi +@@ -90,7 +90,7 @@ rmtfs_mem: rmtfs-mem@f5b01000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; + }; + rmtfs_upper_guard: rmtfs-upper-guard@f5d01000 { + no-map; +diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi +index 9d6faeb65624..93b1582e807d 100644 +--- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi ++++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi +@@ -111,7 +111,7 @@ rmtfs_mem: memory@f6301000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; + }; + }; + +diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts +index 6db12abaa88d..e386b504e978 100644 +--- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts ++++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts +@@ -108,7 +108,7 @@ rmtfs_mem: memory@f6301000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; + }; + }; + +diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi +index 89520a9fe1e3..862d1cf6c63c 100644 +--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi ++++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi +@@ -813,7 +813,7 @@ rmtfs_mem: rmtfs@88f00000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; + }; + + qseecom_mem: qseecom@8ab00000 { +diff --git a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts +index e3dc49951523..45951810fa82 100644 +--- a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts ++++ b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts +@@ -8,6 +8,7 @@ + /* PMK8350 (in reality a PMK8003) is configured to use SID6 instead of 0 */ + #define PMK8350_SID 6 + ++#include <dt-bindings/firmware/qcom,scm.h> + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> + #include <dt-bindings/input/input.h> +@@ -75,7 +76,7 @@ memory@efe01000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; + }; + }; + +diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi +index 06c53000bb74..ef072f0413d4 100644 +--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi +@@ -5,6 +5,7 @@ + */ + + #include <dt-bindings/dma/qcom-gpi.h> ++#include <dt-bindings/firmware/qcom,scm.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/soc/qcom,rpmh-rsc.h> +@@ -720,7 +721,7 @@ rmtfs_mem: memory@89b00000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; + }; + + camera_mem: memory@8b700000 { +diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi +index c236967725c1..ff92901f587e 100644 +--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi +@@ -10,6 +10,7 @@ + #include <dt-bindings/clock/qcom,gpucc-sm8350.h> + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/dma/qcom-gpi.h> ++#include <dt-bindings/firmware/qcom,scm.h> + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interconnect/qcom,sm8350.h> + #include <dt-bindings/mailbox/qcom-ipcc.h> +@@ -492,7 +493,7 @@ rmtfs_mem: memory@9b800000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; + }; + + hyp_reserved_mem: memory@d0000000 { +diff --git a/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara.dtsi b/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara.dtsi +index 001fb2723fbb..8b29fcf483a3 100644 +--- a/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara.dtsi +@@ -80,7 +80,7 @@ rmtfs_mem: memory@f3300000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; + }; + + ramoops@ffc00000 { +diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi +index 42b23ba7a573..e1b768d6ad3b 100644 +--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi +@@ -10,6 +10,7 @@ + #include <dt-bindings/clock/qcom,sm8450-dispcc.h> + #include <dt-bindings/clock/qcom,sm8450-videocc.h> + #include <dt-bindings/dma/qcom-gpi.h> ++#include <dt-bindings/firmware/qcom,scm.h> + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/mailbox/qcom-ipcc.h> + #include <dt-bindings/phy/phy-qcom-qmp.h> +@@ -538,7 +539,7 @@ rmtfs_mem: memory@9fd00000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; + }; + + xbl_sc_mem2: memory@a6e00000 { +diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi +index 6e8aba256931..681abf91e8a7 100644 +--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi +@@ -10,6 +10,7 @@ + #include <dt-bindings/clock/qcom,sm8550-tcsr.h> + #include <dt-bindings/clock/qcom,sm8550-dispcc.h> + #include <dt-bindings/dma/qcom-gpi.h> ++#include <dt-bindings/firmware/qcom,scm.h> + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interconnect/qcom,sm8550-rpmh.h> +@@ -569,7 +570,7 @@ rmtfs_mem: rmtfs-region@d4a80000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; + }; + + mpss_dsm_mem: mpss-dsm-region@d4d00000 { +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0002-PENDING-arm64-dts-qcom-qcm6490-Add-gpio-reserved-ran.patch b/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0002-PENDING-arm64-dts-qcom-qcm6490-Add-gpio-reserved-ran.patch new file mode 100644 index 0000000..a2aed05 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0002-PENDING-arm64-dts-qcom-qcm6490-Add-gpio-reserved-ran.patch @@ -0,0 +1,32 @@ +From 0d6eef8eeb4124a0598f7c109181f4fe7674484f Mon Sep 17 00:00:00 2001 +From: Atul Dhudase <quic_adhudase@quicinc.com> +Date: Tue, 31 Oct 2023 11:30:18 +0530 +Subject: [PATCH 2/2] PENDING: arm64: dts: qcom: qcm6490: Add + gpio-reserved-ranges + +Add gpio-reserved-ranges for QCM6490 boards. + +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490.dtsi | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490.dtsi b/arch/arm64/boot/dts/qcom/qcm6490.dtsi +index cccb50ce6269..e05e0f3b4b12 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490.dtsi ++++ b/arch/arm64/boot/dts/qcom/qcm6490.dtsi +@@ -129,6 +129,10 @@ &lpass_hm { + status = "disabled"; + }; + ++&tlmm { ++ gpio-reserved-ranges = <32 2>, <48 4>; ++}; ++ + &video_mem { + reg = <0x0 0x8a700000 0x0 0x500000>; + }; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0003-FROMLIST-arm64-dts-qcom-Add-qcm6490-dts-file.patch b/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0003-FROMLIST-arm64-dts-qcom-Add-qcm6490-dts-file.patch new file mode 100644 index 0000000..75e02e3 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcm6490-dtsi/0003-FROMLIST-arm64-dts-qcom-Add-qcm6490-dts-file.patch @@ -0,0 +1,480 @@ +From cfb0bbdb1d965e65a090303000a87b67a774f6d4 Mon Sep 17 00:00:00 2001 +From: Komal Bajaj <quic_kbajaj@quicinc.com> +Date: Thu, 5 Oct 2023 18:37:05 +0530 +Subject: [PATCH 3/3] FROMLIST: arm64: dts: qcom: Add qcm6490 dts file + +Add qcm6490 devicetree file for QCM6490 SoC and QCM6490 IDP +platform. QCM6490 is derived from SC7280 meant for various +form factor including IoT. + +Supported features are, as of now: +* Debug UART +* eMMC +* USB + +Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> +Signed-off-by: Salendarsingh Gaud <quic_sgaud@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Submitted [https://lore.kernel.org/linux-arm-msm/20231003175456.14774-3-quic_kbajaj@quicinc.com/] +--- + arch/arm64/boot/dts/qcom/Makefile | 1 + + arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 333 +++++++++++++++++++++++ + arch/arm64/boot/dts/qcom/qcm6490.dtsi | 94 +++++++ + 3 files changed, 428 insertions(+) + create mode 100644 arch/arm64/boot/dts/qcom/qcm6490-idp.dts + create mode 100644 arch/arm64/boot/dts/qcom/qcm6490.dtsi + +diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile +index 337abc4ceb17..f597224e3dcb 100644 +--- a/arch/arm64/boot/dts/qcom/Makefile ++++ b/arch/arm64/boot/dts/qcom/Makefile +@@ -78,6 +78,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-lilac.dtb + dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-maple.dtb + dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-poplar.dtb + dtb-$(CONFIG_ARCH_QCOM) += msm8998-xiaomi-sagit.dtb ++dtb-$(CONFIG_ARCH_QCOM) += qcm6490-idp.dtb + dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb + dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb + dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +new file mode 100644 +index 000000000000..9b1bf7d1c98d +--- /dev/null ++++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +@@ -0,0 +1,333 @@ ++// SPDX-License-Identifier: BSD-3-Clause ++/* ++ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. ++ */ ++ ++/dts-v1/; ++ ++#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> ++#include <dt-bindings/regulator/qcom,rpmh-regulator.h> ++#include "qcm6490.dtsi" ++#include "pm7325.dtsi" ++#include "pm8350c.dtsi" ++#include "pmk8350.dtsi" ++ ++/ { ++ model = "Qualcomm Technologies, Inc. QCM6490 IDP"; ++ compatible = "qcom,qcm6490-idp", "qcom,qcm6490"; ++ ++ aliases { ++ serial0 = &uart5; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++}; ++ ++&apps_rsc { ++ regulators-0 { ++ compatible = "qcom,pm7325-rpmh-regulators"; ++ qcom,pmic-id = "b"; ++ ++ vreg_s1b_1p8: smps1 { ++ regulator-min-microvolt = <1856000>; ++ regulator-max-microvolt = <2040000>; ++ }; ++ ++ vreg_s7b_0p9: smps7 { ++ regulator-min-microvolt = <535000>; ++ regulator-max-microvolt = <1120000>; ++ }; ++ ++ vreg_s8b_1p2: smps8 { ++ regulator-min-microvolt = <1256000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_RET>; ++ }; ++ ++ vreg_l1b_0p8: ldo1 { ++ regulator-min-microvolt = <825000>; ++ regulator-max-microvolt = <925000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l2b_3p0: ldo2 { ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l6b_1p2: ldo6 { ++ regulator-min-microvolt = <1140000>; ++ regulator-max-microvolt = <1260000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l7b_2p9: ldo7 { ++ regulator-min-microvolt = <2960000>; ++ regulator-max-microvolt = <2960000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l8b_0p9: ldo8 { ++ regulator-min-microvolt = <870000>; ++ regulator-max-microvolt = <970000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l9b_1p2: ldo9 { ++ regulator-min-microvolt = <1080000>; ++ regulator-max-microvolt = <1304000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l11b_1p7: ldo11 { ++ regulator-min-microvolt = <1504000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l12b_0p8: ldo12 { ++ regulator-min-microvolt = <751000>; ++ regulator-max-microvolt = <824000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l13b_0p8: ldo13 { ++ regulator-min-microvolt = <530000>; ++ regulator-max-microvolt = <824000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l14b_1p2: ldo14 { ++ regulator-min-microvolt = <1080000>; ++ regulator-max-microvolt = <1304000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l15b_0p8: ldo15 { ++ regulator-min-microvolt = <765000>; ++ regulator-max-microvolt = <1020000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l16b_1p2: ldo16 { ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1300000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l17b_1p8: ldo17 { ++ regulator-min-microvolt = <1700000>; ++ regulator-max-microvolt = <1900000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l18b_1p8: ldo18 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l19b_1p8: ldo19 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ }; ++ ++ regulators-1 { ++ compatible = "qcom,pm8350c-rpmh-regulators"; ++ qcom,pmic-id = "c"; ++ ++ vreg_s1c_2p2: smps1 { ++ regulator-min-microvolt = <2190000>; ++ regulator-max-microvolt = <2210000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_s9c_1p0: smps9 { ++ regulator-min-microvolt = <1010000>; ++ regulator-max-microvolt = <1170000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l1c_1p8: ldo1 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1980000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l2c_1p8: ldo2 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <1980000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l3c_3p0: ldo3 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <3540000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l4c_1p8: ldo4 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l5c_1p8: ldo5 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l6c_2p9: ldo6 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <2950000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l7c_3p0: ldo7 { ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l8c_1p8: ldo8 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l9c_2p9: ldo9 { ++ regulator-min-microvolt = <2960000>; ++ regulator-max-microvolt = <2960000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l10c_0p8: ldo10 { ++ regulator-min-microvolt = <720000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l11c_2p8: ldo11 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l12c_1p8: ldo12 { ++ regulator-min-microvolt = <1650000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_l13c_3p0: ldo13 { ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ }; ++ ++ vreg_bob: bob { ++ regulator-min-microvolt = <3008000>; ++ regulator-max-microvolt = <3960000>; ++ }; ++ }; ++}; ++ ++&gpi_dma0 { ++ status = "okay"; ++}; ++ ++&gpi_dma1 { ++ status = "okay"; ++}; ++ ++&pm8350c_pwm { ++ status = "okay"; ++}; ++ ++&qup_uart5_rx { ++ drive-strength = <2>; ++ bias-pull-up; ++}; ++ ++&qup_uart5_tx { ++ drive-strength = <2>; ++ bias-disable; ++}; ++ ++&qupv3_id_0 { ++ status = "okay"; ++}; ++ ++&qupv3_id_1 { ++ status = "okay"; ++}; ++ ++&sdc1_clk { ++ bias-disable; ++ drive-strength = <16>; ++}; ++ ++&sdc1_cmd { ++ bias-pull-up; ++ drive-strength = <10>; ++}; ++ ++&sdc1_data { ++ bias-pull-up; ++ drive-strength = <10>; ++}; ++ ++&sdc1_rclk { ++ bias-pull-down; ++}; ++ ++&sdhc_1 { ++ non-removable; ++ no-sd; ++ no-sdio; ++ ++ vmmc-supply = <&vreg_l7b_2p9>; ++ vqmmc-supply = <&vreg_l19b_1p8>; ++ ++ status = "okay"; ++}; ++ ++&uart5 { ++ compatible = "qcom,geni-debug-uart"; ++ status = "okay"; ++}; ++ ++&usb_1 { ++ status = "okay"; ++}; ++ ++&usb_1_dwc3 { ++ dr_mode = "peripheral"; ++}; ++ ++&usb_1_hsphy { ++ vdda-pll-supply = <&vreg_l10c_0p8>; ++ vdda33-supply = <&vreg_l2b_3p0>; ++ vdda18-supply = <&vreg_l1c_1p8>; ++ qcom,hs-rise-fall-time-bp = <0>; ++ qcom,squelch-detector-bp = <(-2090)>; ++ qcom,hs-disconnect-bp = <1743>; ++ qcom,hs-amplitude-bp = <1780>; ++ qcom,hs-crossover-voltage-microvolt = <(-31000)>; ++ qcom,hs-output-impedance-micro-ohms = <2600000>; ++ ++ status = "okay"; ++}; ++ ++&usb_1_qmpphy { ++ vdda-phy-supply = <&vreg_l6b_1p2>; ++ vdda-pll-supply = <&vreg_l1b_0p8>; ++ ++ status = "okay"; ++}; +diff --git a/arch/arm64/boot/dts/qcom/qcm6490.dtsi b/arch/arm64/boot/dts/qcom/qcm6490.dtsi +new file mode 100644 +index 000000000000..b93270cae9ae +--- /dev/null ++++ b/arch/arm64/boot/dts/qcom/qcm6490.dtsi +@@ -0,0 +1,94 @@ ++// SPDX-License-Identifier: BSD-3-Clause ++/* ++ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. ++ */ ++ ++#include "sc7280.dtsi" ++ ++/* ++ * Delete unused sc7280 memory nodes and define the memory regions ++ * required by qcm6490 ++ */ ++/delete-node/ &rmtfs_mem; ++/delete-node/ &wlan_ce_mem; ++ ++/{ ++ reserved-memory { ++ cdsp_secure_heap_mem: cdsp-secure-heap@81800000 { ++ reg = <0x0 0x81800000 0x0 0x1e00000>; ++ no-map; ++ }; ++ ++ camera_mem: camera@84300000 { ++ reg = <0x0 0x84300000 0x0 0x500000>; ++ no-map; ++ }; ++ ++ wpss_mem: wpss@0x84800000 { ++ reg = <0x0 0x84800000 0x0 0x1900000>; ++ no-map; ++ }; ++ ++ adsp_mem: adsp@86100000 { ++ reg = <0x0 0x86100000 0x0 0x2800000>; ++ no-map; ++ }; ++ ++ cdsp_mem: cdsp@88900000 { ++ reg = <0x0 0x88900000 0x0 0x1e00000>; ++ no-map; ++ }; ++ ++ cvp_mem: cvp@8ac00000 { ++ reg = <0x0 0x8ac00000 0x0 0x500000>; ++ no-map; ++ }; ++ ++ ipa_gsi_mem: ipa-gsi@8b110000 { ++ reg = <0x0 0x8b110000 0x0 0xa000>; ++ no-map; ++ }; ++ ++ gpu_microcode_mem: gpu-microcode@8b11a000 { ++ reg = <0x0 0x8b11a000 0x0 0x2000>; ++ no-map; ++ }; ++ ++ mpss_mem: mpss@8b800000 { ++ reg = <0x0 0x8b800000 0x0 0xf600000>; ++ no-map; ++ }; ++ ++ tz_stat_mem: tz-stat@c0000000 { ++ reg = <0x0 0xc0000000 0x0 0x100000>; ++ no-map; ++ }; ++ ++ tags_mem: tags@c0100000 { ++ reg = <0x0 0xc0100000 0x0 0x1200000>; ++ no-map; ++ }; ++ ++ qtee_mem: qtee@c1300000 { ++ reg = <0x0 0xc1300000 0x0 0x500000>; ++ no-map; ++ }; ++ ++ trusted_apps_mem: trusted_apps@c1800000 { ++ reg = <0x0 0xc1800000 0x0 0x3900000>; ++ no-map; ++ }; ++ }; ++}; ++ ++&video_mem { ++ reg = <0x0 0x8a700000 0x0 0x500000>; ++}; ++ ++&wifi { ++ memory-region = <&wlan_fw_mem>; ++}; ++ ++&xbl_mem { ++ reg = <0x0 0x80700000 0x0 0x100000>; ++}; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/qcom.scc b/recipes-kernel/linux/linux-yocto/qcom.scc new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qcom.scc diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-drivers/0001_dt_bindings_display_msm_qcm2290_mdss_use_the_non_deprecated_dsi_compat.patch b/recipes-kernel/linux/linux-yocto/qrb2210-drivers/0001_dt_bindings_display_msm_qcm2290_mdss_use_the_non_deprecated_dsi_compat.patch new file mode 100644 index 0000000..04ccd0f --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-drivers/0001_dt_bindings_display_msm_qcm2290_mdss_use_the_non_deprecated_dsi_compat.patch @@ -0,0 +1,45 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: dt-bindings: display: msm: qcm2290-mdss: Use the non-deprecated DSI compat +Date: Wed, 29 Nov 2023 15:43:58 +0100 + +The "qcom,dsi-ctrl-6g-qcm2290" has been deprecated in commit 0c0f65c6dd44 +("dt-bindings: msm: dsi-controller-main: Add compatible strings for every +current SoC"), but the example hasn't been updated to reflect that. + +Fix that. + +Fixes: 0c0f65c6dd44 ("dt-bindings: msm: dsi-controller-main: Add compatible strings for every current SoC") +Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Upstream-Status: Backport [https://gitlab.freedesktop.org/lumag/msm/-/commit/25daacc60394] +--- + .../devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +diff --git a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml +index 5ad155612b6c..d71a8e09a798 100644 +--- a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml ++++ b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml +@@ -56,7 +56,9 @@ patternProperties: + + properties: + compatible: +- const: qcom,dsi-ctrl-6g-qcm2290 ++ items: ++ - const: qcom,qcm2290-dsi-ctrl ++ - const: qcom,mdss-dsi-ctrl + + "^phy@[0-9a-f]+$": + type: object +@@ -136,7 +138,8 @@ examples: + }; + + dsi@5e94000 { +- compatible = "qcom,dsi-ctrl-6g-qcm2290"; ++ compatible = "qcom,qcm2290-dsi-ctrl", ++ "qcom,mdss-dsi-ctrl"; + reg = <0x05e94000 0x400>; + reg-names = "dsi_ctrl"; + +-- +2.43.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-drivers/0003_dt_bindings_interconnect_qcom_msm8998_bwmon_add_qcm2290_bwmon_instance.patch b/recipes-kernel/linux/linux-yocto/qrb2210-drivers/0003_dt_bindings_interconnect_qcom_msm8998_bwmon_add_qcm2290_bwmon_instance.patch new file mode 100644 index 0000000..2d2488d --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-drivers/0003_dt_bindings_interconnect_qcom_msm8998_bwmon_add_qcm2290_bwmon_instance.patch @@ -0,0 +1,27 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: dt-bindings: interconnect: qcom,msm8998-bwmon: Add QCM2290 bwmon instance +Date: Wed, 29 Nov 2023 15:44:00 +0100 + +QCM2290 has a single BWMONv4 intance for CPU. Document it. + +Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Upstream-Status: Submitted [https://lore.kernel.org/linux-arm-msm/20231125-topic-rb1_feat-v3-3-4cbb567743bb@linaro.org/] +--- + Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml +index 7cb8df757477..a88cea732370 100644 +--- a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml ++++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml +@@ -25,6 +25,7 @@ properties: + - const: qcom,msm8998-bwmon # BWMON v4 + - items: + - enum: ++ - qcom,qcm2290-cpu-bwmon + - qcom,sc7180-cpu-bwmon + - qcom,sc7280-cpu-bwmon + - qcom,sc8280xp-cpu-bwmon +-- +2.43.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-drivers/0004_dt_bindings_firmware_qcom_scm_allow_interconnect_for_everyone.patch b/recipes-kernel/linux/linux-yocto/qrb2210-drivers/0004_dt_bindings_firmware_qcom_scm_allow_interconnect_for_everyone.patch new file mode 100644 index 0000000..96a0624 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-drivers/0004_dt_bindings_firmware_qcom_scm_allow_interconnect_for_everyone.patch @@ -0,0 +1,42 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: dt-bindings: firmware: qcom,scm: Allow interconnect for everyone +Date: Wed, 29 Nov 2023 15:44:01 +0100 + +Every Qualcomm SoC physically has a "CRYPTO0<->DDR" interconnect lane. +Allow this property to be present, no matter the SoC. + +Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 56fdc35ef067c8dffee22038dd3a84bb3fa6d2a4] +--- + Documentation/devicetree/bindings/firmware/qcom,scm.yaml | 15 --------------- + 1 file changed, 15 deletions(-) + +diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml +index 0613a37a851a..f3a87a8426d0 100644 +--- a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml ++++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml +@@ -178,21 +178,6 @@ allOf: + minItems: 3 + maxItems: 3 + +- # Interconnects +- - if: +- not: +- properties: +- compatible: +- contains: +- enum: +- - qcom,scm-qdu1000 +- - qcom,scm-sc8280xp +- - qcom,scm-sm8450 +- - qcom,scm-sm8550 +- then: +- properties: +- interconnects: false +- + # Interrupts + - if: + not: +-- +2.43.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-drivers/0005_iommu_arm_smmu_qcom_add_qcm2290_mdss_compatible.patch b/recipes-kernel/linux/linux-yocto/qrb2210-drivers/0005_iommu_arm_smmu_qcom_add_qcm2290_mdss_compatible.patch new file mode 100644 index 0000000..82a4091 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-drivers/0005_iommu_arm_smmu_qcom_add_qcm2290_mdss_compatible.patch @@ -0,0 +1,28 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: iommu/arm-smmu-qcom: Add QCM2290 MDSS compatible +Date: Wed, 29 Nov 2023 15:44:02 +0100 + +Add the QCM2290 MDSS compatible to clients compatible list, as it also +needs the workarounds. + +Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/will/c/28af105cb650] +--- + drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +index 549ae4dba3a6..aea5e85b20ff 100644 +--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c ++++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +@@ -245,6 +245,7 @@ static const struct of_device_id qcom_smmu_client_of_match[] __maybe_unused = { + { .compatible = "qcom,adreno" }, + { .compatible = "qcom,mdp4" }, + { .compatible = "qcom,mdss" }, ++ { .compatible = "qcom,qcm2290-mdss" }, + { .compatible = "qcom,sc7180-mdss" }, + { .compatible = "qcom,sc7180-mss-pil" }, + { .compatible = "qcom,sc7280-mdss" }, +-- +2.43.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/0001-arm64-dts-qcom-qcm2290-Hook-up-MPM.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/0001-arm64-dts-qcom-qcm2290-Hook-up-MPM.patch new file mode 100644 index 0000000..d1e935d --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/0001-arm64-dts-qcom-qcm2290-Hook-up-MPM.patch @@ -0,0 +1,114 @@ +From e3f6a699404154e7e103f8055f21c3556721603f Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Fri, 15 Dec 2023 01:01:10 +0100 +Subject: [PATCH] arm64: dts: qcom: qcm2290: Hook up MPM + +Wire up MPM and the interrupts it provides. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20231215-topic-mpm_dt-v1-3-c6636fc75ce3@linaro.org +Signed-off-by: Bjorn Andersson <andersson@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git e3f6a699404154e7e103f8055f21c3556721603f] +--- + arch/arm64/boot/dts/qcom/qcm2290.dtsi | 42 ++++++++++++++++++++++----- + 1 file changed, 35 insertions(+), 7 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi +index ce04d0acdede..0911fb08ed63 100644 +--- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi ++++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi +@@ -199,6 +199,7 @@ CPU_PD3: power-domain-cpu3 { + + CLUSTER_PD: power-domain-cpu-cluster { + #power-domain-cells = <0>; ++ power-domains = <&mpm>; + domain-idle-states = <&CLUSTER_SLEEP>; + }; + }; +@@ -266,6 +267,24 @@ rpmpd_opp_turbo_plus: opp8 { + }; + }; + }; ++ ++ mpm: interrupt-controller { ++ compatible = "qcom,mpm"; ++ qcom,rpm-msg-ram = <&apss_mpm>; ++ interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; ++ mboxes = <&apcs_glb 1>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ #power-domain-cells = <0>; ++ interrupt-parent = <&intc>; ++ qcom,mpm-pin-count = <96>; ++ qcom,mpm-pin-map = <2 275>, /* TSENS0 uplow */ ++ <5 296>, /* Soundwire master_irq */ ++ <12 422>, /* DWC3 ss_phy_irq */ ++ <24 79>, /* Soundwire wake_irq */ ++ <86 183>, /* MPM wake, SPMI */ ++ <90 260>; /* QUSB2_PHY DP+DM */ ++ }; + }; + + reserved_memory: reserved-memory { +@@ -429,6 +448,7 @@ tlmm: pinctrl@500000 { + interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + gpio-ranges = <&tlmm 0 0 127>; ++ wakeup-parent = <&mpm>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; +@@ -778,7 +798,7 @@ spmi_bus: spmi@1c40000 { + "obsrvr", + "intr", + "cnfg"; +- interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; ++ interrupts-extended = <&mpm 86 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "periph_irq"; + qcom,ee = <0>; + qcom,channel = <0>; +@@ -793,8 +813,8 @@ tsens0: thermal-sensor@4411000 { + reg = <0x0 0x04411000 0x0 0x1ff>, + <0x0 0x04410000 0x0 0x8>; + #qcom,sensors = <10>; +- interrupts = <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, +- <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; ++ interrupts-extended = <&mpm 2 IRQ_TYPE_LEVEL_HIGH>, ++ <&intc GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + }; +@@ -813,8 +833,15 @@ bimc: interconnect@4480000 { + }; + + rpm_msg_ram: sram@45f0000 { +- compatible = "qcom,rpm-msg-ram"; ++ compatible = "qcom,rpm-msg-ram", "mmio-sram"; + reg = <0x0 0x045f0000 0x0 0x7000>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges = <0 0x0 0x045f0000 0x7000>; ++ ++ apss_mpm: sram@1b8 { ++ reg = <0x1b8 0x48>; ++ }; + }; + + sram@4690000 { +@@ -1293,9 +1320,10 @@ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, + usb: usb@4ef8800 { + compatible = "qcom,qcm2290-dwc3", "qcom,dwc3"; + reg = <0x0 0x04ef8800 0x0 0x400>; +- interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, +- <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>; +- interrupt-names = "hs_phy_irq", "ss_phy_irq"; ++ interrupts-extended = <&intc GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, ++ <&mpm 12 IRQ_TYPE_LEVEL_HIGH>; ++ interrupt-names = "hs_phy_irq", ++ "ss_phy_irq"; + + clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>, +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0006_arm64_dts_qcom_sc7180_add_the_missing_mdss_icc_path.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0006_arm64_dts_qcom_sc7180_add_the_missing_mdss_icc_path.patch new file mode 100644 index 0000000..d6d6807 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0006_arm64_dts_qcom_sc7180_add_the_missing_mdss_icc_path.patch @@ -0,0 +1,37 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: arm64: dts: qcom: sc7180: Add the missing MDSS icc path +Date: Wed, 29 Nov 2023 15:44:03 +0100 + +MDSS, aside from the MDP-MEM path, also requires the CPU-DISP_CFG one. +Failing to provide it may result in register accesses failing and that's +never good. + +Add the missing path. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 8786398f8686d1a4267ab52f830b25f17e6d62fc] +--- + arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi +index 11f353d416b4..9664e42faeb1 100644 +--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi ++++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi +@@ -3100,8 +3100,12 @@ mdss: display-subsystem@ae00000 { + interrupt-controller; + #interrupt-cells = <1>; + +- interconnects = <&mmss_noc MASTER_MDP0 0 &mc_virt SLAVE_EBI1 0>; +- interconnect-names = "mdp0-mem"; ++ interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ALWAYS ++ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, ++ <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS ++ &config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ALWAYS>; ++ interconnect-names = "mdp0-mem", ++ "cpu-cfg"; + + iommus = <&apps_smmu 0x800 0x2>; + +-- +2.43.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0007_arm64_dts_qcom_sc7280_add_the_missing_mdss_icc_path.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0007_arm64_dts_qcom_sc7280_add_the_missing_mdss_icc_path.patch new file mode 100644 index 0000000..cc2fa10 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0007_arm64_dts_qcom_sc7280_add_the_missing_mdss_icc_path.patch @@ -0,0 +1,45 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: arm64: dts: qcom: sc7280: Add the missing MDSS icc path +Date: Wed, 29 Nov 2023 15:44:04 +0100 + +MDSS, aside from the MDP-MEM path, also requires the CPU-DISP_CFG one. +Failing to provide it may result in register accesses failing and that's +never good. + +Add the missing path. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git c657056d99878c8a8ea84d5d4a9101bcb90b47f2] +--- + arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi +index 04bf85b0399a..41d327b1f1b6 100644 +--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi ++++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi +@@ -15,6 +15,7 @@ + #include <dt-bindings/dma/qcom-gpi.h> + #include <dt-bindings/firmware/qcom,scm.h> + #include <dt-bindings/gpio/gpio.h> ++#include <dt-bindings/interconnect/qcom,icc.h> + #include <dt-bindings/interconnect/qcom,osm-l3.h> + #include <dt-bindings/interconnect/qcom,sc7280.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> +@@ -3958,8 +3959,12 @@ mdss: display-subsystem@ae00000 { + interrupt-controller; + #interrupt-cells = <1>; + +- interconnects = <&mmss_noc MASTER_MDP0 0 &mc_virt SLAVE_EBI1 0>; +- interconnect-names = "mdp0-mem"; ++ interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ALWAYS ++ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, ++ <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS ++ &cnoc2 SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ALWAYS>; ++ interconnect-names = "mdp0-mem", ++ "cpu-cfg"; + + iommus = <&apps_smmu 0x900 0x402>; + +-- +2.43.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0008_arm64_dts_qcom_qcm2290_add_display_nodes.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0008_arm64_dts_qcom_qcm2290_add_display_nodes.patch new file mode 100644 index 0000000..577adb0 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0008_arm64_dts_qcom_qcm2290_add_display_nodes.patch @@ -0,0 +1,247 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: arm64: dts: qcom: qcm2290: Add display nodes +Date: Wed, 29 Nov 2023 15:44:05 +0100 + +Add the required nodes to support display on QCM2290. + +Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git a2b32096709dbf4af02675d98356a9d3ad86ff05] +--- + arch/arm64/boot/dts/qcom/qcm2290.dtsi | 214 ++++++++++++++++++++++++++++++++++ + 1 file changed, 214 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi +index d46e591e72b5..a3edc4667cc5 100644 +--- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi ++++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi +@@ -5,6 +5,7 @@ + * Based on sm6115.dtsi and previous efforts by Shawn Guo & Loic Poulain. + */ + ++#include <dt-bindings/clock/qcom,dispcc-qcm2290.h> + #include <dt-bindings/clock/qcom,gcc-qcm2290.h> + #include <dt-bindings/clock/qcom,rpmcc.h> + #include <dt-bindings/dma/qcom-gpi.h> +@@ -1105,6 +1106,219 @@ usb_dwc3: usb@4e00000 { + }; + }; + ++ mdss: display-subsystem@5e00000 { ++ compatible = "qcom,qcm2290-mdss"; ++ reg = <0x0 0x05e00000 0x0 0x1000>; ++ reg-names = "mdss"; ++ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ ++ clocks = <&gcc GCC_DISP_AHB_CLK>, ++ <&gcc GCC_DISP_HF_AXI_CLK>, ++ <&dispcc DISP_CC_MDSS_MDP_CLK>; ++ clock-names = "iface", ++ "bus", ++ "core"; ++ ++ resets = <&dispcc DISP_CC_MDSS_CORE_BCR>; ++ ++ power-domains = <&dispcc MDSS_GDSC>; ++ ++ iommus = <&apps_smmu 0x420 0x2>, ++ <&apps_smmu 0x421 0x0>; ++ ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ ++ status = "disabled"; ++ ++ mdp: display-controller@5e01000 { ++ compatible = "qcom,qcm2290-dpu"; ++ reg = <0x0 0x05e01000 0x0 0x8f000>, ++ <0x0 0x05eb0000 0x0 0x2008>; ++ reg-names = "mdp", ++ "vbif"; ++ ++ interrupt-parent = <&mdss>; ++ interrupts = <0>; ++ ++ clocks = <&gcc GCC_DISP_HF_AXI_CLK>, ++ <&dispcc DISP_CC_MDSS_AHB_CLK>, ++ <&dispcc DISP_CC_MDSS_MDP_CLK>, ++ <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>, ++ <&dispcc DISP_CC_MDSS_VSYNC_CLK>; ++ clock-names = "bus", ++ "iface", ++ "core", ++ "lut", ++ "vsync"; ++ ++ operating-points-v2 = <&mdp_opp_table>; ++ power-domains = <&rpmpd QCM2290_VDDCX>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ dpu_intf1_out: endpoint { ++ remote-endpoint = <&mdss_dsi0_in>; ++ }; ++ }; ++ }; ++ ++ mdp_opp_table: opp-table { ++ compatible = "operating-points-v2"; ++ ++ opp-19200000 { ++ opp-hz = /bits/ 64 <19200000>; ++ required-opps = <&rpmpd_opp_min_svs>; ++ }; ++ ++ opp-192000000 { ++ opp-hz = /bits/ 64 <192000000>; ++ required-opps = <&rpmpd_opp_low_svs>; ++ }; ++ ++ opp-256000000 { ++ opp-hz = /bits/ 64 <256000000>; ++ required-opps = <&rpmpd_opp_svs>; ++ }; ++ ++ opp-307200000 { ++ opp-hz = /bits/ 64 <307200000>; ++ required-opps = <&rpmpd_opp_svs_plus>; ++ }; ++ ++ opp-384000000 { ++ opp-hz = /bits/ 64 <384000000>; ++ required-opps = <&rpmpd_opp_nom>; ++ }; ++ }; ++ }; ++ ++ mdss_dsi0: dsi@5e94000 { ++ compatible = "qcom,qcm2290-dsi-ctrl", "qcom,mdss-dsi-ctrl"; ++ reg = <0x0 0x05e94000 0x0 0x400>; ++ reg-names = "dsi_ctrl"; ++ ++ interrupt-parent = <&mdss>; ++ interrupts = <4>; ++ ++ clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, ++ <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, ++ <&dispcc DISP_CC_MDSS_PCLK0_CLK>, ++ <&dispcc DISP_CC_MDSS_ESC0_CLK>, ++ <&dispcc DISP_CC_MDSS_AHB_CLK>, ++ <&gcc GCC_DISP_HF_AXI_CLK>; ++ clock-names = "byte", ++ "byte_intf", ++ "pixel", ++ "core", ++ "iface", ++ "bus"; ++ ++ assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, ++ <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; ++ assigned-clock-parents = <&mdss_dsi0_phy 0>, ++ <&mdss_dsi0_phy 1>; ++ ++ operating-points-v2 = <&dsi_opp_table>; ++ power-domains = <&rpmpd QCM2290_VDDCX>; ++ phys = <&mdss_dsi0_phy>; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ status = "disabled"; ++ ++ dsi_opp_table: opp-table { ++ compatible = "operating-points-v2"; ++ ++ opp-19200000 { ++ opp-hz = /bits/ 64 <19200000>; ++ required-opps = <&rpmpd_opp_min_svs>; ++ }; ++ ++ opp-164000000 { ++ opp-hz = /bits/ 64 <164000000>; ++ required-opps = <&rpmpd_opp_low_svs>; ++ }; ++ ++ opp-187500000 { ++ opp-hz = /bits/ 64 <187500000>; ++ required-opps = <&rpmpd_opp_svs>; ++ }; ++ }; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ ++ mdss_dsi0_in: endpoint { ++ remote-endpoint = <&dpu_intf1_out>; ++ }; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ ++ mdss_dsi0_out: endpoint { ++ }; ++ }; ++ }; ++ }; ++ ++ mdss_dsi0_phy: phy@5e94400 { ++ compatible = "qcom,dsi-phy-14nm-2290"; ++ reg = <0x0 0x05e94400 0x0 0x100>, ++ <0x0 0x05e94500 0x0 0x300>, ++ <0x0 0x05e94800 0x0 0x188>; ++ reg-names = "dsi_phy", ++ "dsi_phy_lane", ++ "dsi_pll"; ++ ++ clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, ++ <&rpmcc RPM_SMD_XO_CLK_SRC>; ++ clock-names = "iface", ++ "ref"; ++ ++ power-domains = <&rpmpd QCM2290_VDDMX>; ++ required-opps = <&rpmpd_opp_nom>; ++ ++ #clock-cells = <1>; ++ #phy-cells = <0>; ++ ++ status = "disabled"; ++ }; ++ }; ++ ++ dispcc: clock-controller@5f00000 { ++ compatible = "qcom,qcm2290-dispcc"; ++ reg = <0x0 0x05f00000 0x0 0x20000>; ++ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, ++ <&rpmcc RPM_SMD_XO_A_CLK_SRC>, ++ <&gcc GCC_DISP_GPLL0_CLK_SRC>, ++ <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>, ++ <&mdss_dsi0_phy 0>, ++ <&mdss_dsi0_phy 1>; ++ clock-names = "bi_tcxo", ++ "bi_tcxo_ao", ++ "gcc_disp_gpll0_clk_src", ++ "gcc_disp_gpll0_div_clk_src", ++ "dsi0_phy_pll_out_byteclk", ++ "dsi0_phy_pll_out_dsiclk"; ++ #power-domain-cells = <1>; ++ #clock-cells = <1>; ++ #reset-cells = <1>; ++ }; ++ + remoteproc_mpss: remoteproc@6080000 { + compatible = "qcom,qcm2290-mpss-pas", "qcom,sm6115-mpss-pas"; + reg = <0x0 0x06080000 0x0 0x100>; +-- +2.43.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0009_arm64_dts_qcom_qcm2290_hook_up_interconnects.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0009_arm64_dts_qcom_qcm2290_hook_up_interconnects.patch new file mode 100644 index 0000000..69fb618 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0009_arm64_dts_qcom_qcm2290_hook_up_interconnects.patch @@ -0,0 +1,448 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: arm64: dts: qcom: qcm2290: Hook up interconnects +Date: Wed, 29 Nov 2023 15:44:06 +0100 + +Add interconnect provider nodes and hook up interconnects to consumer +devices, including bwmon. + +Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 5b970ff0193d67da4a8d2d5fda50dd8ddb50a71e] +--- + arch/arm64/boot/dts/qcom/qcm2290.dtsi | 248 ++++++++++++++++++++++++++++++++++ + 1 file changed, 248 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi +index a3edc4667cc5..ce04d0acdede 100644 +--- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi ++++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi +@@ -12,6 +12,8 @@ + #include <dt-bindings/firmware/qcom,scm.h> + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> ++#include <dt-bindings/interconnect/qcom,qcm2290.h> ++#include <dt-bindings/interconnect/qcom,rpm-icc.h> + #include <dt-bindings/power/qcom-rpmpd.h> + + / { +@@ -151,6 +153,8 @@ scm: scm { + clocks = <&rpmcc RPM_SMD_CE1_CLK>; + clock-names = "core"; + #reset-cells = <1>; ++ interconnects = <&system_noc MASTER_CRYPTO_CORE0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>; + }; + }; + +@@ -669,6 +673,33 @@ usb_qmpphy: phy@1615000 { + status = "disabled"; + }; + ++ system_noc: interconnect@1880000 { ++ compatible = "qcom,qcm2290-snoc"; ++ reg = <0x0 0x01880000 0x0 0x60200>; ++ #interconnect-cells = <2>; ++ ++ qup_virt: interconnect-qup { ++ compatible = "qcom,qcm2290-qup-virt"; ++ #interconnect-cells = <2>; ++ }; ++ ++ mmnrt_virt: interconnect-mmnrt { ++ compatible = "qcom,qcm2290-mmnrt-virt"; ++ #interconnect-cells = <2>; ++ }; ++ ++ mmrt_virt: interconnect-mmrt { ++ compatible = "qcom,qcm2290-mmrt-virt"; ++ #interconnect-cells = <2>; ++ }; ++ }; ++ ++ config_noc: interconnect@1900000 { ++ compatible = "qcom,qcm2290-cnoc"; ++ reg = <0x0 0x01900000 0x0 0x8200>; ++ #interconnect-cells = <2>; ++ }; ++ + qfprom@1b44000 { + compatible = "qcom,qcm2290-qfprom", "qcom,qfprom"; + reg = <0x0 0x01b44000 0x0 0x3000>; +@@ -681,6 +712,60 @@ qusb2_hstx_trim: hstx-trim@25b { + }; + }; + ++ pmu@1b8e300 { ++ compatible = "qcom,qcm2290-cpu-bwmon", "qcom,sdm845-bwmon"; ++ reg = <0x0 0x01b8e300 0x0 0x600>; ++ interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>; ++ ++ operating-points-v2 = <&cpu_bwmon_opp_table>; ++ interconnects = <&bimc MASTER_APPSS_PROC RPM_ACTIVE_TAG ++ &bimc SLAVE_EBI1 RPM_ACTIVE_TAG>; ++ ++ cpu_bwmon_opp_table: opp-table { ++ compatible = "operating-points-v2"; ++ ++ opp-0 { ++ opp-peak-kBps = <(200 * 4 * 1000)>; ++ }; ++ ++ opp-1 { ++ opp-peak-kBps = <(300 * 4 * 1000)>; ++ }; ++ ++ opp-2 { ++ opp-peak-kBps = <(451 * 4 * 1000)>; ++ }; ++ ++ opp-3 { ++ opp-peak-kBps = <(547 * 4 * 1000)>; ++ }; ++ ++ opp-4 { ++ opp-peak-kBps = <(681 * 4 * 1000)>; ++ }; ++ ++ opp-5 { ++ opp-peak-kBps = <(768 * 4 * 1000)>; ++ }; ++ ++ opp-6 { ++ opp-peak-kBps = <(1017 * 4 * 1000)>; ++ }; ++ ++ opp-7 { ++ opp-peak-kBps = <(1353 * 4 * 1000)>; ++ }; ++ ++ opp-8 { ++ opp-peak-kBps = <(1555 * 4 * 1000)>; ++ }; ++ ++ opp-9 { ++ opp-peak-kBps = <(1804 * 4 * 1000)>; ++ }; ++ }; ++ }; ++ + spmi_bus: spmi@1c40000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0x0 0x01c40000 0x0 0x1100>, +@@ -721,6 +806,12 @@ rng: rng@4453000 { + clock-names = "core"; + }; + ++ bimc: interconnect@4480000 { ++ compatible = "qcom,qcm2290-bimc"; ++ reg = <0x0 0x04480000 0x0 0x80000>; ++ #interconnect-cells = <2>; ++ }; ++ + rpm_msg_ram: sram@45f0000 { + compatible = "qcom,rpm-msg-ram"; + reg = <0x0 0x045f0000 0x0 0x7000>; +@@ -756,13 +847,45 @@ sdhc_1: mmc@4744000 { + resets = <&gcc GCC_SDCC1_BCR>; + + power-domains = <&rpmpd QCM2290_VDDCX>; ++ operating-points-v2 = <&sdhc1_opp_table>; + iommus = <&apps_smmu 0xc0 0x0>; ++ interconnects = <&system_noc MASTER_SDCC_1 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc SLAVE_SDCC_1 RPM_ALWAYS_TAG>; ++ interconnect-names = "sdhc-ddr", ++ "cpu-sdhc"; + + qcom,dll-config = <0x000f642c>; + qcom,ddr-config = <0x80040868>; + bus-width = <8>; + + status = "disabled"; ++ ++ sdhc1_opp_table: opp-table { ++ compatible = "operating-points-v2"; ++ ++ opp-100000000 { ++ opp-hz = /bits/ 64 <100000000>; ++ required-opps = <&rpmpd_opp_low_svs>; ++ opp-peak-kBps = <250000 133320>; ++ opp-avg-kBps = <102400 65000>; ++ }; ++ ++ opp-192000000 { ++ opp-hz = /bits/ 64 <192000000>; ++ required-opps = <&rpmpd_opp_low_svs>; ++ opp-peak-kBps = <800000 300000>; ++ opp-avg-kBps = <204800 200000>; ++ }; ++ ++ opp-384000000 { ++ opp-hz = /bits/ 64 <384000000>; ++ required-opps = <&rpmpd_opp_svs_plus>; ++ opp-peak-kBps = <800000 300000>; ++ opp-avg-kBps = <204800 200000>; ++ }; ++ }; + }; + + sdhc_2: mmc@4784000 { +@@ -786,6 +909,12 @@ sdhc_2: mmc@4784000 { + power-domains = <&rpmpd QCM2290_VDDCX>; + operating-points-v2 = <&sdhc2_opp_table>; + iommus = <&apps_smmu 0xa0 0x0>; ++ interconnects = <&system_noc MASTER_SDCC_2 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc SLAVE_SDCC_2 RPM_ALWAYS_TAG>; ++ interconnect-names = "sdhc-ddr", ++ "cpu-sdhc"; + + qcom,dll-config = <0x0007642c>; + qcom,ddr-config = <0x80040868>; +@@ -799,11 +928,15 @@ sdhc2_opp_table: opp-table { + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmpd_opp_low_svs>; ++ opp-peak-kBps = <250000 133320>; ++ opp-avg-kBps = <261438 150000>; + }; + + opp-202000000 { + opp-hz = /bits/ 64 <202000000>; + required-opps = <&rpmpd_opp_svs_plus>; ++ opp-peak-kBps = <800000 300000>; ++ opp-avg-kBps = <261438 300000>; + }; + }; + }; +@@ -851,6 +984,15 @@ i2c0: i2c@4a80000 { + dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>, + <&gpi_dma0 1 0 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -867,6 +1009,12 @@ spi0: spi@4a80000 { + dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>, + <&gpi_dma0 1 0 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -880,6 +1028,12 @@ uart0: serial@4a80000 { + clock-names = "se"; + pinctrl-0 = <&qup_uart0_default>; + pinctrl-names = "default"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config"; + status = "disabled"; + }; + +@@ -894,6 +1048,15 @@ i2c1: i2c@4a84000 { + dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>, + <&gpi_dma0 1 1 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -910,6 +1073,12 @@ spi1: spi@4a84000 { + dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>, + <&gpi_dma0 1 1 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -926,6 +1095,15 @@ i2c2: i2c@4a88000 { + dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>, + <&gpi_dma0 1 2 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -942,6 +1120,12 @@ spi2: spi@4a88000 { + dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>, + <&gpi_dma0 1 2 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -958,6 +1142,15 @@ i2c3: i2c@4a8c000 { + dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>, + <&gpi_dma0 1 3 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -974,6 +1167,12 @@ spi3: spi@4a8c000 { + dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>, + <&gpi_dma0 1 3 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -990,6 +1189,15 @@ i2c4: i2c@4a90000 { + dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>, + <&gpi_dma0 1 4 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -1006,6 +1214,12 @@ spi4: spi@4a90000 { + dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>, + <&gpi_dma0 1 4 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -1019,6 +1233,12 @@ uart4: serial@4a90000 { + clock-names = "se"; + pinctrl-0 = <&qup_uart4_default>; + pinctrl-names = "default"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config"; + status = "disabled"; + }; + +@@ -1033,6 +1253,15 @@ i2c5: i2c@4a94000 { + dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>, + <&gpi_dma0 1 5 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -1049,6 +1278,12 @@ spi5: spi@4a94000 { + dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>, + <&gpi_dma0 1 5 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; ++ interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -1081,6 +1316,13 @@ usb: usb@4ef8800 { + + resets = <&gcc GCC_USB30_PRIM_BCR>; + power-domains = <&gcc GCC_USB30_PRIM_GDSC>; ++ /* TODO: USB<->IPA path */ ++ interconnects = <&system_noc MASTER_USB3_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc SLAVE_USB3 RPM_ALWAYS_TAG>; ++ interconnect-names = "usb-ddr", ++ "apps-usb"; + wakeup-source; + + #address-cells = <2>; +@@ -1127,6 +1369,12 @@ mdss: display-subsystem@5e00000 { + + iommus = <&apps_smmu 0x420 0x2>, + <&apps_smmu 0x421 0x0>; ++ interconnects = <&mmrt_virt MASTER_MDP0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI1 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG ++ &config_noc SLAVE_DISPLAY_CFG RPM_ALWAYS_TAG>; ++ interconnect-names = "mdp0-mem", ++ "cpu-cfg"; + + #address-cells = <2>; + #size-cells = <2>; +-- +2.43.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0010_arm64_dts_qcom_qrb2210_rb1_set_up_hdmi.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0010_arm64_dts_qcom_qrb2210_rb1_set_up_hdmi.patch new file mode 100644 index 0000000..d202ef7 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0010_arm64_dts_qcom_qrb2210_rb1_set_up_hdmi.patch @@ -0,0 +1,126 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: arm64: dts: qcom: qrb2210-rb1: Set up HDMI +Date: Wed, 29 Nov 2023 15:44:07 +0100 + +Add the required nodes to support display output via the HDMI port. + +Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 616eda24edd48b8b56516886c51d211fbfd2679b] +--- + arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 86 ++++++++++++++++++++++++++++++++ + 1 file changed, 86 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +index 94885b9c21c8..ac6584164058 100644 +--- a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts ++++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +@@ -40,6 +40,17 @@ key-volume-up { + }; + }; + ++ hdmi-connector { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ++ port { ++ hdmi_con: endpoint { ++ remote-endpoint = <<9611_out>; ++ }; ++ }; ++ }; ++ + leds { + compatible = "gpio-leds"; + +@@ -158,6 +169,68 @@ vph_pwr: regulator-vph-pwr { + }; + }; + ++&gpi_dma0 { ++ status = "okay"; ++}; ++ ++&i2c2 { ++ clock-frequency = <400000>; ++ status = "okay"; ++ ++ lt9611_codec: hdmi-bridge@2b { ++ compatible = "lontium,lt9611uxc"; ++ reg = <0x2b>; ++ interrupts-extended = <&tlmm 46 IRQ_TYPE_EDGE_FALLING>; ++ reset-gpios = <&tlmm 41 GPIO_ACTIVE_HIGH>; ++ ++ vdd-supply = <&vreg_hdmi_out_1p2>; ++ vcc-supply = <<9611_3v3>; ++ ++ pinctrl-0 = <<9611_irq_pin <9611_rst_pin>; ++ pinctrl-names = "default"; ++ #sound-dai-cells = <1>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ ++ lt9611_a: endpoint { ++ remote-endpoint = <&mdss_dsi0_out>; ++ }; ++ }; ++ ++ port@2 { ++ reg = <2>; ++ ++ lt9611_out: endpoint { ++ remote-endpoint = <&hdmi_con>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&mdss { ++ status = "okay"; ++}; ++ ++&mdss_dsi0 { ++ vdda-supply = <&pm2250_l5>; ++ status = "okay"; ++}; ++ ++&mdss_dsi0_out { ++ remote-endpoint = <<9611_a>; ++ data-lanes = <0 1 2 3>; ++}; ++ ++&mdss_dsi0_phy { ++ status = "okay"; ++}; ++ + &pm2250_resin { + linux,code = <KEY_VOLUMEDOWN>; + status = "okay"; +@@ -377,6 +450,19 @@ &sdhc_2 { + }; + + &tlmm { ++ lt9611_rst_pin: lt9611-rst-state { ++ pins = "gpio41"; ++ function = "gpio"; ++ input-disable; ++ output-high; ++ }; ++ ++ lt9611_irq_pin: lt9611-irq-state { ++ pins = "gpio46"; ++ function = "gpio"; ++ bias-disable; ++ }; ++ + sd_det_in_on: sd-det-in-on-state { + pins = "gpio88"; + function = "gpio"; +-- +2.43.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0011_arm64_dts_qcom_qrb2210_rb1_enable_can_bus_controller.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0011_arm64_dts_qcom_qrb2210_rb1_enable_can_bus_controller.patch new file mode 100644 index 0000000..485ec79 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0011_arm64_dts_qcom_qrb2210_rb1_enable_can_bus_controller.patch @@ -0,0 +1,54 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: arm64: dts: qcom: qrb2210-rb1: Enable CAN bus controller +Date: Wed, 29 Nov 2023 15:44:08 +0100 + +Enable the Microchip mcp2518fd hosted on the SPI5 bus. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 252bc7ad359478dba8d77bce9502f2cc7bb547a3] +--- + arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 22 ++++++++++++++++++++++ + 1 file changed, 22 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +index ac6584164058..ac597eb3fe9d 100644 +--- a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts ++++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +@@ -23,6 +23,14 @@ chosen { + stdout-path = "serial0:115200n8"; + }; + ++ clocks { ++ clk40M: can-clk { ++ compatible = "fixed-clock"; ++ clock-frequency = <40000000>; ++ #clock-cells = <0>; ++ }; ++ }; ++ + gpio-keys { + compatible = "gpio-keys"; + label = "gpio-keys"; +@@ -449,6 +457,20 @@ &sdhc_2 { + status = "okay"; + }; + ++&spi5 { ++ status = "okay"; ++ ++ can@0 { ++ compatible = "microchip,mcp2518fd"; ++ reg = <0>; ++ interrupts-extended = <&tlmm 39 IRQ_TYPE_LEVEL_LOW>; ++ clocks = <&clk40M>; ++ spi-max-frequency = <10000000>; ++ vdd-supply = <&vdc_5v>; ++ xceiver-supply = <&vdc_5v>; ++ }; ++}; ++ + &tlmm { + lt9611_rst_pin: lt9611-rst-state { + pins = "gpio41"; +-- +2.43.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0012_arm64_dts_qcom_qrb2210_rb1_add_wifi_variant_property.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0012_arm64_dts_qcom_qrb2210_rb1_add_wifi_variant_property.patch new file mode 100644 index 0000000..4c5d177 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/features/0012_arm64_dts_qcom_qrb2210_rb1_add_wifi_variant_property.patch @@ -0,0 +1,47 @@ +From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Subject: arm64: dts: qcom: qrb2210-rb1: add wifi variant property +Date: Wed, 29 Nov 2023 15:44:09 +0100 + +The RB1 platform doesn't have board-specific board-id programmed, it uses +generic 0xff. Thus add the property with the 'variant' of the +calibration data. + +Note: the driver will check for the calibration data for the following +IDs, so existing board-2.bin files will continue to work. + +- 'bus=snoc,qmi-board-id=ff,qmi-chip-id=120,variant=Thundercomm_RB1' +- 'bus=snoc,qmi-board-id=ff,qmi-chip-id=120' +- 'bus=snoc,qmi-board-id=ff' + +For the reference, the board is identified by the driver in the +following way: + +ath10k_snoc c800000.wifi: qmi chip_id 0x120 chip_family 0x4007 board_id 0xff soc_id 0x40670000 +ath10k_snoc c800000.wifi: qmi fw_version 0x337302d3 fw_build_timestamp 2023-01-06 01:50 fw_build_id QC_IMAGE_VERSION_STRING=WLAN.HL.3.3.7.c2-00723-QCAHLSWMTPLZ-1 +ath10k_snoc c800000.wifi: wcn3990 hw1.0 target 0x00000008 chip_id 0x00000000 sub 0000:0000 +ath10k_snoc c800000.wifi: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0 +ath10k_snoc c800000.wifi: firmware ver api 5 features wowlan,mgmt-tx-by-reference,non-bmi crc32 b3d4b790 +ath10k_snoc c800000.wifi: htt-ver 3.114 wmi-op 4 htt-op 3 cal file max-sta 32 raw 0 hwcrypto 1 + +Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git b6a56a5a25d6273729b2b5139d58e3d390318ed2] +--- + arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +index ac597eb3fe9d..bd7bcf803654 100644 +--- a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts ++++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +@@ -535,6 +535,7 @@ &wifi { + vdd-1.8-xo-supply = <&pm2250_l13>; + vdd-1.3-rfa-supply = <&pm2250_l10>; + vdd-3.3-ch0-supply = <&pm2250_l22>; ++ qcom,ath10k-calibration-variant = "Thundercomm_RB1"; + status = "okay"; + }; + +-- +2.43.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0001-arm64-dts-qcom-qrb2210-rb1-use-USB-host-mode.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0001-arm64-dts-qcom-qrb2210-rb1-use-USB-host-mode.patch new file mode 100644 index 0000000..4765451 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0001-arm64-dts-qcom-qrb2210-rb1-use-USB-host-mode.patch @@ -0,0 +1,41 @@ +From e0cee8dc6757f9f18718eec553be9fffa503e103 Mon Sep 17 00:00:00 2001 +From: Caleb Connolly <caleb.connolly@linaro.org> +Date: Wed, 25 Oct 2023 12:58:00 +0100 +Subject: [PATCH] arm64: dts: qcom: qrb2210-rb1: use USB host mode + +The default for the QCM2290 platform that this board is based on is OTG +mode, however the role detection logic is not hooked up for this board +and the dwc3 driver is configured to not allow role switching from +userspace. + +Force this board to host mode as this is the preferred usecase until we +get role switching hooked up. + +Fixes: e18771961336 ("arm64: dts: qcom: Add initial QTI RB1 device tree") +Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> +Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20231025-b4-rb1-usb-host-v1-1-522616c575ef@linaro.org +Signed-off-by: Bjorn Andersson <andersson@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git e0cee8dc6757f9f18718eec553be9fffa503e103] +--- + arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +index bd7bcf803654..aa53b6af6d9c 100644 +--- a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts ++++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +@@ -523,6 +523,10 @@ &usb_qmpphy { + status = "okay"; + }; + ++&usb_dwc3 { ++ dr_mode = "host"; ++}; ++ + &usb_hsphy { + vdd-supply = <&pm2250_l12>; + vdda-pll-supply = <&pm2250_l13>; +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0003_arm64_dts_qcom_qrb2210_rb1_enable_remote_processors.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0003_arm64_dts_qcom_qrb2210_rb1_enable_remote_processors.patch new file mode 100644 index 0000000..8161c44 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0003_arm64_dts_qcom_qrb2210_rb1_enable_remote_processors.patch @@ -0,0 +1,55 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: arm64: dts: qcom: qrb2210-rb1: Enable remote processors +Date: Wed, 06 Sep 2023 11:24:57 +0200 + +Enable the ADSP, MPSS and Wi-Fi. Tighten up the Wi-Fi regulators to +make them compliant with that the chip expects. + +The Wi-Fi reports: +qmi chip_id 0x120 chip_family 0x4007 board_id 0xff soc_id 0x40670000 + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 9692ccc49583cd43184ea192af127635877e0f24] +--- + arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +index 0f7c59187896..5f7619518deb 100644 +--- a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts ++++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +@@ -134,6 +134,16 @@ &qupv3_id_0 { + status = "okay"; + }; + ++&remoteproc_adsp { ++ firmware-name = "qcom/qcm2290/adsp.mbn"; ++ status = "okay"; ++}; ++ ++&remoteproc_mpss { ++ firmware-name = "qcom/qcm2290/modem.mbn"; ++ status = "okay"; ++}; ++ + &rpm_requests { + regulators { + compatible = "qcom,rpm-pm2250-regulators"; +@@ -373,6 +383,14 @@ &usb_hsphy { + status = "okay"; + }; + ++&wifi { ++ vdd-0.8-cx-mx-supply = <&pm2250_l7>; ++ vdd-1.8-xo-supply = <&pm2250_l13>; ++ vdd-1.3-rfa-supply = <&pm2250_l10>; ++ vdd-3.3-ch0-supply = <&pm2250_l22>; ++ status = "okay"; ++}; ++ + &xo_board { + clock-frequency = <38400000>; + }; +-- +2.42.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0004_arm64_dts_qcom_qrb2210_rb1_add_gpio_leds.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0004_arm64_dts_qcom_qrb2210_rb1_add_gpio_leds.patch new file mode 100644 index 0000000..933d410 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0004_arm64_dts_qcom_qrb2210_rb1_add_gpio_leds.patch @@ -0,0 +1,65 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: arm64: dts: qcom: qrb2210-rb1: Add GPIO LEDs +Date: Wed, 06 Sep 2023 11:24:58 +0200 + +Add the three LEDs (blue/yellow/green) connected to TLMM GPIOs. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 02a2fcfbb835bac0c523b3f89326bc1c69f83ce0] +--- + arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 33 ++++++++++++++++++++++++++++++++ + 1 file changed, 33 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +index 5f7619518deb..fd45f58e254d 100644 +--- a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts ++++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +@@ -5,6 +5,7 @@ + + /dts-v1/; + ++#include <dt-bindings/leds/common.h> + #include "qcm2290.dtsi" + #include "pm2250.dtsi" + +@@ -39,6 +40,38 @@ key-volume-up { + }; + }; + ++ leds { ++ compatible = "gpio-leds"; ++ ++ led-bt { ++ label = "blue:bt"; ++ function = LED_FUNCTION_BLUETOOTH; ++ color = <LED_COLOR_ID_BLUE>; ++ gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "bluetooth-power"; ++ default-state = "off"; ++ }; ++ ++ led-user0 { ++ label = "green:user0"; ++ function = LED_FUNCTION_INDICATOR; ++ color = <LED_COLOR_ID_GREEN>; ++ gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "none"; ++ default-state = "off"; ++ panic-indicator; ++ }; ++ ++ led-wlan { ++ label = "yellow:wlan"; ++ function = LED_FUNCTION_WLAN; ++ color = <LED_COLOR_ID_YELLOW>; ++ gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "phy0tx"; ++ default-state = "off"; ++ }; ++ }; ++ + vreg_hdmi_out_1p2: regulator-hdmi-out-1p2 { + compatible = "regulator-fixed"; + regulator-name = "VREG_HDMI_OUT_1P2"; +-- +2.42.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0005_arm64_dts_qcom_qrb2210_rb1_hook_up_usb3.patch b/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0005_arm64_dts_qcom_qrb2210_rb1_hook_up_usb3.patch new file mode 100644 index 0000000..6f93da3 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb2210-dts/sans-icc/0005_arm64_dts_qcom_qrb2210_rb1_hook_up_usb3.patch @@ -0,0 +1,32 @@ +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Subject: arm64: dts: qcom: qrb2210-rb1: Hook up USB3 +Date: Wed, 06 Sep 2023 11:24:59 +0200 + +Configure the USB3 PHY to enable USB3 functionality + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 59f9ff79cd9cf3bc10743d61662b5729fcffff24] +--- + arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +index fd45f58e254d..94885b9c21c8 100644 +--- a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts ++++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +@@ -409,6 +409,12 @@ &usb { + status = "okay"; + }; + ++&usb_qmpphy { ++ vdda-phy-supply = <&pm2250_l12>; ++ vdda-pll-supply = <&pm2250_l13>; ++ status = "okay"; ++}; ++ + &usb_hsphy { + vdd-supply = <&pm2250_l12>; + vdda-pll-supply = <&pm2250_l13>; +-- +2.42.0 diff --git a/recipes-kernel/linux/linux-yocto/qrb4210-drivers/icc/0001-dt-bindings-interconnect-Add-Qualcomm-SM6115-NoC.patch b/recipes-kernel/linux/linux-yocto/qrb4210-drivers/icc/0001-dt-bindings-interconnect-Add-Qualcomm-SM6115-NoC.patch new file mode 100644 index 0000000..94565eb --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb4210-drivers/icc/0001-dt-bindings-interconnect-Add-Qualcomm-SM6115-NoC.patch @@ -0,0 +1,297 @@ +From 658902913c7044ac5d56b14cea54e735a071fe41 Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Wed, 29 Nov 2023 15:41:01 +0100 +Subject: [PATCH 1/2] dt-bindings: interconnect: Add Qualcomm SM6115 NoC + +Add bindings for Qualcomm SM6115 Network-On-Chip interconnect. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> +Link: https://lore.kernel.org/r/20231125-topic-6115icc-v3-1-bd8907b8cfd7@linaro.org +Signed-off-by: Georgi Djakov <djakov@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 658902913c7044ac5d56b14cea54e735a071fe41] +--- + .../bindings/interconnect/qcom,sm6115.yaml | 152 ++++++++++++++++++ + .../dt-bindings/interconnect/qcom,sm6115.h | 111 +++++++++++++ + 2 files changed, 263 insertions(+) + create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,sm6115.yaml + create mode 100644 include/dt-bindings/interconnect/qcom,sm6115.h + +diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sm6115.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sm6115.yaml +new file mode 100644 +index 000000000000..14b1a0b08e73 +--- /dev/null ++++ b/Documentation/devicetree/bindings/interconnect/qcom,sm6115.yaml +@@ -0,0 +1,152 @@ ++# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/interconnect/qcom,sm6115.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: Qualcomm SM6115 Network-On-Chip interconnect ++ ++maintainers: ++ - Konrad Dybcio <konradybcio@kernel.org> ++ ++description: ++ The Qualcomm SM6115 interconnect providers support adjusting the ++ bandwidth requirements between the various NoC fabrics. ++ ++properties: ++ compatible: ++ enum: ++ - qcom,sm6115-bimc ++ - qcom,sm6115-cnoc ++ - qcom,sm6115-snoc ++ ++ reg: ++ maxItems: 1 ++ ++ clocks: ++ minItems: 1 ++ maxItems: 4 ++ ++ clock-names: ++ minItems: 1 ++ maxItems: 4 ++ ++# Child node's properties ++patternProperties: ++ '^interconnect-[a-z0-9]+$': ++ type: object ++ description: ++ The interconnect providers do not have a separate QoS register space, ++ but share parent's space. ++ ++ $ref: qcom,rpm-common.yaml# ++ ++ properties: ++ compatible: ++ enum: ++ - qcom,sm6115-clk-virt ++ - qcom,sm6115-mmrt-virt ++ - qcom,sm6115-mmnrt-virt ++ ++ required: ++ - compatible ++ ++ unevaluatedProperties: false ++ ++required: ++ - compatible ++ - reg ++ ++allOf: ++ - $ref: qcom,rpm-common.yaml# ++ - if: ++ properties: ++ compatible: ++ const: qcom,sm6115-cnoc ++ ++ then: ++ properties: ++ clocks: ++ items: ++ - description: USB-NoC AXI clock ++ ++ clock-names: ++ items: ++ - const: usb_axi ++ ++ - if: ++ properties: ++ compatible: ++ const: qcom,sm6115-snoc ++ ++ then: ++ properties: ++ clocks: ++ items: ++ - description: CPU-NoC AXI clock. ++ - description: UFS-NoC AXI clock. ++ - description: USB-NoC AXI clock. ++ - description: IPA clock. ++ ++ clock-names: ++ items: ++ - const: cpu_axi ++ - const: ufs_axi ++ - const: usb_axi ++ - const: ipa ++ ++ - if: ++ properties: ++ compatible: ++ enum: ++ - qcom,sm6115-bimc ++ - qcom,sm6115-clk-virt ++ - qcom,sm6115-mmrt-virt ++ - qcom,sm6115-mmnrt-virt ++ ++ then: ++ properties: ++ clocks: false ++ clock-names: false ++ ++unevaluatedProperties: false ++ ++examples: ++ - | ++ #include <dt-bindings/clock/qcom,gcc-sm6115.h> ++ #include <dt-bindings/clock/qcom,rpmcc.h> ++ ++ snoc: interconnect@1880000 { ++ compatible = "qcom,sm6115-snoc"; ++ reg = <0x01880000 0x60200>; ++ clocks = <&gcc GCC_SYS_NOC_CPUSS_AHB_CLK>, ++ <&gcc GCC_SYS_NOC_UFS_PHY_AXI_CLK>, ++ <&gcc GCC_SYS_NOC_USB3_PRIM_AXI_CLK>, ++ <&rpmcc RPM_SMD_IPA_CLK>; ++ clock-names = "cpu_axi", ++ "ufs_axi", ++ "usb_axi", ++ "ipa"; ++ #interconnect-cells = <1>; ++ ++ qup_virt: interconnect-clk { ++ compatible = "qcom,sm6115-clk-virt"; ++ #interconnect-cells = <1>; ++ }; ++ ++ mmnrt_virt: interconnect-mmnrt { ++ compatible = "qcom,sm6115-mmnrt-virt"; ++ #interconnect-cells = <1>; ++ }; ++ ++ mmrt_virt: interconnect-mmrt { ++ compatible = "qcom,sm6115-mmrt-virt"; ++ #interconnect-cells = <1>; ++ }; ++ }; ++ ++ cnoc: interconnect@1900000 { ++ compatible = "qcom,sm6115-cnoc"; ++ reg = <0x01900000 0x8200>; ++ #interconnect-cells = <1>; ++ }; +diff --git a/include/dt-bindings/interconnect/qcom,sm6115.h b/include/dt-bindings/interconnect/qcom,sm6115.h +new file mode 100644 +index 000000000000..21090e585f05 +--- /dev/null ++++ b/include/dt-bindings/interconnect/qcom,sm6115.h +@@ -0,0 +1,111 @@ ++/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ ++/* ++ * Copyright (c) 2020, The Linux Foundation. All rights reserved. ++ * Copyright (c) 2023, Linaro Limited ++ */ ++ ++#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM6115_H ++#define __DT_BINDINGS_INTERCONNECT_QCOM_SM6115_H ++ ++/* BIMC */ ++#define MASTER_AMPSS_M0 0 ++#define MASTER_SNOC_BIMC_RT 1 ++#define MASTER_SNOC_BIMC_NRT 2 ++#define SNOC_BIMC_MAS 3 ++#define MASTER_GRAPHICS_3D 4 ++#define MASTER_TCU_0 5 ++#define SLAVE_EBI_CH0 6 ++#define BIMC_SNOC_SLV 7 ++ ++/* CNOC */ ++#define SNOC_CNOC_MAS 0 ++#define MASTER_QDSS_DAP 1 ++#define SLAVE_AHB2PHY_USB 2 ++#define SLAVE_APSS_THROTTLE_CFG 3 ++#define SLAVE_BIMC_CFG 4 ++#define SLAVE_BOOT_ROM 5 ++#define SLAVE_CAMERA_NRT_THROTTLE_CFG 6 ++#define SLAVE_CAMERA_RT_THROTTLE_CFG 7 ++#define SLAVE_CAMERA_CFG 8 ++#define SLAVE_CLK_CTL 9 ++#define SLAVE_RBCPR_CX_CFG 10 ++#define SLAVE_RBCPR_MX_CFG 11 ++#define SLAVE_CRYPTO_0_CFG 12 ++#define SLAVE_DCC_CFG 13 ++#define SLAVE_DDR_PHY_CFG 14 ++#define SLAVE_DDR_SS_CFG 15 ++#define SLAVE_DISPLAY_CFG 16 ++#define SLAVE_DISPLAY_THROTTLE_CFG 17 ++#define SLAVE_GPU_CFG 18 ++#define SLAVE_GPU_THROTTLE_CFG 19 ++#define SLAVE_HWKM_CORE 20 ++#define SLAVE_IMEM_CFG 21 ++#define SLAVE_IPA_CFG 22 ++#define SLAVE_LPASS 23 ++#define SLAVE_MAPSS 24 ++#define SLAVE_MDSP_MPU_CFG 25 ++#define SLAVE_MESSAGE_RAM 26 ++#define SLAVE_CNOC_MSS 27 ++#define SLAVE_PDM 28 ++#define SLAVE_PIMEM_CFG 29 ++#define SLAVE_PKA_CORE 30 ++#define SLAVE_PMIC_ARB 31 ++#define SLAVE_QDSS_CFG 32 ++#define SLAVE_QM_CFG 33 ++#define SLAVE_QM_MPU_CFG 34 ++#define SLAVE_QPIC 35 ++#define SLAVE_QUP_0 36 ++#define SLAVE_RPM 37 ++#define SLAVE_SDCC_1 38 ++#define SLAVE_SDCC_2 39 ++#define SLAVE_SECURITY 40 ++#define SLAVE_SNOC_CFG 41 ++#define SLAVE_TCSR 42 ++#define SLAVE_TLMM 43 ++#define SLAVE_USB3 44 ++#define SLAVE_VENUS_CFG 45 ++#define SLAVE_VENUS_THROTTLE_CFG 46 ++#define SLAVE_VSENSE_CTRL_CFG 47 ++#define SLAVE_SERVICE_CNOC 48 ++ ++/* SNOC */ ++#define MASTER_CRYPTO_CORE0 0 ++#define MASTER_SNOC_CFG 1 ++#define MASTER_TIC 2 ++#define MASTER_ANOC_SNOC 3 ++#define BIMC_SNOC_MAS 4 ++#define MASTER_PIMEM 5 ++#define MASTER_QDSS_BAM 6 ++#define MASTER_QPIC 7 ++#define MASTER_QUP_0 8 ++#define MASTER_IPA 9 ++#define MASTER_QDSS_ETR 10 ++#define MASTER_SDCC_1 11 ++#define MASTER_SDCC_2 12 ++#define MASTER_USB3 13 ++#define SLAVE_APPSS 14 ++#define SNOC_CNOC_SLV 15 ++#define SLAVE_OCIMEM 16 ++#define SLAVE_PIMEM 17 ++#define SNOC_BIMC_SLV 18 ++#define SLAVE_SERVICE_SNOC 19 ++#define SLAVE_QDSS_STM 20 ++#define SLAVE_TCU 21 ++#define SLAVE_ANOC_SNOC 22 ++ ++/* CLK Virtual */ ++#define MASTER_QUP_CORE_0 0 ++#define SLAVE_QUP_CORE_0 1 ++ ++/* MMRT Virtual */ ++#define MASTER_CAMNOC_HF 0 ++#define MASTER_MDP_PORT0 1 ++#define SLAVE_SNOC_BIMC_RT 2 ++ ++/* MMNRT Virtual */ ++#define MASTER_CAMNOC_SF 0 ++#define MASTER_VIDEO_P0 1 ++#define MASTER_VIDEO_PROC 2 ++#define SLAVE_SNOC_BIMC_NRT 3 ++ ++#endif +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/qrb4210-drivers/icc/0001-iommu-arm-smmu-qcom-Add-SM6115-MDSS-compatible.patch b/recipes-kernel/linux/linux-yocto/qrb4210-drivers/icc/0001-iommu-arm-smmu-qcom-Add-SM6115-MDSS-compatible.patch new file mode 100644 index 0000000..6686e98 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb4210-drivers/icc/0001-iommu-arm-smmu-qcom-Add-SM6115-MDSS-compatible.patch @@ -0,0 +1,30 @@ +From 3b744008c1d08c25c9066206b8f4c3fb0006e9d0 Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Wed, 29 Nov 2023 15:44:02 +0100 +Subject: [PATCH] iommu/arm-smmu-qcom: Add SM6115 MDSS compatible + +Add the SM6115 MDSS compatible to clients compatible list, as it also +needs the workarounds. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Upstream-Status: Pending +--- + drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +index fdabb4b3f7c0..db7c4c71dec1 100644 +--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c ++++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +@@ -254,6 +254,7 @@ static const struct of_device_id qcom_smmu_client_of_match[] __maybe_unused = { + { .compatible = "qcom,sc8280xp-mdss" }, + { .compatible = "qcom,sdm845-mdss" }, + { .compatible = "qcom,sdm845-mss-pil" }, ++ { .compatible = "qcom,sm6115-mdss" }, + { .compatible = "qcom,sm6350-mdss" }, + { .compatible = "qcom,sm6375-mdss" }, + { .compatible = "qcom,sm8150-mdss" }, +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/qrb4210-drivers/icc/0002-interconnect-qcom-Add-SM6115-interconnect-provider-d.patch b/recipes-kernel/linux/linux-yocto/qrb4210-drivers/icc/0002-interconnect-qcom-Add-SM6115-interconnect-provider-d.patch new file mode 100644 index 0000000..ad75aa3 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb4210-drivers/icc/0002-interconnect-qcom-Add-SM6115-interconnect-provider-d.patch @@ -0,0 +1,1495 @@ +From 2eab57b131bd9ef22377e09de43beb45a650a752 Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Wed, 29 Nov 2023 15:41:02 +0100 +Subject: [PATCH 2/2] interconnect: qcom: Add SM6115 interconnect provider + driver + +Add a driver for managing NoC providers on SM6115. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20231125-topic-6115icc-v3-2-bd8907b8cfd7@linaro.org +Signed-off-by: Georgi Djakov <djakov@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 2eab57b131bd9ef22377e09de43beb45a650a752] +--- + drivers/interconnect/qcom/Kconfig | 9 + + drivers/interconnect/qcom/Makefile | 2 + + drivers/interconnect/qcom/sm6115.c | 1427 ++++++++++++++++++++++++++++ + 3 files changed, 1438 insertions(+) + create mode 100644 drivers/interconnect/qcom/sm6115.c + +diff --git a/drivers/interconnect/qcom/Kconfig b/drivers/interconnect/qcom/Kconfig +index 62b516d38d03..d2a54c5ecd06 100644 +--- a/drivers/interconnect/qcom/Kconfig ++++ b/drivers/interconnect/qcom/Kconfig +@@ -182,6 +182,15 @@ config INTERCONNECT_QCOM_SDX65 + This is a driver for the Qualcomm Network-on-Chip on sdx65-based + platforms. + ++config INTERCONNECT_QCOM_SM6115 ++ tristate "Qualcomm SM6115 interconnect driver" ++ depends on INTERCONNECT_QCOM ++ depends on QCOM_SMD_RPM ++ select INTERCONNECT_QCOM_SMD_RPM ++ help ++ This is a driver for the Qualcomm Network-on-Chip on sm6115-based ++ platforms. ++ + config INTERCONNECT_QCOM_SM6350 + tristate "Qualcomm SM6350 interconnect driver" + depends on INTERCONNECT_QCOM_RPMH_POSSIBLE +diff --git a/drivers/interconnect/qcom/Makefile b/drivers/interconnect/qcom/Makefile +index c5320e293960..7564042a30dc 100644 +--- a/drivers/interconnect/qcom/Makefile ++++ b/drivers/interconnect/qcom/Makefile +@@ -24,6 +24,7 @@ qnoc-sdm845-objs := sdm845.o + qnoc-sdm845-objs := sdm845.o + qnoc-sdx55-objs := sdx55.o + qnoc-sdx65-objs := sdx65.o ++qnoc-sm6115-objs := sm6115.o + qnoc-sm6350-objs := sm6350.o + qnoc-sm8150-objs := sm8150.o + qnoc-sm8250-objs := sm8250.o +@@ -53,6 +54,7 @@ obj-$(CONFIG_INTERCONNECT_QCOM_SDM845) += qnoc-sdm845.o + obj-$(CONFIG_INTERCONNECT_QCOM_SDM845) += qnoc-sdm845.o + obj-$(CONFIG_INTERCONNECT_QCOM_SDX55) += qnoc-sdx55.o + obj-$(CONFIG_INTERCONNECT_QCOM_SDX65) += qnoc-sdx65.o ++obj-$(CONFIG_INTERCONNECT_QCOM_SM6115) += qnoc-sm6115.o + obj-$(CONFIG_INTERCONNECT_QCOM_SM6350) += qnoc-sm6350.o + obj-$(CONFIG_INTERCONNECT_QCOM_SM8150) += qnoc-sm8150.o + obj-$(CONFIG_INTERCONNECT_QCOM_SM8250) += qnoc-sm8250.o +diff --git a/drivers/interconnect/qcom/sm6115.c b/drivers/interconnect/qcom/sm6115.c +new file mode 100644 +index 000000000000..c49a83c87739 +--- /dev/null ++++ b/drivers/interconnect/qcom/sm6115.c +@@ -0,0 +1,1427 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* ++ * Copyright (c) 2021, The Linux Foundation. All rights reserved. ++ * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2023, Linaro Limited ++ */ ++ ++#include <dt-bindings/interconnect/qcom,sm6115.h> ++#include <linux/clk.h> ++#include <linux/device.h> ++#include <linux/interconnect-provider.h> ++#include <linux/io.h> ++#include <linux/module.h> ++#include <linux/of_device.h> ++#include <linux/of_platform.h> ++#include <linux/platform_device.h> ++#include <linux/regmap.h> ++#include <linux/slab.h> ++ ++#include "icc-rpm.h" ++ ++static const char * const snoc_intf_clocks[] = { ++ "cpu_axi", ++ "ufs_axi", ++ "usb_axi", ++ "ipa", /* Required by qxm_ipa */ ++}; ++ ++static const char * const cnoc_intf_clocks[] = { ++ "usb_axi", ++}; ++ ++enum { ++ SM6115_MASTER_AMPSS_M0, ++ SM6115_MASTER_ANOC_SNOC, ++ SM6115_MASTER_BIMC_SNOC, ++ SM6115_MASTER_CAMNOC_HF, ++ SM6115_MASTER_CAMNOC_SF, ++ SM6115_MASTER_CRYPTO_CORE0, ++ SM6115_MASTER_GRAPHICS_3D, ++ SM6115_MASTER_IPA, ++ SM6115_MASTER_MDP_PORT0, ++ SM6115_MASTER_PIMEM, ++ SM6115_MASTER_QDSS_BAM, ++ SM6115_MASTER_QDSS_DAP, ++ SM6115_MASTER_QDSS_ETR, ++ SM6115_MASTER_QPIC, ++ SM6115_MASTER_QUP_0, ++ SM6115_MASTER_QUP_CORE_0, ++ SM6115_MASTER_SDCC_1, ++ SM6115_MASTER_SDCC_2, ++ SM6115_MASTER_SNOC_BIMC_NRT, ++ SM6115_MASTER_SNOC_BIMC_RT, ++ SM6115_MASTER_SNOC_BIMC, ++ SM6115_MASTER_SNOC_CFG, ++ SM6115_MASTER_SNOC_CNOC, ++ SM6115_MASTER_TCU_0, ++ SM6115_MASTER_TIC, ++ SM6115_MASTER_USB3, ++ SM6115_MASTER_VIDEO_P0, ++ SM6115_MASTER_VIDEO_PROC, ++ ++ SM6115_SLAVE_AHB2PHY_USB, ++ SM6115_SLAVE_ANOC_SNOC, ++ SM6115_SLAVE_APPSS, ++ SM6115_SLAVE_APSS_THROTTLE_CFG, ++ SM6115_SLAVE_BIMC_CFG, ++ SM6115_SLAVE_BIMC_SNOC, ++ SM6115_SLAVE_BOOT_ROM, ++ SM6115_SLAVE_CAMERA_CFG, ++ SM6115_SLAVE_CAMERA_NRT_THROTTLE_CFG, ++ SM6115_SLAVE_CAMERA_RT_THROTTLE_CFG, ++ SM6115_SLAVE_CLK_CTL, ++ SM6115_SLAVE_CNOC_MSS, ++ SM6115_SLAVE_CRYPTO_0_CFG, ++ SM6115_SLAVE_DCC_CFG, ++ SM6115_SLAVE_DDR_PHY_CFG, ++ SM6115_SLAVE_DDR_SS_CFG, ++ SM6115_SLAVE_DISPLAY_CFG, ++ SM6115_SLAVE_DISPLAY_THROTTLE_CFG, ++ SM6115_SLAVE_EBI_CH0, ++ SM6115_SLAVE_GPU_CFG, ++ SM6115_SLAVE_GPU_THROTTLE_CFG, ++ SM6115_SLAVE_HWKM_CORE, ++ SM6115_SLAVE_IMEM_CFG, ++ SM6115_SLAVE_IPA_CFG, ++ SM6115_SLAVE_LPASS, ++ SM6115_SLAVE_MAPSS, ++ SM6115_SLAVE_MDSP_MPU_CFG, ++ SM6115_SLAVE_MESSAGE_RAM, ++ SM6115_SLAVE_OCIMEM, ++ SM6115_SLAVE_PDM, ++ SM6115_SLAVE_PIMEM_CFG, ++ SM6115_SLAVE_PIMEM, ++ SM6115_SLAVE_PKA_CORE, ++ SM6115_SLAVE_PMIC_ARB, ++ SM6115_SLAVE_QDSS_CFG, ++ SM6115_SLAVE_QDSS_STM, ++ SM6115_SLAVE_QM_CFG, ++ SM6115_SLAVE_QM_MPU_CFG, ++ SM6115_SLAVE_QPIC, ++ SM6115_SLAVE_QUP_0, ++ SM6115_SLAVE_QUP_CORE_0, ++ SM6115_SLAVE_RBCPR_CX_CFG, ++ SM6115_SLAVE_RBCPR_MX_CFG, ++ SM6115_SLAVE_RPM, ++ SM6115_SLAVE_SDCC_1, ++ SM6115_SLAVE_SDCC_2, ++ SM6115_SLAVE_SECURITY, ++ SM6115_SLAVE_SERVICE_CNOC, ++ SM6115_SLAVE_SERVICE_SNOC, ++ SM6115_SLAVE_SNOC_BIMC_NRT, ++ SM6115_SLAVE_SNOC_BIMC_RT, ++ SM6115_SLAVE_SNOC_BIMC, ++ SM6115_SLAVE_SNOC_CFG, ++ SM6115_SLAVE_SNOC_CNOC, ++ SM6115_SLAVE_TCSR, ++ SM6115_SLAVE_TCU, ++ SM6115_SLAVE_TLMM, ++ SM6115_SLAVE_USB3, ++ SM6115_SLAVE_VENUS_CFG, ++ SM6115_SLAVE_VENUS_THROTTLE_CFG, ++ SM6115_SLAVE_VSENSE_CTRL_CFG, ++}; ++ ++static const u16 slv_ebi_slv_bimc_snoc_links[] = { ++ SM6115_SLAVE_EBI_CH0, ++ SM6115_SLAVE_BIMC_SNOC, ++}; ++ ++static struct qcom_icc_node apps_proc = { ++ .name = "apps_proc", ++ .id = SM6115_MASTER_AMPSS_M0, ++ .channels = 1, ++ .buswidth = 16, ++ .qos.qos_port = 0, ++ .qos.qos_mode = NOC_QOS_MODE_FIXED, ++ .qos.prio_level = 0, ++ .qos.areq_prio = 0, ++ .mas_rpm_id = 0, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(slv_ebi_slv_bimc_snoc_links), ++ .links = slv_ebi_slv_bimc_snoc_links, ++}; ++ ++static const u16 link_slv_ebi[] = { ++ SM6115_SLAVE_EBI_CH0, ++}; ++ ++static struct qcom_icc_node mas_snoc_bimc_rt = { ++ .name = "mas_snoc_bimc_rt", ++ .id = SM6115_MASTER_SNOC_BIMC_RT, ++ .channels = 1, ++ .buswidth = 16, ++ .qos.qos_port = 2, ++ .qos.qos_mode = NOC_QOS_MODE_BYPASS, ++ .qos.areq_prio = 0, ++ .qos.prio_level = 0, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(link_slv_ebi), ++ .links = link_slv_ebi, ++}; ++ ++static struct qcom_icc_node mas_snoc_bimc_nrt = { ++ .name = "mas_snoc_bimc_nrt", ++ .id = SM6115_MASTER_SNOC_BIMC_NRT, ++ .channels = 1, ++ .buswidth = 16, ++ .qos.qos_port = 3, ++ .qos.qos_mode = NOC_QOS_MODE_BYPASS, ++ .qos.areq_prio = 0, ++ .qos.prio_level = 0, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(link_slv_ebi), ++ .links = link_slv_ebi, ++}; ++ ++static struct qcom_icc_node mas_snoc_bimc = { ++ .name = "mas_snoc_bimc", ++ .id = SM6115_MASTER_SNOC_BIMC, ++ .channels = 1, ++ .buswidth = 16, ++ .qos.qos_port = 6, ++ .qos.qos_mode = NOC_QOS_MODE_BYPASS, ++ .qos.areq_prio = 0, ++ .qos.prio_level = 0, ++ .mas_rpm_id = 3, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(link_slv_ebi), ++ .links = link_slv_ebi, ++}; ++ ++static struct qcom_icc_node qnm_gpu = { ++ .name = "qnm_gpu", ++ .id = SM6115_MASTER_GRAPHICS_3D, ++ .channels = 1, ++ .buswidth = 32, ++ .qos.qos_port = 1, ++ .qos.qos_mode = NOC_QOS_MODE_FIXED, ++ .qos.prio_level = 0, ++ .qos.areq_prio = 0, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(slv_ebi_slv_bimc_snoc_links), ++ .links = slv_ebi_slv_bimc_snoc_links, ++}; ++ ++static struct qcom_icc_node tcu_0 = { ++ .name = "tcu_0", ++ .id = SM6115_MASTER_TCU_0, ++ .channels = 1, ++ .buswidth = 8, ++ .qos.qos_port = 4, ++ .qos.qos_mode = NOC_QOS_MODE_FIXED, ++ .qos.prio_level = 6, ++ .qos.areq_prio = 6, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(slv_ebi_slv_bimc_snoc_links), ++ .links = slv_ebi_slv_bimc_snoc_links, ++}; ++ ++static const u16 qup_core_0_links[] = { ++ SM6115_SLAVE_QUP_CORE_0, ++}; ++ ++static struct qcom_icc_node qup0_core_master = { ++ .name = "qup0_core_master", ++ .id = SM6115_MASTER_QUP_CORE_0, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = 170, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(qup_core_0_links), ++ .links = qup_core_0_links, ++}; ++ ++static const u16 link_slv_anoc_snoc[] = { ++ SM6115_SLAVE_ANOC_SNOC, ++}; ++ ++static struct qcom_icc_node crypto_c0 = { ++ .name = "crypto_c0", ++ .id = SM6115_MASTER_CRYPTO_CORE0, ++ .channels = 1, ++ .buswidth = 8, ++ .qos.qos_port = 43, ++ .qos.qos_mode = NOC_QOS_MODE_FIXED, ++ .qos.areq_prio = 2, ++ .mas_rpm_id = 23, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(link_slv_anoc_snoc), ++ .links = link_slv_anoc_snoc, ++}; ++ ++static const u16 mas_snoc_cnoc_links[] = { ++ SM6115_SLAVE_AHB2PHY_USB, ++ SM6115_SLAVE_APSS_THROTTLE_CFG, ++ SM6115_SLAVE_BIMC_CFG, ++ SM6115_SLAVE_BOOT_ROM, ++ SM6115_SLAVE_CAMERA_CFG, ++ SM6115_SLAVE_CAMERA_NRT_THROTTLE_CFG, ++ SM6115_SLAVE_CAMERA_RT_THROTTLE_CFG, ++ SM6115_SLAVE_CLK_CTL, ++ SM6115_SLAVE_CNOC_MSS, ++ SM6115_SLAVE_CRYPTO_0_CFG, ++ SM6115_SLAVE_DCC_CFG, ++ SM6115_SLAVE_DDR_PHY_CFG, ++ SM6115_SLAVE_DDR_SS_CFG, ++ SM6115_SLAVE_DISPLAY_CFG, ++ SM6115_SLAVE_DISPLAY_THROTTLE_CFG, ++ SM6115_SLAVE_GPU_CFG, ++ SM6115_SLAVE_GPU_THROTTLE_CFG, ++ SM6115_SLAVE_HWKM_CORE, ++ SM6115_SLAVE_IMEM_CFG, ++ SM6115_SLAVE_IPA_CFG, ++ SM6115_SLAVE_LPASS, ++ SM6115_SLAVE_MAPSS, ++ SM6115_SLAVE_MDSP_MPU_CFG, ++ SM6115_SLAVE_MESSAGE_RAM, ++ SM6115_SLAVE_PDM, ++ SM6115_SLAVE_PIMEM_CFG, ++ SM6115_SLAVE_PKA_CORE, ++ SM6115_SLAVE_PMIC_ARB, ++ SM6115_SLAVE_QDSS_CFG, ++ SM6115_SLAVE_QM_CFG, ++ SM6115_SLAVE_QM_MPU_CFG, ++ SM6115_SLAVE_QPIC, ++ SM6115_SLAVE_QUP_0, ++ SM6115_SLAVE_RBCPR_CX_CFG, ++ SM6115_SLAVE_RBCPR_MX_CFG, ++ SM6115_SLAVE_RPM, ++ SM6115_SLAVE_SDCC_1, ++ SM6115_SLAVE_SDCC_2, ++ SM6115_SLAVE_SECURITY, ++ SM6115_SLAVE_SERVICE_CNOC, ++ SM6115_SLAVE_SNOC_CFG, ++ SM6115_SLAVE_TCSR, ++ SM6115_SLAVE_TLMM, ++ SM6115_SLAVE_USB3, ++ SM6115_SLAVE_VENUS_CFG, ++ SM6115_SLAVE_VENUS_THROTTLE_CFG, ++ SM6115_SLAVE_VSENSE_CTRL_CFG, ++}; ++ ++static struct qcom_icc_node mas_snoc_cnoc = { ++ .name = "mas_snoc_cnoc", ++ .id = SM6115_MASTER_SNOC_CNOC, ++ .channels = 1, ++ .buswidth = 8, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(mas_snoc_cnoc_links), ++ .links = mas_snoc_cnoc_links, ++}; ++ ++static struct qcom_icc_node xm_dap = { ++ .name = "xm_dap", ++ .id = SM6115_MASTER_QDSS_DAP, ++ .channels = 1, ++ .buswidth = 8, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(mas_snoc_cnoc_links), ++ .links = mas_snoc_cnoc_links, ++}; ++ ++static const u16 link_slv_snoc_bimc_nrt[] = { ++ SM6115_SLAVE_SNOC_BIMC_NRT, ++}; ++ ++static struct qcom_icc_node qnm_camera_nrt = { ++ .name = "qnm_camera_nrt", ++ .id = SM6115_MASTER_CAMNOC_SF, ++ .channels = 1, ++ .buswidth = 32, ++ .qos.qos_port = 25, ++ .qos.qos_mode = NOC_QOS_MODE_FIXED, ++ .qos.areq_prio = 3, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(link_slv_snoc_bimc_nrt), ++ .links = link_slv_snoc_bimc_nrt, ++}; ++ ++static struct qcom_icc_node qxm_venus0 = { ++ .name = "qxm_venus0", ++ .id = SM6115_MASTER_VIDEO_P0, ++ .channels = 1, ++ .buswidth = 16, ++ .qos.qos_port = 30, ++ .qos.qos_mode = NOC_QOS_MODE_FIXED, ++ .qos.areq_prio = 3, ++ .qos.urg_fwd_en = true, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(link_slv_snoc_bimc_nrt), ++ .links = link_slv_snoc_bimc_nrt, ++}; ++ ++static struct qcom_icc_node qxm_venus_cpu = { ++ .name = "qxm_venus_cpu", ++ .id = SM6115_MASTER_VIDEO_PROC, ++ .channels = 1, ++ .buswidth = 8, ++ .qos.qos_port = 34, ++ .qos.qos_mode = NOC_QOS_MODE_FIXED, ++ .qos.areq_prio = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(link_slv_snoc_bimc_nrt), ++ .links = link_slv_snoc_bimc_nrt, ++}; ++ ++static const u16 link_slv_snoc_bimc_rt[] = { ++ SM6115_SLAVE_SNOC_BIMC_RT, ++}; ++ ++static struct qcom_icc_node qnm_camera_rt = { ++ .name = "qnm_camera_rt", ++ .id = SM6115_MASTER_CAMNOC_HF, ++ .channels = 1, ++ .buswidth = 32, ++ .qos.qos_port = 31, ++ .qos.qos_mode = NOC_QOS_MODE_FIXED, ++ .qos.areq_prio = 3, ++ .qos.urg_fwd_en = true, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(link_slv_snoc_bimc_rt), ++ .links = link_slv_snoc_bimc_rt, ++}; ++ ++static struct qcom_icc_node qxm_mdp0 = { ++ .name = "qxm_mdp0", ++ .id = SM6115_MASTER_MDP_PORT0, ++ .channels = 1, ++ .buswidth = 16, ++ .qos.qos_port = 26, ++ .qos.qos_mode = NOC_QOS_MODE_FIXED, ++ .qos.areq_prio = 3, ++ .qos.urg_fwd_en = true, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(link_slv_snoc_bimc_rt), ++ .links = link_slv_snoc_bimc_rt, ++}; ++ ++static const u16 slv_service_snoc_links[] = { ++ SM6115_SLAVE_SERVICE_SNOC, ++}; ++ ++static struct qcom_icc_node qhm_snoc_cfg = { ++ .name = "qhm_snoc_cfg", ++ .id = SM6115_MASTER_SNOC_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(slv_service_snoc_links), ++ .links = slv_service_snoc_links, ++}; ++ ++static const u16 mas_tic_links[] = { ++ SM6115_SLAVE_APPSS, ++ SM6115_SLAVE_OCIMEM, ++ SM6115_SLAVE_PIMEM, ++ SM6115_SLAVE_QDSS_STM, ++ SM6115_SLAVE_TCU, ++ SM6115_SLAVE_SNOC_BIMC, ++ SM6115_SLAVE_SNOC_CNOC, ++}; ++ ++static struct qcom_icc_node qhm_tic = { ++ .name = "qhm_tic", ++ .id = SM6115_MASTER_TIC, ++ .channels = 1, ++ .buswidth = 4, ++ .qos.qos_port = 29, ++ .qos.qos_mode = NOC_QOS_MODE_FIXED, ++ .qos.areq_prio = 2, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(mas_tic_links), ++ .links = mas_tic_links, ++}; ++ ++static struct qcom_icc_node mas_anoc_snoc = { ++ .name = "mas_anoc_snoc", ++ .id = SM6115_MASTER_ANOC_SNOC, ++ .channels = 1, ++ .buswidth = 16, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(mas_tic_links), ++ .links = mas_tic_links, ++}; ++ ++static const u16 mas_bimc_snoc_links[] = { ++ SM6115_SLAVE_APPSS, ++ SM6115_SLAVE_SNOC_CNOC, ++ SM6115_SLAVE_OCIMEM, ++ SM6115_SLAVE_PIMEM, ++ SM6115_SLAVE_QDSS_STM, ++ SM6115_SLAVE_TCU, ++}; ++ ++static struct qcom_icc_node mas_bimc_snoc = { ++ .name = "mas_bimc_snoc", ++ .id = SM6115_MASTER_BIMC_SNOC, ++ .channels = 1, ++ .buswidth = 8, ++ .mas_rpm_id = 21, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(mas_bimc_snoc_links), ++ .links = mas_bimc_snoc_links, ++}; ++ ++static const u16 mas_pimem_links[] = { ++ SM6115_SLAVE_OCIMEM, ++ SM6115_SLAVE_SNOC_BIMC, ++}; ++ ++static struct qcom_icc_node qxm_pimem = { ++ .name = "qxm_pimem", ++ .id = SM6115_MASTER_PIMEM, ++ .channels = 1, ++ .buswidth = 8, ++ .qos.qos_port = 41, ++ .qos.qos_mode = NOC_QOS_MODE_FIXED, ++ .qos.areq_prio = 2, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(mas_pimem_links), ++ .links = mas_pimem_links, ++}; ++ ++static struct qcom_icc_node qhm_qdss_bam = { ++ .name = "qhm_qdss_bam", ++ .id = SM6115_MASTER_QDSS_BAM, ++ .channels = 1, ++ .buswidth = 4, ++ .qos.qos_port = 23, ++ .qos.qos_mode = NOC_QOS_MODE_FIXED, ++ .qos.areq_prio = 2, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(link_slv_anoc_snoc), ++ .links = link_slv_anoc_snoc, ++}; ++ ++static struct qcom_icc_node qhm_qpic = { ++ .name = "qhm_qpic", ++ .id = SM6115_MASTER_QPIC, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(link_slv_anoc_snoc), ++ .links = link_slv_anoc_snoc, ++}; ++ ++static struct qcom_icc_node qhm_qup0 = { ++ .name = "qhm_qup0", ++ .id = SM6115_MASTER_QUP_0, ++ .channels = 1, ++ .buswidth = 4, ++ .qos.qos_port = 21, ++ .qos.qos_mode = NOC_QOS_MODE_FIXED, ++ .qos.areq_prio = 2, ++ .mas_rpm_id = 166, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(link_slv_anoc_snoc), ++ .links = link_slv_anoc_snoc, ++}; ++ ++static struct qcom_icc_node qxm_ipa = { ++ .name = "qxm_ipa", ++ .id = SM6115_MASTER_IPA, ++ .channels = 1, ++ .buswidth = 8, ++ .qos.qos_port = 24, ++ .qos.qos_mode = NOC_QOS_MODE_FIXED, ++ .qos.areq_prio = 2, ++ .mas_rpm_id = 59, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(link_slv_anoc_snoc), ++ .links = link_slv_anoc_snoc, ++}; ++ ++static struct qcom_icc_node xm_qdss_etr = { ++ .name = "xm_qdss_etr", ++ .id = SM6115_MASTER_QDSS_ETR, ++ .channels = 1, ++ .buswidth = 8, ++ .qos.qos_port = 33, ++ .qos.qos_mode = NOC_QOS_MODE_FIXED, ++ .qos.areq_prio = 2, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(link_slv_anoc_snoc), ++ .links = link_slv_anoc_snoc, ++}; ++ ++static struct qcom_icc_node xm_sdc1 = { ++ .name = "xm_sdc1", ++ .id = SM6115_MASTER_SDCC_1, ++ .channels = 1, ++ .buswidth = 8, ++ .qos.qos_port = 38, ++ .qos.qos_mode = NOC_QOS_MODE_FIXED, ++ .qos.areq_prio = 2, ++ .mas_rpm_id = 33, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(link_slv_anoc_snoc), ++ .links = link_slv_anoc_snoc, ++}; ++ ++static struct qcom_icc_node xm_sdc2 = { ++ .name = "xm_sdc2", ++ .id = SM6115_MASTER_SDCC_2, ++ .channels = 1, ++ .buswidth = 8, ++ .qos.qos_port = 44, ++ .qos.qos_mode = NOC_QOS_MODE_FIXED, ++ .qos.areq_prio = 2, ++ .mas_rpm_id = 35, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(link_slv_anoc_snoc), ++ .links = link_slv_anoc_snoc, ++}; ++ ++static struct qcom_icc_node xm_usb3_0 = { ++ .name = "xm_usb3_0", ++ .id = SM6115_MASTER_USB3, ++ .channels = 1, ++ .buswidth = 8, ++ .qos.qos_port = 45, ++ .qos.qos_mode = NOC_QOS_MODE_FIXED, ++ .qos.areq_prio = 2, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(link_slv_anoc_snoc), ++ .links = link_slv_anoc_snoc, ++}; ++ ++static struct qcom_icc_node ebi = { ++ .name = "ebi", ++ .id = SM6115_SLAVE_EBI_CH0, ++ .channels = 2, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = 0, ++}; ++ ++static const u16 slv_bimc_snoc_links[] = { ++ SM6115_MASTER_BIMC_SNOC, ++}; ++ ++static struct qcom_icc_node slv_bimc_snoc = { ++ .name = "slv_bimc_snoc", ++ .id = SM6115_SLAVE_BIMC_SNOC, ++ .channels = 1, ++ .buswidth = 16, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = 2, ++ .num_links = ARRAY_SIZE(slv_bimc_snoc_links), ++ .links = slv_bimc_snoc_links, ++}; ++ ++static struct qcom_icc_node qup0_core_slave = { ++ .name = "qup0_core_slave", ++ .id = SM6115_SLAVE_QUP_CORE_0, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_ahb2phy_usb = { ++ .name = "qhs_ahb2phy_usb", ++ .id = SM6115_SLAVE_AHB2PHY_USB, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_apss_throttle_cfg = { ++ .name = "qhs_apss_throttle_cfg", ++ .id = SM6115_SLAVE_APSS_THROTTLE_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_bimc_cfg = { ++ .name = "qhs_bimc_cfg", ++ .id = SM6115_SLAVE_BIMC_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_boot_rom = { ++ .name = "qhs_boot_rom", ++ .id = SM6115_SLAVE_BOOT_ROM, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_camera_nrt_throttle_cfg = { ++ .name = "qhs_camera_nrt_throttle_cfg", ++ .id = SM6115_SLAVE_CAMERA_NRT_THROTTLE_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_camera_rt_throttle_cfg = { ++ .name = "qhs_camera_rt_throttle_cfg", ++ .id = SM6115_SLAVE_CAMERA_RT_THROTTLE_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_camera_ss_cfg = { ++ .name = "qhs_camera_ss_cfg", ++ .id = SM6115_SLAVE_CAMERA_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_clk_ctl = { ++ .name = "qhs_clk_ctl", ++ .id = SM6115_SLAVE_CLK_CTL, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_cpr_cx = { ++ .name = "qhs_cpr_cx", ++ .id = SM6115_SLAVE_RBCPR_CX_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_cpr_mx = { ++ .name = "qhs_cpr_mx", ++ .id = SM6115_SLAVE_RBCPR_MX_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_crypto0_cfg = { ++ .name = "qhs_crypto0_cfg", ++ .id = SM6115_SLAVE_CRYPTO_0_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_dcc_cfg = { ++ .name = "qhs_dcc_cfg", ++ .id = SM6115_SLAVE_DCC_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_ddr_phy_cfg = { ++ .name = "qhs_ddr_phy_cfg", ++ .id = SM6115_SLAVE_DDR_PHY_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_ddr_ss_cfg = { ++ .name = "qhs_ddr_ss_cfg", ++ .id = SM6115_SLAVE_DDR_SS_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_disp_ss_cfg = { ++ .name = "qhs_disp_ss_cfg", ++ .id = SM6115_SLAVE_DISPLAY_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_display_throttle_cfg = { ++ .name = "qhs_display_throttle_cfg", ++ .id = SM6115_SLAVE_DISPLAY_THROTTLE_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_gpu_cfg = { ++ .name = "qhs_gpu_cfg", ++ .id = SM6115_SLAVE_GPU_CFG, ++ .channels = 1, ++ .buswidth = 8, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_gpu_throttle_cfg = { ++ .name = "qhs_gpu_throttle_cfg", ++ .id = SM6115_SLAVE_GPU_THROTTLE_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_hwkm = { ++ .name = "qhs_hwkm", ++ .id = SM6115_SLAVE_HWKM_CORE, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_imem_cfg = { ++ .name = "qhs_imem_cfg", ++ .id = SM6115_SLAVE_IMEM_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_ipa_cfg = { ++ .name = "qhs_ipa_cfg", ++ .id = SM6115_SLAVE_IPA_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_lpass = { ++ .name = "qhs_lpass", ++ .id = SM6115_SLAVE_LPASS, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_mapss = { ++ .name = "qhs_mapss", ++ .id = SM6115_SLAVE_MAPSS, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_mdsp_mpu_cfg = { ++ .name = "qhs_mdsp_mpu_cfg", ++ .id = SM6115_SLAVE_MDSP_MPU_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_mesg_ram = { ++ .name = "qhs_mesg_ram", ++ .id = SM6115_SLAVE_MESSAGE_RAM, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_mss = { ++ .name = "qhs_mss", ++ .id = SM6115_SLAVE_CNOC_MSS, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_pdm = { ++ .name = "qhs_pdm", ++ .id = SM6115_SLAVE_PDM, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_pimem_cfg = { ++ .name = "qhs_pimem_cfg", ++ .id = SM6115_SLAVE_PIMEM_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_pka_wrapper = { ++ .name = "qhs_pka_wrapper", ++ .id = SM6115_SLAVE_PKA_CORE, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_pmic_arb = { ++ .name = "qhs_pmic_arb", ++ .id = SM6115_SLAVE_PMIC_ARB, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_qdss_cfg = { ++ .name = "qhs_qdss_cfg", ++ .id = SM6115_SLAVE_QDSS_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_qm_cfg = { ++ .name = "qhs_qm_cfg", ++ .id = SM6115_SLAVE_QM_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_qm_mpu_cfg = { ++ .name = "qhs_qm_mpu_cfg", ++ .id = SM6115_SLAVE_QM_MPU_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_qpic = { ++ .name = "qhs_qpic", ++ .id = SM6115_SLAVE_QPIC, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_qup0 = { ++ .name = "qhs_qup0", ++ .id = SM6115_SLAVE_QUP_0, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_rpm = { ++ .name = "qhs_rpm", ++ .id = SM6115_SLAVE_RPM, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_sdc1 = { ++ .name = "qhs_sdc1", ++ .id = SM6115_SLAVE_SDCC_1, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_sdc2 = { ++ .name = "qhs_sdc2", ++ .id = SM6115_SLAVE_SDCC_2, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_security = { ++ .name = "qhs_security", ++ .id = SM6115_SLAVE_SECURITY, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static const u16 slv_snoc_cfg_links[] = { ++ SM6115_MASTER_SNOC_CFG, ++}; ++ ++static struct qcom_icc_node qhs_snoc_cfg = { ++ .name = "qhs_snoc_cfg", ++ .id = SM6115_SLAVE_SNOC_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(slv_snoc_cfg_links), ++ .links = slv_snoc_cfg_links, ++}; ++ ++static struct qcom_icc_node qhs_tcsr = { ++ .name = "qhs_tcsr", ++ .id = SM6115_SLAVE_TCSR, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_tlmm = { ++ .name = "qhs_tlmm", ++ .id = SM6115_SLAVE_TLMM, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_usb3 = { ++ .name = "qhs_usb3", ++ .id = SM6115_SLAVE_USB3, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_venus_cfg = { ++ .name = "qhs_venus_cfg", ++ .id = SM6115_SLAVE_VENUS_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_venus_throttle_cfg = { ++ .name = "qhs_venus_throttle_cfg", ++ .id = SM6115_SLAVE_VENUS_THROTTLE_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node qhs_vsense_ctrl_cfg = { ++ .name = "qhs_vsense_ctrl_cfg", ++ .id = SM6115_SLAVE_VSENSE_CTRL_CFG, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node srvc_cnoc = { ++ .name = "srvc_cnoc", ++ .id = SM6115_SLAVE_SERVICE_CNOC, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static const u16 slv_snoc_bimc_nrt_links[] = { ++ SM6115_MASTER_SNOC_BIMC_NRT, ++}; ++ ++static struct qcom_icc_node slv_snoc_bimc_nrt = { ++ .name = "slv_snoc_bimc_nrt", ++ .id = SM6115_SLAVE_SNOC_BIMC_NRT, ++ .channels = 1, ++ .buswidth = 16, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(slv_snoc_bimc_nrt_links), ++ .links = slv_snoc_bimc_nrt_links, ++}; ++ ++static const u16 slv_snoc_bimc_rt_links[] = { ++ SM6115_MASTER_SNOC_BIMC_RT, ++}; ++ ++static struct qcom_icc_node slv_snoc_bimc_rt = { ++ .name = "slv_snoc_bimc_rt", ++ .id = SM6115_SLAVE_SNOC_BIMC_RT, ++ .channels = 1, ++ .buswidth = 16, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(slv_snoc_bimc_rt_links), ++ .links = slv_snoc_bimc_rt_links, ++}; ++ ++static struct qcom_icc_node qhs_apss = { ++ .name = "qhs_apss", ++ .id = SM6115_SLAVE_APPSS, ++ .channels = 1, ++ .buswidth = 8, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static const u16 slv_snoc_cnoc_links[] = { ++ SM6115_MASTER_SNOC_CNOC ++}; ++ ++static struct qcom_icc_node slv_snoc_cnoc = { ++ .name = "slv_snoc_cnoc", ++ .id = SM6115_SLAVE_SNOC_CNOC, ++ .channels = 1, ++ .buswidth = 8, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = 25, ++ .num_links = ARRAY_SIZE(slv_snoc_cnoc_links), ++ .links = slv_snoc_cnoc_links, ++}; ++ ++static struct qcom_icc_node qxs_imem = { ++ .name = "qxs_imem", ++ .id = SM6115_SLAVE_OCIMEM, ++ .channels = 1, ++ .buswidth = 8, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = 26, ++}; ++ ++static struct qcom_icc_node qxs_pimem = { ++ .name = "qxs_pimem", ++ .id = SM6115_SLAVE_PIMEM, ++ .channels = 1, ++ .buswidth = 8, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static const u16 slv_snoc_bimc_links[] = { ++ SM6115_MASTER_SNOC_BIMC, ++}; ++ ++static struct qcom_icc_node slv_snoc_bimc = { ++ .name = "slv_snoc_bimc", ++ .id = SM6115_SLAVE_SNOC_BIMC, ++ .channels = 1, ++ .buswidth = 16, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = 24, ++ .num_links = ARRAY_SIZE(slv_snoc_bimc_links), ++ .links = slv_snoc_bimc_links, ++}; ++ ++static struct qcom_icc_node srvc_snoc = { ++ .name = "srvc_snoc", ++ .id = SM6115_SLAVE_SERVICE_SNOC, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static struct qcom_icc_node xs_qdss_stm = { ++ .name = "xs_qdss_stm", ++ .id = SM6115_SLAVE_QDSS_STM, ++ .channels = 1, ++ .buswidth = 4, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = 30, ++}; ++ ++static struct qcom_icc_node xs_sys_tcu_cfg = { ++ .name = "xs_sys_tcu_cfg", ++ .id = SM6115_SLAVE_TCU, ++ .channels = 1, ++ .buswidth = 8, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++}; ++ ++static const u16 slv_anoc_snoc_links[] = { ++ SM6115_MASTER_ANOC_SNOC, ++}; ++ ++static struct qcom_icc_node slv_anoc_snoc = { ++ .name = "slv_anoc_snoc", ++ .id = SM6115_SLAVE_ANOC_SNOC, ++ .channels = 1, ++ .buswidth = 16, ++ .mas_rpm_id = -1, ++ .slv_rpm_id = -1, ++ .num_links = ARRAY_SIZE(slv_anoc_snoc_links), ++ .links = slv_anoc_snoc_links, ++}; ++ ++static struct qcom_icc_node *bimc_nodes[] = { ++ [MASTER_AMPSS_M0] = &apps_proc, ++ [MASTER_SNOC_BIMC_RT] = &mas_snoc_bimc_rt, ++ [MASTER_SNOC_BIMC_NRT] = &mas_snoc_bimc_nrt, ++ [SNOC_BIMC_MAS] = &mas_snoc_bimc, ++ [MASTER_GRAPHICS_3D] = &qnm_gpu, ++ [MASTER_TCU_0] = &tcu_0, ++ [SLAVE_EBI_CH0] = &ebi, ++ [BIMC_SNOC_SLV] = &slv_bimc_snoc, ++}; ++ ++static const struct regmap_config bimc_regmap_config = { ++ .reg_bits = 32, ++ .reg_stride = 4, ++ .val_bits = 32, ++ .max_register = 0x80000, ++ .fast_io = true, ++}; ++ ++static const struct qcom_icc_desc sm6115_bimc = { ++ .type = QCOM_ICC_BIMC, ++ .nodes = bimc_nodes, ++ .num_nodes = ARRAY_SIZE(bimc_nodes), ++ .regmap_cfg = &bimc_regmap_config, ++ .bus_clk_desc = &bimc_clk, ++ .keep_alive = true, ++ .qos_offset = 0x8000, ++ .ab_coeff = 153, ++}; ++ ++static struct qcom_icc_node *config_noc_nodes[] = { ++ [SNOC_CNOC_MAS] = &mas_snoc_cnoc, ++ [MASTER_QDSS_DAP] = &xm_dap, ++ [SLAVE_AHB2PHY_USB] = &qhs_ahb2phy_usb, ++ [SLAVE_APSS_THROTTLE_CFG] = &qhs_apss_throttle_cfg, ++ [SLAVE_BIMC_CFG] = &qhs_bimc_cfg, ++ [SLAVE_BOOT_ROM] = &qhs_boot_rom, ++ [SLAVE_CAMERA_NRT_THROTTLE_CFG] = &qhs_camera_nrt_throttle_cfg, ++ [SLAVE_CAMERA_RT_THROTTLE_CFG] = &qhs_camera_rt_throttle_cfg, ++ [SLAVE_CAMERA_CFG] = &qhs_camera_ss_cfg, ++ [SLAVE_CLK_CTL] = &qhs_clk_ctl, ++ [SLAVE_RBCPR_CX_CFG] = &qhs_cpr_cx, ++ [SLAVE_RBCPR_MX_CFG] = &qhs_cpr_mx, ++ [SLAVE_CRYPTO_0_CFG] = &qhs_crypto0_cfg, ++ [SLAVE_DCC_CFG] = &qhs_dcc_cfg, ++ [SLAVE_DDR_PHY_CFG] = &qhs_ddr_phy_cfg, ++ [SLAVE_DDR_SS_CFG] = &qhs_ddr_ss_cfg, ++ [SLAVE_DISPLAY_CFG] = &qhs_disp_ss_cfg, ++ [SLAVE_DISPLAY_THROTTLE_CFG] = &qhs_display_throttle_cfg, ++ [SLAVE_GPU_CFG] = &qhs_gpu_cfg, ++ [SLAVE_GPU_THROTTLE_CFG] = &qhs_gpu_throttle_cfg, ++ [SLAVE_HWKM_CORE] = &qhs_hwkm, ++ [SLAVE_IMEM_CFG] = &qhs_imem_cfg, ++ [SLAVE_IPA_CFG] = &qhs_ipa_cfg, ++ [SLAVE_LPASS] = &qhs_lpass, ++ [SLAVE_MAPSS] = &qhs_mapss, ++ [SLAVE_MDSP_MPU_CFG] = &qhs_mdsp_mpu_cfg, ++ [SLAVE_MESSAGE_RAM] = &qhs_mesg_ram, ++ [SLAVE_CNOC_MSS] = &qhs_mss, ++ [SLAVE_PDM] = &qhs_pdm, ++ [SLAVE_PIMEM_CFG] = &qhs_pimem_cfg, ++ [SLAVE_PKA_CORE] = &qhs_pka_wrapper, ++ [SLAVE_PMIC_ARB] = &qhs_pmic_arb, ++ [SLAVE_QDSS_CFG] = &qhs_qdss_cfg, ++ [SLAVE_QM_CFG] = &qhs_qm_cfg, ++ [SLAVE_QM_MPU_CFG] = &qhs_qm_mpu_cfg, ++ [SLAVE_QPIC] = &qhs_qpic, ++ [SLAVE_QUP_0] = &qhs_qup0, ++ [SLAVE_RPM] = &qhs_rpm, ++ [SLAVE_SDCC_1] = &qhs_sdc1, ++ [SLAVE_SDCC_2] = &qhs_sdc2, ++ [SLAVE_SECURITY] = &qhs_security, ++ [SLAVE_SNOC_CFG] = &qhs_snoc_cfg, ++ [SLAVE_TCSR] = &qhs_tcsr, ++ [SLAVE_TLMM] = &qhs_tlmm, ++ [SLAVE_USB3] = &qhs_usb3, ++ [SLAVE_VENUS_CFG] = &qhs_venus_cfg, ++ [SLAVE_VENUS_THROTTLE_CFG] = &qhs_venus_throttle_cfg, ++ [SLAVE_VSENSE_CTRL_CFG] = &qhs_vsense_ctrl_cfg, ++ [SLAVE_SERVICE_CNOC] = &srvc_cnoc, ++}; ++ ++static const struct regmap_config cnoc_regmap_config = { ++ .reg_bits = 32, ++ .reg_stride = 4, ++ .val_bits = 32, ++ .max_register = 0x6200, ++ .fast_io = true, ++}; ++ ++static const struct qcom_icc_desc sm6115_config_noc = { ++ .type = QCOM_ICC_QNOC, ++ .nodes = config_noc_nodes, ++ .num_nodes = ARRAY_SIZE(config_noc_nodes), ++ .regmap_cfg = &cnoc_regmap_config, ++ .intf_clocks = cnoc_intf_clocks, ++ .num_intf_clocks = ARRAY_SIZE(cnoc_intf_clocks), ++ .bus_clk_desc = &bus_1_clk, ++ .keep_alive = true, ++}; ++ ++static struct qcom_icc_node *sys_noc_nodes[] = { ++ [MASTER_CRYPTO_CORE0] = &crypto_c0, ++ [MASTER_SNOC_CFG] = &qhm_snoc_cfg, ++ [MASTER_TIC] = &qhm_tic, ++ [MASTER_ANOC_SNOC] = &mas_anoc_snoc, ++ [BIMC_SNOC_MAS] = &mas_bimc_snoc, ++ [MASTER_PIMEM] = &qxm_pimem, ++ [MASTER_QDSS_BAM] = &qhm_qdss_bam, ++ [MASTER_QPIC] = &qhm_qpic, ++ [MASTER_QUP_0] = &qhm_qup0, ++ [MASTER_IPA] = &qxm_ipa, ++ [MASTER_QDSS_ETR] = &xm_qdss_etr, ++ [MASTER_SDCC_1] = &xm_sdc1, ++ [MASTER_SDCC_2] = &xm_sdc2, ++ [MASTER_USB3] = &xm_usb3_0, ++ [SLAVE_APPSS] = &qhs_apss, ++ [SNOC_CNOC_SLV] = &slv_snoc_cnoc, ++ [SLAVE_OCIMEM] = &qxs_imem, ++ [SLAVE_PIMEM] = &qxs_pimem, ++ [SNOC_BIMC_SLV] = &slv_snoc_bimc, ++ [SLAVE_SERVICE_SNOC] = &srvc_snoc, ++ [SLAVE_QDSS_STM] = &xs_qdss_stm, ++ [SLAVE_TCU] = &xs_sys_tcu_cfg, ++ [SLAVE_ANOC_SNOC] = &slv_anoc_snoc, ++}; ++ ++static const struct regmap_config sys_noc_regmap_config = { ++ .reg_bits = 32, ++ .reg_stride = 4, ++ .val_bits = 32, ++ .max_register = 0x5f080, ++ .fast_io = true, ++}; ++ ++static const struct qcom_icc_desc sm6115_sys_noc = { ++ .type = QCOM_ICC_QNOC, ++ .nodes = sys_noc_nodes, ++ .num_nodes = ARRAY_SIZE(sys_noc_nodes), ++ .regmap_cfg = &sys_noc_regmap_config, ++ .intf_clocks = snoc_intf_clocks, ++ .num_intf_clocks = ARRAY_SIZE(snoc_intf_clocks), ++ .bus_clk_desc = &bus_2_clk, ++ .keep_alive = true, ++}; ++ ++static struct qcom_icc_node *clk_virt_nodes[] = { ++ [MASTER_QUP_CORE_0] = &qup0_core_master, ++ [SLAVE_QUP_CORE_0] = &qup0_core_slave, ++}; ++ ++static const struct qcom_icc_desc sm6115_clk_virt = { ++ .type = QCOM_ICC_QNOC, ++ .nodes = clk_virt_nodes, ++ .num_nodes = ARRAY_SIZE(clk_virt_nodes), ++ .regmap_cfg = &sys_noc_regmap_config, ++ .bus_clk_desc = &qup_clk, ++ .keep_alive = true, ++}; ++ ++static struct qcom_icc_node *mmnrt_virt_nodes[] = { ++ [MASTER_CAMNOC_SF] = &qnm_camera_nrt, ++ [MASTER_VIDEO_P0] = &qxm_venus0, ++ [MASTER_VIDEO_PROC] = &qxm_venus_cpu, ++ [SLAVE_SNOC_BIMC_NRT] = &slv_snoc_bimc_nrt, ++}; ++ ++static const struct qcom_icc_desc sm6115_mmnrt_virt = { ++ .type = QCOM_ICC_QNOC, ++ .nodes = mmnrt_virt_nodes, ++ .num_nodes = ARRAY_SIZE(mmnrt_virt_nodes), ++ .regmap_cfg = &sys_noc_regmap_config, ++ .bus_clk_desc = &mmaxi_0_clk, ++ .keep_alive = true, ++ .ab_coeff = 142, ++}; ++ ++static struct qcom_icc_node *mmrt_virt_nodes[] = { ++ [MASTER_CAMNOC_HF] = &qnm_camera_rt, ++ [MASTER_MDP_PORT0] = &qxm_mdp0, ++ [SLAVE_SNOC_BIMC_RT] = &slv_snoc_bimc_rt, ++}; ++ ++static const struct qcom_icc_desc sm6115_mmrt_virt = { ++ .type = QCOM_ICC_QNOC, ++ .nodes = mmrt_virt_nodes, ++ .num_nodes = ARRAY_SIZE(mmrt_virt_nodes), ++ .regmap_cfg = &sys_noc_regmap_config, ++ .bus_clk_desc = &mmaxi_1_clk, ++ .keep_alive = true, ++ .ab_coeff = 139, ++}; ++ ++static const struct of_device_id qnoc_of_match[] = { ++ { .compatible = "qcom,sm6115-bimc", .data = &sm6115_bimc }, ++ { .compatible = "qcom,sm6115-clk-virt", .data = &sm6115_clk_virt }, ++ { .compatible = "qcom,sm6115-cnoc", .data = &sm6115_config_noc }, ++ { .compatible = "qcom,sm6115-mmrt-virt", .data = &sm6115_mmrt_virt }, ++ { .compatible = "qcom,sm6115-mmnrt-virt", .data = &sm6115_mmnrt_virt }, ++ { .compatible = "qcom,sm6115-snoc", .data = &sm6115_sys_noc }, ++ { } ++}; ++MODULE_DEVICE_TABLE(of, qnoc_of_match); ++ ++static struct platform_driver qnoc_driver = { ++ .probe = qnoc_probe, ++ .remove = qnoc_remove, ++ .driver = { ++ .name = "qnoc-sm6115", ++ .of_match_table = qnoc_of_match, ++ .sync_state = icc_sync_state, ++ }, ++}; ++ ++static int __init qnoc_driver_init(void) ++{ ++ return platform_driver_register(&qnoc_driver); ++} ++core_initcall(qnoc_driver_init); ++ ++static void __exit qnoc_driver_exit(void) ++{ ++ platform_driver_unregister(&qnoc_driver); ++} ++module_exit(qnoc_driver_exit); ++ ++MODULE_DESCRIPTION("SM6115 NoC driver"); ++MODULE_LICENSE("GPL"); +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/qrb4210-dts/0001-arm64-dts-qcom-qrb4210-rb2-Enable-MPSS-and-Wi-Fi.patch b/recipes-kernel/linux/linux-yocto/qrb4210-dts/0001-arm64-dts-qcom-qrb4210-rb2-Enable-MPSS-and-Wi-Fi.patch new file mode 100644 index 0000000..80ad1e6 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb4210-dts/0001-arm64-dts-qcom-qrb4210-rb2-Enable-MPSS-and-Wi-Fi.patch @@ -0,0 +1,86 @@ +From ff753723bf3916770c1e2580fe1f34ad9d6f0283 Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Sat, 4 Nov 2023 21:56:35 +0100 +Subject: [PATCH] arm64: dts: qcom: qrb4210-rb2: Enable MPSS and Wi-Fi + +Enable the remote processors and tighten up the regulators to enable +Wi-Fi functionality on the RB2. + +For reference, the hw/sw identifies as: + +qmi chip_id 0x150 chip_family 0x4002 board_id 0xff soc_id 0x40670000 +qmi fw_version 0x337302d3 fw_build_timestamp 2023-01-06 01:50 +fw_build_id QC_IMAGE_VERSION_STRING=WLAN.HL.3.3.7.c2-00723-QCAHLSWMTPLZ-1 +wcn3990 hw1.0 target 0x00000008 chip_id 0x00000000 sub 0000:0000 +kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0 +firmware ver api 5 features wowlan,mgmt-tx-by-reference,non-bmi +crc32 b3d4b790 +htt-ver 3.114 wmi-op 4 htt-op 3 cal file max-sta 32 raw 0 hwcrypto 1 + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20231104-topic-rb2_wifi-v1-1-fd45ae535d2f@linaro.org +Signed-off-by: Bjorn Andersson <andersson@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git ff753723bf3916770c1e2580fe1f34ad9d6f0283] +--- + arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 24 ++++++++++++++++++++---- + 1 file changed, 20 insertions(+), 4 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +index 33c312ae842e..7c19f874fa71 100644 +--- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts ++++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +@@ -281,6 +281,12 @@ &remoteproc_cdsp { + status = "okay"; + }; + ++&remoteproc_mpss { ++ firmware-name = "qcom/qrb4210/modem.mbn"; ++ ++ status = "okay"; ++}; ++ + &rpm_requests { + regulators { + compatible = "qcom,rpm-pm6125-regulators"; +@@ -347,8 +353,8 @@ vreg_l7a_1p256: l7 { + }; + + vreg_l8a_0p664: l8 { +- regulator-min-microvolt = <400000>; +- regulator-max-microvolt = <728000>; ++ regulator-min-microvolt = <640000>; ++ regulator-max-microvolt = <640000>; + }; + + vreg_l9a_1p8: l9 { +@@ -428,8 +434,8 @@ vreg_l22a_2p96: l22 { + }; + + vreg_l23a_3p3: l23 { +- regulator-min-microvolt = <3200000>; +- regulator-max-microvolt = <3400000>; ++ regulator-min-microvolt = <3312000>; ++ regulator-max-microvolt = <3312000>; + regulator-allow-set-load; + }; + +@@ -620,6 +626,16 @@ &usb_qmpphy { + status = "okay"; + }; + ++&wifi { ++ vdd-0.8-cx-mx-supply = <&vreg_l8a_0p664>; ++ vdd-1.8-xo-supply = <&vreg_l16a_1p3>; ++ vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; ++ vdd-3.3-ch0-supply = <&vreg_l23a_3p3>; ++ qcom,ath10k-calibration-variant = "Thundercomm_RB2"; ++ ++ status = "okay"; ++}; ++ + &xo_board { + clock-frequency = <19200000>; + }; +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/qrb4210-dts/0001-arm64-dts-qcom-sm6115-Add-UART3.patch b/recipes-kernel/linux/linux-yocto/qrb4210-dts/0001-arm64-dts-qcom-sm6115-Add-UART3.patch new file mode 100644 index 0000000..385e1b2 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb4210-dts/0001-arm64-dts-qcom-sm6115-Add-UART3.patch @@ -0,0 +1,66 @@ +From ba5f5610841fad3b15c69c6949ed6e19bd5b466e Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Mon, 27 Nov 2023 12:23:27 +0100 +Subject: [PATCH 1/2] arm64: dts: qcom: sm6115: Add UART3 + +Hook up UART3, usually used for communicating with a Bluetooth module. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20231120-topic-rb2_bt-v2-1-4bbf266258ef@linaro.org +Signed-off-by: Bjorn Andersson <andersson@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git ba5f5610841fad3b15c69c6949ed6e19bd5b466e] +--- + arch/arm64/boot/dts/qcom/sm6115.dtsi | 30 ++++++++++++++++++++++++++++ + 1 file changed, 30 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi +index 839c60351240..0d13d7bf6bd1 100644 +--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi +@@ -273,6 +273,25 @@ memory@80000000 { + reg = <0 0x80000000 0 0>; + }; + ++ qup_opp_table: opp-table-qup { ++ compatible = "operating-points-v2"; ++ ++ opp-75000000 { ++ opp-hz = /bits/ 64 <75000000>; ++ required-opps = <&rpmpd_opp_low_svs>; ++ }; ++ ++ opp-100000000 { ++ opp-hz = /bits/ 64 <100000000>; ++ required-opps = <&rpmpd_opp_svs>; ++ }; ++ ++ opp-128000000 { ++ opp-hz = /bits/ 64 <128000000>; ++ required-opps = <&rpmpd_opp_nom>; ++ }; ++ }; ++ + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <GIC_PPI 6 IRQ_TYPE_LEVEL_HIGH>; +@@ -1208,6 +1227,17 @@ spi3: spi@4a8c000 { + status = "disabled"; + }; + ++ uart3: serial@4a8c000 { ++ compatible = "qcom,geni-uart"; ++ reg = <0x0 0x04a8c000 0x0 0x4000>; ++ interrupts-extended = <&intc GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; ++ clock-names = "se"; ++ power-domains = <&rpmpd SM6115_VDDCX>; ++ operating-points-v2 = <&qup_opp_table>; ++ status = "disabled"; ++ }; ++ + i2c4: i2c@4a90000 { + compatible = "qcom,geni-i2c"; + reg = <0x0 0x04a90000 0x0 0x4000>; +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/qrb4210-dts/0001-arm64-dts-qcom-sm6115-Hook-up-interconnects.patch b/recipes-kernel/linux/linux-yocto/qrb4210-dts/0001-arm64-dts-qcom-sm6115-Hook-up-interconnects.patch new file mode 100644 index 0000000..a3c3832 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb4210-dts/0001-arm64-dts-qcom-sm6115-Hook-up-interconnects.patch @@ -0,0 +1,475 @@ +From b3eaa47395b9d0fc593e7f8b8b0abb4c769ad30d Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Mon, 11 Dec 2023 10:23:59 +0100 +Subject: [PATCH] arm64: dts: qcom: sm6115: Hook up interconnects + +Add interconnect provider nodes and hook up interconnects to consumer +devices, including bwmon. + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20231209-topic-6115iccdt-v1-2-f62da62b7276@linaro.org +Signed-off-by: Bjorn Andersson <andersson@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git b3eaa47395b9d0fc593e7f8b8b0abb4c769ad30d] +--- + arch/arm64/boot/dts/qcom/sm6115.dtsi | 277 +++++++++++++++++++++++++++ + 1 file changed, 277 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi +index 72a833b7cd83..160e098f1075 100644 +--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi +@@ -10,6 +10,8 @@ + #include <dt-bindings/dma/qcom-gpi.h> + #include <dt-bindings/firmware/qcom,scm.h> + #include <dt-bindings/gpio/gpio.h> ++#include <dt-bindings/interconnect/qcom,rpm-icc.h> ++#include <dt-bindings/interconnect/qcom,sm6115.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/qcom-rpmpd.h> + +@@ -264,6 +266,8 @@ firmware { + scm: scm { + compatible = "qcom,scm-sm6115", "qcom,scm"; + #reset-cells = <1>; ++ interconnects = <&system_noc MASTER_CRYPTO_CORE0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>; + }; + }; + +@@ -878,6 +882,43 @@ usb_qmpphy: phy@1615000 { + status = "disabled"; + }; + ++ system_noc: interconnect@1880000 { ++ compatible = "qcom,sm6115-snoc"; ++ reg = <0x0 0x01880000 0x0 0x5f080>; ++ clocks = <&gcc GCC_SYS_NOC_CPUSS_AHB_CLK>, ++ <&gcc GCC_SYS_NOC_UFS_PHY_AXI_CLK>, ++ <&gcc GCC_SYS_NOC_USB3_PRIM_AXI_CLK>, ++ <&rpmcc RPM_SMD_IPA_CLK>; ++ clock-names = "cpu_axi", ++ "ufs_axi", ++ "usb_axi", ++ "ipa"; ++ #interconnect-cells = <2>; ++ ++ clk_virt: interconnect-clk { ++ compatible = "qcom,sm6115-clk-virt"; ++ #interconnect-cells = <2>; ++ }; ++ ++ mmrt_virt: interconnect-mmrt { ++ compatible = "qcom,sm6115-mmrt-virt"; ++ #interconnect-cells = <2>; ++ }; ++ ++ mmnrt_virt: interconnect-mmnrt { ++ compatible = "qcom,sm6115-mmnrt-virt"; ++ #interconnect-cells = <2>; ++ }; ++ }; ++ ++ config_noc: interconnect@1900000 { ++ compatible = "qcom,sm6115-cnoc"; ++ reg = <0x0 0x01900000 0x0 0x6200>; ++ clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>; ++ clock-names = "usb_axi"; ++ #interconnect-cells = <2>; ++ }; ++ + qfprom@1b40000 { + compatible = "qcom,sm6115-qfprom", "qcom,qfprom"; + reg = <0x0 0x01b40000 0x0 0x7000>; +@@ -902,6 +943,60 @@ rng: rng@1b53000 { + clock-names = "core"; + }; + ++ pmu@1b8e300 { ++ compatible = "qcom,sm6115-cpu-bwmon", "qcom,sdm845-bwmon"; ++ reg = <0x0 0x01b8e300 0x0 0x600>; ++ interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>; ++ ++ operating-points-v2 = <&cpu_bwmon_opp_table>; ++ interconnects = <&bimc MASTER_AMPSS_M0 RPM_ACTIVE_TAG ++ &bimc SLAVE_EBI_CH0 RPM_ACTIVE_TAG>; ++ ++ cpu_bwmon_opp_table: opp-table { ++ compatible = "operating-points-v2"; ++ ++ opp-0 { ++ opp-peak-kBps = <(200 * 4 * 1000)>; ++ }; ++ ++ opp-1 { ++ opp-peak-kBps = <(300 * 4 * 1000)>; ++ }; ++ ++ opp-2 { ++ opp-peak-kBps = <(451 * 4 * 1000)>; ++ }; ++ ++ opp-3 { ++ opp-peak-kBps = <(547 * 4 * 1000)>; ++ }; ++ ++ opp-4 { ++ opp-peak-kBps = <(681 * 4 * 1000)>; ++ }; ++ ++ opp-5 { ++ opp-peak-kBps = <(768 * 4 * 1000)>; ++ }; ++ ++ opp-6 { ++ opp-peak-kBps = <(1017 * 4 * 1000)>; ++ }; ++ ++ opp-7 { ++ opp-peak-kBps = <(1353 * 4 * 1000)>; ++ }; ++ ++ opp-8 { ++ opp-peak-kBps = <(1555 * 4 * 1000)>; ++ }; ++ ++ opp-9 { ++ opp-peak-kBps = <(1804 * 4 * 1000)>; ++ }; ++ }; ++ }; ++ + spmi_bus: spmi@1c40000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0x0 0x01c40000 0x0 0x1100>, +@@ -931,6 +1026,12 @@ tsens0: thermal-sensor@4411000 { + #thermal-sensor-cells = <1>; + }; + ++ bimc: interconnect@4480000 { ++ compatible = "qcom,sm6115-bimc"; ++ reg = <0x0 0x04480000 0x0 0x80000>; ++ #interconnect-cells = <2>; ++ }; ++ + rpm_msg_ram: sram@45f0000 { + compatible = "qcom,rpm-msg-ram"; + reg = <0x0 0x045f0000 0x0 0x7000>; +@@ -958,8 +1059,42 @@ sdhc_1: mmc@4744000 { + <&gcc GCC_SDCC1_ICE_CORE_CLK>; + clock-names = "iface", "core", "xo", "ice"; + ++ power-domains = <&rpmpd SM6115_VDDCX>; ++ operating-points-v2 = <&sdhc1_opp_table>; ++ interconnects = <&system_noc MASTER_SDCC_1 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG ++ &config_noc SLAVE_SDCC_1 RPM_ALWAYS_TAG>; ++ interconnect-names = "sdhc-ddr", ++ "cpu-sdhc"; ++ + bus-width = <8>; + status = "disabled"; ++ ++ sdhc1_opp_table: opp-table { ++ compatible = "operating-points-v2"; ++ ++ opp-100000000 { ++ opp-hz = /bits/ 64 <100000000>; ++ required-opps = <&rpmpd_opp_low_svs>; ++ opp-peak-kBps = <250000 133320>; ++ opp-avg-kBps = <102400 65000>; ++ }; ++ ++ opp-192000000 { ++ opp-hz = /bits/ 64 <192000000>; ++ required-opps = <&rpmpd_opp_low_svs>; ++ opp-peak-kBps = <800000 300000>; ++ opp-avg-kBps = <204800 200000>; ++ }; ++ ++ opp-384000000 { ++ opp-hz = /bits/ 64 <384000000>; ++ required-opps = <&rpmpd_opp_svs_plus>; ++ opp-peak-kBps = <800000 300000>; ++ opp-avg-kBps = <204800 200000>; ++ }; ++ }; + }; + + sdhc_2: mmc@4784000 { +@@ -980,6 +1115,12 @@ sdhc_2: mmc@4784000 { + operating-points-v2 = <&sdhc2_opp_table>; + iommus = <&apps_smmu 0x00a0 0x0>; + resets = <&gcc GCC_SDCC2_BCR>; ++ interconnects = <&system_noc MASTER_SDCC_2 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG ++ &config_noc SLAVE_SDCC_2 RPM_ALWAYS_TAG>; ++ interconnect-names = "sdhc-ddr", ++ "cpu-sdhc"; + + bus-width = <4>; + qcom,dll-config = <0x0007642c>; +@@ -992,11 +1133,15 @@ sdhc2_opp_table: opp-table { + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmpd_opp_low_svs>; ++ opp-peak-kBps = <250000 133320>; ++ opp-avg-kBps = <261438 150000>; + }; + + opp-202000000 { + opp-hz = /bits/ 64 <202000000>; + required-opps = <&rpmpd_opp_nom>; ++ opp-peak-kBps = <800000 300000>; ++ opp-avg-kBps = <261438 300000>; + }; + }; + }; +@@ -1103,6 +1248,15 @@ i2c0: i2c@4a80000 { + dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>, + <&gpi_dma0 1 0 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; ++ interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -1119,6 +1273,15 @@ spi0: spi@4a80000 { + dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>, + <&gpi_dma0 1 0 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; ++ interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -1135,6 +1298,12 @@ i2c1: i2c@4a84000 { + dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>, + <&gpi_dma0 1 1 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; ++ interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -1151,6 +1320,15 @@ spi1: spi@4a84000 { + dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>, + <&gpi_dma0 1 1 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; ++ interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -1167,6 +1345,15 @@ i2c2: i2c@4a88000 { + dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>, + <&gpi_dma0 1 2 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; ++ interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -1183,6 +1370,15 @@ spi2: spi@4a88000 { + dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>, + <&gpi_dma0 1 2 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; ++ interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -1199,6 +1395,15 @@ i2c3: i2c@4a8c000 { + dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>, + <&gpi_dma0 1 3 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; ++ interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -1215,6 +1420,15 @@ spi3: spi@4a8c000 { + dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>, + <&gpi_dma0 1 3 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; ++ interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -1228,6 +1442,12 @@ uart3: serial@4a8c000 { + clock-names = "se"; + power-domains = <&rpmpd SM6115_VDDCX>; + operating-points-v2 = <&qup_opp_table>; ++ interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config"; + status = "disabled"; + }; + +@@ -1242,6 +1462,15 @@ i2c4: i2c@4a90000 { + dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>, + <&gpi_dma0 1 4 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; ++ interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -1258,6 +1487,15 @@ spi4: spi@4a90000 { + dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>, + <&gpi_dma0 1 4 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; ++ interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -1269,6 +1507,12 @@ uart4: serial@4a90000 { + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; + interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>; ++ interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config"; + status = "disabled"; + }; + +@@ -1283,6 +1527,15 @@ i2c5: i2c@4a94000 { + dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>, + <&gpi_dma0 1 5 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; ++ interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -1299,6 +1552,15 @@ spi5: spi@4a94000 { + dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>, + <&gpi_dma0 1 5 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; ++ interconnects = <&clk_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG ++ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG ++ &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>, ++ <&system_noc MASTER_QUP_0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>; ++ interconnect-names = "qup-core", ++ "qup-config", ++ "qup-memory"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -1330,6 +1592,14 @@ usb: usb@4ef8800 { + + resets = <&gcc GCC_USB30_PRIM_BCR>; + power-domains = <&gcc GCC_USB30_PRIM_GDSC>; ++ /* TODO: USB<->IPA path */ ++ interconnects = <&system_noc MASTER_USB3 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG ++ &config_noc SLAVE_USB3 RPM_ALWAYS_TAG>; ++ interconnect-names = "usb-ddr", ++ "apps-usb"; ++ + qcom,select-utmi-as-pipe-clk; + status = "disabled"; + +@@ -1501,6 +1771,13 @@ mdss: display-subsystem@5e00000 { + iommus = <&apps_smmu 0x420 0x2>, + <&apps_smmu 0x421 0x0>; + ++ interconnects = <&mmrt_virt MASTER_MDP_PORT0 RPM_ALWAYS_TAG ++ &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>, ++ <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG ++ &config_noc SLAVE_DISPLAY_CFG RPM_ALWAYS_TAG>; ++ interconnect-names = "mdp0-mem", ++ "cpu-cfg"; ++ + #address-cells = <2>; + #size-cells = <2>; + ranges; +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/qrb4210-dts/0002-arm64-dts-qcom-qrb4210-rb2-Enable-bluetooth.patch b/recipes-kernel/linux/linux-yocto/qrb4210-dts/0002-arm64-dts-qcom-qrb4210-rb2-Enable-bluetooth.patch new file mode 100644 index 0000000..d70ef6a --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb4210-dts/0002-arm64-dts-qcom-qrb4210-rb2-Enable-bluetooth.patch @@ -0,0 +1,162 @@ +From cab60b166575dd6db4c85487e87a9b677e04c153 Mon Sep 17 00:00:00 2001 +From: Konrad Dybcio <konrad.dybcio@linaro.org> +Date: Mon, 27 Nov 2023 12:23:28 +0100 +Subject: [PATCH 2/2] arm64: dts: qcom: qrb4210-rb2: Enable bluetooth + +Enable the QCA bluetooth on RB2. It identifies like the following: + +Bluetooth: hci0: QCA Product ID :0x0000000a +Bluetooth: hci0: QCA SOC Version :0x40020150 +Bluetooth: hci0: QCA ROM Version :0x00000201 +Bluetooth: hci0: QCA Patch Version:0x00000001 +Bluetooth: hci0: QCA controller version 0x01500201 + +Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> +Link: https://lore.kernel.org/r/20231120-topic-rb2_bt-v2-2-4bbf266258ef@linaro.org +Signed-off-by: Bjorn Andersson <andersson@kernel.org> +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git cab60b166575dd6db4c85487e87a9b677e04c153] +--- + arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 87 +++++++++++++++++++++++- + 1 file changed, 86 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +index 9738c0dacd58..33c312ae842e 100644 +--- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts ++++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +@@ -15,6 +15,7 @@ / { + + aliases { + serial0 = &uart4; ++ serial1 = &uart3; + }; + + chosen { +@@ -352,7 +353,8 @@ vreg_l8a_0p664: l8 { + + vreg_l9a_1p8: l9 { + regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <2000000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-allow-set-load; + }; + + vreg_l10a_1p8: l10 { +@@ -389,11 +391,13 @@ vreg_l15a_3p128: l15 { + vreg_l16a_1p3: l16 { + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <1904000>; ++ regulator-allow-set-load; + }; + + vreg_l17a_1p3: l17 { + regulator-min-microvolt = <1152000>; + regulator-max-microvolt = <1384000>; ++ regulator-allow-set-load; + }; + + vreg_l18a_1p232: l18 { +@@ -426,6 +430,7 @@ vreg_l22a_2p96: l22 { + vreg_l23a_3p3: l23 { + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3400000>; ++ regulator-allow-set-load; + }; + + vreg_l24a_2p96: l24 { +@@ -487,6 +492,66 @@ &tlmm { + <56 3>, <61 2>, <64 1>, + <68 1>, <72 8>, <96 1>; + ++ uart3_default: uart3-default-state { ++ cts-pins { ++ pins = "gpio8"; ++ function = "qup3"; ++ drive-strength = <2>; ++ bias-bus-hold; ++ }; ++ ++ rts-pins { ++ pins = "gpio9"; ++ function = "qup3"; ++ drive-strength = <2>; ++ bias-disable; ++ }; ++ ++ tx-pins { ++ pins = "gpio10"; ++ function = "qup3"; ++ drive-strength = <2>; ++ bias-disable; ++ }; ++ ++ rx-pins { ++ pins = "gpio11"; ++ function = "qup3"; ++ drive-strength = <2>; ++ bias-pull-up; ++ }; ++ }; ++ ++ uart3_sleep: uart3-sleep-state { ++ cts-pins { ++ pins = "gpio8"; ++ function = "gpio"; ++ drive-strength = <2>; ++ bias-bus-hold; ++ }; ++ ++ rts-pins { ++ pins = "gpio9"; ++ function = "gpio"; ++ drive-strength = <2>; ++ bias-pull-down; ++ }; ++ ++ tx-pins { ++ pins = "gpio10"; ++ function = "gpio"; ++ drive-strength = <2>; ++ bias-pull-up; ++ }; ++ ++ rx-pins { ++ pins = "gpio11"; ++ function = "gpio"; ++ drive-strength = <2>; ++ bias-pull-up; ++ }; ++ }; ++ + lt9611_rst_pin: lt9611-rst-state { + pins = "gpio41"; + function = "gpio"; +@@ -508,6 +573,26 @@ sdc2_card_det_n: sd-card-det-n-state { + }; + }; + ++&uart3 { ++ interrupts-extended = <&intc GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, ++ <&tlmm 11 IRQ_TYPE_LEVEL_HIGH>; ++ pinctrl-0 = <&uart3_default>; ++ pinctrl-1 = <&uart3_sleep>; ++ pinctrl-names = "default", "sleep"; ++ status = "okay"; ++ ++ bluetooth { ++ compatible = "qcom,wcn3988-bt"; ++ ++ vddio-supply = <&vreg_l9a_1p8>; ++ vddxo-supply = <&vreg_l16a_1p3>; ++ vddrf-supply = <&vreg_l17a_1p3>; ++ vddch0-supply = <&vreg_l23a_3p3>; ++ enable-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>; ++ max-speed = <3200000>; ++ }; ++}; ++ + &uart4 { + status = "okay"; + }; +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/qrb4210-dts/usb/0002-arm64-dts-qcom-qrb4210-rb2-Select-USB3-host-mode-by-.patch b/recipes-kernel/linux/linux-yocto/qrb4210-dts/usb/0002-arm64-dts-qcom-qrb4210-rb2-Select-USB3-host-mode-by-.patch new file mode 100644 index 0000000..15f9507 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb4210-dts/usb/0002-arm64-dts-qcom-qrb4210-rb2-Select-USB3-host-mode-by-.patch @@ -0,0 +1,30 @@ +From 89293aa2737299d021d42fef649bdcd191953a0b Mon Sep 17 00:00:00 2001 +From: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> +Date: Tue, 21 Nov 2023 13:22:49 +0200 +Subject: [PATCH 2/3] arm64: dts: qcom: qrb4210-rb2: Select USB3 host mode by + default + +The USB3 controller mode is selected by on-board DIP switches, and +by default it is set to the host mode, specify the selection. + +Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +index 7c19f874fa71..97344508c94f 100644 +--- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts ++++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +@@ -609,6 +609,7 @@ &usb { + + &usb_dwc3 { + maximum-speed = "super-speed"; ++ dr_mode = "host"; + }; + + &usb_hsphy { +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/qrb4210-dts/usb/0003-arm64-dts-qcom-sm6115-Enable-USB3-SS-phy.patch b/recipes-kernel/linux/linux-yocto/qrb4210-dts/usb/0003-arm64-dts-qcom-sm6115-Enable-USB3-SS-phy.patch new file mode 100644 index 0000000..fd344bc --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/qrb4210-dts/usb/0003-arm64-dts-qcom-sm6115-Enable-USB3-SS-phy.patch @@ -0,0 +1,53 @@ +From 3d1bd03aa758d8766f3d7e3cae8aa24d9fe0bf09 Mon Sep 17 00:00:00 2001 +From: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> +Date: Tue, 21 Nov 2023 13:20:18 +0200 +Subject: [PATCH 3/3] arm64: dts: qcom: sm6115: Enable USB3 SS phy + +There is no reason to limit USB3 controller to USB2 functionality, +moreover it fixes a contradiction with the selected super-speed +mode on RB2 board. Additionally specify the OTG function in the SoC +specific description. + +Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 1 - + arch/arm64/boot/dts/qcom/sm6115.dtsi | 3 ++- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +index 97344508c94f..549f36276269 100644 +--- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts ++++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +@@ -608,7 +608,6 @@ &usb { + }; + + &usb_dwc3 { +- maximum-speed = "super-speed"; + dr_mode = "host"; + }; + +diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi +index ca49e8c7f6e6..3680dc203263 100644 +--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi +@@ -1607,7 +1607,6 @@ &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>, + interconnect-names = "usb-ddr", + "apps-usb"; + +- qcom,select-utmi-as-pipe-clk; + status = "disabled"; + + usb_dwc3: usb@4e00000 { +@@ -1622,6 +1621,8 @@ usb_dwc3: usb@4e00000 { + snps,has-lpm-erratum; + snps,hird-threshold = /bits/ 8 <0x10>; + snps,usb3_lpm_capable; ++ maximum-speed = "super-speed"; ++ dr_mode = "otg"; + }; + }; + +-- +2.39.2 + diff --git a/recipes-kernel/linux/linux-yocto/workarounds/0001-PENDING-arm64-dts-qcm6490-Remove-voltage-voting-for-.patch b/recipes-kernel/linux/linux-yocto/workarounds/0001-PENDING-arm64-dts-qcm6490-Remove-voltage-voting-for-.patch new file mode 100644 index 0000000..e64edf3 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/workarounds/0001-PENDING-arm64-dts-qcm6490-Remove-voltage-voting-for-.patch @@ -0,0 +1,51 @@ +From 9939a54d773c0a42acbb20a339176ace57585e7a Mon Sep 17 00:00:00 2001 +From: Umang Chheda <quic_uchheda@quicinc.com> +Date: Wed, 11 Oct 2023 20:57:16 +0530 +Subject: [PATCH 1/2] PENDING: arm64: dts: qcm6490: Remove voltage voting for + USB rails + +USB driver does not vote for voltage on hsphy and ssphy +rails. Due to which the initial voltage set by bootloader +is overridden by regulator framework with min voltage specified +on regulator registration. + +Fix this temporarily by removing voltage voting support, which +will prevent regulator framework overriding the voltage set by +bootloader. + +This commit will be reverted once voltage voting support is added +in USB driver. + +Signed-off-by: Umang Chheda <quic_uchheda@quicinc.com> +Signed-off-by: Salendarsingh Gaud <quic_sgaud@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +index 970dbceeea17..bd638812ade2 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +@@ -372,3 +372,17 @@ &vreg_l9b_1p2 { + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>; + }; ++ ++&vreg_l1b_0p8 { ++ /delete-property/regulator-min-microvolt; ++ /delete-property/regulator-max-microvolt; ++ regulator-allow-set-load; ++ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>; ++}; ++ ++&vreg_l10c_0p8 { ++ /delete-property/regulator-min-microvolt; ++ /delete-property/regulator-max-microvolt; ++ regulator-allow-set-load; ++ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>; ++}; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/workarounds/0001-PENDING-arm64-dts-qcom-Remove-voltage-vote-support-f.patch b/recipes-kernel/linux/linux-yocto/workarounds/0001-PENDING-arm64-dts-qcom-Remove-voltage-vote-support-f.patch new file mode 100644 index 0000000..9c9a8c9 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/workarounds/0001-PENDING-arm64-dts-qcom-Remove-voltage-vote-support-f.patch @@ -0,0 +1,46 @@ +From 362bfa9478feab614cde2e8c8daa47357cb5576f Mon Sep 17 00:00:00 2001 +From: Umang Chheda <quic_uchheda@quicinc.com> +Date: Wed, 11 Oct 2023 20:32:47 +0530 +Subject: [PATCH 1/2] PENDING: arm64: dts: qcom: Remove voltage vote support + for UFS for IDP + +UFS rails have different voltage requirement for UFS2.x v/s UFS3.x. +Bootloader sets the proper voltage based on UFS type. There can be +case where the voltage set by bootloader is overridden by HLOS client. + +To prevent above issue, Add change to remove voltage voting support +for UFS rails. + +Signed-off-by: Umang Chheda <quic_uchheda@quicinc.com> +Signed-off-by: Salendarsingh Gaud <quic_sgaud@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +index 004fdb1ffd58..c1845ef64112 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +@@ -354,3 +354,17 @@ &usb_1_qmpphy { + + status = "okay"; + }; ++ ++&vreg_l7b_2p9 { ++ /delete-property/regulator-min-microvolt; ++ /delete-property/regulator-max-microvolt; ++ regulator-allow-set-load; ++ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>; ++}; ++ ++&vreg_l9b_1p2 { ++ /delete-property/regulator-min-microvolt; ++ /delete-property/regulator-max-microvolt; ++ regulator-allow-set-load; ++ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>; ++}; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/workarounds/0001-QCLINUX-arm64-dts-qcom-Add-board-id-and-msm-id-for-Q.patch b/recipes-kernel/linux/linux-yocto/workarounds/0001-QCLINUX-arm64-dts-qcom-Add-board-id-and-msm-id-for-Q.patch new file mode 100644 index 0000000..74dabba --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/workarounds/0001-QCLINUX-arm64-dts-qcom-Add-board-id-and-msm-id-for-Q.patch @@ -0,0 +1,36 @@ +From 0ae6d4e1b904b06ceb0690e65fa267c8f21f4136 Mon Sep 17 00:00:00 2001 +From: Komal Bajaj <quic_kbajaj@quicinc.com> +Date: Wed, 11 Oct 2023 12:11:35 +0530 +Subject: [PATCH 1/2] QCLINUX: arm64: dts: qcom: Add board-id and msm-id for + QCM6490 IDP + +Add board-id and msm-id for QCM6490-idp for now. This is only a +workaround, that shall be replaced by the compatible string +check approach to pick the correct DTB. + +Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> +Signed-off-by: Salendarsingh Gaud <quic_sgaud@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +index 7d609317af82..004fdb1ffd58 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +@@ -16,6 +16,10 @@ / { + model = "Qualcomm Technologies, Inc. QCM6490 IDP"; + compatible = "qcom,qcm6490-idp", "qcom,qcm6490"; + ++ /* This will be deprecated soon */ ++ qcom,msm-id = <497 0x10000>, <498 0x10000>, <475 0x10000>, <515 0x10000>; ++ qcom,board-id = <34 0>, <34 1>; ++ + aliases { + serial0 = &uart5; + }; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/workarounds/0001-QCLINUX-arm64-dts-qcom-qcm6490-disable-sdhc1-for-ufs.patch b/recipes-kernel/linux/linux-yocto/workarounds/0001-QCLINUX-arm64-dts-qcom-qcm6490-disable-sdhc1-for-ufs.patch new file mode 100644 index 0000000..4366bc4 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/workarounds/0001-QCLINUX-arm64-dts-qcom-qcm6490-disable-sdhc1-for-ufs.patch @@ -0,0 +1,36 @@ +From 8f721d3288ce338203da845578ecd356d49a33ef Mon Sep 17 00:00:00 2001 +From: Manish Pandey <quic_mapa@quicinc.com> +Date: Fri, 13 Oct 2023 19:38:59 +0530 +Subject: [PATCH] QCLINUX: arm64: dts: qcom: qcm6490: disable sdhc1 for ufs + target + +Disable sdhc1 for QCM6490 for ufs boot target to avoid probe +for sdhc1 as vreg_l7b_2p9 is shared regulator for both ufs vcc +and emmc vcc. Currently this is causing probe failure for ufs. + +Signed-off-by: Manish Pandey <quic_mapa@quicinc.com> +Signed-off-by: Salendarsingh Gaud <quic_sgaud@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +index c1845ef64112..970dbceeea17 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +@@ -250,6 +250,10 @@ &gpi_dma1 { + status = "okay"; + }; + ++&sdhc_1 { ++ status = "disabled"; ++}; ++ + &pm8350c_pwm { + status = "okay"; + }; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/workarounds/0002-PENDING-arm64-dts-qcm6490-rb3-Remove-voltage-voting-.patch b/recipes-kernel/linux/linux-yocto/workarounds/0002-PENDING-arm64-dts-qcm6490-rb3-Remove-voltage-voting-.patch new file mode 100644 index 0000000..f81e51a --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/workarounds/0002-PENDING-arm64-dts-qcm6490-rb3-Remove-voltage-voting-.patch @@ -0,0 +1,57 @@ +From b0be64f4b3ced1702f3a4ab1629c3df974fbe705 Mon Sep 17 00:00:00 2001 +From: Umang Chheda <quic_uchheda@quicinc.com> +Date: Wed, 18 Oct 2023 18:14:15 +0530 +Subject: [PATCH 2/2] PENDING: arm64: dts: qcm6490-rb3: Remove voltage voting + for USB rails + +USB driver does not vote for voltage on hsphy and ssphy +rails. Due to which the initial voltage set by bootloader +is overridden by regulator framework with min voltage specified +on regulator registration. + +Fix this temporarily by removing voltage voting support, which +will prevent regulator framework overriding the voltage set by +bootloader for QC6490 RB3 Platform. + +This commit will be reverted once voltage voting support is added +in USB driver. + +Signed-off-by: Umang Chheda <quic_uchheda@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490-rb3.dts | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts b/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts +index 3a1c781c965f..b244e66e9857 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts +@@ -338,6 +338,13 @@ &usb_1_qmpphy { + status = "okay"; + }; + ++&vreg_l1b_0p912 { ++ /delete-property/regulator-min-microvolt; ++ /delete-property/regulator-max-microvolt; ++ regulator-allow-set-load; ++ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>; ++}; ++ + &vreg_l7b_2p952 { + /delete-property/regulator-min-microvolt; + /delete-property/regulator-max-microvolt; +@@ -351,3 +358,10 @@ &vreg_l9b_1p2 { + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>; + }; ++ ++&vreg_l10c_0p88 { ++ /delete-property/regulator-min-microvolt; ++ /delete-property/regulator-max-microvolt; ++ regulator-allow-set-load; ++ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>; ++}; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/workarounds/0002-PENDING-arm64-dts-qcom-Remove-voltage-vote-support-f.patch b/recipes-kernel/linux/linux-yocto/workarounds/0002-PENDING-arm64-dts-qcom-Remove-voltage-vote-support-f.patch new file mode 100644 index 0000000..570b971 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/workarounds/0002-PENDING-arm64-dts-qcom-Remove-voltage-vote-support-f.patch @@ -0,0 +1,45 @@ +From 3e73434eade4bf52849539ca19a47b5731d3cd37 Mon Sep 17 00:00:00 2001 +From: Umang Chheda <quic_uchheda@quicinc.com> +Date: Wed, 18 Oct 2023 18:12:00 +0530 +Subject: [PATCH 2/2] PENDING: arm64: dts: qcom: Remove voltage vote support + for UFS for RB3 + +UFS rails have different voltage requirement for UFS2.x v/s UFS3.x. +Bootloader sets the proper voltage based on UFS type. There can be +case where the voltage set by bootloader is overridden by HLOS client. + +To prevent above issue, Add change to remove voltage voting support +for UFS rails for QC6490 RB3 platform. + +Signed-off-by: Umang Chheda <quic_uchheda@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490-rb3.dts | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts b/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts +index ac6233452429..3a1c781c965f 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts +@@ -337,3 +337,17 @@ &usb_1_qmpphy { + + status = "okay"; + }; ++ ++&vreg_l7b_2p952 { ++ /delete-property/regulator-min-microvolt; ++ /delete-property/regulator-max-microvolt; ++ regulator-allow-set-load; ++ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>; ++}; ++ ++&vreg_l9b_1p2 { ++ /delete-property/regulator-min-microvolt; ++ /delete-property/regulator-max-microvolt; ++ regulator-allow-set-load; ++ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>; ++}; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/workarounds/0002-QCLINUX-arm64-dts-qcom-Add-board-id-and-msm-id-for-q.patch b/recipes-kernel/linux/linux-yocto/workarounds/0002-QCLINUX-arm64-dts-qcom-Add-board-id-and-msm-id-for-q.patch new file mode 100644 index 0000000..b2281ff --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/workarounds/0002-QCLINUX-arm64-dts-qcom-Add-board-id-and-msm-id-for-q.patch @@ -0,0 +1,34 @@ +From 3f8f810f2a3829bb0bd4b53ab09a7fe043918cc6 Mon Sep 17 00:00:00 2001 +From: Naina Mehta <quic_nainmeht@quicinc.com> +Date: Tue, 17 Oct 2023 20:58:47 +0530 +Subject: [PATCH 2/2] QCLINUX: arm64: dts: qcom: Add board-id and msm-id for + qcm6490-rb3 + +Add board-id and msm-id for QCM6490 RB3 platform as a workaround +for picking correct DTB. + +Signed-off-by: Naina Mehta <quic_nainmeht@quicinc.com> +Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490-rb3.dts | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts b/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts +index ae689fec6733..ac6233452429 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts +@@ -21,6 +21,10 @@ / { + model = "Qualcomm Technologies, Inc. QCM6490 RB3"; + compatible = "qcom,qcm6490-rb3", "qcom,qcm6490"; + ++ /* This will be deprecated soon */ ++ qcom,msm-id = <497 0x10000>, <498 0x10000>, <475 0x10000>, <515 0x10000>; ++ qcom,board-id = <32 1>; ++ + aliases { + serial0 = &uart5; + }; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto_%.bbappend b/recipes-kernel/linux/linux-yocto_%.bbappend new file mode 100644 index 0000000..8b4dc40 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto_%.bbappend @@ -0,0 +1,14 @@ +# do not override KBRANCH and SRCREV_machine, use default ones. +COMPATIBLE_MACHINE:qcom = "qcom-armv8a|qcom-armv7a" + +FILESEXTRAPATHS:prepend:qcom := "${THISDIR}/${PN}:" + +# include all Qualcomm-specific files +SRC_URI:append:qcom = " \ + file://qcom.scc \ +" + +# For boot.img +QCOM_BOOTIMG = "" +QCOM_BOOTIMG:qcom = "linux-qcom-bootimg" +inherit ${QCOM_BOOTIMG} diff --git a/recipes-kernel/linux/linux-yocto_6.6.bbappend b/recipes-kernel/linux/linux-yocto_6.6.bbappend new file mode 100644 index 0000000..2b38167 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto_6.6.bbappend @@ -0,0 +1,79 @@ + +SRC_URI:append:qcom = " \ + file://0001-arm64-dts-qcom-qcm2290-temporarily-disable-cluster-i.patch \ + file://qca6390-driver/0001-dt-bindings-mfd-qcom-qca639x-add-binding-for-QCA639x.patch \ + file://qca6390-driver/0002-mfd-qca639x-add-support-for-QCA639x-powerup-sequence.patch \ + file://qca6390-driver/0003-mfd-qcom-qca639x-switch-to-platform-config-data.patch \ + file://qca6390-driver/0004-mfd-qcom-qca639x-change-qca639x-to-use-gpios-rather-.patch \ + file://qca6390-driver/0005-mfd-qcom-qca639x-Add-support-for-WCN6855.patch \ + file://qca6390-dts/0001-arm64-dts-qcom-qrb5165-rb5-add-qca639x-power-domain.patch \ + file://qca6390-dts/0002-arm64-dts-qcom-Add-Bluetooth-support-on-RB5.patch \ + file://qca6390-dts/0003-arm64-dtb-qcom-qrb5165-rb5-add-power-domain-to-pcie0.patch \ + file://generic-drivers/mpm/0001-dt-bindings-interrupt-controller-mpm-Pass-MSG-RAM-sl.patch \ + file://generic-drivers/mpm/0002-irqchip-irq-qcom-mpm-Support-passing-a-slice-of-SRAM.patch \ + file://generic-drivers/mdss-icc/0002_dt_bindings_display_msm_add_reg_bus_and_rotator_interconnects.patch \ + file://generic-drivers/mdss-icc/0001_drm_msm_mdss_switch_mdss_to_use_devm_of_icc_get.patch \ + file://generic-drivers/mdss-icc/0002_drm_msm_mdss_rename_path_references_to_mdp_path.patch \ + file://generic-drivers/mdss-icc/0003_drm_msm_mdss_inline_msm_mdss_icc_request_bw.patch \ + file://generic-drivers/mdss-icc/0004_drm_msm_mdss_handle_the_reg_bus_icc_path.patch \ + file://generic-drivers/icc/0001-interconnect-qcom-icc-rpm-Add-AB-IB-calculations-coe.patch \ + file://generic-drivers/icc/0002-interconnect-qcom-icc-rpm-Separate-out-clock-rate-ca.patch \ + file://generic-drivers/icc/0003-interconnect-qcom-icc-rpm-Let-nodes-drive-their-own-.patch \ + file://generic-drivers/icc/0004-interconnect-qcom-icc-rpm-Check-for-node-specific-ra.patch \ + file://generic-drivers/icc/0005-interconnect-qcom-qcm2290-Hook-up-MAS_APPS_PROC-s-bu.patch \ + file://generic-drivers/icc/0006-interconnect-qcom-qcm2290-Set-AB-coefficients.patch \ + file://generic-drivers/icc/0007-interconnect-qcom-qcm2290-Update-EBI-channel-configu.patch \ + file://generic-drivers/icc/0008-interconnect-qcom-sdm660-Set-AB-IB-coefficients.patch \ + file://generic-drivers/icc/0009-interconnect-qcom-msm8996-Set-AB-IB-coefficients.patch \ + file://qrb2210-drivers/0001_dt_bindings_display_msm_qcm2290_mdss_use_the_non_deprecated_dsi_compat.patch \ + file://qrb2210-drivers/0003_dt_bindings_interconnect_qcom_msm8998_bwmon_add_qcm2290_bwmon_instance.patch \ + file://qrb2210-drivers/0004_dt_bindings_firmware_qcom_scm_allow_interconnect_for_everyone.patch \ + file://qrb2210-drivers/0005_iommu_arm_smmu_qcom_add_qcm2290_mdss_compatible.patch \ + file://qrb2210-dts/sans-icc/0003_arm64_dts_qcom_qrb2210_rb1_enable_remote_processors.patch \ + file://qrb2210-dts/sans-icc/0004_arm64_dts_qcom_qrb2210_rb1_add_gpio_leds.patch \ + file://qrb2210-dts/sans-icc/0005_arm64_dts_qcom_qrb2210_rb1_hook_up_usb3.patch \ + file://qrb2210-dts/sans-icc/0001-arm64-dts-qcom-qrb2210-rb1-use-USB-host-mode.patch \ + file://qrb2210-dts/features/0006_arm64_dts_qcom_sc7180_add_the_missing_mdss_icc_path.patch \ + file://qrb2210-dts/features/0007_arm64_dts_qcom_sc7280_add_the_missing_mdss_icc_path.patch \ + file://qrb2210-dts/features/0008_arm64_dts_qcom_qcm2290_add_display_nodes.patch \ + file://qrb2210-dts/features/0009_arm64_dts_qcom_qcm2290_hook_up_interconnects.patch \ + file://qrb2210-dts/features/0010_arm64_dts_qcom_qrb2210_rb1_set_up_hdmi.patch \ + file://qrb2210-dts/features/0011_arm64_dts_qcom_qrb2210_rb1_enable_can_bus_controller.patch \ + file://qrb2210-dts/features/0012_arm64_dts_qcom_qrb2210_rb1_add_wifi_variant_property.patch \ + file://qrb2210-dts/0001-arm64-dts-qcom-qcm2290-Hook-up-MPM.patch \ + file://qrb4210-drivers/icc/0001-dt-bindings-interconnect-Add-Qualcomm-SM6115-NoC.patch \ + file://qrb4210-drivers/icc/0002-interconnect-qcom-Add-SM6115-interconnect-provider-d.patch \ + file://qrb4210-drivers/icc/0001-iommu-arm-smmu-qcom-Add-SM6115-MDSS-compatible.patch \ + file://qrb4210-dts/0001-arm64-dts-qcom-sm6115-Add-UART3.patch \ + file://qrb4210-dts/0002-arm64-dts-qcom-qrb4210-rb2-Enable-bluetooth.patch \ + file://qrb4210-dts/0001-arm64-dts-qcom-sm6115-Hook-up-interconnects.patch \ + file://qrb4210-dts/0001-arm64-dts-qcom-qrb4210-rb2-Enable-MPSS-and-Wi-Fi.patch \ + file://qrb4210-dts/usb/0002-arm64-dts-qcom-qrb4210-rb2-Select-USB3-host-mode-by-.patch \ + file://qrb4210-dts/usb/0003-arm64-dts-qcom-sm6115-Enable-USB3-SS-phy.patch \ + file://generic-drivers/0001-FROMLIST-dma-heap-Add-proper-kref-handling-on-dma-bu.patch \ + file://generic-drivers/0002-FROMLIST-dma-heap-Provide-accessors-so-that-in-kerne.patch \ + file://qcm6490-drivers/0001-FROMGIT-phy-qcom-qmp-ufs-Add-Phy-Configuration-suppo.patch \ + file://qcm6490-drivers/0001-PENDING-clk-qcom-gcc-Enable-the-force-mem-core-for-U.patch \ + file://qcm6490-drivers/0001-PENDING-dt-bindings-clock-Add-qcom-adsp-skip-pll-pro.patch \ + file://qcm6490-drivers/0002-PENDING-clk-qcom-lpassaudiocc-Add-support-to-skip-PL.patch \ + file://qcm6490-dtsi/0001-FROMLIST-dt-bindings-arm-qcom-Add-QCM6490-Fairphone-.patch \ + file://qcm6490-dtsi/0002-FROMLIST-arm64-dts-qcom-Use-QCOM_SCM_VMID-defines-fo.patch \ + file://qcm6490-dtsi/0003-FROMLIST-arm64-dts-qcom-Add-qcm6490-dts-file.patch \ + file://qcm6490-dtsi/0001-FROMLIST-arm64-dts-qcom-sc7280-Add-UFS-nodes-for-sc7.patch \ + file://qcm6490-dtsi/0001-PENDING-arm64-dts-qcom-sc7280-Add-interconnect-paths.patch \ + file://qcm6490-dtsi/0001-PENDING-arm64-dts-qcm6490-Update-the-protected-clock.patch \ + file://qcm6490-dtsi/0001-PENDING-dt-bindings-pinctrl-qcom-sc7280-pinctrl-add-.patch \ + file://qcm6490-dtsi/0002-PENDING-arm64-dts-qcom-qcm6490-Add-gpio-reserved-ran.patch \ + file://qcm6490-board-dts/0001-FROMLIST-dt-bindings-arm-qcom-Add-QCM6490-IDP-board.patch \ + file://qcm6490-board-dts/0001-PENDING-dt-bindings-arm-qcom-Add-QCM6490-RB3-board.patch \ + file://qcm6490-board-dts/0002-PENDING-arm64-dts-qcom-Add-qcm6490-rb3-support.patch \ + file://qcm6490-board-dts/0001-PENDING-arm64-dts-qcom-qcm6490-Add-UFS-nodes-for-IDP.patch \ + file://qcm6490-board-dts/0002-PENDING-arm64-dts-qcom-Add-UFS-nodes-for-qcm6490-rb3.patch \ + file://workarounds/0001-QCLINUX-arm64-dts-qcom-Add-board-id-and-msm-id-for-Q.patch \ + file://workarounds/0002-QCLINUX-arm64-dts-qcom-Add-board-id-and-msm-id-for-q.patch \ + file://workarounds/0001-QCLINUX-arm64-dts-qcom-qcm6490-disable-sdhc1-for-ufs.patch \ + file://workarounds/0001-PENDING-arm64-dts-qcom-Remove-voltage-vote-support-f.patch \ + file://workarounds/0002-PENDING-arm64-dts-qcom-Remove-voltage-vote-support-f.patch \ + file://workarounds/0001-PENDING-arm64-dts-qcm6490-Remove-voltage-voting-for-.patch \ + file://workarounds/0002-PENDING-arm64-dts-qcm6490-rb3-Remove-voltage-voting-.patch \ +" diff --git a/recipes-kernel/packagegroups/packagegroup-qcom-boot.bb b/recipes-kernel/packagegroups/packagegroup-qcom-boot.bb new file mode 100644 index 0000000..4e79bf6 --- /dev/null +++ b/recipes-kernel/packagegroups/packagegroup-qcom-boot.bb @@ -0,0 +1,13 @@ +SUMMARY = "Qualcomm boot requirements" +DESCRIPTION = "A set of packages required to find the rootfs on the generic Qualcomm board" + +inherit packagegroup + +# Recommend the packages as some of them might end up being built-in +# qcom-pon is not strictly required, but it would be good to handle events if something goes wrong +RRECOMMENDS:${PN} = " \ + kernel-module-phy-qcom-qmp \ + kernel-module-qcom-pon \ + kernel-module-qnoc-sm8250 \ + kernel-module-ufs-qcom \ +" diff --git a/recipes-multimedia/alsa/alsa-ucm-conf/0001-ucm2-codecs-lpass-add-codec-sequences-for-wsa-and-va.patch b/recipes-multimedia/alsa/alsa-ucm-conf/0001-ucm2-codecs-lpass-add-codec-sequences-for-wsa-and-va.patch deleted file mode 100644 index 8e109d0..0000000 --- a/recipes-multimedia/alsa/alsa-ucm-conf/0001-ucm2-codecs-lpass-add-codec-sequences-for-wsa-and-va.patch +++ /dev/null @@ -1,70 +0,0 @@ -From 5384a0ec52d2d8fd0bbcdab222b47d0887a058e4 Mon Sep 17 00:00:00 2001 -From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> -Date: Fri, 20 Nov 2020 12:12:48 +0000 -Subject: [PATCH 1/2] ucm2: codecs: lpass: add codec sequences for wsa and va - macro - -Add enable/disable codec sequence for Qualcomm Low Power Audio -Subsystem (LPASS) Codec WSA and VA Macros. - -Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> ---- - ucm2/codecs/lpass/va-macro/DMIC0DisableSeq.conf | 3 +++ - ucm2/codecs/lpass/va-macro/DMIC0EnableSeq.conf | 3 +++ - ucm2/codecs/lpass/wsa-macro/SpeakerDisableSeq.conf | 8 ++++++++ - ucm2/codecs/lpass/wsa-macro/SpeakerEnableSeq.conf | 8 ++++++++ - 4 files changed, 22 insertions(+) - create mode 100644 ucm2/codecs/lpass/va-macro/DMIC0DisableSeq.conf - create mode 100644 ucm2/codecs/lpass/va-macro/DMIC0EnableSeq.conf - create mode 100644 ucm2/codecs/lpass/wsa-macro/SpeakerDisableSeq.conf - create mode 100644 ucm2/codecs/lpass/wsa-macro/SpeakerEnableSeq.conf - -diff --git a/ucm2/codecs/lpass/va-macro/DMIC0DisableSeq.conf b/ucm2/codecs/lpass/va-macro/DMIC0DisableSeq.conf -new file mode 100644 -index 000000000000..457344e71e1b ---- /dev/null -+++ b/ucm2/codecs/lpass/va-macro/DMIC0DisableSeq.conf -@@ -0,0 +1,3 @@ -+cset "name='VA DMIC MUX0' ZERO" -+cset "name='VA_DEC0 Volume' 0" -+cset "name='VA_AIF1_CAP Mixer DEC0' 0" -diff --git a/ucm2/codecs/lpass/va-macro/DMIC0EnableSeq.conf b/ucm2/codecs/lpass/va-macro/DMIC0EnableSeq.conf -new file mode 100644 -index 000000000000..11b428f868ac ---- /dev/null -+++ b/ucm2/codecs/lpass/va-macro/DMIC0EnableSeq.conf -@@ -0,0 +1,3 @@ -+cset "name='VA DMIC MUX0' DMIC0" -+cset "name='VA_AIF1_CAP Mixer DEC0' 1" -+cset "name='VA_DEC0 Volume' 100" -diff --git a/ucm2/codecs/lpass/wsa-macro/SpeakerDisableSeq.conf b/ucm2/codecs/lpass/wsa-macro/SpeakerDisableSeq.conf -new file mode 100644 -index 000000000000..d84463e751fa ---- /dev/null -+++ b/ucm2/codecs/lpass/wsa-macro/SpeakerDisableSeq.conf -@@ -0,0 +1,8 @@ -+cset "name='WSA_RX0 Digital Volume' 0" -+cset "name='WSA_RX1 Digital Volume' 0" -+cset "name='WSA_COMP1 Switch' 0" -+cset "name='WSA_COMP2 Switch' 0" -+cset "name='WSA_RX0 INP0' ZERO" -+cset "name='WSA_RX1 INP0' ZERO" -+cset "name='WSA RX0 MUX' ZERO" -+cset "name='WSA RX1 MUX' ZERO" -diff --git a/ucm2/codecs/lpass/wsa-macro/SpeakerEnableSeq.conf b/ucm2/codecs/lpass/wsa-macro/SpeakerEnableSeq.conf -new file mode 100644 -index 000000000000..4e9faceab70b ---- /dev/null -+++ b/ucm2/codecs/lpass/wsa-macro/SpeakerEnableSeq.conf -@@ -0,0 +1,8 @@ -+cset "name='WSA RX0 MUX' AIF1_PB" -+cset "name='WSA RX1 MUX' AIF1_PB" -+cset "name='WSA_RX0 INP0' RX0" -+cset "name='WSA_RX1 INP0' RX1" -+cset "name='WSA_COMP1 Switch' 1" -+cset "name='WSA_COMP2 Switch' 1" -+cset "name='WSA_RX0 Digital Volume' 68" -+cset "name='WSA_RX1 Digital Volume' 68" --- -2.29.2 - diff --git a/recipes-multimedia/alsa/alsa-ucm-conf/0002-ucm2-add-support-to-for-Qualcomm-RB5-Platform.patch b/recipes-multimedia/alsa/alsa-ucm-conf/0002-ucm2-add-support-to-for-Qualcomm-RB5-Platform.patch deleted file mode 100644 index 58a508d..0000000 --- a/recipes-multimedia/alsa/alsa-ucm-conf/0002-ucm2-add-support-to-for-Qualcomm-RB5-Platform.patch +++ /dev/null @@ -1,114 +0,0 @@ -From 382366c1f615613e088982a6c30fc90b3226ae8b Mon Sep 17 00:00:00 2001 -From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> -Date: Fri, 20 Nov 2020 12:14:31 +0000 -Subject: [PATCH 2/2] ucm2: add support to for Qualcomm RB5 Platform - -The Qualcomm RB5 Robotics Platform contains HDMI, -2x WSA Smart-Speakers audio outputs along with One -Onboard DMIC audio input. - -Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> ---- - ucm2/sm8250/HDMI.conf | 26 +++++++++++++ - ucm2/sm8250/HiFi.conf | 37 +++++++++++++++++++ - .../Qualcomm-RB5-WSA8815-Speakers-DMIC0.conf | 11 ++++++ - 3 files changed, 74 insertions(+) - create mode 100644 ucm2/sm8250/HDMI.conf - create mode 100644 ucm2/sm8250/HiFi.conf - create mode 100644 ucm2/sm8250/Qualcomm-RB5-WSA8815-Speakers-DMIC0.conf - -diff --git a/ucm2/sm8250/HDMI.conf b/ucm2/sm8250/HDMI.conf -new file mode 100644 -index 000000000000..a9594fd94af2 ---- /dev/null -+++ b/ucm2/sm8250/HDMI.conf -@@ -0,0 +1,26 @@ -+# Use case configuration for RB5 board. -+# Author: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> -+ -+SectionVerb { -+ EnableSequence [ -+ cset "name='TERT_MI2S_RX Audio Mixer MultiMedia1' 1" -+ ] -+ -+ DisableSequence [ -+ cset "name='TERT_MI2S_RX Audio Mixer MultiMedia1' 0" -+ ] -+ -+ Value { -+ TQ "HiFi" -+ } -+} -+ -+SectionDevice."HDMI" { -+ #Name "HDMI" -+ Comment "HDMI Digital Stereo Output" -+ -+ Value { -+ PlaybackPCM "hw:${CardId}" -+ PlaybackPriority 200 -+ } -+} -diff --git a/ucm2/sm8250/HiFi.conf b/ucm2/sm8250/HiFi.conf -new file mode 100644 -index 000000000000..484bb49057e7 ---- /dev/null -+++ b/ucm2/sm8250/HiFi.conf -@@ -0,0 +1,37 @@ -+# Use case configuration for Qualcomm RB5. -+# Author: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> -+ -+SectionVerb { -+ -+ EnableSequence [ -+ cset "name='WSA_CODEC_DMA_RX_0 Audio Mixer MultiMedia2' 1" -+ <codecs/wsa881x/DefaultEnableSeq.conf> -+ ] -+ -+ DisableSequence [ -+ cset "name='WSA_CODEC_DMA_RX_0 Audio Mixer MultiMedia2' 0" -+ ] -+ -+ Value { -+ TQ "HiFi" -+ } -+} -+ -+SectionDevice."Speaker" { -+ Comment "Speaker playback" -+ -+ EnableSequence [ -+ <codecs/lpass/wsa-macro/SpeakerEnableSeq.conf> -+ <codecs/wsa881x/SpeakerEnableSeq.conf> -+ ] -+ -+ DisableSequence [ -+ <codecs/wsa881x/SpeakerDisableSeq.conf> -+ <codecs/lpass/wsa-macro/SpeakerDisableSeq.conf> -+ ] -+ -+ Value { -+ PlaybackPriority 100 -+ PlaybackPCM "hw:${CardId},1" -+ } -+} -diff --git a/ucm2/sm8250/Qualcomm-RB5-WSA8815-Speakers-DMIC0.conf b/ucm2/sm8250/Qualcomm-RB5-WSA8815-Speakers-DMIC0.conf -new file mode 100644 -index 000000000000..be2aea7aab22 ---- /dev/null -+++ b/ucm2/sm8250/Qualcomm-RB5-WSA8815-Speakers-DMIC0.conf -@@ -0,0 +1,11 @@ -+Syntax 3 -+ -+SectionUseCase."HiFi" { -+ File "/sm8250/HiFi.conf" -+ Comment "HiFi quality Music." -+} -+ -+SectionUseCase."HDMI" { -+ File "/sm8250/HDMI.conf" -+ Comment "HDMI output." -+} --- -2.29.2 - diff --git a/recipes-multimedia/alsa/alsa-ucm-conf_%.bbappend b/recipes-multimedia/alsa/alsa-ucm-conf_%.bbappend deleted file mode 100644 index 58b32f2..0000000 --- a/recipes-multimedia/alsa/alsa-ucm-conf_%.bbappend +++ /dev/null @@ -1,6 +0,0 @@ -FILESEXTRAPATHS_prepend := "${THISDIR}/${BPN}:" - -SRC_URI_append_sm8250 = "\ - file://0001-ucm2-codecs-lpass-add-codec-sequences-for-wsa-and-va.patch \ - file://0002-ucm2-add-support-to-for-Qualcomm-RB5-Platform.patch \ -" diff --git a/recipes-multimedia/pulseaudio/pulseaudio_%.bbappend b/recipes-multimedia/pulseaudio/pulseaudio_%.bbappend deleted file mode 100644 index 44a86ff..0000000 --- a/recipes-multimedia/pulseaudio/pulseaudio_%.bbappend +++ /dev/null @@ -1,3 +0,0 @@ -do_install_append() { - sed -i "s|^load-module module-udev-detect|load-module module-udev-detect tsched=0|" ${D}${sysconfdir}/pulse/default.pa -} diff --git a/recipes-support/fastrpc/fastrpc/0001-apps_std_fopen_with_env-account-for-domain-kinds-whe.patch b/recipes-support/fastrpc/fastrpc/0001-apps_std_fopen_with_env-account-for-domain-kinds-whe.patch new file mode 100644 index 0000000..1206c6e --- /dev/null +++ b/recipes-support/fastrpc/fastrpc/0001-apps_std_fopen_with_env-account-for-domain-kinds-whe.patch @@ -0,0 +1,128 @@ +From 771c3bc695a18b3bdedea6fac44b3e71708cc540 Mon Sep 17 00:00:00 2001 +From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Date: Sat, 6 Mar 2021 04:25:01 +0300 +Subject: [PATCH] apps_std_fopen_with_env: account for domain kinds when + looking for data + +Currenty apps_std_fopen_with_env() will care about domain only in the +fallback path when looking into /dsp/ dir (/dsp/adsp, /dsp/cdsp, etc). +Account for different domains when looking for the file in the path (so +that e.g. cDSP files will be looked up in the /usr/lib/rfsa/cdsp +directory rather than the default /usr/lib/rfsa/adsp). + +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Change-Id: I1dac61d36edc9e8ff1fdc2d56f968d2578f10399 +--- + src/apps_std_imp.c | 60 ++++++++++++++++++++++------------------------ + 1 file changed, 28 insertions(+), 32 deletions(-) + +diff --git a/src/apps_std_imp.c b/src/apps_std_imp.c +index d2559c60d2d6..701d799f5608 100644 +--- a/src/apps_std_imp.c ++++ b/src/apps_std_imp.c +@@ -662,6 +662,7 @@ __QAIC_IMPL_EXPORT int __QAIC_IMPL(apps_std_fopen_with_env)(const char* envvarna + char *absName = NULL; + uint16 absNameLen = 0; + int domain; ++ const char *dspName = NULL; + + VERIFYC(NULL != mode, AEE_EINVALIDMODE); + VERIFYC(NULL != delim, AEE_EINVALIDFORMAT); +@@ -670,8 +671,23 @@ __QAIC_IMPL_EXPORT int __QAIC_IMPL(apps_std_fopen_with_env)(const char* envvarna + VERIFY(0 == (nErr = get_dirlist_from_env(envvarname, &dirListBuf ))); + VERIFYC(NULL != (dirList = dirListBuf), AEE_EMEMPTR); + ++ domain = get_domain_id() & DOMAIN_ID_MASK; ++ ++ if (domain == ADSP_DOMAIN_ID){ ++ dspName = "adsp"; ++ } else if (domain == MDSP_DOMAIN_ID){ ++ dspName = "mdsp"; ++ } else if (domain == SDSP_DOMAIN_ID){ ++ dspName = "sdsp"; ++ } else if (domain == CDSP_DOMAIN_ID) { ++ dspName = "cdsp"; ++ } else { ++ dspName = "adsp"; ++ } ++ + while(dirList) + { ++ int dirNameLen; + pos = strstr(dirList, delim); + dirName = dirList; + if (pos) { +@@ -682,10 +698,13 @@ __QAIC_IMPL_EXPORT int __QAIC_IMPL(apps_std_fopen_with_env)(const char* envvarna + } + + // Account for slash char +- absNameLen = std_strlen(dirName) + std_strlen(name) + 2; ++ dirNameLen = std_strlen(dirName); ++ absNameLen = dirNameLen + std_strlen(name) + 2; + VERIFYC(NULL != (absName = (char*)malloc(sizeof(char) * absNameLen)), AEE_ENOMEMORY); + if ('\0' != *dirName) { + std_strlcpy(absName, dirName, absNameLen); ++ if (!std_strcmp(absName + dirNameLen - 4, "adsp")) ++ std_memscpy(absName + dirNameLen - 4, 4, dspName, 4); + std_strlcat(absName, "/", absNameLen); + std_strlcat(absName, name, absNameLen); + } else { +@@ -699,47 +718,24 @@ __QAIC_IMPL_EXPORT int __QAIC_IMPL(apps_std_fopen_with_env)(const char* envvarna + goto bail; + } + } +- domain = get_domain_id() & DOMAIN_ID_MASK; + + #ifdef ANDROID_P + absNameLen = std_strlen("/vendor/dsp/adsp/") + std_strlen(name) + 1; + VERIFYC(NULL != (absName = (char*)malloc(sizeof(char) * absNameLen)), AEE_ENOMEMORY); + +- if (domain == ADSP_DOMAIN_ID){ +- std_strlcpy(absName, "/vendor/dsp/adsp/", absNameLen); +- std_strlcat(absName, name,absNameLen); +- } else if (domain == MDSP_DOMAIN_ID){ +- std_strlcpy(absName, "/vendor/dsp/mdsp/", absNameLen); +- std_strlcat(absName, name,absNameLen); +- } else if (domain == SDSP_DOMAIN_ID){ +- std_strlcpy(absName, "/vendor/dsp/sdsp/", absNameLen); +- std_strlcat(absName, name,absNameLen); +- } else if (domain == CDSP_DOMAIN_ID) { +- std_strlcpy(absName, "/vendor/dsp/cdsp/", absNameLen); +- std_strlcat(absName, name,absNameLen); +- } else { +- absName[0] = '\0'; +- } ++ std_strlcpy(absName, "/vendor/dsp/", absNameLen); ++ std_strlcat(absName, dspName, absNameLen); ++ std_strlcat(absName, "/", absNameLen); ++ std_strlcat(absName, name,absNameLen); + nErr = apps_std_fopen(absName, mode, psout); + #else + absNameLen = std_strlen("/dsp/adsp/") + std_strlen(name) + 1; + VERIFYC(NULL != (absName = (char*)malloc(sizeof(char) * absNameLen)), AEE_ENOMEMORY); + +- if (domain == ADSP_DOMAIN_ID){ +- std_strlcpy(absName, "/dsp/adsp/", absNameLen); +- std_strlcat(absName, name,absNameLen); +- } else if (domain == MDSP_DOMAIN_ID){ +- std_strlcpy(absName, "/dsp/mdsp/", absNameLen); +- std_strlcat(absName, name,absNameLen); +- } else if (domain == SDSP_DOMAIN_ID){ +- std_strlcpy(absName, "/dsp/sdsp/", absNameLen); +- std_strlcat(absName, name,absNameLen); +- } else if (domain == CDSP_DOMAIN_ID) { +- std_strlcpy(absName, "/dsp/cdsp/", absNameLen); +- std_strlcat(absName, name,absNameLen); +- } else { +- absName[0] = '\0'; +- } ++ std_strlcpy(absName, "/dsp/", absNameLen); ++ std_strlcat(absName, dspName, absNameLen); ++ std_strlcat(absName, "/", absNameLen); ++ std_strlcat(absName, name,absNameLen); + nErr = apps_std_fopen(absName, mode, psout); + #endif + bail: +-- +2.30.0 + diff --git a/recipes-support/fastrpc/fastrpc/adsprpcd.service b/recipes-support/fastrpc/fastrpc/adsprpcd.service new file mode 100644 index 0000000..c2b09bf --- /dev/null +++ b/recipes-support/fastrpc/fastrpc/adsprpcd.service @@ -0,0 +1,9 @@ +[Unit] +Description=aDSP RPC daemon + +[Service] +Type=exec +ExecStart=/usr/bin/adsprpcd + +[Install] +WantedBy=multi-user.target diff --git a/recipes-support/fastrpc/fastrpc/cdsprpcd.service b/recipes-support/fastrpc/fastrpc/cdsprpcd.service new file mode 100644 index 0000000..39b7300 --- /dev/null +++ b/recipes-support/fastrpc/fastrpc/cdsprpcd.service @@ -0,0 +1,9 @@ +[Unit] +Description=cDSP RPC daemon + +[Service] +Type=exec +ExecStart=/usr/bin/cdsprpcd + +[Install] +WantedBy=multi-user.target diff --git a/recipes-support/fastrpc/fastrpc/mount-dsp.sh b/recipes-support/fastrpc/fastrpc/mount-dsp.sh new file mode 100644 index 0000000..61ff0f7 --- /dev/null +++ b/recipes-support/fastrpc/fastrpc/mount-dsp.sh @@ -0,0 +1,44 @@ +#!/bin/sh + +set -e + +modprobe socinfo || true + +if [ -r /sys/devices/soc0/machine ] ; then + MACHINE=`cat /sys/devices/soc0/machine` + case $MACHINE in + QRB2210) + WHAT=/lib/firmware/qcom/qrb2210/dspso.bin + ;; + QRB4210) + WHAT=/lib/firmware/qcom/qrb4210/dspso.bin + ;; + SM8250|QRB5165) + WHAT=/lib/firmware/qcom/sm8250/dspso.bin + ;; + APQ8096) + WHAT=/lib/firmware/qcom/msm8996/adspso.bin + ;; + esac +fi + +if [ -z "$WHAT" -o ! -r "$WHAT" ] ; then + i=0 + while ! [ -d /dev/disk/by-partlabel ] ; do + i=$(( $i + 1)) + [ $i -gt 30 ] && break; + sleep 1 + done + + if [ -h /dev/disk/by-partlabel/dsp_a ] ; then + WHAT=/dev/disk/by-partlabel/dsp_a + else + WHAT=/dev/disk/by-partlabel/dsp + fi +fi + +if [ -e "$WHAT" ] ; then + mount $WHAT /usr/lib/rfsa -o ro +else + echo "Not mounting /usr/lib/rfsa, partition/image not found" 1>&2 +fi diff --git a/recipes-support/fastrpc/fastrpc/sdsprpcd.service b/recipes-support/fastrpc/fastrpc/sdsprpcd.service new file mode 100644 index 0000000..fd37cfa --- /dev/null +++ b/recipes-support/fastrpc/fastrpc/sdsprpcd.service @@ -0,0 +1,9 @@ +[Unit] +Description=sDSP RPC daemon + +[Service] +Type=exec +ExecStart=/usr/bin/sdsprpcd + +[Install] +WantedBy=multi-user.target diff --git a/recipes-support/fastrpc/fastrpc/usr-lib-rfsa.service b/recipes-support/fastrpc/fastrpc/usr-lib-rfsa.service new file mode 100644 index 0000000..f5fc76a --- /dev/null +++ b/recipes-support/fastrpc/fastrpc/usr-lib-rfsa.service @@ -0,0 +1,16 @@ +[Unit] +Description=Mount DSP partition to /usr/lib/rfsa +DefaultDependencies=false +Before=umount.target local-fs.target +After=local-pre-fs.target +Conflicts=umount.target + +[Service] +Type=oneshot +RemainAfterExit=Yes +TimeoutSec=0 +ExecStart=/usr/sbin/mount-dsp.sh +ExecStop=/bin/umount /usr/lib/rfsa + +[Install] +WantedBy=local-fs.target diff --git a/recipes-support/fastrpc/fastrpc_git.bb b/recipes-support/fastrpc/fastrpc_git.bb index 3aa67a7..5d6acd7 100644 --- a/recipes-support/fastrpc/fastrpc_git.bb +++ b/recipes-support/fastrpc/fastrpc_git.bb @@ -1,15 +1,61 @@ -HOMEPAGE = "https://git.linaro.org/landing-teams/working/qualcomm/fastrpc.git" +HOMEPAGE = "https://git.codelinaro.org/linaro/qcomlt/fastrpc.git" SUMMARY = "Qualcomm FastRPC applications and library" SECTION = "devel" LICENSE = "BSD-3-Clause" LIC_FILES_CHKSUM = "file://src/fastrpc_apps_user.c;beginline=1;endline=29;md5=f94f3a7beba14ae2f59f817e9634f891" -SRCREV = "388d868b3146fa7ccbeb6aa8c71485ebbbf5e1b9" -SRC_URI = "git://git.linaro.org/landing-teams/working/qualcomm/fastrpc.git;branch=automake;protocol=https" +SRCREV = "06ef0e7ae56b9f7dde53fb92e8a4bc5a843af8a8" +SRC_URI = "\ + git://git.codelinaro.org/linaro/qcomlt/fastrpc.git;branch=automake;protocol=https \ + file://0001-apps_std_fopen_with_env-account-for-domain-kinds-whe.patch \ + file://adsprpcd.service \ + file://cdsprpcd.service \ + file://sdsprpcd.service \ + file://usr-lib-rfsa.service \ + file://mount-dsp.sh \ +" PV = "0.0+${SRCPV}" S = "${WORKDIR}/git" -inherit autotools +inherit autotools systemd + +PACKAGES += "${PN}-systemd" +RRECOMMENDS:${PN} += "${PN}-systemd" + +SYSTEMD_PACKAGES = "${PN} ${PN}-systemd" + +SYSTEMD_SERVICE:${PN} = "usr-lib-rfsa.service" + +SYSTEMD_SERVICE:${PN}-systemd = "adsprpcd.service cdsprpcd.service sdsprpcd.service" +SYSTEMD_AUTO_ENABLE:${PN}-systemd = "disable" + +do_install:append() { + install -d ${D}${libdir}/rfsa + + install -d ${D}${systemd_unitdir}/system + install -m 0644 ${WORKDIR}/usr-lib-rfsa.service ${D}${systemd_unitdir}/system + install -m 0644 ${WORKDIR}/adsprpcd.service ${D}${systemd_unitdir}/system + install -m 0644 ${WORKDIR}/cdsprpcd.service ${D}${systemd_unitdir}/system + install -m 0644 ${WORKDIR}/sdsprpcd.service ${D}${systemd_unitdir}/system + + install -d ${D}${sbindir} + install -m 0755 ${WORKDIR}/mount-dsp.sh ${D}${sbindir} +} + +FILES:${PN} += " \ + ${libdir}/rfsa \ + ${libdir}/libadsp_default_listener.so \ + ${libdir}/libcdsp_default_listener.so \ + ${libdir}/libsdsp_default_listener.so \ + ${libdir}/libadsprpc.so \ + ${libdir}/libcdsprpc.so \ + ${libdir}/libsdsprpc.so \ +" + +FILES:${PN}-dev:remove = "${FILES_SOLIBSDEV}" + +# We need to include lib*dsprpc.so into fastrpc for compatibility with Hexagon SDK +ERROR_QA:remove = "dev-so" diff --git a/recipes-support/initrdscripts/files/copy-modules.sh b/recipes-support/initrdscripts/files/copy-modules.sh new file mode 100644 index 0000000..12dc052 --- /dev/null +++ b/recipes-support/initrdscripts/files/copy-modules.sh @@ -0,0 +1,17 @@ +#!/bin/sh +# Copyright (C) 2022 Linaro Ltd. +# Licensed on MIT + +copy_modules_enabled() { + [ -n "${bootparam_copy_modules}" -a -d /lib/modules/`uname -r` ] +} + +copy_modules_run() { + if [ -n "$ROOTFS_DIR" ]; then + rm -rf $ROOTFS_DIR/lib/modules/`uname -r` + mkdir -p $ROOTFS_DIR/lib/modules + cp -a /lib/modules/`uname -r` $ROOTFS_DIR/lib/modules + else + debug "No rootfs has been set" + fi +} diff --git a/recipes-support/initrdscripts/initramfs-module-copy-modules_1.0.bb b/recipes-support/initrdscripts/initramfs-module-copy-modules_1.0.bb new file mode 100644 index 0000000..effc7df --- /dev/null +++ b/recipes-support/initrdscripts/initramfs-module-copy-modules_1.0.bb @@ -0,0 +1,15 @@ +SUMMARY = "initramfs-framework module for copying kernel modules from initramfs to rootfs" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COREBASE}/meta/COPYING.MIT;md5=3da9cfbcb788c80a0384361b4de20420" +RDEPENDS:${PN} = "initramfs-framework-base ${VIRTUAL-RUNTIME_base-utils}" + +SRC_URI = "file://copy-modules.sh" + +S = "${WORKDIR}" + +do_install() { + install -d ${D}/init.d + install -m 0755 ${WORKDIR}/copy-modules.sh ${D}/init.d/95-copy_modules +} + +FILES:${PN} = "/init.d/" diff --git a/recipes-support/pd-mapper/pd-mapper/0001-pd-mapper-Include-limits.h-for-PATH_MAX.patch b/recipes-support/pd-mapper/pd-mapper/0001-pd-mapper-Include-limits.h-for-PATH_MAX.patch deleted file mode 100644 index de3fea8..0000000 --- a/recipes-support/pd-mapper/pd-mapper/0001-pd-mapper-Include-limits.h-for-PATH_MAX.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 874dadf1168f8a1b2b1bd4ab5bb4a20097147ab0 Mon Sep 17 00:00:00 2001 -From: Khem Raj <raj.khem@gmail.com> -Date: Thu, 28 May 2020 08:01:37 -0700 -Subject: [PATCH] pd-mapper: Include limits.h for PATH_MAX - -Fixes -pd-mapper.c:199:22: error: 'PATH_MAX' undeclared (first use in this function); did you mean 'AF_MAX'? - -Upstream-Status: Submitted [https://github.com/andersson/pd-mapper/pull/4] -Signed-off-by: Khem Raj <raj.khem@gmail.com> ---- - pd-mapper.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/pd-mapper.c b/pd-mapper.c -index 45177ae..f5d45ee 100644 ---- a/pd-mapper.c -+++ b/pd-mapper.c -@@ -36,6 +36,7 @@ - #include <fcntl.h> - #include <libgen.h> - #include <libqrtr.h> -+#include <limits.h> - #include <stdio.h> - #include <stdlib.h> - #include <string.h> --- -2.26.2 - diff --git a/recipes-support/pd-mapper/pd-mapper_git.bb b/recipes-support/pd-mapper/pd-mapper_git.bb index 9e5ca11..34dffe0 100644 --- a/recipes-support/pd-mapper/pd-mapper_git.bb +++ b/recipes-support/pd-mapper/pd-mapper_git.bb @@ -5,24 +5,21 @@ SECTION = "devel" LICENSE = "BSD-3-Clause" LIC_FILES_CHKSUM = "file://LICENSE;md5=c5d4ab97bca4e843c5afdbf78aa5fdee" -DEPENDS = "qrtr" +DEPENDS = "qrtr xz" inherit systemd -SRCREV = "ab5074fdd5e4130578aa4c99b00d44527a79636f" +SRCREV = "10997ba7c43a3787a40b6b1b161408033e716374" SRC_URI = "git://github.com/andersson/${BPN}.git;branch=master;protocol=https \ - file://0001-pd-mapper-Include-limits.h-for-PATH_MAX.patch \ " PV = "0.0+${SRCPV}" S = "${WORKDIR}/git" -EXTRA_OEMAKE = "prefix=${prefix} bindir=${bindir} libdir=${libdir} includedir=${includedir} LDFLAGS='${LDFLAGS} -Wl,-lqrtr'" - do_install () { oe_runmake install DESTDIR=${D} prefix=${prefix} servicedir=${systemd_unitdir}/system } -SYSTEMD_SERVICE_${PN} = "pd-mapper.service" -RDEPENDS_${PN} += "qrtr" +SYSTEMD_SERVICE:${PN} = "pd-mapper.service" +RDEPENDS:${PN} += "qrtr" diff --git a/recipes-support/qbootctl/files/0001-Fix-to-uint32_t-has-not-been-declared.patch b/recipes-support/qbootctl/files/0001-Fix-to-uint32_t-has-not-been-declared.patch new file mode 100644 index 0000000..1c16684 --- /dev/null +++ b/recipes-support/qbootctl/files/0001-Fix-to-uint32_t-has-not-been-declared.patch @@ -0,0 +1,49 @@ +From 26d488b38a0357468b8657f283ad24a433e30beb Mon Sep 17 00:00:00 2001 +From: alefnode <adrian.campos@teachelp.com> +Date: Thu, 4 May 2023 09:15:29 +0200 +Subject: [PATCH] Fix to << uint32_t has not been declared >> + +Link: https://gitlab.com/sdm845-mainline/qbootctl/-/commit/df63d7c21c19a3e3afb41d029b97b9d068880484 +Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> +--- + bootctrl_impl.cpp | 1 + + gpt-utils.h | 1 + + qbootctl.cpp | 1 + + 3 files changed, 3 insertions(+) + +diff --git a/bootctrl_impl.cpp b/bootctrl_impl.cpp +index 7c1a082..59fcc7d 100644 +--- a/bootctrl_impl.cpp ++++ b/bootctrl_impl.cpp +@@ -30,6 +30,7 @@ + #include <sys/stat.h> + #include <fcntl.h> + #include <limits.h> ++#include <stdint.h> + + #include "utils.h" + #include "gpt-utils.h" +diff --git a/gpt-utils.h b/gpt-utils.h +index 319f3fe..f153012 100644 +--- a/gpt-utils.h ++++ b/gpt-utils.h +@@ -37,6 +37,7 @@ extern "C" { + #endif + #include <unistd.h> + #include <stdlib.h> ++#include <stdint.h> + + #define GPT_SIGNATURE "EFI PART" + #define HEADER_SIZE_OFFSET 12 +diff --git a/qbootctl.cpp b/qbootctl.cpp +index 0225f0f..3559e29 100644 +--- a/qbootctl.cpp ++++ b/qbootctl.cpp +@@ -25,6 +25,7 @@ + #include <string.h> + #include <stdlib.h> + #include <unistd.h> ++#include <cstdint> + + #include "bootctrl.h" + diff --git a/recipes-support/qbootctl/files/qbootclt-bless-boot.service.in b/recipes-support/qbootctl/files/qbootclt-bless-boot.service.in new file mode 100644 index 0000000..6227a5c --- /dev/null +++ b/recipes-support/qbootctl/files/qbootclt-bless-boot.service.in @@ -0,0 +1,23 @@ +# SPDX-License-Identifier: LGPL-2.1+ +# +# This file was copied from systemd at [1] +# +# https://github.com/systemd/systemd/blob/main/units/systemd-bless-boot.service.in +# +# systemd is free software; you can redistribute it and/or modify it +# under the terms of the GNU Lesser General Public License as published by +# the Free Software Foundation; either version 2.1 of the License, or +# (at your option) any later version. + +[Unit] +Description=Mark the Current Boot slot as Good +DefaultDependencies=no +Requires=boot-complete.target +After=local-fs.target boot-complete.target +Conflicts=shutdown.target +Before=shutdown.target + +[Service] +Type=oneshot +RemainAfterExit=yes +ExecStart=@bindir@/qbootctl -m diff --git a/recipes-support/qbootctl/qbootctl_0.1.2.bb b/recipes-support/qbootctl/qbootctl_0.1.2.bb new file mode 100644 index 0000000..c4fda08 --- /dev/null +++ b/recipes-support/qbootctl/qbootctl_0.1.2.bb @@ -0,0 +1,25 @@ +SUMMARY = "A port of the Qualcomm Android bootctrl HAL for musl/glibc userspace" +HOMEPAGE = "https://gitlab.com/sdm845-mainline/qbootctl" +LICENSE = "GPL-3.0-only" +LIC_FILES_CHKSUM = "file://LICENSE;md5=1ebbd3e34237af26da5dc08a4e440464" + +SRCREV = "77b48f092a3690d587e2d3b1e30cf8bc2abf87e7" +SRC_URI = "git://gitlab.com/sdm845-mainline/qbootctl.git;protocol=https;branch=main \ + file://qbootclt-bless-boot.service.in \ + file://0001-Fix-to-uint32_t-has-not-been-declared.patch \ + " + +DEPENDS = "zlib" + +S = "${WORKDIR}/git" + +PV = "0.1.2" + +inherit meson systemd + +do_install:append () { + install -d ${D}${systemd_system_unitdir} + sed 's:@bindir@:${bindir}:' < ${WORKDIR}/qbootclt-bless-boot.service.in > ${D}${systemd_system_unitdir}/qbootclt-bless-boot.service +} + +SYSTEMD_SERVICE:${PN} = "qbootclt-bless-boot.service" diff --git a/recipes-support/qrtr/qrtr_git.bb b/recipes-support/qrtr/qrtr_git.bb index 51c342b..de5b1f5 100644 --- a/recipes-support/qrtr/qrtr_git.bb +++ b/recipes-support/qrtr/qrtr_git.bb @@ -7,17 +7,17 @@ LIC_FILES_CHKSUM = "file://LICENSE;md5=15329706fbfcb5fc5edcc1bc7c139da5" inherit systemd -SRCREV = "7bd5cf302437755b0d741c9dc1805395a9654597" +SRCREV = "d0d471c96e7d112fac6f48bd11f9e8ce209c04d2" SRC_URI = "git://github.com/andersson/${BPN}.git;branch=master;protocol=https" -PV = "0.0+${SRCPV}" +PV = "0.3+${SRCPV}" S = "${WORKDIR}/git" -EXTRA_OEMAKE = "prefix=${prefix} bindir=${bindir} libdir=${libdir} includedir=${includedir} LDFLAGS='${LDFLAGS}'" +EXTRA_OEMAKE = "prefix=${prefix} bindir=${bindir} libdir=${libdir} includedir=${includedir}" do_install () { oe_runmake install DESTDIR=${D} prefix=${prefix} servicedir=${systemd_unitdir}/system } -SYSTEMD_SERVICE_${PN} = "qrtr-ns.service" +SYSTEMD_SERVICE:${PN} = "qrtr-ns.service" diff --git a/recipes-support/rmtfs/rmtfs_git.bb b/recipes-support/rmtfs/rmtfs_git.bb index 8655346..c55d3c0 100644 --- a/recipes-support/rmtfs/rmtfs_git.bb +++ b/recipes-support/rmtfs/rmtfs_git.bb @@ -7,19 +7,17 @@ LIC_FILES_CHKSUM = "file://LICENSE;md5=ca25dbf5ebfc1a058bfc657c895aac2f" inherit systemd -SRCREV = "dfb8f3ed1c8fbde621cd08aaf9e7724a4c55cbd1" +SRCREV = "7a5ae7e0a57be3e09e0256b51b9075ee6b860322" SRC_URI = "git://github.com/andersson/${BPN}.git;branch=master;protocol=https" DEPENDS = "qmic-native qrtr udev" -PV = "0.0+${SRCPV}" +PV = "0.2+${SRCPV}" S = "${WORKDIR}/git" -EXTRA_OEMAKE = "'LDFLAGS=${TARGET_LDFLAGS} -L${STAGING_LIBDIR} -lqrtr -ludev -lpthread'" - do_install () { oe_runmake install DESTDIR=${D} prefix=${prefix} servicedir=${systemd_unitdir}/system } -SYSTEMD_SERVICE_${PN} = "rmtfs.service" -RDEPENDS_${PN} += "qrtr" +SYSTEMD_SERVICE:${PN} = "rmtfs.service" +RDEPENDS:${PN} += "qrtr" diff --git a/recipes-support/rust-android-sparse/rust-android-sparse-crates.inc b/recipes-support/rust-android-sparse/rust-android-sparse-crates.inc new file mode 100644 index 0000000..5f3e1c5 --- /dev/null +++ b/recipes-support/rust-android-sparse/rust-android-sparse-crates.inc @@ -0,0 +1,98 @@ +# Autogenerated with 'bitbake -c update_crates rust-android-sparse' + +# from Cargo.lock +SRC_URI += " \ + crate://crates.io/aho-corasick/0.7.18 \ + crate://crates.io/assert_cmd/0.9.1 \ + crate://crates.io/autocfg/1.0.1 \ + crate://crates.io/bitflags/1.3.2 \ + crate://crates.io/build_const/0.2.2 \ + crate://crates.io/byteorder/1.4.3 \ + crate://crates.io/cfg-if/1.0.0 \ + crate://crates.io/clap/2.34.0 \ + crate://crates.io/crc/1.8.1 \ + crate://crates.io/difference/2.0.0 \ + crate://crates.io/escargot/0.3.1 \ + crate://crates.io/float-cmp/0.4.0 \ + crate://crates.io/getrandom/0.2.3 \ + crate://crates.io/itoa/0.4.8 \ + crate://crates.io/libc/0.2.109 \ + crate://crates.io/memchr/2.4.1 \ + crate://crates.io/normalize-line-endings/0.2.2 \ + crate://crates.io/num-traits/0.2.14 \ + crate://crates.io/ppv-lite86/0.2.15 \ + crate://crates.io/predicates/0.9.1 \ + crate://crates.io/predicates-core/0.9.0 \ + crate://crates.io/predicates-tree/0.9.0 \ + crate://crates.io/proc-macro2/1.0.33 \ + crate://crates.io/quote/1.0.10 \ + crate://crates.io/rand/0.8.4 \ + crate://crates.io/rand_chacha/0.3.1 \ + crate://crates.io/rand_core/0.6.3 \ + crate://crates.io/rand_hc/0.3.1 \ + crate://crates.io/redox_syscall/0.2.10 \ + crate://crates.io/regex/1.5.4 \ + crate://crates.io/regex-syntax/0.6.25 \ + crate://crates.io/remove_dir_all/0.5.3 \ + crate://crates.io/ryu/1.0.6 \ + crate://crates.io/serde/1.0.130 \ + crate://crates.io/serde_derive/1.0.130 \ + crate://crates.io/serde_json/1.0.72 \ + crate://crates.io/syn/1.0.82 \ + crate://crates.io/tempfile/3.2.0 \ + crate://crates.io/textwrap/0.11.0 \ + crate://crates.io/treeline/0.1.0 \ + crate://crates.io/unicode-width/0.1.9 \ + crate://crates.io/unicode-xid/0.2.2 \ + crate://crates.io/wasi/0.10.2+wasi-snapshot-preview1 \ + crate://crates.io/winapi/0.3.9 \ + crate://crates.io/winapi-i686-pc-windows-gnu/0.4.0 \ + crate://crates.io/winapi-x86_64-pc-windows-gnu/0.4.0 \ +" + +SRC_URI[aho-corasick-0.7.18.sha256sum] = "1e37cfd5e7657ada45f742d6e99ca5788580b5c529dc78faf11ece6dc702656f" +SRC_URI[assert_cmd-0.9.1.sha256sum] = "c5b60c276f334145cf2cec09c5bb6f63523f078c0c850909f66bca8f933cf809" +SRC_URI[autocfg-1.0.1.sha256sum] = "cdb031dd78e28731d87d56cc8ffef4a8f36ca26c38fe2de700543e627f8a464a" +SRC_URI[bitflags-1.3.2.sha256sum] = "bef38d45163c2f1dde094a7dfd33ccf595c92905c8f8f4fdc18d06fb1037718a" +SRC_URI[build_const-0.2.2.sha256sum] = "b4ae4235e6dac0694637c763029ecea1a2ec9e4e06ec2729bd21ba4d9c863eb7" +SRC_URI[byteorder-1.4.3.sha256sum] = "14c189c53d098945499cdfa7ecc63567cf3886b3332b312a5b4585d8d3a6a610" +SRC_URI[cfg-if-1.0.0.sha256sum] = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd" +SRC_URI[clap-2.34.0.sha256sum] = "a0610544180c38b88101fecf2dd634b174a62eef6946f84dfc6a7127512b381c" +SRC_URI[crc-1.8.1.sha256sum] = "d663548de7f5cca343f1e0a48d14dcfb0e9eb4e079ec58883b7251539fa10aeb" +SRC_URI[difference-2.0.0.sha256sum] = "524cbf6897b527295dff137cec09ecf3a05f4fddffd7dfcd1585403449e74198" +SRC_URI[escargot-0.3.1.sha256sum] = "19db1f7e74438642a5018cdf263bb1325b2e792f02dd0a3ca6d6c0f0d7b1d5a5" +SRC_URI[float-cmp-0.4.0.sha256sum] = "134a8fa843d80a51a5b77d36d42bc2def9edcb0262c914861d08129fd1926600" +SRC_URI[getrandom-0.2.3.sha256sum] = "7fcd999463524c52659517fe2cea98493cfe485d10565e7b0fb07dbba7ad2753" +SRC_URI[itoa-0.4.8.sha256sum] = "b71991ff56294aa922b450139ee08b3bfc70982c6b2c7562771375cf73542dd4" +SRC_URI[libc-0.2.109.sha256sum] = "f98a04dce437184842841303488f70d0188c5f51437d2a834dc097eafa909a01" +SRC_URI[memchr-2.4.1.sha256sum] = "308cc39be01b73d0d18f82a0e7b2a3df85245f84af96fdddc5d202d27e47b86a" +SRC_URI[normalize-line-endings-0.2.2.sha256sum] = "2e0a1a39eab95caf4f5556da9289b9e68f0aafac901b2ce80daaf020d3b733a8" +SRC_URI[num-traits-0.2.14.sha256sum] = "9a64b1ec5cda2586e284722486d802acf1f7dbdc623e2bfc57e65ca1cd099290" +SRC_URI[ppv-lite86-0.2.15.sha256sum] = "ed0cfbc8191465bed66e1718596ee0b0b35d5ee1f41c5df2189d0fe8bde535ba" +SRC_URI[predicates-0.9.1.sha256sum] = "f31e7977fc111984fdac76b6ae3a4cb598008fc6fd02dfdca189bf180bd7be20" +SRC_URI[predicates-core-0.9.0.sha256sum] = "85f80bc390d1c02a4cdaa63f27f05c3c426679eb65433d8dd65d392147e4e5c5" +SRC_URI[predicates-tree-0.9.0.sha256sum] = "2e86df9b81bdcb0a5141aca9d2b9c5e0c558ef6626d3ae2c12912f5c9df740bd" +SRC_URI[proc-macro2-1.0.33.sha256sum] = "fb37d2df5df740e582f28f8560cf425f52bb267d872fe58358eadb554909f07a" +SRC_URI[quote-1.0.10.sha256sum] = "38bc8cc6a5f2e3655e0899c1b848643b2562f853f114bfec7be120678e3ace05" +SRC_URI[rand-0.8.4.sha256sum] = "2e7573632e6454cf6b99d7aac4ccca54be06da05aca2ef7423d22d27d4d4bcd8" +SRC_URI[rand_chacha-0.3.1.sha256sum] = "e6c10a63a0fa32252be49d21e7709d4d4baf8d231c2dbce1eaa8141b9b127d88" +SRC_URI[rand_core-0.6.3.sha256sum] = "d34f1408f55294453790c48b2f1ebbb1c5b4b7563eb1f418bcfcfdbb06ebb4e7" +SRC_URI[rand_hc-0.3.1.sha256sum] = "d51e9f596de227fda2ea6c84607f5558e196eeaf43c986b724ba4fb8fdf497e7" +SRC_URI[redox_syscall-0.2.10.sha256sum] = "8383f39639269cde97d255a32bdb68c047337295414940c68bdd30c2e13203ff" +SRC_URI[regex-1.5.4.sha256sum] = "d07a8629359eb56f1e2fb1652bb04212c072a87ba68546a04065d525673ac461" +SRC_URI[regex-syntax-0.6.25.sha256sum] = "f497285884f3fcff424ffc933e56d7cbca511def0c9831a7f9b5f6153e3cc89b" +SRC_URI[remove_dir_all-0.5.3.sha256sum] = "3acd125665422973a33ac9d3dd2df85edad0f4ae9b00dafb1a05e43a9f5ef8e7" +SRC_URI[ryu-1.0.6.sha256sum] = "3c9613b5a66ab9ba26415184cfc41156594925a9cf3a2057e57f31ff145f6568" +SRC_URI[serde-1.0.130.sha256sum] = "f12d06de37cf59146fbdecab66aa99f9fe4f78722e3607577a5375d66bd0c913" +SRC_URI[serde_derive-1.0.130.sha256sum] = "d7bc1a1ab1961464eae040d96713baa5a724a8152c1222492465b54322ec508b" +SRC_URI[serde_json-1.0.72.sha256sum] = "d0ffa0837f2dfa6fb90868c2b5468cad482e175f7dad97e7421951e663f2b527" +SRC_URI[syn-1.0.82.sha256sum] = "8daf5dd0bb60cbd4137b1b587d2fc0ae729bc07cf01cd70b36a1ed5ade3b9d59" +SRC_URI[tempfile-3.2.0.sha256sum] = "dac1c663cfc93810f88aed9b8941d48cabf856a1b111c29a40439018d870eb22" +SRC_URI[textwrap-0.11.0.sha256sum] = "d326610f408c7a4eb6f51c37c330e496b08506c9457c9d34287ecc38809fb060" +SRC_URI[treeline-0.1.0.sha256sum] = "a7f741b240f1a48843f9b8e0444fb55fb2a4ff67293b50a9179dfd5ea67f8d41" +SRC_URI[unicode-width-0.1.9.sha256sum] = "3ed742d4ea2bd1176e236172c8429aaf54486e7ac098db29ffe6529e0ce50973" +SRC_URI[unicode-xid-0.2.2.sha256sum] = "8ccb82d61f80a663efe1f787a51b16b5a51e3314d6ac365b08639f52387b33f3" +SRC_URI[wasi-0.10.2+wasi-snapshot-preview1.sha256sum] = "fd6fbd9a79829dd1ad0cc20627bf1ed606756a7f77edff7b66b7064f9cb327c6" +SRC_URI[winapi-0.3.9.sha256sum] = "5c839a674fcd7a98952e593242ea400abe93992746761e38641405d28b00f419" +SRC_URI[winapi-i686-pc-windows-gnu-0.4.0.sha256sum] = "ac3b87c63620426dd9b991e5ce0329eff545bccbbb34f3be09ff6fb6ab51b7b6" +SRC_URI[winapi-x86_64-pc-windows-gnu-0.4.0.sha256sum] = "712e227841d057c1ee1cd2fb22fa7e5a5461ae8e48fa2ca79ec42cfc1931183f" diff --git a/recipes-support/rust-android-sparse/rust-android-sparse_0.6.0.bb b/recipes-support/rust-android-sparse/rust-android-sparse_0.6.0.bb new file mode 100644 index 0000000..3cf8993 --- /dev/null +++ b/recipes-support/rust-android-sparse/rust-android-sparse_0.6.0.bb @@ -0,0 +1,20 @@ +# Auto-Generated by cargo-bitbake 0.3.16 +# +inherit cargo cargo-update-recipe-crates + +# how to get android-sparse could be as easy as but default to a git checkout: +SRC_URI += "crate://crates.io/android-sparse/0.6.0" +S= "${CARGO_VENDORING_DIRECTORY}/android-sparse-${PV}" +SRC_URI[android-sparse-0.6.0.sha256sum] = "9c76c5759b0af9dea95a769ff5fe140cec5afb5fa65019817f3731b3232afe44" + +require rust-android-sparse-crates.inc + +LIC_FILES_CHKSUM = " \ + file://LICENSE;md5=0ffe68749328daf57dd85d5ca6ee981f \ +" + +SUMMARY = "An implementation of Android's sparse file format." +HOMEPAGE = "https://gitlab.com/ra_kete/android-sparse-rs" +LICENSE = "MIT" + +BBCLASSEXTEND += "native" diff --git a/recipes-support/tqftpserv/tqftpserv/0001-include-limits.h-for-PATH_MAX.patch b/recipes-support/tqftpserv/tqftpserv/0001-include-limits.h-for-PATH_MAX.patch deleted file mode 100644 index 5a58c58..0000000 --- a/recipes-support/tqftpserv/tqftpserv/0001-include-limits.h-for-PATH_MAX.patch +++ /dev/null @@ -1,25 +0,0 @@ -From c21250e08cc5e6815340244693437e6372b5eca4 Mon Sep 17 00:00:00 2001 -From: Khem Raj <raj.khem@gmail.com> -Date: Fri, 29 Nov 2019 17:52:33 -0800 -Subject: [PATCH] include limits.h for PATH_MAX - -Signed-off-by: Khem Raj <raj.khem@gmail.com> ---- - translate.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/translate.c b/translate.c -index 34c419e..e95dee5 100644 ---- a/translate.c -+++ b/translate.c -@@ -35,6 +35,7 @@ - #include <errno.h> - #include <fcntl.h> - #include <libgen.h> -+#include <limits.h> - #include <stdio.h> - #include <string.h> - #include <unistd.h> --- -2.24.0 - diff --git a/recipes-support/tqftpserv/tqftpserv_git.bb b/recipes-support/tqftpserv/tqftpserv_git.bb index 8973434..15e03f5 100644 --- a/recipes-support/tqftpserv/tqftpserv_git.bb +++ b/recipes-support/tqftpserv/tqftpserv_git.bb @@ -9,20 +9,17 @@ DEPENDS = "qrtr" inherit systemd -SRCREV = "fe53d2a810abe0e1ee7cc0bb20fd520dc6605ecb" +SRCREV = "de42697a2466cc5ee267ffe36ab4e8494f005fb0" SRC_URI = "git://github.com/andersson/${BPN}.git;branch=master;protocol=https \ - file://0001-include-limits.h-for-PATH_MAX.patch \ " PV = "0.0+${SRCPV}" S = "${WORKDIR}/git" -EXTRA_OEMAKE = "prefix=${prefix} bindir=${bindir} libdir=${libdir} includedir=${includedir} LDFLAGS='${LDFLAGS} -Wl,-lqrtr'" - do_install () { oe_runmake install DESTDIR=${D} prefix=${prefix} servicedir=${systemd_unitdir}/system } -SYSTEMD_SERVICE_${PN} = "tqftpserv.service" -RDEPENDS_${PN} += "qrtr" +SYSTEMD_SERVICE:${PN} = "tqftpserv.service" +RDEPENDS:${PN} += "qrtr" diff --git a/recipes-test/bootrr/bootrr_git.bb b/recipes-test/bootrr/bootrr_git.bb new file mode 100644 index 0000000..01637b4 --- /dev/null +++ b/recipes-test/bootrr/bootrr_git.bb @@ -0,0 +1,19 @@ +SUMMARY = "simple low-level testing tool for qcom boards" + +LICENSE = "BSD-3-Clause" +LIC_FILES_CHKSUM = "file://LICENSE;md5=987293312a134ab40eec5f3d446cfaff" + +SRCREV = "bd84c8a164e9c603db85781cfa019b516a6d2ded" +SRC_URI = "\ + git://github.com/andersson/bootrr.git;branch=master;protocol=https \ +" + +S = "${WORKDIR}/git" + +PV = "0.0+git${SRCPV}" + +inherit allarch + +do_install() { + oe_runmake install 'DESTDIR=${D}' +} diff --git a/recipes-test/diag/diag/0001-Disable-use-of-__NR_io_getevents-when-not-defined.patch b/recipes-test/diag/diag/0001-Disable-use-of-__NR_io_getevents-when-not-defined.patch deleted file mode 100644 index 67e5f13..0000000 --- a/recipes-test/diag/diag/0001-Disable-use-of-__NR_io_getevents-when-not-defined.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 5ee7d4623d10374107de171c796f76054c676c75 Mon Sep 17 00:00:00 2001 -From: Khem Raj <raj.khem@gmail.com> -Date: Mon, 16 Nov 2020 10:36:43 -0800 -Subject: [PATCH] Disable use of __NR_io_getevents when not defined - -Architectures like riscv32 do not define this syscall, therefore return -ENOSYS on such architectures - -Upstream-Status: Submitted [https://github.com/andersson/diag/pull/5] -Signed-off-by: Khem Raj <raj.khem@gmail.com> ---- - router/watch.c | 11 +++++++++-- - 1 file changed, 9 insertions(+), 2 deletions(-) - ---- a/router/watch.c -+++ b/router/watch.c -@@ -102,10 +102,17 @@ static long io_destroy(aio_context_t ctx - return syscall(__NR_io_destroy, ctx); - } - --static long io_getevents(aio_context_t ctx, long min_nr, long nr, -- struct io_event *events, struct timespec *tmo) -+static long io_getevents(__attribute__((unused)) aio_context_t ctx, -+ __attribute__((unused)) long min_nr, -+ __attribute__((unused)) long nr, -+ __attribute__((unused)) struct io_event *events, -+ __attribute__((unused)) struct timespec *tmo) - { -+#ifdef __NR_io_getevents - return syscall(__NR_io_getevents, ctx, min_nr, nr, events, tmo); -+#else -+ return -ENOSYS; -+#endif - } - - static long io_setup(unsigned nr_reqs, aio_context_t *ctx) diff --git a/recipes-test/diag/diag_git.bb b/recipes-test/diag/diag_git.bb index a42c126..ef444bd 100644 --- a/recipes-test/diag/diag_git.bb +++ b/recipes-test/diag/diag_git.bb @@ -3,12 +3,10 @@ HOMEPAGE = "https://github.com/andersson/diag" LICENSE = "BSD-3-Clause" LIC_FILES_CHKSUM = "file://LICENSE;md5=f6832ae4af693c6f31ffd931e25ef580" -SRC_URI = "git://github.com/andersson/diag.git;protocol=https \ - file://0001-Disable-use-of-__NR_io_getevents-when-not-defined.patch \ - " +SRC_URI = "git://github.com/andersson/diag.git;branch=master;protocol=https" PV = "0.0+git${SRCPV}" -SRCREV = "cc5dc0dec3f584d4a500fa36b983e6e77a98e478" +SRCREV = "d06e599d197790c9e84ac41a51bf124a69768c4f" S = "${WORKDIR}/git" diff --git a/recipes-test/images/initramfs-kerneltest-full-image.bb b/recipes-test/images/initramfs-kerneltest-full-image.bb new file mode 100644 index 0000000..ea60bfe --- /dev/null +++ b/recipes-test/images/initramfs-kerneltest-full-image.bb @@ -0,0 +1,3 @@ +require initramfs-test-full-image.bb + +PACKAGE_INSTALL += "${MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS}" diff --git a/recipes-test/images/initramfs-kerneltest-image.bb b/recipes-test/images/initramfs-kerneltest-image.bb new file mode 100644 index 0000000..9dea43c --- /dev/null +++ b/recipes-test/images/initramfs-kerneltest-image.bb @@ -0,0 +1,3 @@ +require initramfs-test-image.bb + +PACKAGE_INSTALL += "${MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS}" diff --git a/recipes-test/images/initramfs-test-full-image.bb b/recipes-test/images/initramfs-test-full-image.bb new file mode 100644 index 0000000..d3a5e97 --- /dev/null +++ b/recipes-test/images/initramfs-test-full-image.bb @@ -0,0 +1,46 @@ +require recipes-test/images/initramfs-test-image.bb + +DESCRIPTION = "Relatively larger ramdisk image for running tests (bootrr, etc)" + +PACKAGE_INSTALL += " \ + bootrr \ + coreutils \ + hdparm \ + kexec \ + lsof \ + ncurses \ + ncurses-terminfo \ + ncurses-terminfo-base \ + stress-ng \ + util-linux \ + util-linux-chrt \ + util-linux-lsblk \ +" + +PACKAGE_INSTALL:append:libc-glibc = " \ + rt-tests \ +" + +# We'd like to include extra packages provided by layers which we do not depend +# on. This can be handled by .bbappends, but then image recipes including this +# one would not get all these tools. So simulate dynamic bbappend here. + +# ncurses-terminfo is provided by oe-core layer, but it's only needed for gps (cgps), so include it here +PACKAGE_INSTALL_openembedded-layer += " \ + crash \ + dhrystone \ + gpsd \ + gpsd-machine-conf \ + gps-utils \ + iozone3 \ + libgpiod \ + libgpiod-tools \ + lmbench \ + makedumpfile \ + mbw \ + ncurses-terminfo-base \ + sysbench \ + tinymembench \ + tiobench \ + whetstone \ +" diff --git a/recipes-test/images/initramfs-test-image.bb b/recipes-test/images/initramfs-test-image.bb index d7b49ac..3c19996 100644 --- a/recipes-test/images/initramfs-test-image.bb +++ b/recipes-test/images/initramfs-test-image.bb @@ -1,55 +1,64 @@ +require recipes-test/images/initramfs-tiny-image.bb + DESCRIPTION = "Small ramdisk image for running tests (bootrr, etc)" -PACKAGE_INSTALL = " \ - ${ROOTFS_BOOTSTRAP_INSTALL} \ +PACKAGE_INSTALL += " \ + alsa-utils-alsaucm \ + alsa-utils-amixer \ + alsa-utils-aplay \ + alsa-utils-speakertest \ bluez5 \ - busybox \ - base-passwd \ + bootrr \ + debugcc \ dhcpcd \ diag \ + dropbear \ e2fsprogs \ e2fsprogs-e2fsck \ e2fsprogs-mke2fs \ e2fsprogs-resize2fs \ e2fsprogs-tune2fs \ ethtool \ + fastrpc \ gptfdisk \ + i2c-tools \ + iw \ lava-test-shell \ - packagegroup-core-boot \ + libdrm-tests \ + lrzsz \ + mybw \ pciutils \ pd-mapper \ qrtr \ rmtfs \ + strace \ tqftpserv \ - udev \ usbutils \ + util-linux-lscpu \ + util-linux-taskset \ wpa-supplicant \ + ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'kmscube', '', d)} \ " -# Do not pollute the initrd image with rootfs features -IMAGE_FEATURES = "debug-tweaks" - -export IMAGE_BASENAME = "initramfs-test-image" -IMAGE_LINGUAS = "" - -LICENSE = "MIT" - -IMAGE_FSTYPES = "${INITRAMFS_FSTYPES}" -inherit core-image - -IMAGE_ROOTFS_SIZE = "8192" -IMAGE_ROOTFS_EXTRA_SPACE = "0" - -# Disable installation of kernel and modules via packagegroup-core-boot -NO_RECOMMENDATIONS = "1" +# We'd like to include extra packages provided by layers which we do not depend +# on. This can be handled by .bbappends, but then image recipes including this +# one would not get all these tools. So simulate dynamic bbappend here. +PACKAGE_INSTALL_openembedded-layer += " \ + android-tools-adbd \ + android-tools-adbd-cmdline \ + cpufrequtils \ + cryptsetup \ + devmem2 \ + lmsensors-config-libsensors \ + lmsensors-sensors \ + media-ctl \ + read-edid \ + yavta \ +" -# Enable local auto-login (on systemd) of the root user (local = serial port and -# virtual console by default, can be configured). -LOCAL_GETTY ?= " \ - ${IMAGE_ROOTFS}${systemd_system_unitdir}/serial-getty@.service \ - ${IMAGE_ROOTFS}${systemd_system_unitdir}/getty@.service \ +PACKAGE_INSTALL_networking-layer += " \ + iperf2 \ + iperf3 \ + phytool \ + tcpdump \ " -local_autologin () { - sed -i -e 's/^\(ExecStart *=.*getty \)/\1--autologin root /' ${LOCAL_GETTY} -} -ROOTFS_POSTPROCESS_COMMAND += "${@oe.utils.conditional('VIRTUAL-RUNTIME_init_manager', 'systemd', 'local_autologin;', '', d)}" diff --git a/recipes-test/images/initramfs-tiny-image.bb b/recipes-test/images/initramfs-tiny-image.bb new file mode 100644 index 0000000..e9f185b --- /dev/null +++ b/recipes-test/images/initramfs-tiny-image.bb @@ -0,0 +1,49 @@ +DESCRIPTION = "Tiny ramdisk image for board bringup" + +PACKAGE_INSTALL = " \ + ${ROOTFS_BOOTSTRAP_INSTALL} \ + busybox \ + base-passwd \ + packagegroup-core-boot \ + udev \ +" + +# Do not pollute the initrd image with rootfs features +IMAGE_FEATURES = "debug-tweaks" +IMAGE_LINGUAS = "" + +LICENSE = "MIT" + +IMAGE_FSTYPES = "${INITRAMFS_FSTYPES}" +IMAGE_NAME_SUFFIX ?= "" +inherit core-image + +IMAGE_ROOTFS_SIZE = "8192" +IMAGE_ROOTFS_EXTRA_SPACE = "0" + +# Disable installation of kernel and modules via packagegroup-core-boot +NO_RECOMMENDATIONS ?= "1" + +# Enable local auto-login (on systemd) of the root user (local = serial port and +# virtual console by default, can be configured). +LOCAL_GETTY ?= " \ + ${IMAGE_ROOTFS}${systemd_system_unitdir}/serial-getty@.service \ + ${IMAGE_ROOTFS}${systemd_system_unitdir}/getty@.service \ +" +local_autologin () { + sed -i -e 's/^\(ExecStart *=.*getty \)/\1--autologin root /' ${LOCAL_GETTY} +} +ROOTFS_POSTPROCESS_COMMAND += "${@oe.utils.conditional('VIRTUAL-RUNTIME_init_manager', 'systemd', 'local_autologin;', '', d)}" + +# We'd like to include extra packages provided by layers which we do not depend +# on. This can be handled by .bbappends, but then image recipes including this +# one would not get all these tools. So simulate dynamic bbappend here. +# +# To use it define PACKAGE_INSTALL_foo-layer variable containing the list of +# packages to be installed if (and only if) layer foo-layer is enabled. +python() { + for layer in d.getVar("BBFILE_COLLECTIONS", True).split(): + extra = d.getVar("PACKAGE_INSTALL_%s" % layer) + if extra: + d.appendVar("PACKAGE_INSTALL", " " + extra) +} diff --git a/recipes-test/lava-test-shell/lava-test-shell.bb b/recipes-test/lava-test-shell/lava-test-shell.bb index 4218c35..92daeb2 100644 --- a/recipes-test/lava-test-shell/lava-test-shell.bb +++ b/recipes-test/lava-test-shell/lava-test-shell.bb @@ -1,7 +1,7 @@ SUMMARY = "Lava test shell helpers" SECTION = "test" -LICENSE = "GPLv2" +LICENSE = "GPL-2.0-only" LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" SRCREV = "dcf554ef9b89c74d028734c74edea1ef5e777d33" diff --git a/recipes-test/mybw/mybw/0001-makefile-Allow-CFLAGS-LDFLAGS-from-environment.patch b/recipes-test/mybw/mybw/0001-makefile-Allow-CFLAGS-LDFLAGS-from-environment.patch new file mode 100644 index 0000000..77fbc94 --- /dev/null +++ b/recipes-test/mybw/mybw/0001-makefile-Allow-CFLAGS-LDFLAGS-from-environment.patch @@ -0,0 +1,31 @@ +From bde677567226a8b7a6c773f863d3f820eca26000 Mon Sep 17 00:00:00 2001 +From: Khem Raj <raj.khem@gmail.com> +Date: Sat, 22 Oct 2022 16:13:47 -0700 +Subject: [PATCH] makefile: Allow CFLAGS/LDFLAGS from environment. + +This helps in cross-compilation where the flags passed from environment +will matter much e.g. ABI, architecture etc. + +Upstream-Status: Submitted [https://github.com/andersson/mybw/pull/1] +Signed-off-by: Khem Raj <raj.khem@gmail.com> +--- + Makefile | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/Makefile b/Makefile +index dfbba09..28a96bc 100644 +--- a/Makefile ++++ b/Makefile +@@ -1,7 +1,7 @@ + OUT := mybw + +-CFLAGS := -O2 -Wall -fno-builtin +-LDFLAGS := -static -static-libgcc ++CFLAGS += -O2 -Wall -fno-builtin ++LDFLAGS += -static -static-libgcc + + SRCS := mybw.c + OBJS := $(SRCS:.c=.o) +-- +2.38.1 + diff --git a/recipes-test/mybw/mybw_git.bb b/recipes-test/mybw/mybw_git.bb new file mode 100644 index 0000000..17e2336 --- /dev/null +++ b/recipes-test/mybw/mybw_git.bb @@ -0,0 +1,24 @@ +SUMMARY = "Quick hack to measure memory read performance." +HOMEPAGE = "https://github.com/andersson/mybw" +LICENSE = "BSD-3-Clause" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/BSD-3-Clause-Clear;md5=7a434440b651f4a472ca93716d01033a" + +SRCREV = "f4bdeee1266c273e308d0651522bb59afb5b8211" +SRC_URI = "git://github.com/andersson/mybw;protocol=https;branch=main \ + file://0001-makefile-Allow-CFLAGS-LDFLAGS-from-environment.patch \ + " + +S = "${WORKDIR}/git" + +PV = "0.0+git${SRCPV}" + +do_compile () { + oe_runmake +} + +do_install () { + install -d ${D}${bindir} + install -m 0755 mybw ${D}${bindir}/mybw +} + +LDFLAGS += "-lgcc" |