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authorRahul Kumar Gupta <rahul.kumarxx.gupta@intel.com>2016-10-14 16:40:17 +0800
committerSaul Wold <sgw@linux.intel.com>2016-10-17 08:12:13 -0700
commit6adafe510efbc9721f163adccbc7245e7751b730 (patch)
tree0f76ecea062ef6d3fe5079cd24b6fa4c0259736b
parent755c4a95e951342cdcdfc680ddb2d0807ff4d6c5 (diff)
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meta-isg: dpdk: fix build with kernel v4.8
Backported fixes from upstream dpdk sources to ensure dpdk 16.07 compiles against kernel 4.8. Signed-off-by: Rahul Kumar Gupta <rahul.kumarxx.gupta@intel.com> Signed-off-by: Saul Wold <sgw@linux.intel.com>
-rw-r--r--meta-isg/common/recipes-extended/dpdk/dpdk.inc3
-rw-r--r--meta-isg/common/recipes-extended/dpdk/dpdk/dpdk-16.07-kni-fix-build-with-kernel-4.8.patch55
-rw-r--r--meta-isg/common/recipes-extended/dpdk/dpdk/dpdk-16.07-net-igb-move-PCI-device-IDs-from-EAL.patch278
-rw-r--r--meta-isg/common/recipes-extended/dpdk/dpdk/dpdk-16.07-net-ixgbe-move-PCI-device-IDs-from-EAL.patch356
4 files changed, 692 insertions, 0 deletions
diff --git a/meta-isg/common/recipes-extended/dpdk/dpdk.inc b/meta-isg/common/recipes-extended/dpdk/dpdk.inc
index f9720291..e90b13f7 100644
--- a/meta-isg/common/recipes-extended/dpdk/dpdk.inc
+++ b/meta-isg/common/recipes-extended/dpdk/dpdk.inc
@@ -11,6 +11,9 @@ SRC_URI = "http://dpdk.org/browse/dpdk/snapshot/dpdk-${PV}.tar.gz;name=dpdk \
file://dpdk-16.07-dpdk-fix-installation-warning-and-issue.patch \
file://dpdk-16.04-dpdk-fix-compilation-with-dynamic-libs.patch \
file://dpdk-16.07-dpdk-fix-for-parellel-make-issue.patch \
+ file://dpdk-16.07-net-ixgbe-move-PCI-device-IDs-from-EAL.patch \
+ file://dpdk-16.07-net-igb-move-PCI-device-IDs-from-EAL.patch \
+ file://dpdk-16.07-kni-fix-build-with-kernel-4.8.patch \
"
COMPATIBLE_MACHINE = "crystalforest|intel-corei7-64"
diff --git a/meta-isg/common/recipes-extended/dpdk/dpdk/dpdk-16.07-kni-fix-build-with-kernel-4.8.patch b/meta-isg/common/recipes-extended/dpdk/dpdk/dpdk-16.07-kni-fix-build-with-kernel-4.8.patch
new file mode 100644
index 00000000..f7938c78
--- /dev/null
+++ b/meta-isg/common/recipes-extended/dpdk/dpdk/dpdk-16.07-kni-fix-build-with-kernel-4.8.patch
@@ -0,0 +1,55 @@
+From d1807cc225db36a467a9ae81ac23a6eb7368730e Mon Sep 17 00:00:00 2001
+From: Ferruh Yigit <ferruh.yigit@intel.com>
+Date: Thu, 8 Sep 2016 19:32:09 +0100
+Subject: [PATCH 3/3] kni: fix build with kernel 4.8
+
+Upstream-Status: Backport [http://dpdk.org/browse/dpdk/commit/?id=
+7f5565592c5ab2f3541951d2b4e65188d01d5d00]
+
+Linux kernel v4.8 removes macro DEFINE_PCI_DEVICE_TABLE
+
+Linux: 7e9321599011 ("treewide: remove references to the now unnecessary
+DEFINE_PCI_DEVICE_TABLE")
+
+Replaced macro with its value in kni ethtool drivers.
+
+Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
+Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
+Acked-by: Christian Ehrhardt <christian.ehrhardt@canonical.com>
+Acked-by: Stephen Hemminger <stephen@networkplumber.org>
+(cherry picked from commit 7f5565592c5ab2f3541951d2b4e65188d01d5d00)
+Signed-off-by: Rahul Kumar Gupta <rahul.kumarxx.gupta@intel.com>
+---
+ lib/librte_eal/linuxapp/kni/ethtool/igb/igb_main.c | 2 +-
+ lib/librte_eal/linuxapp/kni/ethtool/ixgbe/ixgbe_main.c | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/lib/librte_eal/linuxapp/kni/ethtool/igb/igb_main.c b/lib/librte_eal/linuxapp/kni/ethtool/igb/igb_main.c
+index bd803c0..efd39c6 100644
+--- a/lib/librte_eal/linuxapp/kni/ethtool/igb/igb_main.c
++++ b/lib/librte_eal/linuxapp/kni/ethtool/igb/igb_main.c
+@@ -76,7 +76,7 @@ static const char igb_driver_string[] =
+ static const char igb_copyright[] =
+ "Copyright (c) 2007-2013 Intel Corporation.";
+
+-DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
++const struct pci_device_id igb_pci_tbl[] = {
+ { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
+ { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
+ { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
+diff --git a/lib/librte_eal/linuxapp/kni/ethtool/ixgbe/ixgbe_main.c b/lib/librte_eal/linuxapp/kni/ethtool/ixgbe/ixgbe_main.c
+index 92fc9fc..238028d 100644
+--- a/lib/librte_eal/linuxapp/kni/ethtool/ixgbe/ixgbe_main.c
++++ b/lib/librte_eal/linuxapp/kni/ethtool/ixgbe/ixgbe_main.c
+@@ -86,7 +86,7 @@ const char ixgbe_driver_version[] = DRV_VERSION;
+ * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
+ * Class, Class Mask, private data (not used) }
+ */
+-DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl) = {
++const struct pci_device_id ixgbe_pci_tbl[] = {
+ {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598)},
+ {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT)},
+ {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT)},
+--
+1.9.1
+
diff --git a/meta-isg/common/recipes-extended/dpdk/dpdk/dpdk-16.07-net-igb-move-PCI-device-IDs-from-EAL.patch b/meta-isg/common/recipes-extended/dpdk/dpdk/dpdk-16.07-net-igb-move-PCI-device-IDs-from-EAL.patch
new file mode 100644
index 00000000..22fb6f89
--- /dev/null
+++ b/meta-isg/common/recipes-extended/dpdk/dpdk/dpdk-16.07-net-igb-move-PCI-device-IDs-from-EAL.patch
@@ -0,0 +1,278 @@
+From 368fd936258873ee848f2c265e4ffd8e5d21d20e Mon Sep 17 00:00:00 2001
+From: Ferruh Yigit <ferruh.yigit@intel.com>
+Date: Fri, 5 Aug 2016 15:09:30 +0100
+Subject: [PATCH 2/3] net/igb: move PCI device IDs from EAL
+
+Upstream-Status: Backport [http://dpdk.org/browse/dpdk/commit/?id=
+109febfe58f93c5b425772563c35d4414a1a2c1c]
+
+PCI device ids moved from common header into igb driver itself.
+
+KNI starts using pci_device_id from kni/ethtool/igb driver, this is only
+for KNI ethtool support, KNI data path is not affected.
+
+Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
+(cherry picked from commit 109febfe58f93c5b425772563c35d4414a1a2c1c)
+Signed-off-by: Rahul Kumar Gupta <rahul.kumarxx.gupta@intel.com>
+---
+ drivers/net/e1000/igb_ethdev.c | 55 +++++++++--
+ lib/librte_eal/common/include/rte_pci_dev_ids.h | 107 ---------------------
+ lib/librte_eal/linuxapp/kni/ethtool/igb/igb_main.c | 2 +-
+ lib/librte_eal/linuxapp/kni/kni_misc.c | 20 +---
+ 4 files changed, 50 insertions(+), 134 deletions(-)
+
+diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c
+index fbf4d09..4e9e6a3 100644
+--- a/drivers/net/e1000/igb_ethdev.c
++++ b/drivers/net/e1000/igb_ethdev.c
+@@ -306,22 +306,57 @@ static enum e1000_fc_mode igb_fc_setting = e1000_fc_full;
+ * The set of PCI devices this driver supports
+ */
+ static const struct rte_pci_id pci_id_igb_map[] = {
+-
+-#define RTE_PCI_DEV_ID_DECL_IGB(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
+-#include "rte_pci_dev_ids.h"
+-
+-{0},
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_82576) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_82576_FIBER) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_82576_SERDES) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_82576_QUAD_COPPER) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_82576_QUAD_COPPER_ET2) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_82576_NS) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_82576_NS_SERDES) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_82576_SERDES_QUAD) },
++
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_82575EB_COPPER) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_82575EB_FIBER_SERDES) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_82575GB_QUAD_COPPER) },
++
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_82580_COPPER) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_82580_FIBER) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_82580_SERDES) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_82580_SGMII) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_82580_COPPER_DUAL) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_82580_QUAD_FIBER) },
++
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_I350_COPPER) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_I350_FIBER) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_I350_SERDES) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_I350_SGMII) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_I350_DA4) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_I210_COPPER) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_I210_COPPER_OEM1) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_I210_COPPER_IT) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_I210_FIBER) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_I210_SERDES) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_I210_SGMII) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_I211_COPPER) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_I354_SGMII) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_DH89XXCC_SGMII) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_DH89XXCC_SERDES) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_DH89XXCC_BACKPLANE) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_DH89XXCC_SFP) },
++ { .vendor_id = 0, /* sentinel */ },
+ };
+
+ /*
+ * The set of PCI devices this driver supports (for 82576&I350 VF)
+ */
+ static const struct rte_pci_id pci_id_igbvf_map[] = {
+-
+-#define RTE_PCI_DEV_ID_DECL_IGBVF(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
+-#include "rte_pci_dev_ids.h"
+-
+-{0},
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_82576_VF) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_82576_VF_HV) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_I350_VF) },
++ { RTE_PCI_DEVICE(E1000_INTEL_VENDOR_ID, E1000_DEV_ID_I350_VF_HV) },
++ { .vendor_id = 0, /* sentinel */ },
+ };
+
+ static const struct rte_eth_desc_lim rx_desc_lim = {
+diff --git a/lib/librte_eal/common/include/rte_pci_dev_ids.h b/lib/librte_eal/common/include/rte_pci_dev_ids.h
+index 1f9d372..1aae6f7 100644
+--- a/lib/librte_eal/common/include/rte_pci_dev_ids.h
++++ b/lib/librte_eal/common/include/rte_pci_dev_ids.h
+@@ -57,114 +57,7 @@
+ *
+ */
+
+-#ifndef RTE_PCI_DEV_ID_DECL_IGB
+-#define RTE_PCI_DEV_ID_DECL_IGB(vend, dev)
+-#endif
+-
+-#ifndef RTE_PCI_DEV_ID_DECL_IGBVF
+-#define RTE_PCI_DEV_ID_DECL_IGBVF(vend, dev)
+-#endif
+-
+ #ifndef PCI_VENDOR_ID_INTEL
+ /** Vendor ID used by Intel devices */
+ #define PCI_VENDOR_ID_INTEL 0x8086
+ #endif
+-
+-/******************** Physical IGB devices from e1000_hw.h ********************/
+-
+-#define E1000_DEV_ID_82576 0x10C9
+-#define E1000_DEV_ID_82576_FIBER 0x10E6
+-#define E1000_DEV_ID_82576_SERDES 0x10E7
+-#define E1000_DEV_ID_82576_QUAD_COPPER 0x10E8
+-#define E1000_DEV_ID_82576_QUAD_COPPER_ET2 0x1526
+-#define E1000_DEV_ID_82576_NS 0x150A
+-#define E1000_DEV_ID_82576_NS_SERDES 0x1518
+-#define E1000_DEV_ID_82576_SERDES_QUAD 0x150D
+-#define E1000_DEV_ID_82575EB_COPPER 0x10A7
+-#define E1000_DEV_ID_82575EB_FIBER_SERDES 0x10A9
+-#define E1000_DEV_ID_82575GB_QUAD_COPPER 0x10D6
+-#define E1000_DEV_ID_82580_COPPER 0x150E
+-#define E1000_DEV_ID_82580_FIBER 0x150F
+-#define E1000_DEV_ID_82580_SERDES 0x1510
+-#define E1000_DEV_ID_82580_SGMII 0x1511
+-#define E1000_DEV_ID_82580_COPPER_DUAL 0x1516
+-#define E1000_DEV_ID_82580_QUAD_FIBER 0x1527
+-#define E1000_DEV_ID_I350_COPPER 0x1521
+-#define E1000_DEV_ID_I350_FIBER 0x1522
+-#define E1000_DEV_ID_I350_SERDES 0x1523
+-#define E1000_DEV_ID_I350_SGMII 0x1524
+-#define E1000_DEV_ID_I350_DA4 0x1546
+-#define E1000_DEV_ID_I210_COPPER 0x1533
+-#define E1000_DEV_ID_I210_COPPER_OEM1 0x1534
+-#define E1000_DEV_ID_I210_COPPER_IT 0x1535
+-#define E1000_DEV_ID_I210_FIBER 0x1536
+-#define E1000_DEV_ID_I210_SERDES 0x1537
+-#define E1000_DEV_ID_I210_SGMII 0x1538
+-#define E1000_DEV_ID_I210_COPPER_FLASHLESS 0x157B
+-#define E1000_DEV_ID_I210_SERDES_FLASHLESS 0x157C
+-#define E1000_DEV_ID_I211_COPPER 0x1539
+-#define E1000_DEV_ID_I354_BACKPLANE_1GBPS 0x1F40
+-#define E1000_DEV_ID_I354_SGMII 0x1F41
+-#define E1000_DEV_ID_I354_BACKPLANE_2_5GBPS 0x1F45
+-#define E1000_DEV_ID_DH89XXCC_SGMII 0x0438
+-#define E1000_DEV_ID_DH89XXCC_SERDES 0x043A
+-#define E1000_DEV_ID_DH89XXCC_BACKPLANE 0x043C
+-#define E1000_DEV_ID_DH89XXCC_SFP 0x0440
+-
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_FIBER)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_SERDES)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_QUAD_COPPER)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_NS)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_NS_SERDES)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_SERDES_QUAD)
+-
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575EB_COPPER)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER)
+-
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_COPPER)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_FIBER)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_SERDES)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_SGMII)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_COPPER_DUAL)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_QUAD_FIBER)
+-
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_COPPER)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_FIBER)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_SERDES)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_SGMII)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_DA4)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_COPPER)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_COPPER_OEM1)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_COPPER_IT)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_FIBER)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_SERDES)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_SGMII)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I211_COPPER)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I354_SGMII)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SGMII)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SERDES)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE)
+-RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SFP)
+-
+-/****************** Virtual IGB devices from e1000_hw.h ******************/
+-
+-#define E1000_DEV_ID_82576_VF 0x10CA
+-#define E1000_DEV_ID_82576_VF_HV 0x152D
+-#define E1000_DEV_ID_I350_VF 0x1520
+-#define E1000_DEV_ID_I350_VF_HV 0x152F
+-
+-RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_VF)
+-RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_VF_HV)
+-RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_VF)
+-RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_VF_HV)
+-
+-/*
+- * Undef all RTE_PCI_DEV_ID_DECL_* here.
+- */
+-#undef RTE_PCI_DEV_ID_DECL_IGB
+-#undef RTE_PCI_DEV_ID_DECL_IGBVF
+diff --git a/lib/librte_eal/linuxapp/kni/ethtool/igb/igb_main.c b/lib/librte_eal/linuxapp/kni/ethtool/igb/igb_main.c
+index 96acec5..bd803c0 100644
+--- a/lib/librte_eal/linuxapp/kni/ethtool/igb/igb_main.c
++++ b/lib/librte_eal/linuxapp/kni/ethtool/igb/igb_main.c
+@@ -76,7 +76,7 @@ static const char igb_driver_string[] =
+ static const char igb_copyright[] =
+ "Copyright (c) 2007-2013 Intel Corporation.";
+
+-static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
++DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
+ { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
+ { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
+ { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
+diff --git a/lib/librte_eal/linuxapp/kni/kni_misc.c b/lib/librte_eal/linuxapp/kni/kni_misc.c
+index 66bf519..67e9b7d 100644
+--- a/lib/librte_eal/linuxapp/kni/kni_misc.c
++++ b/lib/librte_eal/linuxapp/kni/kni_misc.c
+@@ -58,6 +58,7 @@ extern void ixgbe_kni_remove(struct pci_dev *pdev);
+ extern struct pci_device_id ixgbe_pci_tbl[];
+ extern int igb_kni_probe(struct pci_dev *pdev, struct net_device **lad_dev);
+ extern void igb_kni_remove(struct pci_dev *pdev);
++extern struct pci_device_id igb_pci_tbl[];
+
+ static int kni_open(struct inode *inode, struct file *file);
+ static int kni_release(struct inode *inode, struct file *file);
+@@ -356,15 +357,8 @@ kni_dev_remove(struct kni_dev *dev)
+
+ if (pci_match_id(ixgbe_pci_tbl, dev->pci_dev))
+ ixgbe_kni_remove(dev->pci_dev);
+-
+- switch (dev->device_id) {
+- #define RTE_PCI_DEV_ID_DECL_IGB(vend, dev) case (dev):
+- #include <rte_pci_dev_ids.h>
++ else if (pci_match_id(igb_pci_tbl, dev->pci_dev))
+ igb_kni_remove(dev->pci_dev);
+- break;
+- default:
+- break;
+- }
+
+ if (dev->net_dev) {
+ unregister_netdev(dev->net_dev);
+@@ -513,16 +507,10 @@ kni_ioctl_create(struct net *net,
+
+ if (pci_match_id(ixgbe_pci_tbl, found_pci))
+ ret = ixgbe_kni_probe(found_pci, &lad_dev);
+-
+- switch (dev_info.device_id) {
+- #define RTE_PCI_DEV_ID_DECL_IGB(vend, dev) case (dev):
+- #include <rte_pci_dev_ids.h>
++ else if (pci_match_id(igb_pci_tbl, found_pci))
+ ret = igb_kni_probe(found_pci, &lad_dev);
+- break;
+- default:
++ else
+ ret = -1;
+- break;
+- }
+
+ KNI_DBG("PCI found: pci=0x%p, lad_dev=0x%p\n",
+ pci, lad_dev);
+--
+1.9.1
+
diff --git a/meta-isg/common/recipes-extended/dpdk/dpdk/dpdk-16.07-net-ixgbe-move-PCI-device-IDs-from-EAL.patch b/meta-isg/common/recipes-extended/dpdk/dpdk/dpdk-16.07-net-ixgbe-move-PCI-device-IDs-from-EAL.patch
new file mode 100644
index 00000000..d8b04a9b
--- /dev/null
+++ b/meta-isg/common/recipes-extended/dpdk/dpdk/dpdk-16.07-net-ixgbe-move-PCI-device-IDs-from-EAL.patch
@@ -0,0 +1,356 @@
+From 11b4f5db07e4e48d1548671ac44f3d328523e93d Mon Sep 17 00:00:00 2001
+From: Ferruh Yigit <ferruh.yigit@intel.com>
+Date: Fri, 5 Aug 2016 15:09:29 +0100
+Subject: [PATCH 1/3] net/ixgbe: move PCI device IDs from EAL
+
+Upstream-Status: Backport [http://dpdk.org/browse/dpdk/commit/?id=
+221fba3b987c49964aa2b3d14d7a07397bebdf73]
+
+PCI device ids moved from common header into ixgbe driver itself.
+
+KNI starts using pci_device_id from kni/ethtool/ixgbe driver, this is
+only for KNI ethtool support, KNI data path is not affected.
+
+Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
+(cherry picked from commit 221fba3b987c49964aa2b3d14d7a07397bebdf73)
+Signed-off-by: Rahul Kumar Gupta <rahul.kumarxx.gupta@intel.com>
+---
+ drivers/net/ixgbe/ixgbe_ethdev.c | 79 ++++++++++--
+ lib/librte_eal/common/include/rte_pci_dev_ids.h | 156 ------------------------
+ lib/librte_eal/linuxapp/kni/kni_misc.c | 17 ++-
+ 3 files changed, 76 insertions(+), 176 deletions(-)
+
+diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
+index d478a15..fb618ef 100644
+--- a/drivers/net/ixgbe/ixgbe_ethdev.c
++++ b/drivers/net/ixgbe/ixgbe_ethdev.c
+@@ -429,23 +429,80 @@ static int ixgbe_dev_udp_tunnel_port_del(struct rte_eth_dev *dev,
+ * The set of PCI devices this driver supports
+ */
+ static const struct rte_pci_id pci_id_ixgbe_map[] = {
+-
+-#define RTE_PCI_DEV_ID_DECL_IXGBE(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
+-#include "rte_pci_dev_ids.h"
+-
+-{ .vendor_id = 0, /* sentinel */ },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_BX) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KR) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_SUBDEV_ID_82599_SFP) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_SUBDEV_ID_82599_RNDC) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_SUBDEV_ID_82599_560FLR) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_SUBDEV_ID_82599_ECNA_DP) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_EM) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_LS) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_1G_T) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR_L) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP_N) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII_L) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_10G_T) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP_N) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T_L) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR) },
++#ifdef RTE_NIC_BYPASS
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BYPASS) },
++#endif
++ { .vendor_id = 0, /* sentinel */ },
+ };
+
+-
+ /*
+ * The set of PCI devices this driver supports (for 82599 VF)
+ */
+ static const struct rte_pci_id pci_id_ixgbevf_map[] = {
+-
+-#define RTE_PCI_DEV_ID_DECL_IXGBEVF(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
+-#include "rte_pci_dev_ids.h"
+-{ .vendor_id = 0, /* sentinel */ },
+-
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_VF) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_VF_HV) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540_VF) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540_VF_HV) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550_VF_HV) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550_VF) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_VF) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_VF_HV) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_VF) },
++ { RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_VF_HV) },
++ { .vendor_id = 0, /* sentinel */ },
+ };
+
+ static const struct rte_eth_desc_lim rx_desc_lim = {
+diff --git a/lib/librte_eal/common/include/rte_pci_dev_ids.h b/lib/librte_eal/common/include/rte_pci_dev_ids.h
+index 6ec8ae8..1f9d372 100644
+--- a/lib/librte_eal/common/include/rte_pci_dev_ids.h
++++ b/lib/librte_eal/common/include/rte_pci_dev_ids.h
+@@ -65,14 +65,6 @@
+ #define RTE_PCI_DEV_ID_DECL_IGBVF(vend, dev)
+ #endif
+
+-#ifndef RTE_PCI_DEV_ID_DECL_IXGBE
+-#define RTE_PCI_DEV_ID_DECL_IXGBE(vend, dev)
+-#endif
+-
+-#ifndef RTE_PCI_DEV_ID_DECL_IXGBEVF
+-#define RTE_PCI_DEV_ID_DECL_IXGBEVF(vend, dev)
+-#endif
+-
+ #ifndef PCI_VENDOR_ID_INTEL
+ /** Vendor ID used by Intel devices */
+ #define PCI_VENDOR_ID_INTEL 0x8086
+@@ -159,128 +151,6 @@ RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SERDES)
+ RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE)
+ RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SFP)
+
+-/****************** Physical IXGBE devices from ixgbe_type.h ******************/
+-
+-#define IXGBE_DEV_ID_82598 0x10B6
+-#define IXGBE_DEV_ID_82598_BX 0x1508
+-#define IXGBE_DEV_ID_82598AF_DUAL_PORT 0x10C6
+-#define IXGBE_DEV_ID_82598AF_SINGLE_PORT 0x10C7
+-#define IXGBE_DEV_ID_82598AT 0x10C8
+-#define IXGBE_DEV_ID_82598AT2 0x150B
+-#define IXGBE_DEV_ID_82598EB_SFP_LOM 0x10DB
+-#define IXGBE_DEV_ID_82598EB_CX4 0x10DD
+-#define IXGBE_DEV_ID_82598_CX4_DUAL_PORT 0x10EC
+-#define IXGBE_DEV_ID_82598_DA_DUAL_PORT 0x10F1
+-#define IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM 0x10E1
+-#define IXGBE_DEV_ID_82598EB_XF_LR 0x10F4
+-#define IXGBE_DEV_ID_82599_KX4 0x10F7
+-#define IXGBE_DEV_ID_82599_KX4_MEZZ 0x1514
+-#define IXGBE_DEV_ID_82599_KR 0x1517
+-#define IXGBE_DEV_ID_82599_COMBO_BACKPLANE 0x10F8
+-#define IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ 0x000C
+-#define IXGBE_DEV_ID_82599_CX4 0x10F9
+-#define IXGBE_DEV_ID_82599_SFP 0x10FB
+-#define IXGBE_SUBDEV_ID_82599_SFP 0x11A9
+-#define IXGBE_SUBDEV_ID_82599_RNDC 0x1F72
+-#define IXGBE_SUBDEV_ID_82599_560FLR 0x17D0
+-#define IXGBE_SUBDEV_ID_82599_ECNA_DP 0x0470
+-#define IXGBE_DEV_ID_82599_BACKPLANE_FCOE 0x152A
+-#define IXGBE_DEV_ID_82599_SFP_FCOE 0x1529
+-#define IXGBE_DEV_ID_82599_SFP_EM 0x1507
+-#define IXGBE_DEV_ID_82599_SFP_SF2 0x154D
+-#define IXGBE_DEV_ID_82599_SFP_SF_QP 0x154A
+-#define IXGBE_DEV_ID_82599_QSFP_SF_QP 0x1558
+-#define IXGBE_DEV_ID_82599EN_SFP 0x1557
+-#define IXGBE_DEV_ID_82599_XAUI_LOM 0x10FC
+-#define IXGBE_DEV_ID_82599_T3_LOM 0x151C
+-#define IXGBE_DEV_ID_82599_LS 0x154F
+-#define IXGBE_DEV_ID_X540T 0x1528
+-#define IXGBE_DEV_ID_X540T1 0x1560
+-#define IXGBE_DEV_ID_X550EM_X_SFP 0x15AC
+-#define IXGBE_DEV_ID_X550EM_X_10G_T 0x15AD
+-#define IXGBE_DEV_ID_X550EM_X_1G_T 0x15AE
+-#define IXGBE_DEV_ID_X550T 0x1563
+-#define IXGBE_DEV_ID_X550T1 0x15D1
+-#define IXGBE_DEV_ID_X550EM_A_KR 0x15C2
+-#define IXGBE_DEV_ID_X550EM_A_KR_L 0x15C3
+-#define IXGBE_DEV_ID_X550EM_A_SFP_N 0x15C4
+-#define IXGBE_DEV_ID_X550EM_A_SGMII 0x15C6
+-#define IXGBE_DEV_ID_X550EM_A_SGMII_L 0x15C7
+-#define IXGBE_DEV_ID_X550EM_A_10G_T 0x15C8
+-#define IXGBE_DEV_ID_X550EM_A_QSFP 0x15CA
+-#define IXGBE_DEV_ID_X550EM_A_QSFP_N 0x15CC
+-#define IXGBE_DEV_ID_X550EM_A_SFP 0x15CE
+-#define IXGBE_DEV_ID_X550EM_A_1G_T 0x15E4
+-#define IXGBE_DEV_ID_X550EM_A_1G_T_L 0x15E5
+-#define IXGBE_DEV_ID_X550EM_X_KX4 0x15AA
+-#define IXGBE_DEV_ID_X550EM_X_KR 0x15AB
+-
+-#ifdef RTE_NIC_BYPASS
+-#define IXGBE_DEV_ID_82599_BYPASS 0x155D
+-#endif
+-
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_BX)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
+- IXGBE_DEV_ID_82598AF_SINGLE_PORT)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT2)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_CX4)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
+- IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_XF_LR)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KR)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
+- IXGBE_DEV_ID_82599_COMBO_BACKPLANE)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
+- IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_CX4)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_SFP)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_RNDC)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_560FLR)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_ECNA_DP)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_FCOE)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_EM)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_SF2)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599EN_SFP)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_XAUI_LOM)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_T3_LOM)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_LS)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540T)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540T1)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_SFP)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_10G_T)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_1G_T)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550T)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550T1)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_KR)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_KR_L)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_SGMII)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_10G_T)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_QSFP)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_QSFP_N)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_SFP)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_1G_T)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_KX4)
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_KR)
+-
+-#ifdef RTE_NIC_BYPASS
+-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_BYPASS)
+-#endif
+-
+ /****************** Virtual IGB devices from e1000_hw.h ******************/
+
+ #define E1000_DEV_ID_82576_VF 0x10CA
+@@ -293,34 +163,8 @@ RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_VF_HV)
+ RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_VF)
+ RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_VF_HV)
+
+-/****************** Virtual IXGBE devices from ixgbe_type.h ******************/
+-
+-#define IXGBE_DEV_ID_82599_VF 0x10ED
+-#define IXGBE_DEV_ID_82599_VF_HV 0x152E
+-#define IXGBE_DEV_ID_X540_VF 0x1515
+-#define IXGBE_DEV_ID_X540_VF_HV 0x1530
+-#define IXGBE_DEV_ID_X550_VF_HV 0x1564
+-#define IXGBE_DEV_ID_X550_VF 0x1565
+-#define IXGBE_DEV_ID_X550EM_A_VF 0x15C5
+-#define IXGBE_DEV_ID_X550EM_A_VF_HV 0x15B4
+-#define IXGBE_DEV_ID_X550EM_X_VF 0x15A8
+-#define IXGBE_DEV_ID_X550EM_X_VF_HV 0x15A9
+-
+-RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_VF)
+-RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_VF_HV)
+-RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540_VF)
+-RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540_VF_HV)
+-RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550_VF_HV)
+-RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550_VF)
+-RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_VF)
+-RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_VF_HV)
+-RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_VF)
+-RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_VF_HV)
+-
+ /*
+ * Undef all RTE_PCI_DEV_ID_DECL_* here.
+ */
+ #undef RTE_PCI_DEV_ID_DECL_IGB
+ #undef RTE_PCI_DEV_ID_DECL_IGBVF
+-#undef RTE_PCI_DEV_ID_DECL_IXGBE
+-#undef RTE_PCI_DEV_ID_DECL_IXGBEVF
+diff --git a/lib/librte_eal/linuxapp/kni/kni_misc.c b/lib/librte_eal/linuxapp/kni/kni_misc.c
+index 59d15ca..66bf519 100644
+--- a/lib/librte_eal/linuxapp/kni/kni_misc.c
++++ b/lib/librte_eal/linuxapp/kni/kni_misc.c
+@@ -55,6 +55,7 @@ extern void kni_set_ethtool_ops(struct net_device *netdev);
+
+ extern int ixgbe_kni_probe(struct pci_dev *pdev, struct net_device **lad_dev);
+ extern void ixgbe_kni_remove(struct pci_dev *pdev);
++extern struct pci_device_id ixgbe_pci_tbl[];
+ extern int igb_kni_probe(struct pci_dev *pdev, struct net_device **lad_dev);
+ extern void igb_kni_remove(struct pci_dev *pdev);
+
+@@ -353,15 +354,14 @@ kni_dev_remove(struct kni_dev *dev)
+ if (!dev)
+ return -ENODEV;
+
++ if (pci_match_id(ixgbe_pci_tbl, dev->pci_dev))
++ ixgbe_kni_remove(dev->pci_dev);
++
+ switch (dev->device_id) {
+ #define RTE_PCI_DEV_ID_DECL_IGB(vend, dev) case (dev):
+ #include <rte_pci_dev_ids.h>
+ igb_kni_remove(dev->pci_dev);
+ break;
+- #define RTE_PCI_DEV_ID_DECL_IXGBE(vend, dev) case (dev):
+- #include <rte_pci_dev_ids.h>
+- ixgbe_kni_remove(dev->pci_dev);
+- break;
+ default:
+ break;
+ }
+@@ -510,16 +510,15 @@ kni_ioctl_create(struct net *net,
+ (PCI_SLOT(pci->devfn) == dev_info.devid) &&
+ (PCI_FUNC(pci->devfn) == dev_info.function)) {
+ found_pci = pci;
++
++ if (pci_match_id(ixgbe_pci_tbl, found_pci))
++ ret = ixgbe_kni_probe(found_pci, &lad_dev);
++
+ switch (dev_info.device_id) {
+ #define RTE_PCI_DEV_ID_DECL_IGB(vend, dev) case (dev):
+ #include <rte_pci_dev_ids.h>
+ ret = igb_kni_probe(found_pci, &lad_dev);
+ break;
+- #define RTE_PCI_DEV_ID_DECL_IXGBE(vend, dev) \
+- case (dev):
+- #include <rte_pci_dev_ids.h>
+- ret = ixgbe_kni_probe(found_pci, &lad_dev);
+- break;
+ default:
+ ret = -1;
+ break;
+--
+1.9.1
+