diff options
-rw-r--r-- | COPYING.MIT | 19 | ||||
-rw-r--r-- | conf/layer.conf | 11 | ||||
-rw-r--r-- | conf/machine/clanton.conf | 21 | ||||
-rw-r--r-- | recipes-bsp/grub-conf/files/grub.conf | 21 | ||||
-rw-r--r-- | recipes-bsp/grub-conf/grub-conf_1.0.bb | 16 | ||||
-rw-r--r-- | recipes-bsp/grub/files/clanton.patch | 22374 | ||||
-rw-r--r-- | recipes-bsp/grub/grub_0.97.bb | 46 | ||||
-rw-r--r-- | recipes-kernel/linux/files/clanton-standard.scc | 6 | ||||
-rw-r--r-- | recipes-kernel/linux/files/clanton.cfg | 2938 | ||||
-rw-r--r-- | recipes-kernel/linux/files/clanton.patch | 30644 | ||||
-rw-r--r-- | recipes-kernel/linux/linux-yocto-clanton_3.8.bb | 70 |
11 files changed, 56166 insertions, 0 deletions
diff --git a/COPYING.MIT b/COPYING.MIT new file mode 100644 index 0000000..7d004ab --- /dev/null +++ b/COPYING.MIT @@ -0,0 +1,19 @@ +Copyright(c) 2013 Intel Corporation. All rights reserved. + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +THE SOFTWARE. diff --git a/conf/layer.conf b/conf/layer.conf new file mode 100644 index 0000000..7891979 --- /dev/null +++ b/conf/layer.conf @@ -0,0 +1,11 @@ +# We have a conf and classes directory, add to BBPATH +BBPATH := "${BBPATH}:${LAYERDIR}" + +# We have a recipes directory, add to BBFILES +BBFILES := "${BBFILES} ${LAYERDIR}/recipes-*/*/*.bb \ + ${LAYERDIR}/recipes-*/*/*.bbappend" + +BBFILE_COLLECTIONS += "clanton-bsp" +BBFILE_PATTERN_clanton-bsp := "^${LAYERDIR}/" +BBFILE_PRIORITY_clanton-bsp = "6" + diff --git a/conf/machine/clanton.conf b/conf/machine/clanton.conf new file mode 100644 index 0000000..3304e3c --- /dev/null +++ b/conf/machine/clanton.conf @@ -0,0 +1,21 @@ +#@TYPE: Machine +#@NAME: clanton + +#@DESCRIPTION: Machine configuration for clanton systems + +PREFERRED_PROVIDER_virtual/kernel ?= "linux-yocto-clanton" +PREFERRED_VERSION_linux-yocto-clanton ?= "3.8%" + +require conf/machine/include/ia32-base.inc +include conf/machine/include/tune-i586.inc + +#Avoid pulling in GRUB +MACHINE_ESSENTIAL_EXTRA_RDEPENDS = "" + +MACHINE_FEATURES = "efi usb pci" + +SERIAL_CONSOLE = "115200 ttyS1" +#SERIAL_CONSOLES = "115200;ttyS0 115200;ttyS1" + +EXTRA_IMAGEDEPENDS = "grub" +PREFERRED_VERSION_grub = "0.97+git%" diff --git a/recipes-bsp/grub-conf/files/grub.conf b/recipes-bsp/grub-conf/files/grub.conf new file mode 100644 index 0000000..439d258 --- /dev/null +++ b/recipes-bsp/grub-conf/files/grub.conf @@ -0,0 +1,21 @@ +default 3 +timeout 3 + +color white/blue white/cyan + +title Clanton SVP kernel-SPI initrd-SPI IMR-On IO-APIC/HPET NoEMU + kernel --spi root=/dev/ram0 console=ttyS1,115200n8 earlycon=uart8250,mmio32,0x8010f000,115200n8 reboot=efi,warm apic=debug rw + initrd --spi + +title Clanton SVP kernel-SPI image-full on SD IMR-On IO-APIC/HPET NoEMU + kernel --spi root=/dev/mmcblk0p2 console=ttyS1,115200n8 earlycon=uart8250,mmio32,0x8010f000,115200n8 reboot=efi,warm apic=debug rw + +title Clanton SVP kernel-MassStorage initrd-MassStorage image-full IMR-On IO-APIC/HPET NoEMU debug + root (hd0,0) + kernel /bzImage root=/dev/ram0 console=ttyS1,115200n8 earlycon=uart8250,mmio32,0x8010f000,115200n8 reboot=efi,warm apic=debug rw LABEL=boot debugshell=5 + initrd /core-image-minimal-initramfs-clanton.cpio.gz + +title Clanton SVP kernel-MassStorage image-full on SD IMR-On IO-APIC/HPET NoEMU debug + root (hd0,0) + kernel /bzImage root=/dev/mmcblk0p2 console=ttyS1,115200n8 earlycon=uart8250,mmio32,0x8010f000,115200n8 reboot=efi,warm apic=debug rw LABEL=boot debugshell=5 + diff --git a/recipes-bsp/grub-conf/grub-conf_1.0.bb b/recipes-bsp/grub-conf/grub-conf_1.0.bb new file mode 100644 index 0000000..47df56e --- /dev/null +++ b/recipes-bsp/grub-conf/grub-conf_1.0.bb @@ -0,0 +1,16 @@ +DESCRIPTION = "grub.conf" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +GRUB_CONF = "grub.conf" +GRUB_PATH = "boot/grub/" +SRC_URI = "file://${GRUB_CONF}" + +do_grub() { + install -d ${DEPLOY_DIR_IMAGE}/${GRUB_PATH} + install -m 0755 ${WORKDIR}/${GRUB_CONF} ${DEPLOY_DIR_IMAGE}/${GRUB_PATH}/${GRUB_CONF} +} + +do_grub[nostamp] = "1" + +addtask grub before do_build after do_compile diff --git a/recipes-bsp/grub/files/clanton.patch b/recipes-bsp/grub/files/clanton.patch new file mode 100644 index 0000000..dc68251 --- /dev/null +++ b/recipes-bsp/grub/files/clanton.patch @@ -0,0 +1,22374 @@ +diff --git a/.gitignore b/.gitignore +index 4e19579..7d5ec92 100644 +--- a/.gitignore ++++ b/.gitignore +@@ -1,8 +1,36 @@ + Makefile.in +-Makefile + configure + autom4te.cache + config.h + config.log + config.status ++config.guess ++config.sub + stamp-h1 ++ ++# Eclipse ++.cproject ++.project ++.settings/ ++ ++/aclocal.m4 ++/config.h.in ++/grub/asmstub.o ++/grub/efitftp.o ++/grub/grub ++/grub/main.o ++/lib/device.o ++/lib/getopt.o ++/lib/getopt1.o ++/lib/libcommon.a ++/util/grub-crypt ++ ++*.o ++ ++# Only auto-generated Makefiles ++/Makefile ++/grub/Makefile ++/lib/Makefile ++/netboot/Makefile ++/stage1/Makefile ++ +diff --git a/ChangeLog-clanton b/ChangeLog-clanton +new file mode 100644 +index 0000000..3ca2f6f +--- /dev/null ++++ b/ChangeLog-clanton +@@ -0,0 +1,4 @@ ++2012-08-21 Josef Ahmad <josef.ahmad@intel.com> ++ ++ * Add Clanton-specific changelog. ++ * efi/Makefile.am: generate link map file (RTC 20693). +diff --git a/Makefile.in b/Makefile.in +deleted file mode 100644 +index 6cff007..0000000 +--- a/Makefile.in ++++ /dev/null +@@ -1,622 +0,0 @@ +-# Makefile.in generated by automake 1.10 from Makefile.am. +-# @configure_input@ +- +-# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, +-# 2003, 2004, 2005, 2006 Free Software Foundation, Inc. +-# This Makefile.in is free software; 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However `strip' might not be the right +-# tool to use in cross-compilation environments, therefore Automake +-# will honor the `STRIP' environment variable to overrule this program. +-dnl Don't test for $cross_compiling = yes, because it might be `maybe'. +-if test "$cross_compiling" != no; then +- AC_CHECK_TOOL([STRIP], [strip], :) +-fi +-INSTALL_STRIP_PROGRAM="\$(install_sh) -c -s" +-AC_SUBST([INSTALL_STRIP_PROGRAM])]) +- +-# Copyright (C) 2006 Free Software Foundation, Inc. +-# +-# This file is free software; the Free Software Foundation +-# gives unlimited permission to copy and/or distribute it, +-# with or without modifications, as long as this notice is preserved. +- +-# _AM_SUBST_NOTMAKE(VARIABLE) +-# --------------------------- +-# Prevent Automake from outputing VARIABLE = @VARIABLE@ in Makefile.in. +-# This macro is traced by Automake. +-AC_DEFUN([_AM_SUBST_NOTMAKE]) +- +-# Check how to create a tarball. -*- Autoconf -*- +- +-# Copyright (C) 2004, 2005 Free Software Foundation, Inc. +-# +-# This file is free software; the Free Software Foundation +-# gives unlimited permission to copy and/or distribute it, +-# with or without modifications, as long as this notice is preserved. +- +-# serial 2 +- +-# _AM_PROG_TAR(FORMAT) +-# -------------------- +-# Check how to create a tarball in format FORMAT. +-# FORMAT should be one of `v7', `ustar', or `pax'. +-# +-# Substitute a variable $(am__tar) that is a command +-# writing to stdout a FORMAT-tarball containing the directory +-# $tardir. +-# tardir=directory && $(am__tar) > result.tar +-# +-# Substitute a variable $(am__untar) that extract such +-# a tarball read from stdin. +-# $(am__untar) < result.tar +-AC_DEFUN([_AM_PROG_TAR], +-[# Always define AMTAR for backward compatibility. +-AM_MISSING_PROG([AMTAR], [tar]) +-m4_if([$1], [v7], +- [am__tar='${AMTAR} chof - "$$tardir"'; am__untar='${AMTAR} xf -'], +- [m4_case([$1], [ustar],, [pax],, +- [m4_fatal([Unknown tar format])]) +-AC_MSG_CHECKING([how to create a $1 tar archive]) +-# Loop over all known methods to create a tar archive until one works. +-_am_tools='gnutar m4_if([$1], [ustar], [plaintar]) pax cpio none' +-_am_tools=${am_cv_prog_tar_$1-$_am_tools} +-# Do not fold the above two line into one, because Tru64 sh and +-# Solaris sh will not grok spaces in the rhs of `-'. +-for _am_tool in $_am_tools +-do +- case $_am_tool in +- gnutar) +- for _am_tar in tar gnutar gtar; +- do +- AM_RUN_LOG([$_am_tar --version]) && break +- done +- am__tar="$_am_tar --format=m4_if([$1], [pax], [posix], [$1]) -chf - "'"$$tardir"' +- am__tar_="$_am_tar --format=m4_if([$1], [pax], [posix], [$1]) -chf - "'"$tardir"' +- am__untar="$_am_tar -xf -" +- ;; +- plaintar) +- # Must skip GNU tar: if it does not support --format= it doesn't create +- # ustar tarball either. +- (tar --version) >/dev/null 2>&1 && continue +- am__tar='tar chf - "$$tardir"' +- am__tar_='tar chf - "$tardir"' +- am__untar='tar xf -' +- ;; +- pax) +- am__tar='pax -L -x $1 -w "$$tardir"' +- am__tar_='pax -L -x $1 -w "$tardir"' +- am__untar='pax -r' +- ;; +- cpio) +- am__tar='find "$$tardir" -print | cpio -o -H $1 -L' +- am__tar_='find "$tardir" -print | cpio -o -H $1 -L' +- am__untar='cpio -i -H $1 -d' +- ;; +- none) +- am__tar=false +- am__tar_=false +- am__untar=false +- ;; +- esac +- +- # If the value was cached, stop now. We just wanted to have am__tar +- # and am__untar set. +- test -n "${am_cv_prog_tar_$1}" && break +- +- # tar/untar a dummy directory, and stop if the command works +- rm -rf conftest.dir +- mkdir conftest.dir +- echo GrepMe > conftest.dir/file +- AM_RUN_LOG([tardir=conftest.dir && eval $am__tar_ >conftest.tar]) +- rm -rf conftest.dir +- if test -s conftest.tar; then +- AM_RUN_LOG([$am__untar <conftest.tar]) +- grep GrepMe conftest.dir/file >/dev/null 2>&1 && break +- fi +-done +-rm -rf conftest.dir +- +-AC_CACHE_VAL([am_cv_prog_tar_$1], [am_cv_prog_tar_$1=$_am_tool]) +-AC_MSG_RESULT([$am_cv_prog_tar_$1])]) +-AC_SUBST([am__tar]) +-AC_SUBST([am__untar]) +-]) # _AM_PROG_TAR +- +-m4_include([acinclude.m4]) +diff --git a/config.guess b/config.guess +deleted file mode 100755 +index 8229471..0000000 +--- a/config.guess ++++ /dev/null +@@ -1,1453 +0,0 @@ +-#! /bin/sh +-# Attempt to guess a canonical system name. +-# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +-# 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. +- +-timestamp='2004-11-12' +- +-# This file is free software; you can redistribute it and/or modify it +-# under the terms of the GNU General Public License as published by +-# the Free Software Foundation; either version 2 of the License, or +-# (at your option) any later version. +-# +-# This program is distributed in the hope that it will be useful, but +-# WITHOUT ANY WARRANTY; without even the implied warranty of +-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +-# General Public License for more details. +-# +-# You should have received a copy of the GNU General Public License +-# along with this program; if not, write to the Free Software +-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +-# +-# As a special exception to the GNU General Public License, if you +-# distribute this file as part of a program that contains a +-# configuration script generated by Autoconf, you may include it under +-# the same distribution terms that you use for the rest of that program. +- +-# Originally written by Per Bothner <per@bothner.com>. +-# Please send patches to <config-patches@gnu.org>. Submit a context +-# diff and a properly formatted ChangeLog entry. +-# +-# This script attempts to guess a canonical system name similar to +-# config.sub. If it succeeds, it prints the system name on stdout, and +-# exits with 0. Otherwise, it exits with 1. +-# +-# The plan is that this can be called by configure scripts if you +-# don't specify an explicit build system type. +- +-me=`echo "$0" | sed -e 's,.*/,,'` +- +-usage="\ +-Usage: $0 [OPTION] +- +-Output the configuration name of the system \`$me' is run on. +- +-Operation modes: +- -h, --help print this help, then exit +- -t, --time-stamp print date of last modification, then exit +- -v, --version print version number, then exit +- +-Report bugs and patches to <config-patches@gnu.org>." +- +-version="\ +-GNU config.guess ($timestamp) +- +-Originally written by Per Bothner. +-Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 +-Free Software Foundation, Inc. +- +-This is free software; see the source for copying conditions. There is NO +-warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." +- +-help=" +-Try \`$me --help' for more information." +- +-# Parse command line +-while test $# -gt 0 ; do +- case $1 in +- --time-stamp | --time* | -t ) +- echo "$timestamp" ; exit 0 ;; +- --version | -v ) +- echo "$version" ; exit 0 ;; +- --help | --h* | -h ) +- echo "$usage"; exit 0 ;; +- -- ) # Stop option processing +- shift; break ;; +- - ) # Use stdin as input. +- break ;; +- -* ) +- echo "$me: invalid option $1$help" >&2 +- exit 1 ;; +- * ) +- break ;; +- esac +-done +- +-if test $# != 0; then +- echo "$me: too many arguments$help" >&2 +- exit 1 +-fi +- +-trap 'exit 1' 1 2 15 +- +-# CC_FOR_BUILD -- compiler used by this script. Note that the use of a +-# compiler to aid in system detection is discouraged as it requires +-# temporary files to be created and, as you can see below, it is a +-# headache to deal with in a portable fashion. +- +-# Historically, `CC_FOR_BUILD' used to be named `HOST_CC'. We still +-# use `HOST_CC' if defined, but it is deprecated. +- +-# Portable tmp directory creation inspired by the Autoconf team. +- +-set_cc_for_build=' +-trap "exitcode=\$?; (rm -f \$tmpfiles 2>/dev/null; rmdir \$tmp 2>/dev/null) && exit \$exitcode" 0 ; +-trap "rm -f \$tmpfiles 2>/dev/null; rmdir \$tmp 2>/dev/null; exit 1" 1 2 13 15 ; +-: ${TMPDIR=/tmp} ; +- { tmp=`(umask 077 && mktemp -d -q "$TMPDIR/cgXXXXXX") 2>/dev/null` && test -n "$tmp" && test -d "$tmp" ; } || +- { test -n "$RANDOM" && tmp=$TMPDIR/cg$$-$RANDOM && (umask 077 && mkdir $tmp) ; } || +- { tmp=$TMPDIR/cg-$$ && (umask 077 && mkdir $tmp) && echo "Warning: creating insecure temp directory" >&2 ; } || +- { echo "$me: cannot create a temporary directory in $TMPDIR" >&2 ; exit 1 ; } ; +-dummy=$tmp/dummy ; +-tmpfiles="$dummy.c $dummy.o $dummy.rel $dummy" ; +-case $CC_FOR_BUILD,$HOST_CC,$CC in +- ,,) echo "int x;" > $dummy.c ; +- for c in cc gcc c89 c99 ; do +- if ($c -c -o $dummy.o $dummy.c) >/dev/null 2>&1 ; then +- CC_FOR_BUILD="$c"; break ; +- fi ; +- done ; +- if test x"$CC_FOR_BUILD" = x ; then +- CC_FOR_BUILD=no_compiler_found ; +- fi +- ;; +- ,,*) CC_FOR_BUILD=$CC ;; +- ,*,*) CC_FOR_BUILD=$HOST_CC ;; +-esac ;' +- +-# This is needed to find uname on a Pyramid OSx when run in the BSD universe. +-# (ghazi@noc.rutgers.edu 1994-08-24) +-if (test -f /.attbin/uname) >/dev/null 2>&1 ; then +- PATH=$PATH:/.attbin ; export PATH +-fi +- +-UNAME_MACHINE=`(uname -m) 2>/dev/null` || UNAME_MACHINE=unknown +-UNAME_RELEASE=`(uname -r) 2>/dev/null` || UNAME_RELEASE=unknown +-UNAME_SYSTEM=`(uname -s) 2>/dev/null` || UNAME_SYSTEM=unknown +-UNAME_VERSION=`(uname -v) 2>/dev/null` || UNAME_VERSION=unknown +- +-# Note: order is significant - the case branches are not exclusive. +- +-case "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" in +- *:NetBSD:*:*) +- # NetBSD (nbsd) targets should (where applicable) match one or +- # more of the tupples: *-*-netbsdelf*, *-*-netbsdaout*, +- # *-*-netbsdecoff* and *-*-netbsd*. For targets that recently +- # switched to ELF, *-*-netbsd* would select the old +- # object file format. This provides both forward +- # compatibility and a consistent mechanism for selecting the +- # object file format. +- # +- # Note: NetBSD doesn't particularly care about the vendor +- # portion of the name. We always set it to "unknown". +- sysctl="sysctl -n hw.machine_arch" +- UNAME_MACHINE_ARCH=`(/sbin/$sysctl 2>/dev/null || \ +- /usr/sbin/$sysctl 2>/dev/null || echo unknown)` +- case "${UNAME_MACHINE_ARCH}" in +- armeb) machine=armeb-unknown ;; +- arm*) machine=arm-unknown ;; +- sh3el) machine=shl-unknown ;; +- sh3eb) machine=sh-unknown ;; +- *) machine=${UNAME_MACHINE_ARCH}-unknown ;; +- esac +- # The Operating System including object format, if it has switched +- # to ELF recently, or will in the future. +- case "${UNAME_MACHINE_ARCH}" in +- arm*|i386|m68k|ns32k|sh3*|sparc|vax) +- eval $set_cc_for_build +- if echo __ELF__ | $CC_FOR_BUILD -E - 2>/dev/null \ +- | grep __ELF__ >/dev/null +- then +- # Once all utilities can be ECOFF (netbsdecoff) or a.out (netbsdaout). +- # Return netbsd for either. FIX? +- os=netbsd +- else +- os=netbsdelf +- fi +- ;; +- *) +- os=netbsd +- ;; +- esac +- # The OS release +- # Debian GNU/NetBSD machines have a different userland, and +- # thus, need a distinct triplet. However, they do not need +- # kernel version information, so it can be replaced with a +- # suitable tag, in the style of linux-gnu. +- case "${UNAME_VERSION}" in +- Debian*) +- release='-gnu' +- ;; +- *) +- release=`echo ${UNAME_RELEASE}|sed -e 's/[-_].*/\./'` +- ;; +- esac +- # Since CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM: +- # contains redundant information, the shorter form: +- # CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM is used. +- echo "${machine}-${os}${release}" +- exit 0 ;; +- amd64:OpenBSD:*:*) +- echo x86_64-unknown-openbsd${UNAME_RELEASE} +- exit 0 ;; +- amiga:OpenBSD:*:*) +- echo m68k-unknown-openbsd${UNAME_RELEASE} +- exit 0 ;; +- cats:OpenBSD:*:*) +- echo arm-unknown-openbsd${UNAME_RELEASE} +- exit 0 ;; +- hp300:OpenBSD:*:*) +- echo m68k-unknown-openbsd${UNAME_RELEASE} +- exit 0 ;; +- luna88k:OpenBSD:*:*) +- echo m88k-unknown-openbsd${UNAME_RELEASE} +- exit 0 ;; +- mac68k:OpenBSD:*:*) +- echo m68k-unknown-openbsd${UNAME_RELEASE} +- exit 0 ;; +- macppc:OpenBSD:*:*) +- echo powerpc-unknown-openbsd${UNAME_RELEASE} +- exit 0 ;; +- mvme68k:OpenBSD:*:*) +- echo m68k-unknown-openbsd${UNAME_RELEASE} +- exit 0 ;; +- mvme88k:OpenBSD:*:*) +- echo m88k-unknown-openbsd${UNAME_RELEASE} +- exit 0 ;; +- mvmeppc:OpenBSD:*:*) +- echo powerpc-unknown-openbsd${UNAME_RELEASE} +- exit 0 ;; +- sgi:OpenBSD:*:*) +- echo mips64-unknown-openbsd${UNAME_RELEASE} +- exit 0 ;; +- sun3:OpenBSD:*:*) +- echo m68k-unknown-openbsd${UNAME_RELEASE} +- exit 0 ;; +- *:OpenBSD:*:*) +- echo ${UNAME_MACHINE}-unknown-openbsd${UNAME_RELEASE} +- exit 0 ;; +- *:ekkoBSD:*:*) +- echo ${UNAME_MACHINE}-unknown-ekkobsd${UNAME_RELEASE} +- exit 0 ;; +- macppc:MirBSD:*:*) +- echo powerppc-unknown-mirbsd${UNAME_RELEASE} +- exit 0 ;; +- *:MirBSD:*:*) +- echo ${UNAME_MACHINE}-unknown-mirbsd${UNAME_RELEASE} +- exit 0 ;; +- alpha:OSF1:*:*) +- case $UNAME_RELEASE in +- *4.0) +- UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $3}'` +- ;; +- *5.*) +- UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $4}'` +- ;; +- esac +- # According to Compaq, /usr/sbin/psrinfo has been available on +- # OSF/1 and Tru64 systems produced since 1995. I hope that +- # covers most systems running today. This code pipes the CPU +- # types through head -n 1, so we only detect the type of CPU 0. +- ALPHA_CPU_TYPE=`/usr/sbin/psrinfo -v | sed -n -e 's/^ The alpha \(.*\) processor.*$/\1/p' | head -n 1` +- case "$ALPHA_CPU_TYPE" in +- "EV4 (21064)") +- UNAME_MACHINE="alpha" ;; +- "EV4.5 (21064)") +- UNAME_MACHINE="alpha" ;; +- "LCA4 (21066/21068)") +- UNAME_MACHINE="alpha" ;; +- "EV5 (21164)") +- UNAME_MACHINE="alphaev5" ;; +- "EV5.6 (21164A)") +- UNAME_MACHINE="alphaev56" ;; +- "EV5.6 (21164PC)") +- UNAME_MACHINE="alphapca56" ;; +- "EV5.7 (21164PC)") +- UNAME_MACHINE="alphapca57" ;; +- "EV6 (21264)") +- UNAME_MACHINE="alphaev6" ;; +- "EV6.7 (21264A)") +- UNAME_MACHINE="alphaev67" ;; +- "EV6.8CB (21264C)") +- UNAME_MACHINE="alphaev68" ;; +- "EV6.8AL (21264B)") +- UNAME_MACHINE="alphaev68" ;; +- "EV6.8CX (21264D)") +- UNAME_MACHINE="alphaev68" ;; +- "EV6.9A (21264/EV69A)") +- UNAME_MACHINE="alphaev69" ;; +- "EV7 (21364)") +- UNAME_MACHINE="alphaev7" ;; +- "EV7.9 (21364A)") +- UNAME_MACHINE="alphaev79" ;; +- esac +- # A Pn.n version is a patched version. +- # A Vn.n version is a released version. +- # A Tn.n version is a released field test version. +- # A Xn.n version is an unreleased experimental baselevel. +- # 1.2 uses "1.2" for uname -r. +- echo ${UNAME_MACHINE}-dec-osf`echo ${UNAME_RELEASE} | sed -e 's/^[PVTX]//' | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'` +- exit 0 ;; +- Alpha\ *:Windows_NT*:*) +- # How do we know it's Interix rather than the generic POSIX subsystem? +- # Should we change UNAME_MACHINE based on the output of uname instead +- # of the specific Alpha model? +- echo alpha-pc-interix +- exit 0 ;; +- 21064:Windows_NT:50:3) +- echo alpha-dec-winnt3.5 +- exit 0 ;; +- Amiga*:UNIX_System_V:4.0:*) +- echo m68k-unknown-sysv4 +- exit 0;; +- *:[Aa]miga[Oo][Ss]:*:*) +- echo ${UNAME_MACHINE}-unknown-amigaos +- exit 0 ;; +- *:[Mm]orph[Oo][Ss]:*:*) +- echo ${UNAME_MACHINE}-unknown-morphos +- exit 0 ;; +- *:OS/390:*:*) +- echo i370-ibm-openedition +- exit 0 ;; +- *:z/VM:*:*) +- echo s390-ibm-zvmoe +- exit 0 ;; +- *:OS400:*:*) +- echo powerpc-ibm-os400 +- exit 0 ;; +- arm:RISC*:1.[012]*:*|arm:riscix:1.[012]*:*) +- echo arm-acorn-riscix${UNAME_RELEASE} +- exit 0;; +- SR2?01:HI-UX/MPP:*:* | SR8000:HI-UX/MPP:*:*) +- echo hppa1.1-hitachi-hiuxmpp +- exit 0;; +- Pyramid*:OSx*:*:* | MIS*:OSx*:*:* | MIS*:SMP_DC-OSx*:*:*) +- # akee@wpdis03.wpafb.af.mil (Earle F. Ake) contributed MIS and NILE. +- if test "`(/bin/universe) 2>/dev/null`" = att ; then +- echo pyramid-pyramid-sysv3 +- else +- echo pyramid-pyramid-bsd +- fi +- exit 0 ;; +- NILE*:*:*:dcosx) +- echo pyramid-pyramid-svr4 +- exit 0 ;; +- DRS?6000:unix:4.0:6*) +- echo sparc-icl-nx6 +- exit 0 ;; +- DRS?6000:UNIX_SV:4.2*:7* | DRS?6000:isis:4.2*:7*) +- case `/usr/bin/uname -p` in +- sparc) echo sparc-icl-nx7 && exit 0 ;; +- esac ;; +- sun4H:SunOS:5.*:*) +- echo sparc-hal-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` +- exit 0 ;; +- sun4*:SunOS:5.*:* | tadpole*:SunOS:5.*:*) +- echo sparc-sun-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` +- exit 0 ;; +- i86pc:SunOS:5.*:*) +- echo i386-pc-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` +- exit 0 ;; +- sun4*:SunOS:6*:*) +- # According to config.sub, this is the proper way to canonicalize +- # SunOS6. Hard to guess exactly what SunOS6 will be like, but +- # it's likely to be more like Solaris than SunOS4. +- echo sparc-sun-solaris3`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` +- exit 0 ;; +- sun4*:SunOS:*:*) +- case "`/usr/bin/arch -k`" in +- Series*|S4*) +- UNAME_RELEASE=`uname -v` +- ;; +- esac +- # Japanese Language versions have a version number like `4.1.3-JL'. +- echo sparc-sun-sunos`echo ${UNAME_RELEASE}|sed -e 's/-/_/'` +- exit 0 ;; +- sun3*:SunOS:*:*) +- echo m68k-sun-sunos${UNAME_RELEASE} +- exit 0 ;; +- sun*:*:4.2BSD:*) +- UNAME_RELEASE=`(sed 1q /etc/motd | awk '{print substr($5,1,3)}') 2>/dev/null` +- test "x${UNAME_RELEASE}" = "x" && UNAME_RELEASE=3 +- case "`/bin/arch`" in +- sun3) +- echo m68k-sun-sunos${UNAME_RELEASE} +- ;; +- sun4) +- echo sparc-sun-sunos${UNAME_RELEASE} +- ;; +- esac +- exit 0 ;; +- aushp:SunOS:*:*) +- echo sparc-auspex-sunos${UNAME_RELEASE} +- exit 0 ;; +- # The situation for MiNT is a little confusing. The machine name +- # can be virtually everything (everything which is not +- # "atarist" or "atariste" at least should have a processor +- # > m68000). The system name ranges from "MiNT" over "FreeMiNT" +- # to the lowercase version "mint" (or "freemint"). Finally +- # the system name "TOS" denotes a system which is actually not +- # MiNT. But MiNT is downward compatible to TOS, so this should +- # be no problem. +- atarist[e]:*MiNT:*:* | atarist[e]:*mint:*:* | atarist[e]:*TOS:*:*) +- echo m68k-atari-mint${UNAME_RELEASE} +- exit 0 ;; +- atari*:*MiNT:*:* | atari*:*mint:*:* | atarist[e]:*TOS:*:*) +- echo m68k-atari-mint${UNAME_RELEASE} +- exit 0 ;; +- *falcon*:*MiNT:*:* | *falcon*:*mint:*:* | *falcon*:*TOS:*:*) +- echo m68k-atari-mint${UNAME_RELEASE} +- exit 0 ;; +- milan*:*MiNT:*:* | milan*:*mint:*:* | *milan*:*TOS:*:*) +- echo m68k-milan-mint${UNAME_RELEASE} +- exit 0 ;; +- hades*:*MiNT:*:* | hades*:*mint:*:* | *hades*:*TOS:*:*) +- echo m68k-hades-mint${UNAME_RELEASE} +- exit 0 ;; +- *:*MiNT:*:* | *:*mint:*:* | *:*TOS:*:*) +- echo m68k-unknown-mint${UNAME_RELEASE} +- exit 0 ;; +- m68k:machten:*:*) +- echo m68k-apple-machten${UNAME_RELEASE} +- exit 0 ;; +- powerpc:machten:*:*) +- echo powerpc-apple-machten${UNAME_RELEASE} +- exit 0 ;; +- RISC*:Mach:*:*) +- echo mips-dec-mach_bsd4.3 +- exit 0 ;; +- RISC*:ULTRIX:*:*) +- echo mips-dec-ultrix${UNAME_RELEASE} +- exit 0 ;; +- VAX*:ULTRIX*:*:*) +- echo vax-dec-ultrix${UNAME_RELEASE} +- exit 0 ;; +- 2020:CLIX:*:* | 2430:CLIX:*:*) +- echo clipper-intergraph-clix${UNAME_RELEASE} +- exit 0 ;; +- mips:*:*:UMIPS | mips:*:*:RISCos) +- eval $set_cc_for_build +- sed 's/^ //' << EOF >$dummy.c +-#ifdef __cplusplus +-#include <stdio.h> /* for printf() prototype */ +- int main (int argc, char *argv[]) { +-#else +- int main (argc, argv) int argc; char *argv[]; { +-#endif +- #if defined (host_mips) && defined (MIPSEB) +- #if defined (SYSTYPE_SYSV) +- printf ("mips-mips-riscos%ssysv\n", argv[1]); exit (0); +- #endif +- #if defined (SYSTYPE_SVR4) +- printf ("mips-mips-riscos%ssvr4\n", argv[1]); exit (0); +- #endif +- #if defined (SYSTYPE_BSD43) || defined(SYSTYPE_BSD) +- printf ("mips-mips-riscos%sbsd\n", argv[1]); exit (0); +- #endif +- #endif +- exit (-1); +- } +-EOF +- $CC_FOR_BUILD -o $dummy $dummy.c \ +- && $dummy `echo "${UNAME_RELEASE}" | sed -n 's/\([0-9]*\).*/\1/p'` \ +- && exit 0 +- echo mips-mips-riscos${UNAME_RELEASE} +- exit 0 ;; +- Motorola:PowerMAX_OS:*:*) +- echo powerpc-motorola-powermax +- exit 0 ;; +- Motorola:*:4.3:PL8-*) +- echo powerpc-harris-powermax +- exit 0 ;; +- Night_Hawk:*:*:PowerMAX_OS | Synergy:PowerMAX_OS:*:*) +- echo powerpc-harris-powermax +- exit 0 ;; +- Night_Hawk:Power_UNIX:*:*) +- echo powerpc-harris-powerunix +- exit 0 ;; +- m88k:CX/UX:7*:*) +- echo m88k-harris-cxux7 +- exit 0 ;; +- m88k:*:4*:R4*) +- echo m88k-motorola-sysv4 +- exit 0 ;; +- m88k:*:3*:R3*) +- echo m88k-motorola-sysv3 +- exit 0 ;; +- AViiON:dgux:*:*) +- # DG/UX returns AViiON for all architectures +- UNAME_PROCESSOR=`/usr/bin/uname -p` +- if [ $UNAME_PROCESSOR = mc88100 ] || [ $UNAME_PROCESSOR = mc88110 ] +- then +- if [ ${TARGET_BINARY_INTERFACE}x = m88kdguxelfx ] || \ +- [ ${TARGET_BINARY_INTERFACE}x = x ] +- then +- echo m88k-dg-dgux${UNAME_RELEASE} +- else +- echo m88k-dg-dguxbcs${UNAME_RELEASE} +- fi +- else +- echo i586-dg-dgux${UNAME_RELEASE} +- fi +- exit 0 ;; +- M88*:DolphinOS:*:*) # DolphinOS (SVR3) +- echo m88k-dolphin-sysv3 +- exit 0 ;; +- M88*:*:R3*:*) +- # Delta 88k system running SVR3 +- echo m88k-motorola-sysv3 +- exit 0 ;; +- XD88*:*:*:*) # Tektronix XD88 system running UTekV (SVR3) +- echo m88k-tektronix-sysv3 +- exit 0 ;; +- Tek43[0-9][0-9]:UTek:*:*) # Tektronix 4300 system running UTek (BSD) +- echo m68k-tektronix-bsd +- exit 0 ;; +- *:IRIX*:*:*) +- echo mips-sgi-irix`echo ${UNAME_RELEASE}|sed -e 's/-/_/g'` +- exit 0 ;; +- ????????:AIX?:[12].1:2) # AIX 2.2.1 or AIX 2.1.1 is RT/PC AIX. +- echo romp-ibm-aix # uname -m gives an 8 hex-code CPU id +- exit 0 ;; # Note that: echo "'`uname -s`'" gives 'AIX ' +- i*86:AIX:*:*) +- echo i386-ibm-aix +- exit 0 ;; +- ia64:AIX:*:*) +- if [ -x /usr/bin/oslevel ] ; then +- IBM_REV=`/usr/bin/oslevel` +- else +- IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE} +- fi +- echo ${UNAME_MACHINE}-ibm-aix${IBM_REV} +- exit 0 ;; +- *:AIX:2:3) +- if grep bos325 /usr/include/stdio.h >/dev/null 2>&1; then +- eval $set_cc_for_build +- sed 's/^ //' << EOF >$dummy.c +- #include <sys/systemcfg.h> +- +- main() +- { +- if (!__power_pc()) +- exit(1); +- puts("powerpc-ibm-aix3.2.5"); +- exit(0); +- } +-EOF +- $CC_FOR_BUILD -o $dummy $dummy.c && $dummy && exit 0 +- echo rs6000-ibm-aix3.2.5 +- elif grep bos324 /usr/include/stdio.h >/dev/null 2>&1; then +- echo rs6000-ibm-aix3.2.4 +- else +- echo rs6000-ibm-aix3.2 +- fi +- exit 0 ;; +- *:AIX:*:[45]) +- IBM_CPU_ID=`/usr/sbin/lsdev -C -c processor -S available | sed 1q | awk '{ print $1 }'` +- if /usr/sbin/lsattr -El ${IBM_CPU_ID} | grep ' POWER' >/dev/null 2>&1; then +- IBM_ARCH=rs6000 +- else +- IBM_ARCH=powerpc +- fi +- if [ -x /usr/bin/oslevel ] ; then +- IBM_REV=`/usr/bin/oslevel` +- else +- IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE} +- fi +- echo ${IBM_ARCH}-ibm-aix${IBM_REV} +- exit 0 ;; +- *:AIX:*:*) +- echo rs6000-ibm-aix +- exit 0 ;; +- ibmrt:4.4BSD:*|romp-ibm:BSD:*) +- echo romp-ibm-bsd4.4 +- exit 0 ;; +- ibmrt:*BSD:*|romp-ibm:BSD:*) # covers RT/PC BSD and +- echo romp-ibm-bsd${UNAME_RELEASE} # 4.3 with uname added to +- exit 0 ;; # report: romp-ibm BSD 4.3 +- *:BOSX:*:*) +- echo rs6000-bull-bosx +- exit 0 ;; +- DPX/2?00:B.O.S.:*:*) +- echo m68k-bull-sysv3 +- exit 0 ;; +- 9000/[34]??:4.3bsd:1.*:*) +- echo m68k-hp-bsd +- exit 0 ;; +- hp300:4.4BSD:*:* | 9000/[34]??:4.3bsd:2.*:*) +- echo m68k-hp-bsd4.4 +- exit 0 ;; +- 9000/[34678]??:HP-UX:*:*) +- HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'` +- case "${UNAME_MACHINE}" in +- 9000/31? ) HP_ARCH=m68000 ;; +- 9000/[34]?? ) HP_ARCH=m68k ;; +- 9000/[678][0-9][0-9]) +- if [ -x /usr/bin/getconf ]; then +- sc_cpu_version=`/usr/bin/getconf SC_CPU_VERSION 2>/dev/null` +- sc_kernel_bits=`/usr/bin/getconf SC_KERNEL_BITS 2>/dev/null` +- case "${sc_cpu_version}" in +- 523) HP_ARCH="hppa1.0" ;; # CPU_PA_RISC1_0 +- 528) HP_ARCH="hppa1.1" ;; # CPU_PA_RISC1_1 +- 532) # CPU_PA_RISC2_0 +- case "${sc_kernel_bits}" in +- 32) HP_ARCH="hppa2.0n" ;; +- 64) HP_ARCH="hppa2.0w" ;; +- '') HP_ARCH="hppa2.0" ;; # HP-UX 10.20 +- esac ;; +- esac +- fi +- if [ "${HP_ARCH}" = "" ]; then +- eval $set_cc_for_build +- sed 's/^ //' << EOF >$dummy.c +- +- #define _HPUX_SOURCE +- #include <stdlib.h> +- #include <unistd.h> +- +- int main () +- { +- #if defined(_SC_KERNEL_BITS) +- long bits = sysconf(_SC_KERNEL_BITS); +- #endif +- long cpu = sysconf (_SC_CPU_VERSION); +- +- switch (cpu) +- { +- case CPU_PA_RISC1_0: puts ("hppa1.0"); break; +- case CPU_PA_RISC1_1: puts ("hppa1.1"); break; +- case CPU_PA_RISC2_0: +- #if defined(_SC_KERNEL_BITS) +- switch (bits) +- { +- case 64: puts ("hppa2.0w"); break; +- case 32: puts ("hppa2.0n"); break; +- default: puts ("hppa2.0"); break; +- } break; +- #else /* !defined(_SC_KERNEL_BITS) */ +- puts ("hppa2.0"); break; +- #endif +- default: puts ("hppa1.0"); break; +- } +- exit (0); +- } +-EOF +- (CCOPTS= $CC_FOR_BUILD -o $dummy $dummy.c 2>/dev/null) && HP_ARCH=`$dummy` +- test -z "$HP_ARCH" && HP_ARCH=hppa +- fi ;; +- esac +- if [ ${HP_ARCH} = "hppa2.0w" ] +- then +- # avoid double evaluation of $set_cc_for_build +- test -n "$CC_FOR_BUILD" || eval $set_cc_for_build +- if echo __LP64__ | (CCOPTS= $CC_FOR_BUILD -E -) | grep __LP64__ >/dev/null +- then +- HP_ARCH="hppa2.0w" +- else +- HP_ARCH="hppa64" +- fi +- fi +- echo ${HP_ARCH}-hp-hpux${HPUX_REV} +- exit 0 ;; +- ia64:HP-UX:*:*) +- HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'` +- echo ia64-hp-hpux${HPUX_REV} +- exit 0 ;; +- 3050*:HI-UX:*:*) +- eval $set_cc_for_build +- sed 's/^ //' << EOF >$dummy.c +- #include <unistd.h> +- int +- main () +- { +- long cpu = sysconf (_SC_CPU_VERSION); +- /* The order matters, because CPU_IS_HP_MC68K erroneously returns +- true for CPU_PA_RISC1_0. CPU_IS_PA_RISC returns correct +- results, however. */ +- if (CPU_IS_PA_RISC (cpu)) +- { +- switch (cpu) +- { +- case CPU_PA_RISC1_0: puts ("hppa1.0-hitachi-hiuxwe2"); break; +- case CPU_PA_RISC1_1: puts ("hppa1.1-hitachi-hiuxwe2"); break; +- case CPU_PA_RISC2_0: puts ("hppa2.0-hitachi-hiuxwe2"); break; +- default: puts ("hppa-hitachi-hiuxwe2"); break; +- } +- } +- else if (CPU_IS_HP_MC68K (cpu)) +- puts ("m68k-hitachi-hiuxwe2"); +- else puts ("unknown-hitachi-hiuxwe2"); +- exit (0); +- } +-EOF +- $CC_FOR_BUILD -o $dummy $dummy.c && $dummy && exit 0 +- echo unknown-hitachi-hiuxwe2 +- exit 0 ;; +- 9000/7??:4.3bsd:*:* | 9000/8?[79]:4.3bsd:*:* ) +- echo hppa1.1-hp-bsd +- exit 0 ;; +- 9000/8??:4.3bsd:*:*) +- echo hppa1.0-hp-bsd +- exit 0 ;; +- *9??*:MPE/iX:*:* | *3000*:MPE/iX:*:*) +- echo hppa1.0-hp-mpeix +- exit 0 ;; +- hp7??:OSF1:*:* | hp8?[79]:OSF1:*:* ) +- echo hppa1.1-hp-osf +- exit 0 ;; +- hp8??:OSF1:*:*) +- echo hppa1.0-hp-osf +- exit 0 ;; +- i*86:OSF1:*:*) +- if [ -x /usr/sbin/sysversion ] ; then +- echo ${UNAME_MACHINE}-unknown-osf1mk +- else +- echo ${UNAME_MACHINE}-unknown-osf1 +- fi +- exit 0 ;; +- parisc*:Lites*:*:*) +- echo hppa1.1-hp-lites +- exit 0 ;; +- C1*:ConvexOS:*:* | convex:ConvexOS:C1*:*) +- echo c1-convex-bsd +- exit 0 ;; +- C2*:ConvexOS:*:* | convex:ConvexOS:C2*:*) +- if getsysinfo -f scalar_acc +- then echo c32-convex-bsd +- else echo c2-convex-bsd +- fi +- exit 0 ;; +- C34*:ConvexOS:*:* | convex:ConvexOS:C34*:*) +- echo c34-convex-bsd +- exit 0 ;; +- C38*:ConvexOS:*:* | convex:ConvexOS:C38*:*) +- echo c38-convex-bsd +- exit 0 ;; +- C4*:ConvexOS:*:* | convex:ConvexOS:C4*:*) +- echo c4-convex-bsd +- exit 0 ;; +- CRAY*Y-MP:*:*:*) +- echo ymp-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' +- exit 0 ;; +- CRAY*[A-Z]90:*:*:*) +- echo ${UNAME_MACHINE}-cray-unicos${UNAME_RELEASE} \ +- | sed -e 's/CRAY.*\([A-Z]90\)/\1/' \ +- -e y/ABCDEFGHIJKLMNOPQRSTUVWXYZ/abcdefghijklmnopqrstuvwxyz/ \ +- -e 's/\.[^.]*$/.X/' +- exit 0 ;; +- CRAY*TS:*:*:*) +- echo t90-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' +- exit 0 ;; +- CRAY*T3E:*:*:*) +- echo alphaev5-cray-unicosmk${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' +- exit 0 ;; +- CRAY*SV1:*:*:*) +- echo sv1-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' +- exit 0 ;; +- *:UNICOS/mp:*:*) +- echo craynv-cray-unicosmp${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' +- exit 0 ;; +- F30[01]:UNIX_System_V:*:* | F700:UNIX_System_V:*:*) +- FUJITSU_PROC=`uname -m | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'` +- FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` +- FUJITSU_REL=`echo ${UNAME_RELEASE} | sed -e 's/ /_/'` +- echo "${FUJITSU_PROC}-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" +- exit 0 ;; +- 5000:UNIX_System_V:4.*:*) +- FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` +- FUJITSU_REL=`echo ${UNAME_RELEASE} | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/ /_/'` +- echo "sparc-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" +- exit 0 ;; +- i*86:BSD/386:*:* | i*86:BSD/OS:*:* | *:Ascend\ Embedded/OS:*:*) +- echo ${UNAME_MACHINE}-pc-bsdi${UNAME_RELEASE} +- exit 0 ;; +- sparc*:BSD/OS:*:*) +- echo sparc-unknown-bsdi${UNAME_RELEASE} +- exit 0 ;; +- *:BSD/OS:*:*) +- echo ${UNAME_MACHINE}-unknown-bsdi${UNAME_RELEASE} +- exit 0 ;; +- *:FreeBSD:*:*) +- echo ${UNAME_MACHINE}-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` +- exit 0 ;; +- i*:CYGWIN*:*) +- echo ${UNAME_MACHINE}-pc-cygwin +- exit 0 ;; +- i*:MINGW*:*) +- echo ${UNAME_MACHINE}-pc-mingw32 +- exit 0 ;; +- i*:PW*:*) +- echo ${UNAME_MACHINE}-pc-pw32 +- exit 0 ;; +- x86:Interix*:[34]*) +- echo i586-pc-interix${UNAME_RELEASE}|sed -e 's/\..*//' +- exit 0 ;; +- [345]86:Windows_95:* | [345]86:Windows_98:* | [345]86:Windows_NT:*) +- echo i${UNAME_MACHINE}-pc-mks +- exit 0 ;; +- i*:Windows_NT*:* | Pentium*:Windows_NT*:*) +- # How do we know it's Interix rather than the generic POSIX subsystem? +- # It also conflicts with pre-2.0 versions of AT&T UWIN. Should we +- # UNAME_MACHINE based on the output of uname instead of i386? +- echo i586-pc-interix +- exit 0 ;; +- i*:UWIN*:*) +- echo ${UNAME_MACHINE}-pc-uwin +- exit 0 ;; +- p*:CYGWIN*:*) +- echo powerpcle-unknown-cygwin +- exit 0 ;; +- prep*:SunOS:5.*:*) +- echo powerpcle-unknown-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` +- exit 0 ;; +- *:GNU:*:*) +- # the GNU system +- echo `echo ${UNAME_MACHINE}|sed -e 's,[-/].*$,,'`-unknown-gnu`echo ${UNAME_RELEASE}|sed -e 's,/.*$,,'` +- exit 0 ;; +- *:GNU/*:*:*) +- # other systems with GNU libc and userland +- echo ${UNAME_MACHINE}-unknown-`echo ${UNAME_SYSTEM} | sed 's,^[^/]*/,,' | tr '[A-Z]' '[a-z]'``echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`-gnu +- exit 0 ;; +- i*86:Minix:*:*) +- echo ${UNAME_MACHINE}-pc-minix +- exit 0 ;; +- arm*:Linux:*:*) +- echo ${UNAME_MACHINE}-unknown-linux-gnu +- exit 0 ;; +- cris:Linux:*:*) +- echo cris-axis-linux-gnu +- exit 0 ;; +- crisv32:Linux:*:*) +- echo crisv32-axis-linux-gnu +- exit 0 ;; +- frv:Linux:*:*) +- echo frv-unknown-linux-gnu +- exit 0 ;; +- ia64:Linux:*:*) +- echo ${UNAME_MACHINE}-unknown-linux-gnu +- exit 0 ;; +- m32r*:Linux:*:*) +- echo ${UNAME_MACHINE}-unknown-linux-gnu +- exit 0 ;; +- m68*:Linux:*:*) +- echo ${UNAME_MACHINE}-unknown-linux-gnu +- exit 0 ;; +- mips:Linux:*:*) +- eval $set_cc_for_build +- sed 's/^ //' << EOF >$dummy.c +- #undef CPU +- #undef mips +- #undef mipsel +- #if defined(__MIPSEL__) || defined(__MIPSEL) || defined(_MIPSEL) || defined(MIPSEL) +- CPU=mipsel +- #else +- #if defined(__MIPSEB__) || defined(__MIPSEB) || defined(_MIPSEB) || defined(MIPSEB) +- CPU=mips +- #else +- CPU= +- #endif +- #endif +-EOF +- eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep ^CPU=` +- test x"${CPU}" != x && echo "${CPU}-unknown-linux-gnu" && exit 0 +- ;; +- mips64:Linux:*:*) +- eval $set_cc_for_build +- sed 's/^ //' << EOF >$dummy.c +- #undef CPU +- #undef mips64 +- #undef mips64el +- #if defined(__MIPSEL__) || defined(__MIPSEL) || defined(_MIPSEL) || defined(MIPSEL) +- CPU=mips64el +- #else +- #if defined(__MIPSEB__) || defined(__MIPSEB) || defined(_MIPSEB) || defined(MIPSEB) +- CPU=mips64 +- #else +- CPU= +- #endif +- #endif +-EOF +- eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep ^CPU=` +- test x"${CPU}" != x && echo "${CPU}-unknown-linux-gnu" && exit 0 +- ;; +- ppc:Linux:*:*) +- echo powerpc-unknown-linux-gnu +- exit 0 ;; +- ppc64:Linux:*:*) +- echo powerpc64-unknown-linux-gnu +- exit 0 ;; +- alpha:Linux:*:*) +- case `sed -n '/^cpu model/s/^.*: \(.*\)/\1/p' < /proc/cpuinfo` in +- EV5) UNAME_MACHINE=alphaev5 ;; +- EV56) UNAME_MACHINE=alphaev56 ;; +- PCA56) UNAME_MACHINE=alphapca56 ;; +- PCA57) UNAME_MACHINE=alphapca56 ;; +- EV6) UNAME_MACHINE=alphaev6 ;; +- EV67) UNAME_MACHINE=alphaev67 ;; +- EV68*) UNAME_MACHINE=alphaev68 ;; +- esac +- objdump --private-headers /bin/sh | grep ld.so.1 >/dev/null +- if test "$?" = 0 ; then LIBC="libc1" ; else LIBC="" ; fi +- echo ${UNAME_MACHINE}-unknown-linux-gnu${LIBC} +- exit 0 ;; +- parisc:Linux:*:* | hppa:Linux:*:*) +- # Look for CPU level +- case `grep '^cpu[^a-z]*:' /proc/cpuinfo 2>/dev/null | cut -d' ' -f2` in +- PA7*) echo hppa1.1-unknown-linux-gnu ;; +- PA8*) echo hppa2.0-unknown-linux-gnu ;; +- *) echo hppa-unknown-linux-gnu ;; +- esac +- exit 0 ;; +- parisc64:Linux:*:* | hppa64:Linux:*:*) +- echo hppa64-unknown-linux-gnu +- exit 0 ;; +- s390:Linux:*:* | s390x:Linux:*:*) +- echo ${UNAME_MACHINE}-ibm-linux +- exit 0 ;; +- sh64*:Linux:*:*) +- echo ${UNAME_MACHINE}-unknown-linux-gnu +- exit 0 ;; +- sh*:Linux:*:*) +- echo ${UNAME_MACHINE}-unknown-linux-gnu +- exit 0 ;; +- sparc:Linux:*:* | sparc64:Linux:*:*) +- echo ${UNAME_MACHINE}-unknown-linux-gnu +- exit 0 ;; +- x86_64:Linux:*:*) +- echo x86_64-unknown-linux-gnu +- exit 0 ;; +- i*86:Linux:*:*) +- # The BFD linker knows what the default object file format is, so +- # first see if it will tell us. cd to the root directory to prevent +- # problems with other programs or directories called `ld' in the path. +- # Set LC_ALL=C to ensure ld outputs messages in English. +- ld_supported_targets=`cd /; LC_ALL=C ld --help 2>&1 \ +- | sed -ne '/supported targets:/!d +- s/[ ][ ]*/ /g +- s/.*supported targets: *// +- s/ .*// +- p'` +- case "$ld_supported_targets" in +- elf32-i386) +- TENTATIVE="${UNAME_MACHINE}-pc-linux-gnu" +- ;; +- a.out-i386-linux) +- echo "${UNAME_MACHINE}-pc-linux-gnuaout" +- exit 0 ;; +- coff-i386) +- echo "${UNAME_MACHINE}-pc-linux-gnucoff" +- exit 0 ;; +- "") +- # Either a pre-BFD a.out linker (linux-gnuoldld) or +- # one that does not give us useful --help. +- echo "${UNAME_MACHINE}-pc-linux-gnuoldld" +- exit 0 ;; +- esac +- # Determine whether the default compiler is a.out or elf +- eval $set_cc_for_build +- sed 's/^ //' << EOF >$dummy.c +- #include <features.h> +- #ifdef __ELF__ +- # ifdef __GLIBC__ +- # if __GLIBC__ >= 2 +- LIBC=gnu +- # else +- LIBC=gnulibc1 +- # endif +- # else +- LIBC=gnulibc1 +- # endif +- #else +- #ifdef __INTEL_COMPILER +- LIBC=gnu +- #else +- LIBC=gnuaout +- #endif +- #endif +- #ifdef __dietlibc__ +- LIBC=dietlibc +- #endif +-EOF +- eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep ^LIBC=` +- test x"${LIBC}" != x && echo "${UNAME_MACHINE}-pc-linux-${LIBC}" && exit 0 +- test x"${TENTATIVE}" != x && echo "${TENTATIVE}" && exit 0 +- ;; +- i*86:DYNIX/ptx:4*:*) +- # ptx 4.0 does uname -s correctly, with DYNIX/ptx in there. +- # earlier versions are messed up and put the nodename in both +- # sysname and nodename. +- echo i386-sequent-sysv4 +- exit 0 ;; +- i*86:UNIX_SV:4.2MP:2.*) +- # Unixware is an offshoot of SVR4, but it has its own version +- # number series starting with 2... +- # I am not positive that other SVR4 systems won't match this, +- # I just have to hope. -- rms. +- # Use sysv4.2uw... so that sysv4* matches it. +- echo ${UNAME_MACHINE}-pc-sysv4.2uw${UNAME_VERSION} +- exit 0 ;; +- i*86:OS/2:*:*) +- # If we were able to find `uname', then EMX Unix compatibility +- # is probably installed. +- echo ${UNAME_MACHINE}-pc-os2-emx +- exit 0 ;; +- i*86:XTS-300:*:STOP) +- echo ${UNAME_MACHINE}-unknown-stop +- exit 0 ;; +- i*86:atheos:*:*) +- echo ${UNAME_MACHINE}-unknown-atheos +- exit 0 ;; +- i*86:syllable:*:*) +- echo ${UNAME_MACHINE}-pc-syllable +- exit 0 ;; +- i*86:LynxOS:2.*:* | i*86:LynxOS:3.[01]*:* | i*86:LynxOS:4.0*:*) +- echo i386-unknown-lynxos${UNAME_RELEASE} +- exit 0 ;; +- i*86:*DOS:*:*) +- echo ${UNAME_MACHINE}-pc-msdosdjgpp +- exit 0 ;; +- i*86:*:4.*:* | i*86:SYSTEM_V:4.*:*) +- UNAME_REL=`echo ${UNAME_RELEASE} | sed 's/\/MP$//'` +- if grep Novell /usr/include/link.h >/dev/null 2>/dev/null; then +- echo ${UNAME_MACHINE}-univel-sysv${UNAME_REL} +- else +- echo ${UNAME_MACHINE}-pc-sysv${UNAME_REL} +- fi +- exit 0 ;; +- i*86:*:5:[78]*) +- case `/bin/uname -X | grep "^Machine"` in +- *486*) UNAME_MACHINE=i486 ;; +- *Pentium) UNAME_MACHINE=i586 ;; +- *Pent*|*Celeron) UNAME_MACHINE=i686 ;; +- esac +- echo ${UNAME_MACHINE}-unknown-sysv${UNAME_RELEASE}${UNAME_SYSTEM}${UNAME_VERSION} +- exit 0 ;; +- i*86:*:3.2:*) +- if test -f /usr/options/cb.name; then +- UNAME_REL=`sed -n 's/.*Version //p' </usr/options/cb.name` +- echo ${UNAME_MACHINE}-pc-isc$UNAME_REL +- elif /bin/uname -X 2>/dev/null >/dev/null ; then +- UNAME_REL=`(/bin/uname -X|grep Release|sed -e 's/.*= //')` +- (/bin/uname -X|grep i80486 >/dev/null) && UNAME_MACHINE=i486 +- (/bin/uname -X|grep '^Machine.*Pentium' >/dev/null) \ +- && UNAME_MACHINE=i586 +- (/bin/uname -X|grep '^Machine.*Pent *II' >/dev/null) \ +- && UNAME_MACHINE=i686 +- (/bin/uname -X|grep '^Machine.*Pentium Pro' >/dev/null) \ +- && UNAME_MACHINE=i686 +- echo ${UNAME_MACHINE}-pc-sco$UNAME_REL +- else +- echo ${UNAME_MACHINE}-pc-sysv32 +- fi +- exit 0 ;; +- pc:*:*:*) +- # Left here for compatibility: +- # uname -m prints for DJGPP always 'pc', but it prints nothing about +- # the processor, so we play safe by assuming i386. +- echo i386-pc-msdosdjgpp +- exit 0 ;; +- Intel:Mach:3*:*) +- echo i386-pc-mach3 +- exit 0 ;; +- paragon:*:*:*) +- echo i860-intel-osf1 +- exit 0 ;; +- i860:*:4.*:*) # i860-SVR4 +- if grep Stardent /usr/include/sys/uadmin.h >/dev/null 2>&1 ; then +- echo i860-stardent-sysv${UNAME_RELEASE} # Stardent Vistra i860-SVR4 +- else # Add other i860-SVR4 vendors below as they are discovered. +- echo i860-unknown-sysv${UNAME_RELEASE} # Unknown i860-SVR4 +- fi +- exit 0 ;; +- mini*:CTIX:SYS*5:*) +- # "miniframe" +- echo m68010-convergent-sysv +- exit 0 ;; +- mc68k:UNIX:SYSTEM5:3.51m) +- echo m68k-convergent-sysv +- exit 0 ;; +- M680?0:D-NIX:5.3:*) +- echo m68k-diab-dnix +- exit 0 ;; +- M68*:*:R3V[5678]*:*) +- test -r /sysV68 && echo 'm68k-motorola-sysv' && exit 0 ;; +- 3[345]??:*:4.0:3.0 | 3[34]??A:*:4.0:3.0 | 3[34]??,*:*:4.0:3.0 | 3[34]??/*:*:4.0:3.0 | 4400:*:4.0:3.0 | 4850:*:4.0:3.0 | SKA40:*:4.0:3.0 | SDS2:*:4.0:3.0 | SHG2:*:4.0:3.0 | S7501*:*:4.0:3.0) +- OS_REL='' +- test -r /etc/.relid \ +- && OS_REL=.`sed -n 's/[^ ]* [^ ]* \([0-9][0-9]\).*/\1/p' < /etc/.relid` +- /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ +- && echo i486-ncr-sysv4.3${OS_REL} && exit 0 +- /bin/uname -p 2>/dev/null | /bin/grep entium >/dev/null \ +- && echo i586-ncr-sysv4.3${OS_REL} && exit 0 ;; +- 3[34]??:*:4.0:* | 3[34]??,*:*:4.0:*) +- /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ +- && echo i486-ncr-sysv4 && exit 0 ;; +- m68*:LynxOS:2.*:* | m68*:LynxOS:3.0*:*) +- echo m68k-unknown-lynxos${UNAME_RELEASE} +- exit 0 ;; +- mc68030:UNIX_System_V:4.*:*) +- echo m68k-atari-sysv4 +- exit 0 ;; +- TSUNAMI:LynxOS:2.*:*) +- echo sparc-unknown-lynxos${UNAME_RELEASE} +- exit 0 ;; +- rs6000:LynxOS:2.*:*) +- echo rs6000-unknown-lynxos${UNAME_RELEASE} +- exit 0 ;; +- PowerPC:LynxOS:2.*:* | PowerPC:LynxOS:3.[01]*:* | PowerPC:LynxOS:4.0*:*) +- echo powerpc-unknown-lynxos${UNAME_RELEASE} +- exit 0 ;; +- SM[BE]S:UNIX_SV:*:*) +- echo mips-dde-sysv${UNAME_RELEASE} +- exit 0 ;; +- RM*:ReliantUNIX-*:*:*) +- echo mips-sni-sysv4 +- exit 0 ;; +- RM*:SINIX-*:*:*) +- echo mips-sni-sysv4 +- exit 0 ;; +- *:SINIX-*:*:*) +- if uname -p 2>/dev/null >/dev/null ; then +- UNAME_MACHINE=`(uname -p) 2>/dev/null` +- echo ${UNAME_MACHINE}-sni-sysv4 +- else +- echo ns32k-sni-sysv +- fi +- exit 0 ;; +- PENTIUM:*:4.0*:*) # Unisys `ClearPath HMP IX 4000' SVR4/MP effort +- # says <Richard.M.Bartel@ccMail.Census.GOV> +- echo i586-unisys-sysv4 +- exit 0 ;; +- *:UNIX_System_V:4*:FTX*) +- # From Gerald Hewes <hewes@openmarket.com>. +- # How about differentiating between stratus architectures? -djm +- echo hppa1.1-stratus-sysv4 +- exit 0 ;; +- *:*:*:FTX*) +- # From seanf@swdc.stratus.com. +- echo i860-stratus-sysv4 +- exit 0 ;; +- *:VOS:*:*) +- # From Paul.Green@stratus.com. +- echo hppa1.1-stratus-vos +- exit 0 ;; +- mc68*:A/UX:*:*) +- echo m68k-apple-aux${UNAME_RELEASE} +- exit 0 ;; +- news*:NEWS-OS:6*:*) +- echo mips-sony-newsos6 +- exit 0 ;; +- R[34]000:*System_V*:*:* | R4000:UNIX_SYSV:*:* | R*000:UNIX_SV:*:*) +- if [ -d /usr/nec ]; then +- echo mips-nec-sysv${UNAME_RELEASE} +- else +- echo mips-unknown-sysv${UNAME_RELEASE} +- fi +- exit 0 ;; +- BeBox:BeOS:*:*) # BeOS running on hardware made by Be, PPC only. +- echo powerpc-be-beos +- exit 0 ;; +- BeMac:BeOS:*:*) # BeOS running on Mac or Mac clone, PPC only. +- echo powerpc-apple-beos +- exit 0 ;; +- BePC:BeOS:*:*) # BeOS running on Intel PC compatible. +- echo i586-pc-beos +- exit 0 ;; +- SX-4:SUPER-UX:*:*) +- echo sx4-nec-superux${UNAME_RELEASE} +- exit 0 ;; +- SX-5:SUPER-UX:*:*) +- echo sx5-nec-superux${UNAME_RELEASE} +- exit 0 ;; +- SX-6:SUPER-UX:*:*) +- echo sx6-nec-superux${UNAME_RELEASE} +- exit 0 ;; +- Power*:Rhapsody:*:*) +- echo powerpc-apple-rhapsody${UNAME_RELEASE} +- exit 0 ;; +- *:Rhapsody:*:*) +- echo ${UNAME_MACHINE}-apple-rhapsody${UNAME_RELEASE} +- exit 0 ;; +- *:Darwin:*:*) +- UNAME_PROCESSOR=`uname -p` || UNAME_PROCESSOR=unknown +- case $UNAME_PROCESSOR in +- *86) UNAME_PROCESSOR=i686 ;; +- unknown) UNAME_PROCESSOR=powerpc ;; +- esac +- echo ${UNAME_PROCESSOR}-apple-darwin${UNAME_RELEASE} +- exit 0 ;; +- *:procnto*:*:* | *:QNX:[0123456789]*:*) +- UNAME_PROCESSOR=`uname -p` +- if test "$UNAME_PROCESSOR" = "x86"; then +- UNAME_PROCESSOR=i386 +- UNAME_MACHINE=pc +- fi +- echo ${UNAME_PROCESSOR}-${UNAME_MACHINE}-nto-qnx${UNAME_RELEASE} +- exit 0 ;; +- *:QNX:*:4*) +- echo i386-pc-qnx +- exit 0 ;; +- NSR-?:NONSTOP_KERNEL:*:*) +- echo nsr-tandem-nsk${UNAME_RELEASE} +- exit 0 ;; +- *:NonStop-UX:*:*) +- echo mips-compaq-nonstopux +- exit 0 ;; +- BS2000:POSIX*:*:*) +- echo bs2000-siemens-sysv +- exit 0 ;; +- DS/*:UNIX_System_V:*:*) +- echo ${UNAME_MACHINE}-${UNAME_SYSTEM}-${UNAME_RELEASE} +- exit 0 ;; +- *:Plan9:*:*) +- # "uname -m" is not consistent, so use $cputype instead. 386 +- # is converted to i386 for consistency with other x86 +- # operating systems. +- if test "$cputype" = "386"; then +- UNAME_MACHINE=i386 +- else +- UNAME_MACHINE="$cputype" +- fi +- echo ${UNAME_MACHINE}-unknown-plan9 +- exit 0 ;; +- *:TOPS-10:*:*) +- echo pdp10-unknown-tops10 +- exit 0 ;; +- *:TENEX:*:*) +- echo pdp10-unknown-tenex +- exit 0 ;; +- KS10:TOPS-20:*:* | KL10:TOPS-20:*:* | TYPE4:TOPS-20:*:*) +- echo pdp10-dec-tops20 +- exit 0 ;; +- XKL-1:TOPS-20:*:* | TYPE5:TOPS-20:*:*) +- echo pdp10-xkl-tops20 +- exit 0 ;; +- *:TOPS-20:*:*) +- echo pdp10-unknown-tops20 +- exit 0 ;; +- *:ITS:*:*) +- echo pdp10-unknown-its +- exit 0 ;; +- SEI:*:*:SEIUX) +- echo mips-sei-seiux${UNAME_RELEASE} +- exit 0 ;; +- *:DragonFly:*:*) +- echo ${UNAME_MACHINE}-unknown-dragonfly`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` +- exit 0 ;; +- *:*VMS:*:*) +- UNAME_MACHINE=`(uname -p) 2>/dev/null` +- case "${UNAME_MACHINE}" in +- A*) echo alpha-dec-vms && exit 0 ;; +- I*) echo ia64-dec-vms && exit 0 ;; +- V*) echo vax-dec-vms && exit 0 ;; +- esac ;; +- *:XENIX:*:SysV) +- echo i386-pc-xenix +- exit 0 ;; +-esac +- +-#echo '(No uname command or uname output not recognized.)' 1>&2 +-#echo "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" 1>&2 +- +-eval $set_cc_for_build +-cat >$dummy.c <<EOF +-#ifdef _SEQUENT_ +-# include <sys/types.h> +-# include <sys/utsname.h> +-#endif +-main () +-{ +-#if defined (sony) +-#if defined (MIPSEB) +- /* BFD wants "bsd" instead of "newsos". Perhaps BFD should be changed, +- I don't know.... */ +- printf ("mips-sony-bsd\n"); exit (0); +-#else +-#include <sys/param.h> +- printf ("m68k-sony-newsos%s\n", +-#ifdef NEWSOS4 +- "4" +-#else +- "" +-#endif +- ); exit (0); +-#endif +-#endif +- +-#if defined (__arm) && defined (__acorn) && defined (__unix) +- printf ("arm-acorn-riscix"); exit (0); +-#endif +- +-#if defined (hp300) && !defined (hpux) +- printf ("m68k-hp-bsd\n"); exit (0); +-#endif +- +-#if defined (NeXT) +-#if !defined (__ARCHITECTURE__) +-#define __ARCHITECTURE__ "m68k" +-#endif +- int version; +- version=`(hostinfo | sed -n 's/.*NeXT Mach \([0-9]*\).*/\1/p') 2>/dev/null`; +- if (version < 4) +- printf ("%s-next-nextstep%d\n", __ARCHITECTURE__, version); +- else +- printf ("%s-next-openstep%d\n", __ARCHITECTURE__, version); +- exit (0); +-#endif +- +-#if defined (MULTIMAX) || defined (n16) +-#if defined (UMAXV) +- printf ("ns32k-encore-sysv\n"); exit (0); +-#else +-#if defined (CMU) +- printf ("ns32k-encore-mach\n"); exit (0); +-#else +- printf ("ns32k-encore-bsd\n"); exit (0); +-#endif +-#endif +-#endif +- +-#if defined (__386BSD__) +- printf ("i386-pc-bsd\n"); exit (0); +-#endif +- +-#if defined (sequent) +-#if defined (i386) +- printf ("i386-sequent-dynix\n"); exit (0); +-#endif +-#if defined (ns32000) +- printf ("ns32k-sequent-dynix\n"); exit (0); +-#endif +-#endif +- +-#if defined (_SEQUENT_) +- struct utsname un; +- +- uname(&un); +- +- if (strncmp(un.version, "V2", 2) == 0) { +- printf ("i386-sequent-ptx2\n"); exit (0); +- } +- if (strncmp(un.version, "V1", 2) == 0) { /* XXX is V1 correct? */ +- printf ("i386-sequent-ptx1\n"); exit (0); +- } +- printf ("i386-sequent-ptx\n"); exit (0); +- +-#endif +- +-#if defined (vax) +-# if !defined (ultrix) +-# include <sys/param.h> +-# if defined (BSD) +-# if BSD == 43 +- printf ("vax-dec-bsd4.3\n"); exit (0); +-# else +-# if BSD == 199006 +- printf ("vax-dec-bsd4.3reno\n"); exit (0); +-# else +- printf ("vax-dec-bsd\n"); exit (0); +-# endif +-# endif +-# else +- printf ("vax-dec-bsd\n"); exit (0); +-# endif +-# else +- printf ("vax-dec-ultrix\n"); exit (0); +-# endif +-#endif +- +-#if defined (alliant) && defined (i860) +- printf ("i860-alliant-bsd\n"); exit (0); +-#endif +- +- exit (1); +-} +-EOF +- +-$CC_FOR_BUILD -o $dummy $dummy.c 2>/dev/null && $dummy && exit 0 +- +-# Apollos put the system type in the environment. +- +-test -d /usr/apollo && { echo ${ISP}-apollo-${SYSTYPE}; exit 0; } +- +-# Convex versions that predate uname can use getsysinfo(1) +- +-if [ -x /usr/convex/getsysinfo ] +-then +- case `getsysinfo -f cpu_type` in +- c1*) +- echo c1-convex-bsd +- exit 0 ;; +- c2*) +- if getsysinfo -f scalar_acc +- then echo c32-convex-bsd +- else echo c2-convex-bsd +- fi +- exit 0 ;; +- c34*) +- echo c34-convex-bsd +- exit 0 ;; +- c38*) +- echo c38-convex-bsd +- exit 0 ;; +- c4*) +- echo c4-convex-bsd +- exit 0 ;; +- esac +-fi +- +-cat >&2 <<EOF +-$0: unable to guess system type +- +-This script, last modified $timestamp, has failed to recognize +-the operating system you are using. It is advised that you +-download the most up to date version of the config scripts from +- +- ftp://ftp.gnu.org/pub/gnu/config/ +- +-If the version you run ($0) is already up to date, please +-send the following data and any information you think might be +-pertinent to <config-patches@gnu.org> in order to provide the needed +-information to handle your system. +- +-config.guess timestamp = $timestamp +- +-uname -m = `(uname -m) 2>/dev/null || echo unknown` +-uname -r = `(uname -r) 2>/dev/null || echo unknown` +-uname -s = `(uname -s) 2>/dev/null || echo unknown` +-uname -v = `(uname -v) 2>/dev/null || echo unknown` +- +-/usr/bin/uname -p = `(/usr/bin/uname -p) 2>/dev/null` +-/bin/uname -X = `(/bin/uname -X) 2>/dev/null` +- +-hostinfo = `(hostinfo) 2>/dev/null` +-/bin/universe = `(/bin/universe) 2>/dev/null` +-/usr/bin/arch -k = `(/usr/bin/arch -k) 2>/dev/null` +-/bin/arch = `(/bin/arch) 2>/dev/null` +-/usr/bin/oslevel = `(/usr/bin/oslevel) 2>/dev/null` +-/usr/convex/getsysinfo = `(/usr/convex/getsysinfo) 2>/dev/null` +- +-UNAME_MACHINE = ${UNAME_MACHINE} +-UNAME_RELEASE = ${UNAME_RELEASE} +-UNAME_SYSTEM = ${UNAME_SYSTEM} +-UNAME_VERSION = ${UNAME_VERSION} +-EOF +- +-exit 1 +- +-# Local variables: +-# eval: (add-hook 'write-file-hooks 'time-stamp) +-# time-stamp-start: "timestamp='" +-# time-stamp-format: "%:y-%02m-%02d" +-# time-stamp-end: "'" +-# End: +diff --git a/config.h.in b/config.h.in +deleted file mode 100644 +index e2128e4..0000000 +--- a/config.h.in ++++ /dev/null +@@ -1,109 +0,0 @@ +-/* config.h.in. Generated from configure.in by autoheader. */ +- +-/* Define if an absolute indirect call/jump must NOT be prefixed with `*' */ +-#undef ABSOLUTE_WITHOUT_ASTERISK +- +-/* Define it to \"addr32\" or \"addr32;\" to make GAS happy */ +-#undef ADDR32 +- +-/* Define if you don't want to pass the mem= option to Linux */ +-#undef AUTO_LINUX_MEM_OPT +- +-/* Define it to \"data32\" or \"data32;\" to make GAS happy */ +-#undef DATA32 +- +-/* Define if C symbols get an underscore after compilation */ +-#undef HAVE_ASM_USCORE +- +-/* Define to 1 if you have the <curses.h> header file. */ +-#undef HAVE_CURSES_H +- +-/* Define if edata is defined */ +-#undef HAVE_EDATA_SYMBOL +- +-/* Define if end is defined */ +-#undef HAVE_END_SYMBOL +- +-/* Define to 1 if you have the <inttypes.h> header file. */ +-#undef HAVE_INTTYPES_H +- +-/* Define if you have a curses library */ +-#undef HAVE_LIBCURSES +- +-/* Define to 1 if you have the <memory.h> header file. */ +-#undef HAVE_MEMORY_H +- +-/* Define to 1 if you have the <ncurses/curses.h> header file. */ +-#undef HAVE_NCURSES_CURSES_H +- +-/* Define to 1 if you have the <ncurses.h> header file. */ +-#undef HAVE_NCURSES_H +- +-/* Define if opendisk() in -lutil can be used */ +-#undef HAVE_OPENDISK +- +-/* Define if start is defined */ +-#undef HAVE_START_SYMBOL +- +-/* Define to 1 if you have the <stdint.h> header file. */ +-#undef HAVE_STDINT_H +- +-/* Define to 1 if you have the <stdlib.h> header file. */ +-#undef HAVE_STDLIB_H +- +-/* Define to 1 if you have the <strings.h> header file. */ +-#undef HAVE_STRINGS_H +- +-/* Define to 1 if you have the <string.h> header file. */ +-#undef HAVE_STRING_H +- +-/* Define to 1 if you have the <sys/stat.h> header file. */ +-#undef HAVE_SYS_STAT_H +- +-/* Define to 1 if you have the <sys/types.h> header file. */ +-#undef HAVE_SYS_TYPES_H +- +-/* Define to 1 if you have the <unistd.h> header file. */ +-#undef HAVE_UNISTD_H +- +-/* Define if _edata is defined */ +-#undef HAVE_USCORE_EDATA_SYMBOL +- +-/* Define if end is defined */ +-#undef HAVE_USCORE_END_SYMBOL +- +-/* Define if _start is defined */ +-#undef HAVE_USCORE_START_SYMBOL +- +-/* Define if __bss_start is defined */ +-#undef HAVE_USCORE_USCORE_BSS_START_SYMBOL +- +-/* Name of package */ +-#undef PACKAGE +- +-/* Define to the address where bug reports for this package should be sent. */ +-#undef PACKAGE_BUGREPORT +- +-/* Define to the full name of this package. */ +-#undef PACKAGE_NAME +- +-/* Define to the full name and version of this package. */ +-#undef PACKAGE_STRING +- +-/* Define to the one symbol short name of this package. */ +-#undef PACKAGE_TARNAME +- +-/* Define to the version of this package. */ +-#undef PACKAGE_VERSION +- +-/* Define if you run on EFI platform. */ +-#undef PLATFORM_EFI +- +-/* Define if there is user specified preset menu string */ +-#undef PRESET_MENU_STRING +- +-/* Define to 1 if you have the ANSI C header files. */ +-#undef STDC_HEADERS +- +-/* Version number of package */ +-#undef VERSION +diff --git a/config.sub b/config.sub +deleted file mode 100755 +index 987b17d..0000000 +--- a/config.sub ++++ /dev/null +@@ -1,1566 +0,0 @@ +-#! /bin/sh +-# Configuration validation subroutine script. +-# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +-# 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. +- +-timestamp='2004-11-30' +- +-# This file is (in principle) common to ALL GNU software. +-# The presence of a machine in this file suggests that SOME GNU software +-# can handle that machine. It does not imply ALL GNU software can. +-# +-# This file is free software; you can redistribute it and/or modify +-# it under the terms of the GNU General Public License as published by +-# the Free Software Foundation; either version 2 of the License, or +-# (at your option) any later version. +-# +-# This program is distributed in the hope that it will be useful, +-# but WITHOUT ANY WARRANTY; without even the implied warranty of +-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-# GNU General Public License for more details. +-# +-# You should have received a copy of the GNU General Public License +-# along with this program; if not, write to the Free Software +-# Foundation, Inc., 59 Temple Place - Suite 330, +-# Boston, MA 02111-1307, USA. +- +-# As a special exception to the GNU General Public License, if you +-# distribute this file as part of a program that contains a +-# configuration script generated by Autoconf, you may include it under +-# the same distribution terms that you use for the rest of that program. +- +-# Please send patches to <config-patches@gnu.org>. Submit a context +-# diff and a properly formatted ChangeLog entry. +-# +-# Configuration subroutine to validate and canonicalize a configuration type. +-# Supply the specified configuration type as an argument. +-# If it is invalid, we print an error message on stderr and exit with code 1. +-# Otherwise, we print the canonical config type on stdout and succeed. +- +-# This file is supposed to be the same for all GNU packages +-# and recognize all the CPU types, system types and aliases +-# that are meaningful with *any* GNU software. +-# Each package is responsible for reporting which valid configurations +-# it does not support. The user should be able to distinguish +-# a failure to support a valid configuration from a meaningless +-# configuration. +- +-# The goal of this file is to map all the various variations of a given +-# machine specification into a single specification in the form: +-# CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM +-# or in some cases, the newer four-part form: +-# CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM +-# It is wrong to echo any other type of specification. +- +-me=`echo "$0" | sed -e 's,.*/,,'` +- +-usage="\ +-Usage: $0 [OPTION] CPU-MFR-OPSYS +- $0 [OPTION] ALIAS +- +-Canonicalize a configuration name. +- +-Operation modes: +- -h, --help print this help, then exit +- -t, --time-stamp print date of last modification, then exit +- -v, --version print version number, then exit +- +-Report bugs and patches to <config-patches@gnu.org>." +- +-version="\ +-GNU config.sub ($timestamp) +- +-Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 +-Free Software Foundation, Inc. +- +-This is free software; see the source for copying conditions. There is NO +-warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." +- +-help=" +-Try \`$me --help' for more information." +- +-# Parse command line +-while test $# -gt 0 ; do +- case $1 in +- --time-stamp | --time* | -t ) +- echo "$timestamp" ; exit 0 ;; +- --version | -v ) +- echo "$version" ; exit 0 ;; +- --help | --h* | -h ) +- echo "$usage"; exit 0 ;; +- -- ) # Stop option processing +- shift; break ;; +- - ) # Use stdin as input. +- break ;; +- -* ) +- echo "$me: invalid option $1$help" +- exit 1 ;; +- +- *local*) +- # First pass through any local machine types. +- echo $1 +- exit 0;; +- +- * ) +- break ;; +- esac +-done +- +-case $# in +- 0) echo "$me: missing argument$help" >&2 +- exit 1;; +- 1) ;; +- *) echo "$me: too many arguments$help" >&2 +- exit 1;; +-esac +- +-# Separate what the user gave into CPU-COMPANY and OS or KERNEL-OS (if any). +-# Here we must recognize all the valid KERNEL-OS combinations. +-maybe_os=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\2/'` +-case $maybe_os in +- nto-qnx* | linux-gnu* | linux-dietlibc | linux-uclibc* | uclinux-uclibc* | uclinux-gnu* | \ +- kfreebsd*-gnu* | knetbsd*-gnu* | netbsd*-gnu* | storm-chaos* | os2-emx* | rtmk-nova*) +- os=-$maybe_os +- basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'` +- ;; +- *) +- basic_machine=`echo $1 | sed 's/-[^-]*$//'` +- if [ $basic_machine != $1 ] +- then os=`echo $1 | sed 's/.*-/-/'` +- else os=; fi +- ;; +-esac +- +-### Let's recognize common machines as not being operating systems so +-### that things like config.sub decstation-3100 work. We also +-### recognize some manufacturers as not being operating systems, so we +-### can provide default operating systems below. +-case $os in +- -sun*os*) +- # Prevent following clause from handling this invalid input. +- ;; +- -dec* | -mips* | -sequent* | -encore* | -pc532* | -sgi* | -sony* | \ +- -att* | -7300* | -3300* | -delta* | -motorola* | -sun[234]* | \ +- -unicom* | -ibm* | -next | -hp | -isi* | -apollo | -altos* | \ +- -convergent* | -ncr* | -news | -32* | -3600* | -3100* | -hitachi* |\ +- -c[123]* | -convex* | -sun | -crds | -omron* | -dg | -ultra | -tti* | \ +- -harris | -dolphin | -highlevel | -gould | -cbm | -ns | -masscomp | \ +- -apple | -axis | -knuth | -cray) +- os= +- basic_machine=$1 +- ;; +- -sim | -cisco | -oki | -wec | -winbond) +- os= +- basic_machine=$1 +- ;; +- -scout) +- ;; +- -wrs) +- os=-vxworks +- basic_machine=$1 +- ;; +- -chorusos*) +- os=-chorusos +- basic_machine=$1 +- ;; +- -chorusrdb) +- os=-chorusrdb +- basic_machine=$1 +- ;; +- -hiux*) +- os=-hiuxwe2 +- ;; +- -sco5) +- os=-sco3.2v5 +- basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` +- ;; +- -sco4) +- os=-sco3.2v4 +- basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` +- ;; +- -sco3.2.[4-9]*) +- os=`echo $os | sed -e 's/sco3.2./sco3.2v/'` +- basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` +- ;; +- -sco3.2v[4-9]*) +- # Don't forget version if it is 3.2v4 or newer. +- basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` +- ;; +- -sco*) +- os=-sco3.2v2 +- basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` +- ;; +- -udk*) +- basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` +- ;; +- -isc) +- os=-isc2.2 +- basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` +- ;; +- -clix*) +- basic_machine=clipper-intergraph +- ;; +- -isc*) +- basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` +- ;; +- -lynx*) +- os=-lynxos +- ;; +- -ptx*) +- basic_machine=`echo $1 | sed -e 's/86-.*/86-sequent/'` +- ;; +- -windowsnt*) +- os=`echo $os | sed -e 's/windowsnt/winnt/'` +- ;; +- -psos*) +- os=-psos +- ;; +- -mint | -mint[0-9]*) +- basic_machine=m68k-atari +- os=-mint +- ;; +-esac +- +-# Decode aliases for certain CPU-COMPANY combinations. +-case $basic_machine in +- # Recognize the basic CPU types without company name. +- # Some are omitted here because they have special meanings below. +- 1750a | 580 \ +- | a29k \ +- | alpha | alphaev[4-8] | alphaev56 | alphaev6[78] | alphapca5[67] \ +- | alpha64 | alpha64ev[4-8] | alpha64ev56 | alpha64ev6[78] | alpha64pca5[67] \ +- | am33_2.0 \ +- | arc | arm | arm[bl]e | arme[lb] | armv[2345] | armv[345][lb] | avr \ +- | c4x | clipper \ +- | d10v | d30v | dlx | dsp16xx \ +- | fr30 | frv \ +- | h8300 | h8500 | hppa | hppa1.[01] | hppa2.0 | hppa2.0[nw] | hppa64 \ +- | i370 | i860 | i960 | ia64 \ +- | ip2k | iq2000 \ +- | m32r | m32rle | m68000 | m68k | m88k | maxq | mcore \ +- | mips | mipsbe | mipseb | mipsel | mipsle \ +- | mips16 \ +- | mips64 | mips64el \ +- | mips64vr | mips64vrel \ +- | mips64orion | mips64orionel \ +- | mips64vr4100 | mips64vr4100el \ +- | mips64vr4300 | mips64vr4300el \ +- | mips64vr5000 | mips64vr5000el \ +- | mipsisa32 | mipsisa32el \ +- | mipsisa32r2 | mipsisa32r2el \ +- | mipsisa64 | mipsisa64el \ +- | mipsisa64r2 | mipsisa64r2el \ +- | mipsisa64sb1 | mipsisa64sb1el \ +- | mipsisa64sr71k | mipsisa64sr71kel \ +- | mipstx39 | mipstx39el \ +- | mn10200 | mn10300 \ +- | msp430 \ +- | ns16k | ns32k \ +- | openrisc | or32 \ +- | pdp10 | pdp11 | pj | pjl \ +- | powerpc | powerpc64 | powerpc64le | powerpcle | ppcbe \ +- | pyramid \ +- | sh | sh[1234] | sh[23]e | sh[34]eb | shbe | shle | sh[1234]le | sh3ele \ +- | sh64 | sh64le \ +- | sparc | sparc64 | sparc86x | sparclet | sparclite | sparcv8 | sparcv9 | sparcv9b \ +- | strongarm \ +- | tahoe | thumb | tic4x | tic80 | tron \ +- | v850 | v850e \ +- | we32k \ +- | x86 | xscale | xscalee[bl] | xstormy16 | xtensa \ +- | z8k) +- basic_machine=$basic_machine-unknown +- ;; +- m6811 | m68hc11 | m6812 | m68hc12) +- # Motorola 68HC11/12. +- basic_machine=$basic_machine-unknown +- os=-none +- ;; +- m88110 | m680[12346]0 | m683?2 | m68360 | m5200 | v70 | w65 | z8k) +- ;; +- +- # We use `pc' rather than `unknown' +- # because (1) that's what they normally are, and +- # (2) the word "unknown" tends to confuse beginning users. +- i*86 | x86_64) +- basic_machine=$basic_machine-pc +- ;; +- # Object if more than one company name word. +- *-*-*) +- echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2 +- exit 1 +- ;; +- # Recognize the basic CPU types with company name. +- 580-* \ +- | a29k-* \ +- | alpha-* | alphaev[4-8]-* | alphaev56-* | alphaev6[78]-* \ +- | alpha64-* | alpha64ev[4-8]-* | alpha64ev56-* | alpha64ev6[78]-* \ +- | alphapca5[67]-* | alpha64pca5[67]-* | arc-* \ +- | arm-* | armbe-* | armle-* | armeb-* | armv*-* \ +- | avr-* \ +- | bs2000-* \ +- | c[123]* | c30-* | [cjt]90-* | c4x-* | c54x-* | c55x-* | c6x-* \ +- | clipper-* | craynv-* | cydra-* \ +- | d10v-* | d30v-* | dlx-* \ +- | elxsi-* \ +- | f30[01]-* | f700-* | fr30-* | frv-* | fx80-* \ +- | h8300-* | h8500-* \ +- | hppa-* | hppa1.[01]-* | hppa2.0-* | hppa2.0[nw]-* | hppa64-* \ +- | i*86-* | i860-* | i960-* | ia64-* \ +- | ip2k-* | iq2000-* \ +- | m32r-* | m32rle-* \ +- | m68000-* | m680[012346]0-* | m68360-* | m683?2-* | m68k-* \ +- | m88110-* | m88k-* | maxq-* | mcore-* \ +- | mips-* | mipsbe-* | mipseb-* | mipsel-* | mipsle-* \ +- | mips16-* \ +- | mips64-* | mips64el-* \ +- | mips64vr-* | mips64vrel-* \ +- | mips64orion-* | mips64orionel-* \ +- | mips64vr4100-* | mips64vr4100el-* \ +- | mips64vr4300-* | mips64vr4300el-* \ +- | mips64vr5000-* | mips64vr5000el-* \ +- | mipsisa32-* | mipsisa32el-* \ +- | mipsisa32r2-* | mipsisa32r2el-* \ +- | mipsisa64-* | mipsisa64el-* \ +- | mipsisa64r2-* | mipsisa64r2el-* \ +- | mipsisa64sb1-* | mipsisa64sb1el-* \ +- | mipsisa64sr71k-* | mipsisa64sr71kel-* \ +- | mipstx39-* | mipstx39el-* \ +- | mmix-* \ +- | msp430-* \ +- | none-* | np1-* | ns16k-* | ns32k-* \ +- | orion-* \ +- | pdp10-* | pdp11-* | pj-* | pjl-* | pn-* | power-* \ +- | powerpc-* | powerpc64-* | powerpc64le-* | powerpcle-* | ppcbe-* \ +- | pyramid-* \ +- | romp-* | rs6000-* \ +- | sh-* | sh[1234]-* | sh[23]e-* | sh[34]eb-* | shbe-* \ +- | shle-* | sh[1234]le-* | sh3ele-* | sh64-* | sh64le-* \ +- | sparc-* | sparc64-* | sparc86x-* | sparclet-* | sparclite-* \ +- | sparcv8-* | sparcv9-* | sparcv9b-* | strongarm-* | sv1-* | sx?-* \ +- | tahoe-* | thumb-* \ +- | tic30-* | tic4x-* | tic54x-* | tic55x-* | tic6x-* | tic80-* \ +- | tron-* \ +- | v850-* | v850e-* | vax-* \ +- | we32k-* \ +- | x86-* | x86_64-* | xps100-* | xscale-* | xscalee[bl]-* \ +- | xstormy16-* | xtensa-* \ +- | ymp-* \ +- | z8k-*) +- ;; +- # Recognize the various machine names and aliases which stand +- # for a CPU type and a company and sometimes even an OS. +- 386bsd) +- basic_machine=i386-unknown +- os=-bsd +- ;; +- 3b1 | 7300 | 7300-att | att-7300 | pc7300 | safari | unixpc) +- basic_machine=m68000-att +- ;; +- 3b*) +- basic_machine=we32k-att +- ;; +- a29khif) +- basic_machine=a29k-amd +- os=-udi +- ;; +- abacus) +- basic_machine=abacus-unknown +- ;; +- adobe68k) +- basic_machine=m68010-adobe +- os=-scout +- ;; +- alliant | fx80) +- basic_machine=fx80-alliant +- ;; +- altos | altos3068) +- basic_machine=m68k-altos +- ;; +- am29k) +- basic_machine=a29k-none +- os=-bsd +- ;; +- amd64) +- basic_machine=x86_64-pc +- ;; +- amd64-*) +- basic_machine=x86_64-`echo $basic_machine | sed 's/^[^-]*-//'` +- ;; +- amdahl) +- basic_machine=580-amdahl +- os=-sysv +- ;; +- amiga | amiga-*) +- basic_machine=m68k-unknown +- ;; +- amigaos | amigados) +- basic_machine=m68k-unknown +- os=-amigaos +- ;; +- amigaunix | amix) +- basic_machine=m68k-unknown +- os=-sysv4 +- ;; +- apollo68) +- basic_machine=m68k-apollo +- os=-sysv +- ;; +- apollo68bsd) +- basic_machine=m68k-apollo +- os=-bsd +- ;; +- aux) +- basic_machine=m68k-apple +- os=-aux +- ;; +- balance) +- basic_machine=ns32k-sequent +- os=-dynix +- ;; +- c90) +- basic_machine=c90-cray +- os=-unicos +- ;; +- convex-c1) +- basic_machine=c1-convex +- os=-bsd +- ;; +- convex-c2) +- basic_machine=c2-convex +- os=-bsd +- ;; +- convex-c32) +- basic_machine=c32-convex +- os=-bsd +- ;; +- convex-c34) +- basic_machine=c34-convex +- os=-bsd +- ;; +- convex-c38) +- basic_machine=c38-convex +- os=-bsd +- ;; +- cray | j90) +- basic_machine=j90-cray +- os=-unicos +- ;; +- craynv) +- basic_machine=craynv-cray +- os=-unicosmp +- ;; +- cr16c) +- basic_machine=cr16c-unknown +- os=-elf +- ;; +- crds | unos) +- basic_machine=m68k-crds +- ;; +- crisv32 | crisv32-* | etraxfs*) +- basic_machine=crisv32-axis +- ;; +- cris | cris-* | etrax*) +- basic_machine=cris-axis +- ;; +- crx) +- basic_machine=crx-unknown +- os=-elf +- ;; +- da30 | da30-*) +- basic_machine=m68k-da30 +- ;; +- decstation | decstation-3100 | pmax | pmax-* | pmin | dec3100 | decstatn) +- basic_machine=mips-dec +- ;; +- decsystem10* | dec10*) +- basic_machine=pdp10-dec +- os=-tops10 +- ;; +- decsystem20* | dec20*) +- basic_machine=pdp10-dec +- os=-tops20 +- ;; +- delta | 3300 | motorola-3300 | motorola-delta \ +- | 3300-motorola | delta-motorola) +- basic_machine=m68k-motorola +- ;; +- delta88) +- basic_machine=m88k-motorola +- os=-sysv3 +- ;; +- djgpp) +- basic_machine=i586-pc +- os=-msdosdjgpp +- ;; +- dpx20 | dpx20-*) +- basic_machine=rs6000-bull +- os=-bosx +- ;; +- dpx2* | dpx2*-bull) +- basic_machine=m68k-bull +- os=-sysv3 +- ;; +- ebmon29k) +- basic_machine=a29k-amd +- os=-ebmon +- ;; +- elxsi) +- basic_machine=elxsi-elxsi +- os=-bsd +- ;; +- encore | umax | mmax) +- basic_machine=ns32k-encore +- ;; +- es1800 | OSE68k | ose68k | ose | OSE) +- basic_machine=m68k-ericsson +- os=-ose +- ;; +- fx2800) +- basic_machine=i860-alliant +- ;; +- genix) +- basic_machine=ns32k-ns +- ;; +- gmicro) +- basic_machine=tron-gmicro +- os=-sysv +- ;; +- go32) +- basic_machine=i386-pc +- os=-go32 +- ;; +- h3050r* | hiux*) +- basic_machine=hppa1.1-hitachi +- os=-hiuxwe2 +- ;; +- h8300hms) +- basic_machine=h8300-hitachi +- os=-hms +- ;; +- h8300xray) +- basic_machine=h8300-hitachi +- os=-xray +- ;; +- h8500hms) +- basic_machine=h8500-hitachi +- os=-hms +- ;; +- harris) +- basic_machine=m88k-harris +- os=-sysv3 +- ;; +- hp300-*) +- basic_machine=m68k-hp +- ;; +- hp300bsd) +- basic_machine=m68k-hp +- os=-bsd +- ;; +- hp300hpux) +- basic_machine=m68k-hp +- os=-hpux +- ;; +- hp3k9[0-9][0-9] | hp9[0-9][0-9]) +- basic_machine=hppa1.0-hp +- ;; +- hp9k2[0-9][0-9] | hp9k31[0-9]) +- basic_machine=m68000-hp +- ;; +- hp9k3[2-9][0-9]) +- basic_machine=m68k-hp +- ;; +- hp9k6[0-9][0-9] | hp6[0-9][0-9]) +- basic_machine=hppa1.0-hp +- ;; +- hp9k7[0-79][0-9] | hp7[0-79][0-9]) +- basic_machine=hppa1.1-hp +- ;; +- hp9k78[0-9] | hp78[0-9]) +- # FIXME: really hppa2.0-hp +- basic_machine=hppa1.1-hp +- ;; +- hp9k8[67]1 | hp8[67]1 | hp9k80[24] | hp80[24] | hp9k8[78]9 | hp8[78]9 | hp9k893 | hp893) +- # FIXME: really hppa2.0-hp +- basic_machine=hppa1.1-hp +- ;; +- hp9k8[0-9][13679] | hp8[0-9][13679]) +- basic_machine=hppa1.1-hp +- ;; +- hp9k8[0-9][0-9] | hp8[0-9][0-9]) +- basic_machine=hppa1.0-hp +- ;; +- hppa-next) +- os=-nextstep3 +- ;; +- hppaosf) +- basic_machine=hppa1.1-hp +- os=-osf +- ;; +- hppro) +- basic_machine=hppa1.1-hp +- os=-proelf +- ;; +- i370-ibm* | ibm*) +- basic_machine=i370-ibm +- ;; +-# I'm not sure what "Sysv32" means. Should this be sysv3.2? +- i*86v32) +- basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` +- os=-sysv32 +- ;; +- i*86v4*) +- basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` +- os=-sysv4 +- ;; +- i*86v) +- basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` +- os=-sysv +- ;; +- i*86sol2) +- basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` +- os=-solaris2 +- ;; +- i386mach) +- basic_machine=i386-mach +- os=-mach +- ;; +- i386-vsta | vsta) +- basic_machine=i386-unknown +- os=-vsta +- ;; +- iris | iris4d) +- basic_machine=mips-sgi +- case $os in +- -irix*) +- ;; +- *) +- os=-irix4 +- ;; +- esac +- ;; +- isi68 | isi) +- basic_machine=m68k-isi +- os=-sysv +- ;; +- m88k-omron*) +- basic_machine=m88k-omron +- ;; +- magnum | m3230) +- basic_machine=mips-mips +- os=-sysv +- ;; +- merlin) +- basic_machine=ns32k-utek +- os=-sysv +- ;; +- mingw32) +- basic_machine=i386-pc +- os=-mingw32 +- ;; +- miniframe) +- basic_machine=m68000-convergent +- ;; +- *mint | -mint[0-9]* | *MiNT | *MiNT[0-9]*) +- basic_machine=m68k-atari +- os=-mint +- ;; +- mips3*-*) +- basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'` +- ;; +- mips3*) +- basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`-unknown +- ;; +- monitor) +- basic_machine=m68k-rom68k +- os=-coff +- ;; +- morphos) +- basic_machine=powerpc-unknown +- os=-morphos +- ;; +- msdos) +- basic_machine=i386-pc +- os=-msdos +- ;; +- mvs) +- basic_machine=i370-ibm +- os=-mvs +- ;; +- ncr3000) +- basic_machine=i486-ncr +- os=-sysv4 +- ;; +- netbsd386) +- basic_machine=i386-unknown +- os=-netbsd +- ;; +- netwinder) +- basic_machine=armv4l-rebel +- os=-linux +- ;; +- news | news700 | news800 | news900) +- basic_machine=m68k-sony +- os=-newsos +- ;; +- news1000) +- basic_machine=m68030-sony +- os=-newsos +- ;; +- news-3600 | risc-news) +- basic_machine=mips-sony +- os=-newsos +- ;; +- necv70) +- basic_machine=v70-nec +- os=-sysv +- ;; +- next | m*-next ) +- basic_machine=m68k-next +- case $os in +- -nextstep* ) +- ;; +- -ns2*) +- os=-nextstep2 +- ;; +- *) +- os=-nextstep3 +- ;; +- esac +- ;; +- nh3000) +- basic_machine=m68k-harris +- os=-cxux +- ;; +- nh[45]000) +- basic_machine=m88k-harris +- os=-cxux +- ;; +- nindy960) +- basic_machine=i960-intel +- os=-nindy +- ;; +- mon960) +- basic_machine=i960-intel +- os=-mon960 +- ;; +- nonstopux) +- basic_machine=mips-compaq +- os=-nonstopux +- ;; +- np1) +- basic_machine=np1-gould +- ;; +- nsr-tandem) +- basic_machine=nsr-tandem +- ;; +- op50n-* | op60c-*) +- basic_machine=hppa1.1-oki +- os=-proelf +- ;; +- or32 | or32-*) +- basic_machine=or32-unknown +- os=-coff +- ;; +- os400) +- basic_machine=powerpc-ibm +- os=-os400 +- ;; +- OSE68000 | ose68000) +- basic_machine=m68000-ericsson +- os=-ose +- ;; +- os68k) +- basic_machine=m68k-none +- os=-os68k +- ;; +- pa-hitachi) +- basic_machine=hppa1.1-hitachi +- os=-hiuxwe2 +- ;; +- paragon) +- basic_machine=i860-intel +- os=-osf +- ;; +- pbd) +- basic_machine=sparc-tti +- ;; +- pbb) +- basic_machine=m68k-tti +- ;; +- pc532 | pc532-*) +- basic_machine=ns32k-pc532 +- ;; +- pentium | p5 | k5 | k6 | nexgen | viac3) +- basic_machine=i586-pc +- ;; +- pentiumpro | p6 | 6x86 | athlon | athlon_*) +- basic_machine=i686-pc +- ;; +- pentiumii | pentium2 | pentiumiii | pentium3) +- basic_machine=i686-pc +- ;; +- pentium4) +- basic_machine=i786-pc +- ;; +- pentium-* | p5-* | k5-* | k6-* | nexgen-* | viac3-*) +- basic_machine=i586-`echo $basic_machine | sed 's/^[^-]*-//'` +- ;; +- pentiumpro-* | p6-* | 6x86-* | athlon-*) +- basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'` +- ;; +- pentiumii-* | pentium2-* | pentiumiii-* | pentium3-*) +- basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'` +- ;; +- pentium4-*) +- basic_machine=i786-`echo $basic_machine | sed 's/^[^-]*-//'` +- ;; +- pn) +- basic_machine=pn-gould +- ;; +- power) basic_machine=power-ibm +- ;; +- ppc) basic_machine=powerpc-unknown +- ;; +- ppc-*) basic_machine=powerpc-`echo $basic_machine | sed 's/^[^-]*-//'` +- ;; +- ppcle | powerpclittle | ppc-le | powerpc-little) +- basic_machine=powerpcle-unknown +- ;; +- ppcle-* | powerpclittle-*) +- basic_machine=powerpcle-`echo $basic_machine | sed 's/^[^-]*-//'` +- ;; +- ppc64) basic_machine=powerpc64-unknown +- ;; +- ppc64-*) basic_machine=powerpc64-`echo $basic_machine | sed 's/^[^-]*-//'` +- ;; +- ppc64le | powerpc64little | ppc64-le | powerpc64-little) +- basic_machine=powerpc64le-unknown +- ;; +- ppc64le-* | powerpc64little-*) +- basic_machine=powerpc64le-`echo $basic_machine | sed 's/^[^-]*-//'` +- ;; +- ps2) +- basic_machine=i386-ibm +- ;; +- pw32) +- basic_machine=i586-unknown +- os=-pw32 +- ;; +- rom68k) +- basic_machine=m68k-rom68k +- os=-coff +- ;; +- rm[46]00) +- basic_machine=mips-siemens +- ;; +- rtpc | rtpc-*) +- basic_machine=romp-ibm +- ;; +- s390 | s390-*) +- basic_machine=s390-ibm +- ;; +- s390x | s390x-*) +- basic_machine=s390x-ibm +- ;; +- sa29200) +- basic_machine=a29k-amd +- os=-udi +- ;; +- sb1) +- basic_machine=mipsisa64sb1-unknown +- ;; +- sb1el) +- basic_machine=mipsisa64sb1el-unknown +- ;; +- sei) +- basic_machine=mips-sei +- os=-seiux +- ;; +- sequent) +- basic_machine=i386-sequent +- ;; +- sh) +- basic_machine=sh-hitachi +- os=-hms +- ;; +- sh64) +- basic_machine=sh64-unknown +- ;; +- sparclite-wrs | simso-wrs) +- basic_machine=sparclite-wrs +- os=-vxworks +- ;; +- sps7) +- basic_machine=m68k-bull +- os=-sysv2 +- ;; +- spur) +- basic_machine=spur-unknown +- ;; +- st2000) +- basic_machine=m68k-tandem +- ;; +- stratus) +- basic_machine=i860-stratus +- os=-sysv4 +- ;; +- sun2) +- basic_machine=m68000-sun +- ;; +- sun2os3) +- basic_machine=m68000-sun +- os=-sunos3 +- ;; +- sun2os4) +- basic_machine=m68000-sun +- os=-sunos4 +- ;; +- sun3os3) +- basic_machine=m68k-sun +- os=-sunos3 +- ;; +- sun3os4) +- basic_machine=m68k-sun +- os=-sunos4 +- ;; +- sun4os3) +- basic_machine=sparc-sun +- os=-sunos3 +- ;; +- sun4os4) +- basic_machine=sparc-sun +- os=-sunos4 +- ;; +- sun4sol2) +- basic_machine=sparc-sun +- os=-solaris2 +- ;; +- sun3 | sun3-*) +- basic_machine=m68k-sun +- ;; +- sun4) +- basic_machine=sparc-sun +- ;; +- sun386 | sun386i | roadrunner) +- basic_machine=i386-sun +- ;; +- sv1) +- basic_machine=sv1-cray +- os=-unicos +- ;; +- symmetry) +- basic_machine=i386-sequent +- os=-dynix +- ;; +- t3e) +- basic_machine=alphaev5-cray +- os=-unicos +- ;; +- t90) +- basic_machine=t90-cray +- os=-unicos +- ;; +- tic54x | c54x*) +- basic_machine=tic54x-unknown +- os=-coff +- ;; +- tic55x | c55x*) +- basic_machine=tic55x-unknown +- os=-coff +- ;; +- tic6x | c6x*) +- basic_machine=tic6x-unknown +- os=-coff +- ;; +- tx39) +- basic_machine=mipstx39-unknown +- ;; +- tx39el) +- basic_machine=mipstx39el-unknown +- ;; +- toad1) +- basic_machine=pdp10-xkl +- os=-tops20 +- ;; +- tower | tower-32) +- basic_machine=m68k-ncr +- ;; +- tpf) +- basic_machine=s390x-ibm +- os=-tpf +- ;; +- udi29k) +- basic_machine=a29k-amd +- os=-udi +- ;; +- ultra3) +- basic_machine=a29k-nyu +- os=-sym1 +- ;; +- v810 | necv810) +- basic_machine=v810-nec +- os=-none +- ;; +- vaxv) +- basic_machine=vax-dec +- os=-sysv +- ;; +- vms) +- basic_machine=vax-dec +- os=-vms +- ;; +- vpp*|vx|vx-*) +- basic_machine=f301-fujitsu +- ;; +- vxworks960) +- basic_machine=i960-wrs +- os=-vxworks +- ;; +- vxworks68) +- basic_machine=m68k-wrs +- os=-vxworks +- ;; +- vxworks29k) +- basic_machine=a29k-wrs +- os=-vxworks +- ;; +- w65*) +- basic_machine=w65-wdc +- os=-none +- ;; +- w89k-*) +- basic_machine=hppa1.1-winbond +- os=-proelf +- ;; +- xbox) +- basic_machine=i686-pc +- os=-mingw32 +- ;; +- xps | xps100) +- basic_machine=xps100-honeywell +- ;; +- ymp) +- basic_machine=ymp-cray +- os=-unicos +- ;; +- z8k-*-coff) +- basic_machine=z8k-unknown +- os=-sim +- ;; +- none) +- basic_machine=none-none +- os=-none +- ;; +- +-# Here we handle the default manufacturer of certain CPU types. It is in +-# some cases the only manufacturer, in others, it is the most popular. +- w89k) +- basic_machine=hppa1.1-winbond +- ;; +- op50n) +- basic_machine=hppa1.1-oki +- ;; +- op60c) +- basic_machine=hppa1.1-oki +- ;; +- romp) +- basic_machine=romp-ibm +- ;; +- mmix) +- basic_machine=mmix-knuth +- ;; +- rs6000) +- basic_machine=rs6000-ibm +- ;; +- vax) +- basic_machine=vax-dec +- ;; +- pdp10) +- # there are many clones, so DEC is not a safe bet +- basic_machine=pdp10-unknown +- ;; +- pdp11) +- basic_machine=pdp11-dec +- ;; +- we32k) +- basic_machine=we32k-att +- ;; +- sh3 | sh4 | sh[34]eb | sh[1234]le | sh[23]ele) +- basic_machine=sh-unknown +- ;; +- sh64) +- basic_machine=sh64-unknown +- ;; +- sparc | sparcv8 | sparcv9 | sparcv9b) +- basic_machine=sparc-sun +- ;; +- cydra) +- basic_machine=cydra-cydrome +- ;; +- orion) +- basic_machine=orion-highlevel +- ;; +- orion105) +- basic_machine=clipper-highlevel +- ;; +- mac | mpw | mac-mpw) +- basic_machine=m68k-apple +- ;; +- pmac | pmac-mpw) +- basic_machine=powerpc-apple +- ;; +- *-unknown) +- # Make sure to match an already-canonicalized machine name. +- ;; +- *) +- echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2 +- exit 1 +- ;; +-esac +- +-# Here we canonicalize certain aliases for manufacturers. +-case $basic_machine in +- *-digital*) +- basic_machine=`echo $basic_machine | sed 's/digital.*/dec/'` +- ;; +- *-commodore*) +- basic_machine=`echo $basic_machine | sed 's/commodore.*/cbm/'` +- ;; +- *) +- ;; +-esac +- +-# Decode manufacturer-specific aliases for certain operating systems. +- +-if [ x"$os" != x"" ] +-then +-case $os in +- # First match some system type aliases +- # that might get confused with valid system types. +- # -solaris* is a basic system type, with this one exception. +- -solaris1 | -solaris1.*) +- os=`echo $os | sed -e 's|solaris1|sunos4|'` +- ;; +- -solaris) +- os=-solaris2 +- ;; +- -svr4*) +- os=-sysv4 +- ;; +- -unixware*) +- os=-sysv4.2uw +- ;; +- -gnu/linux*) +- os=`echo $os | sed -e 's|gnu/linux|linux-gnu|'` +- ;; +- # First accept the basic system types. +- # The portable systems comes first. +- # Each alternative MUST END IN A *, to match a version number. +- # -sysv* is not here because it comes later, after sysvr4. +- -gnu* | -bsd* | -mach* | -minix* | -genix* | -ultrix* | -irix* \ +- | -*vms* | -sco* | -esix* | -isc* | -aix* | -sunos | -sunos[34]*\ +- | -hpux* | -unos* | -osf* | -luna* | -dgux* | -solaris* | -sym* \ +- | -amigaos* | -amigados* | -msdos* | -newsos* | -unicos* | -aof* \ +- | -aos* \ +- | -nindy* | -vxsim* | -vxworks* | -ebmon* | -hms* | -mvs* \ +- | -clix* | -riscos* | -uniplus* | -iris* | -rtu* | -xenix* \ +- | -hiux* | -386bsd* | -knetbsd* | -mirbsd* | -netbsd* | -openbsd* \ +- | -ekkobsd* | -kfreebsd* | -freebsd* | -riscix* | -lynxos* \ +- | -bosx* | -nextstep* | -cxux* | -aout* | -elf* | -oabi* \ +- | -ptx* | -coff* | -ecoff* | -winnt* | -domain* | -vsta* \ +- | -udi* | -eabi* | -lites* | -ieee* | -go32* | -aux* \ +- | -chorusos* | -chorusrdb* \ +- | -cygwin* | -pe* | -psos* | -moss* | -proelf* | -rtems* \ +- | -mingw32* | -linux-gnu* | -linux-uclibc* | -uxpv* | -beos* | -mpeix* | -udk* \ +- | -interix* | -uwin* | -mks* | -rhapsody* | -darwin* | -opened* \ +- | -openstep* | -oskit* | -conix* | -pw32* | -nonstopux* \ +- | -storm-chaos* | -tops10* | -tenex* | -tops20* | -its* \ +- | -os2* | -vos* | -palmos* | -uclinux* | -nucleus* \ +- | -morphos* | -superux* | -rtmk* | -rtmk-nova* | -windiss* \ +- | -powermax* | -dnix* | -nx6 | -nx7 | -sei* | -dragonfly*) +- # Remember, each alternative MUST END IN *, to match a version number. +- ;; +- -qnx*) +- case $basic_machine in +- x86-* | i*86-*) +- ;; +- *) +- os=-nto$os +- ;; +- esac +- ;; +- -nto-qnx*) +- ;; +- -nto*) +- os=`echo $os | sed -e 's|nto|nto-qnx|'` +- ;; +- -sim | -es1800* | -hms* | -xray | -os68k* | -none* | -v88r* \ +- | -windows* | -osx | -abug | -netware* | -os9* | -beos* \ +- | -macos* | -mpw* | -magic* | -mmixware* | -mon960* | -lnews*) +- ;; +- -mac*) +- os=`echo $os | sed -e 's|mac|macos|'` +- ;; +- -linux-dietlibc) +- os=-linux-dietlibc +- ;; +- -linux*) +- os=`echo $os | sed -e 's|linux|linux-gnu|'` +- ;; +- -sunos5*) +- os=`echo $os | sed -e 's|sunos5|solaris2|'` +- ;; +- -sunos6*) +- os=`echo $os | sed -e 's|sunos6|solaris3|'` +- ;; +- -opened*) +- os=-openedition +- ;; +- -os400*) +- os=-os400 +- ;; +- -wince*) +- os=-wince +- ;; +- -osfrose*) +- os=-osfrose +- ;; +- -osf*) +- os=-osf +- ;; +- -utek*) +- os=-bsd +- ;; +- -dynix*) +- os=-bsd +- ;; +- -acis*) +- os=-aos +- ;; +- -atheos*) +- os=-atheos +- ;; +- -syllable*) +- os=-syllable +- ;; +- -386bsd) +- os=-bsd +- ;; +- -ctix* | -uts*) +- os=-sysv +- ;; +- -nova*) +- os=-rtmk-nova +- ;; +- -ns2 ) +- os=-nextstep2 +- ;; +- -nsk*) +- os=-nsk +- ;; +- # Preserve the version number of sinix5. +- -sinix5.*) +- os=`echo $os | sed -e 's|sinix|sysv|'` +- ;; +- -sinix*) +- os=-sysv4 +- ;; +- -tpf*) +- os=-tpf +- ;; +- -triton*) +- os=-sysv3 +- ;; +- -oss*) +- os=-sysv3 +- ;; +- -svr4) +- os=-sysv4 +- ;; +- -svr3) +- os=-sysv3 +- ;; +- -sysvr4) +- os=-sysv4 +- ;; +- # This must come after -sysvr4. +- -sysv*) +- ;; +- -ose*) +- os=-ose +- ;; +- -es1800*) +- os=-ose +- ;; +- -xenix) +- os=-xenix +- ;; +- -*mint | -mint[0-9]* | -*MiNT | -MiNT[0-9]*) +- os=-mint +- ;; +- -aros*) +- os=-aros +- ;; +- -kaos*) +- os=-kaos +- ;; +- -zvmoe) +- os=-zvmoe +- ;; +- -none) +- ;; +- *) +- # Get rid of the `-' at the beginning of $os. +- os=`echo $os | sed 's/[^-]*-//'` +- echo Invalid configuration \`$1\': system \`$os\' not recognized 1>&2 +- exit 1 +- ;; +-esac +-else +- +-# Here we handle the default operating systems that come with various machines. +-# The value should be what the vendor currently ships out the door with their +-# machine or put another way, the most popular os provided with the machine. +- +-# Note that if you're going to try to match "-MANUFACTURER" here (say, +-# "-sun"), then you have to tell the case statement up towards the top +-# that MANUFACTURER isn't an operating system. Otherwise, code above +-# will signal an error saying that MANUFACTURER isn't an operating +-# system, and we'll never get to this point. +- +-case $basic_machine in +- *-acorn) +- os=-riscix1.2 +- ;; +- arm*-rebel) +- os=-linux +- ;; +- arm*-semi) +- os=-aout +- ;; +- c4x-* | tic4x-*) +- os=-coff +- ;; +- # This must come before the *-dec entry. +- pdp10-*) +- os=-tops20 +- ;; +- pdp11-*) +- os=-none +- ;; +- *-dec | vax-*) +- os=-ultrix4.2 +- ;; +- m68*-apollo) +- os=-domain +- ;; +- i386-sun) +- os=-sunos4.0.2 +- ;; +- m68000-sun) +- os=-sunos3 +- # This also exists in the configure program, but was not the +- # default. +- # os=-sunos4 +- ;; +- m68*-cisco) +- os=-aout +- ;; +- mips*-cisco) +- os=-elf +- ;; +- mips*-*) +- os=-elf +- ;; +- or32-*) +- os=-coff +- ;; +- *-tti) # must be before sparc entry or we get the wrong os. +- os=-sysv3 +- ;; +- sparc-* | *-sun) +- os=-sunos4.1.1 +- ;; +- *-be) +- os=-beos +- ;; +- *-ibm) +- os=-aix +- ;; +- *-knuth) +- os=-mmixware +- ;; +- *-wec) +- os=-proelf +- ;; +- *-winbond) +- os=-proelf +- ;; +- *-oki) +- os=-proelf +- ;; +- *-hp) +- os=-hpux +- ;; +- *-hitachi) +- os=-hiux +- ;; +- i860-* | *-att | *-ncr | *-altos | *-motorola | *-convergent) +- os=-sysv +- ;; +- *-cbm) +- os=-amigaos +- ;; +- *-dg) +- os=-dgux +- ;; +- *-dolphin) +- os=-sysv3 +- ;; +- m68k-ccur) +- os=-rtu +- ;; +- m88k-omron*) +- os=-luna +- ;; +- *-next ) +- os=-nextstep +- ;; +- *-sequent) +- os=-ptx +- ;; +- *-crds) +- os=-unos +- ;; +- *-ns) +- os=-genix +- ;; +- i370-*) +- os=-mvs +- ;; +- *-next) +- os=-nextstep3 +- ;; +- *-gould) +- os=-sysv +- ;; +- *-highlevel) +- os=-bsd +- ;; +- *-encore) +- os=-bsd +- ;; +- *-sgi) +- os=-irix +- ;; +- *-siemens) +- os=-sysv4 +- ;; +- *-masscomp) +- os=-rtu +- ;; +- f30[01]-fujitsu | f700-fujitsu) +- os=-uxpv +- ;; +- *-rom68k) +- os=-coff +- ;; +- *-*bug) +- os=-coff +- ;; +- *-apple) +- os=-macos +- ;; +- *-atari*) +- os=-mint +- ;; +- *) +- os=-none +- ;; +-esac +-fi +- +-# Here we handle the case where we know the os, and the CPU type, but not the +-# manufacturer. We pick the logical manufacturer. +-vendor=unknown +-case $basic_machine in +- *-unknown) +- case $os in +- -riscix*) +- vendor=acorn +- ;; +- -sunos*) +- vendor=sun +- ;; +- -aix*) +- vendor=ibm +- ;; +- -beos*) +- vendor=be +- ;; +- -hpux*) +- vendor=hp +- ;; +- -mpeix*) +- vendor=hp +- ;; +- -hiux*) +- vendor=hitachi +- ;; +- -unos*) +- vendor=crds +- ;; +- -dgux*) +- vendor=dg +- ;; +- -luna*) +- vendor=omron +- ;; +- -genix*) +- vendor=ns +- ;; +- -mvs* | -opened*) +- vendor=ibm +- ;; +- -os400*) +- vendor=ibm +- ;; +- -ptx*) +- vendor=sequent +- ;; +- -tpf*) +- vendor=ibm +- ;; +- -vxsim* | -vxworks* | -windiss*) +- vendor=wrs +- ;; +- -aux*) +- vendor=apple +- ;; +- -hms*) +- vendor=hitachi +- ;; +- -mpw* | -macos*) +- vendor=apple +- ;; +- -*mint | -mint[0-9]* | -*MiNT | -MiNT[0-9]*) +- vendor=atari +- ;; +- -vos*) +- vendor=stratus +- ;; +- esac +- basic_machine=`echo $basic_machine | sed "s/unknown/$vendor/"` +- ;; +-esac +- +-echo $basic_machine$os +-exit 0 +- +-# Local variables: +-# eval: (add-hook 'write-file-hooks 'time-stamp) +-# time-stamp-start: "timestamp='" +-# time-stamp-format: "%:y-%02m-%02d" +-# time-stamp-end: "'" +-# End: +diff --git a/configure-clanton.sh b/configure-clanton.sh +new file mode 100755 +index 0000000..0a754fb +--- /dev/null ++++ b/configure-clanton.sh +@@ -0,0 +1,26 @@ ++#!/bin/sh ++ ++die() ++{ ++ printf 'Fatal: ' ++ printf "$@" ++ exit 1 ++} ++ ++# Points to the directory where "crt0-efi-ia32.o" is (e.g., /usr/lib32) ++# Can be overriden on the command line: GNUEFI_LIBDIR=/usr/lib32 ./configure ... ++: ${GNUEFI_LIBDIR:=/p/clanton/users/software/clanton-target-libs/installroot/usr/local/lib} ++ ++[ -d "${GNUEFI_LIBDIR}" ] || die 'GNUEFI_LIBDIR=%s not found\n' "${GNUEFI_LIBDIR}" ++ ++ ++# Yocto's environment-setup-i586-poky-linux-uclibc defines a CC looking like this: ++# export CC='gcc -m32 -march=i586' ++$CC --version || die 'CC undefined or not pointing to a compiler\n' ++ ++ ++# Append to generic CFLAGS from environment-setup-i586-poky-linux-uclibc ++# Just like the GRUB.bb recipe does ++export CFLAGS="$CFLAGS -Os -fno-strict-aliasing -Wall -Werror -Wno-shadow -Wno-unused -Wno-pointer-sign -DGRUB_CLN_DEBUG=1 -DINTEL_CLN_TEST=1" ++ ++./configure --host=i586-poky-linux-uclibc --without-curses --disable-auto-linux-mem-opt --with-platform=efi --libdir="${GNUEFI_LIBDIR}" +diff --git a/configure.in b/configure.in +index e9745e6..9fdd3a3 100644 +--- a/configure.in ++++ b/configure.in +@@ -63,7 +63,7 @@ if test "x$platform" = xefi; then + AC_SUBST(EFI_ARCH) + fi + +-gnuefi_path=${libdir}/gnuefi ++gnuefi_path=${libdir} + gnuefi_crt0=${gnuefi_path}/crt0-efi-${EFI_ARCH}.o + if ! test -f $gnuefi_crt0 ; then + gnuefi_crt0=crt0-efi.o +@@ -177,7 +177,7 @@ if test "x$ac_cv_prog_gcc" = xyes; then + fi + STAGE2_CFLAGS="$STAGE2_CFLAGS -isystem `$CC -print-file-name=include`" + +-LIBGCC=$(gcc $CFLAGS -static-libgcc -print-libgcc-file-name) ++LIBGCC=$($CC $CFLAGS -static-libgcc -print-libgcc-file-name) + AC_SUBST(LIBGCC) + + LOADER_LDFLAGS="-Wl,--build-id=none ${LIBGCC}" +@@ -285,7 +285,7 @@ AC_CHECK_LIB(util, opendisk, [GRUB_LIBS="$GRUB_LIBS -lutil" + + # Unless the user specify --without-curses, check for curses. + if test "x$with_curses" != "xno"; then +- AC_CHECK_LIB(ncurses, wgetch, [GRUB_LIBS="$GRUB_LIBS -Wl,-Bstatic -lncurses -ltinfo -Wl,-Bdynamic" ++ AC_CHECK_LIB(ncurses, wgetch, [GRUB_LIBS="$GRUB_LIBS -Wl,-Bstatic -lncurses -Wl,-Bdynamic" + AC_DEFINE(HAVE_LIBCURSES, 1, [Define if you have a curses library])], + [AC_CHECK_LIB(curses, wgetch, [GRUB_LIBS="$GRUB_LIBS -Wl,-Bstatic -lcurses -Wl,-Bdynamic" + AC_DEFINE(HAVE_LIBCURSES, 1, [Define if you have a curses library])])]) +diff --git a/docs/Makefile.in b/docs/Makefile.in +deleted file mode 100644 +index f350fcd..0000000 +--- a/docs/Makefile.in ++++ /dev/null +@@ -1,876 +0,0 @@ +-# Makefile.in generated by automake 1.10 from Makefile.am. +-# @configure_input@ +- +-# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, +-# 2003, 2004, 2005, 2006 Free Software Foundation, Inc. +-# This Makefile.in is free software; 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The GRand Unified Bootloader +-* grub-install: (grub)Invoking grub-install. Install GRUB on your drive +-* grub-md5-crypt: (grub)Invoking grub-md5-crypt. Encrypt a password +- in MD5 format +-* grub-terminfo: (grub)Invoking grub-terminfo. Generate a terminfo +- command from a +- terminfo name +-* grub-set-default: (grub)Invoking grub-set-default. Set a default boot +- entry +-* mbchk: (grub)Invoking mbchk. Check for the format of a Multiboot kernel +-END-INFO-DIR-ENTRY +- +- Copyright (C) 1999,2000,2001,2002,2004 Free Software Foundation, Inc. +- +- Permission is granted to make and distribute verbatim copies of this +-manual provided the copyright notice and this permission notice are +-preserved on all copies. +- +- Permission is granted to copy and distribute modified versions of +-this manual under the conditions for verbatim copying, provided also +-that the entire resulting derived work is distributed under the terms +-of a permission notice identical to this one. +- +- Permission is granted to copy and distribute translations of this +-manual into another language, under the above conditions for modified +-versions. +- +- +-File: grub.info, Node: Top, Next: Introduction, Up: (dir) +- +-GRUB manual +-*********** +- +-This is the documentation of GNU GRUB, the GRand Unified Bootloader, a +-flexible and powerful boot loader program for PCs. +- +- This edition documents version 0.97. +- +-* Menu: +- +-* Introduction:: Capturing the spirit of GRUB +-* Naming convention:: Names of your drives in GRUB +-* Installation:: Installing GRUB on your drive +-* Booting:: How to boot different operating systems +-* Configuration:: Writing your own configuration file +-* Network:: Downloading OS images from a network +-* Serial terminal:: Using GRUB via a serial line +-* Preset Menu:: Embedding a configuration file into GRUB +-* Security:: Improving the security +-* Images:: GRUB image files +-* Filesystem:: Filesystem syntax and semantics +-* Interface:: The menu and the command-line +-* Commands:: The list of available builtin commands +-* Troubleshooting:: Error messages produced by GRUB +-* Invoking the grub shell:: How to use the grub shell +-* Invoking grub-install:: How to use the GRUB installer +-* Invoking grub-md5-crypt:: How to generate a cryptic password +-* Invoking grub-terminfo:: How to generate a terminfo command +-* Invoking grub-set-default:: How to set a default boot entry +-* Invoking mbchk:: How to use the Multiboot checker +-* Obtaining and Building GRUB:: How to obtain and build GRUB +-* Reporting bugs:: Where you should send a bug report +-* Future:: Some future plans on GRUB +-* Internals:: Hacking GRUB +-* Index:: +- +- +-File: grub.info, Node: Introduction, Next: Naming convention, Prev: Top, Up: Top +- +-1 Introduction to GRUB +-********************** +- +-* Menu: +- +-* Overview:: What exactly GRUB is and how to use it +-* History:: From maggot to house fly +-* Features:: GRUB features +-* Role of a boot loader:: The role of a boot loader +- +- +-File: grub.info, Node: Overview, Next: History, Up: Introduction +- +-1.1 Overview +-============ +- +-Briefly, a "boot loader" is the first software program that runs when a +-computer starts. It is responsible for loading and transferring +-control to an operating system "kernel" software (such as Linux or GNU +-Mach). The kernel, in turn, initializes the rest of the operating +-system (e.g. a GNU system). +- +- GNU GRUB is a very powerful boot loader, which can load a wide +-variety of free operating systems, as well as proprietary operating +-systems with chain-loading(1) (*note Overview-Footnote-1::). GRUB is +-designed to address the complexity of booting a personal computer; both +-the program and this manual are tightly bound to that computer platform, +-although porting to other platforms may be addressed in the future. +- +- One of the important features in GRUB is flexibility; GRUB +-understands filesystems and kernel executable formats, so you can load +-an arbitrary operating system the way you like, without recording the +-physical position of your kernel on the disk. Thus you can load the +-kernel just by specifying its file name and the drive and partition +-where the kernel resides. +- +- When booting with GRUB, you can use either a command-line interface +-(*note Command-line interface::), or a menu interface (*note Menu +-interface::). Using the command-line interface, you type the drive +-specification and file name of the kernel manually. In the menu +-interface, you just select an OS using the arrow keys. The menu is +-based on a configuration file which you prepare beforehand (*note +-Configuration::). While in the menu, you can switch to the command-line +-mode, and vice-versa. You can even edit menu entries before using them. +- +- In the following chapters, you will learn how to specify a drive, a +-partition, and a file name (*note Naming convention::) to GRUB, how to +-install GRUB on your drive (*note Installation::), and how to boot your +-OSes (*note Booting::), step by step. +- +- Besides the GRUB boot loader itself, there is a "grub shell" `grub' +-(*note Invoking the grub shell::) which can be run when you are in your +-operating system. It emulates the boot loader and can be used for +-installing the boot loader. +- +- +-File: grub.info, Node: Overview-Footnotes, Up: Overview +- +- (1) "chain-load" is the mechanism for loading unsupported operating +-systems by loading another boot loader. It is typically used for +-loading DOS or Windows. +- +- +-File: grub.info, Node: History, Next: Features, Prev: Overview, Up: Introduction +- +-1.2 History of GRUB +-=================== +- +-GRUB originated in 1995 when Erich Boleyn was trying to boot the GNU +-Hurd with the University of Utah's Mach 4 microkernel (now known as GNU +-Mach). Erich and Brian Ford designed the Multiboot Specification +-(*note Multiboot Specification: (multiboot)Top.), because they were +-determined not to add to the large number of mutually-incompatible PC +-boot methods. +- +- Erich then began modifying the FreeBSD boot loader so that it would +-understand Multiboot. He soon realized that it would be a lot easier to +-write his own boot loader from scratch than to keep working on the +-FreeBSD boot loader, and so GRUB was born. +- +- Erich added many features to GRUB, but other priorities prevented him +-from keeping up with the demands of its quickly-expanding user base. In +-1999, Gordon Matzigkeit and Yoshinori K. Okuji adopted GRUB as an +-official GNU package, and opened its development by making the latest +-sources available via anonymous CVS. *Note Obtaining and Building +-GRUB::, for more information. +- +- +-File: grub.info, Node: Features, Next: Role of a boot loader, Prev: History, Up: Introduction +- +-1.3 GRUB features +-================= +- +-The primary requirement for GRUB is that it be compliant with the +-"Multiboot Specification", which is described in *Note Multiboot +-Specification: (multiboot)Top. +- +- The other goals, listed in approximate order of importance, are: +- +- * Basic functions must be straightforward for end-users. +- +- * Rich functionality to support kernel experts and designers. +- +- * Backward compatibility for booting FreeBSD, NetBSD, OpenBSD, and +- Linux. Proprietary kernels (such as DOS, Windows NT, and OS/2) are +- supported via a chain-loading function. +- +- Except for specific compatibility modes (chain-loading and the Linux +-"piggyback" format), all kernels will be started in much the same state +-as in the Multiboot Specification. Only kernels loaded at 1 megabyte or +-above are presently supported. Any attempt to load below that boundary +-will simply result in immediate failure and an error message reporting +-the problem. +- +- In addition to the requirements above, GRUB has the following +-features (note that the Multiboot Specification doesn't require all the +-features that GRUB supports): +- +-Recognize multiple executable formats +- Support many of the "a.out" variants plus "ELF". Symbol tables are +- also loaded. +- +-Support non-Multiboot kernels +- Support many of the various free 32-bit kernels that lack Multiboot +- compliance (primarily FreeBSD, NetBSD, OpenBSD, and Linux). +- Chain-loading of other boot loaders is also supported. +- +-Load multiples modules +- Fully support the Multiboot feature of loading multiple modules. +- +-Load a configuration file +- Support a human-readable text configuration file with preset boot +- commands. You can also load another configuration file dynamically +- and embed a preset configuration file in a GRUB image file. The +- list of commands (*note Commands::) are a superset of those +- supported on the command-line. An example configuration file is +- provided in *Note Configuration::. +- +-Provide a menu interface +- A menu interface listing preset boot commands, with a programmable +- timeout, is available. There is no fixed limit on the number of +- boot entries, and the current implementation has space for several +- hundred. +- +-Have a flexible command-line interface +- A fairly flexible command-line interface, accessible from the menu, +- is available to edit any preset commands, or write a new boot +- command set from scratch. If no configuration file is present, +- GRUB drops to the command-line. +- +- The list of commands (*note Commands::) are a subset of those +- supported for configuration files. Editing commands closely +- resembles the Bash command-line (*note Bash: (features)Command +- Line Editing.), with <TAB>-completion of commands, devices, +- partitions, and files in a directory depending on context. +- +-Support multiple filesystem types +- Support multiple filesystem types transparently, plus a useful +- explicit blocklist notation. The currently supported filesystem +- types are "BSD FFS", "DOS FAT16 and FAT32", "Minix fs", "Linux +- ext2fs", "ReiserFS", "JFS", "XFS", and "VSTa fs". *Note +- Filesystem::, for more information. +- +-Support automatic decompression +- Can decompress files which were compressed by `gzip'. This +- function is both automatic and transparent to the user (i.e. all +- functions operate upon the uncompressed contents of the specified +- files). This greatly reduces a file size and loading time, a +- particularly great benefit for floppies.(1) (*note +- Features-Footnote-1::) +- +- It is conceivable that some kernel modules should be loaded in a +- compressed state, so a different module-loading command can be +- specified to avoid uncompressing the modules. +- +-Access data on any installed device +- Support reading data from any or all floppies or hard disk(s) +- recognized by the BIOS, independent of the setting of the root +- device. +- +-Be independent of drive geometry translations +- Unlike many other boot loaders, GRUB makes the particular drive +- translation irrelevant. A drive installed and running with one +- translation may be converted to another translation without any +- adverse effects or changes in GRUB's configuration. +- +-Detect all installed RAM +- GRUB can generally find all the installed RAM on a PC-compatible +- machine. It uses an advanced BIOS query technique for finding all +- memory regions. As described on the Multiboot Specification (*note +- Multiboot Specification: (multiboot)Top.), not all kernels make +- use of this information, but GRUB provides it for those who do. +- +-Support Logical Block Address mode +- In traditional disk calls (called "CHS mode"), there is a geometry +- translation problem, that is, the BIOS cannot access over 1024 +- cylinders, so the accessible space is limited to at least 508 MB +- and to at most 8GB. GRUB can't universally solve this problem, as +- there is no standard interface used in all machines. However, +- several newer machines have the new interface, Logical Block +- Address ("LBA") mode. GRUB automatically detects if LBA mode is +- available and uses it if available. In LBA mode, GRUB can access +- the entire disk. +- +-Support network booting +- GRUB is basically a disk-based boot loader but also has network +- support. You can load OS images from a network by using the "TFTP" +- protocol. +- +-Support remote terminals +- To support computers with no console, GRUB provides remote terminal +- support, so that you can control GRUB from a remote host. Only +- serial terminal support is implemented at the moment. +- +- +-File: grub.info, Node: Features-Footnotes, Up: Features +- +- (1) There are a few pathological cases where loading a very badly +-organized ELF kernel might take longer, but in practice this never +-happen. +- +- +-File: grub.info, Node: Role of a boot loader, Prev: Features, Up: Introduction +- +-1.4 The role of a boot loader +-============================= +- +-The following is a quotation from Gordon Matzigkeit, a GRUB fanatic: +- +- Some people like to acknowledge both the operating system and +- kernel when they talk about their computers, so they might say +- they use "GNU/Linux" or "GNU/Hurd". Other people seem to think +- that the kernel is the most important part of the system, so they +- like to call their GNU operating systems "Linux systems." +- +- I, personally, believe that this is a grave injustice, because the +- _boot loader_ is the most important software of all. I used to +- refer to the above systems as either "LILO"(1) (*note Role of a +- boot loader-Footnote-1::) or "GRUB" systems. +- +- Unfortunately, nobody ever understood what I was talking about; +- now I just use the word "GNU" as a pseudonym for GRUB. +- +- So, if you ever hear people talking about their alleged "GNU" +- systems, remember that they are actually paying homage to the best +- boot loader around... GRUB! +- +- We, the GRUB maintainers, do not (usually) encourage Gordon's level +-of fanaticism, but it helps to remember that boot loaders deserve +-recognition. We hope that you enjoy using GNU GRUB as much as we did +-writing it. +- +- +-File: grub.info, Node: Role of a boot loader-Footnotes, Up: Role of a boot loader +- +- (1) The LInux LOader, a boot loader that everybody uses, but nobody +-likes. +- +- +-File: grub.info, Node: Naming convention, Next: Installation, Prev: Introduction, Up: Top +- +-2 Naming convention +-******************* +- +-The device syntax used in GRUB is a wee bit different from what you may +-have seen before in your operating system(s), and you need to know it so +-that you can specify a drive/partition. +- +- Look at the following examples and explanations: +- +- (fd0) +- +- First of all, GRUB requires that the device name be enclosed with +-`(' and `)'. The `fd' part means that it is a floppy disk. The number +-`0' is the drive number, which is counted from _zero_. This expression +-means that GRUB will use the whole floppy disk. +- +- (hd0,1) +- +- Here, `hd' means it is a hard disk drive. The first integer `0' +-indicates the drive number, that is, the first hard disk, while the +-second integer, `1', indicates the partition number (or the PC slice +-number in the BSD terminology). Once again, please note that the +-partition numbers are counted from _zero_, not from one. This +-expression means the second partition of the first hard disk drive. In +-this case, GRUB uses one partition of the disk, instead of the whole +-disk. +- +- (hd0,4) +- +- This specifies the first "extended partition" of the first hard disk +-drive. Note that the partition numbers for extended partitions are +-counted from `4', regardless of the actual number of primary partitions +-on your hard disk. +- +- (hd1,a) +- +- This means the BSD `a' partition of the second hard disk. If you +-need to specify which PC slice number should be used, use something +-like this: `(hd1,0,a)'. If the PC slice number is omitted, GRUB +-searches for the first PC slice which has a BSD `a' partition. +- +- Of course, to actually access the disks or partitions with GRUB, you +-need to use the device specification in a command, like `root (fd0)' or +-`unhide (hd0,2)'. To help you find out which number specifies a +-partition you want, the GRUB command-line (*note Command-line +-interface::) options have argument completion. This means that, for +-example, you only need to type +- +- root ( +- +- followed by a <TAB>, and GRUB will display the list of drives, +-partitions, or file names. So it should be quite easy to determine the +-name of your target partition, even with minimal knowledge of the +-syntax. +- +- Note that GRUB does _not_ distinguish IDE from SCSI - it simply +-counts the drive numbers from zero, regardless of their type. Normally, +-any IDE drive number is less than any SCSI drive number, although that +-is not true if you change the boot sequence by swapping IDE and SCSI +-drives in your BIOS. +- +- Now the question is, how to specify a file? Again, consider an +-example: +- +- (hd0,0)/vmlinuz +- +- This specifies the file named `vmlinuz', found on the first +-partition of the first hard disk drive. Note that the argument +-completion works with file names, too. +- +- That was easy, admit it. Now read the next chapter, to find out how +-to actually install GRUB on your drive. +- +- +-File: grub.info, Node: Installation, Next: Booting, Prev: Naming convention, Up: Top +- +-3 Installation +-************** +- +-In order to install GRUB as your boot loader, you need to first install +-the GRUB system and utilities under your UNIX-like operating system +-(*note Obtaining and Building GRUB::). You can do this either from the +-source tarball, or as a package for your OS. +- +- After you have done that, you need to install the boot loader on a +-drive (floppy or hard disk). There are two ways of doing that - either +-using the utility `grub-install' (*note Invoking grub-install::) on a +-UNIX-like OS, or by running GRUB itself from a floppy. These are quite +-similar, however the utility might probe a wrong BIOS drive, so you +-should be careful. +- +- Also, if you install GRUB on a UNIX-like OS, please make sure that +-you have an emergency boot disk ready, so that you can rescue your +-computer if, by any chance, your hard drive becomes unusable +-(unbootable). +- +- GRUB comes with boot images, which are normally put in the directory +-`/usr/lib/grub/i386-pc'. If you do not use grub-install, then you need +-to copy the files `stage1', `stage2', and `*stage1_5' to the directory +-`/boot/grub', and run the `grub-set-default' (*note Invoking +-grub-set-default::) if you intend to use `default saved' (*note +-default::) in your configuration file. Hereafter, the directory where +-GRUB images are initially placed (normally `/usr/lib/grub/i386-pc') +-will be called the "image directory", and the directory where the boot +-loader needs to find them (usually `/boot/grub') will be called the +-"boot directory". +- +-* Menu: +- +-* Creating a GRUB boot floppy:: +-* Installing GRUB natively:: +-* Installing GRUB using grub-install:: +-* Making a GRUB bootable CD-ROM:: +- +- +-File: grub.info, Node: Creating a GRUB boot floppy, Next: Installing GRUB natively, Up: Installation +- +-3.1 Creating a GRUB boot floppy +-=============================== +- +-To create a GRUB boot floppy, you need to take the files `stage1' and +-`stage2' from the image directory, and write them to the first and the +-second block of the floppy disk, respectively. +- +- *Caution:* This procedure will destroy any data currently stored on +-the floppy. +- +- On a UNIX-like operating system, that is done with the following +-commands: +- +- # cd /usr/lib/grub/i386-pc +- # dd if=stage1 of=/dev/fd0 bs=512 count=1 +- 1+0 records in +- 1+0 records out +- # dd if=stage2 of=/dev/fd0 bs=512 seek=1 +- 153+1 records in +- 153+1 records out +- # +- +- The device file name may be different. Consult the manual for your +-OS. +- +- +-File: grub.info, Node: Installing GRUB natively, Next: Installing GRUB using grub-install, Prev: Creating a GRUB boot floppy, Up: Installation +- +-3.2 Installing GRUB natively +-============================ +- +-*Caution:* Installing GRUB's stage1 in this manner will erase the +-normal boot-sector used by an OS. +- +- GRUB can currently boot GNU Mach, Linux, FreeBSD, NetBSD, and OpenBSD +-directly, so using it on a boot sector (the first sector of a +-partition) should be okay. But generally, it would be a good idea to +-back up the first sector of the partition on which you are installing +-GRUB's stage1. This isn't as important if you are installing GRUB on +-the first sector of a hard disk, since it's easy to reinitialize it +-(e.g. by running `FDISK /MBR' from DOS). +- +- If you decide to install GRUB in the native environment, which is +-definitely desirable, you'll need to create a GRUB boot disk, and +-reboot your computer with it. Otherwise, see *Note Installing GRUB +-using grub-install::. +- +- Once started, GRUB will show the command-line interface (*note +-Command-line interface::). First, set the GRUB's "root device"(1) +-(*note Installing GRUB natively-Footnote-1::) to the partition +-containing the boot directory, like this: +- +- grub> root (hd0,0) +- +- If you are not sure which partition actually holds this directory, +-use the command `find' (*note find::), like this: +- +- grub> find /boot/grub/stage1 +- +- This will search for the file name `/boot/grub/stage1' and show the +-devices which contain the file. +- +- Once you've set the root device correctly, run the command `setup' +-(*note setup::): +- +- grub> setup (hd0) +- +- This command will install the GRUB boot loader on the Master Boot +-Record (MBR) of the first drive. If you want to put GRUB into the boot +-sector of a partition instead of putting it in the MBR, specify the +-partition into which you want to install GRUB: +- +- grub> setup (hd0,0) +- +- If you install GRUB into a partition or a drive other than the first +-one, you must chain-load GRUB from another boot loader. Refer to the +-manual for the boot loader to know how to chain-load GRUB. +- +- After using the setup command, you will boot into GRUB without the +-GRUB floppy. See the chapter *Note Booting:: to find out how to boot +-your operating systems from GRUB. +- +- +-File: grub.info, Node: Installing GRUB natively-Footnotes, Up: Installing GRUB natively +- +- (1) Note that GRUB's root device doesn't necessarily mean your OS's +-root partition; if you need to specify a root partition for your OS, +-add the argument into the command `kernel'. +- +- +-File: grub.info, Node: Installing GRUB using grub-install, Next: Making a GRUB bootable CD-ROM, Prev: Installing GRUB natively, Up: Installation +- +-3.3 Installing GRUB using grub-install +-====================================== +- +-*Caution:* This procedure is definitely less safe, because there are +-several ways in which your computer can become unbootable. For example, +-most operating systems don't tell GRUB how to map BIOS drives to OS +-devices correctly--GRUB merely "guesses" the mapping. This will succeed +-in most cases, but not always. Therefore, GRUB provides you with a map +-file called the "device map", which you must fix if it is wrong. *Note +-Device map::, for more details. +- +- If you still do want to install GRUB under a UNIX-like OS (such as +-GNU), invoke the program `grub-install' (*note Invoking grub-install::) +-as the superuser ("root"). +- +- The usage is basically very simple. You only need to specify one +-argument to the program, namely, where to install the boot loader. The +-argument can be either a device file (like `/dev/hda') or a partition +-specified in GRUB's notation. For example, under Linux the following +-will install GRUB into the MBR of the first IDE disk: +- +- # grub-install /dev/hda +- +- Likewise, under GNU/Hurd, this has the same effect: +- +- # grub-install /dev/hd0 +- +- If it is the first BIOS drive, this is the same as well: +- +- # grub-install '(hd0)' +- +- Or you can omit the parentheses: +- +- # grub-install hd0 +- +- But all the above examples assume that GRUB should use images under +-the root directory. If you want GRUB to use images under a directory +-other than the root directory, you need to specify the option +-`--root-directory'. The typical usage is that you create a GRUB boot +-floppy with a filesystem. Here is an example: +- +- # mke2fs /dev/fd0 +- # mount -t ext2 /dev/fd0 /mnt +- # grub-install --root-directory=/mnt fd0 +- # umount /mnt +- +- Another example is when you have a separate boot partition which is +-mounted at `/boot'. Since GRUB is a boot loader, it doesn't know +-anything about mountpoints at all. Thus, you need to run `grub-install' +-like this: +- +- # grub-install --root-directory=/boot /dev/hda +- +- By the way, as noted above, it is quite difficult to guess BIOS +-drives correctly under a UNIX-like OS. Thus, `grub-install' will prompt +-you to check if it could really guess the correct mappings, after the +-installation. The format is defined in *Note Device map::. Please be +-quite careful. If the output is wrong, it is unlikely that your +-computer will be able to boot with no problem. +- +- Note that `grub-install' is actually just a shell script and the +-real task is done by the grub shell `grub' (*note Invoking the grub +-shell::). Therefore, you may run `grub' directly to install GRUB, +-without using `grub-install'. Don't do that, however, unless you are +-very familiar with the internals of GRUB. Installing a boot loader on a +-running OS may be extremely dangerous. +- +- +-File: grub.info, Node: Making a GRUB bootable CD-ROM, Prev: Installing GRUB using grub-install, Up: Installation +- +-3.4 Making a GRUB bootable CD-ROM +-================================= +- +-GRUB supports the "no emulation mode" in the El Torito specification(1) +-(*note Making a GRUB bootable CD-ROM-Footnote-1::). This means that you +-can use the whole CD-ROM from GRUB and you don't have to make a floppy +-or hard disk image file, which can cause compatibility problems. +- +- For booting from a CD-ROM, GRUB uses a special Stage 2 called +-`stage2_eltorito'. The only GRUB files you need to have in your +-bootable CD-ROM are this `stage2_eltorito' and optionally a config file +-`menu.lst'. You don't need to use `stage1' or `stage2', because El +-Torito is quite different from the standard boot process. +- +- Here is an example of procedures to make a bootable CD-ROM image. +-First, make a top directory for the bootable image, say, `iso': +- +- $ mkdir iso +- +- Make a directory for GRUB: +- +- $ mkdir -p iso/boot/grub +- +- Copy the file `stage2_eltorito': +- +- $ cp /usr/lib/grub/i386-pc/stage2_eltorito iso/boot/grub +- +- If desired, make the config file `menu.lst' under `iso/boot/grub' +-(*note Configuration::), and copy any files and directories for the +-disc to the directory `iso/'. +- +- Finally, make a ISO9660 image file like this: +- +- $ mkisofs -R -b boot/grub/stage2_eltorito -no-emul-boot \ +- -boot-load-size 4 -boot-info-table -o grub.iso iso +- +- This produces a file named `grub.iso', which then can be burned into +-a CD (or a DVD). `mkisofs' has already set up the disc to boot from +-the `boot/grub/stage2_eltorito' file, so there is no need to setup GRUB +-on the disc. (Note that the `-boot-load-size 4' bit is required for +-compatibility with the BIOS on many older machines.) +- +- You can use the device `(cd)' to access a CD-ROM in your config +-file. This is not required; GRUB automatically sets the root device to +-`(cd)' when booted from a CD-ROM. It is only necessary to refer to +-`(cd)' if you want to access other drives as well. +- +- +-File: grub.info, Node: Making a GRUB bootable CD-ROM-Footnotes, Up: Making a GRUB bootable CD-ROM +- +- (1) El Torito is a specification for bootable CD using BIOS +-functions. +- +- +-File: grub.info, Node: Booting, Next: Configuration, Prev: Installation, Up: Top +- +-4 Booting +-********* +- +-GRUB can load Multiboot-compliant kernels in a consistent way, but for +-some free operating systems you need to use some OS-specific magic. +- +-* Menu: +- +-* General boot methods:: How to boot OSes with GRUB generally +-* OS-specific notes:: Notes on some operating systems +-* Making your system robust:: How to make your system robust +- +- +-File: grub.info, Node: General boot methods, Next: OS-specific notes, Up: Booting +- +-4.1 How to boot operating systems +-================================= +- +-GRUB has two distinct boot methods. One of the two is to load an +-operating system directly, and the other is to chain-load another boot +-loader which then will load an operating system actually. Generally +-speaking, the former is more desirable, because you don't need to +-install or maintain other boot loaders and GRUB is flexible enough to +-load an operating system from an arbitrary disk/partition. However, the +-latter is sometimes required, since GRUB doesn't support all the +-existing operating systems natively. +- +-* Menu: +- +-* Loading an operating system directly:: +-* Chain-loading:: +- +- +-File: grub.info, Node: Loading an operating system directly, Next: Chain-loading, Up: General boot methods +- +-4.1.1 How to boot an OS directly with GRUB +------------------------------------------- +- +-Multiboot (*note Multiboot Specification: (multiboot)Top.) is the +-native format supported by GRUB. For the sake of convenience, there is +-also support for Linux, FreeBSD, NetBSD and OpenBSD. If you want to +-boot other operating systems, you will have to chain-load them (*note +-Chain-loading::). +- +- Generally, GRUB can boot any Multiboot-compliant OS in the following +-steps: +- +- 1. Set GRUB's root device to the drive where the OS images are stored +- with the command `root' (*note root::). +- +- 2. Load the kernel image with the command `kernel' (*note kernel::). +- +- 3. If you need modules, load them with the command `module' (*note +- module::) or `modulenounzip' (*note modulenounzip::). +- +- 4. Run the command `boot' (*note boot::). +- +- Linux, FreeBSD, NetBSD and OpenBSD can be booted in a similar +-manner. You load a kernel image with the command `kernel' and then run +-the command `boot'. If the kernel requires some parameters, just append +-the parameters to `kernel', after the file name of the kernel. Also, +-please refer to *Note OS-specific notes::, for information on your +-OS-specific issues. +- +- +-File: grub.info, Node: Chain-loading, Prev: Loading an operating system directly, Up: General boot methods +- +-4.1.2 Load another boot loader to boot unsupported operating systems +--------------------------------------------------------------------- +- +-If you want to boot an unsupported operating system (e.g. Windows 95), +-chain-load a boot loader for the operating system. Normally, the boot +-loader is embedded in the "boot sector" of the partition on which the +-operating system is installed. +- +- 1. Set GRUB's root device to the partition by the command +- `rootnoverify' (*note rootnoverify::): +- +- grub> rootnoverify (hd0,0) +- +- 2. Set the "active" flag in the partition using the command +- `makeactive'(1) (*note Chain-loading-Footnote-1::) (*note +- makeactive::): +- +- grub> makeactive +- +- 3. Load the boot loader with the command `chainloader' (*note +- chainloader::): +- +- grub> chainloader +1 +- +- `+1' indicates that GRUB should read one sector from the start of +- the partition. The complete description about this syntax can be +- found in *Note Block list syntax::. +- +- 4. Run the command `boot' (*note boot::). +- +- However, DOS and Windows have some deficiencies, so you might have to +-use more complicated instructions. *Note DOS/Windows::, for more +-information. +- +- +-File: grub.info, Node: Chain-loading-Footnotes, Up: Chain-loading +- +- (1) This is not necessary for most of the modern operating systems. +- +- +-File: grub.info, Node: OS-specific notes, Next: Making your system robust, Prev: General boot methods, Up: Booting +- +-4.2 Some caveats on OS-specific issues +-====================================== +- +-Here, we describe some caveats on several operating systems. +- +-* Menu: +- +-* GNU/Hurd:: +-* GNU/Linux:: +-* FreeBSD:: +-* NetBSD:: +-* OpenBSD:: +-* DOS/Windows:: +-* SCO UnixWare:: +-* QNX:: +- +- +-File: grub.info, Node: GNU/Hurd, Next: GNU/Linux, Up: OS-specific notes +- +-4.2.1 GNU/Hurd +--------------- +- +-Since GNU/Hurd is Multiboot-compliant, it is easy to boot it; there is +-nothing special about it. But do not forget that you have to specify a +-root partition to the kernel. +- +- 1. Set GRUB's root device to the same drive as GNU/Hurd's. Probably +- the command `find /boot/gnumach' or similar can help you (*note +- find::). +- +- 2. Load the kernel and the module, like this: +- +- grub> kernel /boot/gnumach root=hd0s1 +- grub> module /boot/serverboot +- +- 3. Run the command `boot' (*note boot::). +- +- +-File: grub.info, Node: GNU/Linux, Next: FreeBSD, Prev: GNU/Hurd, Up: OS-specific notes +- +-4.2.2 GNU/Linux +---------------- +- +-It is relatively easy to boot GNU/Linux from GRUB, because it somewhat +-resembles to boot a Multiboot-compliant OS. +- +- 1. Set GRUB's root device to the same drive as GNU/Linux's. Probably +- the command `find /vmlinuz' or similar can help you (*note find::). +- +- 2. Load the kernel: +- +- grub> kernel /vmlinuz root=/dev/hda1 +- +- If you need to specify some kernel parameters, just append them to +- the command. For example, to set `vga' to `ext', do this: +- +- grub> kernel /vmlinuz root=/dev/hda1 vga=ext +- +- See the documentation in the Linux source tree for complete +- information on the available options. +- +- 3. If you use an initrd, execute the command `initrd' (*note +- initrd::) after `kernel': +- +- grub> initrd /initrd +- +- 4. Finally, run the command `boot' (*note boot::). +- +- *Caution:* If you use an initrd and specify the `mem=' option to the +-kernel to let it use less than actual memory size, you will also have +-to specify the same memory size to GRUB. To let GRUB know the size, run +-the command `uppermem' _before_ loading the kernel. *Note uppermem::, +-for more information. +- +- +-File: grub.info, Node: FreeBSD, Next: NetBSD, Prev: GNU/Linux, Up: OS-specific notes +- +-4.2.3 FreeBSD +-------------- +- +-GRUB can load the kernel directly, either in ELF or a.out format. But +-this is not recommended, since FreeBSD's bootstrap interface sometimes +-changes heavily, so GRUB can't guarantee to pass kernel parameters +-correctly. +- +- Thus, we'd recommend loading the very flexible loader `/boot/loader' +-instead. See this example: +- +- grub> root (hd0,a) +- grub> kernel /boot/loader +- grub> boot +- +- +-File: grub.info, Node: NetBSD, Next: OpenBSD, Prev: FreeBSD, Up: OS-specific notes +- +-4.2.4 NetBSD +------------- +- +-GRUB can load NetBSD a.out and ELF directly, follow these steps: +- +- 1. Set GRUB's root device with `root' (*note root::). +- +- 2. Load the kernel with `kernel' (*note kernel::). You should append +- the ugly option `--type=netbsd', if you want to load an ELF +- kernel, like this: +- +- grub> kernel --type=netbsd /netbsd-elf +- +- 3. Run `boot' (*note boot::). +- +- For now, however, GRUB doesn't allow you to pass kernel parameters, +-so it may be better to chain-load it instead. For more information, +-please see *Note Chain-loading::. +- +- +-File: grub.info, Node: OpenBSD, Next: DOS/Windows, Prev: NetBSD, Up: OS-specific notes +- +-4.2.5 OpenBSD +-------------- +- +-The booting instruction is exactly the same as for NetBSD (*note +-NetBSD::). +- +- +-File: grub.info, Node: DOS/Windows, Next: SCO UnixWare, Prev: OpenBSD, Up: OS-specific notes +- +-4.2.6 DOS/Windows +------------------ +- +-GRUB cannot boot DOS or Windows directly, so you must chain-load them +-(*note Chain-loading::). However, their boot loaders have some critical +-deficiencies, so it may not work to just chain-load them. To overcome +-the problems, GRUB provides you with two helper functions. +- +- If you have installed DOS (or Windows) on a non-first hard disk, you +-have to use the disk swapping technique, because that OS cannot boot +-from any disks but the first one. The workaround used in GRUB is the +-command `map' (*note map::), like this: +- +- grub> map (hd0) (hd1) +- grub> map (hd1) (hd0) +- +- This performs a "virtual" swap between your first and second hard +-drive. +- +- *Caution:* This is effective only if DOS (or Windows) uses BIOS to +-access the swapped disks. If that OS uses a special driver for the +-disks, this probably won't work. +- +- Another problem arises if you installed more than one set of +-DOS/Windows onto one disk, because they could be confused if there are +-more than one primary partitions for DOS/Windows. Certainly you should +-avoid doing this, but there is a solution if you do want to do so. Use +-the partition hiding/unhiding technique. +- +- If GRUB "hide"s a DOS (or Windows) partition (*note hide::), DOS (or +-Windows) will ignore the partition. If GRUB "unhide"s a DOS (or +-Windows) partition (*note unhide::), DOS (or Windows) will detect the +-partition. Thus, if you have installed DOS (or Windows) on the first +-and the second partition of the first hard disk, and you want to boot +-the copy on the first partition, do the following: +- +- grub> unhide (hd0,0) +- grub> hide (hd0,1) +- grub> rootnoverify (hd0,0) +- grub> chainloader +1 +- grub> makeactive +- grub> boot +- +- +-File: grub.info, Node: SCO UnixWare, Next: QNX, Prev: DOS/Windows, Up: OS-specific notes +- +-4.2.7 SCO UnixWare +------------------- +- +-It is known that the signature in the boot loader for SCO UnixWare is +-wrong, so you will have to specify the option `--force' to +-`chainloader' (*note chainloader::), like this: +- +- grub> rootnoverify (hd1,0) +- grub> chainloader --force +1 +- grub> makeactive +- grub> boot +- +- +-File: grub.info, Node: QNX, Prev: SCO UnixWare, Up: OS-specific notes +- +-4.2.8 QNX +---------- +- +-QNX seems to use a bigger boot loader, so you need to boot it up, like +-this: +- +- grub> rootnoverify (hd1,1) +- grub> chainloader +4 +- grub> boot +- +- +-File: grub.info, Node: Making your system robust, Prev: OS-specific notes, Up: Booting +- +-4.3 How to make your system robust +-================================== +- +-When you test a new kernel or a new OS, it is important to make sure +-that your computer can boot even if the new system is unbootable. This +-is crucial especially if you maintain servers or remote systems. To +-accomplish this goal, you need to set up two things: +- +- 1. You must maintain a system which is always bootable. For instance, +- if you test a new kernel, you need to keep a working kernel in a +- different place. And, it would sometimes be very nice to even have +- a complete copy of a working system in a different partition or +- disk. +- +- 2. You must direct GRUB to boot a working system when the new system +- fails. This is possible with the "fallback" system in GRUB. +- +- The former requirement is very specific to each OS, so this +-documentation does not cover that topic. It is better to consult some +-backup tools. +- +- So let's see the GRUB part. There are two possibilities: one of them +-is quite simple but not very robust, and the other is a bit complex to +-set up but probably the best solution to make sure that your system can +-start as long as GRUB itself is bootable. +- +-* Menu: +- +-* Booting once-only:: +-* Booting fallback systems:: +- +- +-File: grub.info, Node: Booting once-only, Next: Booting fallback systems, Up: Making your system robust +- +-4.3.1 Booting once-only +------------------------ +- +-You can teach GRUB to boot an entry only at next boot time. Suppose +-that your have an old kernel `old_kernel' and a new kernel +-`new_kernel'. You know that `old_kernel' can boot your system +-correctly, and you want to test `new_kernel'. +- +- To ensure that your system will go back to the old kernel even if the +-new kernel fails (e.g. it panics), you can specify that GRUB should try +-the new kernel only once and boot the old kernel after that. +- +- First, modify your configuration file. Here is an example: +- +- default saved # This is important!!! +- timeout 10 +- +- title the old kernel +- root (hd0,0) +- kernel /old_kernel +- savedefault +- +- title the new kernel +- root (hd0,0) +- kernel /new_kernel +- savedefault 0 # This is important!!! +- +- Note that this configuration file uses `default saved' (*note +-default::) at the head and `savedefault 0' (*note savedefault::) in the +-entry for the new kernel. This means that GRUB boots a saved entry by +-default, and booting the entry for the new kernel saves `0' as the +-saved entry. +- +- With this configuration file, after all, GRUB always tries to boot +-the old kernel after it booted the new one, because `0' is the entry of +-`the old kernel'. +- +- The next step is to tell GRUB to boot the new kernel at next boot +-time. For this, execute `grub-set-default' (*note Invoking +-grub-set-default::): +- +- # grub-set-default 1 +- +- This command sets the saved entry to `1', that is, to the new kernel. +- +- This method is useful, but still not very robust, because GRUB stops +-booting, if there is any error in the boot entry, such that the new +-kernel has an invalid executable format. Thus, it it even better to use +-the "fallback" mechanism of GRUB. Look at next subsection for this +-feature. +- +- +-File: grub.info, Node: Booting fallback systems, Prev: Booting once-only, Up: Making your system robust +- +-4.3.2 Booting fallback systems +------------------------------- +- +-GRUB supports a fallback mechanism of booting one or more other entries +-if a default boot entry fails. You can specify multiple fallback +-entries if you wish. +- +- Suppose that you have three systems, `A', `B' and `C'. `A' is a +-system which you want to boot by default. `B' is a backup system which +-is supposed to boot safely. `C' is another backup system which is used +-in case where `B' is broken. +- +- Then you may want GRUB to boot the first system which is bootable +-among `A', `B' and `C'. A configuration file can be written in this way: +- +- default saved # This is important!!! +- timeout 10 +- fallback 1 2 # This is important!!! +- +- title A +- root (hd0,0) +- kernel /kernel +- savedefault fallback # This is important!!! +- +- title B +- root (hd1,0) +- kernel /kernel +- savedefault fallback # This is important!!! +- +- title C +- root (hd2,0) +- kernel /kernel +- savedefault +- +- Note that `default saved' (*note default::), `fallback 1 2' and +-`savedefault fallback' are used. GRUB will boot a saved entry by +-default and save a fallback entry as next boot entry with this +-configuration. +- +- When GRUB tries to boot `A', GRUB saves `1' as next boot entry, +-because the command `fallback' specifies that `1' is the first fallback +-entry. The entry `1' is `B', so GRUB will try to boot `B' at next boot +-time. +- +- Likewise, when GRUB tries to boot `B', GRUB saves `2' as next boot +-entry, because `fallback' specifies `2' as next fallback entry. This +-makes sure that GRUB will boot `C' after booting `B'. +- +- It is noteworthy that GRUB uses fallback entries both when GRUB +-itself fails in booting an entry and when `A' or `B' fails in starting +-up your system. So this solution ensures that your system is started +-even if GRUB cannot find your kernel or if your kernel panics. +- +- However, you need to run `grub-set-default' (*note Invoking +-grub-set-default::) when `A' starts correctly or you fix `A' after it +-crashes, since GRUB always sets next boot entry to a fallback entry. +-You should run this command in a startup script such as `rc.local' to +-boot `A' by default: +- +- # grub-set-default 0 +- +- where `0' is the number of the boot entry for the system `A'. +- +- If you want to see what is current default entry, you can look at the +-file `/boot/grub/default' (or `/grub/default' in some systems). Because +-this file is plain-text, you can just `cat' this file. But it is +-strongly recommended *not to modify this file directly*, because GRUB +-may fail in saving a default entry in this file, if you change this +-file in an unintended manner. Therefore, you should use +-`grub-set-default' when you need to change the default entry. +- +- +-File: grub.info, Node: Configuration, Next: Network, Prev: Booting, Up: Top +- +-5 Configuration +-*************** +- +-You've probably noticed that you need to type several commands to boot +-your OS. There's a solution to that - GRUB provides a menu interface +-(*note Menu interface::) from which you can select an item (using arrow +-keys) that will do everything to boot an OS. +- +- To enable the menu, you need a configuration file, `grub.conf' under +-the boot directory. We'll analyze an example file. +- +- The file first contains some general settings, the menu interface +-related options. You can put these commands (*note Menu-specific +-commands::) before any of the items (starting with `title' (*note +-title::)). +- +- # +- # Sample boot menu configuration file +- # +- +- As you may have guessed, these lines are comments. Lines starting +-with a hash character (`#'), and blank lines, are ignored by GRUB. +- +- # By default, boot the first entry. +- default 0 +- +- The first entry (here, counting starts with number zero, not one!) +-will be the default choice. +- +- # Boot automatically after 30 secs. +- timeout 30 +- +- As the comment says, GRUB will boot automatically in 30 seconds, +-unless interrupted with a keypress. +- +- # Fallback to the second entry. +- fallback 1 +- +- If, for any reason, the default entry doesn't work, fall back to the +-second one (this is rarely used, for obvious reasons). +- +- Note that the complete descriptions of these commands, which are menu +-interface specific, can be found in *Note Menu-specific commands::. +-Other descriptions can be found in *Note Commands::. +- +- Now, on to the actual OS definitions. You will see that each entry +-begins with a special command, `title' (*note title::), and the action +-is described after it. Note that there is no command `boot' (*note +-boot::) at the end of each item. That is because GRUB automatically +-executes `boot' if it loads other commands successfully. +- +- The argument for the command `title' is used to display a short +-title/description of the entry in the menu. Since `title' displays the +-argument as is, you can write basically anything there. +- +- # For booting GNU/Hurd +- title GNU/Hurd +- root (hd0,0) +- kernel /boot/gnumach.gz root=hd0s1 +- module /boot/serverboot.gz +- +- This boots GNU/Hurd from the first hard disk. +- +- # For booting GNU/Linux +- title GNU/Linux +- kernel (hd1,0)/vmlinuz root=/dev/hdb1 +- +- This boots GNU/Linux, but from the second hard disk. +- +- # For booting Mach (getting kernel from floppy) +- title Utah Mach4 multiboot +- root (hd0,2) +- pause Insert the diskette now^G!! +- kernel (fd0)/boot/kernel root=hd0s3 +- module (fd0)/boot/bootstrap +- +- This boots Mach with a kernel on a floppy, but the root filesystem at +-hd0s3. It also contains a `pause' line (*note pause::), which will +-cause GRUB to display a prompt and delay, before actually executing the +-rest of the commands and booting. +- +- # For booting FreeBSD +- title FreeBSD +- root (hd0,2,a) +- kernel /boot/loader +- +- This item will boot FreeBSD kernel loaded from the `a' partition of +-the third PC slice of the first hard disk. +- +- # For booting OS/2 +- title OS/2 +- root (hd0,1) +- makeactive +- # chainload OS/2 bootloader from the first sector +- chainloader +1 +- # This is similar to "chainload", but loads a specific file +- #chainloader /boot/chain.os2 +- +- This will boot OS/2, using a chain-loader (*note Chain-loading::). +- +- # For booting Windows NT or Windows95 +- title Windows NT / Windows 95 boot menu +- root (hd0,0) +- makeactive +- chainloader +1 +- # For loading DOS if Windows NT is installed +- # chainload /bootsect.dos +- +- The same as the above, but for Windows. +- +- # For installing GRUB into the hard disk +- title Install GRUB into the hard disk +- root (hd0,0) +- setup (hd0) +- +- This will just (re)install GRUB onto the hard disk. +- +- # Change the colors. +- title Change the colors +- color light-green/brown blink-red/blue +- +- In the last entry, the command `color' is used (*note color::), to +-change the menu colors (try it!). This command is somewhat special, +-because it can be used both in the command-line and in the menu. GRUB +-has several such commands, see *Note General commands::. +- +- We hope that you now understand how to use the basic features of +-GRUB. To learn more about GRUB, see the following chapters. +- +- +-File: grub.info, Node: Network, Next: Serial terminal, Prev: Configuration, Up: Top +- +-6 Downloading OS images from a network +-************************************** +- +-Although GRUB is a disk-based boot loader, it does provide network +-support. To use the network support, you need to enable at least one +-network driver in the GRUB build process. For more information please +-see `netboot/README.netboot' in the source distribution. +- +-* Menu: +- +-* General usage of network support:: +-* Diskless:: +- +- +-File: grub.info, Node: General usage of network support, Next: Diskless, Up: Network +- +-6.1 How to set up your network +-============================== +- +-GRUB requires a file server and optionally a server that will assign an +-IP address to the machine on which GRUB is running. For the former, only +-TFTP is supported at the moment. The latter is either BOOTP, DHCP or a +-RARP server(1) (*note General usage of network support-Footnote-1::). +-It is not necessary to run both the servers on one computer. How to +-configure these servers is beyond the scope of this document, so please +-refer to the manuals specific to those protocols/servers. +- +- If you decided to use a server to assign an IP address, set up the +-server and run `bootp' (*note bootp::), `dhcp' (*note dhcp::) or `rarp' +-(*note rarp::) for BOOTP, DHCP or RARP, respectively. Each command will +-show an assigned IP address, a netmask, an IP address for your TFTP +-server and a gateway. If any of the addresses is wrong or it causes an +-error, probably the configuration of your servers isn't set up properly. +- +- Otherwise, run `ifconfig', like this: +- +- grub> ifconfig --address=192.168.110.23 --server=192.168.110.14 +- +- You can also use `ifconfig' in conjuction with `bootp', `dhcp' or +-`rarp' (e.g. to reassign the server address manually). *Note +-ifconfig::, for more details. +- +- Finally, download your OS images from your network. The network can +-be accessed using the network drive `(nd)'. Everything else is very +-similar to the normal instructions (*note Booting::). +- +- Here is an example: +- +- grub> bootp +- Probing... [NE*000] +- NE2000 base ... +- Address: 192.168.110.23 Netmask: 255.255.255.0 +- Server: 192.168.110.14 Gateway: 192.168.110.1 +- +- grub> root (nd) +- grub> kernel /tftproot/gnumach.gz root=sd0s1 +- grub> module /tftproot/serverboot.gz +- grub> boot +- +- +-File: grub.info, Node: General usage of network support-Footnotes, Up: General usage of network support +- +- (1) RARP is not advised, since it cannot serve much information +- +- +-File: grub.info, Node: Diskless, Prev: General usage of network support, Up: Network +- +-6.2 Booting from a network +-========================== +- +-It is sometimes very useful to boot from a network, especially when you +-use a machine which has no local disk. In this case, you need to obtain +-a kind of Net Boot ROM, such as a PXE ROM or a free software package +-like Etherboot. Such a Boot ROM first boots the machine, sets up the +-network card installed into the machine, and downloads a second stage +-boot image from the network. Then, the second image will try to boot an +-operating system actually from the network. +- +- GRUB provides two second stage images, `nbgrub' and `pxegrub' (*note +-Images::). These images are the same as the normal Stage 2, except that +-they set up a network automatically, and try to load a configuration +-file from the network, if specified. The usage is very simple: If the +-machine has a PXE ROM, use `pxegrub'. If the machine has an NBI loader +-such as Etherboot, use `nbgrub'. There is no difference between them +-except their formats. Since the way to load a second stage image you +-want to use should be described in the manual on your Net Boot ROM, +-please refer to the manual, for more information. +- +- However, there is one thing specific to GRUB. Namely, how to specify +-a configuration file in a BOOTP/DHCP server. For now, GRUB uses the tag +-`150', to get the name of a configuration file. The following is an +-example with a BOOTP configuration: +- +- .allhost:hd=/tmp:bf=null:\ +- :ds=145.71.35.1 145.71.32.1:\ +- :sm=255.255.254.0:\ +- :gw=145.71.35.1:\ +- :sa=145.71.35.5: +- +- foo:ht=1:ha=63655d0334a7:ip=145.71.35.127:\ +- :bf=/nbgrub:\ +- :tc=.allhost:\ +- :T150="(nd)/tftpboot/menu.lst.foo": +- +- Note that you should specify the drive name `(nd)' in the name of +-the configuration file. This is because you might change the root drive +-before downloading the configuration from the TFTP server when the +-preset menu feature is used (*note Preset Menu::). +- +- See the manual of your BOOTP/DHCP server for more information. The +-exact syntax should differ a little from the example. +- +- +-File: grub.info, Node: Serial terminal, Next: Preset Menu, Prev: Network, Up: Top +- +-7 Using GRUB via a serial line +-****************************** +- +-This chapter describes how to use the serial terminal support in GRUB. +- +- If you have many computers or computers with no display/keyboard, it +-could be very useful to control the computers through serial +-communications. To connect one computer with another via a serial line, +-you need to prepare a null-modem (cross) serial cable, and you may need +-to have multiport serial boards, if your computer doesn't have extra +-serial ports. In addition, a terminal emulator is also required, such as +-minicom. Refer to a manual of your operating system, for more +-information. +- +- As for GRUB, the instruction to set up a serial terminal is quite +-simple. First of all, make sure that you haven't specified the option +-`--disable-serial' to the configure script when you built your GRUB +-images. If you get them in binary form, probably they have serial +-terminal support already. +- +- Then, initialize your serial terminal after GRUB starts up. Here is +-an example: +- +- grub> serial --unit=0 --speed=9600 +- grub> terminal serial +- +- The command `serial' initializes the serial unit 0 with the speed +-9600bps. The serial unit 0 is usually called `COM1', so, if you want to +-use COM2, you must specify `--unit=1' instead. This command accepts +-many other options, so please refer to *Note serial::, for more details. +- +- The command `terminal' (*note terminal::) chooses which type of +-terminal you want to use. In the case above, the terminal will be a +-serial terminal, but you can also pass `console' to the command, as +-`terminal serial console'. In this case, a terminal in which you press +-any key will be selected as a GRUB terminal. +- +- However, note that GRUB assumes that your terminal emulator is +-compatible with VT100 by default. This is true for most terminal +-emulators nowadays, but you should pass the option `--dumb' to the +-command if your terminal emulator is not VT100-compatible or implements +-few VT100 escape sequences. If you specify this option then GRUB +-provides you with an alternative menu interface, because the normal +-menu requires several fancy features of your terminal. +- +- +-File: grub.info, Node: Preset Menu, Next: Security, Prev: Serial terminal, Up: Top +- +-8 Embedding a configuration file into GRUB +-****************************************** +- +-GRUB supports a "preset menu" which is to be always loaded before +-starting. The preset menu feature is useful, for example, when your +-computer has no console but a serial cable. In this case, it is +-critical to set up the serial terminal as soon as possible, since you +-cannot see any message until the serial terminal begins to work. So it +-is good to run the commands `serial' (*note serial::) and `terminal' +-(*note terminal::) before anything else at the start-up time. +- +- How the preset menu works is slightly complicated: +- +- 1. GRUB checks if the preset menu feature is used, and loads the +- preset menu, if available. This includes running commands and +- reading boot entries, like an ordinary configuration file. +- +- 2. GRUB checks if the configuration file is available. Note that this +- check is performed *regardless of the existence of the preset +- menu*. The configuration file is loaded even if the preset menu was +- loaded. +- +- 3. If the preset menu includes any boot entries, they are cleared when +- the configuration file is loaded. It doesn't matter whether the +- configuration file has any entries or no entry. The boot entries +- in the preset menu are used only when GRUB fails in loading the +- configuration file. +- +- To enable the preset menu feature, you must rebuild GRUB specifying a +-file to the configure script with the option `--enable-preset-menu'. +-The file has the same semantics as normal configuration files (*note +-Configuration::). +- +- Another point you should take care is that the diskless support +-(*note Diskless::) diverts the preset menu. Diskless images embed a +-preset menu to execute the command `bootp' (*note bootp::) +-automatically, unless you specify your own preset menu to the configure +-script. This means that you must put commands to initialize a network in +-the preset menu yourself, because diskless images don't set it up +-implicitly, when you use the preset menu explicitly. +- +- Therefore, a typical preset menu used with diskless support would be +-like this: +- +- # Set up the serial terminal, first of all. +- serial --unit=0 --speed=19200 +- terminal --timeout=0 serial +- +- # Initialize the network. +- dhcp +- +- +-File: grub.info, Node: Security, Next: Images, Prev: Preset Menu, Up: Top +- +-9 Protecting your computer from cracking +-**************************************** +- +-You may be interested in how to prevent ordinary users from doing +-whatever they like, if you share your computer with other people. So +-this chapter describes how to improve the security of GRUB. +- +- One thing which could be a security hole is that the user can do too +-many things with GRUB, because GRUB allows one to modify its +-configuration and run arbitrary commands at run-time. For example, the +-user can even read `/etc/passwd' in the command-line interface by the +-command `cat' (*note cat::). So it is necessary to disable all the +-interactive operations. +- +- Thus, GRUB provides a "password" feature, so that only administrators +-can start the interactive operations (i.e. editing menu entries and +-entering the command-line interface). To use this feature, you need to +-run the command `password' in your configuration file (*note +-password::), like this: +- +- password --md5 PASSWORD +- +- If this is specified, GRUB disallows any interactive control, until +-you press the key <p> and enter a correct password. The option `--md5' +-tells GRUB that `PASSWORD' is in MD5 format. If it is omitted, GRUB +-assumes the `PASSWORD' is in clear text. +- +- You can encrypt your password with the command `md5crypt' (*note +-md5crypt::). For example, run the grub shell (*note Invoking the grub +-shell::), and enter your password: +- +- grub> md5crypt +- Password: ********** +- Encrypted: $1$U$JK7xFegdxWH6VuppCUSIb. +- +- Then, cut and paste the encrypted password to your configuration +-file. +- +- Also, you can specify an optional argument to `password'. See this +-example: +- +- password PASSWORD /boot/grub/menu-admin.lst +- +- In this case, GRUB will load `/boot/grub/menu-admin.lst' as a +-configuration file when you enter the valid password. +- +- Another thing which may be dangerous is that any user can choose any +-menu entry. Usually, this wouldn't be problematic, but you might want to +-permit only administrators to run some of your menu entries, such as an +-entry for booting an insecure OS like DOS. +- +- GRUB provides the command `lock' (*note lock::). This command always +-fails until you enter the valid password, so you can use it, like this: +- +- title Boot DOS +- lock +- rootnoverify (hd0,1) +- makeactive +- chainload +1 +- +- You should insert `lock' right after `title', because any user can +-execute commands in an entry until GRUB encounters `lock'. +- +- You can also use the command `password' instead of `lock'. In this +-case the boot process will ask for the password and stop if it was +-entered incorrectly. Since the `password' takes its own PASSWORD +-argument this is useful if you want different passwords for different +-entries. +- +- +-File: grub.info, Node: Images, Next: Filesystem, Prev: Security, Up: Top +- +-10 GRUB image files +-******************* +- +-GRUB consists of several images: two essential stages, optional stages +-called "Stage 1.5", one image for bootable CD-ROM, and two network boot +-images. Here is a short overview of them. *Note Internals::, for more +-details. +- +-`stage1' +- This is an essential image used for booting up GRUB. Usually, this +- is embedded in an MBR or the boot sector of a partition. Because a +- PC boot sector is 512 bytes, the size of this image is exactly 512 +- bytes. +- +- All `stage1' must do is to load Stage 2 or Stage 1.5 from a local +- disk. Because of the size restriction, `stage1' encodes the +- location of Stage 2 (or Stage 1.5) in a block list format, so it +- never understand any filesystem structure. +- +-`stage2' +- This is the core image of GRUB. It does everything but booting up +- itself. Usually, this is put in a filesystem, but that is not +- required. +- +-`e2fs_stage1_5' +-`fat_stage1_5' +-`ffs_stage1_5' +-`jfs_stage1_5' +-`minix_stage1_5' +-`reiserfs_stage1_5' +-`vstafs_stage1_5' +-`xfs_stage1_5' +- These are called "Stage 1.5", because they serve as a bridge +- between `stage1' and `stage2', that is to say, Stage 1.5 is loaded +- by Stage 1 and Stage 1.5 loads Stage 2. The difference between +- `stage1' and `*_stage1_5' is that the former doesn't understand +- any filesystem while the latter understands one filesystem (e.g. +- `e2fs_stage1_5' understands ext2fs). So you can move the Stage 2 +- image to another location safely, even after GRUB has been +- installed. +- +- While Stage 2 cannot generally be embedded in a fixed area as the +- size is so large, Stage 1.5 can be installed into the area right +- after an MBR, or the boot loader area of a ReiserFS or a FFS. +- +-`stage2_eltorito' +- This is a boot image for CD-ROMs using the "no emulation mode" in +- El Torito specification. This is identical to Stage 2, except that +- this boots up without Stage 1 and sets up a special drive `(cd)'. +- +-`nbgrub' +- This is a network boot image for the Network Image Proposal used +- by some network boot loaders, such as Etherboot. This is mostly +- the same as Stage 2, but it also sets up a network and loads a +- configuration file from the network. +- +-`pxegrub' +- This is another network boot image for the Preboot Execution +- Environment used by several Netboot ROMs. This is identical to +- `nbgrub', except for the format. +- +- +-File: grub.info, Node: Filesystem, Next: Interface, Prev: Images, Up: Top +- +-11 Filesystem syntax and semantics +-********************************** +- +-GRUB uses a special syntax for specifying disk drives which can be +-accessed by BIOS. Because of BIOS limitations, GRUB cannot distinguish +-between IDE, ESDI, SCSI, or others. You must know yourself which BIOS +-device is equivalent to which OS device. Normally, that will be clear if +-you see the files in a device or use the command `find' (*note find::). +- +-* Menu: +- +-* Device syntax:: How to specify devices +-* File name syntax:: How to specify files +-* Block list syntax:: How to specify block lists +- +- +-File: grub.info, Node: Device syntax, Next: File name syntax, Up: Filesystem +- +-11.1 How to specify devices +-=========================== +- +-The device syntax is like this: +- +- `(DEVICE[,PART-NUM][,BSD-SUBPART-LETTER])' +- +- `[]' means the parameter is optional. DEVICE should be either `fd' +-or `hd' followed by a digit, like `fd0'. But you can also set DEVICE +-to a hexadecimal or a decimal number which is a BIOS drive number, so +-the following are equivalent: +- +- (hd0) +- (0x80) +- (128) +- +- PART-NUM represents the partition number of DEVICE, starting from +-zero for primary partitions and from four for extended partitions, and +-BSD-SUBPART-LETTER represents the BSD disklabel subpartition, such as +-`a' or `e'. +- +- A shortcut for specifying BSD subpartitions is +-`(DEVICE,BSD-SUBPART-LETTER)', in this case, GRUB searches for the +-first PC partition containing a BSD disklabel, then finds the +-subpartition BSD-SUBPART-LETTER. Here is an example: +- +- (hd0,a) +- +- The syntax `(hd0)' represents using the entire disk (or the MBR when +-installing GRUB), while the syntax `(hd0,0)' represents using the first +-partition of the disk (or the boot sector of the partition when +-installing GRUB). +- +- If you enabled the network support, the special drive, `(nd)', is +-also available. Before using the network drive, you must initialize the +-network. *Note Network::, for more information. +- +- If you boot GRUB from a CD-ROM, `(cd)' is available. *Note Making a +-GRUB bootable CD-ROM::, for details. +- +- +-File: grub.info, Node: File name syntax, Next: Block list syntax, Prev: Device syntax, Up: Filesystem +- +-11.2 How to specify files +-========================= +- +-There are two ways to specify files, by "absolute file name" and by +-"block list". +- +- An absolute file name resembles a Unix absolute file name, using `/' +-for the directory separator (not `\' as in DOS). One example is +-`(hd0,0)/boot/grub/grub.conf'. This means the file +-`/boot/grub/grub.conf' in the first partition of the first hard disk. +-If you omit the device name in an absolute file name, GRUB uses GRUB's +-"root device" implicitly. So if you set the root device to, say, +-`(hd1,0)' by the command `root' (*note root::), then `/boot/kernel' is +-the same as `(hd1,0)/boot/kernel'. +- +- +-File: grub.info, Node: Block list syntax, Prev: File name syntax, Up: Filesystem +- +-11.3 How to specify block lists +-=============================== +- +-A block list is used for specifying a file that doesn't appear in the +-filesystem, like a chainloader. The syntax is +-`[OFFSET]+LENGTH[,[OFFSET]+LENGTH]...'. Here is an example: +- +- `0+100,200+1,300+300' +- +- This represents that GRUB should read blocks 0 through 99, block 200, +-and blocks 300 through 599. If you omit an offset, then GRUB assumes +-the offset is zero. +- +- Like the file name syntax (*note File name syntax::), if a blocklist +-does not contain a device name, then GRUB uses GRUB's "root device". So +-`(hd0,1)+1' is the same as `+1' when the root device is `(hd0,1)'. +- +- +-File: grub.info, Node: Interface, Next: Commands, Prev: Filesystem, Up: Top +- +-12 GRUB's user interface +-************************ +- +-GRUB has both a simple menu interface for choosing preset entries from a +-configuration file, and a highly flexible command-line for performing +-any desired combination of boot commands. +- +- GRUB looks for its configuration file as soon as it is loaded. If one +-is found, then the full menu interface is activated using whatever +-entries were found in the file. If you choose the "command-line" menu +-option, or if the configuration file was not found, then GRUB drops to +-the command-line interface. +- +-* Menu: +- +-* Command-line interface:: The flexible command-line interface +-* Menu interface:: The simple menu interface +-* Menu entry editor:: Editing a menu entry +-* Hidden menu interface:: The hidden menu interface +- +- +-File: grub.info, Node: Command-line interface, Next: Menu interface, Up: Interface +- +-12.1 The flexible command-line interface +-======================================== +- +-The command-line interface provides a prompt and after it an editable +-text area much like a command-line in Unix or DOS. Each command is +-immediately executed after it is entered(1) (*note Command-line +-interface-Footnote-1::). The commands (*note Command-line and menu +-entry commands::) are a subset of those available in the configuration +-file, used with exactly the same syntax. +- +- Cursor movement and editing of the text on the line can be done via a +-subset of the functions available in the Bash shell: +- +-<C-f> +-<PC right key> +- Move forward one character. +- +-<C-b> +-<PC left key> +- Move back one character. +- +-<C-a> +-<HOME> +- Move to the start of the line. +- +-<C-e> +-<END> +- Move the the end of the line. +- +-<C-d> +-<DEL> +- Delete the character underneath the cursor. +- +-<C-h> +-<BS> +- Delete the character to the left of the cursor. +- +-<C-k> +- Kill the text from the current cursor position to the end of the +- line. +- +-<C-u> +- Kill backward from the cursor to the beginning of the line. +- +-<C-y> +- Yank the killed text back into the buffer at the cursor. +- +-<C-p> +-<PC up key> +- Move up through the history list. +- +-<C-n> +-<PC down key> +- Move down through the history list. +- +- When typing commands interactively, if the cursor is within or before +-the first word in the command-line, pressing the <TAB> key (or <C-i>) +-will display a listing of the available commands, and if the cursor is +-after the first word, the `<TAB>' will provide a completion listing of +-disks, partitions, and file names depending on the context. Note that +-to obtain a list of drives, one must open a parenthesis, as `root ('. +- +- Note that you cannot use the completion functionality in the TFTP +-filesystem. This is because TFTP doesn't support file name listing for +-the security. +- +- +-File: grub.info, Node: Command-line interface-Footnotes, Up: Command-line interface +- +- (1) However, this behavior will be changed in the future version, in +-a user-invisible way. +- +- +-File: grub.info, Node: Menu interface, Next: Menu entry editor, Prev: Command-line interface, Up: Interface +- +-12.2 The simple menu interface +-============================== +- +-The menu interface is quite easy to use. Its commands are both +-reasonably intuitive and described on screen. +- +- Basically, the menu interface provides a list of "boot entries" to +-the user to choose from. Use the arrow keys to select the entry of +-choice, then press <RET> to run it. An optional timeout is available +-to boot the default entry (the first one if not set), which is aborted +-by pressing any key. +- +- Commands are available to enter a bare command-line by pressing <c> +-(which operates exactly like the non-config-file version of GRUB, but +-allows one to return to the menu if desired by pressing <ESC>) or to +-edit any of the "boot entries" by pressing <e>. +- +- If you protect the menu interface with a password (*note Security::), +-all you can do is choose an entry by pressing <RET>, or press <p> to +-enter the password. +- +- +-File: grub.info, Node: Menu entry editor, Next: Hidden menu interface, Prev: Menu interface, Up: Interface +- +-12.3 Editing a menu entry +-========================= +- +-The menu entry editor looks much like the main menu interface, but the +-lines in the menu are individual commands in the selected entry instead +-of entry names. +- +- If an <ESC> is pressed in the editor, it aborts all the changes made +-to the configuration entry and returns to the main menu interface. +- +- When a particular line is selected, the editor places the user in a +-special version of the GRUB command-line to edit that line. When the +-user hits <RET>, GRUB replaces the line in question in the boot entry +-with the changes (unless it was aborted via <ESC>, in which case the +-changes are thrown away). +- +- If you want to add a new line to the menu entry, press <o> if adding +-a line after the current line or press <O> if before the current line. +- +- To delete a line, hit the key <d>. Although GRUB unfortunately does +-not support "undo", you can do almost the same thing by just returning +-to the main menu. +- +- +-File: grub.info, Node: Hidden menu interface, Prev: Menu entry editor, Up: Interface +- +-12.4 The hidden menu interface +-============================== +- +-When your terminal is dumb or you request GRUB to hide the menu +-interface explicitly with the command `hiddenmenu' (*note +-hiddenmenu::), GRUB doesn't show the menu interface (*note Menu +-interface::) and automatically boots the default entry, unless +-interrupted by pressing <ESC>. +- +- When you interrupt the timeout and your terminal is dumb, GRUB falls +-back to the command-line interface (*note Command-line interface::). +- +- +-File: grub.info, Node: Commands, Next: Troubleshooting, Prev: Interface, Up: Top +- +-13 The list of available commands +-********************************* +- +-In this chapter, we list all commands that are available in GRUB. +- +- Commands belong to different groups. A few can only be used in the +-global section of the configuration file (or "menu"); most of them can +-be entered on the command-line and can be used either anywhere in the +-menu or specifically in the menu entries. +- +-* Menu: +- +-* Menu-specific commands:: +-* General commands:: +-* Command-line and menu entry commands:: +- +- +-File: grub.info, Node: Menu-specific commands, Next: General commands, Up: Commands +- +-13.1 The list of commands for the menu only +-=========================================== +- +-The semantics used in parsing the configuration file are the following: +- +- * The menu-specific commands have to be used before any others. +- +- * The files _must_ be in plain-text format. +- +- * `#' at the beginning of a line in a configuration file means it is +- only a comment. +- +- * Options are separated by spaces. +- +- * All numbers can be either decimal or hexadecimal. A hexadecimal +- number must be preceded by `0x', and is case-insensitive. +- +- * Extra options or text at the end of the line are ignored unless +- otherwise specified. +- +- * Unrecognized commands are added to the current entry, except +- before entries start, where they are ignored. +- +- These commands can only be used in the menu: +- +-* Menu: +- +-* default:: Set the default entry +-* fallback:: Set the fallback entry +-* hiddenmenu:: Hide the menu interface +-* timeout:: Set the timeout +-* title:: Start a menu entry +- +- +-File: grub.info, Node: default, Next: fallback, Up: Menu-specific commands +- +-13.1.1 default +--------------- +- +- -- Command: default num +- Set the default entry to the entry number NUM. Numbering starts +- from 0, and the entry number 0 is the default if the command is not +- used. +- +- You can specify `saved' instead of a number. In this case, the +- default entry is the entry saved with the command `savedefault'. +- *Note savedefault::, for more information. +- +- +-File: grub.info, Node: fallback, Next: hiddenmenu, Prev: default, Up: Menu-specific commands +- +-13.1.2 fallback +---------------- +- +- -- Command: fallback num... +- Go into unattended boot mode: if the default boot entry has any +- errors, instead of waiting for the user to do something, +- immediately start over using the NUM entry (same numbering as the +- `default' command (*note default::)). This obviously won't help if +- the machine was rebooted by a kernel that GRUB loaded. You can +- specify multiple fallback entry numbers. +- +- +-File: grub.info, Node: hiddenmenu, Next: timeout, Prev: fallback, Up: Menu-specific commands +- +-13.1.3 hiddenmenu +------------------ +- +- -- Command: hiddenmenu +- Don't display the menu. If the command is used, no menu will be +- displayed on the control terminal, and the default entry will be +- booted after the timeout expired. The user can still request the +- menu to be displayed by pressing <ESC> before the timeout expires. +- See also *Note Hidden menu interface::. +- +- +-File: grub.info, Node: timeout, Next: title, Prev: hiddenmenu, Up: Menu-specific commands +- +-13.1.4 timeout +--------------- +- +- -- Command: timeout sec +- Set a timeout, in SEC seconds, before automatically booting the +- default entry (normally the first entry defined). +- +- +-File: grub.info, Node: title, Prev: timeout, Up: Menu-specific commands +- +-13.1.5 title +------------- +- +- -- Command: title name ... +- Start a new boot entry, and set its name to the contents of the +- rest of the line, starting with the first non-space character. +- +- +-File: grub.info, Node: General commands, Next: Command-line and menu entry commands, Prev: Menu-specific commands, Up: Commands +- +-13.2 The list of general commands +-================================= +- +-Commands usable anywhere in the menu and in the command-line. +- +-* Menu: +- +-* bootp:: Initialize a network device via BOOTP +-* color:: Color the menu interface +-* device:: Specify a file as a drive +-* dhcp:: Initialize a network device via DHCP +-* hide:: Hide a partition +-* ifconfig:: Configure a network device manually +-* pager:: Change the state of the internal pager +-* partnew:: Make a primary partition +-* parttype:: Change the type of a partition +-* password:: Set a password for the menu interface +-* rarp:: Initialize a network device via RARP +-* serial:: Set up a serial device +-* setkey:: Configure the key map +-* splashimage:: Use a splash image +-* terminal:: Choose a terminal +-* terminfo:: Define escape sequences for a terminal +-* tftpserver:: Specify a TFTP server +-* unhide:: Unhide a partition +- +- +-File: grub.info, Node: bootp, Next: color, Up: General commands +- +-13.2.1 bootp +------------- +- +- -- Command: bootp [`--with-configfile'] +- Initialize a network device via the "BOOTP" protocol. This command +- is only available if GRUB is compiled with netboot support. See +- also *Note Network::. +- +- If you specify `--with-configfile' to this command, GRUB will +- fetch and load a configuration file specified by your BOOTP server +- with the vendor tag `150'. +- +- +-File: grub.info, Node: color, Next: device, Prev: bootp, Up: General commands +- +-13.2.2 color +------------- +- +- -- Command: color normal [highlight] +- Change the menu colors. The color NORMAL is used for most lines in +- the menu (*note Menu interface::), and the color HIGHLIGHT is used +- to highlight the line where the cursor points. If you omit +- HIGHLIGHT, then the inverted color of NORMAL is used for the +- highlighted line. The format of a color is +- `FOREGROUND/BACKGROUND'. FOREGROUND and BACKGROUND are symbolic +- color names. A symbolic color name must be one of these: +- +- * black +- +- * blue +- +- * green +- +- * cyan +- +- * red +- +- * magenta +- +- * brown +- +- * light-gray +- +- *These below can be specified only for the foreground.* +- +- * dark-gray +- +- * light-blue +- +- * light-green +- +- * light-cyan +- +- * light-red +- +- * light-magenta +- +- * yellow +- +- * white +- +- But only the first eight names can be used for BACKGROUND. You can +- prefix `blink-' to FOREGROUND if you want a blinking foreground +- color. +- +- This command can be used in the configuration file and on the +- command line, so you may write something like this in your +- configuration file: +- +- # Set default colors. +- color light-gray/blue black/light-gray +- +- # Change the colors. +- title OS-BS like +- color magenta/blue black/magenta +- +- +-File: grub.info, Node: device, Next: dhcp, Prev: color, Up: General commands +- +-13.2.3 device +-------------- +- +- -- Command: device drive file +- In the grub shell, specify the file FILE as the actual drive for a +- BIOS drive DRIVE. You can use this command to create a disk image, +- and/or to fix the drives guessed by GRUB when GRUB fails to +- determine them correctly, like this: +- +- grub> device (fd0) /floppy-image +- grub> device (hd0) /dev/sd0 +- +- This command can be used only in the grub shell (*note Invoking +- the grub shell::). +- +- +-File: grub.info, Node: dhcp, Next: hide, Prev: device, Up: General commands +- +-13.2.4 dhcp +------------ +- +- -- Command: dhcp [-with-configfile] +- Initialize a network device via the "DHCP" protocol. Currently, +- this command is just an alias for `bootp', since the two protocols +- are very similar. This command is only available if GRUB is +- compiled with netboot support. See also *Note Network::. +- +- If you specify `--with-configfile' to this command, GRUB will +- fetch and load a configuration file specified by your DHCP server +- with the vendor tag `150'. +- +- +-File: grub.info, Node: hide, Next: ifconfig, Prev: dhcp, Up: General commands +- +-13.2.5 hide +------------ +- +- -- Command: hide partition +- Hide the partition PARTITION by setting the "hidden" bit in its +- partition type code. This is useful only when booting DOS or +- Windows and multiple primary FAT partitions exist in one disk. See +- also *Note DOS/Windows::. +- +- +-File: grub.info, Node: ifconfig, Next: pager, Prev: hide, Up: General commands +- +-13.2.6 ifconfig +---------------- +- +- -- Command: ifconfig [`--server=server'] [`--gateway=gateway'] +- [`--mask=mask'] [`--address=address'] +- Configure the IP address, the netmask, the gateway, and the server +- address of a network device manually. The values must be in dotted +- decimal format, like `192.168.11.178'. The order of the options is +- not important. This command shows current network configuration, +- if no option is specified. See also *Note Network::. +- +- +-File: grub.info, Node: pager, Next: partnew, Prev: ifconfig, Up: General commands +- +-13.2.7 pager +------------- +- +- -- Command: pager [flag] +- Toggle or set the state of the internal pager. If FLAG is `on', +- the internal pager is enabled. If FLAG is `off', it is disabled. +- If no argument is given, the state is toggled. +- +- +-File: grub.info, Node: partnew, Next: parttype, Prev: pager, Up: General commands +- +-13.2.8 partnew +--------------- +- +- -- Command: partnew part type from len +- Create a new primary partition. PART is a partition specification +- in GRUB syntax (*note Naming convention::); TYPE is the partition +- type and must be a number in the range `0-0xff'; FROM is the +- starting address and LEN is the length, both in sector units. +- +- +-File: grub.info, Node: parttype, Next: password, Prev: partnew, Up: General commands +- +-13.2.9 parttype +---------------- +- +- -- Command: parttype part type +- Change the type of an existing partition. PART is a partition +- specification in GRUB syntax (*note Naming convention::); TYPE is +- the new partition type and must be a number in the range 0-0xff. +- +- +-File: grub.info, Node: password, Next: rarp, Prev: parttype, Up: General commands +- +-13.2.10 password +----------------- +- +- -- Command: password [`--md5'] passwd [new-config-file] +- If used in the first section of a menu file, disable all +- interactive editing control (menu entry editor and command-line) +- and entries protected by the command `lock'. If the password +- PASSWD is entered, it loads the NEW-CONFIG-FILE as a new config +- file and restarts the GRUB Stage 2, if NEW-CONFIG-FILE is +- specified. Otherwise, GRUB will just unlock the privileged +- instructions. You can also use this command in the script +- section, in which case it will ask for the password, before +- continuing. The option `--md5' tells GRUB that PASSWD is +- encrypted with `md5crypt' (*note md5crypt::). +- +- +-File: grub.info, Node: rarp, Next: serial, Prev: password, Up: General commands +- +-13.2.11 rarp +------------- +- +- -- Command: rarp +- Initialize a network device via the "RARP" protocol. This command +- is only available if GRUB is compiled with netboot support. See +- also *Note Network::. +- +- +-File: grub.info, Node: serial, Next: setkey, Prev: rarp, Up: General commands +- +-13.2.12 serial +--------------- +- +- -- Command: serial [`--unit=unit'] [`--port=port'] [`--speed=speed'] +- [`--word=word'] [`--parity=parity'] [`--stop=stop'] +- [`--device=dev'] +- Initialize a serial device. UNIT is a number in the range 0-3 +- specifying which serial port to use; default is 0, which +- corresponds to the port often called COM1. PORT is the I/O port +- where the UART is to be found; if specified it takes precedence +- over UNIT. SPEED is the transmission speed; default is 9600. WORD +- and STOP are the number of data bits and stop bits. Data bits must +- be in the range 5-8 and stop bits must be 1 or 2. Default is 8 data +- bits and one stop bit. PARITY is one of `no', `odd', `even' and +- defaults to `no'. The option `--device' can only be used in the +- grub shell and is used to specify the tty device to be used in the +- host operating system (*note Invoking the grub shell::). +- +- The serial port is not used as a communication channel unless the +- `terminal' command is used (*note terminal::). +- +- This command is only available if GRUB is compiled with serial +- support. See also *Note Serial terminal::. +- +- +-File: grub.info, Node: setkey, Next: splashimage, Prev: serial, Up: General commands +- +-13.2.13 setkey +--------------- +- +- -- Command: setkey [to_key from_key] +- Change the keyboard map. The key FROM_KEY is mapped to the key +- TO_KEY. If no argument is specified, reset key mappings. Note that +- this command _does not_ exchange the keys. If you want to exchange +- the keys, run this command again with the arguments exchanged, +- like this: +- +- grub> setkey capslock control +- grub> setkey control capslock +- +- A key must be an alphabet letter, a digit, or one of these symbols: +- `escape', `exclam', `at', `numbersign', `dollar', `percent', +- `caret', `ampersand', `asterisk', `parenleft', `parenright', +- `minus', `underscore', `equal', `plus', `backspace', `tab', +- `bracketleft', `braceleft', `bracketright', `braceright', `enter', +- `control', `semicolon', `colon', `quote', `doublequote', +- `backquote', `tilde', `shift', `backslash', `bar', `comma', +- `less', `period', `greater', `slash', `question', `alt', `space', +- `capslock', `FX' (`X' is a digit), and `delete'. This table +- describes to which character each of the symbols corresponds: +- +- `exclam' +- `!' +- +- `at' +- `@' +- +- `numbersign' +- `#' +- +- `dollar' +- `$' +- +- `percent' +- `%' +- +- `caret' +- `^' +- +- `ampersand' +- `&' +- +- `asterisk' +- `*' +- +- `parenleft' +- `(' +- +- `parenright' +- `)' +- +- `minus' +- `-' +- +- `underscore' +- `_' +- +- `equal' +- `=' +- +- `plus' +- `+' +- +- `bracketleft' +- `[' +- +- `braceleft' +- `{' +- +- `bracketright' +- `]' +- +- `braceright' +- `}' +- +- `semicolon' +- `;' +- +- `colon' +- `:' +- +- `quote' +- `'' +- +- `doublequote' +- `"' +- +- `backquote' +- ``' +- +- `tilde' +- `~' +- +- `backslash' +- `\' +- +- `bar' +- `|' +- +- `comma' +- `,' +- +- `less' +- `<' +- +- `period' +- `.' +- +- `greater' +- `>' +- +- `slash' +- `/' +- +- `question' +- `?' +- +- `space' +- ` ' +- +- +-File: grub.info, Node: splashimage, Next: terminal, Prev: setkey, Up: General commands +- +-13.2.14 splashimage +-------------------- +- +- -- Command: splashimage file +- Select an image to use as the background image. This should be +- specified using normal GRUB device naming syntax. The format of +- the file is a gzipped xpm which is 640x480 with a 14 color palette. +- +- +-File: grub.info, Node: terminal, Next: terminfo, Prev: splashimage, Up: General commands +- +-13.2.15 terminal +----------------- +- +- -- Command: terminal [`--dumb'] [`--no-echo'] [`--no-edit'] +- [`--timeout=secs'] [`--lines=lines'] [`--silent'] [`console'] +- [`serial'] [`hercules'] +- Select a terminal for user interaction. The terminal is assumed to +- be VT100-compatible unless `--dumb' is specified. If both +- `console' and `serial' are specified, then GRUB will use the one +- where a key is entered first or the first when the timeout +- expires. If neither are specified, the current setting is +- reported. This command is only available if GRUB is compiled with +- serial support. See also *Note Serial terminal::. +- +- This may not make sense for most users, but GRUB supports Hercules +- console as well. Hercules console is usable like the ordinary +- console, and the usage is quite similar to that for serial +- terminals: specify `hercules' as the argument. +- +- The option `--lines' defines the number of lines in your terminal, +- and it is used for the internal pager function. If you don't +- specify this option, the number is assumed as 24. +- +- The option `--silent' suppresses the message to prompt you to hit +- any key. This might be useful if your system has no terminal +- device. +- +- The option `--no-echo' has GRUB not to echo back input characters. +- This implies the option `--no-edit'. +- +- The option `--no-edit' disables the BASH-like editing feature. +- +- +-File: grub.info, Node: terminfo, Next: tftpserver, Prev: terminal, Up: General commands +- +-13.2.16 terminfo +----------------- +- +- -- Command: terminfo `--name=name' `--cursor-address=seq' +- [`--clear-screen=seq'] [`--enter-standout-mode=seq'] +- [`--exit-standout-mode=seq'] +- Define the capabilities of your terminal. Use this command to +- define escape sequences, if it is not vt100-compatible. You may +- use `\e' for <ESC> and `^X' for a control character. +- +- You can use the utility `grub-terminfo' to generate appropriate +- arguments to this command. *Note Invoking grub-terminfo::. +- +- If no option is specified, the current settings are printed. +- +- +-File: grub.info, Node: tftpserver, Next: unhide, Prev: terminfo, Up: General commands +- +-13.2.17 tftpserver +------------------- +- +- -- Command: tftpserver ipaddr +- *Caution:* This command exists only for backward compatibility. +- Use `ifconfig' (*note ifconfig::) instead. +- +- Override a TFTP server address returned by a BOOTP/DHCP/RARP +- server. The argument IPADDR must be in dotted decimal format, like +- `192.168.0.15'. This command is only available if GRUB is compiled +- with netboot support. See also *Note Network::. +- +- +-File: grub.info, Node: unhide, Prev: tftpserver, Up: General commands +- +-13.2.18 unhide +--------------- +- +- -- Command: unhide partition +- Unhide the partition PARTITION by clearing the "hidden" bit in its +- partition type code. This is useful only when booting DOS or +- Windows and multiple primary partitions exist on one disk. See also +- *Note DOS/Windows::. +- +- +-File: grub.info, Node: Command-line and menu entry commands, Prev: General commands, Up: Commands +- +-13.3 The list of command-line and menu entry commands +-===================================================== +- +-These commands are usable in the command-line and in menu entries. If +-you forget a command, you can run the command `help' (*note help::). +- +-* Menu: +- +-* blocklist:: Get the block list notation of a file +-* boot:: Start up your operating system +-* cat:: Show the contents of a file +-* chainloader:: Chain-load another boot loader +-* cmp:: Compare two files +-* configfile:: Load a configuration file +-* debug:: Toggle the debug flag +-* displayapm:: Display APM information +-* displaymem:: Display memory configuration +-* embed:: Embed Stage 1.5 +-* find:: Find a file +-* fstest:: Test a filesystem +-* geometry:: Manipulate the geometry of a drive +-* halt:: Shut down your computer +-* help:: Show help messages +-* impsprobe:: Probe SMP +-* initrd:: Load an initrd +-* install:: Install GRUB +-* ioprobe:: Probe I/O ports used for a drive +-* kernel:: Load a kernel +-* lock:: Lock a menu entry +-* makeactive:: Make a partition active +-* map:: Map a drive to another +-* md5crypt:: Encrypt a password in MD5 format +-* module:: Load a module +-* modulenounzip:: Load a module without decompression +-* pause:: Wait for a key press +-* quit:: Exit from the grub shell +-* reboot:: Reboot your computer +-* read:: Read data from memory +-* root:: Set GRUB's root device +-* rootnoverify:: Set GRUB's root device without mounting +-* savedefault:: Save current entry as the default entry +-* setup:: Set up GRUB's installation automatically +-* testload:: Load a file for testing a filesystem +-* testvbe:: Test VESA BIOS EXTENSION +-* uppermem:: Set the upper memory size +-* vbeprobe:: Probe VESA BIOS EXTENSION +- +- +-File: grub.info, Node: blocklist, Next: boot, Up: Command-line and menu entry commands +- +-13.3.1 blocklist +----------------- +- +- -- Command: blocklist file +- Print the block list notation of the file FILE. *Note Block list +- syntax::. +- +- +-File: grub.info, Node: boot, Next: cat, Prev: blocklist, Up: Command-line and menu entry commands +- +-13.3.2 boot +------------ +- +- -- Command: boot +- Boot the OS or chain-loader which has been loaded. Only necessary +- if running the fully interactive command-line (it is implicit at +- the end of a menu entry). +- +- +-File: grub.info, Node: cat, Next: chainloader, Prev: boot, Up: Command-line and menu entry commands +- +-13.3.3 cat +----------- +- +- -- Command: cat file +- Display the contents of the file FILE. This command may be useful +- to remind you of your OS's root partition: +- +- grub> cat /etc/fstab +- +- +-File: grub.info, Node: chainloader, Next: cmp, Prev: cat, Up: Command-line and menu entry commands +- +-13.3.4 chainloader +------------------- +- +- -- Command: chainloader [`--force'] file +- Load FILE as a chain-loader. Like any other file loaded by the +- filesystem code, it can use the blocklist notation to grab the +- first sector of the current partition with `+1'. If you specify the +- option `--force', then load FILE forcibly, whether it has a +- correct signature or not. This is required when you want to load a +- defective boot loader, such as SCO UnixWare 7.1 (*note SCO +- UnixWare::). +- +- +-File: grub.info, Node: cmp, Next: configfile, Prev: chainloader, Up: Command-line and menu entry commands +- +-13.3.5 cmp +----------- +- +- -- Command: cmp file1 file2 +- Compare the file FILE1 with the file FILE2. If they differ in +- size, print the sizes like this: +- +- Differ in size: 0x1234 [foo], 0x4321 [bar] +- +- If the sizes are equal but the bytes at an offset differ, then +- print the bytes like this: +- +- Differ at the offset 777: 0xbe [foo], 0xef [bar] +- +- If they are completely identical, nothing will be printed. +- +- +-File: grub.info, Node: configfile, Next: debug, Prev: cmp, Up: Command-line and menu entry commands +- +-13.3.6 configfile +------------------ +- +- -- Command: configfile file +- Load FILE as a configuration file. +- +- +-File: grub.info, Node: debug, Next: displayapm, Prev: configfile, Up: Command-line and menu entry commands +- +-13.3.7 debug +------------- +- +- -- Command: debug +- Toggle debug mode (by default it is off). When debug mode is on, +- some extra messages are printed to show disk activity. This global +- debug flag is mainly useful for GRUB developers when testing new +- code. +- +- +-File: grub.info, Node: displayapm, Next: displaymem, Prev: debug, Up: Command-line and menu entry commands +- +-13.3.8 displayapm +------------------ +- +- -- Command: displayapm +- Display APM BIOS information. +- +- +-File: grub.info, Node: displaymem, Next: embed, Prev: displayapm, Up: Command-line and menu entry commands +- +-13.3.9 displaymem +------------------ +- +- -- Command: displaymem +- Display what GRUB thinks the system address space map of the +- machine is, including all regions of physical RAM installed. GRUB's +- "upper/lower memory" display uses the standard BIOS interface for +- the available memory in the first megabyte, or "lower memory", and +- a synthesized number from various BIOS interfaces of the memory +- starting at 1MB and going up to the first chipset hole for "upper +- memory" (the standard PC "upper memory" interface is limited to +- reporting a maximum of 64MB). +- +- +-File: grub.info, Node: embed, Next: find, Prev: displaymem, Up: Command-line and menu entry commands +- +-13.3.10 embed +-------------- +- +- -- Command: embed stage1_5 device +- Embed the Stage 1.5 STAGE1_5 in the sectors after the MBR if +- DEVICE is a drive, or in the "boot loader" area if DEVICE is a FFS +- partition or a ReiserFS partition.(1) (*note embed-Footnote-1::) +- Print the number of sectors which STAGE1_5 occupies, if successful. +- +- Usually, you don't need to run this command directly. *Note +- setup::. +- +- +-File: grub.info, Node: embed-Footnotes, Up: embed +- +- (1) The latter feature has not been implemented yet. +- +- +-File: grub.info, Node: find, Next: fstest, Prev: embed, Up: Command-line and menu entry commands +- +-13.3.11 find +------------- +- +- -- Command: find filename +- Search for the file name FILENAME in all mountable partitions and +- print the list of the devices which contain the file. The file +- name FILENAME should be an absolute file name like +- `/boot/grub/stage1'. +- +- +-File: grub.info, Node: fstest, Next: geometry, Prev: find, Up: Command-line and menu entry commands +- +-13.3.12 fstest +--------------- +- +- -- Command: fstest +- Toggle filesystem test mode. Filesystem test mode, when turned +- on, prints out data corresponding to all the device reads and what +- values are being sent to the low-level routines. The format is +- `<PARTITION-OFFSET-SECTOR, BYTE-OFFSET, BYTE-LENGTH>' for +- high-level reads inside a partition, and `[DISK-OFFSET-SECTOR]' +- for low-level sector requests from the disk. Filesystem test mode +- is turned off by any use of the `install' (*note install::) or +- `testload' (*note testload::) commands. +- +- +-File: grub.info, Node: geometry, Next: halt, Prev: fstest, Up: Command-line and menu entry commands +- +-13.3.13 geometry +----------------- +- +- -- Command: geometry drive [cylinder head sector [total_sector]] +- Print the information for the drive DRIVE. In the grub shell, you +- can set the geometry of the drive arbitrarily. The number of +- cylinders, the number of heads, the number of sectors and the +- number of total sectors are set to CYLINDER, HEAD, SECTOR and +- TOTAL_SECTOR, respectively. If you omit TOTAL_SECTOR, then it will +- be calculated based on the C/H/S values automatically. +- +- +-File: grub.info, Node: halt, Next: help, Prev: geometry, Up: Command-line and menu entry commands +- +-13.3.14 halt +------------- +- +- -- Command: halt `--no-apm' +- The command halts the computer. If the `--no-apm' option is +- specified, no APM BIOS call is performed. Otherwise, the computer +- is shut down using APM. +- +- +-File: grub.info, Node: help, Next: impsprobe, Prev: halt, Up: Command-line and menu entry commands +- +-13.3.15 help +------------- +- +- -- Command: help `--all' [pattern ...] +- Display helpful information about builtin commands. If you do not +- specify PATTERN, this command shows short descriptions of most of +- available commands. If you specify the option `--all' to this +- command, short descriptions of rarely used commands (such as *Note +- testload::) are displayed as well. +- +- If you specify any PATTERNS, it displays longer information about +- each of the commands which match those PATTERNS. +- +- +-File: grub.info, Node: impsprobe, Next: initrd, Prev: help, Up: Command-line and menu entry commands +- +-13.3.16 impsprobe +------------------ +- +- -- Command: impsprobe +- Probe the Intel Multiprocessor Specification 1.1 or 1.4 +- configuration table and boot the various CPUs which are found into +- a tight loop. This command can be used only in the Stage 2, but +- not in the grub shell. +- +- +-File: grub.info, Node: initrd, Next: install, Prev: impsprobe, Up: Command-line and menu entry commands +- +-13.3.17 initrd +--------------- +- +- -- Command: initrd file ... +- Load an initial ramdisk for a Linux format boot image and set the +- appropriate parameters in the Linux setup area in memory. See also +- *Note GNU/Linux::. +- +- +-File: grub.info, Node: install, Next: ioprobe, Prev: initrd, Up: Command-line and menu entry commands +- +-13.3.18 install +---------------- +- +- -- Command: install [`--force-lba'] [`--stage2=os_stage2_file'] +- stage1_file [`d'] dest_dev stage2_file [addr] [`p'] +- [config_file] [real_config_file] +- This command is fairly complex, and you should not use this command +- unless you are familiar with GRUB. Use `setup' (*note setup::) +- instead. +- +- In short, it will perform a full install presuming the Stage 2 or +- Stage 1.5(1) (*note install-Footnote-1::) is in its final install +- location. +- +- In slightly more detail, it will load STAGE1_FILE, validate that +- it is a GRUB Stage 1 of the right version number, install in it a +- blocklist for loading STAGE2_FILE as a Stage 2. If the option `d' +- is present, the Stage 1 will always look for the actual disk +- STAGE2_FILE was installed on, rather than using the booting drive. +- The Stage 2 will be loaded at address ADDR, which must be `0x8000' +- for a true Stage 2, and `0x2000' for a Stage 1.5. If ADDR is not +- present, GRUB will determine the address automatically. It then +- writes the completed Stage 1 to the first block of the device +- DEST_DEV. If the options `p' or CONFIG_FILE are present, then it +- reads the first block of stage2, modifies it with the values of +- the partition STAGE2_FILE was found on (for `p') or places the +- string CONFIG_FILE into the area telling the stage2 where to look +- for a configuration file at boot time. Likewise, if +- REAL_CONFIG_FILE is present and STAGE2_FILE is a Stage 1.5, then +- the Stage 2 CONFIG_FILE is patched with the configuration file +- name REAL_CONFIG_FILE. This command preserves the DOS BPB (and for +- hard disks, the partition table) of the sector the Stage 1 is to +- be installed into. +- +- *Caution:* Several buggy BIOSes don't pass a booting drive +- properly when booting from a hard disk drive. Therefore, you will +- unfortunately have to specify the option `d', whether your Stage2 +- resides at the booting drive or not, if you have such a BIOS. We +- know these are defective in this way: +- +- +- Fujitsu LifeBook 400 BIOS version 31J0103A +- +- +- HP Vectra XU 6/200 BIOS version GG.06.11 +- +- *Caution2:* A number of BIOSes don't return a correct LBA support +- bitmap even if they do have the support. So GRUB provides a +- solution to ignore the wrong bitmap, that is, the option +- `--force-lba'. Don't use this option if you know that your BIOS +- doesn't have LBA support. +- +- *Caution3:* You must specify the option `--stage2' in the grub +- shell, if you cannot unmount the filesystem where your stage2 file +- resides. The argument should be the file name in your operating +- system. +- +- +-File: grub.info, Node: install-Footnotes, Up: install +- +- (1) They're loaded the same way, so we will refer to the Stage 1.5 +-as a Stage 2 from now on. +- +- +-File: grub.info, Node: ioprobe, Next: kernel, Prev: install, Up: Command-line and menu entry commands +- +-13.3.19 ioprobe +---------------- +- +- -- Command: ioprobe drive +- Probe I/O ports used for the drive DRIVE. This command will list +- the I/O ports on the screen. For technical information, *Note +- Internals::. +- +- +-File: grub.info, Node: kernel, Next: lock, Prev: ioprobe, Up: Command-line and menu entry commands +- +-13.3.20 kernel +--------------- +- +- -- Command: kernel [`--type=type'] [`--no-mem-option'] file ... +- Attempt to load the primary boot image (Multiboot a.out or ELF, +- Linux zImage or bzImage, FreeBSD a.out, NetBSD a.out, etc.) from +- FILE. The rest of the line is passed verbatim as the "kernel +- command-line". Any modules must be reloaded after using this +- command. +- +- This command also accepts the option `--type' so that you can +- specify the kernel type of FILE explicitly. The argument TYPE must +- be one of these: `netbsd', `freebsd', `openbsd', `linux', +- `biglinux', and `multiboot'. However, you need to specify it only +- if you want to load a NetBSD ELF kernel, because GRUB can +- automatically determine a kernel type in the other cases, quite +- safely. +- +- The option `--no-mem-option' is effective only for Linux. If the +- option is specified, GRUB doesn't pass the option `mem=' to the +- kernel. This option is implied for Linux kernels 2.4.18 and newer. +- +- +-File: grub.info, Node: lock, Next: makeactive, Prev: kernel, Up: Command-line and menu entry commands +- +-13.3.21 lock +------------- +- +- -- Command: lock +- Prevent normal users from executing arbitrary menu entries. You +- must use the command `password' if you really want this command to +- be useful (*note password::). +- +- This command is used in a menu, as shown in this example: +- +- title This entry is too dangerous to be executed by normal users +- lock +- root (hd0,a) +- kernel /no-security-os +- +- See also *Note Security::. +- +- +-File: grub.info, Node: makeactive, Next: map, Prev: lock, Up: Command-line and menu entry commands +- +-13.3.22 makeactive +------------------- +- +- -- Command: makeactive +- Set the active partition on the root disk to GRUB's root device. +- This command is limited to _primary_ PC partitions on a hard disk. +- +- +-File: grub.info, Node: map, Next: md5crypt, Prev: makeactive, Up: Command-line and menu entry commands +- +-13.3.23 map +------------ +- +- -- Command: map to_drive from_drive +- Map the drive FROM_DRIVE to the drive TO_DRIVE. This is necessary +- when you chain-load some operating systems, such as DOS, if such +- an OS resides at a non-first drive. Here is an example: +- +- grub> map (hd0) (hd1) +- grub> map (hd1) (hd0) +- +- The example exchanges the order between the first hard disk and the +- second hard disk. See also *Note DOS/Windows::. +- +- +-File: grub.info, Node: md5crypt, Next: module, Prev: map, Up: Command-line and menu entry commands +- +-13.3.24 md5crypt +----------------- +- +- -- Command: md5crypt +- Prompt to enter a password, and encrypt it in MD5 format. The +- encrypted password can be used with the command `password' (*note +- password::). See also *Note Security::. +- +- +-File: grub.info, Node: module, Next: modulenounzip, Prev: md5crypt, Up: Command-line and menu entry commands +- +-13.3.25 module +--------------- +- +- -- Command: module file ... +- Load a boot module FILE for a Multiboot format boot image (no +- interpretation of the file contents are made, so the user of this +- command must know what the kernel in question expects). The rest +- of the line is passed as the "module command-line", like the +- `kernel' command. You must load a Multiboot kernel image before +- loading any module. See also *Note modulenounzip::. +- +- +-File: grub.info, Node: modulenounzip, Next: pause, Prev: module, Up: Command-line and menu entry commands +- +-13.3.26 modulenounzip +---------------------- +- +- -- Command: modulenounzip file ... +- The same as `module' (*note module::), except that automatic +- decompression is disabled. +- +- +-File: grub.info, Node: pause, Next: quit, Prev: modulenounzip, Up: Command-line and menu entry commands +- +-13.3.27 pause +-------------- +- +- -- Command: pause message ... +- Print the MESSAGE, then wait until a key is pressed. Note that +- placing <^G> (ASCII code 7) in the message will cause the speaker +- to emit the standard beep sound, which is useful when prompting +- the user to change floppies. +- +- +-File: grub.info, Node: quit, Next: reboot, Prev: pause, Up: Command-line and menu entry commands +- +-13.3.28 quit +------------- +- +- -- Command: quit +- Exit from the grub shell `grub' (*note Invoking the grub shell::). +- This command can be used only in the grub shell. +- +- +-File: grub.info, Node: reboot, Next: read, Prev: quit, Up: Command-line and menu entry commands +- +-13.3.29 reboot +--------------- +- +- -- Command: reboot +- Reboot the computer. +- +- +-File: grub.info, Node: read, Next: root, Prev: reboot, Up: Command-line and menu entry commands +- +-13.3.30 read +------------- +- +- -- Command: read addr +- Read a 32-bit value from memory at address ADDR and display it in +- hex format. +- +- +-File: grub.info, Node: root, Next: rootnoverify, Prev: read, Up: Command-line and menu entry commands +- +-13.3.31 root +------------- +- +- -- Command: root device [hdbias] +- Set the current "root device" to the device DEVICE, then attempt +- to mount it to get the partition size (for passing the partition +- descriptor in `ES:ESI', used by some chain-loaded boot loaders), +- the BSD drive-type (for booting BSD kernels using their native +- boot format), and correctly determine the PC partition where a BSD +- sub-partition is located. The optional HDBIAS parameter is a +- number to tell a BSD kernel how many BIOS drive numbers are on +- controllers before the current one. For example, if there is an +- IDE disk and a SCSI disk, and your FreeBSD root partition is on +- the SCSI disk, then use a `1' for HDBIAS. +- +- See also *Note rootnoverify::. +- +- +-File: grub.info, Node: rootnoverify, Next: savedefault, Prev: root, Up: Command-line and menu entry commands +- +-13.3.32 rootnoverify +--------------------- +- +- -- Command: rootnoverify device [hdbias] +- Similar to `root' (*note root::), but don't attempt to mount the +- partition. This is useful for when an OS is outside of the area of +- the disk that GRUB can read, but setting the correct root device +- is still desired. Note that the items mentioned in `root' above +- which derived from attempting the mount will _not_ work correctly. +- +- +-File: grub.info, Node: savedefault, Next: setup, Prev: rootnoverify, Up: Command-line and menu entry commands +- +-13.3.33 savedefault +-------------------- +- +- -- Command: savedefault num +- Save the current menu entry or NUM if specified as a default +- entry. Here is an example: +- +- default saved +- timeout 10 +- +- title GNU/Linux +- root (hd0,0) +- kernel /boot/vmlinuz root=/dev/sda1 vga=ext +- initrd /boot/initrd +- savedefault +- +- title FreeBSD +- root (hd0,a) +- kernel /boot/loader +- savedefault +- +- With this configuration, GRUB will choose the entry booted +- previously as the default entry. +- +- You can specify `fallback' instead of a number. Then, next +- fallback entry is saved. Next fallback entry is chosen from +- fallback entries. Normally, this will be the first entry in +- fallback ones. +- +- See also *Note default:: and *Note Invoking grub-set-default::. +- +- +-File: grub.info, Node: setup, Next: testload, Prev: savedefault, Up: Command-line and menu entry commands +- +-13.3.34 setup +-------------- +- +- -- Command: setup [`--force-lba'] [`--stage2=os_stage2_file'] +- [`--prefix=dir'] install_device [image_device] +- Set up the installation of GRUB automatically. This command uses +- the more flexible command `install' (*note install::) in the +- backend and installs GRUB into the device INSTALL_DEVICE. If +- IMAGE_DEVICE is specified, then find the GRUB images (*note +- Images::) in the device IMAGE_DEVICE, otherwise use the current +- "root device", which can be set by the command `root'. If +- INSTALL_DEVICE is a hard disk, then embed a Stage 1.5 in the disk +- if possible. +- +- The option `--prefix' specifies the directory under which GRUB +- images are put. If it is not specified, GRUB automatically +- searches them in `/boot/grub' and `/grub'. +- +- The options `--force-lba' and `--stage2' are just passed to +- `install' if specified. *Note install::, for more information. +- +- +-File: grub.info, Node: testload, Next: testvbe, Prev: setup, Up: Command-line and menu entry commands +- +-13.3.35 testload +----------------- +- +- -- Command: testload file +- Read the entire contents of FILE in several different ways and +- compare them, to test the filesystem code. The output is somewhat +- cryptic, but if no errors are reported and the final `i=X, +- filepos=Y' reading has X and Y equal, then it is definitely +- consistent, and very likely works correctly subject to a +- consistent offset error. If this test succeeds, then a good next +- step is to try loading a kernel. +- +- +-File: grub.info, Node: testvbe, Next: uppermem, Prev: testload, Up: Command-line and menu entry commands +- +-13.3.36 testvbe +---------------- +- +- -- Command: testvbe mode +- Test the VESA BIOS EXTENSION mode MODE. This command will switch +- your video card to the graphics mode, and show an endless +- animation. Hit any key to return. See also *Note vbeprobe::. +- +- +-File: grub.info, Node: uppermem, Next: vbeprobe, Prev: testvbe, Up: Command-line and menu entry commands +- +-13.3.37 uppermem +----------------- +- +- -- Command: uppermem kbytes +- Force GRUB to assume that only KBYTES kilobytes of upper memory +- are installed. Any system address range maps are discarded. +- +- *Caution:* This should be used with great caution, and should only +- be necessary on some old machines. GRUB's BIOS probe can pick up +- all RAM on all new machines the author has ever heard of. It can +- also be used for debugging purposes to lie to an OS. +- +- +-File: grub.info, Node: vbeprobe, Prev: uppermem, Up: Command-line and menu entry commands +- +-13.3.38 vbeprobe +----------------- +- +- -- Command: vbeprobe [mode] +- Probe VESA BIOS EXTENSION information. If the mode MODE is +- specified, show only the information about MODE. Otherwise, this +- command lists up available VBE modes on the screen. See also *Note +- testvbe::. +- +- +-File: grub.info, Node: Troubleshooting, Next: Invoking the grub shell, Prev: Commands, Up: Top +- +-14 Error messages reported by GRUB +-********************************** +- +-This chapter describes error messages reported by GRUB when you +-encounter trouble. *Note Invoking the grub shell::, if your problem is +-specific to the grub shell. +- +-* Menu: +- +-* Stage1 errors:: Errors reported by the Stage 1 +-* Stage1.5 errors:: Errors reported by the Stage 1.5 +-* Stage2 errors:: Errors reported by the Stage 2 +- +- +-File: grub.info, Node: Stage1 errors, Next: Stage1.5 errors, Up: Troubleshooting +- +-14.1 Errors reported by the Stage 1 +-=================================== +- +-The general way that the Stage 1 handles errors is to print an error +-string and then halt. Pressing `<CTRL>-<ALT>-<DEL>' will reboot. +- +- The following is a comprehensive list of error messages for the +-Stage 1: +- +-Hard Disk Error +- The stage2 or stage1.5 is being read from a hard disk, and the +- attempt to determine the size and geometry of the hard disk failed. +- +-Floppy Error +- The stage2 or stage1.5 is being read from a floppy disk, and the +- attempt to determine the size and geometry of the floppy disk +- failed. It's listed as a separate error since the probe sequence +- is different than for hard disks. +- +-Read Error +- A disk read error happened while trying to read the stage2 or +- stage1.5. +- +-Geom Error +- The location of the stage2 or stage1.5 is not in the portion of +- the disk supported directly by the BIOS read calls. This could +- occur because the BIOS translated geometry has been changed by the +- user or the disk is moved to another machine or controller after +- installation, or GRUB was not installed using itself (if it was, +- the Stage 2 version of this error would have been seen during that +- process and it would not have completed the install). +- +- +-File: grub.info, Node: Stage1.5 errors, Next: Stage2 errors, Prev: Stage1 errors, Up: Troubleshooting +- +-14.2 Errors reported by the Stage 1.5 +-===================================== +- +-The general way that the Stage 1.5 handles errors is to print an error +-number in the form `Error NUM' and then halt. Pressing +-`<CTRL>-<ALT>-<DEL>' will reboot. +- +- The error numbers correspond to the errors reported by Stage 2. +-*Note Stage2 errors::. +- +- +-File: grub.info, Node: Stage2 errors, Prev: Stage1.5 errors, Up: Troubleshooting +- +-14.3 Errors reported by the Stage 2 +-=================================== +- +-The general way that the Stage 2 handles errors is to abort the +-operation in question, print an error string, then (if possible) either +-continue based on the fact that an error occurred or wait for the user +-to deal with the error. +- +- The following is a comprehensive list of error messages for the +-Stage 2 (error numbers for the Stage 1.5 are listed before the colon in +-each description): +- +-1 : Filename must be either an absolute filename or blocklist +- This error is returned if a file name is requested which doesn't +- fit the syntax/rules listed in the *Note Filesystem::. +- +-2 : Bad file or directory type +- This error is returned if a file requested is not a regular file, +- but something like a symbolic link, directory, or FIFO. +- +-3 : Bad or corrupt data while decompressing file +- This error is returned if the run-length decompression code gets an +- internal error. This is usually from a corrupt file. +- +-4 : Bad or incompatible header in compressed file +- This error is returned if the file header for a supposedly +- compressed file is bad. +- +-5 : Partition table invalid or corrupt +- This error is returned if the sanity checks on the integrity of the +- partition table fail. This is a bad sign. +- +-6 : Mismatched or corrupt version of stage1/stage2 +- This error is returned if the install command points to +- incompatible or corrupt versions of the stage1 or stage2. It can't +- detect corruption in general, but this is a sanity check on the +- version numbers, which should be correct. +- +-7 : Loading below 1MB is not supported +- This error is returned if the lowest address in a kernel is below +- the 1MB boundary. The Linux zImage format is a special case and +- can be handled since it has a fixed loading address and maximum +- size. +- +-8 : Kernel must be loaded before booting +- This error is returned if GRUB is told to execute the boot sequence +- without having a kernel to start. +- +-9 : Unknown boot failure +- This error is returned if the boot attempt did not succeed for +- reasons which are unknown. +- +-10 : Unsupported Multiboot features requested +- This error is returned when the Multiboot features word in the +- Multiboot header requires a feature that is not recognized. The +- point of this is that the kernel requires special handling which +- GRUB is probably unable to provide. +- +-11 : Unrecognized device string +- This error is returned if a device string was expected, and the +- string encountered didn't fit the syntax/rules listed in the *Note +- Filesystem::. +- +-12 : Invalid device requested +- This error is returned if a device string is recognizable but does +- not fall under the other device errors. +- +-13 : Invalid or unsupported executable format +- This error is returned if the kernel image being loaded is not +- recognized as Multiboot or one of the supported native formats +- (Linux zImage or bzImage, FreeBSD, or NetBSD). +- +-14 : Filesystem compatibility error, cannot read whole file +- Some of the filesystem reading code in GRUB has limits on the +- length of the files it can read. This error is returned when the +- user runs into such a limit. +- +-15 : File not found +- This error is returned if the specified file name cannot be found, +- but everything else (like the disk/partition info) is OK. +- +-16 : Inconsistent filesystem structure +- This error is returned by the filesystem code to denote an internal +- error caused by the sanity checks of the filesystem structure on +- disk not matching what it expects. This is usually caused by a +- corrupt filesystem or bugs in the code handling it in GRUB. +- +-17 : Cannot mount selected partition +- This error is returned if the partition requested exists, but the +- filesystem type cannot be recognized by GRUB. +- +-18 : Selected cylinder exceeds maximum supported by BIOS +- This error is returned when a read is attempted at a linear block +- address beyond the end of the BIOS translated area. This generally +- happens if your disk is larger than the BIOS can handle (512MB for +- (E)IDE disks on older machines or larger than 8GB in general). +- +-19 : Linux kernel must be loaded before initrd +- This error is returned if the initrd command is used before +- loading a Linux kernel. +- +-20 : Multiboot kernel must be loaded before modules +- This error is returned if the module load command is used before +- loading a Multiboot kernel. It only makes sense in this case +- anyway, as GRUB has no idea how to communicate the presence of +- such modules to a non-Multiboot-aware kernel. +- +-21 : Selected disk does not exist +- This error is returned if the device part of a device- or full +- file name refers to a disk or BIOS device that is not present or +- not recognized by the BIOS in the system. +- +-22 : No such partition +- This error is returned if a partition is requested in the device +- part of a device- or full file name which isn't on the selected +- disk. +- +-23 : Error while parsing number +- This error is returned if GRUB was expecting to read a number and +- encountered bad data. +- +-24 : Attempt to access block outside partition +- This error is returned if a linear block address is outside of the +- disk partition. This generally happens because of a corrupt +- filesystem on the disk or a bug in the code handling it in GRUB +- (it's a great debugging tool). +- +-25 : Disk read error +- This error is returned if there is a disk read error when trying to +- probe or read data from a particular disk. +- +-26 : Too many symbolic links +- This error is returned if the link count is beyond the maximum +- (currently 5), possibly the symbolic links are looped. +- +-27 : Unrecognized command +- This error is returned if an unrecognized command is entered on the +- command-line or in a boot sequence section of a configuration file +- and that entry is selected. +- +-28 : Selected item cannot fit into memory +- This error is returned if a kernel, module, or raw file load +- command is either trying to load its data such that it won't fit +- into memory or it is simply too big. +- +-29 : Disk write error +- This error is returned if there is a disk write error when trying +- to write to a particular disk. This would generally only occur +- during an install of set active partition command. +- +-30 : Invalid argument +- This error is returned if an argument specified to a command is +- invalid. +- +-31 : File is not sector aligned +- This error may occur only when you access a ReiserFS partition by +- block-lists (e.g. the command `install'). In this case, you should +- mount the partition with the `-o notail' option. +- +-32 : Must be authenticated +- This error is returned if you try to run a locked entry. You should +- enter a correct password before running such an entry. +- +-33 : Serial device not configured +- This error is returned if you try to change your terminal to a +- serial one before initializing any serial device. +- +-34 : No spare sectors on the disk +- This error is returned if a disk doesn't have enough spare space. +- This happens when you try to embed Stage 1.5 into the unused +- sectors after the MBR, but the first partition starts right after +- the MBR or they are used by EZ-BIOS. +- +- +-File: grub.info, Node: Invoking the grub shell, Next: Invoking grub-install, Prev: Troubleshooting, Up: Top +- +-15 Invoking the grub shell +-************************** +- +-This chapter documents the grub shell `grub'. Note that the grub shell +-is an emulator; it doesn't run under the native environment, so it +-sometimes does something wrong. Therefore, you shouldn't trust it too +-much. If there is anything wrong with it, don't hesitate to try the +-native GRUB environment, especially when it guesses a wrong map between +-BIOS drives and OS devices. +- +-* Menu: +- +-* Basic usage:: How to use the grub shell +-* Installation under UNIX:: How to install GRUB via `grub' +-* Device map:: The map between BIOS drives and OS devices +- +- +-File: grub.info, Node: Basic usage, Next: Installation under UNIX, Up: Invoking the grub shell +- +-15.1 Introduction into the grub shell +-===================================== +- +-You can use the command `grub' for installing GRUB under your operating +-systems and for a testbed when you add a new feature into GRUB or when +-fixing a bug. `grub' is almost the same as the Stage 2, and, in fact, +-it shares the source code with the Stage 2 and you can use the same +-commands (*note Commands::) in `grub'. It is emulated by replacing BIOS +-calls with UNIX system calls and libc functions. +- +- The command `grub' accepts the following options: +- +-`--help' +- Print a summary of the command-line options and exit. +- +-`--version' +- Print the version number of GRUB and exit. +- +-`--verbose' +- Print some verbose messages for debugging purpose. +- +-`--device-map=FILE' +- Use the device map file FILE. The format is described in *Note +- Device map::. +- +-`--no-floppy' +- Do not probe any floppy drive. This option has no effect if the +- option `--device-map' is specified (*note Device map::). +- +-`--probe-second-floppy' +- Probe the second floppy drive. If this option is not specified, +- the grub shell does not probe it, as that sometimes takes a long +- time. If you specify the device map file (*note Device map::), the +- grub shell just ignores this option. +- +-`--config-file=FILE' +- Read the configuration file FILE instead of +- `/boot/grub/grub.conf'. The format is the same as the normal GRUB +- syntax. See *Note Filesystem::, for more information. +- +-`--boot-drive=DRIVE' +- Set the stage2 BOOT_DRIVE to DRIVE. This argument should be an +- integer (decimal, octal or hexadecimal). +- +-`--install-partition=PAR' +- Set the stage2 INSTALL_PARTITION to PAR. This argument should be +- an integer (decimal, octal or hexadecimal). +- +-`--no-config-file' +- Do not use the configuration file even if it can be read. +- +-`--no-curses' +- Do not use the screen handling interface by the curses even if it +- is available. +- +-`--batch' +- This option has the same meaning as `--no-config-file --no-curses'. +- +-`--read-only' +- Disable writing to any disk. +- +-`--hold' +- Wait until a debugger will attach. This option is useful when you +- want to debug the startup code. +- +- +-File: grub.info, Node: Installation under UNIX, Next: Device map, Prev: Basic usage, Up: Invoking the grub shell +- +-15.2 How to install GRUB via `grub' +-=================================== +- +-The installation procedure is the same as under the "native" Stage 2. +-*Note Installation::, for more information. The command `grub'-specific +-information is described here. +- +- What you should be careful about is "buffer cache". `grub' makes use +-of raw devices instead of filesystems that your operating systems +-serve, so there exists a potential problem that some cache +-inconsistency may corrupt your filesystems. What we recommend is: +- +- * If you can unmount drives to which GRUB may write any amount of +- data, unmount them before running `grub'. +- +- * If a drive cannot be unmounted but can be mounted with the +- read-only flag, mount it in read-only mode. That should be secure. +- +- * If a drive must be mounted with the read-write flag, make sure +- that no activity is being done on it while the command `grub' is +- running. +- +- * Reboot your operating system as soon as possible. This is probably +- not required if you follow the rules above, but reboot is the most +- secure way. +- +- In addition, enter the command `quit' when you finish the +-installation. That is _very important_ because `quit' makes the buffer +-cache consistent. Do not push <C-c>. +- +- If you want to install GRUB non-interactively, specify `--batch' +-option in the command-line. This is a simple example: +- +- #!/bin/sh +- +- # Use /usr/sbin/grub if you are on an older system. +- /sbin/grub --batch <<EOT 1>/dev/null 2>/dev/null +- root (hd0,0) +- setup (hd0) +- quit +- EOT +- +- +-File: grub.info, Node: Device map, Prev: Installation under UNIX, Up: Invoking the grub shell +- +-15.3 The map between BIOS drives and OS devices +-=============================================== +- +-When you specify the option `--device-map' (*note Basic usage::), the +-grub shell creates the "device map file" automatically unless it +-already exists. The file name `/boot/grub/device.map' is preferred. +- +- If the device map file exists, the grub shell reads it to map BIOS +-drives to OS devices. This file consists of lines like this: +- +- DEVICE FILE +- +- DEVICE is a drive specified in the GRUB syntax (*note Device +-syntax::), and FILE is an OS file, which is normally a device file. +- +- The reason why the grub shell gives you the device map file is that +-it cannot guess the map between BIOS drives and OS devices correctly in +-some environments. For example, if you exchange the boot sequence +-between IDE and SCSI in your BIOS, it gets the order wrong. +- +- Thus, edit the file if the grub shell makes a mistake. You can put +-any comments in the file if needed, as the grub shell assumes that a +-line is just a comment if the first character is `#'. +- +- +-File: grub.info, Node: Invoking grub-install, Next: Invoking grub-md5-crypt, Prev: Invoking the grub shell, Up: Top +- +-16 Invoking grub-install +-************************ +- +-The program `grub-install' installs GRUB on your drive using the grub +-shell (*note Invoking the grub shell::). You must specify the device +-name on which you want to install GRUB, like this: +- +- grub-install INSTALL_DEVICE +- +- The device name INSTALL_DEVICE is an OS device name or a GRUB device +-name. +- +- `grub-install' accepts the following options: +- +-`--help' +- Print a summary of the command-line options and exit. +- +-`--version' +- Print the version number of GRUB and exit. +- +-`--force-lba' +- Force GRUB to use LBA mode even for a buggy BIOS. Use this option +- only if your BIOS doesn't work properly in LBA mode even though it +- supports LBA mode. +- +-`--root-directory=DIR' +- Install GRUB images under the directory DIR instead of the root +- directory. This option is useful when you want to install GRUB +- into a separate partition or a removable disk. Here is an example +- in which you have a separate "boot" partition which is mounted on +- `/boot': +- +- grub-install --root-directory=/boot hd0 +- +-`--grub-shell=FILE' +- Use FILE as the grub shell. You can append arbitrary options to +- FILE after the file name, like this: +- +- grub-install --grub-shell="grub --read-only" /dev/fd0 +- +-`--recheck' +- Recheck the device map, even if `/boot/grub/device.map' already +- exists. +- +- This option is unreliable and its use is strongly discouraged. +- +- +-File: grub.info, Node: Invoking grub-md5-crypt, Next: Invoking grub-terminfo, Prev: Invoking grub-install, Up: Top +- +-17 Invoking grub-md5-crypt +-************************** +- +-The program `grub-md5-crypt' encrypts a password in MD5 format. This +-is just a frontend of the grub shell (*note Invoking the grub shell::). +-Passwords encrypted by this program can be used with the command +-`password' (*note password::). +- +- `grub-md5-crypt' accepts the following options: +- +-`--help' +- Print a summary of the command-line options and exit. +- +-`--version' +- Print the version information and exit. +- +-`--grub-shell=FILE' +- Use FILE as the grub shell. +- +- +-File: grub.info, Node: Invoking grub-terminfo, Next: Invoking grub-set-default, Prev: Invoking grub-md5-crypt, Up: Top +- +-18 Invoking grub-terminfo +-************************* +- +-The program `grub-terminfo' generates a terminfo command from a +-terminfo name (*note terminfo::). The result can be used in the +-configuration file, to define escape sequences. Because GRUB assumes +-that your terminal is vt100-compatible by default, this would be useful +-only if your terminal is uncommon (such as vt52). +- +- `grub-terminfo' accepts the following options: +- +-`--help' +- Print a summary of the command-line options and exit. +- +-`--version' +- Print the version information and exit. +- +- You must specify one argument to this command. For example: +- +- grub-terminfo vt52 +- +- +-File: grub.info, Node: Invoking grub-set-default, Next: Invoking mbchk, Prev: Invoking grub-terminfo, Up: Top +- +-19 Invoking grub-set-default +-**************************** +- +-The program `grub-set-default' sets the default boot entry for GRUB. +-This automatically creates a file named `default' under your GRUB +-directory (i.e. `/boot/grub'), if it is not present. This file is used +-to determine the default boot entry when GRUB boots up your system when +-you use `default saved' in your configuration file (*note default::), +-and to save next default boot entry when you use `savedefault' in a +-boot entry (*note savedefault::). +- +- `grub-set-default' accepts the following options: +- +-`--help' +- Print a summary of the command-line options and exit. +- +-`--version' +- Print the version information and exit. +- +-`--root-directory=DIR' +- Use the directory DIR instead of the root directory (i.e. `/') to +- define the location of the default file. This is useful when you +- mount a disk which is used for another system. +- +- You must specify a single argument to `grub-set-default'. This +-argument is normally the number of a default boot entry. For example, +-if you have this configuration file: +- +- default saved +- timeout 10 +- +- title GNU/Hurd +- root (hd0,0) +- ... +- +- title GNU/Linux +- root (hd0,1) +- ... +- +- and if you want to set the next default boot entry to GNU/Linux, you +-may execute this command: +- +- grub-set-default 1 +- +- Because the entry for GNU/Linux is `1'. Note that entries are +-counted from zero. So, if you want to specify GNU/Hurd here, then you +-should specify `0'. +- +- This feature is very useful if you want to test a new kernel or to +-make your system quite robust. *Note Making your system robust::, for +-more hints about how to set up a robust system. +- +- +-File: grub.info, Node: Invoking mbchk, Next: Obtaining and Building GRUB, Prev: Invoking grub-set-default, Up: Top +- +-20 Invoking mbchk +-***************** +- +-The program `mbchk' checks for the format of a Multiboot kernel. We +-recommend using this program before booting your own kernel by GRUB. +- +- `mbchk' accepts the following options: +- +-`--help' +- Print a summary of the command-line options and exit. +- +-`--version' +- Print the version number of GRUB and exit. +- +-`--quiet' +- Suppress all normal output. +- +- +-File: grub.info, Node: Obtaining and Building GRUB, Next: Reporting bugs, Prev: Invoking mbchk, Up: Top +- +-Appendix A How to obtain and build GRUB +-*************************************** +- +- *Caution:* GRUB requires binutils-2.9.1.0.23 or later because the +- GNU assembler has been changed so that it can produce real 16bits +- machine code between 2.9.1 and 2.9.1.0.x. See +- `http://sources.redhat.com/binutils/', to obtain information on +- how to get the latest version. +- +- GRUB is available from the GNU alpha archive site +-`ftp://alpha.gnu.org/gnu/grub' or any of its mirrors. The file will be +-named grub-version.tar.gz. The current version is 0.97, so the file you +-should grab is: +- +- `ftp://alpha.gnu.org/gnu/grub/grub-0.97.tar.gz' +- +- To unbundle GRUB use the instruction: +- +- zcat grub-0.97.tar.gz | tar xvf - +- +- which will create a directory called `grub-0.97' with all the +-sources. You can look at the file `INSTALL' for detailed instructions +-on how to build and install GRUB, but you should be able to just do: +- +- cd grub-0.97 +- ./configure +- make install +- +- This will install the grub shell `grub' (*note Invoking the grub +-shell::), the Multiboot checker `mbchk' (*note Invoking mbchk::), and +-the GRUB images. This will also install the GRUB manual. +- +- Also, the latest version is available from the CVS. See +-`http://savannah.gnu.org/cvs/?group=grub' for more information. +- +- +-File: grub.info, Node: Reporting bugs, Next: Future, Prev: Obtaining and Building GRUB, Up: Top +- +-Appendix B Reporting bugs +-************************* +- +-These are the guideline for how to report bugs. Take a look at this +-list below before you submit bugs: +- +- 1. Before getting unsettled, read this manual through and through. +- Also, see the GNU GRUB FAQ +- (http://www.gnu.org/software/grub/grub-faq.html). +- +- 2. Always mention the information on your GRUB. The version number +- and the configuration are quite important. If you build it +- yourself, write the options specified to the configure script and +- your operating system, including the versions of gcc and binutils. +- +- 3. If you have trouble with the installation, inform us of how you +- installed GRUB. Don't omit error messages, if any. Just `GRUB hangs +- up when it boots' is not enough. +- +- The information on your hardware is also essential. These are +- especially important: the geometries and the partition tables of +- your hard disk drives and your BIOS. +- +- 4. If GRUB cannot boot your operating system, write down _everything_ +- you see on the screen. Don't paraphrase them, like `The foo OS +- crashes with GRUB, even though it can boot with the bar boot +- loader just fine'. Mention the commands you executed, the messages +- printed by them, and information on your operating system +- including the version number. +- +- 5. Explain what you wanted to do. It is very useful to know your +- purpose and your wish, and how GRUB didn't satisfy you. +- +- 6. If you can investigate the problem yourself, please do. That will +- give you and us much more information on the problem. Attaching a +- patch is even better. +- +- When you attach a patch, make the patch in unified diff format, and +- write ChangeLog entries. But, even when you make a patch, don't +- forget to explain the problem, so that we can understand what your +- patch is for. +- +- 7. Write down anything that you think might be related. Please +- understand that we often need to reproduce the same problem you +- encounterred in our environment. So your information should be +- sufficient for us to do the same thing--Don't forget that we +- cannot see your computer directly. If you are not sure whether to +- state a fact or leave it out, state it! Reporting too many things +- is much better than omitting something important. +- +- If you follow the guideline above, submit a report to the Bug +-Tracking System (http://savannah.gnu.org/bugs/?group=grub). +-Alternatively, you can submit a report via electronic mail to +-<bug-grub@gnu.org>, but we strongly recommend that you use the Bug +-Tracking System, because e-mail can be passed over easily. +- +- Once we get your report, we will try to fix the bugs. +- +- +-File: grub.info, Node: Future, Next: Internals, Prev: Reporting bugs, Up: Top +- +-Appendix C Where GRUB will go +-***************************** +- +-We started the next generation of GRUB, GRUB 2. This will include +-internationalization, dynamic module loading, real memory management, +-multiple architecture support, a scripting language, and many other +-nice feature. If you are interested in the development of GRUB 2, take +-a look at the homepage (http://www.gnu.org/software/grub/grub.html). +- +- +-File: grub.info, Node: Internals, Next: Index, Prev: Future, Up: Top +- +-Appendix D Hacking GRUB +-*********************** +- +-This chapter documents the user-invisible aspect of GRUB. +- +- As a general rule of software development, it is impossible to keep +-the descriptions of the internals up-to-date, and it is quite hard to +-document everything. So refer to the source code, whenever you are not +-satisfied with this documentation. Please assume that this gives just +-hints to you. +- +-* Menu: +- +-* Memory map:: The memory map of various components +-* Embedded data:: Embedded variables in GRUB +-* Filesystem interface:: The generic interface for filesystems +-* Command interface:: The generic interface for built-ins +-* Bootstrap tricks:: The bootstrap mechanism used in GRUB +-* I/O ports detection:: How to probe I/O ports used by INT 13H +-* Memory detection:: How to detect all installed RAM +-* Low-level disk I/O:: INT 13H disk I/O interrupts +-* MBR:: The structure of Master Boot Record +-* Partition table:: The format of partition tables +-* Submitting patches:: Where and how you should send patches +- +- +-File: grub.info, Node: Memory map, Next: Embedded data, Up: Internals +- +-D.1 The memory map of various components +-======================================== +- +-GRUB consists of two distinct components, called "stages", which are +-loaded at different times in the boot process. Because they run +-mutual-exclusively, sometimes a memory area overlaps with another +-memory area. And, even in one stage, a single memory area can be used +-for various purposes, because their usages are mutually exclusive. +- +- Here is the memory map of the various components: +- +-0 to 4K-1 +- BIOS and real mode interrupts +- +-0x07BE to 0x07FF +- Partition table passed to another boot loader +- +-down from 8K-1 +- Real mode stack +- +-0x2000 to ? +- The optional Stage 1.5 is loaded here +- +-0x2000 to 0x7FFF +- Command-line buffer for Multiboot kernels and modules +- +-0x7C00 to 0x7DFF +- Stage 1 is loaded here by BIOS or another boot loader +- +-0x7F00 to 0x7F42 +- LBA drive parameters +- +-0x8000 to ? +- Stage2 is loaded here +- +-The end of Stage 2 to 416K-1 +- Heap, in particular used for the menu +- +-down from 416K-1 +- Protected mode stack +- +-416K to 448K-1 +- Filesystem buffer +- +-448K to 479.5K-1 +- Raw device buffer +- +-479.5K to 480K-1 +- 512-byte scratch area +- +-480K to 512K-1 +- Buffers for various functions, such as password, command-line, cut +- and paste, and completion. +- +-The last 1K of lower memory +- Disk swapping code and data +- +- See the file `stage2/shared.h', for more information. +- +- +-File: grub.info, Node: Embedded data, Next: Filesystem interface, Prev: Memory map, Up: Internals +- +-D.2 Embedded variables in GRUB +-============================== +- +-Stage 1 and Stage 2 have embedded variables whose locations are +-well-defined, so that the installation can patch the binary file +-directly without recompilation of the stages. +- +- In Stage 1, these are defined: +- +-`0x3E' +- The version number (not GRUB's, but the installation mechanism's). +- +-`0x40' +- The boot drive. If it is 0xFF, use a drive passed by BIOS. +- +-`0x41' +- The flag for if forcing LBA. +- +-`0x42' +- The starting address of Stage 2. +- +-`0x44' +- The first sector of Stage 2. +- +-`0x48' +- The starting segment of Stage 2. +- +-`0x1FE' +- The signature (`0xAA55'). +- +- See the file `stage1/stage1.S', for more information. +- +- In the first sector of Stage 1.5 and Stage 2, the block lists are +-recorded between `firstlist' and `lastlist'. The address of `lastlist' +-is determined when assembling the file `stage2/start.S'. +- +- The trick here is that it is actually read backward, and the first +-8-byte block list is not read here, but after the pointer is decremented +-8 bytes, then after reading it, it decrements again, reads, and so on, +-until it is finished. The terminating condition is when the number of +-sectors to be read in the next block list is zero. +- +- The format of a block list can be seen from the example in the code +-just before the `firstlist' label. Note that it is always from the +-beginning of the disk, but _not_ relative to the partition boundaries. +- +- In the second sector of Stage 1.5 and Stage 2, these are defined: +- +-`0x6' +- The version number (likewise, the installation mechanism's). +- +-`0x8' +- The installed partition. +- +-`0xC' +- The saved entry number. +- +-`0x10' +- The identifier. +- +-`0x11' +- The flag for if forcing LBA. +- +-`0x12' +- The version string (GRUB's). +- +-`0x12' + "the length of the version string" +- The name of a configuration file. +- +- See the file `stage2/asm.S', for more information. +- +- +-File: grub.info, Node: Filesystem interface, Next: Command interface, Prev: Embedded data, Up: Internals +- +-D.3 The generic interface for filesystems +-========================================= +- +-For any particular partition, it is presumed that only one of the +-"normal" filesystems such as FAT, FFS, or ext2fs can be used, so there +-is a switch table managed by the functions in `disk_io.c'. The notation +-is that you can only "mount" one at a time. +- +- The block list filesystem has a special place in the system. In +-addition to the "normal" filesystem (or even without one mounted), you +-can access disk blocks directly (in the indicated partition) via the +-block list notation. Using the block list filesystem doesn't effect any +-other filesystem mounts. +- +- The variables which can be read by the filesystem backend are: +- +-`current_drive' +- The current BIOS drive number (numbered from 0, if a floppy, and +- numbered from 0x80, if a hard disk). +- +-`current_partition' +- The current partition number. +- +-`current_slice' +- The current partition type. +- +-`saved_drive' +- The "drive" part of the root device. +- +-`saved_partition' +- The "partition" part of the root device. +- +-`part_start' +- The current partition starting address, in sectors. +- +-`part_length' +- The current partition length, in sectors. +- +-`print_possibilities' +- True when the `dir' function should print the possible completions +- of a file, and false when it should try to actually open a file of +- that name. +- +-`FSYS_BUF' +- Filesystem buffer which is 32K in size, to use in any way which the +- filesystem backend desires. +- +- The variables which need to be written by a filesystem backend are: +- +-`filepos' +- The current position in the file, in sectors. +- +- *Caution:* the value of FILEPOS can be changed out from under the +- filesystem code in the current implementation. Don't depend on it +- being the same for later calls into the backend code! +- +-`filemax' +- The length of the file. +- +-`disk_read_func' +- The value of DISK_READ_HOOK _only_ during reading of data for the +- file, not any other fs data, inodes, FAT tables, whatever, then +- set to `NULL' at all other times (it will be `NULL' by default). +- If this isn't done correctly, then the `testload' and `install' +- commands won't work correctly. +- +- The functions expected to be used by the filesystem backend are: +- +-`devread' +- Only read sectors from within a partition. Sector 0 is the first +- sector in the partition. +- +-`grub_read' +- If the backend uses the block list code, then `grub_read' can be +- used, after setting BLOCK_FILE to 1. +- +-`print_a_completion' +- If PRINT_POSSIBILITIES is true, call `print_a_completion' for each +- possible file name. Otherwise, the file name completion won't work. +- +- The functions expected to be defined by the filesystem backend are +-described at least moderately in the file `filesys.h'. Their usage is +-fairly evident from their use in the functions in `disk_io.c', look for +-the use of the FSYS_TABLE array. +- +- *Caution:* The semantics are such that then `mount'ing the +-filesystem, presume the filesystem buffer `FSYS_BUF' is corrupted, and +-(re-)load all important contents. When opening and reading a file, +-presume that the data from the `mount' is available, and doesn't get +-corrupted by the open/read (i.e. multiple opens and/or reads will be +-done with only one mount if in the same filesystem). +- +- +-File: grub.info, Node: Command interface, Next: Bootstrap tricks, Prev: Filesystem interface, Up: Internals +- +-D.4 The generic interface for built-ins +-======================================= +- +-GRUB built-in commands are defined in a uniformal interface, whether +-they are menu-specific or can be used anywhere. The definition of a +-builtin command consists of two parts: the code itself and the table of +-the information. +- +- The code must be a function which takes two arguments, a command-line +-string and flags, and returns an `int' value. The "flags" argument +-specifies how the function is called, using a bit mask. The return +-value must be zero if successful, otherwise non-zero. So it is normally +-enough to return ERRNUM. +- +- The table of the information is represented by the structure `struct +-builtin', which contains the name of the command, a pointer to the +-function, flags, a short description of the command and a long +-description of the command. Since the descriptions are used only for +-help messages interactively, you don't have to define them, if the +-command may not be called interactively (such as `title'). +- +- The table is finally registered in the table BUILTIN_TABLE, so that +-`run_script' and `enter_cmdline' can find the command. See the files +-`cmdline.c' and `builtins.c', for more details. +- +- +-File: grub.info, Node: Bootstrap tricks, Next: I/O ports detection, Prev: Command interface, Up: Internals +- +-D.5 The bootstrap mechanism used in GRUB +-======================================== +- +-The disk space can be used in a boot loader is very restricted because +-a MBR (*note MBR::) is only 512 bytes but it also contains a partition +-table (*note Partition table::) and a BPB. So the question is how to +-make a boot loader code enough small to be fit in a MBR. +- +- However, GRUB is a very large program, so we break GRUB into 2 (or 3) +-distinct components, "Stage 1" and "Stage 2" (and optionally "Stage +-1.5"). *Note Memory map::, for more information. +- +- We embed Stage 1 in a MBR or in the boot sector of a partition, and +-place Stage 2 in a filesystem. The optional Stage 1.5 can be installed +-in a filesystem, in the "boot loader" area in a FFS or a ReiserFS, and +-in the sectors right after a MBR, because Stage 1.5 is enough small and +-the sectors right after a MBR is normally an unused region. The size of +-this region is the number of sectors per head minus 1. +- +- Thus, all Stage1 must do is just load Stage2 or Stage1.5. But even if +-Stage 1 needs not to support the user interface or the filesystem +-interface, it is impossible to make Stage 1 less than 400 bytes, because +-GRUB should support both the CHS mode and the LBA mode (*note Low-level +-disk I/O::). +- +- The solution used by GRUB is that Stage 1 loads only the first +-sector of Stage 2 (or Stage 1.5) and Stage 2 itself loads the rest. The +-flow of Stage 1 is: +- +- 1. Initialize the system briefly. +- +- 2. Detect the geometry and the accessing mode of the "loading drive". +- +- 3. Load the first sector of Stage 2. +- +- 4. Jump to the starting address of the Stage 2. +- +- The flow of Stage 2 (and Stage 1.5) is: +- +- 1. Load the rest of itself to the real starting address, that is, the +- starting address plus 512 bytes. The block lists are stored in the +- last part of the first sector. +- +- 2. Long jump to the real starting address. +- +- Note that Stage 2 (or Stage 1.5) does not probe the geometry or the +-accessing mode of the "loading drive", since Stage 1 has already probed +-them. +- +- +-File: grub.info, Node: I/O ports detection, Next: Memory detection, Prev: Bootstrap tricks, Up: Internals +- +-D.6 How to probe I/O ports used by INT 13H +-========================================== +- +-FIXME: I will write this chapter after implementing the new technique. +- +- +-File: grub.info, Node: Memory detection, Next: Low-level disk I/O, Prev: I/O ports detection, Up: Internals +- +-D.7 How to detect all installed RAM +-=================================== +- +-FIXME: I doubt if Erich didn't write this chapter only himself wholly, +-so I will rewrite this chapter. +- +- +-File: grub.info, Node: Low-level disk I/O, Next: MBR, Prev: Memory detection, Up: Internals +- +-D.8 INT 13H disk I/O interrupts +-=============================== +- +-FIXME: I'm not sure where some part of the original chapter is derived, +-so I will rewrite this chapter. +- +- +-File: grub.info, Node: MBR, Next: Partition table, Prev: Low-level disk I/O, Up: Internals +- +-D.9 The structure of Master Boot Record +-======================================= +- +-FIXME: Likewise. +- +- +-File: grub.info, Node: Partition table, Next: Submitting patches, Prev: MBR, Up: Internals +- +-D.10 The format of partition tables +-=================================== +- +-FIXME: Probably the original chapter is derived from "How It Works", so +-I will rewrite this chapter. +- +- +-File: grub.info, Node: Submitting patches, Prev: Partition table, Up: Internals +- +-D.11 Where and how you should send patches +-========================================== +- +-When you write patches for GRUB, please send them to the mailing list +-<bug-grub@gnu.org>. Here is the list of items of which you should take +-care: +- +- * Please make your patch as small as possible. Generally, it is not +- a good thing to make one big patch which changes many things. +- Instead, segregate features and produce many patches. +- +- * Use as late code as possible, for the original code. The CVS +- repository always has the current version (*note Obtaining and +- Building GRUB::). +- +- * Write ChangeLog entries. *Note Change Logs: (standards)Change +- Logs, if you don't know how to write ChangeLog. +- +- * Make patches in unified diff format. `diff -urN' is appropriate in +- most cases. +- +- * Don't make patches reversely. Reverse patches are difficult to +- read and use. +- +- * Be careful enough of the license term and the copyright. Because +- GRUB is under GNU General Public License, you may not steal code +- from software whose license is incompatible against GPL. And, if +- you copy code written by others, you must not ignore their +- copyrights. Feel free to ask GRUB maintainers, whenever you are +- not sure what you should do. +- +- * If your patch is too large to send in e-mail, put it at somewhere +- we can see. Usually, you shouldn't send e-mail over 20K. +- +- +-File: grub.info, Node: Index, Prev: Internals, Up: Top +- +-Index +-***** +- +- +-* Menu: +- +-* blocklist: blocklist. (line 7) +-* boot: boot. (line 7) +-* bootp: bootp. (line 7) +-* cat: cat. (line 7) +-* chainloader: chainloader. (line 7) +-* cmp: cmp. (line 7) +-* color: color. (line 7) +-* configfile: configfile. (line 7) +-* current_drive: Filesystem interface. (line 19) +-* current_partition: Filesystem interface. (line 23) +-* current_slice: Filesystem interface. (line 26) +-* debug: debug. (line 7) +-* default: default. (line 7) +-* device: device. (line 7) +-* devread: Filesystem interface. (line 71) +-* dhcp: dhcp. (line 7) +-* disk_read_func: Filesystem interface. (line 62) +-* displayapm: displayapm. (line 7) +-* displaymem: displaymem. (line 7) +-* embed: embed. (line 7) +-* fallback: fallback. (line 7) +-* filemax: Filesystem interface. (line 59) +-* filepos: Filesystem interface. (line 52) +-* find: find. (line 7) +-* fstest: fstest. (line 7) +-* FSYS_BUF: Filesystem interface. (line 46) +-* geometry: geometry. (line 7) +-* grub_read: Filesystem interface. (line 75) +-* halt: halt. (line 7) +-* help: help. (line 7) +-* hiddenmenu: hiddenmenu. (line 7) +-* hide: hide. (line 7) +-* ifconfig: ifconfig. (line 8) +-* impsprobe: impsprobe. (line 7) +-* initrd: initrd. (line 7) +-* install: install. (line 9) +-* ioprobe: ioprobe. (line 7) +-* kernel: kernel. (line 7) +-* lock: lock. (line 7) +-* makeactive: makeactive. (line 7) +-* map: map. (line 7) +-* md5crypt: md5crypt. (line 7) +-* module: module. (line 7) +-* modulenounzip: modulenounzip. (line 7) +-* pager: pager. (line 7) +-* part_length: Filesystem interface. (line 38) +-* part_start: Filesystem interface. (line 35) +-* partnew: partnew. (line 7) +-* parttype: parttype. (line 7) +-* password: password. (line 7) +-* pause: pause. (line 7) +-* print_a_completion: Filesystem interface. (line 79) +-* print_possibilities: Filesystem interface. (line 41) +-* quit: quit. (line 7) +-* rarp: rarp. (line 7) +-* read: read. (line 7) +-* reboot: reboot. (line 7) +-* root: root. (line 7) +-* rootnoverify: rootnoverify. (line 7) +-* saved_drive: Filesystem interface. (line 29) +-* saved_partition: Filesystem interface. (line 32) +-* savedefault: savedefault. (line 7) +-* serial: serial. (line 9) +-* setkey: setkey. (line 7) +-* setup: setup. (line 8) +-* splashimage: splashimage. (line 7) +-* terminal: terminal. (line 9) +-* terminfo: terminfo. (line 9) +-* testload: testload. (line 7) +-* testvbe: testvbe. (line 7) +-* tftpserver: tftpserver. (line 7) +-* timeout: timeout. (line 7) +-* title: title. (line 7) +-* unhide: unhide. (line 7) +-* uppermem: uppermem. (line 7) +-* vbeprobe: vbeprobe. (line 7) +- +- +- +-Tag Table: +-Node: Top1465 +-Node: Introduction3244 +-Node: Overview3621 +-Node: Overview-Footnotes5843 +-Ref: Overview-Footnote-15904 +-Node: History6065 +-Node: Features7186 +-Node: Features-Footnotes12954 +-Ref: Features-Footnote-113015 +-Node: Role of a boot loader13160 +-Node: Role of a boot loader-Footnotes14498 +-Ref: Role of a boot loader-Footnote-114585 +-Node: Naming convention14664 +-Node: Installation17599 +-Node: Creating a GRUB boot floppy19341 +-Node: Installing GRUB natively20159 +-Node: Installing GRUB natively-Footnotes22439 +-Ref: Installing GRUB natively-Footnote-122532 +-Node: Installing GRUB using grub-install22717 +-Node: Making a GRUB bootable CD-ROM25663 +-Node: Making a GRUB bootable CD-ROM-Footnotes27708 +-Ref: Making a GRUB bootable CD-ROM-Footnote-127811 +-Node: Booting27886 +-Node: General boot methods28341 +-Node: Loading an operating system directly29082 +-Node: Chain-loading30386 +-Node: Chain-loading-Footnotes31696 +-Ref: Chain-loading-Footnote-131767 +-Node: OS-specific notes31839 +-Node: GNU/Hurd32215 +-Node: GNU/Linux32834 +-Node: FreeBSD34082 +-Node: NetBSD34595 +-Node: OpenBSD35253 +-Node: DOS/Windows35453 +-Node: SCO UnixWare37279 +-Node: QNX37697 +-Node: Making your system robust37947 +-Node: Booting once-only39272 +-Node: Booting fallback systems41197 +-Node: Configuration44044 +-Node: Network48474 +-Node: General usage of network support48968 +-Node: General usage of network support-Footnotes50829 +-Ref: General usage of network support-Footnote-150938 +-Node: Diskless51006 +-Node: Serial terminal53190 +-Node: Preset Menu55423 +-Node: Security57791 +-Node: Images60599 +-Node: Filesystem63110 +-Node: Device syntax63793 +-Node: File name syntax65287 +-Node: Block list syntax66032 +-Node: Interface66765 +-Node: Command-line interface67642 +-Node: Command-line interface-Footnotes69583 +-Ref: Command-line interface-Footnote-169672 +-Node: Menu interface69767 +-Node: Menu entry editor70777 +-Node: Hidden menu interface71856 +-Node: Commands72433 +-Node: Menu-specific commands73010 +-Node: default74181 +-Node: fallback74659 +-Node: hiddenmenu75210 +-Node: timeout75698 +-Node: title75976 +-Node: General commands76247 +-Node: bootp77611 +-Node: color78090 +-Node: device79564 +-Node: dhcp80136 +-Node: hide80721 +-Node: ifconfig81098 +-Node: pager81674 +-Node: partnew82008 +-Node: parttype82444 +-Node: password82811 +-Node: rarp83630 +-Node: serial83931 +-Node: setkey85204 +-Node: splashimage87376 +-Node: terminal87754 +-Node: terminfo89296 +-Node: tftpserver89983 +-Node: unhide90529 +-Node: Command-line and menu entry commands90904 +-Node: blocklist93435 +-Node: boot93677 +-Node: cat93998 +-Node: chainloader94302 +-Node: cmp94918 +-Node: configfile95469 +-Node: debug95683 +-Node: displayapm96067 +-Node: displaymem96278 +-Node: embed96980 +-Node: embed-Footnotes97514 +-Ref: embed-Footnote-197569 +-Node: find97626 +-Node: fstest98006 +-Node: geometry98691 +-Node: halt99303 +-Node: help99630 +-Node: impsprobe100251 +-Node: initrd100650 +-Node: install100989 +-Node: install-Footnotes103833 +-Ref: install-Footnote-1103892 +-Node: ioprobe103989 +-Node: kernel104314 +-Node: lock105434 +-Node: makeactive106009 +-Node: map106321 +-Node: md5crypt106888 +-Node: module107235 +-Node: modulenounzip107812 +-Node: pause108105 +-Node: quit108519 +-Node: reboot108795 +-Node: read108976 +-Node: root109218 +-Node: rootnoverify110095 +-Node: savedefault110650 +-Node: setup111626 +-Node: testload112692 +-Node: testvbe113302 +-Node: uppermem113673 +-Node: vbeprobe114255 +-Node: Troubleshooting114638 +-Node: Stage1 errors115176 +-Node: Stage1.5 errors116553 +-Node: Stage2 errors116991 +-Node: Invoking the grub shell124451 +-Node: Basic usage125204 +-Node: Installation under UNIX127492 +-Node: Device map129167 +-Node: Invoking grub-install130315 +-Node: Invoking grub-md5-crypt131884 +-Node: Invoking grub-terminfo132533 +-Node: Invoking grub-set-default133299 +-Node: Invoking mbchk135100 +-Node: Obtaining and Building GRUB135614 +-Node: Reporting bugs137031 +-Node: Future139835 +-Node: Internals140326 +-Node: Memory map141549 +-Node: Embedded data143027 +-Node: Filesystem interface145044 +-Node: Command interface148477 +-Node: Bootstrap tricks149792 +-Node: I/O ports detection151941 +-Node: Memory detection152213 +-Node: Low-level disk I/O152505 +-Node: MBR152774 +-Node: Partition table152971 +-Node: Submitting patches153244 +-Node: Index154732 +- +-End Tag Table +diff --git a/docs/multiboot.info b/docs/multiboot.info +deleted file mode 100644 +index bcd1e9d..0000000 +--- a/docs/multiboot.info ++++ /dev/null +@@ -1,1662 +0,0 @@ +-This is ../../docs/multiboot.info, produced by makeinfo version 4.7 +-from ../../docs/multiboot.texi. +- +-INFO-DIR-SECTION Kernel +-START-INFO-DIR-ENTRY +-* Multiboot Specification: (multiboot). Multiboot Specification. +-END-INFO-DIR-ENTRY +- +- Copyright (C) 1995, 96 Bryan Ford <baford@cs.utah.edu> Copyright (C) +-1995, 96 Erich Stefan Boleyn <erich@uruk.org> Copyright (C) 1999, 2000, +-2001, 2002 Free Software Foundation, Inc. +- +- Permission is granted to make and distribute verbatim copies of this +-manual provided the copyright notice and this permission notice are +-preserved on all copies. +- +- Permission is granted to copy and distribute modified versions of +-this manual under the conditions for verbatim copying, provided also +-that the entire resulting derived work is distributed under the terms +-of a permission notice identical to this one. +- +- Permission is granted to copy and distribute translations of this +-manual into another language, under the above conditions for modified +-versions. +- +- +-File: multiboot.info, Node: Top, Next: Overview, Up: (dir) +- +-Multiboot Specification +-*********************** +- +-This file documents Multiboot Specification, the proposal for the boot +-sequence standard. This edition documents version 0.6.93. +- +-* Menu: +- +-* Overview:: +-* Terminology:: +-* Specification:: +-* Examples:: +-* History:: +-* Index:: +- +- +-File: multiboot.info, Node: Overview, Next: Terminology, Prev: Top, Up: Top +- +-1 Introduction to Multiboot Specification +-***************************************** +- +-This chapter describes some rough information on the Multiboot +-Specification. Note that this is not a part of the specification itself. +- +-* Menu: +- +-* Motivation:: +-* Architecture:: +-* Operating systems:: +-* Boot sources:: +-* Boot-time configuration:: +-* Convenience to operating systems:: +-* Boot modules:: +- +- +-File: multiboot.info, Node: Motivation, Next: Architecture, Up: Overview +- +-1.1 The background of Multiboot Specification +-============================================= +- +-Every operating system ever created tends to have its own boot loader. +-Installing a new operating system on a machine generally involves +-installing a whole new set of boot mechanisms, each with completely +-different install-time and boot-time user interfaces. Getting multiple +-operating systems to coexist reliably on one machine through typical +-"chaining" mechanisms can be a nightmare. There is little or no choice +-of boot loaders for a particular operating system -- if the one that +-comes with the operating system doesn't do exactly what you want, or +-doesn't work on your machine, you're screwed. +- +- While we may not be able to fix this problem in existing commercial +-operating systems, it shouldn't be too difficult for a few people in the +-free operating system communities to put their heads together and solve +-this problem for the popular free operating systems. That's what this +-specification aims for. Basically, it specifies an interface between a +-boot loader and a operating system, such that any complying boot loader +-should be able to load any complying operating system. This +-specification does _not_ specify how boot loaders should work -- only +-how they must interface with the operating system being loaded. +- +- +-File: multiboot.info, Node: Architecture, Next: Operating systems, Prev: Motivation, Up: Overview +- +-1.2 The target architecture +-=========================== +- +-This specification is primarily targeted at PC, since they are the most +-common and have the largest variety of operating systems and boot +-loaders. However, to the extent that certain other architectures may +-need a boot specification and do not have one already, a variation of +-this specification, stripped of the x86-specific details, could be +-adopted for them as well. +- +- +-File: multiboot.info, Node: Operating systems, Next: Boot sources, Prev: Architecture, Up: Overview +- +-1.3 The target operating systems +-================================ +- +-This specification is targeted toward free 32-bit operating systems +-that can be fairly easily modified to support the specification without +-going through lots of bureaucratic rigmarole. The particular free +-operating systems that this specification is being primarily designed +-for are Linux, FreeBSD, NetBSD, Mach, and VSTa. It is hoped that other +-emerging free operating systems will adopt it from the start, and thus +-immediately be able to take advantage of existing boot loaders. It would +-be nice if commercial operating system vendors eventually adopted this +-specification as well, but that's probably a pipe dream. +- +- +-File: multiboot.info, Node: Boot sources, Next: Boot-time configuration, Prev: Operating systems, Up: Overview +- +-1.4 Boot sources +-================ +- +-It should be possible to write compliant boot loaders that load the OS +-image from a variety of sources, including floppy disk, hard disk, and +-across a network. +- +- Disk-based boot loaders may use a variety of techniques to find the +-relevant OS image and boot module data on disk, such as by +-interpretation of specific file systems (e.g. the BSD/Mach boot loader), +-using precalculated "block lists" (e.g. LILO), loading from a special +-"boot partition" (e.g. OS/2), or even loading from within another +-operating system (e.g. the VSTa boot code, which loads from DOS). +-Similarly, network-based boot loaders could use a variety of network +-hardware and protocols. +- +- It is hoped that boot loaders will be created that support multiple +-loading mechanisms, increasing their portability, robustness, and +-user-friendliness. +- +- +-File: multiboot.info, Node: Boot-time configuration, Next: Convenience to operating systems, Prev: Boot sources, Up: Overview +- +-1.5 Configure an operating system at boot-time +-============================================== +- +-It is often necessary for one reason or another for the user to be able +-to provide some configuration information to an operating system +-dynamically at boot time. While this specification should not dictate +-how this configuration information is obtained by the boot loader, it +-should provide a standard means for the boot loader to pass such +-information to the operating system. +- +- +-File: multiboot.info, Node: Convenience to operating systems, Next: Boot modules, Prev: Boot-time configuration, Up: Overview +- +-1.6 How to make OS development easier +-===================================== +- +-OS images should be easy to generate. Ideally, an OS image should simply +-be an ordinary 32-bit executable file in whatever file format the +-operating system normally uses. It should be possible to `nm' or +-disassemble OS images just like normal executables. Specialized tools +-should not be required to create OS images in a _special_ file format. +-If this means shifting some work from the operating system to a boot +-loader, that is probably appropriate, because all the memory consumed +-by the boot loader will typically be made available again after the +-boot process is created, whereas every bit of code in the OS image +-typically has to remain in memory forever. The operating system should +-not have to worry about getting into 32-bit mode initially, because mode +-switching code generally needs to be in the boot loader anyway in order +-to load operating system data above the 1MB boundary, and forcing the +-operating system to do this makes creation of OS images much more +-difficult. +- +- Unfortunately, there is a horrendous variety of executable file +-formats even among free Unix-like PC-based operating systems -- +-generally a different format for each operating system. Most of the +-relevant free operating systems use some variant of a.out format, but +-some are moving to ELF. It is highly desirable for boot loaders not to +-have to be able to interpret all the different types of executable file +-formats in existence in order to load the OS image -- otherwise the +-boot loader effectively becomes operating system specific again. +- +- This specification adopts a compromise solution to this problem. +-Multiboot-compliant OS images always contain a magic "Multiboot header" +-(*note OS image format::), which allows the boot loader to load the +-image without having to understand numerous a.out variants or other +-executable formats. This magic header does not need to be at the very +-beginning of the executable file, so kernel images can still conform to +-the local a.out format variant in addition to being Multiboot-compliant. +- +- +-File: multiboot.info, Node: Boot modules, Prev: Convenience to operating systems, Up: Overview +- +-1.7 Boot modules +-================ +- +-Many modern operating system kernels, such as those of VSTa and Mach, do +-not by themselves contain enough mechanism to get the system fully +-operational: they require the presence of additional software modules at +-boot time in order to access devices, mount file systems, etc. While +-these additional modules could be embedded in the main OS image along +-with the kernel itself, and the resulting image be split apart manually +-by the operating system when it receives control, it is often more +-flexible, more space-efficient, and more convenient to the operating +-system and user if the boot loader can load these additional modules +-independently in the first place. +- +- Thus, this specification should provide a standard method for a boot +-loader to indicate to the operating system what auxiliary boot modules +-were loaded, and where they can be found. Boot loaders don't have to +-support multiple boot modules, but they are strongly encouraged to, +-because some operating systems will be unable to boot without them. +- +- +-File: multiboot.info, Node: Terminology, Next: Specification, Prev: Overview, Up: Top +- +-2 The definitions of terms used through the specification +-********************************************************* +- +-"must" +- We use the term "must", when any boot loader or OS image needs to +- follow a rule -- otherwise, the boot loader or OS image is _not_ +- Multiboot-compliant. +- +-"should" +- We use the term "should", when any boot loader or OS image is +- recommended to follow a rule, but it doesn't need to follow the +- rule. +- +-"may" +- We use the term "may", when any boot loader or OS image is allowed +- to follow a rule. +- +-"boot loader" +- Whatever program or set of programs loads the image of the final +- operating system to be run on the machine. The boot loader may +- itself consist of several stages, but that is an implementation +- detail not relevant to this specification. Only the _final_ stage +- of the boot loader -- the stage that eventually transfers control +- to an operating system -- must follow the rules specified in this +- document in order to be "Multiboot-compliant"; earlier boot loader +- stages may be designed in whatever way is most convenient. +- +-"OS image" +- The initial binary image that a boot loader loads into memory and +- transfers control to start an operating system. The OS image is +- typically an executable containing the operating system kernel. +- +-"boot module" +- Other auxiliary files that a boot loader loads into memory along +- with an OS image, but does not interpret in any way other than +- passing their locations to the operating system when it is invoked. +- +-"Multiboot-compliant" +- A boot loader or an OS image which follows the rules defined as +- "must" is Multiboot-compliant. When this specification specifies a +- rule as "should" or "may", a Multiboot-complaint boot loader/OS +- image doesn't need to follow the rule. +- +-"u8" +- The type of unsigned 8-bit data. +- +-"u16" +- The type of unsigned 16-bit data. Because the target architecture +- is little-endian, u16 is coded in little-endian. +- +-"u32" +- The type of unsigned 32-bit data. Because the target architecture +- is little-endian, u32 is coded in little-endian. +- +-"u64" +- The type of unsigned 64-bit data. Because the target architecture +- is little-endian, u64 is coded in little-endian. +- +- +-File: multiboot.info, Node: Specification, Next: Examples, Prev: Terminology, Up: Top +- +-3 The exact definitions of Multiboot Specification +-************************************************** +- +-There are three main aspects of a boot loader/OS image interface: +- +- 1. The format of an OS image as seen by a boot loader. +- +- 2. The state of a machine when a boot loader starts an operating +- system. +- +- 3. The format of information passed by a boot loader to an operating +- system. +- +-* Menu: +- +-* OS image format:: +-* Machine state:: +-* Boot information format:: +- +- +-File: multiboot.info, Node: OS image format, Next: Machine state, Up: Specification +- +-3.1 OS image format +-=================== +- +-An OS image may be an ordinary 32-bit executable file in the standard +-format for that particular operating system, except that it may be +-linked at a non-default load address to avoid loading on top of the +-PC's I/O region or other reserved areas, and of course it should not +-use shared libraries or other fancy features. +- +- An OS image must contain an additional header called "Multiboot +-header", besides the headers of the format used by the OS image. The +-Multiboot header must be contained completely within the first 8192 +-bytes of the OS image, and must be longword (32-bit) aligned. In +-general, it should come _as early as possible_, and may be embedded in +-the beginning of the text segment after the _real_ executable header. +- +-* Menu: +- +-* Header layout:: The layout of Multiboot header +-* Header magic fields:: The magic fields of Multiboot header +-* Header address fields:: +-* Header graphics fields:: +- +- +-File: multiboot.info, Node: Header layout, Next: Header magic fields, Up: OS image format +- +-3.1.1 The layout of Multiboot header +------------------------------------- +- +-The layout of the Multiboot header must be as follows: +- +-Offset Type Field Name Note +-0 u32 magic required +-4 u32 flags required +-8 u32 checksum required +-12 u32 header_addr if flags[16] is set +-16 u32 load_addr if flags[16] is set +-20 u32 load_end_addr if flags[16] is set +-24 u32 bss_end_addr if flags[16] is set +-28 u32 entry_addr if flags[16] is set +-32 u32 mode_type if flags[2] is set +-36 u32 width if flags[2] is set +-40 u32 height if flags[2] is set +-44 u32 depth if flags[2] is set +- +- The fields `magic', `flags' and `checksum' are defined in *Note +-Header magic fields::, the fields `header_addr', `load_addr', +-`load_end_addr', `bss_end_addr' and `entry_addr' are defined in *Note +-Header address fields::, and the fields `mode_type', `width', `height' +-and `depth' are defind in *Note Header graphics fields::. +- +- +-File: multiboot.info, Node: Header magic fields, Next: Header address fields, Prev: Header layout, Up: OS image format +- +-3.1.2 The magic fields of Multiboot header +------------------------------------------- +- +-`magic' +- The field `magic' is the magic number identifying the header, +- which must be the hexadecimal value `0x1BADB002'. +- +-`flags' +- The field `flags' specifies features that the OS image requests or +- requires of an boot loader. Bits 0-15 indicate requirements; if the +- boot loader sees any of these bits set but doesn't understand the +- flag or can't fulfill the requirements it indicates for some +- reason, it must notify the user and fail to load the OS image. +- Bits 16-31 indicate optional features; if any bits in this range +- are set but the boot loader doesn't understand them, it may simply +- ignore them and proceed as usual. Naturally, all as-yet-undefined +- bits in the `flags' word must be set to zero in OS images. This +- way, the `flags' fields serves for version control as well as +- simple feature selection. +- +- If bit 0 in the `flags' word is set, then all boot modules loaded +- along with the operating system must be aligned on page (4KB) +- boundaries. Some operating systems expect to be able to map the +- pages containing boot modules directly into a paged address space +- during startup, and thus need the boot modules to be page-aligned. +- +- If bit 1 in the `flags' word is set, then information on available +- memory via at least the `mem_*' fields of the Multiboot information +- structure (*note Boot information format::) must be included. If +- the boot loader is capable of passing a memory map (the `mmap_*' +- fields) and one exists, then it may be included as well. +- +- If bit 2 in the `flags' word is set, information about the video +- mode table (*note Boot information format::) must be available to +- the kernel. +- +- If bit 16 in the `flags' word is set, then the fields at offsets +- 8-24 in the Multiboot header are valid, and the boot loader should +- use them instead of the fields in the actual executable header to +- calculate where to load the OS image. This information does not +- need to be provided if the kernel image is in ELF format, but it +- _must_ be provided if the images is in a.out format or in some +- other format. Compliant boot loaders must be able to load images +- that either are in ELF format or contain the load address +- information embedded in the Multiboot header; they may also +- directly support other executable formats, such as particular +- a.out variants, but are not required to. +- +-`checksum' +- The field `checksum' is a 32-bit unsigned value which, when added +- to the other magic fields (i.e. `magic' and `flags'), must have a +- 32-bit unsigned sum of zero. +- +- +-File: multiboot.info, Node: Header address fields, Next: Header graphics fields, Prev: Header magic fields, Up: OS image format +- +-3.1.3 The address fields of Multiboot header +--------------------------------------------- +- +-All of the address fields enabled by flag bit 16 are physical addresses. +-The meaning of each is as follows: +- +-`header_addr' +- Contains the address corresponding to the beginning of the +- Multiboot header -- the physical memory location at which the +- magic value is supposed to be loaded. This field serves to +- "synchronize" the mapping between OS image offsets and physical +- memory addresses. +- +-`load_addr' +- Contains the physical address of the beginning of the text +- segment. The offset in the OS image file at which to start loading +- is defined by the offset at which the header was found, minus +- (header_addr - load_addr). load_addr must be less than or equal to +- header_addr. +- +-`load_end_addr' +- Contains the physical address of the end of the data segment. +- (load_end_addr - load_addr) specifies how much data to load. This +- implies that the text and data segments must be consecutive in the +- OS image; this is true for existing a.out executable formats. If +- this field is zero, the boot loader assumes that the text and data +- segments occupy the whole OS image file. +- +-`bss_end_addr' +- Contains the physical address of the end of the bss segment. The +- boot loader initializes this area to zero, and reserves the memory +- it occupies to avoid placing boot modules and other data relevant +- to the operating system in that area. If this field is zero, the +- boot loader assumes that no bss segment is present. +- +-`entry_addr' +- The physical address to which the boot loader should jump in order +- to start running the operating system. +- +- +-File: multiboot.info, Node: Header graphics fields, Prev: Header address fields, Up: OS image format +- +-3.1.4 The graphics fields of Multiboot header +---------------------------------------------- +- +-All of the graphics fields are enabled by flag bit 2. They specify the +-preferred graphics mode. Note that that is only a _recommended_ mode by +-the OS image. If the mode exists, the boot loader should set it, when +-the user doesn't specify a mode explicitly. Otherwise, the boot loader +-should fall back to a similar mode, if available. +- +- The meaning of each is as follows: +- +-`mode_type' +- Contains `0' for linear graphics mode or `1' for EGA-standard text +- mode. Everything else is reserved for future expansion. Note that +- the boot loader may set a text mode, even if this field contains +- `0'. +- +-`width' +- Contains the number of the columns. This is specified in pixels in +- a graphics mode, and in characters in a text mode. The value zero +- indicates that the OS image has no preference. +- +-`height' +- Contains the number of the lines. This is specified in pixels in a +- graphics mode, and in characters in a text mode. The value zero +- indicates that the OS image has no preference. +- +-`depth' +- Contains the number of bits per pixel in a graphics mode, and zero +- in a text mode. The value zero indicates that the OS image has no +- preference. +- +- +-File: multiboot.info, Node: Machine state, Next: Boot information format, Prev: OS image format, Up: Specification +- +-3.2 Machine state +-================= +- +-When the boot loader invokes the 32-bit operating system, the machine +-must have the following state: +- +-`EAX' +- Must contain the magic value `0x2BADB002'; the presence of this +- value indicates to the operating system that it was loaded by a +- Multiboot-compliant boot loader (e.g. as opposed to another type of +- boot loader that the operating system can also be loaded from). +- +-`EBX' +- Must contain the 32-bit physical address of the Multiboot +- information structure provided by the boot loader (*note Boot +- information format::). +- +-`CS' +- Must be a 32-bit read/execute code segment with an offset of `0' +- and a limit of `0xFFFFFFFF'. The exact value is undefined. +- +-`DS' +-`ES' +-`FS' +-`GS' +-`SS' +- Must be a 32-bit read/write data segment with an offset of `0' and +- a limit of `0xFFFFFFFF'. The exact values are all undefined. +- +-`A20 gate' +- Must be enabled. +- +-`CR0' +- Bit 31 (PG) must be cleared. Bit 0 (PE) must be set. Other bits are +- all undefined. +- +-`EFLAGS' +- Bit 17 (VM) must be cleared. Bit 9 (IF) must be cleared. Other bits +- are all undefined. +- +- All other processor registers and flag bits are undefined. This +-includes, in particular: +- +-`ESP' +- The OS image must create its own stack as soon as it needs one. +- +-`GDTR' +- Even though the segment registers are set up as described above, +- the `GDTR' may be invalid, so the OS image must not load any +- segment registers (even just reloading the same values!) until it +- sets up its own `GDT'. +- +-`IDTR' +- The OS image must leave interrupts disabled until it sets up its +- own `IDT'. +- +- However, other machine state should be left by the boot loader in +-"normal working order", i.e. as initialized by the BIOS (or DOS, if +-that's what the boot loader runs from). In other words, the operating +-system should be able to make BIOS calls and such after being loaded, +-as long as it does not overwrite the BIOS data structures before doing +-so. Also, the boot loader must leave the PIC programmed with the normal +-BIOS/DOS values, even if it changed them during the switch to 32-bit +-mode. +- +- +-File: multiboot.info, Node: Boot information format, Prev: Machine state, Up: Specification +- +-3.3 Boot information format +-=========================== +- +-FIXME: Split this chapter like the chapter "OS image format". +- +- Upon entry to the operating system, the `EBX' register contains the +-physical address of a "Multiboot information" data structure, through +-which the boot loader communicates vital information to the operating +-system. The operating system can use or ignore any parts of the +-structure as it chooses; all information passed by the boot loader is +-advisory only. +- +- The Multiboot information structure and its related substructures +-may be placed anywhere in memory by the boot loader (with the exception +-of the memory reserved for the kernel and boot modules, of course). It +-is the operating system's responsibility to avoid overwriting this +-memory until it is done using it. +- +- The format of the Multiboot information structure (as defined so far) +-follows: +- +- +-------------------+ +- 0 | flags | (required) +- +-------------------+ +- 4 | mem_lower | (present if flags[0] is set) +- 8 | mem_upper | (present if flags[0] is set) +- +-------------------+ +- 12 | boot_device | (present if flags[1] is set) +- +-------------------+ +- 16 | cmdline | (present if flags[2] is set) +- +-------------------+ +- 20 | mods_count | (present if flags[3] is set) +- 24 | mods_addr | (present if flags[3] is set) +- +-------------------+ +- 28 - 40 | syms | (present if flags[4] or +- | | flags[5] is set) +- +-------------------+ +- 44 | mmap_length | (present if flags[6] is set) +- 48 | mmap_addr | (present if flags[6] is set) +- +-------------------+ +- 52 | drives_length | (present if flags[7] is set) +- 56 | drives_addr | (present if flags[7] is set) +- +-------------------+ +- 60 | config_table | (present if flags[8] is set) +- +-------------------+ +- 64 | boot_loader_name | (present if flags[9] is set) +- +-------------------+ +- 68 | apm_table | (present if flags[10] is set) +- +-------------------+ +- 72 | vbe_control_info | (present if flags[11] is set) +- 76 | vbe_mode_info | +- 80 | vbe_mode | +- 82 | vbe_interface_seg | +- 84 | vbe_interface_off | +- 86 | vbe_interface_len | +- +-------------------+ +- +- The first longword indicates the presence and validity of other +-fields in the Multiboot information structure. All as-yet-undefined +-bits must be set to zero by the boot loader. Any set bits that the +-operating system does not understand should be ignored. Thus, the +-`flags' field also functions as a version indicator, allowing the +-Multiboot information structure to be expanded in the future without +-breaking anything. +- +- If bit 0 in the `flags' word is set, then the `mem_*' fields are +-valid. `mem_lower' and `mem_upper' indicate the amount of lower and +-upper memory, respectively, in kilobytes. Lower memory starts at +-address 0, and upper memory starts at address 1 megabyte. The maximum +-possible value for lower memory is 640 kilobytes. The value returned for +-upper memory is maximally the address of the first upper memory hole +-minus 1 megabyte. It is not guaranteed to be this value. +- +- If bit 1 in the `flags' word is set, then the `boot_device' field is +-valid, and indicates which BIOS disk device the boot loader loaded the +-OS image from. If the OS image was not loaded from a BIOS disk, then +-this field must not be present (bit 3 must be clear). The operating +-system may use this field as a hint for determining its own "root" +-device, but is not required to. The `boot_device' field is laid out in +-four one-byte subfields as follows: +- +- +-------+-------+-------+-------+ +- | drive | part1 | part2 | part3 | +- +-------+-------+-------+-------+ +- +- The first byte contains the BIOS drive number as understood by the +-BIOS INT 0x13 low-level disk interface: e.g. 0x00 for the first floppy +-disk or 0x80 for the first hard disk. +- +- The three remaining bytes specify the boot partition. `part1' +-specifies the "top-level" partition number, `part2' specifies a +-"sub-partition" in the top-level partition, etc. Partition numbers +-always start from zero. Unused partition bytes must be set to 0xFF. For +-example, if the disk is partitioned using a simple one-level DOS +-partitioning scheme, then `part1' contains the DOS partition number, +-and `part2' and `part3' are both 0xFF. As another example, if a disk is +-partitioned first into DOS partitions, and then one of those DOS +-partitions is subdivided into several BSD partitions using BSD's +-"disklabel" strategy, then `part1' contains the DOS partition number, +-`part2' contains the BSD sub-partition within that DOS partition, and +-`part3' is 0xFF. +- +- DOS extended partitions are indicated as partition numbers starting +-from 4 and increasing, rather than as nested sub-partitions, even +-though the underlying disk layout of extended partitions is +-hierarchical in nature. For example, if the boot loader boots from the +-second extended partition on a disk partitioned in conventional DOS +-style, then `part1' will be 5, and `part2' and `part3' will both be +-0xFF. +- +- If bit 2 of the `flags' longword is set, the `cmdline' field is +-valid, and contains the physical address of the command line to be +-passed to the kernel. The command line is a normal C-style +-zero-terminated string. +- +- If bit 3 of the `flags' is set, then the `mods' fields indicate to +-the kernel what boot modules were loaded along with the kernel image, +-and where they can be found. `mods_count' contains the number of +-modules loaded; `mods_addr' contains the physical address of the first +-module structure. `mods_count' may be zero, indicating no boot modules +-were loaded, even if bit 1 of `flags' is set. Each module structure is +-formatted as follows: +- +- +-------------------+ +- 0 | mod_start | +- 4 | mod_end | +- +-------------------+ +- 8 | string | +- +-------------------+ +- 12 | reserved (0) | +- +-------------------+ +- +- The first two fields contain the start and end addresses of the boot +-module itself. The `string' field provides an arbitrary string to be +-associated with that particular boot module; it is a zero-terminated +-ASCII string, just like the kernel command line. The `string' field may +-be 0 if there is no string associated with the module. Typically the +-string might be a command line (e.g. if the operating system treats boot +-modules as executable programs), or a pathname (e.g. if the operating +-system treats boot modules as files in a file system), but its exact use +-is specific to the operating system. The `reserved' field must be set +-to 0 by the boot loader and ignored by the operating system. +- +- *Caution:* Bits 4 & 5 are mutually exclusive. +- +- If bit 4 in the `flags' word is set, then the following fields in +-the Multiboot information structure starting at byte 28 are valid: +- +- +-------------------+ +- 28 | tabsize | +- 32 | strsize | +- 36 | addr | +- 40 | reserved (0) | +- +-------------------+ +- +- These indicate where the symbol table from an a.out kernel image can +-be found. `addr' is the physical address of the size (4-byte unsigned +-long) of an array of a.out format "nlist" structures, followed +-immediately by the array itself, then the size (4-byte unsigned long) of +-a set of zero-terminated ASCII strings (plus sizeof(unsigned long) in +-this case), and finally the set of strings itself. `tabsize' is equal +-to its size parameter (found at the beginning of the symbol section), +-and `strsize' is equal to its size parameter (found at the beginning of +-the string section) of the following string table to which the symbol +-table refers. Note that `tabsize' may be 0, indicating no symbols, even +-if bit 4 in the `flags' word is set. +- +- If bit 5 in the `flags' word is set, then the following fields in +-the Multiboot information structure starting at byte 28 are valid: +- +- +-------------------+ +- 28 | num | +- 32 | size | +- 36 | addr | +- 40 | shndx | +- +-------------------+ +- +- These indicate where the section header table from an ELF kernel is, +-the size of each entry, number of entries, and the string table used as +-the index of names. They correspond to the `shdr_*' entries +-(`shdr_num', etc.) in the Executable and Linkable Format (ELF) +-specification in the program header. All sections are loaded, and the +-physical address fields of the ELF section header then refer to where +-the sections are in memory (refer to the i386 ELF documentation for +-details as to how to read the section header(s)). Note that `shdr_num' +-may be 0, indicating no symbols, even if bit 5 in the `flags' word is +-set. +- +- If bit 6 in the `flags' word is set, then the `mmap_*' fields are +-valid, and indicate the address and length of a buffer containing a +-memory map of the machine provided by the BIOS. `mmap_addr' is the +-address, and `mmap_length' is the total size of the buffer. The buffer +-consists of one or more of the following size/structure pairs (`size' +-is really used for skipping to the next pair): +- +- +-------------------+ +- -4 | size | +- +-------------------+ +- 0 | base_addr_low | +- 4 | base_addr_high | +- 8 | length_low | +- 12 | length_high | +- 16 | type | +- +-------------------+ +- +- where `size' is the size of the associated structure in bytes, which +-can be greater than the minimum of 20 bytes. `base_addr_low' is the +-lower 32 bits of the starting address, and `base_addr_high' is the +-upper 32 bits, for a total of a 64-bit starting address. `length_low' +-is the lower 32 bits of the size of the memory region in bytes, and +-`length_high' is the upper 32 bits, for a total of a 64-bit length. +-`type' is the variety of address range represented, where a value of 1 +-indicates available RAM, and all other values currently indicated a +-reserved area. +- +- The map provided is guaranteed to list all standard RAM that should +-be available for normal use. +- +- If bit 7 in the `flags' is set, then the `drives_*' fields are +-valid, and indicate the address of the physical address of the first +-drive structure and the size of drive structures. `drives_addr' is the +-address, and `drives_length' is the total size of drive structures. +-Note that `drives_length' may be zero. Each drive structure is +-formatted as follows: +- +- +-------------------+ +- 0 | size | +- +-------------------+ +- 4 | drive_number | +- +-------------------+ +- 5 | drive_mode | +- +-------------------+ +- 6 | drive_cylinders | +- 8 | drive_heads | +- 9 | drive_sectors | +- +-------------------+ +- 10 - xx | drive_ports | +- +-------------------+ +- +- The `size' field specifies the size of this structure. The size +-varies, depending on the number of ports. Note that the size may not be +-equal to (10 + 2 * the number of ports), because of an alignment. +- +- The `drive_number' field contains the BIOS drive number. The +-`drive_mode' field represents the access mode used by the boot loader. +-Currently, the following modes are defined: +- +-`0' +- CHS mode (traditional cylinder/head/sector addressing mode). +- +-`1' +- LBA mode (Logical Block Addressing mode). +- +- The three fields, `drive_cylinders', `drive_heads' and +-`drive_sectors', indicate the geometry of the drive detected by the +-BIOS. `drive_cylinders' contains the number of the cylinders. +-`drive_heads' contains the number of the heads. `drive_sectors' +-contains the number of the sectors per track. +- +- The `drive_ports' field contains the array of the I/O ports used for +-the drive in the BIOS code. The array consists of zero or more unsigned +-two-bytes integers, and is terminated with zero. Note that the array +-may contain any number of I/O ports that are not related to the drive +-actually (such as DMA controller's ports). +- +- If bit 8 in the `flags' is set, then the `config_table' field is +-valid, and indicates the address of the ROM configuration table +-returned by the "GET CONFIGURATION" BIOS call. If the BIOS call fails, +-then the size of the table must be _zero_. +- +- If bit 9 in the `flags' is set, the `boot_loader_name' field is +-valid, and contains the physical address of the name of a boot loader +-booting the kernel. The name is a normal C-style zero-terminated string. +- +- If bit 10 in the `flags' is set, the `apm_table' field is valid, and +-contains the physical address of an APM table defined as below: +- +- +----------------------+ +- 0 | version | +- 2 | cseg | +- 4 | offset | +- 8 | cseg_16 | +- 10 | dseg | +- 12 | flags | +- 14 | cseg_len | +- 16 | cseg_16_len | +- 18 | dseg_len | +- +----------------------+ +- +- The fields `version', `cseg', `offset', `cseg_16', `dseg', `flags', +-`cseg_len', `cseg_16_len', `dseg_len' indicate the version number, the +-protected mode 32-bit code segment, the offset of the entry point, the +-protected mode 16-bit code segment, the protected mode 16-bit data +-segment, the flags, the length of the protected mode 32-bit code +-segment, the length of the protected mode 16-bit code segment, and the +-length of the protected mode 16-bit data segment, respectively. Only +-the field `offset' is 4 bytes, and the others are 2 bytes. See Advanced +-Power Management (APM) BIOS Interface Specification +-(http://www.microsoft.com/hwdev/busbios/amp_12.htm), for more +-information. +- +- If bit 11 in the `flags' is set, the graphics table is available. +-This must only be done if the kernel has indicated in the `Multiboot +-Header' that it accepts a graphics mode. +- +- The fields `vbe_control_info' and `vbe_mode_info' contain the +-physical addresses of VBE control information returned by the VBE +-Function 00h and VBE mode information returned by the VBE Function 01h, +-respectively. +- +- The field `vbe_mode' indicates current video mode in the format +-specified in VBE 3.0. +- +- The rest fields `vbe_interface_seg', `vbe_interface_off', and +-`vbe_interface_len' contain the table of a protected mode interface +-defined in VBE 2.0+. If this information is not available, those fields +-contain zero. Note that VBE 3.0 defines another protected mode +-interface which is incompatible with the old one. If you want to use +-the new protected mode interface, you will have to find the table +-yourself. +- +- The fields for the graphics table are designed for VBE, but +-Multiboot boot loaders may simulate VBE on non-VBE modes, as if they +-were VBE modes. +- +- +-File: multiboot.info, Node: Examples, Next: History, Prev: Specification, Up: Top +- +-4 Examples +-********** +- +-*Caution:* The following items are not part of the specification +-document, but are included for prospective operating system and boot +-loader writers. +- +-* Menu: +- +-* Notes on PC:: +-* BIOS device mapping techniques:: +-* Example OS code:: +-* Example boot loader code:: +- +- +-File: multiboot.info, Node: Notes on PC, Next: BIOS device mapping techniques, Up: Examples +- +-4.1 Notes on PC +-=============== +- +-In reference to bit 0 of the `flags' parameter in the Multiboot +-information structure, if the bootloader in question uses older BIOS +-interfaces, or the newest ones are not available (see description about +-bit 6), then a maximum of either 15 or 63 megabytes of memory may be +-reported. It is _highly_ recommended that boot loaders perform a +-thorough memory probe. +- +- In reference to bit 1 of the `flags' parameter in the Multiboot +-information structure, it is recognized that determination of which +-BIOS drive maps to which device driver in an operating system is +-non-trivial, at best. Many kludges have been made to various operating +-systems instead of solving this problem, most of them breaking under +-many conditions. To encourage the use of general-purpose solutions to +-this problem, there are 2 BIOS device mapping techniques (*note BIOS +-device mapping techniques::). +- +- In reference to bit 6 of the `flags' parameter in the Multiboot +-information structure, it is important to note that the data structure +-used there (starting with `BaseAddrLow') is the data returned by the +-INT 15h, AX=E820h -- Query System Address Map call. See *Note Query +-System Address Map: (grub.info)Query System Address Map, for more +-information. The interface here is meant to allow a boot loader to work +-unmodified with any reasonable extensions of the BIOS interface, +-passing along any extra data to be interpreted by the operating system +-as desired. +- +- +-File: multiboot.info, Node: BIOS device mapping techniques, Next: Example OS code, Prev: Notes on PC, Up: Examples +- +-4.2 BIOS device mapping techniques +-================================== +- +-Both of these techniques should be usable from any PC operating system, +-and neither require any special support in the drivers themselves. This +-section will be flushed out into detailed explanations, particularly for +-the I/O restriction technique. +- +- The general rule is that the data comparison technique is the quick +-and dirty solution. It works most of the time, but doesn't cover all the +-bases, and is relatively simple. +- +- The I/O restriction technique is much more complex, but it has +-potential to solve the problem under all conditions, plus allow access +-of the remaining BIOS devices when not all of them have operating system +-drivers. +- +-* Menu: +- +-* Data comparison technique:: +-* I/O restriction technique:: +- +- +-File: multiboot.info, Node: Data comparison technique, Next: I/O restriction technique, Up: BIOS device mapping techniques +- +-4.2.1 Data comparison technique +-------------------------------- +- +-Before activating _any_ of the device drivers, gather enough data from +-similar sectors on each of the disks such that each one can be uniquely +-identified. +- +- After activating the device drivers, compare data from the drives +-using the operating system drivers. This should hopefully be sufficient +-to provide such a mapping. +- +- Problems: +- +- 1. The data on some BIOS devices might be identical (so the part +- reading the drives from the BIOS should have some mechanism to give +- up). +- +- 2. There might be extra drives not accessible from the BIOS which are +- identical to some drive used by the BIOS (so it should be capable +- of giving up there as well). +- +- +-File: multiboot.info, Node: I/O restriction technique, Prev: Data comparison technique, Up: BIOS device mapping techniques +- +-4.2.2 I/O restriction technique +-------------------------------- +- +-This first step may be unnecessary, but first create copy-on-write +-mappings for the device drivers writing into PC RAM. Keep the original +-copies for the "clean BIOS virtual machine" to be created later. +- +- For each device driver brought online, determine which BIOS devices +-become inaccessible by: +- +- 1. Create a "clean BIOS virtual machine". +- +- 2. Set the I/O permission map for the I/O area claimed by the device +- driver to no permissions (neither read nor write). +- +- 3. Access each device. +- +- 4. Record which devices succeed, and those which try to access the +- "restricted" I/O areas (hopefully, this will be an "xor" +- situation). +- +- For each device driver, given how many of the BIOS devices were +-subsumed by it (there should be no gaps in this list), it should be easy +-to determine which devices on the controller these are. +- +- In general, you have at most 2 disks from each controller given BIOS +-numbers, but they pretty much always count from the lowest logically +-numbered devices on the controller. +- +- +-File: multiboot.info, Node: Example OS code, Next: Example boot loader code, Prev: BIOS device mapping techniques, Up: Examples +- +-4.3 Example OS code +-=================== +- +-In this distribution, the example Multiboot kernel `kernel' is +-included. The kernel just prints out the Multiboot information structure +-on the screen, so you can make use of the kernel to test a +-Multiboot-compliant boot loader and for reference to how to implement a +-Multiboot kernel. The source files can be found under the directory +-`docs' in the GRUB distribution. +- +- The kernel `kernel' consists of only three files: `boot.S', +-`kernel.c' and `multiboot.h'. The assembly source `boot.S' is written +-in GAS (*note GNU assembler: (as.info)Top.), and contains the Multiboot +-information structure to comply with the specification. When a +-Multiboot-compliant boot loader loads and execute it, it initialize the +-stack pointer and `EFLAGS', and then call the function `cmain' defined +-in `kernel.c'. If `cmain' returns to the callee, then it shows a +-message to inform the user of the halt state and stops forever until +-you push the reset key. The file `kernel.c' contains the function +-`cmain', which checks if the magic number passed by the boot loader is +-valid and so on, and some functions to print messages on the screen. +-The file `multiboot.h' defines some macros, such as the magic number +-for the Multiboot header, the Multiboot header structure and the +-Multiboot information structure. +- +-* Menu: +- +-* multiboot.h:: +-* boot.S:: +-* kernel.c:: +-* Other Multiboot kernels:: +- +- +-File: multiboot.info, Node: multiboot.h, Next: boot.S, Up: Example OS code +- +-4.3.1 multiboot.h +------------------ +- +-This is the source code in the file `multiboot.h': +- +- /* multiboot.h - the header for Multiboot */ +- /* Copyright (C) 1999, 2001 Free Software Foundation, Inc. +- +- This program is free software; you can redistribute it and/or modify +- it under the terms of the GNU General Public License as published by +- the Free Software Foundation; either version 2 of the License, or +- (at your option) any later version. +- +- This program is distributed in the hope that it will be useful, +- but WITHOUT ANY WARRANTY; without even the implied warranty of +- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- GNU General Public License for more details. +- +- You should have received a copy of the GNU General Public License +- along with this program; if not, write to the Free Software +- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ +- +- /* Macros. */ +- +- /* The magic number for the Multiboot header. */ +- #define MULTIBOOT_HEADER_MAGIC 0x1BADB002 +- +- /* The flags for the Multiboot header. */ +- #ifdef __ELF__ +- # define MULTIBOOT_HEADER_FLAGS 0x00000003 +- #else +- # define MULTIBOOT_HEADER_FLAGS 0x00010003 +- #endif +- +- /* The magic number passed by a Multiboot-compliant boot loader. */ +- #define MULTIBOOT_BOOTLOADER_MAGIC 0x2BADB002 +- +- /* The size of our stack (16KB). */ +- #define STACK_SIZE 0x4000 +- +- /* C symbol format. HAVE_ASM_USCORE is defined by configure. */ +- #ifdef HAVE_ASM_USCORE +- # define EXT_C(sym) _ ## sym +- #else +- # define EXT_C(sym) sym +- #endif +- +- #ifndef ASM +- /* Do not include here in boot.S. */ +- +- /* Types. */ +- +- /* The Multiboot header. */ +- typedef struct multiboot_header +- { +- unsigned long magic; +- unsigned long flags; +- unsigned long checksum; +- unsigned long header_addr; +- unsigned long load_addr; +- unsigned long load_end_addr; +- unsigned long bss_end_addr; +- unsigned long entry_addr; +- } multiboot_header_t; +- +- /* The symbol table for a.out. */ +- typedef struct aout_symbol_table +- { +- unsigned long tabsize; +- unsigned long strsize; +- unsigned long addr; +- unsigned long reserved; +- } aout_symbol_table_t; +- +- /* The section header table for ELF. */ +- typedef struct elf_section_header_table +- { +- unsigned long num; +- unsigned long size; +- unsigned long addr; +- unsigned long shndx; +- } elf_section_header_table_t; +- +- /* The Multiboot information. */ +- typedef struct multiboot_info +- { +- unsigned long flags; +- unsigned long mem_lower; +- unsigned long mem_upper; +- unsigned long boot_device; +- unsigned long cmdline; +- unsigned long mods_count; +- unsigned long mods_addr; +- union +- { +- aout_symbol_table_t aout_sym; +- elf_section_header_table_t elf_sec; +- } u; +- unsigned long mmap_length; +- unsigned long mmap_addr; +- } multiboot_info_t; +- +- /* The module structure. */ +- typedef struct module +- { +- unsigned long mod_start; +- unsigned long mod_end; +- unsigned long string; +- unsigned long reserved; +- } module_t; +- +- /* The memory map. Be careful that the offset 0 is base_addr_low +- but no size. */ +- typedef struct memory_map +- { +- unsigned long size; +- unsigned long base_addr_low; +- unsigned long base_addr_high; +- unsigned long length_low; +- unsigned long length_high; +- unsigned long type; +- } memory_map_t; +- +- #endif /* ! ASM */ +- +- +-File: multiboot.info, Node: boot.S, Next: kernel.c, Prev: multiboot.h, Up: Example OS code +- +-4.3.2 boot.S +------------- +- +-In the file `boot.S': +- +- /* boot.S - bootstrap the kernel */ +- /* Copyright (C) 1999, 2001 Free Software Foundation, Inc. +- +- This program is free software; you can redistribute it and/or modify +- it under the terms of the GNU General Public License as published by +- the Free Software Foundation; either version 2 of the License, or +- (at your option) any later version. +- +- This program is distributed in the hope that it will be useful, +- but WITHOUT ANY WARRANTY; without even the implied warranty of +- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- GNU General Public License for more details. +- +- You should have received a copy of the GNU General Public License +- along with this program; if not, write to the Free Software +- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ +- +- #define ASM 1 +- #include <multiboot.h> +- +- .text +- +- .globl start, _start +- start: +- _start: +- jmp multiboot_entry +- +- /* Align 32 bits boundary. */ +- .align 4 +- +- /* Multiboot header. */ +- multiboot_header: +- /* magic */ +- .long MULTIBOOT_HEADER_MAGIC +- /* flags */ +- .long MULTIBOOT_HEADER_FLAGS +- /* checksum */ +- .long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS) +- #ifndef __ELF__ +- /* header_addr */ +- .long multiboot_header +- /* load_addr */ +- .long _start +- /* load_end_addr */ +- .long _edata +- /* bss_end_addr */ +- .long _end +- /* entry_addr */ +- .long multiboot_entry +- #endif /* ! __ELF__ */ +- +- multiboot_entry: +- /* Initialize the stack pointer. */ +- movl $(stack + STACK_SIZE), %esp +- +- /* Reset EFLAGS. */ +- pushl $0 +- popf +- +- /* Push the pointer to the Multiboot information structure. */ +- pushl %ebx +- /* Push the magic value. */ +- pushl %eax +- +- /* Now enter the C main function... */ +- call EXT_C(cmain) +- +- /* Halt. */ +- pushl $halt_message +- call EXT_C(printf) +- +- loop: hlt +- jmp loop +- +- halt_message: +- .asciz "Halted." +- +- /* Our stack area. */ +- .comm stack, STACK_SIZE +- +- +-File: multiboot.info, Node: kernel.c, Next: Other Multiboot kernels, Prev: boot.S, Up: Example OS code +- +-4.3.3 kernel.c +--------------- +- +-And, in the file `kernel.c': +- +- /* kernel.c - the C part of the kernel */ +- /* Copyright (C) 1999 Free Software Foundation, Inc. +- +- This program is free software; you can redistribute it and/or modify +- it under the terms of the GNU General Public License as published by +- the Free Software Foundation; either version 2 of the License, or +- (at your option) any later version. +- +- This program is distributed in the hope that it will be useful, +- but WITHOUT ANY WARRANTY; without even the implied warranty of +- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- GNU General Public License for more details. +- +- You should have received a copy of the GNU General Public License +- along with this program; if not, write to the Free Software +- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ +- +- #include <multiboot.h> +- +- /* Macros. */ +- +- /* Check if the bit BIT in FLAGS is set. */ +- #define CHECK_FLAG(flags,bit) ((flags) & (1 << (bit))) +- +- /* Some screen stuff. */ +- /* The number of columns. */ +- #define COLUMNS 80 +- /* The number of lines. */ +- #define LINES 24 +- /* The attribute of an character. */ +- #define ATTRIBUTE 7 +- /* The video memory address. */ +- #define VIDEO 0xB8000 +- +- /* Variables. */ +- /* Save the X position. */ +- static int xpos; +- /* Save the Y position. */ +- static int ypos; +- /* Point to the video memory. */ +- static volatile unsigned char *video; +- +- /* Forward declarations. */ +- void cmain (unsigned long magic, unsigned long addr); +- static void cls (void); +- static void itoa (char *buf, int base, int d); +- static void putchar (int c); +- void printf (const char *format, ...); +- +- /* Check if MAGIC is valid and print the Multiboot information structure +- pointed by ADDR. */ +- void +- cmain (unsigned long magic, unsigned long addr) +- { +- multiboot_info_t *mbi; +- +- /* Clear the screen. */ +- cls (); +- +- /* Am I booted by a Multiboot-compliant boot loader? */ +- if (magic != MULTIBOOT_BOOTLOADER_MAGIC) +- { +- printf ("Invalid magic number: 0x%x\n", (unsigned) magic); +- return; +- } +- +- /* Set MBI to the address of the Multiboot information structure. */ +- mbi = (multiboot_info_t *) addr; +- +- /* Print out the flags. */ +- printf ("flags = 0x%x\n", (unsigned) mbi->flags); +- +- /* Are mem_* valid? */ +- if (CHECK_FLAG (mbi->flags, 0)) +- printf ("mem_lower = %uKB, mem_upper = %uKB\n", +- (unsigned) mbi->mem_lower, (unsigned) mbi->mem_upper); +- +- /* Is boot_device valid? */ +- if (CHECK_FLAG (mbi->flags, 1)) +- printf ("boot_device = 0x%x\n", (unsigned) mbi->boot_device); +- +- /* Is the command line passed? */ +- if (CHECK_FLAG (mbi->flags, 2)) +- printf ("cmdline = %s\n", (char *) mbi->cmdline); +- +- /* Are mods_* valid? */ +- if (CHECK_FLAG (mbi->flags, 3)) +- { +- module_t *mod; +- int i; +- +- printf ("mods_count = %d, mods_addr = 0x%x\n", +- (int) mbi->mods_count, (int) mbi->mods_addr); +- for (i = 0, mod = (module_t *) mbi->mods_addr; +- i < mbi->mods_count; +- i++, mod++) +- printf (" mod_start = 0x%x, mod_end = 0x%x, string = %s\n", +- (unsigned) mod->mod_start, +- (unsigned) mod->mod_end, +- (char *) mod->string); +- } +- +- /* Bits 4 and 5 are mutually exclusive! */ +- if (CHECK_FLAG (mbi->flags, 4) && CHECK_FLAG (mbi->flags, 5)) +- { +- printf ("Both bits 4 and 5 are set.\n"); +- return; +- } +- +- /* Is the symbol table of a.out valid? */ +- if (CHECK_FLAG (mbi->flags, 4)) +- { +- aout_symbol_table_t *aout_sym = &(mbi->u.aout_sym); +- +- printf ("aout_symbol_table: tabsize = 0x%0x, " +- "strsize = 0x%x, addr = 0x%x\n", +- (unsigned) aout_sym->tabsize, +- (unsigned) aout_sym->strsize, +- (unsigned) aout_sym->addr); +- } +- +- /* Is the section header table of ELF valid? */ +- if (CHECK_FLAG (mbi->flags, 5)) +- { +- elf_section_header_table_t *elf_sec = &(mbi->u.elf_sec); +- +- printf ("elf_sec: num = %u, size = 0x%x," +- " addr = 0x%x, shndx = 0x%x\n", +- (unsigned) elf_sec->num, (unsigned) elf_sec->size, +- (unsigned) elf_sec->addr, (unsigned) elf_sec->shndx); +- } +- +- /* Are mmap_* valid? */ +- if (CHECK_FLAG (mbi->flags, 6)) +- { +- memory_map_t *mmap; +- +- printf ("mmap_addr = 0x%x, mmap_length = 0x%x\n", +- (unsigned) mbi->mmap_addr, (unsigned) mbi->mmap_length); +- for (mmap = (memory_map_t *) mbi->mmap_addr; +- (unsigned long) mmap < mbi->mmap_addr + mbi->mmap_length; +- mmap = (memory_map_t *) ((unsigned long) mmap +- + mmap->size + sizeof (mmap->size))) +- printf (" size = 0x%x, base_addr = 0x%x%x," +- " length = 0x%x%x, type = 0x%x\n", +- (unsigned) mmap->size, +- (unsigned) mmap->base_addr_high, +- (unsigned) mmap->base_addr_low, +- (unsigned) mmap->length_high, +- (unsigned) mmap->length_low, +- (unsigned) mmap->type); +- } +- } +- +- /* Clear the screen and initialize VIDEO, XPOS and YPOS. */ +- static void +- cls (void) +- { +- int i; +- +- video = (unsigned char *) VIDEO; +- +- for (i = 0; i < COLUMNS * LINES * 2; i++) +- *(video + i) = 0; +- +- xpos = 0; +- ypos = 0; +- } +- +- /* Convert the integer D to a string and save the string in BUF. If +- BASE is equal to 'd', interpret that D is decimal, and if BASE is +- equal to 'x', interpret that D is hexadecimal. */ +- static void +- itoa (char *buf, int base, int d) +- { +- char *p = buf; +- char *p1, *p2; +- unsigned long ud = d; +- int divisor = 10; +- +- /* If %d is specified and D is minus, put `-' in the head. */ +- if (base == 'd' && d < 0) +- { +- *p++ = '-'; +- buf++; +- ud = -d; +- } +- else if (base == 'x') +- divisor = 16; +- +- /* Divide UD by DIVISOR until UD == 0. */ +- do +- { +- int remainder = ud % divisor; +- +- *p++ = (remainder < 10) ? remainder + '0' : remainder + 'a' - 10; +- } +- while (ud /= divisor); +- +- /* Terminate BUF. */ +- *p = 0; +- +- /* Reverse BUF. */ +- p1 = buf; +- p2 = p - 1; +- while (p1 < p2) +- { +- char tmp = *p1; +- *p1 = *p2; +- *p2 = tmp; +- p1++; +- p2--; +- } +- } +- +- /* Put the character C on the screen. */ +- static void +- putchar (int c) +- { +- if (c == '\n' || c == '\r') +- { +- newline: +- xpos = 0; +- ypos++; +- if (ypos >= LINES) +- ypos = 0; +- return; +- } +- +- *(video + (xpos + ypos * COLUMNS) * 2) = c & 0xFF; +- *(video + (xpos + ypos * COLUMNS) * 2 + 1) = ATTRIBUTE; +- +- xpos++; +- if (xpos >= COLUMNS) +- goto newline; +- } +- +- /* Format a string and print it on the screen, just like the libc +- function printf. */ +- void +- printf (const char *format, ...) +- { +- char **arg = (char **) &format; +- int c; +- char buf[20]; +- +- arg++; +- +- while ((c = *format++) != 0) +- { +- if (c != '%') +- putchar (c); +- else +- { +- char *p; +- +- c = *format++; +- switch (c) +- { +- case 'd': +- case 'u': +- case 'x': +- itoa (buf, c, *((int *) arg++)); +- p = buf; +- goto string; +- break; +- +- case 's': +- p = *arg++; +- if (! p) +- p = "(null)"; +- +- string: +- while (*p) +- putchar (*p++); +- break; +- +- default: +- putchar (*((int *) arg++)); +- break; +- } +- } +- } +- } +- +- +-File: multiboot.info, Node: Other Multiboot kernels, Prev: kernel.c, Up: Example OS code +- +-4.3.4 Other Multiboot kernels +------------------------------ +- +-Other useful information should be available in Multiboot kernels, such +-as GNU Mach and Fiasco `http://os.inf.tu-dresden.de/fiasco/'. And, it +-is worth mentioning the OSKit +-`http://www.cs.utah.edu/projects/flux/oskit/', which provides a library +-supporting the specification. +- +- +-File: multiboot.info, Node: Example boot loader code, Prev: Example OS code, Up: Examples +- +-4.4 Example boot loader code +-============================ +- +-The GNU GRUB (*note GRUB: (grub.info)Top.) project is a full +-Multiboot-compliant boot loader, supporting all required and optional +-features present in this specification. A public release has not been +-made, but the test release is available from: +- +- `ftp://alpha.gnu.org/gnu/grub' +- +- See the webpage `http://www.gnu.org/software/grub/grub.html', for +-more information. +- +- +-File: multiboot.info, Node: History, Next: Index, Prev: Examples, Up: Top +- +-5 The change log of this specification +-************************************** +- +-0.7 +- * "Multiboot Standard" is renamed to "Multiboot Specification". +- +- * Graphics fields are added to Multiboot header. +- +- * BIOS drive information, BIOS configuration table, the name of +- a boot loader, APM information, and graphics information are +- added to Multiboot information. +- +- * Rewritten in Texinfo format. +- +- * Rewritten, using more strict words. +- +- * The maintainer changes to the GNU GRUB maintainer team +- <bug-grub@gnu.org>, from Bryan Ford and Erich Stefan Boleyn. +- +-0.6 +- * A few wording changes. +- +- * Header checksum. +- +- * Clasification of machine state passed to an operating system. +- +-0.5 +- * Name change. +- +-0.4 +- * Major changes plus HTMLification. +- +- +-File: multiboot.info, Node: Index, Prev: History, Up: Top +- +-Index +-***** +- +- +-* Menu: +- +- +-Tag Table: +-Node: Top990 +-Node: Overview1326 +-Node: Motivation1794 +-Node: Architecture3191 +-Node: Operating systems3724 +-Node: Boot sources4518 +-Node: Boot-time configuration5488 +-Node: Convenience to operating systems6096 +-Node: Boot modules8327 +-Node: Terminology9476 +-Node: Specification11855 +-Node: OS image format12418 +-Node: Header layout13476 +-Node: Header magic fields14644 +-Node: Header address fields17505 +-Node: Header graphics fields19351 +-Node: Machine state20737 +-Node: Boot information format22997 +-Node: Examples38368 +-Node: Notes on PC38741 +-Node: BIOS device mapping techniques40307 +-Node: Data comparison technique41217 +-Node: I/O restriction technique42079 +-Node: Example OS code43296 +-Node: multiboot.h44838 +-Node: boot.S48662 +-Node: kernel.c51286 +-Node: Other Multiboot kernels60013 +-Node: Example boot loader code60444 +-Node: History60970 +-Node: Index61891 +- +-End Tag Table +diff --git a/efi/Makefile.am b/efi/Makefile.am +index 1d5bd15..3ae0ca5 100644 +--- a/efi/Makefile.am ++++ b/efi/Makefile.am +@@ -30,7 +30,7 @@ endif + + GRUBEFI_FORMAT = efi-app-$(EFI_ARCH) + GRUBSO_LD_SCRIPT = @GNUEFI_LDS@ +-GRUBSO_LD_FLAGS = -T $(GRUBSO_LD_SCRIPT) -nostdlib -shared -Bsymbolic ++GRUBSO_LD_FLAGS = -T $(GRUBSO_LD_SCRIPT) -nostdlib -shared -Bsymbolic -Map=grub.map + + GRUBSO_OBJS = efimain.o + GRUBSO_LIBS = @GNUEFI_CRT0@ $(top_srcdir)/stage2/libstage2.a \ +@@ -70,7 +70,11 @@ noinst_LIBRARIES = libgrubefi.a + libgrubefi_a_SOURCES = $(EFI_ARCH)/callwrap.S eficore.c efimm.c efimisc.c \ + eficon.c efidisk.c graphics.c efigraph.c efiuga.c efidp.c \ + font_8x16.c efiserial.c $(EFI_ARCH)/loader/linux.c efichainloader.c \ +- xpm.c pxe.c efitftp.c ++ xpm.c pxe.c efitftp.c clanton/boot_settings.c clanton/recovery.c \ ++ clanton/sdio_program.c clanton/mfh.c clanton/iarom.c \ ++ clanton/intel_cln_sb.c clanton/imr.c clanton/perf_metrics.c \ ++ clanton/asset.c clanton/spi_program.c clanton/test_module.c \ ++ clanton/early_uart.c + libgrubefi_a_CFLAGS = $(RELOC_FLAGS) -nostdinc + + endif +diff --git a/efi/clanton/asset.c b/efi/clanton/asset.c +new file mode 100644 +index 0000000..715d520 +--- /dev/null ++++ b/efi/clanton/asset.c +@@ -0,0 +1,415 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#include <clanton/asset.h> ++#include <clanton/clanton.h> ++#include <clanton/flash.h> ++#include <clanton/mfh.h> ++#include <clanton/sbh.h> ++#include <clanton/test_module.h> ++#include <grub/types.h> ++#include <shared.h> ++ ++#define grub_file_size() filemax ++ ++/* Flash item MMIO address & length. */ ++static grub_uint8_t *cln_flash_item_addr = 0x0; ++static grub_uint32_t cln_flash_item_len = 0x0; ++static unsigned int spi_offs_intra_module = 0x0; ++static grub_uint8_t skip_csbh = 0; ++ ++/* The path to the CSBH file. */ ++static char cln_sbh_path[GRUB_CLN_SBH_FILE_PATHMAX] = ""; ++ ++/* Return the path to the CSBH file matching the module. */ ++static char * ++cln_get_sbh_fs_path (char *string) ++{ ++ char *pos = NULL; ++ int len = 0; ++ char *path = grub_strtok_r (string, " ", &pos); ++ ++ cln_sbh_path[0] = 0; ++ ++ len = grub_strlen (path) + grub_strlen (GRUB_CLN_SBH_FILE_EXT); ++ if (len < GRUB_CLN_SBH_FILE_PATHMAX) ++ { ++ grub_strncat (cln_sbh_path, path, GRUB_CLN_SBH_FILE_PATHMAX); ++ grub_strncat (cln_sbh_path, GRUB_CLN_SBH_FILE_EXT, ++ GRUB_CLN_SBH_FILE_PATHMAX); ++ } ++ else ++ grub_printf ("%s error: path to CSBH file is too long\n", __func__); ++ ++ return cln_sbh_path; ++} ++ ++/* Sanity check offset and size of MFH item. ++ Minimum size is passed as an argument. Maximum size is determined by ++ boundary check of the flash part. */ ++static int ++cln_flash_item_is_sane (grub_uint32_t min_size) ++{ ++ /* Take into account the Clanton SBH if in secure mode. */ ++ min_size += (grub_cln_secure ? sizeof (struct grub_cln_sbh) : 0); ++ ++ /* Check that: ++ 1. minimum size is satisfied ++ 2. extent of the asset doesn't wrap around the address space. */ ++ if (cln_flash_item_len < min_size ++ || (grub_uint32_t) cln_flash_item_addr + cln_flash_item_len ++ < (grub_uint32_t) cln_flash_item_addr) ++ { ++ grub_printf ("flash item size is outside the accepted range\n"); ++ errnum = ERR_FILELENGTH; ++ return 0; ++ } ++ ++ return 1; ++} ++ ++#define KERNEL 0 ++#define INITRD 1 ++#define CONFIG 2 ++ ++static int ++spi_open (int type) ++{ ++ skip_csbh = 0; ++ spi_offs_intra_module = 0; ++ ++ /* For non-secure boot, look up unsigned assets first. If not found, look up ++ signed assets then. */ ++ switch (type) ++ { ++ case KERNEL: ++ grub_cln_mfh_entry_lookup (grub_cln_mfh_addr, ++ grub_cln_secure ? CLN_MFH_ITEM_TYPE_KERNEL_SIGNED ++ : CLN_MFH_ITEM_TYPE_KERNEL, ++ &cln_flash_item_addr, ++ &cln_flash_item_len); ++ if (0 == grub_cln_secure && ERR_FILE_NOT_FOUND == errnum) ++ { ++ errnum = ERR_NONE; ++ grub_cln_mfh_entry_lookup (grub_cln_mfh_addr, ++ CLN_MFH_ITEM_TYPE_KERNEL_SIGNED, ++ &cln_flash_item_addr, ++ &cln_flash_item_len); ++ if (ERR_NONE == errnum) ++ skip_csbh = 1; ++ } ++ if (ERR_NONE == errnum) ++ cln_flash_item_is_sane (sizeof (struct linux_kernel_header)); ++ break; ++ case INITRD: ++ grub_cln_mfh_entry_lookup (grub_cln_mfh_addr, ++ grub_cln_secure ? CLN_MFH_ITEM_TYPE_RAMDISK_SIGNED ++ : CLN_MFH_ITEM_TYPE_RAMDISK, ++ &cln_flash_item_addr, ++ &cln_flash_item_len); ++ if (0 == grub_cln_secure && ERR_FILE_NOT_FOUND == errnum) ++ { ++ errnum = ERR_NONE; ++ grub_cln_mfh_entry_lookup (grub_cln_mfh_addr, ++ CLN_MFH_ITEM_TYPE_RAMDISK_SIGNED, ++ &cln_flash_item_addr, ++ &cln_flash_item_len); ++ if (ERR_NONE == errnum) ++ skip_csbh = 1; ++ } ++ if (ERR_NONE == errnum) ++ cln_flash_item_is_sane (0); ++ break; ++ default: ++ /* case CONFIG */ ++ grub_cln_mfh_entry_lookup (grub_cln_mfh_addr, ++ grub_cln_secure ? ++ CLN_MFH_ITEM_TYPE_BOOTLOADER_CONFIG_SIGNED ++ : CLN_MFH_ITEM_TYPE_BOOTLOADER_CONFIG, ++ &cln_flash_item_addr, ++ &cln_flash_item_len); ++ if (0 == grub_cln_secure && ERR_FILE_NOT_FOUND == errnum) ++ { ++ errnum = ERR_NONE; ++ grub_cln_mfh_entry_lookup (grub_cln_mfh_addr, ++ CLN_MFH_ITEM_TYPE_BOOTLOADER_CONFIG_SIGNED, ++ &cln_flash_item_addr, ++ &cln_flash_item_len); ++ if (ERR_NONE == errnum) ++ skip_csbh = 1; ++ } ++ if (ERR_NONE == errnum) ++ cln_flash_item_is_sane (0); ++ break; ++ } ++ ++ /* If the asset is signed, seek past CSBH. */ ++ if (grub_cln_secure || skip_csbh) ++ spi_offs_intra_module += sizeof (struct grub_cln_sbh); ++ ++ return (ERR_NONE == errnum); ++} ++ ++int ++grub_cln_asset_open (grub_cln_asset_type type, char *filename) ++{ ++ /* No error by default. */ ++ int ret = 1; ++ ++ __cln_test_asset(type); ++ ++ switch (type) ++ { ++ case GRUB_CLN_ASSET_KERNEL: ++ if (grub_cln_linux_spi) ++ ret = spi_open (KERNEL); ++ else ++ ret = grub_open (filename); ++ break; ++ case GRUB_CLN_ASSET_INITRD: ++ if (grub_cln_initrd_spi) ++ ret = spi_open (INITRD); ++ else ++ ret = grub_open (filename); ++ break; ++ case GRUB_CLN_ASSET_CONFIG: ++ if (grub_cln_loaded_from_spi) ++ ret = spi_open (CONFIG); ++ else ++ ret = grub_open (filename); ++ break; ++ case GRUB_CLN_ASSET_KERNEL_CSBH: ++ if (grub_cln_linux_spi) ++ ret = spi_open (KERNEL); ++ else ++ ret = grub_open (cln_get_sbh_fs_path (filename)); ++ break; ++ case GRUB_CLN_ASSET_INITRD_CSBH: ++ if (grub_cln_initrd_spi) ++ ret = spi_open (INITRD); ++ else ++ ret = grub_open (cln_get_sbh_fs_path (filename)); ++ break; ++ default: ++ /* case GRUB_CLN_ASSET_CONFIG_CSBH: */ ++ if (grub_cln_loaded_from_spi) ++ ret = spi_open (CONFIG); ++ else ++ ret = grub_open (cln_get_sbh_fs_path (filename)); ++ break; ++ } ++ ++ return ret; ++} ++ ++int ++grub_cln_asset_read (grub_cln_asset_type type, void *buf, int len) ++{ ++ int read = 0; ++ ++ switch (type) ++ { ++ case GRUB_CLN_ASSET_KERNEL: ++ if (grub_cln_linux_spi) ++ { ++ grub_memcpy (buf, ++ cln_flash_item_addr ++ + spi_offs_intra_module, len); ++ read = len; ++ spi_offs_intra_module += read; ++ } ++ else ++ read = grub_read (buf, len); ++ break; ++ case GRUB_CLN_ASSET_KERNEL_CSBH: ++ if (grub_cln_linux_spi) ++ { ++ grub_memcpy (buf, cln_flash_item_addr, len); ++ read = len; ++ } ++ else ++ read = grub_read (buf, len); ++ break; ++ case GRUB_CLN_ASSET_INITRD: ++ if (grub_cln_initrd_spi) ++ { ++ grub_memcpy (buf, ++ cln_flash_item_addr + spi_offs_intra_module, ++ len); ++ read = len; ++ spi_offs_intra_module += read; ++ } ++ else ++ read = grub_read (buf, len); ++ break; ++ case GRUB_CLN_ASSET_INITRD_CSBH: ++ if (grub_cln_initrd_spi) ++ { ++ grub_memcpy (buf, cln_flash_item_addr, len); ++ read = len; ++ } ++ else ++ read = grub_read (buf, len); ++ break; ++ case GRUB_CLN_ASSET_CONFIG: ++ if (grub_cln_loaded_from_spi) ++ { ++ grub_memcpy (buf, ++ cln_flash_item_addr + spi_offs_intra_module, ++ len); ++ read = len; ++ spi_offs_intra_module += read; ++ } ++ else ++ read = grub_read (buf, len); ++ break; ++ default: ++ /* case GRUB_CLN_ASSET_CONFIG_CSBH */ ++ if (grub_cln_loaded_from_spi) ++ { ++ grub_memcpy (buf, cln_flash_item_addr, len); ++ read = len; ++ } ++ else ++ read = grub_read (buf, len); ++ break; ++ } ++ ++ return read; ++} ++ ++void ++grub_cln_asset_seek (int offset) ++{ ++ /* Note it doesn't differentiate between module types, as it's only used ++ by the linux loader routine. */ ++ if (grub_cln_linux_spi) ++ { ++ if (grub_cln_secure || skip_csbh) ++ spi_offs_intra_module = offset + sizeof (struct grub_cln_sbh); ++ else ++ spi_offs_intra_module = offset; ++ } ++ else ++ grub_seek (offset); ++} ++ ++int ++grub_cln_asset_size (grub_cln_asset_type type) ++{ ++ int size = -1; ++ ++ switch (type) ++ { ++ case GRUB_CLN_ASSET_KERNEL: ++ if (grub_cln_linux_spi) ++ { ++ size = cln_flash_item_len; ++ if (grub_cln_secure || skip_csbh) ++ size -= sizeof (struct grub_cln_sbh); ++ } ++ else ++ size = grub_file_size (); ++ break; ++ case GRUB_CLN_ASSET_INITRD: ++ if (grub_cln_initrd_spi) ++ { ++ size = cln_flash_item_len; ++ if (grub_cln_secure || skip_csbh) ++ size -= sizeof (struct grub_cln_sbh); ++ } ++ else ++ size = grub_file_size (); ++ break; ++ default: ++ /* case GRUB_CLN_ASSET_CONFIG */ ++ if (grub_cln_loaded_from_spi) ++ { ++ size = cln_flash_item_len; ++ if (grub_cln_secure || skip_csbh) ++ size -= sizeof (struct grub_cln_sbh); ++ } ++ else ++ size = grub_file_size (); ++ break; ++ } ++ ++ return size; ++} ++ ++void grub_cln_asset_close (void) ++{ ++ grub_close (); ++ return; ++} ++ ++int ++grub_cln_fetch_sbh (grub_cln_asset_type type, char *path, ++ struct grub_cln_sbh *csbh) ++{ ++ int success = 1; ++ ++ /* Fetch the Clanton SBH. */ ++ if (! grub_cln_asset_open (type, path)) ++ success = 0; ++ else if (sizeof (*csbh) != grub_cln_asset_read (type, csbh, sizeof (*csbh))) ++ { ++ errnum = ERR_READ; ++ grub_close (); ++ grub_printf ("cannot read the Clanton SBH"); ++ success = 0; ++ } ++ grub_close (); ++ ++ /* Check for valid SBH. */ ++ if (success) ++ { ++ if (GRUB_CLN_SBH_MAGIC_NUMBER != csbh->security_header.magic_number) ++ { ++ errnum = ERR_EXEC_FORMAT; ++ grub_printf ("invalid CSBH magic number\n"); ++ success = 0; ++ } ++ } ++ ++ return success; ++} ++ ++/* Dump the contents of layout.conf encoded in flash image */ ++void grub_cln_dump_layout (void) ++{ ++ grub_uint8_t * data = 0x0; ++ grub_uint32_t len = 0x0; ++ ++ errnum = ERR_NONE; ++ grub_cln_mfh_entry_lookup (grub_cln_mfh_addr, ++ CLN_MFH_ITEM_TYPE_BUILD_INFO, ++ &data, ++ &len); ++ if (errnum != ERR_NONE) ++ { ++ errnum = ERR_NONE; ++ grub_printf("cannot find layout.conf MFH entry!\n"); ++ return; ++ } ++ ++ grub_printf("Found layout.conf @ 0x%08x len 0x%08x\n", data, len); ++ grub_printf("%.*s\n", len, data); ++} +diff --git a/efi/clanton/asset.h b/efi/clanton/asset.h +new file mode 100644 +index 0000000..e5d9280 +--- /dev/null ++++ b/efi/clanton/asset.h +@@ -0,0 +1,50 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#ifndef GRUB_CLANTON_ASSET_HEADER ++#define GRUB_CLANTON_ASSET_HEADER 1 ++ ++#include <clanton/sbh.h> ++ ++typedef enum ++{ ++ GRUB_CLN_ASSET_KERNEL, ++ GRUB_CLN_ASSET_INITRD, ++ GRUB_CLN_ASSET_KERNEL_CSBH, ++ GRUB_CLN_ASSET_INITRD_CSBH, ++ GRUB_CLN_ASSET_CONFIG, ++ GRUB_CLN_ASSET_CONFIG_CSBH, ++} grub_cln_asset_type; ++ ++/* Access to an asset in read-only mode. */ ++int grub_cln_asset_open (grub_cln_asset_type type, char *filename); ++int grub_cln_asset_read (grub_cln_asset_type type, void *buf, int len); ++void grub_cln_asset_seek (int offset); ++int grub_cln_asset_size (grub_cln_asset_type type); ++void grub_cln_asset_close (void); ++ ++/* Fetch and sanity check the Clanton Secure Boot Header. */ ++int grub_cln_fetch_sbh (grub_cln_asset_type type, char *path, ++ struct grub_cln_sbh *csbh); ++ ++/* Dump the contents of layout.conf encoded in flash image */ ++void grub_cln_dump_layout (void); ++ ++#endif /* ! GRUB_CLANTON_ASSET_HEADER */ +diff --git a/efi/clanton/boot_settings.c b/efi/clanton/boot_settings.c +new file mode 100644 +index 0000000..5d003e8 +--- /dev/null ++++ b/efi/clanton/boot_settings.c +@@ -0,0 +1,207 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#include <clanton/asset.h> ++#include <clanton/clanton.h> ++#include <clanton/flash.h> ++#include <clanton/iarom.h> ++#include <clanton/intel_cln_sb.h> ++#include <clanton/target.h> ++#include <clanton/sbh.h> ++#include <grub/efi/efi.h> ++#include <grub/efi/misc.h> ++#include <grub/misc.h> ++#include <shared.h> ++ ++/* Constants related to 'spi_rom_fuse_in' fuse. */ ++#define SPI_ROM_FUSE_REG_OFFS 0x25 ++#define SPI_ROM_FUSE_REG_MASK 0x00000010 ++ ++/* Pointer to memory-mapped MFH address. */ ++grub_uint8_t *grub_cln_mfh_addr = (grub_uint8_t *) GRUB_CLN_MFH_ADDR; ++ ++/* Indicate if the GRUB has been loaded from SPI or SDIO. */ ++unsigned short int grub_cln_loaded_from_spi = 0; ++ ++/* The (signed) configuration file buffer. Its maximum size is limited to ++ 8kB. */ ++static char cfg_buffer[0x2000] = ""; ++ ++/* Function used to load grub.conf from SD or SPI*/ ++static int do_load_config_file(char **cfg_file_buffer, int *cfg_file_size, char *source); ++ ++/* ++ Determine whether or not Secure Boot is enabled. ++ */ ++void ++grub_cln_detect_secure_sku (void) ++{ ++ grub_uint32_t spi_rom_fuse_range = 0x0; ++ ++ /* Read the spi_rom_fuse_in 32-bit fuse range from Fuse Bank 0. */ ++ intel_cln_sb_read_reg (SB_ID_SEC_FUSE, CFG_READ_FUSE_OPCODE, ++ SPI_ROM_FUSE_REG_OFFS, &spi_rom_fuse_range); ++ ++/* FIXME On Clanton, spi_rom_fuse_in == 1 if Secure Boot is enabled. On ++ emulation platform instead, the bit is swapped. The following #if's are ++ an emulation workaround. Restore when we transition to real silicon. */ ++#if 0 ++ if (spi_rom_fuse_range & SPI_ROM_FUSE_REG_MASK) ++#else ++ if (! (spi_rom_fuse_range & SPI_ROM_FUSE_REG_MASK)) ++#endif ++ grub_cln_secure = 1; ++ else ++ grub_cln_secure = 0; ++ ++ if (grub_cln_debug) ++ grub_printf("Detected %ssecure SKU\n", grub_cln_secure ? "" : "non-"); ++} ++ ++void ++grub_cln_load_config_file (char **cfg_file_buffer, int *cfg_file_size) ++{ ++ grub_efi_loaded_image_t *loaded_image = NULL; ++ unsigned long drive = 0, partition = 0; ++ char *next = 0; ++ int mount_failed = 0; ++ int load_conf_failed = 0; ++ char *ext_fs = "File system Device"; ++ char *spi_fs = "SPI"; ++ // We first start by looking for grub.conf in SDIO. If we do not find it there, then look in SPI/Flash ++ ++ /* Set path to the config file. */ ++ /* Since we boot grub from SPI, config_file will only be ++ "grub.conf" instead of the expected "/boot/grub/grub.conf" ++ This is due to how config_file is assigned, at boot time it's ++ hardcoded to "/boot/grub/menu.lst" and when grub executes it ++ gets the path to its own image and redefines config_file to ++ be [path_to_image]/grub.conf. In our case, as grub is found ++ on SPI the path is null, resulting in config_file = grub.conf ++ This means that the grub.conf will need to be in the top most ++ directory of the SD As of now though, we're using a hardcoded ++ "/boot/grub/grub.conf" as this adheres to the grub standard. ++ */ ++ grub_set_config_file ("/boot/grub/grub.conf"); ++ ++ grub_memset (cfg_buffer, 0x0, sizeof (cfg_buffer)); ++ ++ // Try to mount first mass storage partition returned by the BIOS ++ ++ next = set_device ("(hd0,0)"); ++ if (!next) ++ { ++ mount_failed = 1; ++ } ++ ++ if (!open_device () && errnum != ERR_FSYS_MOUNT) ++ { ++ mount_failed = 1; ++ } ++ ++ errnum = 0; ++ saved_partition = current_partition; ++ saved_drive = current_drive; ++ ++ // Try to load config file from (hd0,0) ++ ++ load_conf_failed = do_load_config_file(cfg_file_buffer, cfg_file_size, ext_fs); ++ ++ ++ // In case we can't load it from (hd0,0) load from SPI/Flash if possible. ++ ++ if (mount_failed || load_conf_failed) ++ { ++ errnum = 0; ++ /* Find out whether the Grub was loaded from SPI/flash or SDIO. */ ++ loaded_image = grub_efi_get_loaded_image (grub_efi_image_handle); ++ grub_cln_loaded_from_spi = ++ ! grub_get_drive_partition_from_bdev_handle (loaded_image->device_handle, ++ &drive, &partition); ++ ++ do_load_config_file(cfg_file_buffer, cfg_file_size, spi_fs); ++ } ++ ++ ++ if (grub_cln_debug) ++ grub_printf ("GRUB loaded from %s\n", ++ grub_cln_loaded_from_spi ? "SPI/Flash" : "file system device"); ++ ++} ++ ++static int ++do_load_config_file(char **cfg_file_buffer, int *cfg_file_size, char *source) // from SD or SPI ++{ ++ int read = 0; ++ ++ /* Open the configuration file. */ ++ if (! grub_cln_asset_open (GRUB_CLN_ASSET_CONFIG, config_file)) ++ { ++ errnum = ERR_FILE_NOT_FOUND; ++ if (grub_cln_debug) ++ grub_printf ("%s(): cannot open GRUB configuration from %s\n", __func__, source); ++ return 1; ++ } ++ *cfg_file_size = grub_cln_asset_size (GRUB_CLN_ASSET_CONFIG); ++ ++ /* Signed/unsigned configuration must fit into the buffer. */ ++ if (*cfg_file_size > sizeof (cfg_buffer)) ++ { ++ grub_printf ("configuration file is too big\n"); ++ errnum = ERR_FILELENGTH; ++ return 1; ++ } ++ ++ *cfg_file_buffer = cfg_buffer; ++ ++ /* Buffer configuration file. */ ++ read = ++ grub_cln_asset_read (GRUB_CLN_ASSET_CONFIG, ++ cfg_buffer ++ + (grub_cln_secure ? sizeof (struct grub_cln_sbh) : 0), ++ *cfg_file_size); ++ grub_cln_asset_close (); ++ if (read != *cfg_file_size) ++ { ++ errnum = ERR_READ; ++ if(grub_cln_debug) ++ grub_printf ("%s(): cannot read GRUB configuration from %s\n", __func__, source); ++ return 1; ++ } ++ ++ if (grub_cln_secure) ++ { ++ /* Buffer CSBH if in Secure mode. */ ++ if (! grub_cln_fetch_sbh (GRUB_CLN_ASSET_CONFIG_CSBH, config_file, ++ (struct grub_cln_sbh *) cfg_buffer)) ++ { ++ errnum = ERR_SGN_FILE_NOT_FOUND; ++ return 0; ++ } ++ ++ /* Validate configuration file. */ ++ if (! grub_cln_verify_asset_signature ((grub_uint8_t *) cfg_buffer)) ++ errnum = ERR_CLN_VERIFICATION; ++ ++ /* Mask out the CSBH to the configuration file parser. */ ++ *cfg_file_buffer += sizeof (struct grub_cln_sbh); ++ } ++ return 0; ++} +diff --git a/efi/clanton/clanton.h b/efi/clanton/clanton.h +new file mode 100644 +index 0000000..643bb65 +--- /dev/null ++++ b/efi/clanton/clanton.h +@@ -0,0 +1,43 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#ifndef GRUB_CLANTON_CLANTON_HEADER ++#define GRUB_CLANTON_CLANTON_HEADER 1 ++ ++/* ++ Kernel command line token to be expanded into Quark UART1 MMIO address. ++ Note the length of the token MUST be > "0xcafebabe", so as to prevent the ++ rest of the string from being overwritten. ++ */ ++#define QUARK_UART_MMIO_TOKEN "$EARLY_CON_ADDR_REPLACE" ++ ++/* Secure/non-secure boot switch. */ ++extern unsigned short int grub_cln_secure; ++/* Debug/release switch. */ ++extern unsigned short int grub_cln_debug; ++ ++/* State whether the Grub was loaded from SPI/flash or SDIO. */ ++extern unsigned short int grub_cln_loaded_from_spi; ++/* State whether the Kernel must be fetched from SPI/flash or SDIO. */ ++extern unsigned short int grub_cln_linux_spi; ++/* State whether the Initrd must be fetched from SPI/flash or SDIO. */ ++extern unsigned short int grub_cln_initrd_spi; ++ ++#endif /* ! GRUB_CLANTON_CLANTON_HEADER */ +diff --git a/efi/clanton/early_uart.c b/efi/clanton/early_uart.c +new file mode 100644 +index 0000000..557dc7c +--- /dev/null ++++ b/efi/clanton/early_uart.c +@@ -0,0 +1,137 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++/* ++ * This file implements two early consoles named earlycln0 earlycln1 ++ * this just lets use get text out the PCI UART early in boot, since Quark SoC ++ * does not implement traditional 0x3f8 type UARTs ++ */ ++ ++#include <clanton/clanton.h> ++#include <grub/types.h> ++#include <netboot/linux-asm-io.h> ++#include <netboot/timer.h> ++#include <shared.h> ++#include <stage2/serial.h> ++#include "early_uart.h" ++ ++#define PCI_VENDOR_ID (0x00) ++#define PCI_DEVICE_ID (0x02) ++#define PCI_CLASS_DEVICE (0x0A) ++ ++#define PCI_VENDOR_ID_INTEL (0x8086) ++#define PCI_DEVICE_CLNUART (0x0936) ++#define UART_BARMAP_LEN (0x10) ++ ++static grub_uint32_t *pclnuart = NULL; ++ ++static grub_uint32_t read_pci_config(grub_uint8_t bus, grub_uint8_t slot, ++ grub_uint8_t func, grub_uint8_t offset) ++{ ++ grub_uint32_t v; ++ outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); ++ v = inl(0xcfc); ++ return v; ++} ++ ++static grub_uint16_t read_pci_config_16(grub_uint8_t bus, grub_uint8_t slot, ++ grub_uint8_t func, grub_uint8_t offset) ++{ ++ grub_uint16_t v; ++ outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); ++ v = inw(0xcfc + (offset&2)); ++ return v; ++} ++ ++/** ++ * clnuart_early_setup ++ * ++ * Sets up one of the Clanton UARTs as an early boot console ++ */ ++static void cln_uart_early_setup(int num, int slot, int func, int offset) ++{ ++ grub_uint32_t addr = 0; ++ addr = read_pci_config(num, slot, func, offset); ++ ++ if(addr & 0x00000001){ ++ /* This is an IO bar */ ++ grub_printf("bailing.. this is an IO bar\n"); ++ return; ++ } ++ if(addr & 0x00000006){ ++ /* Diver expects 32 bit range */ ++ grub_printf("bailing.. driver expects 32 bit range\n"); ++ return; ++ } ++ pclnuart = (grub_uint32_t *) (addr&0xFFFFFFF0); ++} ++ ++/** ++ * clnuart_early_probe ++ * ++ * Do an early probe of the PCI bus - find Clanton UARTs ++ */ ++static int cln_early_uart_probe(int num, int slot, int func) ++{ ++ grub_uint16_t class; ++ grub_uint16_t vendor; ++ grub_uint16_t device; ++ ++ class = read_pci_config_16(num, slot, func, PCI_CLASS_DEVICE); ++ ++ if (class == 0xffff) { ++ return -1; ++ } ++ ++ vendor = read_pci_config_16(num, slot, func, PCI_VENDOR_ID); ++ device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID); ++ ++ /* Do early PCI UART init */ ++ if(vendor == PCI_VENDOR_ID_INTEL){ ++ /* UART0 is F1, UART1 is F5. We're probing UART1. */ ++ if (device == PCI_DEVICE_CLNUART && 0x0005 == func){ ++ cln_uart_early_setup(num, slot, func, 0x10); ++ return 0; ++ } ++ } ++ return -1; ++} ++ ++grub_uint32_t *cln_early_uart_init(void) ++{ ++ int bus = 0, slot = 0, func = 0; ++ ++ for (slot = 0; slot < 32; slot++){ ++ for (func = 0; func < 8; func++) { ++ /* Only probe function 0 on single fn devices */ ++ if(cln_early_uart_probe(bus, slot, func) == 0){ ++ if (grub_cln_debug) { ++ grub_printf("%s: UART @ B/D/F " ++ "%d/%d/%d\n", ++ __func__, bus, slot, func); ++ } ++ return pclnuart; ++ } ++ } ++ } ++ errnum = ERR_DEV_VALUES; ++ return NULL; ++} ++ +diff --git a/efi/clanton/early_uart.h b/efi/clanton/early_uart.h +new file mode 100644 +index 0000000..a09782d +--- /dev/null ++++ b/efi/clanton/early_uart.h +@@ -0,0 +1,29 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#ifndef __INTEL_CLN_EARLY_UART_HEADER__ ++#define __INTEL_CLN_EARLY_UART_HEADER__ ++ ++#include <grub/types.h> ++ ++grub_uint32_t *cln_early_uart_init(void); ++ ++#endif /* __INTEL_CLN_EARLY_UART_HEADER__ */ ++ +diff --git a/efi/clanton/flash.h b/efi/clanton/flash.h +new file mode 100644 +index 0000000..db69e1b +--- /dev/null ++++ b/efi/clanton/flash.h +@@ -0,0 +1,36 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#ifndef GRUB_CLANTON_FLASH_HEADER ++#define GRUB_CLANTON_FLASH_HEADER 1 ++ ++#include <clanton/target.h> ++#include <grub/types.h> ++ ++/* Pointer to MFH. */ ++extern grub_uint8_t *grub_cln_mfh_addr; ++ ++/* MMIO address of MFH. */ ++#define GRUB_CLN_MFH_ADDR 0xFFF08000 ++ ++/* MMIO address of signed Key Module. */ ++#define GRUB_CLN_S_KEYMOD_ADDR 0xFFFD8000 ++ ++#endif /* ! GRUB_CLANTON_FLASH_HEADER */ +diff --git a/efi/clanton/iarom.c b/efi/clanton/iarom.c +new file mode 100644 +index 0000000..49fc9b6 +--- /dev/null ++++ b/efi/clanton/iarom.c +@@ -0,0 +1,122 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#include <clanton/clanton.h> ++#include <clanton/flash.h> ++#include <clanton/iarom.h> ++#include <clanton/target.h> ++#include <clanton/test_module.h> ++#include <shared.h> ++ ++/* Structure used to help manage a "heap" for Crypto purposes. ++ Note this is a very simple manager with just alloc and init type functions ++ there is no free function and so the init function is expected to be called ++ between crypto functions. ++ Debug and error codes are also stored here so a debugger can access them. */ ++typedef struct scratch_memory_t ++{ ++ /* Address of memory from which we can start to allocate. */ ++ grub_uint8_t *heap_start; ++ /* Address of final byte of memory we can allocate up to. */ ++ grub_uint8_t *heap_end; ++ /* Pointer to the next free address in the heap. */ ++ grub_uint8_t *next_free_mem; ++ /* A progress code, updated as we go along. */ ++ grub_uint32_t debug_code; ++ /* An indicator of why we failed to boot. */ ++ grub_uint32_t fatal_code; ++} ++scratch_memory_t; ++ ++static scratch_memory_t *scratch_area_info = NULL; ++ ++/* 16 kB of scratchpad memory is sufficient for SHA256/RSA2048. */ ++#define CRYPTO_HEAP_SIZE 0x4000 ++static grub_uint8_t memory_buf_array[CRYPTO_HEAP_SIZE]; ++ ++/* The OEM RSA Public Key for verifying signature. */ ++static struct grub_cln_sbh_key_hdr *oem_rsa_key = ++ (struct grub_cln_sbh_key_hdr *) (GRUB_CLN_S_KEYMOD_ADDR + ++ sizeof (struct grub_cln_sbh) - ++ GRUB_CLN_SBH_PADDING); ++ ++/* Initialise the heap descriptor and the buffer. */ ++static void ++init_heap (void) ++{ ++ grub_memset (memory_buf_array, 0x0, sizeof (memory_buf_array)); ++ ++ scratch_area_info = (scratch_memory_t *) &memory_buf_array; ++ /* Next address after the structure itself. */ ++ scratch_area_info->heap_start = (grub_uint8_t *) (scratch_area_info + 1); ++ scratch_area_info->heap_end = (grub_uint8_t *) scratch_area_info + CRYPTO_HEAP_SIZE; ++ scratch_area_info->next_free_mem = scratch_area_info->heap_start; ++ scratch_area_info->debug_code = 0; ++ scratch_area_info->fatal_code = 0; ++ ++ if (grub_cln_debug) ++ grub_printf ("(%s) scratch_area_info = 0x%x\n", __func__, scratch_area_info); ++} ++ ++/* The callback function signature. */ ++typedef grub_uint8_t (*callback_t) (struct grub_cln_sbh_security_hdr *, ++ struct grub_cln_sbh_key_hdr *, ++ struct scratch_memory_t *); ++static grub_uint8_t ++(*IAROM_validate_module) (struct grub_cln_sbh_security_hdr *sec_h, ++ struct grub_cln_sbh_key_hdr *key_h, ++ struct scratch_memory_t *scratch_area_info); ++ ++int ++grub_cln_verify_asset_signature (grub_uint8_t *addr) ++{ ++ grub_uint8_t valid = 0; ++ struct grub_cln_sbh_security_hdr *sec_h = ++ (struct grub_cln_sbh_security_hdr *) addr; ++ grub_uint32_t *callback_ptr = (grub_uint32_t *) GRUB_CLN_IAROM_CALLBACK_PTR; ++ ++ __cln_test_signature(); ++ ++ init_heap (); ++ ++ IAROM_validate_module = (callback_t) *callback_ptr; ++ ++ if (grub_cln_debug) ++ { ++ grub_printf ("OEM key @ 0x%x\n", oem_rsa_key); ++ grub_printf ("Calling into IAROM @ 0x%x for validating module @ 0x%x.. ", ++ IAROM_validate_module, addr); ++ } ++ ++ valid = IAROM_validate_module (sec_h, oem_rsa_key, scratch_area_info); ++ ++ if (grub_cln_debug) ++ { ++ if (valid) ++ grub_printf ("done."); ++ else ++ grub_printf ("failed."); ++ grub_printf (" debug_code=0x%x, fatal_code=0x%x\n", ++ scratch_area_info->debug_code, ++ scratch_area_info->fatal_code); ++ } ++ ++ return (int) valid; ++} +diff --git a/efi/clanton/iarom.h b/efi/clanton/iarom.h +new file mode 100644 +index 0000000..b26bda7 +--- /dev/null ++++ b/efi/clanton/iarom.h +@@ -0,0 +1,33 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#ifndef GRUB_CLANTON_IAROM_HEADER ++#define GRUB_CLANTON_IAROM_HEADER 1 ++ ++#include <clanton/clanton.h> ++#include <clanton/sbh.h> ++#include <clanton/target.h> ++#include <grub/types.h> ++ ++/* Perform signature verification. ++ TODO needs proper documentation. */ ++int grub_cln_verify_asset_signature (grub_uint8_t *addr); ++ ++#endif /* ! GRUB_CLANTON_IAROM_HEADER */ +diff --git a/efi/clanton/imr.c b/efi/clanton/imr.c +new file mode 100644 +index 0000000..6e6d43b +--- /dev/null ++++ b/efi/clanton/imr.c +@@ -0,0 +1,228 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#include <stdbool.h> ++#include <grub/types.h> ++#include <shared.h> ++#include <grub/cpu/linux.h> ++#include <clanton/asset.h> ++#include <clanton/intel_cln_sb.h> ++#include <clanton/test_module.h> ++#include "imr.h" ++ ++#define DRAM_IMR1L (0x44) /* IMR1L address */ ++#define DRAM_IMR1H (0x45) /* IMR1H address */ ++#define DRAM_IMR1RM (0x46) /* IMR1RM address */ ++#define DRAM_IMR1WM (0x47) /* IMR1WM address */ ++#define DRAM_IMR3L (0x4C) /* IMR3L address */ ++#define DRAM_IMR3H (0x4D) /* IMR3H address */ ++#define DRAM_IMR3RM (0x4E) /* IMR3RM address */ ++#define DRAM_IMR3WM (0x4F) /* IMR3WM address */ ++#define DRAM_IMR7L (0x5C) /* IMR7L address */ ++#define DRAM_IMR7H (0x5D) /* IMR7H address */ ++#define DRAM_IMR7RM (0x5E) /* IMR7RM address */ ++#define DRAM_IMR7WM (0x5F) /* IMR7WM address */ ++ ++#define LOCK true ++#define UNLOCK false ++#define IMR_MIN_SIZE (0x400) ++#define IMR_LOCK_BIT (0x80000000) ++/* Mask of the last 2 bit of IMR address [23:2] */ ++#define IMR_REG_MASK (0xFFFFFC) ++/* default register value */ ++#define IMR_WRITE_ENABLE_ALL (0xFFFFFFFF) ++/* default register value */ ++#define IMR_READ_ENABLE_ALL (0xBFFFFFFF) ++/* Mask that enables IMR access for Non-SMM Core, Core Snoops Only.*/ ++#define IMR_SNOOP_NON_SMM_ENABLE (0x40000001) ++/* Mask that enables IMR access for Non-SMM Core Only.*/ ++#define IMR_NON_SMM_ENABLE (0x00000001) ++ ++/* IMRs are 1kB-aligned */ ++#define IMR_ALIGNMENT 10 ++/* Right shift of 22-bit IMR addr to fit IMR Lo/Hi register addr field */ ++#define IMR_ADDR_SHIFT 8 ++ ++/** ++ * imr_align ++ * ++ * @param addr: memory addr ++ * ++ * make input memory addr to be 1k aligned ++ * The IMR designed as always protect the extra 1k memory space based on input ++ * high reg value so the input memory address round down here ++ */ ++static inline grub_uint32_t ++imr_align(grub_uint32_t addr) ++{ ++ addr &= (~((1 << IMR_ALIGNMENT) - 1)); ++ return addr; ++} ++ ++/** ++ * intel_cln_imr_write ++ * ++ * @param lo_addr: starting memory addr ++ * @param hi_addr: end memory addr ++ * @param imr_l: IMRXL reg addr ++ * @param imr_h: IMRXH reg addr ++ * @param imr_rm: IMR read mask reg addr ++ * @param imr_wm: IMR write mask reg addr ++ * ++ * write in imr memory value to corresponding register addr. ++ */ ++static void ++intel_cln_imr_write(grub_uint32_t lo_addr, grub_uint32_t hi_addr, ++ grub_uint8_t imr_l, grub_uint8_t imr_h, ++ grub_uint8_t imr_rm, grub_uint8_t imr_wm, bool lock) ++{ ++ grub_uint32_t tmp_addr; ++ ++ /* We have to becareful here, some IMR regions may previously used by ++ * BIOS. ++ * 1. disable the IMR if its already enabled ++ * 2. assign IMR Low address to where you want ++ * 3. assign IMR High address to where you want ++ * 4. apply read/write access masks ++ */ ++ intel_cln_sb_read_reg(SB_ID_ESRAM, CFG_READ_OPCODE, imr_l, &tmp_addr); ++ if(tmp_addr & IMR_LOCK_BIT) ++ { ++ grub_printf("%s IMR has already locked.\n ",__func__); ++ return; ++ } ++ ++ if(tmp_addr) ++ { ++ if (grub_cln_debug) ++ grub_printf("%s IMR already in use, start at: 0x%08x \n", ++ __func__, tmp_addr); ++ intel_cln_sb_write_reg(SB_ID_ESRAM, CFG_WRITE_OPCODE, imr_rm, ++ IMR_READ_ENABLE_ALL ); ++ intel_cln_sb_write_reg(SB_ID_ESRAM, CFG_WRITE_OPCODE, imr_wm, ++ IMR_WRITE_ENABLE_ALL); ++ } ++ ++ intel_cln_sb_write_reg(SB_ID_ESRAM, CFG_WRITE_OPCODE, imr_h, hi_addr); ++ if (grub_cln_debug) ++ grub_printf("%s IMRXH 0x%08x\n", __func__, hi_addr); ++ ++ intel_cln_sb_write_reg(SB_ID_ESRAM, CFG_WRITE_OPCODE, imr_l, lo_addr); ++ if (grub_cln_debug) ++ grub_printf("%s IMRXL 0x%08x\n", __func__, lo_addr); ++ ++ /* authrised agents to access initrd: Non-SMM(0b), Host(30b), PUnit(29b) */ ++ /* NOTE. CPU snoop will be always writes */ ++ intel_cln_sb_write_reg(SB_ID_ESRAM, CFG_WRITE_OPCODE, imr_rm, ++ IMR_NON_SMM_ENABLE); ++ intel_cln_sb_write_reg(SB_ID_ESRAM, CFG_WRITE_OPCODE, imr_wm, ++ IMR_SNOOP_NON_SMM_ENABLE); ++ ++ if(lock) ++ { ++ lo_addr |= IMR_LOCK_BIT; ++ intel_cln_sb_write_reg(SB_ID_ESRAM, CFG_WRITE_OPCODE, imr_l, lo_addr); ++ if (grub_cln_debug) ++ grub_printf("%s IMRXL locked 0x%08x\n", __func__, lo_addr); ++ } ++ ++} ++ ++/** ++ * intel_cln_imr_setup ++ * ++ * @param id: IMR ID ++ * @param addr: starting addr ++ * @param size: length of memory ++ * ++ * setup IMR protection of the specified memory region. ++ */ ++grub_error_t ++intel_cln_imr_setup(imr_range id, grub_addr_t addr, grub_size_t size) ++{ ++ ++ /* The steps to setup IMR in Grub ++ * 1. calculate the memory address ++ * 2. memory alignment to 1k ++ * 3. shift address value to register specified format. ++ * 4. read register to see if its already locked. ++ * 5. enable default read/write all access right if imr already in use ++ * 6. write high/low memory address to IMR registers. ++ * 7. setup authorised agents for IMR mask. ++ */ ++ grub_uint32_t imr_hi_addr; ++ grub_uint32_t imr_lo_addr; ++ ++ errnum = ERR_NONE; ++ ++ if(size < IMR_MIN_SIZE) ++ { ++ grub_printf("Invalid input size! \n "); ++ errnum = ERR_BAD_ARGUMENT; ++ return errnum; ++ } ++ else ++ { ++ if (grub_cln_debug) ++ grub_printf("setting imr with input: addr=0x%08x, size=0x%x \n", ++ addr, (unsigned int)size); ++ } ++ ++ /* align to 1k boundary */ ++ imr_lo_addr = imr_align(addr); ++ ++ /* update high memory address */ ++ imr_hi_addr = imr_lo_addr + imr_align(size); ++ ++ /* align to 1k boundary */ ++ imr_hi_addr = imr_align(imr_hi_addr); ++ ++ /* apply IMR MASK for register specified format */ ++ imr_hi_addr = ((imr_hi_addr >> IMR_ADDR_SHIFT) & IMR_REG_MASK); ++ imr_lo_addr = ((imr_lo_addr >> IMR_ADDR_SHIFT) & IMR_REG_MASK); ++ ++ switch(id) ++ { ++ /* IMR for boot params */ ++ case IMR_RANGE_BOOT: ++ { ++ intel_cln_imr_write(imr_lo_addr, imr_hi_addr, DRAM_IMR1L, DRAM_IMR1H, ++ DRAM_IMR1RM, DRAM_IMR1WM, UNLOCK); ++ break; ++ } ++ ++ /* IMR for bzImage */ ++ case IMR_RANGE_BZIMAGE: ++ { ++ intel_cln_imr_write(imr_lo_addr, imr_hi_addr, DRAM_IMR7L, DRAM_IMR7H, ++ DRAM_IMR7RM, DRAM_IMR7WM, UNLOCK); ++ break; ++ } ++ default: ++ { ++ grub_printf("%s Invalid input ! \n", __func__); ++ errnum = ERR_BAD_ARGUMENT; ++ break; ++ } ++ } ++ ++ return errnum; ++} ++/* EOL */ +diff --git a/efi/clanton/imr.h b/efi/clanton/imr.h +new file mode 100644 +index 0000000..38391cd +--- /dev/null ++++ b/efi/clanton/imr.h +@@ -0,0 +1,38 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#ifndef __IMR_H__ ++#define __IMR_H__ ++ ++#include <grub/types.h> ++#include <shared.h> ++ ++typedef enum imr_range ++{ ++ IMR_RANGE_BOOT = 1, ++ IMR_RANGE_KERN_TEXT = 3, ++ IMR_RANGE_BZIMAGE = 7, ++}imr_range; ++ ++ ++/* setup IMR protection of the specified memory region */ ++grub_error_t intel_cln_imr_setup(imr_range id, grub_addr_t addr, grub_size_t size); ++ ++#endif /*__IMR_H__*/ +diff --git a/efi/clanton/intel_cln_sb.c b/efi/clanton/intel_cln_sb.c +new file mode 100644 +index 0000000..3bbecfc +--- /dev/null ++++ b/efi/clanton/intel_cln_sb.c +@@ -0,0 +1,210 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#include <netboot/linux-asm-io.h> ++#include <stage2/shared.h> ++#include "intel_cln_sb.h" ++ ++#define INTEL_CLN_SB_CMD_ADDR (0x000000D0) ++#define INTEL_CLN_SB_DATA_ADDR (0x000000D4) ++ ++#define INTEL_CLN_SB_MCR_SHIFT (24) ++#define INTEL_CLN_SB_PORT_SHIFT (16) ++#define INTEL_CLN_SB_REG_SHIFT (8) ++#define INTEL_CLN_SB_BYTEEN (0xF0) /* enable all 32 bits */ ++ ++/* PCI config space reg definitions */ ++#define PCI_VENDOR_ID (0x00) ++#define PCI_DEVICE_ID (0x02) ++#define PCI_CLASS_DEVICE (0x0A) ++ ++struct sb_pci_dev { ++ unsigned int bus; ++ unsigned int dev_fn; ++}; ++ ++static struct sb_pci_dev sb_pcidev; ++ ++/* ++ * Functions for accessing PCI configuration space with type 1 accesses ++ */ ++#define CONFIG_CMD(bus, dev_fn, where) \ ++ (0x80000000 | (bus << 16) | (dev_fn << 8) | (where & ~3)) ++ ++static void ++pci_read_config_byte(struct sb_pci_dev *sb_pcidev, ++ unsigned int where, unsigned char *value) ++{ ++ outl(CONFIG_CMD(sb_pcidev->bus,sb_pcidev->dev_fn, where), 0xCF8); ++ *value = inb(0xCFC + (where&3)); ++} ++ ++static void ++pci_read_config_word (struct sb_pci_dev *sb_pcidev, ++ unsigned int where, unsigned short *value) ++{ ++ outl(CONFIG_CMD(sb_pcidev->bus,sb_pcidev->dev_fn,where), 0xCF8); ++ *value = inw(0xCFC + (where&2)); ++} ++ ++static void ++pci_read_config_dword (struct sb_pci_dev *sb_pcidev, ++ unsigned int where, unsigned int *value) ++{ ++ outl(CONFIG_CMD(sb_pcidev->bus,sb_pcidev->dev_fn, where), 0xCF8); ++ *value = inl(0xCFC); ++} ++ ++static void ++pci_write_config_byte (struct sb_pci_dev *sb_pcidev, ++ unsigned int where, unsigned char value) ++{ ++ outl(CONFIG_CMD(sb_pcidev->bus,sb_pcidev->dev_fn, where), 0xCF8); ++ outb(value, 0xCFC + (where&3)); ++} ++ ++static void ++pci_write_config_word (struct sb_pci_dev *sb_pcidev, ++ unsigned int where, unsigned short value) ++{ ++ outl(CONFIG_CMD(sb_pcidev->bus,sb_pcidev->dev_fn, where), 0xCF8); ++ outw(value, 0xCFC + (where&2)); ++} ++ ++static void ++pci_write_config_dword (struct sb_pci_dev *sb_pcidev, unsigned int where, ++ unsigned int value) ++{ ++ outl(CONFIG_CMD(sb_pcidev->bus,sb_pcidev->dev_fn, where), 0xCF8); ++ outl(value, 0xCFC); ++} ++ ++/** ++ * intel_cln_sb_read_reg ++ * ++ * @param cln_sb_id: Sideband identifier ++ * @param command: Command to send to destination identifier ++ * @param reg: Target register w/r to cln_sb_id ++ * @return nothing ++ * ++ * Utility function to allow thread-safe read of side-band ++ * command - can be different read op-code types - which is why we don't ++ * hard-code this value directly into msg ++ */ ++void ++intel_cln_sb_read_reg(cln_sb_id id, grub_uint8_t cmd, grub_uint8_t reg, ++ grub_uint32_t *data) ++{ ++ grub_uint32_t msg = (cmd << INTEL_CLN_SB_MCR_SHIFT) | ++ ((id << INTEL_CLN_SB_PORT_SHIFT) & 0xFF0000)| ++ ((reg << INTEL_CLN_SB_REG_SHIFT) & 0xFF00)| ++ INTEL_CLN_SB_BYTEEN; ++ ++ if(data == NULL) ++ return; ++ ++ pci_write_config_dword(&sb_pcidev, INTEL_CLN_SB_CMD_ADDR, msg); ++ pci_read_config_dword(&sb_pcidev, INTEL_CLN_SB_DATA_ADDR, data); ++ ++} ++ ++/** ++ * intel_cln_sb_write_reg ++ * ++ * @param cln_sb_id: Sideband identifier ++ * @param command: Command to send to destination identifier ++ * @param reg: Target register w/r to cln_sb_id ++ * @return nothing ++ * ++ * Utility function to allow thread-safe write of side-band ++ */ ++void ++intel_cln_sb_write_reg(cln_sb_id id, grub_uint8_t cmd, grub_uint8_t reg, ++ grub_uint32_t data) ++{ ++ grub_uint32_t msg = (cmd << INTEL_CLN_SB_MCR_SHIFT) | ++ ((id << INTEL_CLN_SB_PORT_SHIFT) & 0xFF0000)| ++ ((reg << INTEL_CLN_SB_REG_SHIFT) & 0xFF00)| ++ INTEL_CLN_SB_BYTEEN; ++ ++ pci_write_config_dword(&sb_pcidev, INTEL_CLN_SB_DATA_ADDR, data); ++ pci_write_config_dword(&sb_pcidev, INTEL_CLN_SB_CMD_ADDR, msg); ++} ++ ++ ++/* Clanton hardware */ ++#define PCI_VENDOR_ID_INTEL (0x8086) ++#define PCI_DEVICE_ID_CLANTON_SB (0x0958) ++ ++/** ++ * sb_probe ++ * ++ * @param dev: the PCI device matching ++ * @param id: entry in the match table ++ * @return 0 ++ * ++ * Callback from PCI layer when dev/vendor ids match. ++ * Sets up necessary resources ++ */ ++int ++intel_cln_sb_probe(void) ++{ ++ int found = 0; ++ grub_uint16_t class; ++ grub_uint16_t device, vendor; ++ grub_uint8_t type; ++ ++ sb_pcidev.bus = 0; ++ for (sb_pcidev.dev_fn = 0; sb_pcidev.dev_fn < 0xFF; sb_pcidev.dev_fn++) ++ { ++ /* Only probe function 0 on single fn devices */ ++ pci_read_config_word(&sb_pcidev, PCI_CLASS_DEVICE, &class); ++ ++ if (class == 0xffff) ++ continue; ++ ++ pci_read_config_word(&sb_pcidev, PCI_VENDOR_ID, &vendor); ++ pci_read_config_word(&sb_pcidev, PCI_DEVICE_ID, &device); ++ ++ /* Do early PCI UART init */ ++ if(vendor == PCI_VENDOR_ID_INTEL) ++ { ++ if (device == PCI_DEVICE_ID_CLANTON_SB) ++ { ++ /* Found */ ++ found = 1; ++ grub_printf("%s b/d/f 0x%04x/0x%04x scan vendor 0x%04x device 0x%04x\n", ++ __func__, sb_pcidev.bus, sb_pcidev.dev_fn, vendor, device); ++ break; ++ } ++ } ++ } ++ ++ if(found == 0) ++ { ++ grub_printf("Unable to init side-band!\n"); ++ return -1; ++ } ++ ++ grub_printf("Intel Clanton side-band driver registered\n"); ++ ++ ++ return 0; ++} +diff --git a/efi/clanton/intel_cln_sb.h b/efi/clanton/intel_cln_sb.h +new file mode 100644 +index 0000000..dde6135 +--- /dev/null ++++ b/efi/clanton/intel_cln_sb.h +@@ -0,0 +1,47 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#ifndef __INTEL_CLN_SB_HEADER__ ++#define __INTEL_CLN_SB_HEADER__ ++ ++#include <clanton/clanton.h> ++#include <clanton/sbh.h> ++#include <clanton/target.h> ++#include <grub/types.h> ++ ++typedef enum { ++ SB_ID_HUNIT = 0x03, ++ SB_ID_PUNIT = 0x04, ++ SB_ID_ESRAM = 0x05, ++ SB_ID_SEC_FUSE = 0x33, /* Fuse banks */ ++}cln_sb_id; ++ ++/* Sideband MCR opcodes */ ++#define CFG_READ_FUSE_OPCODE (0x06) /* Fuse read */ ++#define CFG_READ_OPCODE (0x10) /* Register read */ ++#define CFG_WRITE_OPCODE (0x11) /* Register write */ ++ ++int intel_cln_sb_probe (void); ++void intel_cln_sb_read_reg(cln_sb_id id, grub_uint8_t cmd, grub_uint8_t reg, ++ grub_uint32_t *data); ++void intel_cln_sb_write_reg(cln_sb_id id, grub_uint8_t cmd, grub_uint8_t reg, ++ grub_uint32_t data); ++#endif /* __INTEL_CLN_SB_HEADER__ */ ++ +diff --git a/efi/clanton/mfh.c b/efi/clanton/mfh.c +new file mode 100644 +index 0000000..a1c3029 +--- /dev/null ++++ b/efi/clanton/mfh.c +@@ -0,0 +1,91 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#include <clanton/clanton.h> ++#include <clanton/flash.h> ++#include <clanton/mfh.h> ++#include <shared.h> ++ ++#define offsetof(st, m) \ ++ ((unsigned int) ( (char *)&((st *)0)->m - (char *)0 )) ++ ++static struct grub_cln_mfh cln_mfh; ++static int cln_mfh_loaded = 0; ++ ++void ++grub_cln_mfh_load (const struct grub_cln_mfh *mfh) ++{ ++ grub_memcpy (&cln_mfh, (grub_uint8_t *) mfh, sizeof (cln_mfh)); ++ cln_mfh_loaded = 1; ++} ++ ++grub_error_t ++grub_cln_mfh_entry_lookup (const grub_uint8_t *mfh_addr, unsigned int entry_type, ++ grub_uint8_t **addr, grub_uint32_t *len) ++{ ++ unsigned int offset = 0x0; ++ unsigned int i = 0; ++ grub_cln_mfh_item_t item = 0x0; ++ ++ if (! mfh_addr || ! addr || ! len) ++ { ++ grub_printf ("%s: NULL pointer\n", __func__); ++ errnum = ERR_BAD_ARGUMENT; ++ return errnum; ++ } ++ ++ /* Fetch the MFH if not done yet. */ ++ if (! cln_mfh_loaded) ++ grub_cln_mfh_load ((grub_cln_mfh_t) mfh_addr); ++ ++ /* Sanity check. */ ++ if (GRUB_CLN_MFH_IDENTIFIER != cln_mfh.identifier) ++ { ++ cln_mfh_loaded = 0; ++ grub_printf ("%s: invalid MFH identifier\n", __func__); ++ errnum = ERR_EXEC_FORMAT; ++ return errnum; ++ } ++ ++ /* Look up. */ ++ offset = offsetof (struct grub_cln_mfh, padding) ++ + sizeof (grub_uint32_t) * cln_mfh.boot_prio_list_count; ++ for (i = 0; i < cln_mfh.flash_item_count; i ++, offset += sizeof (*item)) ++ { ++ item = (grub_cln_mfh_item_t) ((grub_uint8_t *) &cln_mfh + offset); ++ if (item->type == entry_type) ++ { ++ *len = item->flash_item_len; ++ *addr = (grub_uint8_t *) item->flash_item_addr; ++ if (grub_cln_debug) ++ grub_printf ("%s: found entry 0x%x @addr=0x%x, len=0x%x\n", ++ __func__, item->type, *addr, *len); ++ return errnum; ++ } ++ } ++ ++ /* At this stage, we haven't found the item. */ ++ if (grub_cln_debug) ++ { ++ grub_printf ("%s: flash item 0x%x not found\n", __func__, entry_type); ++ } ++ errnum = ERR_FILE_NOT_FOUND; ++ return errnum; ++} +diff --git a/efi/clanton/mfh.h b/efi/clanton/mfh.h +new file mode 100644 +index 0000000..c20a7d1 +--- /dev/null ++++ b/efi/clanton/mfh.h +@@ -0,0 +1,96 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#ifndef GRUB_CLANTON_MFH_HEADER ++#define GRUB_CLANTON_MFH_HEADER 1 ++ ++#include <grub/types.h> ++#include <shared.h> ++ ++/* Magic number corresponds to "_MFH" in ASCII. */ ++#define GRUB_CLN_MFH_IDENTIFIER 0x5F4D4648 ++ ++/* Clanton Master Flash Header. */ ++typedef struct grub_cln_mfh ++{ ++ grub_uint32_t identifier; /* 0x000 */ ++ grub_uint32_t version; /* 0x004 */ ++ grub_uint32_t flags; /* 0x008 */ ++ grub_uint32_t next_header_block; /* 0x00C */ ++ grub_uint32_t flash_item_count; /* 0x010 */ ++ grub_uint32_t boot_prio_list_count; /* 0x014 */ ++ /* Pad to 512 bytes. */ ++ grub_uint8_t padding[0x1E8]; /* 0x018 */ ++} ++*grub_cln_mfh_t; ++ ++ ++/* Flash item types. */ ++#define CLN_MFH_ITEM_TYPE_FW_STAGE1 0x00000000 ++#define CLN_MFH_ITEM_TYPE_FW_STAGE1_SIGNED 0x00000001 ++/* Reserved. */ ++#define CLN_MFH_ITEM_TYPE_FW_STAGE2 0x00000003 ++#define CLN_MFH_ITEM_TYPE_FW_STAGE2_SIGNED 0x00000004 ++#define CLN_MFH_ITEM_TYPE_FW_STAGE2_CONFIG 0x00000005 ++#define CLN_MFH_ITEM_TYPE_FW_STAGE2_CONFIG_SIGNED 0x00000006 ++#define CLN_MFH_ITEM_TYPE_FW_PARAMS 0x00000007 ++#define CLN_MFH_ITEM_TYPE_FW_RECOVERY 0x00000008 ++#define CLN_MFH_ITEM_TYPE_FW_RECOVERY_SIGNED 0x00000009 ++/* Reserved. */ ++#define CLN_MFH_ITEM_TYPE_BOOTLOADER 0x0000000B ++#define CLN_MFH_ITEM_TYPE_BOOTLOADER_SIGNED 0x0000000C ++#define CLN_MFH_ITEM_TYPE_BOOTLOADER_CONFIG 0x0000000D ++#define CLN_MFH_ITEM_TYPE_BOOTLOADER_CONFIG_SIGNED 0x0000000E ++/* Reserved. */ ++#define CLN_MFH_ITEM_TYPE_KERNEL 0x00000010 ++#define CLN_MFH_ITEM_TYPE_KERNEL_SIGNED 0x00000011 ++#define CLN_MFH_ITEM_TYPE_RAMDISK 0x00000012 ++#define CLN_MFH_ITEM_TYPE_RAMDISK_SIGNED 0x00000013 ++/* Reserved. */ ++#define CLN_MFH_ITEM_TYPE_LOADABLE_PROGRAM 0x00000015 ++#define CLN_MFH_ITEM_TYPE_LOADABLE_PROGRAM_SIGNED 0x00000016 ++/* Reserved. */ ++#define CLN_MFH_ITEM_TYPE_BUILD_INFO 0x00000018 ++ ++/* Flash item definition. */ ++typedef struct grub_cln_mfh_item ++{ ++ grub_uint32_t type; /* 0x000 */ ++ grub_uint32_t flash_item_addr; /* 0x004 */ ++ grub_uint32_t flash_item_len; /* 0x008 */ ++ grub_uint32_t reserved; /* 0x00C */ ++} ++*grub_cln_mfh_item_t; ++ ++/* Load the MFH into memory. */ ++void grub_cln_mfh_load (const struct grub_cln_mfh *mfh); ++ ++/* Lookup the MFH for a specific entry_type. ++ The MMIO start address of the MFH is passed by *mfh_addr. ++ If the entry is found, store the MMIO address into *addr and the length ++ into *len and return ERR_NONE. ++ Return error code if any error. ++ Note it automatically loads the MFH if not already done so. */ ++grub_error_t grub_cln_mfh_entry_lookup (const grub_uint8_t *mfh_addr, ++ unsigned int entry_type, ++ grub_uint8_t **addr, ++ grub_uint32_t *len); ++ ++#endif /* ! GRUB_CLANTON_MFH_HEADER */ +diff --git a/efi/clanton/perf_metrics.c b/efi/clanton/perf_metrics.c +new file mode 100644 +index 0000000..b6fced5 +--- /dev/null ++++ b/efi/clanton/perf_metrics.c +@@ -0,0 +1,53 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#include <clanton/perf_metrics.h> ++#include <clanton/target.h> ++#include <shared.h> ++ ++/* String to be appended to the Linux command line. */ ++static char perf_metric_string[GRUB_CLN_PERF_METRIC_STRING_MAXLEN] = ""; ++ ++void ++grub_cln_event_reset (void) ++{ ++ grub_memset (perf_metric_string, 0x0, GRUB_CLN_PERF_METRIC_STRING_MAXLEN); ++} ++ ++void ++grub_cln_event_append (const char *tag) ++{ ++ /* Format is (ignore apostrophes): ' tag=0x%016x' plus string terminator, ++ with length of tag string limited to GRUB_CLN_BOOT_EVENT_TAG_MAXLEN. */ ++ char buf[21 + GRUB_CLN_BOOT_EVENT_TAG_MAXLEN] = ""; ++ char tag_trimmed[GRUB_CLN_BOOT_EVENT_TAG_MAXLEN] = ""; ++ ++ grub_strncpy (tag_trimmed, tag, GRUB_CLN_BOOT_EVENT_TAG_MAXLEN); ++ grub_sprintf (buf, " %s=0x%016llx", tag_trimmed, grub_rdtsc ()); ++ ++ /* Append entry to performance metric string. */ ++ grub_strncat (perf_metric_string, buf, GRUB_CLN_PERF_METRIC_STRING_MAXLEN); ++} ++ ++char * ++grub_cln_event_get_metrics (void) ++{ ++ return perf_metric_string; ++} +diff --git a/efi/clanton/perf_metrics.h b/efi/clanton/perf_metrics.h +new file mode 100644 +index 0000000..d3837c5 +--- /dev/null ++++ b/efi/clanton/perf_metrics.h +@@ -0,0 +1,40 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#ifndef GRUB_CLANTON_TSC_HEADER ++#define GRUB_CLANTON_TSC_HEADER 1 ++ ++#define GRUB_CLN_PERF_METRIC_STRING_MAXLEN 0x400 ++#define GRUB_CLN_BOOT_EVENT_TAG_MAXLEN 0x15 ++ ++/* Init/Reinit the performance metric string. */ ++void grub_cln_event_reset (void); ++ ++/* Log an event along with the current timestamp and append it to the ++ performance metric string. ++ Tag is limited to GRUB_CLN_BOOT_EVENT_TAG_MAXLEN. ++ Performance metric string is limited to GRUB_CLN_PERF_METRIC_STRING_MAXLEN. ++ Any string overrun is dropped and no error code/message is thrown. */ ++void grub_cln_event_append (const char *tag); ++ ++/* Return the performance metric string */ ++char *grub_cln_event_get_metrics (void); ++ ++#endif /* ! GRUB_CLANTON_TSC_HEADER */ +diff --git a/efi/clanton/recovery.c b/efi/clanton/recovery.c +new file mode 100644 +index 0000000..97677dd +--- /dev/null ++++ b/efi/clanton/recovery.c +@@ -0,0 +1,164 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#include <clanton/clanton.h> ++#include <shared.h> ++ ++/* The table of builtin commands preserved in Clanton Recovery debug mode. ++ Sorted in dictionary order. */ ++static char *debug_recovery_cmds[] = ++{ ++ "cat", ++ "clear", ++ "displaymem", ++ "find", ++ "geometry", ++ "halt", ++ "help", ++ "read", ++ "reboot", ++ 0 ++}; ++ ++/* The table of builtin commands preserved in Clanton Recovery release mode. ++ Sorted in dictionary order. */ ++static char *release_recovery_cmds[] = ++{ ++ 0 ++}; ++ ++/* Heap for command line. */ ++static char heap[0x80] = ""; ++ ++/* Perform set intersection between commands in builtin_table[] and cmd_table. */ ++static void ++restrict_builtin_commands (char *cmd_table[]) ++{ ++ struct builtin **builtin = 0; ++ char *recovery_cmd = 0; ++ unsigned short int keep_cmd = 0; ++ unsigned int index = 0; ++ ++ for (builtin = builtin_table; *builtin != 0; builtin ++) ++ { ++ keep_cmd = 0; ++ for (index = 0, recovery_cmd = *cmd_table; ++ recovery_cmd != 0; ++ recovery_cmd = *(++index + cmd_table)) ++ { ++ if (0 == strcmp (recovery_cmd, (*builtin)->name)) ++ { ++ keep_cmd = 1; ++ break; ++ } ++ } ++ ++ if (! keep_cmd) ++ { ++ /* Hide out command and drop the pointer to the routine. */ ++ (*builtin)->func = NULL; ++ (*builtin)->flags = 0; ++ } ++ } ++} ++ ++/* Clanton-specific recovery shell commands definition. */ ++ ++static struct builtin builtin_cln_sdio_program = ++{ ++ .name = "cln_sdio_program", ++ .func = grub_cln_sdio_program, ++ .flags = BUILTIN_CMDLINE | BUILTIN_HELP_LIST, ++ .short_doc = "cln_sdio_program", ++ .long_doc = "Initiate Clanton SDIO image recovery/installation.", ++}; ++ ++static struct builtin builtin_cln_spi_program = ++{ ++ .name = "cln_fw_recovery", ++ .func = grub_cln_spi_program, ++ .flags = BUILTIN_CMDLINE | BUILTIN_HELP_LIST, ++ .short_doc = "cln_fw_recovery", ++ .long_doc = "Perform Firmware-based Clanton system recovery.", ++}; ++ ++static int ++add_cln_recovery_command (unsigned short int is_spi_asset) ++{ ++ struct builtin **builtin = 0; ++ unsigned short int success = 0; ++ ++ /* Make sure that function name and flags are never overwritten. */ ++ builtin_cln_sdio_program.func = &grub_cln_sdio_program; ++ builtin_cln_sdio_program.flags = BUILTIN_CMDLINE | BUILTIN_HELP_LIST; ++ builtin_cln_spi_program.func = &grub_cln_spi_program; ++ builtin_cln_spi_program.flags = BUILTIN_CMDLINE | BUILTIN_HELP_LIST; ++ ++ /* Place recovery commands into free builtin_table[] entries. ++ This should never fail, provided that the original list of built-in ++ commands has been already skimmed (e.g. via restrict_builtin_commands). */ ++ for (builtin = builtin_table; *builtin != 0; builtin ++) ++ { ++ if (NULL == (*builtin)->func) ++ { ++ /* Clanton-specific commands are mutually exclusive. */ ++ if (is_spi_asset) ++ (*builtin) = &builtin_cln_spi_program; ++ else ++ (*builtin) = &builtin_cln_sdio_program; ++ ++ success = 1; ++ break; ++ } ++ } ++ ++ return success; ++} ++ ++/* Enter a Clanton recovery shell for error handling. ++ The shell provides a set of restricted debug commands and Clanton-specific ++ commands for Grub-provided SDIO recovery and Firmware-provided SPI recovery. ++ The Firmware-provided recovery mechanism is exposed when the failing asset ++ resides in SPI/flash. Alternatively the SDIO program utility is made ++ available. */ ++void ++grub_cln_recovery_shell (unsigned short int is_spi_asset) ++{ ++ grub_error_t original_errnum = errnum; ++ ++ if (grub_cln_secure) ++ { ++ /* Restrict available commands. */ ++ if (grub_cln_debug) ++ restrict_builtin_commands (debug_recovery_cmds); //XXX secure-debug recovery commands.. ++ else ++ restrict_builtin_commands (release_recovery_cmds); //XXX ditto ++ } ++ ++ /* Add Clanton-specific recovery commands. */ ++ if (! add_cln_recovery_command (is_spi_asset)) ++ grub_printf ("%s() - failed adding Clanton-specific command\n", __func__); ++ ++ errnum = original_errnum; ++ ++ /* Recovery shell never returns. But error out noisily if it does. */ ++ enter_cmdline (heap, 1, 1); ++ grub_printf ("BUG: %s() returning\n", __func__); ++} +diff --git a/efi/clanton/sbh.h b/efi/clanton/sbh.h +new file mode 100644 +index 0000000..ad25c5b +--- /dev/null ++++ b/efi/clanton/sbh.h +@@ -0,0 +1,77 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#ifndef GRUB_CLANTON_SBH_HEADER ++#define GRUB_CLANTON_SBH_HEADER 1 ++ ++#include <grub/types.h> ++ ++/* Clanton Secure Boot Header. */ ++ ++/* Magic number corresponds to "_CSH" in ASCII. */ ++#define GRUB_CLN_SBH_MAGIC_NUMBER 0x5F435348 ++ ++/* Padding for Clanton Secure Boot Header to match 1kB size. */ ++#define GRUB_CLN_SBH_PADDING 0x1B4 ++ ++typedef struct grub_cln_sbh ++{ ++ struct grub_cln_sbh_security_hdr ++ { ++ grub_uint32_t magic_number; /* 0x000 */ ++ grub_uint32_t version; /* 0x004 */ ++ grub_uint32_t module_size; /* 0x008 */ ++ grub_uint32_t svn_index; /* 0x00C */ ++ grub_uint32_t svn; /* 0x010 */ ++ grub_uint32_t module_id; /* 0x014 */ ++ grub_uint32_t module_vendor; /* 0x018 */ ++ grub_uint32_t date; /* 0x01C */ ++ grub_uint32_t header_len; /* 0x020 */ ++ grub_uint32_t hashing_algorithm; /* 0x024 */ ++ grub_uint32_t crypto_algorithm; /* 0x028 */ ++ grub_uint32_t key_size; /* 0x02C */ ++ grub_uint32_t signature_size; /* 0x030 */ ++ grub_uint32_t next_header_ptr; /* 0x034 */ ++ grub_uint8_t reserved[0x8]; /* 0x038 */ ++ } security_header; ++ struct grub_cln_csh_key_hdr ++ { ++ grub_uint32_t key_modulus_size; /* 0x040 */ ++ grub_uint32_t key_exponent_size; /* 0x044 */ ++ /* Currently we only support RSA. Hence size is hardcoded. */ ++ grub_uint32_t key_modulus[256 / sizeof (grub_uint32_t)]; /* 0x048 */ ++ grub_uint32_t key_exponent[4 / sizeof (grub_uint32_t)]; /* 0x148 */ ++ } key_structure; ++ /* Currently we only support RSA. Hence size is hardcoded. */ ++ grub_uint8_t signature[0x100]; /* 0x14C */ ++ grub_uint8_t padding[GRUB_CLN_SBH_PADDING]; /* 0x24C */ ++} ++*grub_cln_csh_t; ++ ++ ++/* Settings for Clanton SBH on filesystem. */ ++ ++#define GRUB_CLN_SBH_FILE_EXT ".csbh" ++/* Be as conservative as possible about the max path length. Use the minimum ++ value allowed by the file systems supported by GRUB. */ ++#define GRUB_CLN_SBH_FILE_PATHMAX 1024 /* FIXME */ ++ ++ ++#endif /* ! GRUB_CLANTON_SBH_HEADER */ +diff --git a/efi/clanton/sdio_program.c b/efi/clanton/sdio_program.c +new file mode 100644 +index 0000000..762386b +--- /dev/null ++++ b/efi/clanton/sdio_program.c +@@ -0,0 +1,35 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#include <shared.h> ++ ++/* SDIO filesystem installation/recovery utility. ++ Perform eMMC programming. */ ++int ++grub_cln_sdio_program (char *s, int i) ++{ ++ grub_printf ("Clanton SDIO program utility\n"); ++ ++ /* Not implemented yet. */ ++ ++ while (1); ++ ++ return 0; ++} +diff --git a/efi/clanton/spi_program.c b/efi/clanton/spi_program.c +new file mode 100644 +index 0000000..bf2d6dd +--- /dev/null ++++ b/efi/clanton/spi_program.c +@@ -0,0 +1,33 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#include <shared.h> ++ ++/* Trigger a FW-initiated recovery session. */ ++int ++grub_cln_spi_program (char *s, int i) ++{ ++ grub_printf ("%s()\n", __func__); ++ ++ /* Not implemented yet. */ ++ while (1); ++ ++ return 0; ++} +diff --git a/efi/clanton/target.h b/efi/clanton/target.h +new file mode 100644 +index 0000000..6610473 +--- /dev/null ++++ b/efi/clanton/target.h +@@ -0,0 +1,37 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#ifndef CLANTON_TARGET_HEADER ++#define CLANTON_TARGET_HEADER ++ ++/* Pointer to IAROM callback address for signature verification. */ ++#define GRUB_CLN_IAROM_CALLBACK_PTR 0xFFFFFFE0 ++ ++/* Read the time-stamp counter. */ ++static inline unsigned long long int ++grub_rdtsc (void) ++{ ++ unsigned int lo, hi; ++ ++ __asm__ __volatile__ ("rdtsc" : "=a" (lo), "=d" (hi)); ++ return (unsigned long long) hi << 32 | lo; ++} ++ ++#endif /* CLANTON_TARGET_HEADER */ +diff --git a/efi/clanton/test_module.c b/efi/clanton/test_module.c +new file mode 100644 +index 0000000..cebc115 +--- /dev/null ++++ b/efi/clanton/test_module.c +@@ -0,0 +1,156 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#include <clanton/flash.h> ++#include <clanton/intel_cln_sb.h> ++#include <clanton/test_module.h> ++#include <grub/cpu/linux.h> ++#include <shared.h> ++ ++/* Test-specific parameters from kernel command line */ ++#define TEST_PARAM_ID "__cln_drive_failure=" ++#define TEST_PARAM_NO_KERNEL "no-kernel" ++#define TEST_PARAM_NO_RAMDISK "no-ramdisk" ++#define TEST_PARAM_NO_KERNEL_SIG "no-kernel-signature" ++#define TEST_PARAM_NO_RAMDISK_SIG "no-ramdisk-signature" ++#define TEST_PARAM_BAD_KERNEL_SIG "kernel-sig-verification" ++#define TEST_PARAM_BAD_RAMDISK_SIG "ramdisk-sig-verification" ++#define TEST_PARAM_BAD_IMR "bad-imr" ++ ++/* Test setup and state */ ++struct __cln_error_trigger_struct __cln_err = { ++ .no_kernel = 0, ++ .no_ramdisk = 0, ++ .no_kernel_sig = 0, ++ .no_ramdisk_sig = 0, ++ .kernel_sig_fail = 0, ++ .ramdisk_sig_fail = 0, ++ .bad_imr = 0, ++ .state_sign_verify = 0, ++}; ++ ++/* PUnit DMA registers over side-band. */ ++#define PUNIT_SPI_DMA_COUNT_REG (0x60) ++#define PUNIT_SPI_DMA_DEST_REG (0x61) ++#define PUNIT_SPI_DMA_SRC_REG (0x62) ++ ++/* PUnit DMA block transfer size, in bytes. */ ++#define SPI_DMA_BLOCK_SIZE 512 ++ ++/* Buffer to DMA 1 block from SPI */ ++static grub_uint32_t spi_buffer[SPI_DMA_BLOCK_SIZE / sizeof (grub_uint32_t)]; ++ ++/* Read from SPI via PUnit DMA engine. */ ++static void ++spi_dma_read (grub_uint32_t *src, grub_uint32_t *dst, ++ grub_uint32_t dma_block_count) ++{ ++ if (grub_cln_debug) ++ { ++ grub_printf ("%s: src=%p, dst=%p, count=%u\n", __func__, src, dst, ++ dma_block_count); ++ } ++ ++ /* Setup source and destination addresses. */ ++ intel_cln_sb_write_reg (SB_ID_PUNIT, CFG_WRITE_OPCODE, PUNIT_SPI_DMA_SRC_REG, ++ (grub_uint32_t) src); ++ intel_cln_sb_write_reg (SB_ID_PUNIT, CFG_WRITE_OPCODE, PUNIT_SPI_DMA_DEST_REG, ++ (grub_uint32_t) dst); ++ ++ if (grub_cln_debug) ++ { ++ grub_printf ("%s: starting transaction\n", __func__); ++ } ++ ++ /* ++ Setup the number of block to be copied over. Transaction will start as ++ soon as the register is filled with value. ++ */ ++ intel_cln_sb_write_reg (SB_ID_PUNIT, CFG_WRITE_OPCODE, PUNIT_SPI_DMA_COUNT_REG, ++ dma_block_count); ++ ++ /* Poll for completion. */ ++ while (dma_block_count > 0) ++ { ++ intel_cln_sb_read_reg (SB_ID_PUNIT, CFG_READ_OPCODE, PUNIT_SPI_DMA_COUNT_REG, ++ &dma_block_count); ++ } ++ ++ if (grub_cln_debug) ++ { ++ grub_printf ("%s: transaction completed\n", __func__); ++ } ++} ++ ++/* ++ Parse kernel command line for test-specific directives and set up test state ++ variable accordingly. ++ */ ++void ++__cln_test_setup (char *arg) ++{ ++ char *test_param = grub_strstr (arg, TEST_PARAM_ID); ++ if (test_param) ++ { ++ test_param += grub_strlen(TEST_PARAM_ID); ++ ++ if (grub_strstr(test_param, TEST_PARAM_NO_KERNEL)) ++ __cln_err.no_kernel = 1; ++ if (grub_strstr(test_param, TEST_PARAM_NO_RAMDISK)) ++ __cln_err.no_ramdisk = 1; ++ if (grub_strstr(test_param, TEST_PARAM_NO_KERNEL_SIG)) ++ __cln_err.no_kernel_sig = 1; ++ if (grub_strstr(test_param, TEST_PARAM_NO_RAMDISK_SIG)) ++ __cln_err.no_ramdisk_sig = 1; ++ if (grub_strstr(test_param, TEST_PARAM_BAD_KERNEL_SIG)) ++ __cln_err.kernel_sig_fail = 1; ++ if (grub_strstr(test_param, TEST_PARAM_BAD_RAMDISK_SIG)) ++ __cln_err.ramdisk_sig_fail = 1; ++ if (grub_strstr(test_param, TEST_PARAM_BAD_IMR)) ++ __cln_err.bad_imr = 1; ++ } ++} ++ ++/* ++ Force an IMR failure. ++ This is achieved by DMAing a block of 512 bytes into an IMR where PUnit ++ agent is prevented from accessing. ++ First, sanity check that PUnit can DMA 512 bytes into a temporary buffer. ++ Then, trigger an IMR violation by copying the same portion into bzImage ++ IMR. ++ */ ++void ++__cln_test_imr (void) ++{ ++ grub_uint32_t *p = (grub_uint32_t *) GRUB_LINUX_BZIMAGE_ADDR; ++ ++ if (! __cln_err.bad_imr) ++ return; ++ ++ spi_dma_read ((grub_uint32_t *) GRUB_CLN_MFH_ADDR, spi_buffer, 1); ++ grub_printf ("%s: PUnit DMAing %uB into temp buffer passed\n", __func__, ++ SPI_DMA_BLOCK_SIZE); ++ ++ grub_printf ("%s: PUnit DMAing %uB into non-PUnit IMR @%p\n", __func__, ++ SPI_DMA_BLOCK_SIZE, p); ++ spi_dma_read ((grub_uint32_t *) GRUB_CLN_MFH_ADDR, p, 1); ++ grub_printf ("%s: BUG: PUnit DMA to non-PUnit IMR didn't fail!\n", __func__); ++} ++ +diff --git a/efi/clanton/test_module.h b/efi/clanton/test_module.h +new file mode 100644 +index 0000000..4c0fa28 +--- /dev/null ++++ b/efi/clanton/test_module.h +@@ -0,0 +1,92 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#include <clanton/asset.h> ++#include <grub/types.h> ++ ++/* Keep track of error triggering condition. */ ++struct __cln_error_trigger_struct { ++ int no_kernel; ++ int no_ramdisk; ++ int no_kernel_sig; ++ int no_ramdisk_sig; ++ int kernel_sig_fail; ++ int ramdisk_sig_fail; ++ int bad_imr; ++ /* How many signatures have been verified so far. */ ++ int state_sign_verify; ++}; ++ ++extern struct __cln_error_trigger_struct __cln_err; ++ ++void __cln_test_setup (char *); ++void __cln_test_imr (void); ++ ++#ifdef INTEL_CLN_TEST ++ ++/* ++ Failure in fetching an asset results in function returning 0 and errnum ++ being set. ++ */ ++#define INTEL_CLN_ERR_NO_ASSET \ ++ (! (errnum = ERR_FILE_NOT_FOUND)) ++ ++#define __cln_test_asset(x) \ ++ if (GRUB_CLN_ASSET_KERNEL == x && __cln_err.no_kernel) \ ++ return INTEL_CLN_ERR_NO_ASSET; \ ++ if (GRUB_CLN_ASSET_INITRD == x && __cln_err.no_ramdisk) \ ++ return INTEL_CLN_ERR_NO_ASSET; \ ++ if (GRUB_CLN_ASSET_KERNEL_CSBH == x && __cln_err.no_kernel_sig) \ ++ return INTEL_CLN_ERR_NO_ASSET; \ ++ if (GRUB_CLN_ASSET_INITRD_CSBH == x && __cln_err.no_ramdisk_sig) \ ++ return INTEL_CLN_ERR_NO_ASSET; ++ ++/* ++ Upon failure in verifying signature, IAROM callback only returns 0. ++ Possible values for __cln_err.state_sign_verify: ++ - 0: we are currently verifying grub.conf ++ - 1: we are currently verifying kernel ++ - 2: we are currently verifying ramdisk ++ */ ++#define __cln_test_signature(x) \ ++ switch (__cln_err.state_sign_verify ++) { \ ++ case 0: /* grub.conf - this is out of scope */ \ ++ break; \ ++ case 1: /* Kernel */ \ ++ if (__cln_err.kernel_sig_fail) \ ++ return 0; \ ++ break; \ ++ case 2: /* Ramdisk */ \ ++ if (__cln_err.ramdisk_sig_fail) \ ++ return 0; \ ++ break; \ ++ default: \ ++ break; \ ++ } ++ ++#else /* !INTEL_CLN_TEST */ ++ ++#define __cln_test_asset(x) \ ++ do {} while(0); ++#define __cln_test_signature(x) \ ++ do {} while(0); ++ ++#endif /* INTEL_CLN_TEST */ ++ +diff --git a/efi/efidisk.c b/efi/efidisk.c +index 2192021..015c57a 100644 +--- a/efi/efidisk.c ++++ b/efi/efidisk.c +@@ -192,6 +192,10 @@ name_devices (struct grub_efidisk_data *devices) + continue; + + m = d->block_io->media; ++ if (GRUB_EFI_DEVICE_PATH_TYPE(dp) == GRUB_EFI_HARDWARE_DEVICE_PATH_TYPE) ++ { ++ add_device (&hd_devices, d); ++ } + if (GRUB_EFI_DEVICE_PATH_TYPE(dp) == GRUB_EFI_MESSAGING_DEVICE_PATH_TYPE) + { + /* XXX FIXME this won't work if we see write-protected disks with +diff --git a/efi/efidp.c b/efi/efidp.c +index d8ca03d..f4ca452 100644 +--- a/efi/efidp.c ++++ b/efi/efidp.c +@@ -578,7 +578,10 @@ dpname_matches(char *str, char *candidate) + return rc; + } + +-static void ++extern void ++finish_param_parse(char *pos, char **end, char *tmp); ++ ++void + finish_param_parse(char *pos, char **end, char *tmp) + { + if (!pos || !end || !tmp) +diff --git a/efi/efimain.c b/efi/efimain.c +index e1a1e66..ace710c 100644 +--- a/efi/efimain.c ++++ b/efi/efimain.c +@@ -26,6 +26,8 @@ + #include <shared.h> + #include <efistubs.h> + ++#include <clanton/perf_metrics.h> ++ + #include "pxe.h" + + #define GRUB_SCRATCH_MEM_PAGES (GRUB_SCRATCH_MEM_SIZE >> 12) +@@ -77,8 +79,15 @@ real_main (void) + grub_efi_status_t + efi_main (grub_efi_handle_t image_handle, grub_efi_system_table_t *sys_tab) + { ++ grub_efi_boot_services_t *b; ++ grub_efi_status_t status; ++ + grub_efi_image_handle = image_handle; + grub_efi_system_table = sys_tab; ++ ++ /* Timestamp entry point. */ ++ grub_cln_event_append (__func__); ++ + grub_efi_init (); + + grub_scratch_mem = grub_efi_allocate_pages (0, GRUB_SCRATCH_MEM_PAGES); +@@ -108,6 +117,13 @@ efi_main (grub_efi_handle_t image_handle, grub_efi_system_table_t *sys_tab) + #endif + } + ++ /* Disable watchdog before prompting for any user input. */ ++ b = grub_efi_system_table->boot_services; ++ status = Call_Service_4 (b->set_watchdog_timer, ++ 0, 0xFFFF + 1, 0, NULL); ++ if (GRUB_EFI_SUCCESS != status) ++ grub_printf ("%s: set_watchdog_timer() returned 0x%08x\n", __func__, status); ++ + real_main (); + + if (real_stack) { +diff --git a/efi/ia32/loader/linux.c b/efi/ia32/loader/linux.c +index d795d28..280fe81 100644 +--- a/efi/ia32/loader/linux.c ++++ b/efi/ia32/loader/linux.c +@@ -23,15 +23,22 @@ + #include <grub/efi/api.h> + #include <grub/efi/efi.h> + #include <grub/efi/misc.h> ++#include <clanton/asset.h> ++#include <clanton/clanton.h> ++#include <clanton/early_uart.h> ++#include <clanton/flash.h> ++#include <clanton/iarom.h> ++#include <clanton/imr.h> ++#include <clanton/mfh.h> ++#include <clanton/perf_metrics.h> ++#include <clanton/sbh.h> ++#include <clanton/test_module.h> + + #include "switch.h" +- + #include <shared.h> + + #include "graphics.h" + +-#define grub_file_size() filemax +- + #define NEXT_MEMORY_DESCRIPTOR(desc, size) \ + ((grub_efi_memory_descriptor_t *) ((char *) (desc) + (size))) + +@@ -54,6 +61,14 @@ static grub_efi_uintn_t prot_mode_pages; + static grub_efi_uintn_t initrd_pages; + static grub_efi_guid_t graphics_output_guid = GRUB_EFI_GRAPHICS_OUTPUT_GUID; + ++/* If modules are in SPI/Flash, follow MFH path. ++ Else follow file system path. */ ++unsigned short int grub_cln_linux_spi = 0; ++unsigned short int grub_cln_initrd_spi = 0; ++ ++/* The Clanton Secure Boot Header. */ ++static struct grub_cln_sbh cln_sbh; ++ + static inline grub_size_t + page_align (grub_size_t size) + { +@@ -114,9 +129,14 @@ allocate_pages (grub_size_t real_size, grub_size_t prot_size) + /* Initialize the memory pointers with NULL for convenience. */ + real_mode_mem = 0; + prot_mode_mem = 0; ++ initrd_mem = 0; + + if (grub_efi_get_memory_map (0, &desc_size, 0) <= 0) +- grub_fatal ("cannot get memory map"); ++ { ++ grub_printf ("cannot get memory map"); ++ errnum = ERR_BOOT_FAILURE; ++ return 0; ++ } + + addr = 0; + mmap_end = NEXT_MEMORY_DESCRIPTOR (mmap_buf, mmap_size); +@@ -144,7 +164,11 @@ allocate_pages (grub_size_t real_size, grub_size_t prot_size) + (unsigned) real_mode_pages, (unsigned) addr); + real_mode_mem = grub_efi_allocate_pages (addr, real_mode_pages); + if (! real_mode_mem) +- grub_fatal ("cannot allocate pages"); ++ { ++ grub_printf ("cannot allocate pages"); ++ errnum = ERR_WONT_FIT; ++ goto fail; ++ } + + desc->num_pages -= real_mode_pages; + break; +@@ -160,9 +184,14 @@ allocate_pages (grub_size_t real_size, grub_size_t prot_size) + + /* Next, find free pages for the protected mode code. */ + /* XXX what happens if anything is using this address? */ +- prot_mode_mem = grub_efi_allocate_pages (0x100000, prot_mode_pages); ++ prot_mode_mem = grub_efi_allocate_pages ++ (GRUB_LINUX_BZIMAGE_ADDR, prot_mode_pages); + if (! prot_mode_mem) +- grub_fatal("Cannot allocate pages for VMLINUZ"); ++ { ++ grub_printf ("Cannot allocate pages for VMLINUZ"); ++ errnum = ERR_WONT_FIT; ++ goto fail; ++ } + + return 1; + +@@ -224,7 +253,11 @@ big_linux_boot (void) + graphics_set_kernel_params (params); + + if (grub_efi_get_memory_map (&map_key, &desc_size, &desc_version) <= 0) +- grub_fatal ("cannot get memory map"); ++ { ++ grub_printf ("cannot get memory map"); ++ errnum = ERR_BOOT_FAILURE; ++ return; ++ } + + /* Pass e820 memmap. */ + e820_map_from_efi_map ((struct e820_entry *) params->e820_map, &e820_nr_map, +@@ -232,8 +265,14 @@ big_linux_boot (void) + params->e820_nr_map = e820_nr_map; + + grub_dprintf(__func__,"got to ExitBootServices...\n"); ++ + if (! grub_efi_exit_boot_services (map_key)) +- grub_fatal ("cannot exit boot services"); ++ { ++ grub_printf ("cannot exit boot services"); ++ errnum = ERR_BOOT_FAILURE; ++ return; ++ } ++ + /* Note that no boot services are available from here. */ + + lh = ¶ms->hdr; +@@ -278,6 +317,13 @@ big_linux_boot (void) + grub_memset((void *)gdt_addr.base, gdt_addr.limit, 0); + grub_memcpy((void *)gdt_addr.base, init_gdt, sizeof (init_gdt)); + ++ /* This is the very last stage we can timestamp. ++ Do it and append performance metrics to the linux command line. */ ++ grub_cln_event_append ("jmp_code32"); ++ grub_strncat ((char *) real_mode_mem + 0x1000, ++ grub_cln_event_get_metrics (), ++ GRUB_LINUX_CL_END_OFFSET - GRUB_LINUX_CL_OFFSET + 1); ++ + if (0) { + /* copy our real mode transition code to 0x7C00 */ + memcpy ((void *) 0x7C00, switch_image, switch_size); +@@ -311,28 +357,75 @@ big_linux_boot (void) + for (;;); + } + ++/* ++ Lexer to detect early Quark's UART MMIO token. ++ If token is found, expand it with the actual MMIO address. ++ */ ++static void ++cln_detect_early_uart (char **cmdline) ++{ ++ char *p = NULL; ++ char *start = *cmdline; ++ grub_uint32_t mmio; ++ grub_uint32_t offs = 0; ++ ++ p = strstr(*cmdline, QUARK_UART_MMIO_TOKEN); ++ *cmdline = start; ++ ++ if (NULL == p) ++ { ++ /* Nothing to do. */ ++ return; ++ } ++ ++ mmio = (grub_uint32_t)cln_early_uart_init(); ++ if (!mmio) ++ { ++ grub_printf("%s: couldn't find device. Skipping..\n", __func__); ++ return; ++ } ++ ++ if (grub_cln_debug) ++ grub_printf("%s: MMIO addr @ 0x%x\n", __func__, mmio); ++ ++ offs = grub_sprintf(p, "0x%x", mmio); ++ grub_sprintf(p + offs, "%s", p + sizeof(QUARK_UART_MMIO_TOKEN) - 1); ++} ++ + int + grub_load_linux (char *kernel, char *arg) + { + struct grub_linux_kernel_header *lh; + struct linux_kernel_params *params; + static struct linux_kernel_params params_buf; +- grub_uint8_t setup_sects; +- grub_size_t real_size, prot_size; +- grub_ssize_t len; +- char *dest; ++ grub_uint8_t setup_sects = 0; ++ grub_size_t real_size = 0, prot_size = 0, img_size = 0; ++ grub_uint32_t code32_start_offs = 0x0, prot_mode_offs = 0x0;; ++ grub_ssize_t len = 0; + +- if (kernel == NULL) ++ __cln_test_setup(arg); ++ ++ /* In SPI/Flash mode, file system path to kernel is not required. */ ++ if (! grub_cln_linux_spi && kernel == NULL) + { + errnum = ERR_BAD_FILENAME; + grub_printf ("no kernel specified"); + goto fail1; + } + +- if (! grub_open (kernel)) ++ if (grub_cln_secure ++ && ! grub_cln_fetch_sbh (GRUB_CLN_ASSET_KERNEL_CSBH, kernel, &cln_sbh)) ++ { ++ if(ERR_FILE_NOT_FOUND == errnum ++ && ! grub_cln_linux_spi) ++ errnum = ERR_SGN_FILE_NOT_FOUND; ++ goto fail1; ++ } ++ ++ if (! grub_cln_asset_open (GRUB_CLN_ASSET_KERNEL, kernel)) + goto fail1; + +- if (grub_read ((char *) ¶ms_buf, sizeof (params_buf)) ++ if (grub_cln_asset_read (GRUB_CLN_ASSET_KERNEL, (grub_uint8_t *) ¶ms_buf, sizeof (params_buf)) + != sizeof (params_buf)) + { + errnum = ERR_EXEC_FORMAT; +@@ -371,13 +464,48 @@ grub_load_linux (char *kernel, char *arg) + + setup_sects = lh->setup_sects; + ++ img_size = grub_cln_asset_size (GRUB_CLN_ASSET_KERNEL); + real_size = 0x1000 + grub_strlen(arg); +- prot_size = grub_file_size () - (setup_sects << SECTOR_BITS) - SECTOR_SIZE; ++ ++ /* Grub allocates distinct memory regions for the so-called "real mode" and ++ "protected mode" portions of bzImage. The linux entry point is located ++ at the base address of the protected mode section ++ (GRUB_LINUX_BZIMAGE_ADDR). ++ In order to perform signature verification, Clanton secure boot requires ++ the whole bzImage to be allocated contiguously, with its CSBH prepended. ++ Consequently, the signed image is placed in a contiguous region starting ++ from GRUB_LINUX_BZIMAGE_ADDR, and the entry point offset is updated ++ accordingly. */ ++ if (grub_cln_secure) ++ { ++ prot_size = img_size + sizeof (cln_sbh); ++ code32_start_offs += (setup_sects << SECTOR_BITS) + SECTOR_SIZE ++ + sizeof (cln_sbh); ++ } ++ ++ else ++ prot_size = img_size - (setup_sects << SECTOR_BITS) - SECTOR_SIZE; + + if (! allocate_pages (real_size, prot_size)) + goto fail; + +- /* XXX Linux assumes that only elilo can boot Linux on EFI!!! */ ++ errnum = intel_cln_imr_setup(IMR_RANGE_BOOT, (grub_addr_t)real_mode_mem, real_size); ++ if(errnum != ERR_NONE) ++ { ++ grub_printf("IMR boot params setup failed !\n"); ++ goto fail; ++ } ++ ++ errnum = intel_cln_imr_setup(IMR_RANGE_BZIMAGE, GRUB_LINUX_BZIMAGE_ADDR, prot_size); ++ if(errnum != ERR_NONE) ++ { ++ grub_printf("IMR bzimage setup failed !\n"); ++ goto fail; ++ } ++ ++ __cln_test_imr(); ++ ++ /* XXX Linux assumes that only elilo can boot Linux on EFI!!! */ + lh->type_of_loader = 0x50; + + lh->cmd_line_ptr = (grub_uint32_t) (unsigned long) real_mode_mem + 0x1000; +@@ -394,6 +522,11 @@ grub_load_linux (char *kernel, char *arg) + + grub_memmove(¶ms->hdr, lh, 0x202 + lh->jump_off - 0x1f1); + ++ /* Update offset for protected mode code entry point. Clanton secure boot ++ requires real mode code to be allocated contiguously to protected mode ++ section. Hence the kernel entry point must be shifted accordingly. */ ++ params->hdr.code32_start += code32_start_offs; ++ + params->cl_magic = GRUB_LINUX_CL_MAGIC; + params->cl_offset = 0x1000; + +@@ -446,9 +579,13 @@ grub_load_linux (char *kernel, char *arg) + params->eddbuf_entries = 0; + params->edd_mbr_sig_buf_entries = 0; + ++ /* Dump MFH layout.conf contents */ ++ grub_cln_dump_layout (); ++ + /* XXX there is no way to know if the kernel really supports EFI. */ +- grub_printf ("[Linux-EFI, setup=0x%x, size=0x%x]\n", (unsigned int)real_size, +- (unsigned int)prot_size); ++ grub_printf ("[Linux-EFI%s, setup=0x%x, size=0x%x]\n", ++ grub_cln_linux_spi ? " SPI" : "", ++ (unsigned int) real_size, (unsigned int) prot_size); + + /* Check the mem= option to limit memory used for initrd. */ + { +@@ -504,12 +641,41 @@ grub_load_linux (char *kernel, char *arg) + linux_mem_size = 0; + } + +- dest = grub_stpcpy ((char *) real_mode_mem + 0x1000, skip_to(0, arg)); ++ /* Expand Intel Quark's UART MMIO address if requested */ ++ cln_detect_early_uart(&arg); ++ ++ /* Skip the path to the kernel only if in file system mode. */ ++ grub_stpcpy ((char *) real_mode_mem + 0x1000, ++ grub_cln_linux_spi ? arg : skip_to (0, arg)); ++ ++ /* If Clanton secure boot path, copy over CSBH + bzImage into "protected ++ mode" section. */ ++ if (grub_cln_secure) ++ { ++ grub_cln_asset_seek (0); ++ prot_size -= sizeof (cln_sbh); ++ grub_memcpy (prot_mode_mem, &cln_sbh, sizeof (cln_sbh)); ++ prot_mode_offs += sizeof (cln_sbh); ++ } ++ else ++ grub_cln_asset_seek ((setup_sects << SECTOR_BITS) + SECTOR_SIZE); + +- grub_seek ((setup_sects << SECTOR_BITS) + SECTOR_SIZE); + len = prot_size; +- if (grub_read ((char *) GRUB_LINUX_BZIMAGE_ADDR, len) != len) +- grub_printf ("Couldn't read file"); ++ if (grub_cln_asset_read (GRUB_CLN_ASSET_KERNEL, ++ (grub_uint8_t *) prot_mode_mem + prot_mode_offs, ++ len) != len) ++ { ++ errnum = ERR_EXEC_FORMAT; ++ grub_printf ("Couldn't read file"); ++ goto fail; ++ } ++ ++ /* Verify the kernel signature. */ ++ if (grub_cln_secure && ++ ! grub_cln_verify_asset_signature ((grub_uint8_t *) prot_mode_mem)) ++ { ++ errnum = ERR_CLN_VERIFICATION; ++ } + + if (errnum == ERR_NONE) + { +@@ -543,7 +709,8 @@ grub_load_initrd (char *initrd) + grub_efi_uint32_t desc_version; + struct linux_kernel_params *params; + +- if (initrd == NULL) ++ /* In SPI/Flash mode, file system path to initrd is not required. */ ++ if (! grub_cln_initrd_spi && initrd == NULL) + { + errnum = ERR_BAD_FILENAME; + grub_printf ("No module specified"); +@@ -557,10 +724,25 @@ grub_load_initrd (char *initrd) + goto fail1; + } + +- if (! grub_open (initrd)) ++ ++ if (grub_cln_secure ++ && ! grub_cln_fetch_sbh (GRUB_CLN_ASSET_INITRD_CSBH, initrd, &cln_sbh)) ++ { ++ if (ERR_FILE_NOT_FOUND == errnum ++ && ! grub_cln_initrd_spi) ++ errnum = ERR_SGN_FILE_NOT_FOUND; ++ goto fail1; ++ } ++ ++ if (! grub_cln_asset_open (GRUB_CLN_ASSET_INITRD, initrd)) + goto fail1; + +- size = grub_file_size (); ++ size = grub_cln_asset_size (GRUB_CLN_ASSET_INITRD); ++ ++ /* If Clanton secure boot, make room for CSBH. */ ++ if (grub_cln_secure) ++ size += sizeof (cln_sbh); ++ + initrd_pages = (page_align (size) >> 12); + + params = (struct linux_kernel_params *) real_mode_mem; +@@ -583,7 +765,11 @@ grub_load_initrd (char *initrd) + + /* Find the highest address to put the initrd. */ + if (grub_efi_get_memory_map (&map_key, &desc_size, &desc_version) <= 0) +- grub_fatal ("cannot get memory map"); ++ { ++ grub_printf ("cannot get memory map"); ++ errnum = ERR_BOOT_FAILURE; ++ goto fail; ++ } + + mmap_end = NEXT_MEMORY_DESCRIPTOR (mmap_buf, mmap_size); + addr = 0; +@@ -626,17 +812,41 @@ grub_load_initrd (char *initrd) + + initrd_mem = grub_efi_allocate_pages (addr, initrd_pages); + if (! initrd_mem) +- grub_fatal ("cannot allocate pages: %x@%x", (unsigned)initrd_pages, +- (unsigned)addr); ++ { ++ grub_printf ("cannot allocate pages: %x@%x", (unsigned) initrd_pages, ++ (unsigned) addr); ++ errnum = ERR_WONT_FIT; ++ goto fail; ++ } ++ ++ /* Clanton secure boot requires the CSBH to be prepended to the Initrd. */ ++ if (grub_cln_secure) ++ { ++ size -= sizeof (cln_sbh); ++ grub_memcpy (initrd_mem, &cln_sbh, sizeof (cln_sbh)); ++ initrd_mem = (grub_uint8_t *)initrd_mem + sizeof (cln_sbh); ++ addr += sizeof (cln_sbh); ++ } + +- if (grub_read (initrd_mem, size) != size) ++ if (grub_cln_asset_read (GRUB_CLN_ASSET_INITRD, initrd_mem, size) != size) + { ++ errnum = ERR_EXEC_FORMAT; + grub_printf ("Couldn't read file"); + goto fail; + } + +- grub_printf (" [Initrd, addr=0x%x, size=0x%x]\n", (unsigned int) addr, +- (unsigned int) size); ++ grub_printf ("[Initrd%s, addr=0x%x, size=0x%x]\n", ++ grub_cln_initrd_spi ? " SPI" : "", ++ (unsigned int) addr, (unsigned int) size); ++ ++ /* Verify the initrd signature. */ ++ if (grub_cln_secure && ++ ! grub_cln_verify_asset_signature ++ ((grub_uint8_t *) initrd_mem - sizeof (cln_sbh))) ++ { ++ errnum = ERR_CLN_VERIFICATION; ++ goto fail; ++ } + + params->hdr.ramdisk_image = addr; + params->hdr.ramdisk_size = size; +diff --git a/grub/Makefile.in b/grub/Makefile.in +deleted file mode 100644 +index 0e40e1b..0000000 +--- a/grub/Makefile.in ++++ /dev/null +@@ -1,448 +0,0 @@ +-# Makefile.in generated by automake 1.10 from Makefile.am. +-# @configure_input@ +- +-# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, +-# 2003, 2004, 2005, 2006 Free Software Foundation, Inc. +-# This Makefile.in is free software; the Free Software Foundation +-# gives unlimited permission to copy and/or distribute it, +-# with or without modifications, as long as this notice is preserved. +- +-# This program is distributed in the hope that it will be useful, +-# but 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+-$(via_rhine_drivers): via-rhine.c +-$(via_rhine_drivers): %.o: via-rhine.c +- $(COMPILE) $(STAGE2_CFLAGS) -fno-builtin -nostdinc \ +- $(NET_EXTRAFLAGS) $($(basename $@)_o_CFLAGS) -o $@ -c $< +- +-$(w89c840_drivers): w89c840.c +-$(w89c840_drivers): %.o: w89c840.c +- $(COMPILE) $(STAGE2_CFLAGS) -fno-builtin -nostdinc \ +- $(NET_EXTRAFLAGS) $($(basename $@)_o_CFLAGS) -o $@ -c $< +-# Tell versions [3.59,3.63) of GNU make to not export all variables. +-# Otherwise a system limit (for SysV at least) may be exceeded. +-.NOEXPORT: +diff --git a/netboot/timer.h b/netboot/timer.h +index b44962a..3d64ada 100644 +--- a/netboot/timer.h ++++ b/netboot/timer.h +@@ -10,6 +10,8 @@ + #ifndef TIMER_H + #define TIMER_H + ++#include "linux-asm-io.h" ++ + /* Ports for the 8254 timer chip */ + #define TIMER2_PORT 0x42 + #define TIMER_MODE_PORT 0x43 +@@ -49,12 +51,12 @@ + /* Ticks must be between 0 and 65535 (0 == 65536) + because it is a 16 bit counter */ + extern void load_timer2(unsigned int ticks); +-extern inline int timer2_running(void) ++static inline int timer2_running(void) + { + return ((inb(PPC_PORTB) & PPCB_T2OUT) == 0); + } + +-extern inline void waiton_timer2(unsigned int ticks) ++static inline void waiton_timer2(unsigned int ticks) + { + load_timer2(ticks); + while ((inb(PPC_PORTB) & PPCB_T2OUT) == 0) +diff --git a/stage1/Makefile.in b/stage1/Makefile.in +deleted file mode 100644 +index c7e251b..0000000 +--- a/stage1/Makefile.in ++++ /dev/null +@@ -1,450 +0,0 @@ +-# Makefile.in generated by automake 1.10 from Makefile.am. +-# @configure_input@ +- +-# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, +-# 2003, 2004, 2005, 2006 Free Software Foundation, Inc. +-# This Makefile.in is free software; the Free Software Foundation +-# gives unlimited permission to copy and/or distribute it, +-# with or without modifications, as long as this notice is preserved. +- +-# This program is distributed in the hope that it will be useful, +-# but WITHOUT ANY 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= @CFLAGS@ +-CPP = @CPP@ +-CPPFLAGS = @CPPFLAGS@ +-CYGPATH_W = @CYGPATH_W@ +-DEFS = @DEFS@ +-DEPDIR = @DEPDIR@ +-ECHO_C = @ECHO_C@ +-ECHO_N = @ECHO_N@ +-ECHO_T = @ECHO_T@ +-EGREP = @EGREP@ +-EXEEXT = @EXEEXT@ +-FSYS_CFLAGS = @FSYS_CFLAGS@ +-GREP = @GREP@ +-GRUB_CFLAGS = @GRUB_CFLAGS@ +-GRUB_LIBS = @GRUB_LIBS@ +-INSTALL = @INSTALL@ +-INSTALL_DATA = @INSTALL_DATA@ +-INSTALL_PROGRAM = @INSTALL_PROGRAM@ +-INSTALL_SCRIPT = @INSTALL_SCRIPT@ +-INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@ +-LDFLAGS = @LDFLAGS@ +-LIBOBJS = @LIBOBJS@ +-LIBS = @LIBS@ +-LOADER_LDFLAGS = @LOADER_LDFLAGS@ +-LTLIBOBJS = @LTLIBOBJS@ +-MAINT = @MAINT@ +-MAKEINFO = @MAKEINFO@ +-MKDIR_P = @MKDIR_P@ +-NETBOOT_DRIVERS = @NETBOOT_DRIVERS@ +-NET_CFLAGS = @NET_CFLAGS@ +-NET_EXTRAFLAGS = @NET_EXTRAFLAGS@ +-OBJCOPY = @OBJCOPY@ +-OBJEXT = @OBJEXT@ +-PACKAGE = @PACKAGE@ +-PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@ +-PACKAGE_NAME = @PACKAGE_NAME@ +-PACKAGE_STRING = @PACKAGE_STRING@ +-PACKAGE_TARNAME = @PACKAGE_TARNAME@ +-PACKAGE_VERSION = @PACKAGE_VERSION@ +-PATH_SEPARATOR = @PATH_SEPARATOR@ +-PERL = @PERL@ +-RANLIB = @RANLIB@ +-SET_MAKE = @SET_MAKE@ +-SHELL = @SHELL@ +-STAGE1_CFLAGS = @STAGE1_CFLAGS@ +-STAGE2_CFLAGS = @STAGE2_CFLAGS@ +-STRIP = @STRIP@ +-VERSION = @VERSION@ +-abs_builddir = @abs_builddir@ +-abs_srcdir = @abs_srcdir@ +-abs_top_builddir = @abs_top_builddir@ +-abs_top_srcdir = @abs_top_srcdir@ +-ac_ct_CC = @ac_ct_CC@ +-am__include = @am__include@ +-am__leading_dot = @am__leading_dot@ +-am__quote = @am__quote@ +-am__tar = @am__tar@ +-am__untar = @am__untar@ +-bindir = @bindir@ +-build = @build@ +-build_alias = @build_alias@ +-build_cpu = @build_cpu@ +-build_os = @build_os@ +-build_vendor = @build_vendor@ +-builddir = @builddir@ +-datadir = @datadir@ +-datarootdir = @datarootdir@ +-docdir = @docdir@ +-dvidir = @dvidir@ +-exec_prefix = @exec_prefix@ +-host = @host@ +-host_alias = @host_alias@ +-host_cpu = @host_cpu@ +-host_os = @host_os@ +-host_vendor = @host_vendor@ +-htmldir = @htmldir@ +-includedir = @includedir@ +-infodir = @infodir@ +-install_sh = @install_sh@ +-libdir = @libdir@ +-libexecdir = @libexecdir@ +-localedir = @localedir@ +-localstatedir = @localstatedir@ +-mandir = @mandir@ +-mkdir_p = @mkdir_p@ +-oldincludedir = @oldincludedir@ +-pdfdir = @pdfdir@ +-prefix = @prefix@ +-program_transform_name = @program_transform_name@ +-psdir = @psdir@ +-sbindir = @sbindir@ +-sharedstatedir = @sharedstatedir@ +-srcdir = @srcdir@ +-sysconfdir = @sysconfdir@ +-target_alias = @target_alias@ +-top_builddir = @top_builddir@ +-top_srcdir = @top_srcdir@ +- +-# For test target. +-TESTS = size_test +-noinst_SCRIPTS = $(TESTS) +- +-# For dist target. +-noinst_HEADERS = apic.h defs.h dir.h disk_inode.h disk_inode_ffs.h \ +- fat.h filesys.h freebsd.h fs.h hercules.h i386-elf.h \ +- imgact_aout.h iso9660.h jfs.h mb_header.h mb_info.h md5.h \ +- nbi.h pc_slice.h serial.h shared.h smp-imps.h term.h \ +- terminfo.h tparm.h nbi.h ufs2.h vstafs.h xfs.h graphics.h gpt.h +- +-EXTRA_DIST = setjmp.S apm.S $(noinst_SCRIPTS) +- +-# For <stage1.h>. +-INCLUDES = -I$(top_srcdir)/stage1 +- +-# The library for /sbin/grub. +-noinst_LIBRARIES = libgrub.a +-libgrub_a_SOURCES = boot.c builtins.c char_io.c cmdline.c common.c \ +- disk_io.c fsys_ext2fs.c fsys_fat.c fsys_ffs.c fsys_iso9660.c \ +- fsys_jfs.c fsys_minix.c fsys_reiserfs.c fsys_ufs2.c \ +- fsys_vstafs.c fsys_xfs.c gunzip.c md5.c serial.c stage2.c \ +- terminfo.c tparm.c graphics.c +- +-libgrub_a_CFLAGS = $(GRUB_CFLAGS) -I$(top_srcdir)/lib \ +- -DGRUB_UTIL=1 -DFSYS_EXT2FS=1 -DFSYS_FAT=1 -DFSYS_FFS=1 \ +- -DFSYS_ISO9660=1 -DFSYS_JFS=1 -DFSYS_MINIX=1 -DFSYS_REISERFS=1 \ +- -DFSYS_UFS2=1 -DFSYS_VSTAFS=1 -DFSYS_XFS=1 \ +- -DUSE_MD5_PASSWORDS=1 -DSUPPORT_SERIAL=1 -DSUPPORT_HERCULES=1 +- +-@DISKLESS_SUPPORT_FALSE@pkgdata_DATA = stage2 stage2_eltorito e2fs_stage1_5 fat_stage1_5 \ +-@DISKLESS_SUPPORT_FALSE@ ffs_stage1_5 iso9660_stage1_5 jfs_stage1_5 minix_stage1_5 \ +-@DISKLESS_SUPPORT_FALSE@ reiserfs_stage1_5 ufs2_stage1_5 vstafs_stage1_5 xfs_stage1_5 +- +-@DISKLESS_SUPPORT_TRUE@pkgdata_DATA = stage2 stage2_eltorito e2fs_stage1_5 fat_stage1_5 \ +-@DISKLESS_SUPPORT_TRUE@ ffs_stage1_5 iso9660_stage1_5 jfs_stage1_5 minix_stage1_5 \ +-@DISKLESS_SUPPORT_TRUE@ reiserfs_stage1_5 ufs2_stage1_5 vstafs_stage1_5 xfs_stage1_5 \ +-@DISKLESS_SUPPORT_TRUE@ nbgrub pxegrub +- +-@DISKLESS_SUPPORT_FALSE@noinst_DATA = pre_stage2 start start_eltorito +-@DISKLESS_SUPPORT_TRUE@noinst_DATA = pre_stage2 start start_eltorito nbloader pxeloader diskless +-MOSTLYCLEANFILES = $(noinst_PROGRAMS) +-PRE_STAGE2_LINK = -nostdlib -Wl,-N -Wl,-Ttext -Wl,8200 $(LOADER_LDFLAGS) +-START_LINK = -nostdlib -Wl,-N -Wl,-Ttext -Wl,8000 $(LOADER_LDFLAGS) +-NBLOADER_LINK = -nostdlib -Wl,-N -Wl,-Ttext -Wl,0 $(LOADER_LDFLAGS) +-PXELOADER_LINK = -nostdlib -Wl,-N -Wl,-Ttext -Wl,7C00 $(LOADER_LDFLAGS) +-START_ELTORITO_LINK = -nostdlib -Wl,-N -Wl,-Ttext -Wl,7C00 $(LOADER_LDFLAGS) +-@NETBOOT_SUPPORT_FALSE@NETBOOT_FLAGS = +-@NETBOOT_SUPPORT_TRUE@NETBOOT_FLAGS = -I$(top_srcdir)/netboot -DSUPPORT_NETBOOT=1 +-@SERIAL_SUPPORT_FALSE@SERIAL_FLAGS = +-@SERIAL_SUPPORT_TRUE@SERIAL_FLAGS = -DSUPPORT_SERIAL=1 +-@HERCULES_SUPPORT_FALSE@HERCULES_FLAGS = +-@HERCULES_SUPPORT_TRUE@HERCULES_FLAGS = -DSUPPORT_HERCULES=1 +-@GRAPHICS_SUPPORT_FALSE@GRAPHICS_FLAGS = +-@GRAPHICS_SUPPORT_TRUE@GRAPHICS_FLAGS = -DSUPPORT_GRAPHICS=1 +-STAGE2_COMPILE = $(STAGE2_CFLAGS) -fno-builtin -nostdinc \ +- $(NETBOOT_FLAGS) $(SERIAL_FLAGS) $(HERCULES_FLAGS) $(GRAPHICS_FLAGS) +- +-STAGE1_5_LINK = -nostdlib -Wl,-N -Wl,-Ttext -Wl,2000 $(LOADER_LDFLAGS) +-STAGE1_5_COMPILE = $(STAGE2_COMPILE) -DNO_DECOMPRESSION=1 -DSTAGE1_5=1 +- +-# For stage2 target. +-pre_stage2_exec_SOURCES = asm.S bios.c boot.c builtins.c char_io.c \ +- cmdline.c common.c console.c disk_io.c fsys_ext2fs.c \ +- fsys_fat.c fsys_ffs.c fsys_iso9660.c fsys_jfs.c fsys_minix.c \ +- fsys_reiserfs.c fsys_ufs2.c fsys_vstafs.c fsys_xfs.c gunzip.c \ +- hercules.c md5.c serial.c smp-imps.c stage2.c terminfo.c tparm.c \ +- graphics.c +- +-pre_stage2_exec_CFLAGS = $(STAGE2_COMPILE) $(FSYS_CFLAGS) +-pre_stage2_exec_CCASFLAGS = $(STAGE2_COMPILE) $(FSYS_CFLAGS) +-pre_stage2_exec_LDFLAGS = $(PRE_STAGE2_LINK) +-@NETBOOT_SUPPORT_TRUE@pre_stage2_exec_LDADD = ../netboot/libdrivers.a +-@DISKLESS_SUPPORT_FALSE@BUILT_SOURCES = stage2_size.h +-@DISKLESS_SUPPORT_TRUE@BUILT_SOURCES = stage2_size.h diskless_size.h +-CLEANFILES = $(pkgdata_DATA) $(noinst_DATA) $(BUILT_SOURCES) +-start_exec_SOURCES = start.S +-start_exec_CCASFLAGS = $(STAGE2_COMPILE) +-start_exec_LDFLAGS = $(START_LINK) +-start_eltorito_exec_SOURCES = start_eltorito.S +-start_eltorito_exec_CCASFLAGS = $(STAGE2_COMPILE) +-start_eltorito_exec_LDFLAGS = $(START_ELTORITO_LINK) +- +-# For e2fs_stage1_5 target. +-e2fs_stage1_5_exec_SOURCES = start.S asm.S common.c char_io.c disk_io.c \ +- stage1_5.c fsys_ext2fs.c bios.c +- +-e2fs_stage1_5_exec_CFLAGS = $(STAGE1_5_COMPILE) -DFSYS_EXT2FS=1 \ +- -DNO_BLOCK_FILES=1 +- +-e2fs_stage1_5_exec_CCASFLAGS = $(STAGE1_5_COMPILE) -DFSYS_EXT2FS=1 \ +- -DNO_BLOCK_FILES=1 +- +-e2fs_stage1_5_exec_LDFLAGS = $(STAGE1_5_LINK) +- +-# For fat_stage1_5 target. +-fat_stage1_5_exec_SOURCES = start.S asm.S common.c char_io.c disk_io.c \ +- stage1_5.c fsys_fat.c bios.c +- +-fat_stage1_5_exec_CFLAGS = $(STAGE1_5_COMPILE) -DFSYS_FAT=1 \ +- -DNO_BLOCK_FILES=1 +- +-fat_stage1_5_exec_CCASFLAGS = $(STAGE1_5_COMPILE) -DFSYS_FAT=1 \ +- -DNO_BLOCK_FILES=1 +- +-fat_stage1_5_exec_LDFLAGS = $(STAGE1_5_LINK) +- +-# For ffs_stage1_5 target. +-ffs_stage1_5_exec_SOURCES = start.S asm.S common.c char_io.c disk_io.c \ +- stage1_5.c fsys_ffs.c bios.c +- +-ffs_stage1_5_exec_CFLAGS = $(STAGE1_5_COMPILE) -DFSYS_FFS=1 \ +- -DNO_BLOCK_FILES=1 +- +-ffs_stage1_5_exec_CCASFLAGS = $(STAGE1_5_COMPILE) -DFSYS_FFS=1 \ +- -DNO_BLOCK_FILES=1 +- +-ffs_stage1_5_exec_LDFLAGS = $(STAGE1_5_LINK) +- +-# For ufs2_stage1_5 target. +-ufs2_stage1_5_exec_SOURCES = start.S asm.S common.c char_io.c disk_io.c \ +- stage1_5.c fsys_ufs2.c bios.c +- +-ufs2_stage1_5_exec_CFLAGS = $(STAGE1_5_COMPILE) -DFSYS_UFS2=1 \ +- -DNO_BLOCK_FILES=1 +- +-ufs2_stage1_5_exec_CCASFLAGS = $(STAGE1_5_COMPILE) -DFSYS_UFS2=1 \ +- -DNO_BLOCK_FILES=1 +- +-ufs2_stage1_5_exec_LDFLAGS = $(STAGE1_5_LINK) +- +-# For minix_stage1_5 target. +-minix_stage1_5_exec_SOURCES = start.S asm.S common.c char_io.c disk_io.c \ +- stage1_5.c fsys_minix.c bios.c +- +-minix_stage1_5_exec_CFLAGS = $(STAGE1_5_COMPILE) -DFSYS_MINIX=1 \ +- -DNO_BLOCK_FILES=1 +- +-minix_stage1_5_exec_CCASFLAGS = $(STAGE1_5_COMPILE) -DFSYS_MINIX=1 \ +- -DNO_BLOCK_FILES=1 +- +-minix_stage1_5_exec_LDFLAGS = $(STAGE1_5_LINK) +- +-# For reiserfs_stage1_5 target. +-reiserfs_stage1_5_exec_SOURCES = start.S asm.S common.c char_io.c \ +- disk_io.c stage1_5.c fsys_reiserfs.c bios.c +- +-reiserfs_stage1_5_exec_CFLAGS = $(STAGE1_5_COMPILE) -DFSYS_REISERFS=1 \ +- -DNO_BLOCK_FILES=1 +- +-reiserfs_stage1_5_exec_CCASFLAGS = $(STAGE1_5_COMPILE) -DFSYS_REISERFS=1 \ +- -DNO_BLOCK_FILES=1 +- +-reiserfs_stage1_5_exec_LDFLAGS = $(STAGE1_5_LINK) +- +-# For vstafs_stage1_5 target. +-vstafs_stage1_5_exec_SOURCES = start.S asm.S common.c char_io.c \ +- disk_io.c stage1_5.c fsys_vstafs.c bios.c +- +-vstafs_stage1_5_exec_CFLAGS = $(STAGE1_5_COMPILE) -DFSYS_VSTAFS=1 \ +- -DNO_BLOCK_FILES=1 +- +-vstafs_stage1_5_exec_CCASFLAGS = $(STAGE1_5_COMPILE) -DFSYS_VSTAFS=1 \ +- -DNO_BLOCK_FILES=1 +- +-vstafs_stage1_5_exec_LDFLAGS = $(STAGE1_5_LINK) +- +-# For jfs_stage1_5 target. +-jfs_stage1_5_exec_SOURCES = start.S asm.S common.c char_io.c \ +- disk_io.c stage1_5.c fsys_jfs.c bios.c +- +-jfs_stage1_5_exec_CFLAGS = $(STAGE1_5_COMPILE) -DFSYS_JFS=1 \ +- -DNO_BLOCK_FILES=1 +- +-jfs_stage1_5_exec_CCASFLAGS = $(STAGE1_5_COMPILE) -DFSYS_JFS=1 \ +- -DNO_BLOCK_FILES=1 +- +-jfs_stage1_5_exec_LDFLAGS = $(STAGE1_5_LINK) +- +-# For xfs_stage1_5 target. +-xfs_stage1_5_exec_SOURCES = start.S asm.S common.c char_io.c \ +- disk_io.c stage1_5.c fsys_xfs.c bios.c +- +-xfs_stage1_5_exec_CFLAGS = $(STAGE1_5_COMPILE) -DFSYS_XFS=1 \ +- -DNO_BLOCK_FILES=1 +- +-xfs_stage1_5_exec_CCASFLAGS = $(STAGE1_5_COMPILE) -DFSYS_XFS=1 \ +- -DNO_BLOCK_FILES=1 +- +-xfs_stage1_5_exec_LDFLAGS = $(STAGE1_5_LINK) +- +-# For iso9660_stage1_5 target. +-iso9660_stage1_5_exec_SOURCES = start_eltorito.S asm.S common.c char_io.c \ +- disk_io.c stage1_5.c fsys_iso9660.c bios.c +- +-iso9660_stage1_5_exec_CFLAGS = $(STAGE1_5_COMPILE) -DFSYS_ISO9660=1 \ +- -DNO_BLOCK_FILES=1 +- +-iso9660_stage1_5_exec_CCASFLAGS = $(STAGE1_5_COMPILE) -DFSYS_ISO9660=1 \ +- -DNO_BLOCK_FILES=1 +- +-iso9660_stage1_5_exec_LDFLAGS = $(STAGE1_5_LINK) +- +-# For diskless target. +-diskless_exec_SOURCES = $(pre_stage2_exec_SOURCES) +-diskless_exec_CFLAGS = $(STAGE2_COMPILE) $(FSYS_CFLAGS) \ +- -DSUPPORT_DISKLESS=1 +- +-diskless_exec_CCASFLAGS = $(STAGE2_COMPILE) $(FSYS_CFLAGS) \ +- -DSUPPORT_DISKLESS=1 +- +-diskless_exec_LDFLAGS = $(PRE_STAGE2_LINK) +-diskless_exec_LDADD = ../netboot/libdrivers.a +- +-# For nbloader target. +-nbloader_exec_SOURCES = nbloader.S +-nbloader_exec_CCASFLAGS = $(STAGE2_COMPILE) +-nbloader_exec_LDFLAGS = $(NBLOADER_LINK) +- +-# For pxeloader target. +-pxeloader_exec_SOURCES = pxeloader.S +-pxeloader_exec_CCASFLAGS = $(STAGE2_COMPILE) +-pxeloader_exec_LDFLAGS = $(PXELOADER_LINK) +- +-# General rule for making a raw binary. +-SUFFIXES = .exec +-all: $(BUILT_SOURCES) +- $(MAKE) $(AM_MAKEFLAGS) all-am +- +-.SUFFIXES: +-.SUFFIXES: .exec .S .c .o .obj +-$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(am__configure_deps) +- @for dep in $?; do \ +- case '$(am__configure_deps)' in \ +- *$$dep*) \ +- cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh \ +- && exit 0; \ +- exit 1;; \ +- esac; \ +- done; \ +- echo ' cd $(top_srcdir) && $(AUTOMAKE) --gnu stage2/Makefile'; \ +- cd $(top_srcdir) && \ +- $(AUTOMAKE) --gnu stage2/Makefile +-.PRECIOUS: Makefile +-Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status +- @case '$?' in \ +- *config.status*) \ +- cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \ +- *) \ +- echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \ +- cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \ +- esac; +- +-$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) +- cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +- +-$(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps) +- cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +-$(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps) +- cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +- +-clean-noinstLIBRARIES: +- -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES) +-libgrub.a: $(libgrub_a_OBJECTS) $(libgrub_a_DEPENDENCIES) +- -rm -f libgrub.a +- $(libgrub_a_AR) libgrub.a $(libgrub_a_OBJECTS) $(libgrub_a_LIBADD) +- $(RANLIB) libgrub.a +- +-clean-noinstPROGRAMS: +- -test -z "$(noinst_PROGRAMS)" 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+-diskless_size.h: diskless +- -rm -f $@ +- set dummy `ls -l $^`; \ +- echo "#define DISKLESS_SIZE $$6" > $@ +- +-# XXX: See the comment for start_exec-start.o. +-nbloader_exec-nbloader.$(OBJEXT): diskless_size.h +- +-# For nbgrub target. +-nbgrub: nbloader diskless +- -rm -f $@ +- cat $^ > $@ +- +-# XXX: See the comment for start_exec-start.o. +-pxeloader_exec-pxeloader.$(OBJEXT): diskless_size.h +- +-# For pxegrub target. +-pxegrub: pxeloader diskless +- -rm -f $@ +- cat $^ > $@ +-.exec: +- $(OBJCOPY) -O binary $< $@ +-# Tell versions [3.59,3.63) of GNU make to not export all variables. +-# Otherwise a system limit (for SysV at least) may be exceeded. +-.NOEXPORT: +diff --git a/stage2/boot.c b/stage2/boot.c +index e30daf8..6a8648f 100644 +--- a/stage2/boot.c ++++ b/stage2/boot.c +@@ -25,6 +25,8 @@ + #include "imgact_aout.h" + #include "i386-elf.h" + ++#include <../efi/clanton/clanton.h> ++ + #ifndef PLATFORM_EFI + static int cur_addr; + #endif +@@ -45,7 +47,18 @@ load_image (char *kernel, char *arg, kernel_t suggested_type, + unsigned long load_flags) + { + #ifdef PLATFORM_EFI +- return grub_load_linux (kernel, arg); ++ int ret = KERNEL_TYPE_NONE; ++ /* If SPI/Flash option is passed, update the global variable. */ ++ grub_cln_linux_spi = 0; ++ if (load_flags & KERNEL_SPI) ++ grub_cln_linux_spi = 1; ++ ++ ret = grub_load_linux (kernel, arg); ++ ++ if (ERR_NONE != errnum) ++ grub_cln_recovery_shell (grub_cln_linux_spi); ++ ++ return ret; + #else + int len, i, exec_type = 0, align_4k = 1; + entry_func real_entry_addr = 0; +@@ -820,13 +833,24 @@ load_module (char *module, char *arg) + #endif + + int +-load_initrd (char *initrd) ++load_initrd (char *initrd, unsigned long load_flags) + { + #ifdef PLATFORM_EFI + #ifndef NO_DECOMPRESSION + no_decompression = 1; + #endif +- return grub_load_initrd (initrd); ++ int ret = 0; ++ /* If SPI/Flash option is passed, update the global variable. */ ++ grub_cln_initrd_spi = 0; ++ if (load_flags & INITRD_SPI) ++ grub_cln_initrd_spi = 1; ++ ++ ret = grub_load_initrd (initrd); ++ ++ if (ERR_NONE != errnum) ++ grub_cln_recovery_shell (grub_cln_initrd_spi); ++ ++ return ret; + #else + int len, next_addr; + char *singleimage, *pos; +diff --git a/stage2/builtins.c b/stage2/builtins.c +index fe6a622..074bb18 100644 +--- a/stage2/builtins.c ++++ b/stage2/builtins.c +@@ -24,6 +24,7 @@ + # include <stdio.h> + #endif + ++#include <../efi/clanton/clanton.h> + #include <shared.h> + #include <filesys.h> + #include <term.h> +@@ -339,6 +340,9 @@ boot_func (char *arg, int flags) + case KERNEL_TYPE_BIG_LINUX: + /* Big Linux */ + big_linux_boot (); ++ /* Clanton: drop to recovery shell if any error. */ ++ /* Errors here are all Firmware-related. */ ++ grub_cln_recovery_shell (1); + break; + + case KERNEL_TYPE_CHAINLOADER: +@@ -2047,11 +2051,25 @@ static struct builtin builtin_impsprobe = + static int + initrd_func (char *arg, int flags) + { ++ unsigned long load_flags = 0; ++ ++ /* Deal with GNU-style long options. */ ++ while (1) ++ { ++ if (grub_memcmp (arg, "--spi", 5) == 0) ++ load_flags |= INITRD_SPI; ++ else ++ break; ++ ++ /* Try the next. */ ++ arg = skip_to (0, arg); ++ } ++ + switch (kernel_type) + { + case KERNEL_TYPE_LINUX: + case KERNEL_TYPE_BIG_LINUX: +- if (! load_initrd (arg)) ++ if (! load_initrd (arg, load_flags)) + return 1; + break; + +@@ -2068,9 +2086,10 @@ static struct builtin builtin_initrd = + "initrd", + initrd_func, + BUILTIN_CMDLINE | BUILTIN_HELP_LIST, +- "initrd FILE [ARG ...]", ++ "initrd FILE [--spi] [ARG ...]", + "Load an initial ramdisk FILE for a Linux format boot image and set the" +- " appropriate parameters in the Linux setup area in memory." ++ " appropriate parameters in the Linux setup area in memory. The option" ++ " --spi tells GRUB to fetch the initrd from SPI/Flash." + }; + + #ifndef PLATFORM_EFI +@@ -2735,6 +2754,8 @@ kernel_func (char *arg, int flags) + has no effect. */ + else if (grub_memcmp (arg, "--no-mem-option", 15) == 0) + load_flags |= KERNEL_LOAD_NO_MEM_OPTION; ++ else if (grub_memcmp (arg, "--spi", 5) == 0) ++ load_flags |= KERNEL_SPI; + else + break; + +@@ -2767,14 +2788,15 @@ static struct builtin builtin_kernel = + "kernel", + kernel_func, + BUILTIN_CMDLINE | BUILTIN_HELP_LIST, +- "kernel [--no-mem-option] [--type=TYPE] FILE [ARG ...]", ++ "kernel [--spi][--no-mem-option] [--type=TYPE] FILE [ARG ...]", + "Attempt to load the primary boot image from FILE. The rest of the" + " line is passed verbatim as the \"kernel command line\". Any modules" + " must be reloaded after using this command. The option --type is used" + " to suggest what type of kernel to be loaded. TYPE must be either of" + " \"netbsd\", \"freebsd\", \"openbsd\", \"linux\", \"biglinux\" and" + " \"multiboot\". The option --no-mem-option tells GRUB not to pass a" +- " Linux's mem option automatically." ++ " Linux's mem option automatically. The option --spi tells GRUB to" ++ " fetch the Linux kernel from SPI/Flash." + }; + + +@@ -2970,7 +2992,7 @@ module_func (char *arg, int flags) + + case KERNEL_TYPE_LINUX: + case KERNEL_TYPE_BIG_LINUX: +- if (! load_initrd (arg)) ++ if (! load_initrd (arg, 0)) + return 1; + break; + +@@ -5268,6 +5290,16 @@ static struct builtin builtin_version = + "Display grub version." + }; + ++/* Placeholder for Clanton Recovery command. */ ++static struct builtin builtin_cln_recovery_placeholder = ++{ ++ "", ++ NULL, ++ 0, ++ "", ++ "" ++}; ++ + + /* The table of builtin commands. Sorted in dictionary order. */ + struct builtin *builtin_table[] = +@@ -5392,5 +5424,6 @@ struct builtin *builtin_table[] = + #endif + &builtin_verbose, + &builtin_version, ++ &builtin_cln_recovery_placeholder, + 0 + }; +diff --git a/stage2/char_io.c b/stage2/char_io.c +index 073201a..92804b4 100644 +--- a/stage2/char_io.c ++++ b/stage2/char_io.c +@@ -18,6 +18,7 @@ + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + ++#include <../efi/clanton/clanton.h> + #include <shared.h> + #include <term.h> + +@@ -188,13 +189,13 @@ static void write_char(char **str, char c, int *count) + (*count)++; + } + +-static void write_str(char **str, char *s, int *count) ++static void write_str(char **str, char *s, int *count, unsigned int max) + { + if (s) { +- while (*s) ++ while (*s && max-- > 0) + write_char(str, *s++, count); + } else { +- write_str(str, "(nil)", count); ++ write_str(str, "(nil)", count, 5); + } + } + +@@ -254,7 +255,9 @@ grub_vsprintf (char *str, const char *fmt, va_list args) + return 0; + + int is_fmt = 0, is_long = 0, is_signed = 1, is_cap = 0, is_zero_padded = 0; ++ int is_precision = 0; + int num_pad_chars = 0; ++ unsigned int max_len = 0; + int restart = 1; + do { + if (restart) { +@@ -267,6 +270,8 @@ grub_vsprintf (char *str, const char *fmt, va_list args) + num_pad_chars = 0; + buf[0] = '\0'; + pos = 0; ++ max_len = sizeof(buf); ++ is_precision = 0; + } + + if (!is_fmt) { +@@ -286,10 +291,26 @@ grub_vsprintf (char *str, const char *fmt, va_list args) + /* first, modifiers */ + case '%': + if (pos != 0) +- write_str(&str, buf, &count); ++ write_str(&str, buf, &count, max_len); + write_char(&str, c, &count); + restart = 1; + continue; ++ case '.': ++ buf[pos++] = c; ++ buf[pos] = '\0'; ++ is_precision = 1; ++ continue; ++ case '*': ++ buf[pos++] = c; ++ buf[pos] = '\0'; ++ if(is_precision == 1){ ++ max_len = va_arg(args, signed long); ++ } else { ++ /* Junk just print */ ++ write_char(&str, c, &count); ++ } ++ continue; ++ + case '0': + if (!is_zero_padded) { + buf[pos++] = c; +@@ -327,7 +348,7 @@ grub_vsprintf (char *str, const char *fmt, va_list args) + int_arg = va_arg(args, int) & 0xff; + if (int_arg == 0) { + char *tmp_str = "\\x00"; +- write_str(&tmp_str, buf, &count); ++ write_str(&tmp_str, buf, &count, max_len); + } else { + write_char(&str, int_arg, &count); + } +@@ -344,12 +365,15 @@ grub_vsprintf (char *str, const char *fmt, va_list args) + longlong_arg = va_arg(args, signed long long); + format_ascii(buf, longlong_arg, 0, 0, 0); + } +- write_str(&str, buf, &count); ++ write_str(&str, buf, &count, max_len); + restart = 1; + continue; + case 's': ++ + str_arg = va_arg(args, char *); +- write_str(&str, str_arg, &count); ++ if (is_precision == 0) ++ max_len = strlen(str_arg); ++ write_str(&str, str_arg, &count, max_len); + restart = 1; + continue; + case 'u': +@@ -364,7 +388,7 @@ grub_vsprintf (char *str, const char *fmt, va_list args) + ulonglong_arg = va_arg(args, unsigned long long); + format_ascii(buf, ulonglong_arg, 0, 0, 0); + } +- write_str(&str, buf, &count); ++ write_str(&str, buf, &count, max_len); + restart = 1; + continue; + case 'P': +@@ -373,8 +397,8 @@ grub_vsprintf (char *str, const char *fmt, va_list args) + ulong_arg = va_arg(args, unsigned long); + is_zero_padded = 1; + format_ascii(buf, ulong_arg, 1, is_cap, sizeof(ulong_arg)); +- write_str(&str, is_cap ? "0X" : "0x", &count); +- write_str(&str, buf, &count); ++ write_str(&str, is_cap ? "0X" : "0x", &count, 2); ++ write_str(&str, buf, &count, max_len); + restart = 1; + continue; + case 'X': +@@ -400,13 +424,13 @@ grub_vsprintf (char *str, const char *fmt, va_list args) + ulonglong_arg = va_arg(args, unsigned long long); + format_ascii(buf, ulonglong_arg, 1, is_cap, num_pad_chars); + } +- write_str(&str, buf, &count); ++ write_str(&str, buf, &count, max_len); + restart = 1; + continue; + default: + buf[pos++] = c; + buf[pos] = '\0'; +- write_str(&str, buf, &count); ++ write_str(&str, buf, &count, max_len); + restart = 1; + continue; + } +@@ -443,12 +467,20 @@ grub_sprintf (char *str, const char *fmt, ...) + + + void +-init_page (void) ++init_page (int cln_recovery) + { + cls (); + +- grub_printf ("\n GNU GRUB version %s (%dK lower / %dK upper memory)\n\n", +- version_string, mbi.mem_lower, mbi.mem_upper); ++ if (cln_recovery) ++ { ++ /* Different banner for Recovery shell. */ ++ print_error (); ++ errnum = 0; ++ grub_printf ("\n\n Clanton GRUB Recovery shell\n\n"); ++ } ++ else ++ grub_printf ("\n GNU GRUB version %s (%dK lower / %dK upper memory)\n\n", ++ version_string, mbi.mem_lower, mbi.mem_upper); + } + + /* The number of the history entries. */ +@@ -935,7 +967,10 @@ real_get_cmdline (char *prompt, char *cmdline, int maxlen, + switch (c) + { + case 27: /* ESC immediately return 1 */ +- return 1; ++ /* Recovery shell under Clanton Secure mode ++ does not allow returning. */ ++ if (! grub_cln_secure) ++ return 1; + case 4: /* C-d delete character under cursor */ + if (lpos == llen) + break; +@@ -1019,7 +1054,8 @@ get_cmdline (char *prompt, char *cmdline, int maxlen, + while ((c = ASCII_CHAR (getkey ())) != '\n' && c != '\r') + { + /* Return immediately if ESC is pressed. */ +- if (c == 27) ++ /* Unless we're in Clanton Secure mode of course... */ ++ if (! grub_cln_secure && c == 27) + { + setcursor (old_cursor); + return 1; +diff --git a/stage2/cmdline.c b/stage2/cmdline.c +index cb41eda..714f2b6 100644 +--- a/stage2/cmdline.c ++++ b/stage2/cmdline.c +@@ -18,6 +18,7 @@ + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + ++#include <../efi/clanton/clanton.h> + #include <shared.h> + + #ifdef SUPPORT_DISKLESS +@@ -89,8 +90,11 @@ find_command (char *command) + *ptr = c; + return *builtin; + } ++ /* Clanton recovery commands violate the alphabetical order. */ ++ /* + else if (ret < 0) + break; ++ */ + } + + /* Cannot find COMMAND. */ +@@ -101,13 +105,15 @@ find_command (char *command) + + /* Initialize the data for the command-line. */ + static void +-init_cmdline (void) ++init_cmdline (int cln_recovery) + { + /* Initialization. */ + saved_drive = boot_drive; + saved_partition = install_partition; + current_drive = GRUB_INVALID_DRIVE; +- errnum = 0; ++ /* If in recovery mode, you want to print out the error code. */ ++ if (! cln_recovery) ++ errnum = 0; + count_lines = -1; + + /* Restore memory probe state. */ +@@ -123,12 +129,12 @@ init_cmdline (void) + buffer. Return only if FOREVER is nonzero and get_cmdline returns + nonzero (ESC is pushed). */ + void +-enter_cmdline (char *heap, int forever) ++enter_cmdline (char *heap, int forever, int cln_recovery) + { + /* Initialize the data and print a message. */ +- init_cmdline (); ++ init_cmdline (cln_recovery); + grub_setjmp (restart_cmdline_env); +- init_page (); ++ init_page (cln_recovery); + #ifdef SUPPORT_DISKLESS + print_network_configuration (); + grub_putchar ('\n'); +@@ -191,7 +197,7 @@ run_script (char *script, char *heap) + char *cur_entry = script; + + /* Initialize the data. */ +- init_cmdline (); ++ init_cmdline (0); + + while (1) + { +@@ -202,17 +208,7 @@ run_script (char *script, char *heap) + + if (errnum) + { +- errnum = ERR_NONE; +- +- /* If a fallback entry is defined, don't prompt a user's +- intervention. */ +- if (fallback_entryno < 0) +- { +- grub_printf ("\nPress any key to continue..."); +- (void) getkey (); +- } +- +- return 1; ++ grub_cln_recovery_shell (grub_cln_loaded_from_spi); + } + + /* Copy the first string in CUR_ENTRY to HEAP. */ +diff --git a/stage2/common.c b/stage2/common.c +index e96bec2..c208f68 100644 +--- a/stage2/common.c ++++ b/stage2/common.c +@@ -88,6 +88,8 @@ char *err_list[] = + [ERR_UNRECOGNIZED] = "Unrecognized command", + [ERR_WONT_FIT] = "Selected item cannot fit into memory", + [ERR_WRITE] = "Disk write error", ++ [ERR_CLN_VERIFICATION] = "Clanton signature verification failed", ++ [ERR_SGN_FILE_NOT_FOUND] = "Clanton signature file not found", + }; + + +diff --git a/stage2/shared.h b/stage2/shared.h +index a82067b..09b0451 100644 +--- a/stage2/shared.h ++++ b/stage2/shared.h +@@ -167,6 +167,8 @@ extern void *grub_scratch_mem; + #define LINUX_SETUP_MOVE_SIZE 0x9800 + #define LINUX_CL_MAGIC 0xA33F + ++#define LINUX_CMDLINE_MAXSIZE LINUX_CL_END_OFFSET - LINUX_CL_OFFSET + 1 ++ + /* + * General disk stuff + */ +@@ -565,6 +567,8 @@ typedef enum + ERR_DEV_NEED_INIT, + ERR_NO_DISK_SPACE, + ERR_NUMBER_OVERFLOW, ++ ERR_CLN_VERIFICATION, ++ ERR_SGN_FILE_NOT_FOUND, + + MAX_ERR_NUM + } grub_error_t; +@@ -765,7 +769,8 @@ void chain_stage2 (unsigned long segment, unsigned long offset, + void linux_boot (void) __attribute__ ((noreturn)); + + /* do some funky stuff, then boot bzImage linux */ +-void big_linux_boot (void) __attribute__ ((noreturn)); ++/* Clanton: return if something goes wrong. */ ++void big_linux_boot (void); + + /* booting a multiboot executable */ + void multi_boot (int start, int mb_info) __attribute__ ((noreturn)); +@@ -897,7 +902,7 @@ void init_builtins (void); + void init_config (void); + char *skip_to (int after_equal, char *cmdline); + struct builtin *find_command (char *command); +-void enter_cmdline (char *heap, int forever); ++void enter_cmdline (char *heap, int forever, int cln_recovery); + int run_script (char *script, char *heap); + + /* the flags for the cmdline message */ +@@ -957,7 +962,7 @@ extern grub_jmp_buf restart_env; + extern grub_jmp_buf restart_cmdline_env; + + /* misc */ +-void init_page (void); ++void init_page (int cln_recovery); + void print_error (void); + char *convert_to_ascii (char *buf, int c, unsigned int num); + int get_cmdline (char *prompt, char *cmdline, int maxlen, +@@ -1039,12 +1044,18 @@ void bsd_boot (kernel_t type, int bootdev, char *arg) + /* Define flags for load_image here. */ + /* Don't pass a Linux's mem option automatically. */ + #define KERNEL_LOAD_NO_MEM_OPTION (1 << 0) ++/* Linux kernel is in SPI flash. */ ++#define KERNEL_SPI (1 << 1) ++ ++/* Define flags for load_initrd here. */ ++/* The initrd is in SPI flash. */ ++#define INITRD_SPI (1 << 0) + + kernel_t load_image (char *kernel, char *arg, kernel_t suggested_type, + unsigned long load_flags); + + int load_module (char *module, char *arg); +-int load_initrd (char *initrd); ++int load_initrd (char *initrd, unsigned long load_flags); + + int check_password(char *entered, char* expected, password_t type); + +@@ -1063,6 +1074,15 @@ extern void assign_device_name (int drive, const char *device); + int grub_load_linux (char *kernel, char *arg); + int grub_load_initrd (char *initrd); + int grub_chainloader (char *filename); ++ ++/* Clanton-specific. */ ++void grub_cln_recovery_shell (unsigned short int); ++int grub_cln_sdio_program (char *s, int i); ++int grub_cln_spi_program (char *s, int i); ++void grub_cln_event_append (const char *tag); ++void grub_cln_load_config_file (char **buf, int *size); ++void grub_cln_detect_secure_sku (void); ++ + #endif /* ASM_FILE */ + + #endif /* ! GRUB_SHARED_HEADER */ +diff --git a/stage2/stage2.c b/stage2/stage2.c +index cca4332..289b43f 100644 +--- a/stage2/stage2.c ++++ b/stage2/stage2.c +@@ -17,6 +17,8 @@ + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + ++#include <../efi/clanton/clanton.h> ++#include <../netboot/timer.h> + #include <shared.h> + #include <term.h> + +@@ -24,6 +26,21 @@ grub_jmp_buf restart_env; + + int silent_grub = 0; + ++/* Clanton secure/non-secure global variable. ++ Secure Boot is enabled by default. The value is then refreshed at run-time ++ by reading a fuse. */ ++unsigned short int grub_cln_secure = 1; ++ ++/* Clanton build-time debug/release switch. */ ++#ifndef GRUB_CLN_DEBUG ++#define GRUB_CLN_DEBUG 0 ++#endif ++unsigned short int grub_cln_debug = GRUB_CLN_DEBUG; ++ ++/* Clanton-Secure config file buffer. */ ++static char *cln_cfg_file_buffer = NULL; ++static int cln_cfg_file_size = 0; ++ + #if defined(PRESET_MENU_STRING) || defined(SUPPORT_DISKLESS) + + # if defined(PRESET_MENU_STRING) +@@ -78,6 +95,31 @@ close_preset_menu (void) + + #endif /* ! PRESET_MENU_STRING && ! SUPPORT_DISKLESS */ + ++#define PIT_CLOCK_TICK_RATE 1193180U ++#define PIT_MAXTICKS 0xffff ++ ++/* Copied from netboot/timer.c */ ++void ++load_timer2 (unsigned int ticks) ++{ ++ /* Set up the timer gate, turn off the speaker */ ++ outb((inb(PPC_PORTB) & ~PPCB_SPKR) | PPCB_T2GATE, PPC_PORTB); ++ outb(TIMER2_SEL|WORD_ACCESS|MODE0|BINARY_COUNT, TIMER_MODE_PORT); ++ outb(ticks & 0xFF, TIMER2_PORT); ++ outb(ticks >> 8, TIMER2_PORT); ++} ++ ++/* Rely on i8254 timer2 instead of RTC. */ ++static void ++wait_one_second (void) ++{ ++ int i = 0, count = PIT_CLOCK_TICK_RATE / PIT_MAXTICKS; ++ ++ for (i = 0; i < count; i ++) ++ waiton_timer2 (PIT_MAXTICKS); ++ waiton_timer2 (PIT_CLOCK_TICK_RATE % PIT_MAXTICKS); ++} ++ + static char * + get_entry (char *list, int num, int nested) + { +@@ -233,7 +275,7 @@ static void + run_menu (char *menu_entries, char *config_entries, int num_entries, + char *heap, int entryno) + { +- int c, time1, time2 = -1, first_entry = 0; ++ int c, first_entry = 0; + char *cur_entry = 0; + struct term_entry *prev_term = NULL; + +@@ -267,10 +309,6 @@ restart: + /* Don't show the "Booting in blah seconds message" if the timeout is 0 */ + int print_message = grub_timeout != 0; + +- /* Get current time. */ +- while ((time1 = getrtsecs ()) == 0xFF) +- ; +- + if (print_message) + grub_printf("\rPress any key to enter the menu\n\n\n"); + +@@ -294,17 +332,14 @@ restart: + } + + /* If GRUB_TIMEOUT is expired, boot the default entry. */ +- if (grub_timeout >=0 +- && (time1 = getrtsecs ()) != time2 +- && time1 != 0xFF) ++ if (grub_timeout >=0) + { + if (grub_timeout <= 0) + { + grub_timeout = -1; + goto boot_entry; + } +- +- time2 = time1; ++ + grub_timeout--; + + /* Print a message. */ +@@ -312,6 +347,8 @@ restart: + grub_printf ("\rBooting %s in %d seconds...", + get_entry(menu_entries, first_entry + entryno, 0), + grub_timeout); ++ ++ wait_one_second (); + } + } + } +@@ -319,7 +356,7 @@ restart: + /* Only display the menu if the user wants to see it. */ + if (show_menu) + { +- init_page (); ++ init_page (0); + setcursor (0); + + if (current_term->flags & TERM_DUMB) +@@ -331,7 +368,13 @@ restart: + Use the %c and %c keys to select which entry is highlighted.\n", + DISP_UP, DISP_DOWN); + +- if (! auth && password) ++ if (grub_cln_secure && ! grub_cln_debug) ++ { ++ /* Don't show menu choices that are unavailable in secure mode. */ ++ grub_printf ("\ ++ Press enter to boot the selected OS."); ++ } ++ else if (! auth && password) + { + printf ("\ + Press enter to boot the selected OS or \'p\' to enter a\n\ +@@ -358,15 +401,12 @@ restart: + print_entries (3, 12, first_entry, entryno, menu_entries); + } + +- /* XX using RT clock now, need to initialize value */ +- while ((time1 = getrtsecs()) == 0xFF); +- + while (1) + { + /* Initialize to NULL just in case... */ + cur_entry = NULL; + +- if (grub_timeout >= 0 && (time1 = getrtsecs()) != time2 && time1 != 0xFF) ++ if (grub_timeout >= 0) + { + if (grub_timeout <= 0) + { +@@ -374,9 +414,6 @@ restart: + break; + } + +- /* else not booting yet! */ +- time2 = time1; +- + if (current_term->flags & TERM_DUMB) + grub_printf ("\r Entry %d will be booted automatically in %d seconds. ", + entryno, grub_timeout); +@@ -389,6 +426,8 @@ restart: + } + + grub_timeout--; ++ ++ wait_one_second (); + } + + /* Check for a keypress, however if TIMEOUT has been expired +@@ -583,7 +622,11 @@ restart: + break; + } + +- if (! auth && password) ++ if (grub_cln_secure && ! grub_cln_debug) ++ { ++ /* Prevent the user from interacting with boot settings. */ ++ } ++ else if (! auth && password) + { + if (c == 'p') + { +@@ -718,7 +761,7 @@ restart: + } + if (c == 'c') + { +- enter_cmdline (heap, 0); ++ enter_cmdline (heap, 0, 0); + goto restart; + } + if (config_entries && c == 'a') +@@ -895,14 +938,20 @@ static int + get_line_from_config (char *cmdline, int maxlen, int read_from_file) + { + int pos = 0, literal = 0, comment = 0; +- char c; /* since we're loading it a byte at a time! */ ++ static int cln_index; ++ char c = 0; /* since we're loading it a byte at a time! */ + + while (1) + { + if (read_from_file) + { +- if (! grub_read (&c, 1)) +- break; ++ /* Config file is already buffered. */ ++ if (cln_index == cln_cfg_file_size) ++ { ++ cln_index = 0; ++ break; ++ } ++ c = cln_cfg_file_buffer[cln_index ++]; + } + else + { +@@ -965,7 +1014,6 @@ get_line_from_config (char *cmdline, int maxlen, int read_from_file) + return pos; + } + +- + /* This is the starting function in C. */ + void + cmain (void) +@@ -992,6 +1040,13 @@ cmain (void) + /* Initialize the kill buffer. */ + *kill_buf = 0; + ++ /* Initialise the configuration file buffer. */ ++ cln_cfg_file_buffer = NULL; ++ cln_cfg_file_size = 0; ++ ++ /* Check if Clanton Secure Boot is enabled on this SKU. */ ++ grub_cln_detect_secure_sku (); ++ + /* Never return. */ + for (;;) + { +@@ -1020,8 +1075,14 @@ cmain (void) + is_opened = is_preset = open_preset_menu (); + if (! is_opened) + { +- is_opened = grub_open (config_file); +- errnum = ERR_NONE; ++ /* Buffer configuration file and validate it if in Secure ++ mode. */ ++ grub_cln_load_config_file (&cln_cfg_file_buffer, ++ &cln_cfg_file_size); ++ if (ERR_NONE == errnum) ++ is_opened = 1; ++ else ++ grub_cln_recovery_shell (grub_cln_loaded_from_spi); + } + + if (! is_opened) +@@ -1168,7 +1229,7 @@ cmain (void) + heap from where the config entries would have been stored + if there were any. */ + grub_verbose = 1; +- enter_cmdline (config_entries, 1); ++ enter_cmdline (config_entries, 1, 0); + } + else + { +diff --git a/util/Makefile.in b/util/Makefile.in +deleted file mode 100644 +index aa5a12e..0000000 +--- a/util/Makefile.in ++++ /dev/null +@@ -1,475 +0,0 @@ +-# Makefile.in generated by automake 1.10 from Makefile.am. +-# @configure_input@ +- +-# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, +-# 2003, 2004, 2005, 2006 Free Software Foundation, Inc. +-# This Makefile.in is free software; the Free Software Foundation +-# gives unlimited permission to copy and/or distribute it, +-# with or without modifications, as long as this notice is preserved. +- +-# This program is distributed in the hope that it will be useful, +-# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +-# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +-# PARTICULAR PURPOSE. +- +-@SET_MAKE@ +- +- +-VPATH = @srcdir@ +-pkgdatadir = $(datadir)/@PACKAGE@ +-pkglibdir = $(libdir)/@PACKAGE@ +-pkgincludedir = $(includedir)/@PACKAGE@ +-am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd +-install_sh_DATA = $(install_sh) -c -m 644 +-install_sh_PROGRAM = $(install_sh) -c +-install_sh_SCRIPT = $(install_sh) -c +-INSTALL_HEADER = $(INSTALL_DATA) +-transform = $(program_transform_name) +-NORMAL_INSTALL = : +-PRE_INSTALL = : +-POST_INSTALL = : +-NORMAL_UNINSTALL = : +-PRE_UNINSTALL = : +-POST_UNINSTALL = : +-build_triplet = @build@ +-host_triplet = @host@ +-bin_PROGRAMS = mbchk$(EXEEXT) +-subdir = util +-DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in \ +- $(srcdir)/grub-image.in $(srcdir)/grub-install.in \ +- $(srcdir)/grub-md5-crypt.in $(srcdir)/grub-terminfo.in +-ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 +-am__aclocal_m4_deps = $(top_srcdir)/acinclude.m4 \ +- $(top_srcdir)/configure.in +-am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \ +- $(ACLOCAL_M4) +-mkinstalldirs = $(SHELL) $(top_srcdir)/mkinstalldirs +-CONFIG_HEADER = $(top_builddir)/config.h +-CONFIG_CLEAN_FILES = grub-image grub-install grub-md5-crypt \ +- grub-terminfo +-am__installdirs = "$(DESTDIR)$(bindir)" "$(DESTDIR)$(sbindir)" +-binPROGRAMS_INSTALL = $(INSTALL_PROGRAM) +-PROGRAMS = $(bin_PROGRAMS) +-am_mbchk_OBJECTS = mbchk.$(OBJEXT) +-mbchk_OBJECTS = $(am_mbchk_OBJECTS) +-mbchk_DEPENDENCIES = ../lib/libcommon.a +-sbinSCRIPT_INSTALL = $(INSTALL_SCRIPT) +-SCRIPTS = $(noinst_SCRIPTS) $(sbin_SCRIPTS) +-DEFAULT_INCLUDES = -I. -I$(top_builddir)@am__isrc@ +-depcomp = $(SHELL) $(top_srcdir)/depcomp +-am__depfiles_maybe = depfiles +-COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \ +- $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) +-CCLD = $(CC) +-LINK = $(CCLD) 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maintainer-clean-generic mostlyclean \ +- mostlyclean-compile mostlyclean-generic pdf pdf-am ps ps-am \ +- tags uninstall uninstall-am uninstall-binPROGRAMS \ +- uninstall-sbinSCRIPTS +- +-# Tell versions [3.59,3.63) of GNU make to not export all variables. +-# Otherwise a system limit (for SysV at least) may be exceeded. +-.NOEXPORT: diff --git a/recipes-bsp/grub/grub_0.97.bb b/recipes-bsp/grub/grub_0.97.bb new file mode 100644 index 0000000..9dab31b --- /dev/null +++ b/recipes-bsp/grub/grub_0.97.bb @@ -0,0 +1,46 @@ +SUMMARY = "GRUB is the GRand Unified Bootloader" +DESCRIPTION = "GRUB is a GPLed bootloader intended to unify bootloading across x86 \ +operating systems. In addition to loading the Linux kernel, it implements the Multiboot \ +standard, which allows for flexible loading of multiple boot images." +HOMEPAGE = "http://www.gnu.org/software/grub/" +SECTION = "bootloaders" + +LICENSE = "GPLv2+" +LIC_FILES_CHKSUM = "file://COPYING;md5=c93c0550bd3173f4504b2cbd8991e50b \ + file://grub/main.c;beginline=3;endline=9;md5=22a5f28d2130fff9f2a17ed54be90ed6" + +PV = "0.97+git${SRCPV}" + +#check if this is needed +RDEPENDS_${PN} = "diffutils" +DEPENDS = "gnu-efi" +PR = "r0" + +SRC_URI = "git://github.com/vathpela/grub-fedora.git" + +SRC_URI += "file://clanton.patch" + +CFLAGS_append = " -Os -fno-strict-aliasing -Wall -Werror -Wno-shadow -Wno-unused -Wno-pointer-sign \ + -DINTEL_CLN_TEST=1" + +S = "${WORKDIR}/git" +SEPB = "${S}" +#SRCREV = "${AUTOREV}" +SRCREV = "5775f32a6268dead6939d01cbe72f23972f6d3c0" + +inherit autotools deploy + +EXTRA_OECONF = "--without-curses --disable-auto-linux-mem-opt --with-platform=efi --libdir=${STAGING_LIBDIR}" + +GRUB_TARGET = "i386" +GRUB_IMAGE = "/efi/grub.efi" + +COMPATIBLE_HOST = "i.86.*-linux" + +do_deploy() { + install -m 644 ${S}/${GRUB_IMAGE} ${DEPLOYDIR} +} +addtask deploy after do_install before do_build + +do_install[noexec] = "1" +do_populate_sysroot[noexec] = "1" diff --git a/recipes-kernel/linux/files/clanton-standard.scc b/recipes-kernel/linux/files/clanton-standard.scc new file mode 100644 index 0000000..07e0758 --- /dev/null +++ b/recipes-kernel/linux/files/clanton-standard.scc @@ -0,0 +1,6 @@ +define KMACHINE clanton +define KTYPE standard +define KARCH i386 + +kconf hardware clanton.cfg + diff --git a/recipes-kernel/linux/files/clanton.cfg b/recipes-kernel/linux/files/clanton.cfg new file mode 100644 index 0000000..1356dc9 --- /dev/null +++ b/recipes-kernel/linux/files/clanton.cfg @@ -0,0 +1,2938 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/i386 3.8.7 Kernel Configuration +# +# CONFIG_64BIT is not set +CONFIG_X86_32=y +CONFIG_X86=y +CONFIG_INSTRUCTION_DECODER=y +CONFIG_OUTPUT_FORMAT="elf32-i386" +CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig" +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_MMU=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_GENERIC_ISA_DMA=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_GPIO=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_HAS_CPU_RELAX=y +CONFIG_ARCH_HAS_DEFAULT_IDLE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_HAS_CPU_AUTOPROBE=y +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y +CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# CONFIG_ZONE_DMA32 is not set +# CONFIG_AUDIT_ARCH is not set +CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_X86_32_LAZY_GS=y +CONFIG_ARCH_HWEIGHT_CFLAGS="-fcall-saved-ecx -fcall-saved-edx" +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_HAVE_IRQ_WORK=y +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_EXTABLE_SORT=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_CROSS_COMPILE="" +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_BZIP2=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_KERNEL_LZO=y +# CONFIG_KERNEL_GZIP is not set +# CONFIG_KERNEL_BZIP2 is not set +CONFIG_KERNEL_LZMA=y +# CONFIG_KERNEL_XZ is not set +# CONFIG_KERNEL_LZO is not set +CONFIG_DEFAULT_HOSTNAME="(none)" +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_FHANDLE is not set +# CONFIG_AUDIT is not set +CONFIG_HAVE_GENERIC_HARDIRQS=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +# CONFIG_IRQ_DOMAIN_DEBUG is not set +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +CONFIG_CLOCKSOURCE_WATCHDOG=y +CONFIG_KTIME_SCALAR=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y +CONFIG_GENERIC_CMOS_UPDATE=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_IRQ_TIME_ACCOUNTING is not set +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +# CONFIG_TASKSTATS is not set + +# +# RCU Subsystem +# +CONFIG_TINY_RCU=y +# CONFIG_PREEMPT_RCU is not set +# CONFIG_TREE_RCU_TRACE is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_WANTS_PROT_NUMA_PROT_NONE=y +CONFIG_CGROUPS=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_CGROUP_FREEZER=y +# CONFIG_CGROUP_DEVICE is not set +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +# CONFIG_MEMCG is not set +# CONFIG_CGROUP_HUGETLB is not set +# CONFIG_CGROUP_PERF is not set +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_CFS_BANDWIDTH is not set +# CONFIG_RT_GROUP_SCHED is not set +# CONFIG_BLK_CGROUP is not set +# CONFIG_CHECKPOINT_RESTORE is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +# CONFIG_USER_NS is not set +CONFIG_PID_NS=y +CONFIG_NET_NS=y +CONFIG_UIDGID_CONVERTED=y +# CONFIG_UIDGID_STRICT_TYPE_CHECKS is not set +# CONFIG_SCHED_AUTOGROUP is not set +# CONFIG_SYSFS_DEPRECATED is not set +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +# CONFIG_RD_XZ is not set +# CONFIG_RD_LZO is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_EXPERT=y +CONFIG_HAVE_UID16=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +# CONFIG_PCSPKR_PLATFORM is not set +CONFIG_HAVE_PCSPKR_PLATFORM=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_EMBEDDED=y +CONFIG_HAVE_PERF_EVENTS=y + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_PCI_QUIRKS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +CONFIG_HAVE_OPROFILE=y +CONFIG_OPROFILE_NMI_TIMER=y +# CONFIG_KPROBES is not set +CONFIG_JUMP_LABEL=y +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_IOREMAP_PROT=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_OPTPROBES=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_ATTRS=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y +CONFIG_HAVE_USER_RETURN_NOTIFIER=y +CONFIG_HAVE_PERF_EVENTS_NMI=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP_FILTER=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_GENERIC_SIGALTSTACK=y +CONFIG_CLONE_BACKWARDS=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +CONFIG_BLOCK=y +# CONFIG_LBDAF is not set +CONFIG_BLK_DEV_BSG=y +# CONFIG_BLK_DEV_BSGLIB is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_BSD_DISKLABEL=y +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_FREEZER=y + +# +# Processor type and features +# +# CONFIG_ZONE_DMA is not set +# CONFIG_SMP is not set +CONFIG_X86_MPPARSE=y +CONFIG_X86_EXTENDED_PLATFORM=y +CONFIG_INTEL_QUARK_X1000_SOC=y +# CONFIG_X86_WANT_INTEL_MID is not set +# CONFIG_X86_RDC321X is not set +CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y + +# +# Intel Media SOC Gen3 support +# +CONFIG_ARCH_GEN3=y +# CONFIG_X86_32_IRIS is not set +CONFIG_SCHED_OMIT_FRAME_POINTER=y +# CONFIG_PARAVIRT_GUEST is not set +CONFIG_NO_BOOTMEM=y +# CONFIG_MEMTEST is not set +# CONFIG_M486 is not set +# CONFIG_M586 is not set +CONFIG_M586TSC=y +# CONFIG_M586MMX is not set +# CONFIG_M686 is not set +# CONFIG_MPENTIUMII is not set +# CONFIG_MPENTIUMIII is not set +# CONFIG_MPENTIUMM is not set +# CONFIG_MPENTIUM4 is not set +# CONFIG_MK6 is not set +# CONFIG_MK7 is not set +# CONFIG_MK8 is not set +# CONFIG_MCRUSOE is not set +# CONFIG_MEFFICEON is not set +# CONFIG_MWINCHIPC6 is not set +# CONFIG_MWINCHIP3D is not set +# CONFIG_MELAN is not set +# CONFIG_MGEODEGX1 is not set +# CONFIG_MGEODE_LX is not set +# CONFIG_MCYRIXIII is not set +# CONFIG_MVIAC3_2 is not set +# CONFIG_MVIAC7 is not set +# CONFIG_MCORE2 is not set +# CONFIG_MATOM is not set +CONFIG_X86_GENERIC=y +CONFIG_X86_INTERNODE_CACHE_SHIFT=6 +CONFIG_X86_L1_CACHE_SHIFT=6 +# CONFIG_X86_PPRO_FENCE is not set +CONFIG_X86_F00F_BUG=y +CONFIG_X86_ALIGNMENT_16=y +CONFIG_X86_INTEL_USERCOPY=y +CONFIG_X86_TSC=y +CONFIG_X86_CMPXCHG64=y +CONFIG_X86_MINIMUM_CPU_FAMILY=5 +# CONFIG_PROCESSOR_SELECT is not set +CONFIG_CPU_SUP_INTEL=y +CONFIG_CPU_SUP_CYRIX_32=y +CONFIG_CPU_SUP_AMD=y +CONFIG_CPU_SUP_CENTAUR=y +CONFIG_CPU_SUP_TRANSMETA_32=y +CONFIG_CPU_SUP_UMC_32=y +CONFIG_HPET_TIMER=y +CONFIG_HPET_EMULATE_RTC=y +# CONFIG_DMI is not set +CONFIG_NR_CPUS=1 +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y +# CONFIG_PREEMPT is not set +CONFIG_X86_UP_APIC=y +CONFIG_X86_UP_IOAPIC=y +CONFIG_X86_LOCAL_APIC=y +CONFIG_X86_IO_APIC=y +# CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS is not set +CONFIG_X86_MCE=y +CONFIG_X86_MCE_INTEL=y +# CONFIG_X86_MCE_AMD is not set +# CONFIG_X86_ANCIENT_MCE is not set +CONFIG_X86_MCE_THRESHOLD=y +# CONFIG_X86_MCE_INJECT is not set +CONFIG_X86_THERMAL_VECTOR=y +CONFIG_VM86=y +# CONFIG_TOSHIBA is not set +# CONFIG_I8K is not set +CONFIG_X86_REBOOTFIXUPS=y +CONFIG_MICROCODE=y +CONFIG_MICROCODE_INTEL=y +# CONFIG_MICROCODE_AMD is not set +CONFIG_MICROCODE_OLD_INTERFACE=y +CONFIG_X86_MSR=y +CONFIG_X86_CPUID=y +# CONFIG_NOHIGHMEM is not set +# CONFIG_HIGHMEM4G is not set +CONFIG_HIGHMEM64G=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_HIGHMEM=y +CONFIG_X86_PAE=y +CONFIG_ARCH_PHYS_ADDR_T_64BIT=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ILLEGAL_POINTER_VALUE=0 +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_SPARSEMEM_STATIC=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_HAVE_MEMBLOCK_NODE_MAP=y +CONFIG_ARCH_DISCARD_MEMBLOCK=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=999999 +# CONFIG_COMPACTION is not set +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +# CONFIG_MEMORY_FAILURE is not set +# CONFIG_TRANSPARENT_HUGEPAGE is not set +CONFIG_CROSS_MEMORY_ATTACH=y +CONFIG_NEED_PER_CPU_KM=y +# CONFIG_CLEANCACHE is not set +# CONFIG_HIGHPTE is not set +# CONFIG_X86_CHECK_BIOS_CORRUPTION is not set +CONFIG_X86_RESERVE_LOW=64 +# CONFIG_MATH_EMULATION is not set +# CONFIG_MTRR is not set +# CONFIG_ARCH_RANDOM is not set +CONFIG_X86_SMAP=y +CONFIG_EFI=y +CONFIG_EFI_STUB=y +CONFIG_EFI_CAPSULE=y +CONFIG_SECCOMP=y +# CONFIG_CC_STACKPROTECTOR is not set +CONFIG_HZ_100=y +# CONFIG_HZ_250 is not set +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=100 +CONFIG_SCHED_HRTICK=y +CONFIG_KEXEC=y +# CONFIG_CRASH_DUMP is not set +CONFIG_PHYSICAL_START=0x400000 +# CONFIG_RELOCATABLE is not set +CONFIG_PHYSICAL_ALIGN=0x1000000 +# CONFIG_COMPAT_VDSO is not set +# CONFIG_CMDLINE_BOOL is not set +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y + +# +# Power management and ACPI options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_PM_SLEEP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM_RUNTIME=y +CONFIG_PM=y +CONFIG_PM_DEBUG=y +# CONFIG_PM_ADVANCED_DEBUG is not set +CONFIG_PM_SLEEP_DEBUG=y +CONFIG_PM_TRACE=y +CONFIG_PM_TRACE_RTC=y +CONFIG_ACPI=y +CONFIG_ACPI_SLEEP=y +CONFIG_ACPI_PROCFS=y +CONFIG_ACPI_PROCFS_POWER=y +CONFIG_ACPI_EC_DEBUGFS=y +# CONFIG_ACPI_PROC_EVENT is not set +CONFIG_ACPI_AC=y +# CONFIG_ACPI_BATTERY is not set +CONFIG_ACPI_BUTTON=y +# CONFIG_ACPI_FAN is not set +# CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_I2C=m +CONFIG_ACPI_PROCESSOR=y +# CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set +CONFIG_ACPI_THERMAL=y +# CONFIG_ACPI_CUSTOM_DSDT is not set +# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set +CONFIG_ACPI_BLACKLIST_YEAR=0 +CONFIG_ACPI_DEBUG=y +# CONFIG_ACPI_DEBUG_FUNC_TRACE is not set +CONFIG_ACPI_PCI_SLOT=y +CONFIG_X86_PM_TIMER=y +# CONFIG_ACPI_CONTAINER is not set +# CONFIG_ACPI_SBS is not set +# CONFIG_ACPI_HED is not set +# CONFIG_ACPI_CUSTOM_METHOD is not set +# CONFIG_ACPI_BGRT is not set +# CONFIG_ACPI_APEI is not set +# CONFIG_SFI is not set +# CONFIG_APM is not set + +# +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set +CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y +# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set +# CONFIG_INTEL_IDLE is not set + +# +# Bus options (PCI etc.) +# +CONFIG_PCI=y +# CONFIG_PCI_GOBIOS is not set +# CONFIG_PCI_GOMMCONFIG is not set +# CONFIG_PCI_GODIRECT is not set +CONFIG_PCI_GOANY=y +CONFIG_PCI_BIOS=y +CONFIG_PCI_DIRECT=y +CONFIG_PCI_MMCONFIG=y +CONFIG_PCI_DOMAINS=y +# CONFIG_PCI_CNB20LE_QUIRK is not set +CONFIG_PCIEPORTBUS=y +CONFIG_PCIEAER=y +# CONFIG_PCIE_ECRC is not set +# CONFIG_PCIEAER_INJECT is not set +CONFIG_PCIEASPM=y +# CONFIG_PCIEASPM_DEBUG is not set +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_PERFORMANCE is not set +CONFIG_PCIE_PME=y +CONFIG_ARCH_SUPPORTS_MSI=y +CONFIG_PCI_MSI=y +CONFIG_PCI_DEBUG=y +# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set +# CONFIG_PCI_STUB is not set +CONFIG_HT_IRQ=y +# CONFIG_PCI_IOV is not set +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +CONFIG_PCI_IOAPIC=y +CONFIG_PCI_LABEL=y +CONFIG_ISA_DMA_API=y +# CONFIG_ISA is not set +# CONFIG_SCx200 is not set +# CONFIG_ALIX is not set +# CONFIG_NET5501 is not set +CONFIG_AMD_NB=y +# CONFIG_PCCARD is not set +# CONFIG_HOTPLUG_PCI is not set +# CONFIG_RAPIDIO is not set + +# +# Executable file formats / Emulations +# +CONFIG_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +CONFIG_HAVE_ATOMIC_IOMAP=y +CONFIG_HAVE_TEXT_POKE_SMP=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +# CONFIG_UNIX_DIAG is not set +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +# CONFIG_NET_IPVTI is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +CONFIG_INET_LRO=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_INET_UDP_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=m +# CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +# CONFIG_IPV6_SIT is not set +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_GRE is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_NETLABEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=m +CONFIG_GARP=m +# CONFIG_BRIDGE is not set +CONFIG_HAVE_NET_DSA=y +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +# CONFIG_DECNET is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set +# CONFIG_DNS_RESOLVER is not set +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_NETPRIO_CGROUP is not set +CONFIG_BQL=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +CONFIG_BT=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m + +# +# Bluetooth device drivers +# +CONFIG_BT_HCIBTUSB=m +# CONFIG_BT_HCIBTSDIO is not set +# CONFIG_BT_HCIUART is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +CONFIG_BT_HCIVHCI=m +# CONFIG_BT_MRVL is not set +# CONFIG_BT_ATH3K is not set +# CONFIG_AF_RXRPC is not set +CONFIG_WIRELESS=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_CFG80211=m +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_REG_DEBUG is not set +# CONFIG_CFG80211_CERTIFICATION_ONUS is not set +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +# CONFIG_CFG80211_INTERNAL_REGDB is not set +CONFIG_CFG80211_WEXT=y +# CONFIG_LIB80211 is not set +CONFIG_MAC80211=m +CONFIG_MAC80211_HAS_RC=y +# CONFIG_MAC80211_RC_PID is not set +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_MINSTREL_HT=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +# CONFIG_WIMAX is not set +CONFIG_RFKILL=m +CONFIG_RFKILL_LEDS=y +CONFIG_RFKILL_INPUT=y +# CONFIG_NET_9P is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_DEBUG_DRIVER is not set +CONFIG_DEBUG_DEVRES=y +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_GENERIC_CPU_DEVICES is not set +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_CMA is not set + +# +# Bus devices +# +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=m +CONFIG_MTD_BLKDEVS=m +CONFIG_MTD_BLOCK=m +# CONFIG_MTD_BLOCK_RO is not set +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_TS5500 is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +CONFIG_MTD_M25P80=m +CONFIG_M25PXX_USE_FAST_READ=y +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_MTD_CLN_ROM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_PNP=y +# CONFIG_PNP_DEBUG_MESSAGES is not set + +# +# Protocols +# +CONFIG_PNPACPI=y +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=2 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_NVME is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=1 +CONFIG_BLK_DEV_RAM_SIZE=81920 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_BLK_DEV_HD is not set +# CONFIG_BLK_DEV_RBD is not set + +# +# Misc devices +# +# CONFIG_SENSORS_LIS3LV02D is not set +# CONFIG_AD525X_DPOT is not set +# CONFIG_IBM_ASM is not set +# CONFIG_PHANTOM is not set +# CONFIG_INTEL_MID_PTI is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1780 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_TI_DAC7512 is not set +# CONFIG_VMWARE_BALLOON is not set +# CONFIG_BMP085_I2C is not set +# CONFIG_BMP085_SPI is not set +# CONFIG_PCH_PHUB is not set +# CONFIG_USB_SWITCH_FSA9480 is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +CONFIG_EEPROM_AT24=m +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# CONFIG_SENSORS_LIS3_I2C is not set + +# +# Altera FPGA firmware download module +# +# CONFIG_ALTERA_STAPL is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +CONFIG_CHR_DEV_SG=y +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_MULTI_LUN is not set +CONFIG_SCSI_CONSTANTS=y +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +CONFIG_SCSI_SPI_ATTRS=y +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# CONFIG_SCSI_LOWLEVEL is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# CONFIG_I2O is not set +# CONFIG_MACINTOSH_DRIVERS is not set +CONFIG_NETDEVICES=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +# CONFIG_DUMMY is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +CONFIG_MII=y +# CONFIG_NET_TEAM is not set +# CONFIG_MACVLAN is not set +# CONFIG_VXLAN is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_ARCNET is not set + +# +# CAIF transport drivers +# + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +# CONFIG_NET_DSA_MV88E6131 is not set +# CONFIG_NET_DSA_MV88E6123_61_65 is not set +CONFIG_ETHERNET=y +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_NET_VENDOR_AMD is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +CONFIG_NET_CADENCE=y +# CONFIG_ARM_AT91_ETHER is not set +# CONFIG_MACB is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_BROCADE is not set +# CONFIG_NET_CALXEDA_XGMAC is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CISCO is not set +# CONFIG_DNET is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +# CONFIG_NET_VENDOR_EXAR is not set +# CONFIG_NET_VENDOR_HP is not set +CONFIG_NET_VENDOR_INTEL=y +# CONFIG_E100 is not set +CONFIG_E1000=m +# CONFIG_E1000E is not set +# CONFIG_IGB is not set +# CONFIG_IGBVF is not set +# CONFIG_IXGB is not set +# CONFIG_IXGBE is not set +# CONFIG_IXGBEVF is not set +# CONFIG_NET_VENDOR_I825XX is not set +# CONFIG_IP1000 is not set +# CONFIG_JME is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_FEALNX is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +# CONFIG_ETHOC is not set +# CONFIG_NET_PACKET_ENGINE is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_REALTEK is not set +# CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +# CONFIG_SFC is not set +# CONFIG_NET_VENDOR_SMSC is not set +CONFIG_NET_VENDOR_STMICRO=y +CONFIG_STMMAC_ETH=m +# CONFIG_STMMAC_PLATFORM is not set +CONFIG_STMMAC_PCI=y +# CONFIG_STMMAC_DEBUG_FS is not set +CONFIG_STMMAC_DA=y +# CONFIG_STMMAC_PTP is not set +CONFIG_STMMAC_RING=y +# CONFIG_STMMAC_CHAINED is not set +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_NET_SB1000 is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_AT803X_PHY is not set +# CONFIG_AMD_PHY is not set +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_MICREL_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MICREL_KS8995MA is not set +CONFIG_PPP=m +# CONFIG_PPP_BSDCOMP is not set +CONFIG_PPP_DEFLATE=m +# CONFIG_PPP_FILTER is not set +# CONFIG_PPP_MPPE is not set +# CONFIG_PPP_MULTILINK is not set +# CONFIG_PPPOE is not set +CONFIG_PPP_ASYNC=m +# CONFIG_PPP_SYNC_TTY is not set +# CONFIG_SLIP is not set +CONFIG_SLHC=m + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_IPHETH is not set +CONFIG_WLAN=y +# CONFIG_LIBERTAS_THINFIRM is not set +# CONFIG_AIRO is not set +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +# CONFIG_PRISM54 is not set +# CONFIG_USB_ZD1201 is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +# CONFIG_ADM8211 is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_MWL8K is not set +# CONFIG_ATH_CARDS is not set +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +# CONFIG_BRCMFMAC is not set +# CONFIG_HOSTAP is not set +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +CONFIG_IWLWIFI=m +CONFIG_IWLDVM=m + +# +# Debugging Options +# +# CONFIG_IWLWIFI_DEBUG is not set +CONFIG_IWLWIFI_P2P=y +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +# CONFIG_LIBERTAS is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_RT2X00 is not set +# CONFIG_RTL8192CE is not set +# CONFIG_RTL8192SE is not set +# CONFIG_RTL8192DE is not set +# CONFIG_RTL8723AE is not set +# CONFIG_RTL8192CU is not set +# CONFIG_WL_TI is not set +# CONFIG_ZD1211RW is not set +# CONFIG_MWIFIEX is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_VMXNET3 is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set +# CONFIG_INPUT_MATRIXKMAP is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=m +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=32 +CONFIG_SERIAL_NONSTANDARD=y +# CONFIG_ROCKETPORT is not set +# CONFIG_CYCLADES is not set +# CONFIG_MOXA_INTELLIO is not set +# CONFIG_MOXA_SMARTIO is not set +# CONFIG_SYNCLINK is not set +# CONFIG_SYNCLINKMP is not set +# CONFIG_SYNCLINK_GT is not set +# CONFIG_NOZOMI is not set +# CONFIG_ISI is not set +# CONFIG_N_HDLC is not set +# CONFIG_N_GSM is not set +# CONFIG_TRACE_SINK is not set +CONFIG_DEVKMEM=y +# CONFIG_STALDRV is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +# CONFIG_SERIAL_8250_PNP is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_NR_UARTS=8 +CONFIG_SERIAL_8250_RUNTIME_UARTS=2 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_8250_DETECT_IRQ=y +CONFIG_SERIAL_8250_RSA=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_MFD_HSU is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_TIMBERDALE is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_CLN_UART is not set +# CONFIG_SERIAL_PCH_UART is not set +# CONFIG_SERIAL_ARC is not set +# CONFIG_TTY_PRINTK is not set +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +CONFIG_RTC=y +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_SONYPI is not set +# CONFIG_MWAVE is not set +# CONFIG_PC8736x_GPIO is not set +# CONFIG_NSC_GPIO is not set +# CONFIG_RAW_DRIVER is not set +CONFIG_HPET=y +# CONFIG_HPET_MMAP is not set +# CONFIG_HANGCHECK_TIMER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_TELCLOCK is not set +CONFIG_DEVPORT=y +CONFIG_I2C=m +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=m +# CONFIG_I2C_MUX is not set +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# ACPI drivers +# +# CONFIG_I2C_SCMI is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CBUS_GPIO is not set +# CONFIG_I2C_EG20T is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_INTEL_MID is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_PXA_PCI is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_SCx200_ACB is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +CONFIG_SPI=y +CONFIG_SPI_DEBUG=y +CONFIG_GEN3_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +CONFIG_SPI_BITBANG=y +CONFIG_SPI_GPIO=y +# CONFIG_SPI_OC_TINY is not set +CONFIG_SPI_PXA2XX=m +CONFIG_SPI_PXA2XX_PCI=m +# CONFIG_SPI_CE5XX_SPI_SLAVE is not set +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_TOPCLIFF_PCH is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_LPC_SCH is not set + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=m +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_HSI is not set + +# +# PPS support +# +CONFIG_PPS=m +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=m + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +CONFIG_PTP_1588_CLOCK_PCH=m +CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_ACPI=y +# CONFIG_DEBUG_GPIO is not set +CONFIG_GPIO_SYSFS=y + +# +# Memory mapped GPIO drivers: +# +# CONFIG_GPIO_GENERIC_PLATFORM is not set +# CONFIG_GPIO_IT8761E is not set +# CONFIG_GPIO_TS5500 is not set +CONFIG_GPIO_SCH=m +# CONFIG_GPIO_ICH is not set +# CONFIG_GPIO_VX855 is not set + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_ADP5588 is not set + +# +# PCI GPIO expanders: +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_AMD8111 is not set +# CONFIG_GPIO_LANGWELL is not set +# CONFIG_GPIO_PCH is not set +# CONFIG_GPIO_ML_IOH is not set +# CONFIG_GPIO_RDC321X is not set + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_74X164 is not set + +# +# AC97 GPIO expanders: +# + +# +# MODULbus GPIO expanders: +# + +# +# USB GPIO expanders: +# +# CONFIG_W1 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_TEST_POWER is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_SBS is not set +# CONFIG_BATTERY_BQ27x00 is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_POWER_RESET is not set +# CONFIG_POWER_AVS is not set +# CONFIG_HWMON is not set +CONFIG_THERMAL=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_FAIR_SHARE is not set +CONFIG_STEP_WISE=y +# CONFIG_USER_SPACE is not set +# CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y + +# +# Broadcom specific AMBA +# +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_STMPE is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CS5535 is not set +# CONFIG_MFD_TIMBERDALE is not set +CONFIG_CY8C9540A=m +CONFIG_INTEL_CLN_GIP=m +CONFIG_LPC_SCH=y +# CONFIG_LPC_ICH is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_REGULATOR is not set +CONFIG_MEDIA_SUPPORT=m + +# +# Multimedia core support +# +CONFIG_MEDIA_CAMERA_SUPPORT=y +# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set +# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set +# CONFIG_MEDIA_RADIO_SUPPORT is not set +# CONFIG_MEDIA_RC_SUPPORT is not set +# CONFIG_MEDIA_CONTROLLER is not set +CONFIG_VIDEO_DEV=m +CONFIG_VIDEO_V4L2=m +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_VIDEOBUF2_CORE=m +CONFIG_VIDEOBUF2_MEMOPS=m +CONFIG_VIDEOBUF2_VMALLOC=m + +# +# Media drivers +# +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +# CONFIG_USB_GSPCA is not set +# CONFIG_USB_PWC is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +# CONFIG_USB_SN9C102 is not set + +# +# Webcam, TV (analog/digital) USB devices +# +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set +# CONFIG_V4L_PLATFORM_DRIVERS is not set +# CONFIG_V4L_MEM2MEM_DRIVERS is not set +# CONFIG_V4L_TEST_DRIVERS is not set + +# +# Supported MMC/SDIO adapters +# +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set + +# +# Media ancillary drivers (tuners, sensors, i2c, frontends) +# + +# +# Encoders, decoders, sensors and other helper chips +# + +# +# Audio decoders, processors and mixers +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set + +# +# Video decoders +# +# CONFIG_VIDEO_ADV7180 is not set +# CONFIG_VIDEO_ADV7183 is not set +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_SAA7191 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_TVP7002 is not set +# CONFIG_VIDEO_VPX3220 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_CX25840 is not set + +# +# MPEG video encoders +# +# CONFIG_VIDEO_CX2341X is not set + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_ADV7343 is not set +# CONFIG_VIDEO_ADV7393 is not set +# CONFIG_VIDEO_AK881X is not set + +# +# Camera sensor devices +# +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_VS6624 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_TCM825X is not set +# CONFIG_VIDEO_SR030PC30 is not set + +# +# Flash devices +# + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set + +# +# Miscelaneous helper chips +# +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_M52790 is not set + +# +# Sensors used on soc_camera driver +# + +# +# Customise DVB Frontends +# +# CONFIG_DVB_AU8522_V4L is not set +# CONFIG_DVB_TUNER_DIB0070 is not set +# CONFIG_DVB_TUNER_DIB0090 is not set + +# +# Tools to develop new frontends +# +# CONFIG_DVB_DUMMY_FE is not set + +# +# Graphics support +# +# CONFIG_AGP is not set +# CONFIG_VGA_ARB is not set +# CONFIG_VGA_SWITCHEROO is not set +# CONFIG_DRM is not set +# CONFIG_STUB_POULSBO is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_EXYNOS_VIDEO is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_SOUND=m +# CONFIG_SOUND_OSS_CORE is not set +CONFIG_SND=m +CONFIG_SND_TIMER=m +CONFIG_SND_PCM=m +CONFIG_SND_HWDEP=m +CONFIG_SND_RAWMIDI=m +# CONFIG_SND_SEQUENCER is not set +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_RTCTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +CONFIG_SND_DMA_SGBUF=y +# CONFIG_SND_RAWMIDI_SEQ is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_PCI=y +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ALS300 is not set +# CONFIG_SND_ALS4000 is not set +# CONFIG_SND_ALI5451 is not set +# CONFIG_SND_ASIHPI is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +# CONFIG_SND_AZT3328 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_CS5530 is not set +# CONFIG_SND_CS5535AUDIO is not set +# CONFIG_SND_CTXFI is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_INDIGOIOX is not set +# CONFIG_SND_INDIGODJX is not set +# CONFIG_SND_EMU10K1 is not set +# CONFIG_SND_EMU10K1X is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_ES1938 is not set +# CONFIG_SND_ES1968 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDA_INTEL is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_ICE1712 is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_LOLA is not set +# CONFIG_SND_LX6464ES is not set +# CONFIG_SND_MAESTRO3 is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SIS7019 is not set +# CONFIG_SND_SONICVIBES is not set +# CONFIG_SND_TRIDENT is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_USX2Y is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_US122L is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_SOC is not set +# CONFIG_SOUND_PRIME is not set + +# +# HID support +# +CONFIG_HID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +# CONFIG_HIDRAW is not set +# CONFIG_UHID is not set +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_ACRUX is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_AUREAL is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LENOVO_TPKBD is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +# CONFIG_HID_MULTITOUCH is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_PS3REMOTE is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set + +# +# USB HID support +# +CONFIG_USB_HID=m +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB_ARCH_HAS_XHCI=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=m +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=m +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_DWC3 is not set +# CONFIG_USB_MON is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_XHCI_HCD is not set +CONFIG_USB_EHCI_HCD=m +# CONFIG_USB_EHCI_ROOT_HUB_TT is not set +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=m +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +CONFIG_USB_OHCI_HCD=m +# CONFIG_USB_OHCI_HCD_PLATFORM is not set +# CONFIG_USB_EHCI_HCD_PLATFORM is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_UHCI_HCD=m +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_CHIPIDEA is not set +# CONFIG_USB_RENESAS_USBHS is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=m +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=m +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=m +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP210X is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +# CONFIG_USB_SERIAL_FTDI_SIO is not set +# CONFIG_USB_SERIAL_FUNSOFT is not set +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_F81232 is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_METRO is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MOTOROLA is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +CONFIG_USB_SERIAL_PL2303=m +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_QCAUX is not set +# CONFIG_USB_SERIAL_QUALCOMM is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_HP4X is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIEMENS_MPI is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +# CONFIG_USB_SERIAL_OPTION is not set +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set +# CONFIG_USB_SERIAL_ZIO is not set +# CONFIG_USB_SERIAL_ZTE is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_QT2 is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +# CONFIG_USB_EZUSB_FX2 is not set + +# +# USB Physical Layer drivers +# +# CONFIG_USB_ISP1301 is not set +# CONFIG_USB_RCAR_PHY is not set +CONFIG_USB_GADGET=m +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 + +# +# USB Peripheral Controller +# +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_M66592 is not set +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +CONFIG_USB_EG20T=m +# CONFIG_USB_DUMMY_HCD is not set +CONFIG_USB_LIBCOMPOSITE=m +CONFIG_USB_ZERO=m +# CONFIG_USB_AUDIO is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_ETH_EEM is not set +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_G_SERIAL=m +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_ACM_MS is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set +# CONFIG_USB_G_WEBCAM is not set + +# +# OTG and related infrastructure +# +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_UWB is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set +# CONFIG_MMC_CLKGATE is not set + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=8 +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PCI=y +# CONFIG_MMC_RICOH_MMC is not set +# CONFIG_MMC_SDHCI_ACPI is not set +CONFIG_MMC_SDHCI_PLTFM=y +# CONFIG_MMC_WBSD is not set +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=m + +# +# LED drivers +# +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_PCA9532 is not set +# CONFIG_LEDS_GPIO is not set +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP5521 is not set +# CONFIG_LEDS_LP5523 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA9633 is not set +# CONFIG_LEDS_DAC124S085 is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_OT200 is not set +# CONFIG_LEDS_BLINKM is not set +CONFIG_LEDS_TRIGGERS=y + +# +# LED Triggers +# +# CONFIG_LEDS_TRIGGER_TIMER is not set +# CONFIG_LEDS_TRIGGER_ONESHOT is not set +# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set +# CONFIG_LEDS_TRIGGER_CPU is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_LEDS_TRIGGER_TRANSIENT is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +# CONFIG_EDAC is not set +# CONFIG_RTC_CLASS is not set +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_INTEL_MID_DMAC=m +CONFIG_INTEL_MID_PCI=m +CONFIG_INTEL_CLN_DMAC=m +# CONFIG_INTEL_IOATDMA is not set +# CONFIG_TIMB_DMA is not set +# CONFIG_PCH_DMA is not set +CONFIG_DMA_ENGINE=y + +# +# DMA Clients +# +# CONFIG_NET_DMA is not set +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set +# CONFIG_AUXDISPLAY is not set +CONFIG_UIO=m +# CONFIG_UIO_CIF is not set +# CONFIG_UIO_PDRV is not set +# CONFIG_UIO_PDRV_GENIRQ is not set +# CONFIG_UIO_DMEM_GENIRQ is not set +# CONFIG_UIO_AEC is not set +# CONFIG_UIO_SERCOS3 is not set +# CONFIG_UIO_PCI_GENERIC is not set +# CONFIG_UIO_NETX is not set + +# +# Virtio drivers +# +# CONFIG_VIRTIO_PCI is not set +# CONFIG_VIRTIO_MMIO is not set + +# +# Microsoft Hyper-V guest support +# +# CONFIG_HYPERV is not set +CONFIG_STAGING=y +# CONFIG_ET131X is not set +# CONFIG_SLICOSS is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_W35UND is not set +# CONFIG_PRISM2_USB is not set +# CONFIG_ECHO is not set +# CONFIG_COMEDI is not set +# CONFIG_ASUS_OLED is not set +# CONFIG_R8187SE is not set +# CONFIG_RTL8192U is not set +# CONFIG_RTLLIB is not set +# CONFIG_R8712U is not set +# CONFIG_RTS5139 is not set +# CONFIG_TRANZPORT is not set +# CONFIG_LINE6_USB is not set +# CONFIG_USB_SERIAL_QUATECH2 is not set +# CONFIG_VT6655 is not set +# CONFIG_VT6656 is not set +# CONFIG_DX_SEP is not set + +# +# IIO staging drivers +# +# CONFIG_IIO_SW_RING is not set + +# +# Accelerometers +# +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16203 is not set +# CONFIG_ADIS16204 is not set +# CONFIG_ADIS16209 is not set +# CONFIG_ADIS16220 is not set +# CONFIG_ADIS16240 is not set +# CONFIG_KXSD9 is not set +# CONFIG_LIS3L02DQ is not set +# CONFIG_SCA3000 is not set + +# +# Analog to digital converters +# +# CONFIG_AD7291 is not set +# CONFIG_AD7606 is not set +# CONFIG_AD799X is not set +# CONFIG_AD7780 is not set +# CONFIG_AD7816 is not set +# CONFIG_AD7192 is not set +# CONFIG_ADT7410 is not set +# CONFIG_AD7280 is not set +CONFIG_MAX78M6610_LMU=m + +# +# Analog digital bi-direction converters +# +# CONFIG_ADT7316 is not set + +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7152 is not set +# CONFIG_AD7746 is not set + +# +# Direct Digital Synthesis +# +# CONFIG_AD5930 is not set +# CONFIG_AD9832 is not set +# CONFIG_AD9834 is not set +# CONFIG_AD9850 is not set +# CONFIG_AD9852 is not set +# CONFIG_AD9910 is not set +# CONFIG_AD9951 is not set + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16060 is not set +# CONFIG_ADIS16080 is not set +# CONFIG_ADIS16130 is not set +# CONFIG_ADIS16260 is not set +# CONFIG_ADXRS450 is not set + +# +# Network Analyzer, Impedance Converters +# +# CONFIG_AD5933 is not set + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set + +# +# Light sensors +# +# CONFIG_SENSORS_ISL29018 is not set +# CONFIG_SENSORS_ISL29028 is not set +# CONFIG_SENSORS_TSL2563 is not set +# CONFIG_TSL2583 is not set +# CONFIG_TSL2x7x is not set + +# +# Magnetometer sensors +# +# CONFIG_SENSORS_AK8975 is not set +# CONFIG_SENSORS_HMC5843 is not set + +# +# Active energy metering IC +# +# CONFIG_ADE7753 is not set +# CONFIG_ADE7754 is not set +# CONFIG_ADE7758 is not set +# CONFIG_ADE7759 is not set +# CONFIG_ADE7854 is not set + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# CONFIG_AD2S1210 is not set + +# +# Triggers - standalone +# +# CONFIG_IIO_GPIO_TRIGGER is not set +CONFIG_IIO_SYSFS_TRIGGER=m +# CONFIG_IIO_SIMPLE_DUMMY is not set +# CONFIG_ZSMALLOC is not set +# CONFIG_CRYSTALHD is not set +# CONFIG_ACPI_QUICKSTART is not set +# CONFIG_USB_ENESTORAGE is not set +# CONFIG_BCM_WIMAX is not set +# CONFIG_FT1000 is not set + +# +# Speakup console speech +# +# CONFIG_SPEAKUP is not set +# CONFIG_TOUCHSCREEN_CLEARPAD_TM1217 is not set +# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set +# CONFIG_STAGING_MEDIA is not set + +# +# Android +# +# CONFIG_ANDROID is not set +# CONFIG_USB_WPAN_HCD is not set +# CONFIG_WIMAX_GDM72XX is not set +# CONFIG_CSR_WIFI is not set +# CONFIG_NET_VENDOR_SILICOM is not set +# CONFIG_CED1401 is not set +# CONFIG_DGRP is not set +# CONFIG_SB105X is not set +CONFIG_X86_PLATFORM_DEVICES=y +# CONFIG_ACERHDF is not set +# CONFIG_ASUS_LAPTOP is not set +# CONFIG_FUJITSU_TABLET is not set +# CONFIG_AMILO_RFKILL is not set +# CONFIG_HP_ACCEL is not set +# CONFIG_SONY_LAPTOP is not set +# CONFIG_THINKPAD_ACPI is not set +# CONFIG_SENSORS_HDAPS is not set +# CONFIG_INTEL_MENLOW is not set +# CONFIG_ACPI_WMI is not set +# CONFIG_TOPSTAR_LAPTOP is not set +# CONFIG_TOSHIBA_BT_RFKILL is not set +# CONFIG_ACPI_CMPC is not set +CONFIG_INTEL_CLN_ESRAM=y +CONFIG_INTEL_CLN_ECC_REFRESH_PERIOD=24 +CONFIG_INTEL_CLN_ECC_SCRUB=y +# CONFIG_INTEL_CLN_ECC_SCRUB_OVERRIDE_CONFIG is not set +# CONFIG_INTEL_CLN_ECC_SCRUB_S3_CONFIG is not set +CONFIG_INTEL_CLN_THERMAL=y +CONFIG_INTEL_CLN_AUDIO_CTRL=m +# CONFIG_INTEL_IPS is not set +# CONFIG_IBM_RTL is not set +# CONFIG_XO15_EBOOK is not set + +# +# Hardware Spinlock drivers +# +CONFIG_CLKSRC_I8253=y +CONFIG_CLKEVT_I8253=y +CONFIG_CLKBLD_I8253=y +# CONFIG_IOMMU_SUPPORT is not set + +# +# Remoteproc drivers (EXPERIMENTAL) +# +# CONFIG_STE_MODEM_RPROC is not set + +# +# Rpmsg drivers (EXPERIMENTAL) +# +# CONFIG_VIRT_DRIVERS is not set +# CONFIG_PM_DEVFREQ is not set +# CONFIG_EXTCON is not set +# CONFIG_MEMORY is not set +CONFIG_IIO=m +CONFIG_IIO_BUFFER=y +CONFIG_IIO_BUFFER_CB=y +CONFIG_IIO_KFIFO_BUF=m +CONFIG_IIO_TRIGGERED_BUFFER=m +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 + +# +# Accelerometers +# +CONFIG_IIO_LIS331DLH_INTEL_CLN=m + +# +# Analog to digital converters +# +# CONFIG_AD7266 is not set +CONFIG_AD7298=m +# CONFIG_AD7791 is not set +# CONFIG_AD7793 is not set +# CONFIG_AD7476 is not set +# CONFIG_AD7887 is not set +# CONFIG_MAX1363 is not set +# CONFIG_TI_ADC081C is not set + +# +# Amplifiers +# +# CONFIG_AD8366 is not set + +# +# STMicro sensors +# +CONFIG_IIO_ST_SENSORS_I2C=m +CONFIG_IIO_ST_SENSORS_SPI=m +CONFIG_IIO_ST_SENSORS_CORE=m + +# +# Digital to analog converters +# +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5624R_SPI is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5755 is not set +# CONFIG_AD5764 is not set +# CONFIG_AD5791 is not set +# CONFIG_AD5686 is not set +# CONFIG_MAX517 is not set +# CONFIG_MCP4725 is not set + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16136 is not set + +# +# Inertial measurement units +# +# CONFIG_ADIS16480 is not set + +# +# Light sensors +# +# CONFIG_ADJD_S311 is not set +# CONFIG_VCNL4000 is not set + +# +# Magnetometer sensors +# +# CONFIG_VME_BUS is not set +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +# CONFIG_IPACK_BUS is not set + +# +# Firmware Drivers +# +# CONFIG_EDD is not set +CONFIG_FIRMWARE_MEMMAP=y +CONFIG_EFI_VARS=m +# CONFIG_DELL_RBU is not set +# CONFIG_DCDBAS is not set +# CONFIG_ISCSI_IBFT_FIND is not set +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set +CONFIG_EXT3_FS_XATTR=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +# CONFIG_EXT4_FS is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_FANOTIFY is not set +# CONFIG_QUOTA is not set +# CONFIG_QUOTACTL is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set +CONFIG_GENERIC_ACL=y + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_XATTR=y +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +# CONFIG_CONFIGFS_FS is not set +# CONFIG_MISC_FILESYSTEMS is not set +CONFIG_NETWORK_FILESYSTEMS=y +# CONFIG_NFS_FS is not set +# CONFIG_NFSD is not set +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +# CONFIG_NLS_UTF8 is not set + +# +# Kernel hacking +# +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_PRINTK_TIME=y +CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 +# CONFIG_ENABLE_WARN_DEPRECATED is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +CONFIG_HEADERS_CHECK=y +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +# CONFIG_LOCKUP_DETECTOR is not set +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +# CONFIG_DETECT_HUNG_TASK is not set +# CONFIG_SCHED_DEBUG is not set +# CONFIG_SCHEDSTATS is not set +CONFIG_TIMER_STATS=y +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +CONFIG_DEBUG_LOCK_ALLOC=y +CONFIG_PROVE_LOCKING=y +# CONFIG_PROVE_RCU is not set +# CONFIG_SPARSE_RCU_POINTER is not set +CONFIG_LOCKDEP=y +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_LOCKDEP is not set +CONFIG_TRACE_IRQFLAGS=y +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +CONFIG_STACKTRACE=y +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_HIGHMEM is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_VIRTUAL is not set +# CONFIG_DEBUG_WRITECOUNT is not set +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_DEBUG_LIST is not set +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_CREDENTIALS is not set +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_TRACE is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# CONFIG_LKDTM is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +# CONFIG_DEBUG_PAGEALLOC is not set +CONFIG_USER_STACKTRACE_SUPPORT=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST=y +CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set +# CONFIG_BUILD_DOCSRC is not set +# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_HAVE_ARCH_KMEMCHECK=y +# CONFIG_KMEMCHECK is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_STRICT_DEVMEM is not set +CONFIG_X86_VERBOSE_BOOTUP=y +CONFIG_EARLY_PRINTK=y +# CONFIG_EARLY_PRINTK_DBGP is not set +CONFIG_DEBUG_STACKOVERFLOW=y +CONFIG_X86_PTDUMP=y +CONFIG_DEBUG_RODATA=y +# CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_DEBUG_SET_MODULE_RONX=y +# CONFIG_DEBUG_NX_TEST is not set +# CONFIG_DOUBLEFAULT is not set +# CONFIG_IOMMU_STRESS is not set +CONFIG_HAVE_MMIOTRACE_SUPPORT=y +CONFIG_IO_DELAY_TYPE_0X80=0 +CONFIG_IO_DELAY_TYPE_0XED=1 +CONFIG_IO_DELAY_TYPE_UDELAY=2 +CONFIG_IO_DELAY_TYPE_NONE=3 +CONFIG_IO_DELAY_0X80=y +# CONFIG_IO_DELAY_0XED is not set +# CONFIG_IO_DELAY_UDELAY is not set +# CONFIG_IO_DELAY_NONE is not set +CONFIG_DEFAULT_IO_DELAY_TYPE=0 +CONFIG_DEBUG_BOOT_PARAMS=y +# CONFIG_CPA_DEBUG is not set +CONFIG_OPTIMIZE_INLINING=y +# CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set +# CONFIG_DEBUG_NMI_SELFTEST is not set + +# +# Security options +# +CONFIG_KEYS=y +# CONFIG_ENCRYPTED_KEYS is not set +CONFIG_KEYS_DEBUG_PROC_KEYS=y +# CONFIG_SECURITY_DMESG_RESTRICT is not set +CONFIG_SECURITY=y +# CONFIG_SECURITYFS is not set +CONFIG_SECURITY_NETWORK=y +# CONFIG_SECURITY_NETWORK_XFRM is not set +# CONFIG_SECURITY_PATH is not set +# CONFIG_SECURITY_SMACK is not set +# CONFIG_SECURITY_TOMOYO is not set +# CONFIG_SECURITY_APPARMOR is not set +# CONFIG_SECURITY_YAMA is not set +# CONFIG_IMA is not set +# CONFIG_EVM is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=m +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=m +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_PCOMP2=y +CONFIG_CRYPTO_MANAGER=m +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +CONFIG_CRYPTO_WORKQUEUE=y +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32C_INTEL is not set +# CONFIG_CRYPTO_GHASH is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +CONFIG_CRYPTO_SHA256=m +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_586 is not set +# CONFIG_CRYPTO_AES_NI_INTEL is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=m +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SALSA20_586 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_SERPENT_SSE2_586 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_TWOFISH_586 is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_ZLIB is not set +# CONFIG_CRYPTO_LZO is not set + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=m +# CONFIG_CRYPTO_USER_API_HASH is not set +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_PADLOCK is not set +# CONFIG_CRYPTO_DEV_GEODE is not set +# CONFIG_ASYMMETRIC_KEY_TYPE is not set +CONFIG_HAVE_KVM=y +# CONFIG_VIRTUALIZATION is not set +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IO=y +CONFIG_PERCPU_RWSEM=y +CONFIG_CRC_CCITT=m +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +# CONFIG_CRC8 is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=m +# CONFIG_XZ_DEC is not set +# CONFIG_XZ_DEC_BCJ is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_DQL=y +CONFIG_NLATTR=y +CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y +CONFIG_AVERAGE=y +# CONFIG_CORDIC is not set +# CONFIG_DDR is not set diff --git a/recipes-kernel/linux/files/clanton.patch b/recipes-kernel/linux/files/clanton.patch new file mode 100644 index 0000000..437b591 --- /dev/null +++ b/recipes-kernel/linux/files/clanton.patch @@ -0,0 +1,30644 @@ +diff --git a/.gitignore b/.gitignore +index 3b8b9b3..3557999 100644 +--- a/.gitignore ++++ b/.gitignore +@@ -64,11 +64,11 @@ include/generated + arch/*/include/generated + + # stgit generated dirs +-patches-* ++#patches-* + + # quilt's files +-patches +-series ++#patches ++#series + + # cscope files + cscope.* +diff --git a/Documentation/ABI/testing/sysfs-class-pwm b/Documentation/ABI/testing/sysfs-class-pwm +new file mode 100644 +index 0000000..c479d77 +--- /dev/null ++++ b/Documentation/ABI/testing/sysfs-class-pwm +@@ -0,0 +1,79 @@ ++What: /sys/class/pwm/ ++Date: May 2013 ++KernelVersion: 3.11 ++Contact: H Hartley Sweeten <hsweeten@visionengravers.com> ++Description: ++ The pwm/ class sub-directory belongs to the Generic PWM ++ Framework and provides a sysfs interface for using PWM ++ channels. ++ ++What: /sys/class/pwm/pwmchipN/ ++Date: May 2013 ++KernelVersion: 3.11 ++Contact: H Hartley Sweeten <hsweeten@visionengravers.com> ++Description: ++ A /sys/class/pwm/pwmchipN directory is created for each ++ probed PWM controller/chip where N is the base of the ++ PWM chip. ++ ++What: /sys/class/pwm/pwmchipN/npwm ++Date: May 2013 ++KernelVersion: 3.11 ++Contact: H Hartley Sweeten <hsweeten@visionengravers.com> ++Description: ++ The number of PWM channels supported by the PWM chip. ++ ++What: /sys/class/pwm/pwmchipN/export ++Date: May 2013 ++KernelVersion: 3.11 ++Contact: H Hartley Sweeten <hsweeten@visionengravers.com> ++Description: ++ Exports a PWM channel from the PWM chip for sysfs control. ++ Value is between 0 and /sys/class/pwm/pwmchipN/npwm - 1. ++ ++What: /sys/class/pwm/pwmchipN/unexport ++Date: May 2013 ++KernelVersion: 3.11 ++Contact: H Hartley Sweeten <hsweeten@visionengravers.com> ++Description: ++ Unexports a PWM channel. ++ ++What: /sys/class/pwm/pwmchipN/pwmX ++Date: May 2013 ++KernelVersion: 3.11 ++Contact: H Hartley Sweeten <hsweeten@visionengravers.com> ++Description: ++ A /sys/class/pwm/pwmchipN/pwmX directory is created for ++ each exported PWM channel where X is the exported PWM ++ channel number. ++ ++What: /sys/class/pwm/pwmchipN/pwmX/period ++Date: May 2013 ++KernelVersion: 3.11 ++Contact: H Hartley Sweeten <hsweeten@visionengravers.com> ++Description: ++ Sets the PWM signal period in nanoseconds. ++ ++What: /sys/class/pwm/pwmchipN/pwmX/duty_cycle ++Date: May 2013 ++KernelVersion: 3.11 ++Contact: H Hartley Sweeten <hsweeten@visionengravers.com> ++Description: ++ Sets the PWM signal duty cycle in nanoseconds. ++ ++What: /sys/class/pwm/pwmchipN/pwmX/polarity ++Date: May 2013 ++KernelVersion: 3.11 ++Contact: H Hartley Sweeten <hsweeten@visionengravers.com> ++Description: ++ Sets the output polarity of the PWM signal to "normal" or ++ "inversed". ++ ++What: /sys/class/pwm/pwmchipN/pwmX/enable ++Date: May 2013 ++KernelVersion: 3.11 ++Contact: H Hartley Sweeten <hsweeten@visionengravers.com> ++Description: ++ Enable/disable the PWM signal. ++ 0 is disabled ++ 1 is enabled +diff --git a/Documentation/pwm.txt b/Documentation/pwm.txt +index 7d2b4c9..1039b68 100644 +--- a/Documentation/pwm.txt ++++ b/Documentation/pwm.txt +@@ -45,6 +45,43 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns); + + To start/stop toggling the PWM output use pwm_enable()/pwm_disable(). + ++Using PWMs with the sysfs interface ++----------------------------------- ++ ++If CONFIG_SYSFS is enabled in your kernel configuration a simple sysfs ++interface is provided to use the PWMs from userspace. It is exposed at ++/sys/class/pwm/. Each probed PWM controller/chip will be exported as ++pwmchipN, where N is the base of the PWM chip. Inside the directory you ++will find: ++ ++npwm - The number of PWM channels this chip supports (read-only). ++ ++export - Exports a PWM channel for use with sysfs (write-only). ++ ++unexport - Unexports a PWM channel from sysfs (write-only). ++ ++The PWM channels are numbered using a per-chip index from 0 to npwm-1. ++ ++When a PWM channel is exported a pwmX directory will be created in the ++pwmchipN directory it is associated with, where X is the number of the ++channel that was exported. The following properties will then be available: ++ ++period - The total period of the PWM signal (read/write). ++ Value is in nanoseconds and is the sum of the active and inactive ++ time of the PWM. ++ ++duty_cycle - The active time of the PWM signal (read/write). ++ Value is in nanoseconds and must be less than the period. ++ ++polarity - Changes the polarity of the PWM signal (read/write). ++ Writes to this property only work if the PWM chip supports changing ++ the polarity. The polarity can only be changed if the PWM is not ++ enabled. Value is the string "normal" or "inversed". ++ ++enable - Enable/disable the PWM signal (read/write). ++ 0 - disabled ++ 1 - enabled ++ + Implementing a PWM driver + ------------------------- + +diff --git a/Documentation/usb/linux-cdc-acm.inf b/Documentation/usb/linux-cdc-acm.inf +index f0ffc27..e56f074 100644 +--- a/Documentation/usb/linux-cdc-acm.inf ++++ b/Documentation/usb/linux-cdc-acm.inf +@@ -90,10 +90,10 @@ ServiceBinary=%12%\USBSER.sys + [SourceDisksFiles] + [SourceDisksNames] + [DeviceList] +-%DESCRIPTION%=DriverInstall, USB\VID_0525&PID_A4A7, USB\VID_1D6B&PID_0104&MI_02, USB\VID_1D6B&PID_0106&MI_00 ++%DESCRIPTION%=DriverInstall, USB\VID_0525&PID_A4A7, USB\VID_1D6B&PID_0104&MI_02, USB\VID_1D6B&PID_0106&MI_00, USB\VID_8086&PID_BABE + + [DeviceList.NTamd64] +-%DESCRIPTION%=DriverInstall, USB\VID_0525&PID_A4A7, USB\VID_1D6B&PID_0104&MI_02, USB\VID_1D6B&PID_0106&MI_00 ++%DESCRIPTION%=DriverInstall, USB\VID_0525&PID_A4A7, USB\VID_1D6B&PID_0104&MI_02, USB\VID_1D6B&PID_0106&MI_00, USB\VID_8086&PID_BABE + + + ;------------------------------------------------------------------------------ +diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig +index 0694d09..7509992 100644 +--- a/arch/x86/Kconfig ++++ b/arch/x86/Kconfig +@@ -417,6 +417,14 @@ config X86_INTEL_CE + This option compiles in support for the CE4100 SOC for settop + boxes and media devices. + ++config INTEL_QUARK_X1000_SOC ++ bool "Intel Quark X1000 SOC support" ++ depends on M586TSC ++ select ARCH_REQUIRE_GPIOLIB ++ ---help--- ++ Quark X1000 SOC support . This option enables probing for various ++ PCI-IDs of several on-chip devices provided by the X1000 ++ + config X86_WANT_INTEL_MID + bool "Intel MID platform support" + depends on X86_32 +@@ -500,6 +508,13 @@ config X86_SUPPORTS_MEMORY_FAILURE + depends on X86_64 || !SPARSEMEM + select ARCH_SUPPORTS_MEMORY_FAILURE + ++menu "Intel Media SOC Gen3 support" ++ ++config ARCH_GEN3 ++ bool "Enable Intel Media SOC Gen3 support" ++ default y ++ ++endmenu + config X86_VISWS + bool "SGI 320/540 (Visual Workstation)" + depends on X86_32 && PCI && X86_MPPARSE && PCI_GODIRECT +@@ -1524,6 +1539,13 @@ config EFI_STUB + + See Documentation/x86/efi-stub.txt for more information. + ++config EFI_CAPSULE ++ bool "EFI capsule update support" ++ depends on EFI ++ ---help--- ++ This kernel feature allows for loading of EFI capsule code ++ with callbacks into the EDK firmware to execute update ++ + config SECCOMP + def_bool y + prompt "Enable seccomp to safely compute untrusted bytecode" +diff --git a/arch/x86/include/asm/cln.h b/arch/x86/include/asm/cln.h +new file mode 100644 +index 0000000..4a5b0e3 +--- /dev/null ++++ b/arch/x86/include/asm/cln.h +@@ -0,0 +1,85 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++#ifndef _ASM_X86_CLN_H ++#define _ASM_X86_CLN_H ++ ++#include <linux/pci.h> ++#include <linux/msi.h> ++ ++/** ++ * cln_pci_pvm_mask ++ * ++ * Mask PVM bit on a per function basis. Clanton SC components have but one ++ * vector each - so we mask for what we need ++ */ ++static inline void cln_pci_pvm_mask(struct pci_dev * dev) ++{ ++ struct msi_desc *entry; ++ int mask_bits = 1; ++ ++ if(unlikely(dev->msi_enabled == 0)) ++ return; ++ ++ entry = list_first_entry(&dev->msi_list, struct msi_desc, list); ++ ++ if(unlikely(entry == NULL)) ++ return; ++ ++ pci_write_config_dword(dev, entry->mask_pos, mask_bits); ++} ++ ++/** ++ * cln_pci_pvm_mask ++ * ++ * UnMask PVM bit on a per function basis. Clanton SC components have but one ++ * vector each - so we unmask for what we need ++ */ ++static inline void cln_pci_pvm_unmask(struct pci_dev * dev) ++{ ++ struct msi_desc *entry; ++ int mask_bits = 0; ++ ++ if(unlikely(dev->msi_enabled == 0)) ++ return; ++ ++ entry = list_first_entry(&dev->msi_list, struct msi_desc, list); ++ ++ if(unlikely(entry == NULL)) ++ return; ++ ++ pci_write_config_dword(dev, entry->mask_pos, mask_bits); ++} ++ ++/* Convienence macros */ ++#if defined(CONFIG_INTEL_QUARK_X1000_SOC) ++ #define mask_pvm(x) cln_pci_pvm_mask(x) ++ #define unmask_pvm(x) cln_pci_pvm_unmask(x) ++#else ++ #define mask_pvm(x) ++ #define unmask_pvm(x) ++#endif ++ ++/* Serial */ ++#if defined(CONFIG_INTEL_QUARK_X1000_SOC) ++ #define SERIAL_PORT_DFNS ++ #define BASE_BAUD 2764800 ++#endif ++ ++#endif /* _ASM_X86_CLN_H */ +diff --git a/arch/x86/include/asm/imr.h b/arch/x86/include/asm/imr.h +new file mode 100644 +index 0000000..2c17eec +--- /dev/null ++++ b/arch/x86/include/asm/imr.h +@@ -0,0 +1,22 @@ ++/* ++ * imr.h: Intel Clanton platform imr setup code ++ * ++ * (C) Copyright 2012 Intel Corporation ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; version 2 ++ * of the License. ++ */ ++#ifndef _ASM_X86_IMR_H ++#define _ASM_X86_IMR_H ++ ++#if defined(CONFIG_INTEL_QUARK_X1000_SOC) ++ extern int intel_cln_imr_runt_setparams(void); ++ extern int intel_cln_imr_lockall(void); ++#else ++ static void intel_cln_imr_runt_setparams(void){} ++ static void intel_cln_imr_lockall(void){} ++#endif ++ ++#endif /* _ASM_X86_IMR_H */ +diff --git a/arch/x86/include/asm/serial.h b/arch/x86/include/asm/serial.h +index 628c801..3965f86 100644 +--- a/arch/x86/include/asm/serial.h ++++ b/arch/x86/include/asm/serial.h +@@ -1,6 +1,8 @@ + #ifndef _ASM_X86_SERIAL_H + #define _ASM_X86_SERIAL_H + ++#include <asm/cln.h> ++ + /* + * This assumes you have a 1.8432 MHz clock for your UART. + * +@@ -8,7 +10,9 @@ + * clock, since the 16550A is capable of handling a top speed of 1.5 + * megabits/second; but this requires the faster clock. + */ ++#ifndef BASE_BAUD + #define BASE_BAUD ( 1843200 / 16 ) ++#endif + + /* Standard COM flags (except for COM4, because of the 8514 problem) */ + #ifdef CONFIG_SERIAL_DETECT_IRQ +@@ -19,11 +23,13 @@ + #define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF + #endif + ++#ifndef SERIAL_PORT_DFNS + #define SERIAL_PORT_DFNS \ + /* UART CLK PORT IRQ FLAGS */ \ + { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \ + { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \ + { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \ + { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */ ++#endif + + #endif /* _ASM_X86_SERIAL_H */ +diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c +index fcaabd0..ea7624c 100644 +--- a/arch/x86/kernel/cpu/intel.c ++++ b/arch/x86/kernel/cpu/intel.c +@@ -143,6 +143,17 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) + setup_clear_cpu_cap(X86_FEATURE_ERMS); + } + } ++ ++ /* ++ * Quark X1000 PGE is advertised but not implemented. This matters since ++ * cpu_has_pge is used to determine the type of TLB flushing to do. With ++ * PGE not actually doing what it says on the tin writes to CR4.PGE do ++ * nothing when we should be re-writing CR3 like a 486 ++ */ ++ if (c->x86 == 5 && c->x86_model == 9){ ++ printk(KERN_INFO "Disabling PGE capability bit\n"); ++ setup_clear_cpu_cap(X86_FEATURE_PGE); ++ } + } + + #ifdef CONFIG_X86_32 +diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c +index 8b24289..c963186 100644 +--- a/arch/x86/kernel/setup.c ++++ b/arch/x86/kernel/setup.c +@@ -761,7 +761,10 @@ void __init setup_arch(char **cmdline_p) + KERNEL_PGD_PTRS); + + load_cr3(swapper_pg_dir); +- __flush_tlb_all(); ++ if (boot_cpu_data.x86 == 5 && boot_cpu_data.x86_model == 9) ++ __flush_tlb(); ++ else ++ __flush_tlb_all(); + #else + printk(KERN_INFO "Command line: %s\n", boot_command_line); + #endif +diff --git a/arch/x86/platform/efi/Makefile b/arch/x86/platform/efi/Makefile +index 6db1cc4..41ac17c 100644 +--- a/arch/x86/platform/efi/Makefile ++++ b/arch/x86/platform/efi/Makefile +@@ -1,2 +1,3 @@ + obj-$(CONFIG_EFI) += efi.o efi_$(BITS).o efi_stub_$(BITS).o +-obj-$(CONFIG_ACPI_BGRT) += efi-bgrt.o ++obj-$(CONFIG_ACPI_BGRT) += efi-bgrt.o ++obj-$(CONFIG_EFI_CAPSULE) += efi_capsule.o +diff --git a/arch/x86/platform/efi/efi-bgrt.c b/arch/x86/platform/efi/efi-bgrt.c +index d9c1b95..9fd5168 100644 +--- a/arch/x86/platform/efi/efi-bgrt.c ++++ b/arch/x86/platform/efi/efi-bgrt.c +@@ -24,19 +24,29 @@ struct bmp_header { + u32 size; + } __packed; + +-void efi_bgrt_init(void) ++bool __init efi_bgrt_probe(void) + { + acpi_status status; +- void __iomem *image; +- bool ioremapped = false; +- struct bmp_header bmp_header; + + if (acpi_disabled) +- return; ++ return false; + ++ bgrt_tab = NULL; + status = acpi_get_table("BGRT", 0, + (struct acpi_table_header **)&bgrt_tab); + if (ACPI_FAILURE(status)) ++ return false; ++ ++ return true; ++} ++ ++void __init efi_bgrt_init(void) ++{ ++ void __iomem *image; ++ bool ioremapped = false; ++ struct bmp_header bmp_header; ++ ++ if (acpi_disabled || bgrt_tab == NULL) + return; + + if (bgrt_tab->header.length < sizeof(*bgrt_tab)) +diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c +index e2cd38f..0e22b5f4 100644 +--- a/arch/x86/platform/efi/efi.c ++++ b/arch/x86/platform/efi/efi.c +@@ -847,6 +847,7 @@ void __init efi_enter_virtual_mode(void) + u64 end, systab, end_pfn; + void *p, *va, *new_memmap = NULL; + int count = 0; ++ bool bgrt_map; + + efi.systab = NULL; + +@@ -860,6 +861,11 @@ void __init efi_enter_virtual_mode(void) + return; + } + ++ /* ++ * Determine if mapping EFI boot code/data is required for BGRT mapping ++ */ ++ bgrt_map = efi_bgrt_probe(); ++ + /* Merge contiguous regions of the same type and attribute */ + for (p = memmap.map; p < memmap.map_end; p += memmap.desc_size) { + u64 prev_size; +@@ -889,9 +895,9 @@ void __init efi_enter_virtual_mode(void) + + for (p = memmap.map; p < memmap.map_end; p += memmap.desc_size) { + md = p; +- if (!(md->attribute & EFI_MEMORY_RUNTIME) && +- md->type != EFI_BOOT_SERVICES_CODE && +- md->type != EFI_BOOT_SERVICES_DATA) ++ if (!((md->attribute & EFI_MEMORY_RUNTIME) || (bgrt_map && ++ (md->type == EFI_BOOT_SERVICES_CODE || ++ md->type == EFI_BOOT_SERVICES_DATA)))) + continue; + + size = md->num_pages << EFI_PAGE_SHIFT; +diff --git a/arch/x86/platform/efi/efi_capsule.c b/arch/x86/platform/efi/efi_capsule.c +new file mode 100644 +index 0000000..d329d6d +--- /dev/null ++++ b/arch/x86/platform/efi/efi_capsule.c +@@ -0,0 +1,320 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#include <asm/cln.h> ++#include <linux/errno.h> ++#include <linux/init.h> ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/efi.h> ++ ++#define DRIVER_NAME "efi_capsule_update" ++#define PFX "efi-capsupdate: " ++#define MAX_PATH 256 ++#define MAX_CHUNK PAGE_SIZE ++#define CSH_HDR_SIZE 0x400 ++ ++typedef struct { ++ u64 length; ++ union { ++ u64 data_block; ++ u64 continuation_pointer; ++ }; ++} efi_blk_desc_t; ++ ++static struct kobject * efi_capsule_kobj; ++static struct list_head sg_list; ++static char fpath[MAX_PATH]; ++static int csh_jump = CSH_HDR_SIZE; /* Clanton EDK wants CSH jump */ ++ ++/** ++ * efi_capsule_trigger_update ++ * ++ * Trigger the EFI capsule update ++ */ ++static int efi_capsule_trigger_update(void) ++{ ++ struct file *fp = NULL; ++ mm_segment_t old_fs = get_fs(); ++ int ret = 0; ++ u32 nblocks = 0, i = 0, total_size = 0, data_len = 0, offset = 0; ++ efi_capsule_header_t *chdr = NULL; ++ efi_blk_desc_t * desc_block = NULL; ++ u8 ** data = NULL; ++ ++ set_fs (KERNEL_DS); ++ fp = filp_open(fpath, O_RDONLY, 0); ++ ++ /* Sanity check input */ ++ if (IS_ERR(fp)|| fp->f_op == NULL ||fp->f_op->read == NULL || ++ fp->f_dentry->d_inode->i_size == 0){ ++ pr_err(PFX"file open [%s] error!\n", fpath); ++ ret = -EINVAL; ++ goto done; ++ } ++ ++ /* Determine necessary sizes */ ++ nblocks = (fp->f_dentry->d_inode->i_size/MAX_CHUNK) + 2; ++ total_size = fp->f_dentry->d_inode->i_size; ++ ++ pr_info(PFX "nblocks %d total_size %d\n", nblocks, total_size); ++ ++ /* Allocate array of descriptor blocks + 1 for terminator */ ++ desc_block = (efi_blk_desc_t*)kzalloc(nblocks * sizeof(efi_blk_desc_t), GFP_KERNEL); ++ if (desc_block == NULL){ ++ pr_info(PFX"%s failed to allocate %d blocks\n", __func__, nblocks); ++ ret = -ENOMEM; ++ goto done_close; ++ } ++ ++ pr_info(PFX"File %s size %u descriptor blocks %u\n", ++ fpath, total_size, nblocks); ++ ++ data = kmalloc(nblocks, GFP_KERNEL); ++ if (data == NULL){ ++ ret = -ENOMEM; ++ pr_info("Failed to allocate %d bytes\n", nblocks); ++ goto done; ++ } ++ ++ for (i = 0; i < nblocks; i++){ ++ data[i] = kmalloc(MAX_CHUNK, GFP_KERNEL); ++ if (data[i] == NULL){ ++ ret = -ENOMEM; ++ pr_info("Alloc fail %d bytes entry %d\n", ++ nblocks, i); ++ goto done; ++ } ++ ++ } ++ ++ /* Read in data */ ++ for (i = 0; i < nblocks && offset < total_size; i++){ ++ /* Determine read len */ ++ data_len = offset < total_size - MAX_CHUNK ? ++ MAX_CHUNK : total_size - offset; ++ ret = fp->f_op->read(fp, data[i], data_len, &fp->f_pos); ++ if (ret < 0){ ++ pr_err(PFX"Error reading @ data %u\n", offset); ++ ret = -EIO; ++ goto done; ++ } ++ offset += data_len; ++ ++ /* Sanity check */ ++ if (i >= nblocks){ ++ pr_err(PFX"%s Driver bug line %d\n", __func__, __LINE__); ++ ret = -EINVAL; ++ goto done; ++ } ++ ++ /* Validate header as appropriate */ ++ if (chdr == NULL){ ++ chdr = (efi_capsule_header_t*)&data[i][csh_jump]; ++ desc_block[i].data_block = __pa(&data[i][csh_jump]); ++ desc_block[i].length = data_len - csh_jump; ++ pr_info(PFX"hdr offset in file %d bytes\n", csh_jump); ++ pr_info(PFX"hdr size %u flags 0x%08x imagesize 0x%08x\n", ++ chdr->headersize, chdr->flags, chdr->imagesize); ++ ++ }else{ ++ desc_block[i].data_block = __pa(&data[i][0]); ++ desc_block[i].length = data_len; ++ } ++ ++ pr_info(PFX "block %d length %u data @ phys 0x%08x\n", ++ i, (int)desc_block[i].length, ++ (unsigned int)desc_block[i].data_block); ++ } ++ ++ if (i > nblocks-1){ ++ pr_err(PFX"%s Used block %d expected %d !\n", __func__, i, nblocks-1); ++ ret = -EINVAL; ++ goto done; ++ } ++ ++ pr_info(PFX"submitting capsule to EDKII firmware\n"); ++ ++ ret = efi.update_capsule(&chdr, 1, __pa(desc_block)); ++ if(ret != EFI_SUCCESS) { ++ pr_err(PFX"submission fail err=0x%08x\n", ret); ++ }else{ ++ pr_info(PFX"submission success\n"); ++ ret = 0; ++ } ++ ++ if (chdr != NULL && chdr->flags & 0x10000){ ++ pr_info(PFX"capsule persist across S3 skipping capsule free\n"); ++ goto done_close; ++ } ++done: ++ for (i = 0; i < nblocks; i++){ ++ if (data && data[i]) ++ kfree(data[i]); ++ } ++ if (data) ++ kfree(data); ++ ++ if (desc_block != NULL) ++ kfree(desc_block); ++done_close: ++ if (!IS_ERR(fp)) ++ filp_close(fp, NULL); ++ ++ set_fs (old_fs); ++ return ret; ++} ++ ++/** ++ * efi_capsule_csh_jump ++ * ++ * sysfs callback used to show current path ++ */ ++static ssize_t efi_capsule_csh_jump_show(struct kobject *kobj, ++ struct kobj_attribute *attr, char *buf) ++{ ++ return snprintf(buf, sizeof(fpath), "%d\n", csh_jump > 0); ++} ++ ++/** ++ * efi_capsule_path_store ++ * ++ * sysfs callback used to set a new capsule path ++ */ ++static ssize_t efi_capsule_csh_jump_store(struct kobject *kobj, struct kobj_attribute *attr, ++ const char *buf, size_t count) ++{ ++ if (buf != NULL && buf[0] == '0') ++ csh_jump = 0; ++ else ++ csh_jump = CSH_HDR_SIZE; ++ return count; ++} ++ ++static struct kobj_attribute efi_capsule_csh_jump_attr = ++ __ATTR(csh_jump, 0644, efi_capsule_csh_jump_show, efi_capsule_csh_jump_store); ++ ++/** ++ * efi_capsule_path_show ++ * ++ * sysfs callback used to show current path ++ */ ++static ssize_t efi_capsule_path_show(struct kobject *kobj, ++ struct kobj_attribute *attr, char *buf) ++{ ++ return snprintf(buf, sizeof(fpath), fpath); ++} ++ ++/** ++ * efi_capsule_path_store ++ * ++ * sysfs callback used to set a new capsule path ++ */ ++static ssize_t efi_capsule_path_store(struct kobject *kobj, struct kobj_attribute *attr, ++ const char *buf, size_t count) ++{ ++ if (count > MAX_PATH-1) ++ return -EINVAL; ++ ++ memset(fpath, 0x00, sizeof(fpath)); ++ memcpy(fpath, buf, count); ++ ++ return count; ++} ++ ++static struct kobj_attribute efi_capsule_path_attr = ++ __ATTR(capsule_path, 0644, efi_capsule_path_show, efi_capsule_path_store); ++ ++/** ++ * efi_capsule_update_store ++ * ++ * sysfs callback used to initiate update ++ */ ++static ssize_t efi_capsule_update_store(struct kobject *kobj, struct kobj_attribute *attr, ++ const char *buf, size_t count) ++{ int ret = 0; ++ ++ ret = efi_capsule_trigger_update(); ++ return ret == 0 ? count : ret; ++} ++ ++static struct kobj_attribute efi_capsule_update_attr = ++ __ATTR(capsule_update, 0644, NULL, efi_capsule_update_store); ++ ++#define SYSFS_ERRTXT "Error adding sysfs entry!\n" ++/** ++ * intel_cln_capsule_update_init ++ * ++ * @return 0 success < 0 failure ++ * ++ * Module entry point ++ */ ++static int __init efi_capsule_update_init(void) ++{ ++ int retval = 0; ++ extern struct kobject * firmware_kobj; ++ ++ INIT_LIST_HEAD(&sg_list); ++ ++ /* efi_capsule_kobj subordinate of firmware @ /sys/firmware/efi */ ++ efi_capsule_kobj = kobject_create_and_add("efi", firmware_kobj); ++ if (!efi_capsule_kobj) { ++ pr_err(PFX"kset create error\n"); ++ retval = -ENODEV; ++ goto err; ++ } ++ ++ if(sysfs_create_file(efi_capsule_kobj, &efi_capsule_path_attr.attr)) { ++ pr_err(PFX SYSFS_ERRTXT); ++ retval = -ENODEV; ++ goto err; ++ } ++ if(sysfs_create_file(efi_capsule_kobj, &efi_capsule_update_attr.attr)) { ++ pr_err(PFX SYSFS_ERRTXT); ++ retval = -ENODEV; ++ goto err; ++ ++ } ++ if(sysfs_create_file(efi_capsule_kobj, &efi_capsule_csh_jump_attr.attr)) { ++ pr_err(PFX SYSFS_ERRTXT); ++ retval = -ENODEV; ++ goto err; ++ ++ } ++ ++err: ++ return retval; ++} ++ ++/** ++ * intel_cln_esram_exit ++ * ++ * Module exit ++ */ ++static void __exit efi_capsule_update_exit(void) ++{ ++} ++ ++MODULE_AUTHOR("Bryan O'Donoghue <bryan.odonoghue@intel.com>"); ++MODULE_DESCRIPTION("EFI Capsule Update driver"); ++MODULE_LICENSE("Dual BSD/GPL"); ++ ++module_init(efi_capsule_update_init); ++module_exit(efi_capsule_update_exit); +diff --git a/drivers/base/class.c b/drivers/base/class.c +index 03243d4..3ce8454 100644 +--- a/drivers/base/class.c ++++ b/drivers/base/class.c +@@ -420,8 +420,8 @@ EXPORT_SYMBOL_GPL(class_for_each_device); + * code. There's no locking restriction. + */ + struct device *class_find_device(struct class *class, struct device *start, +- void *data, +- int (*match)(struct device *, void *)) ++ const void *data, ++ int (*match)(struct device *, const void *)) + { + struct class_dev_iter iter; + struct device *dev; +diff --git a/drivers/base/core.c b/drivers/base/core.c +index a235085..dda0c7f 100644 +--- a/drivers/base/core.c ++++ b/drivers/base/core.c +@@ -1617,9 +1617,9 @@ struct device *device_create(struct class *class, struct device *parent, + } + EXPORT_SYMBOL_GPL(device_create); + +-static int __match_devt(struct device *dev, void *data) ++static int __match_devt(struct device *dev, const void *data) + { +- dev_t *devt = data; ++ const dev_t *devt = data; + + return dev->devt == *devt; + } +diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig +index d4c1218..955d8fe 100644 +--- a/drivers/dma/Kconfig ++++ b/drivers/dma/Kconfig +@@ -34,18 +34,46 @@ if DMADEVICES + comment "DMA Devices" + + config INTEL_MID_DMAC ++ tristate "Intel DMAC Moorsetown/Medfield/Clanton DMA controllers" ++ depends on X86 ++ default n ++ help ++ Enable support for the Intel(R) MID/Clanton DMA engine present ++ in Intel MID chipsets and Clanton SOC devices ++ ++ Say Y here if you have such a chipset. ++ ++ If unsure, say N. ++ ++if INTEL_MID_DMAC ++ ++config INTEL_MID_PCI + tristate "Intel MID DMA support for Peripheral DMA controllers" +- depends on PCI && X86 ++ depends on X86 && PCI + select DMA_ENGINE + default n + help + Enable support for the Intel(R) MID DMA engine present +- in Intel MID chipsets. ++ in Intel MID chipsets + + Say Y here if you have such a chipset. + + If unsure, say N. + ++config INTEL_CLN_DMAC ++ tristate "Intel CLN DMA support for Peripheral DMA controllers" ++ depends on PCI && X86 && INTEL_QUARK_X1000_SOC ++ default n ++ help ++ Enable support for the Intel(R) Clanton DMA engine present ++ in Intel Clanton DMA enabled UART. This is not a generic DMA ++ driver, instead this enables DMAC regs for Clanton's UART alone ++ ++ Say Y here if you have a Clanton processor. ++ ++ If unsure, say N. ++endif ++ + config ASYNC_TX_ENABLE_CHANNEL_SWITCH + bool + +diff --git a/drivers/dma/intel_mid_dma.c b/drivers/dma/intel_mid_dma.c +index a0de82e..91883c2 100644 +--- a/drivers/dma/intel_mid_dma.c ++++ b/drivers/dma/intel_mid_dma.c +@@ -30,9 +30,9 @@ + #include <linux/module.h> + + #include "dmaengine.h" ++#include "intel_mid_dma_regs.h" + + #define MAX_CHAN 4 /*max ch across controllers*/ +-#include "intel_mid_dma_regs.h" + + #define INTEL_MID_DMAC1_ID 0x0814 + #define INTEL_MID_DMAC2_ID 0x0813 +@@ -43,6 +43,14 @@ + #define LNW_PERIPHRAL_STATUS 0x0 + #define LNW_PERIPHRAL_MASK 0x8 + ++/** ++ * struct intel_mid_dma_probe_info ++ * ++ * @max_chan: maximum channels to probe ++ * @ch_base: offset from register base ++ * @block_size: TBD ++ * @pimr_mask: indicates if mask registers to be mapped ++ */ + struct intel_mid_dma_probe_info { + u8 max_chan; + u8 ch_base; +@@ -1015,7 +1023,7 @@ static void dma_tasklet2(unsigned long data) + * See if this is our interrupt if so then schedule the tasklet + * otherwise ignore + */ +-static irqreturn_t intel_mid_dma_interrupt(int irq, void *data) ++irqreturn_t intel_mid_dma_interrupt(int irq, void *data) + { + struct middma_device *mid = data; + u32 tfr_status, err_status; +@@ -1048,6 +1056,7 @@ static irqreturn_t intel_mid_dma_interrupt(int irq, void *data) + + return IRQ_HANDLED; + } ++EXPORT_SYMBOL(intel_mid_dma_interrupt); + + static irqreturn_t intel_mid_dma_interrupt1(int irq, void *data) + { +diff --git a/drivers/dma/intel_mid_dma/Makefile b/drivers/dma/intel_mid_dma/Makefile +new file mode 100644 +index 0000000..567eca5 +--- /dev/null ++++ b/drivers/dma/intel_mid_dma/Makefile +@@ -0,0 +1,3 @@ ++obj-$(CONFIG_INTEL_MID_DMAC) += intel_mid_dma.o ++intel_mid_dma-objs:= intel_mid_dma_core.o intel_cln_dma_pci.o intel_mid_dma_pci.o ++ +diff --git a/drivers/dma/intel_mid_dma/intel_cln_dma_pci.c b/drivers/dma/intel_mid_dma/intel_cln_dma_pci.c +new file mode 100644 +index 0000000..442c2f2 +--- /dev/null ++++ b/drivers/dma/intel_mid_dma/intel_cln_dma_pci.c +@@ -0,0 +1,153 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++/* ++ * intel_mid_dma.c - Intel Langwell DMA Drivers ++ * ++ * Author: Vinod Koul <bryan.odonoghue@linux.intel.com> ++ * This is an entry point for Intel Clanton based DMAC on Clanton's UART ++ * specifically we don't have a dedicated PCI function, instead we have DMAC ++ * regs hung off of a PCI BAR. This entry/exit allows re-use of the core ++ * DMA API for MID devices manipulated to suit our BAR setup ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ */ ++#include <linux/pci.h> ++#include <linux/interrupt.h> ++#include <linux/pm_runtime.h> ++#include <linux/intel_mid_dma.h> ++#include <linux/module.h> ++ ++#include "intel_mid_dma_core.h" ++#include "intel_mid_dma_regs.h" ++ ++/** ++ * intel_mid_dma_probe - PCI Probe ++ * @pdev: Controller PCI device structure ++ * @id: pci device id structure ++ * ++ * Initialize the PCI device, map BARs, query driver data. ++ * Call intel_setup_dma to complete contoller and chan initilzation ++ */ ++int __devinit intel_cln_dma_probe(struct pci_dev *pdev, ++ struct middma_device *device) ++{ ++ u32 base_addr, bar_size; ++ int err; ++ ++ pr_debug("MDMA: probe for %x\n", pdev->device); ++ pr_debug("MDMA: CH %d, base %d, block len %d, Periphral mask %x\n", ++ device->max_chan, device->chan_base, ++ device->block_size, device->pimr_mask); ++ ++ device->pdev = pci_dev_get(pdev); ++ device->ispci_fn = true; ++ ++ base_addr = pci_resource_start(pdev, 1); ++ bar_size = pci_resource_len(pdev, 1); ++ device->dma_base = ioremap_nocache(base_addr, DMA_REG_SIZE); ++ if (!device->dma_base) { ++ pr_err("ERR_MDMA:ioremap failed\n"); ++ err = -ENOMEM; ++ goto err_ioremap; ++ } ++ ++ err = intel_mid_dma_setup(pdev, device, false); ++ if (err) ++ goto err_dma; ++ ++ return 0; ++ ++err_dma: ++ iounmap(device->dma_base); ++err_ioremap: ++ pr_err("ERR_MDMA:Probe failed %d\n", err); ++ return err; ++} ++EXPORT_SYMBOL(intel_cln_dma_probe); ++ ++/** ++ * intel_mid_dma_remove - PCI remove ++ * @pdev: Controller PCI device structure ++ * ++ * Free up all resources and data ++ * Call shutdown_dma to complete contoller and chan cleanup ++ */ ++void __devexit intel_cln_dma_remove(struct pci_dev *pdev, struct middma_device *device) ++{ ++ intel_mid_dma_shutdown(pdev, device); ++} ++EXPORT_SYMBOL(intel_cln_dma_remove); ++ ++/* Power Management */ ++/* ++* dma_suspend - PCI suspend function ++* ++* @pci: PCI device structure ++* @state: PM message ++* ++* This function is called by OS when a power event occurs ++*/ ++int intel_cln_dma_suspend(struct middma_device *device) ++{ ++ int i = 0; ++ pr_debug("MDMA: dma_suspend called\n"); ++ ++ for (i = 0; i < device->max_chan; i++) { ++ if (device->ch[i].in_use) ++ return -EAGAIN; ++ } ++ dmac1_mask_periphral_intr(device); ++ device->state = SUSPENDED; ++ return 0; ++} ++EXPORT_SYMBOL(intel_cln_dma_suspend); ++ ++/** ++* dma_resume - PCI resume function ++* ++* @pci: PCI device structure ++* ++* This function is called by OS when a power event occurs ++*/ ++int intel_cln_dma_resume(struct middma_device *device) ++{ ++ pr_debug("MDMA: dma_resume called\n"); ++ device->state = RUNNING; ++ iowrite32(REG_BIT0, device->dma_base + DMA_CFG); ++ return 0; ++} ++EXPORT_SYMBOL(intel_cln_dma_resume); ++ ++static int intel_cln_dma_runtime_suspend(struct middma_device *device) ++{ ++ device->state = SUSPENDED; ++ return 0; ++} ++EXPORT_SYMBOL(intel_cln_dma_runtime_suspend); ++ ++static int intel_cln_dma_runtime_resume(struct middma_device *device) ++{ ++ device->state = RUNNING; ++ iowrite32(REG_BIT0, device->dma_base + DMA_CFG); ++ return 0; ++} ++EXPORT_SYMBOL(intel_cln_dma_runtime_resume); ++ ++ +diff --git a/drivers/dma/intel_mid_dma/intel_mid_dma_pci.c b/drivers/dma/intel_mid_dma/intel_mid_dma_pci.c +new file mode 100644 +index 0000000..be7705b +--- /dev/null ++++ b/drivers/dma/intel_mid_dma/intel_mid_dma_pci.c +@@ -0,0 +1,287 @@ ++/* ++ * intel_mid_dma.c - Intel Langwell DMA Drivers ++ * ++ * Copyright (C) 2008-12 Intel Corp ++ * Author: Vinod Koul <vinod.koul@intel.com> ++ * The driver design is based on dw_dmac driver ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * ++ */ ++#include <linux/pci.h> ++#include <linux/interrupt.h> ++#include <linux/pm_runtime.h> ++#include <linux/intel_mid_dma.h> ++#include <linux/module.h> ++ ++#include "intel_mid_dma_regs.h" ++#include "intel_mid_dma_core.h" ++ ++#define INTEL_MID_DMAC1_ID 0x0814 ++#define INTEL_MID_DMAC2_ID 0x0813 ++#define INTEL_MID_GP_DMAC2_ID 0x0827 ++#define INTEL_MFLD_DMAC1_ID 0x0830 ++ ++#define INFO(_max_chan, _ch_base, _block_size, _pimr_mask) \ ++ ((kernel_ulong_t)&(struct intel_mid_dma_probe_info) { \ ++ .max_chan = (_max_chan), \ ++ .ch_base = (_ch_base), \ ++ .block_size = (_block_size), \ ++ .pimr_mask = (_pimr_mask), \ ++ }) ++ ++/** ++ * intel_mid_dma_probe - PCI Probe ++ * @pdev: Controller PCI device structure ++ * @id: pci device id structure ++ * ++ * Initialize the PCI device, map BARs, query driver data. ++ * Call setup_dma to complete contoller and chan initilzation ++ */ ++static int intel_mid_dma_probe(struct pci_dev *pdev, ++ const struct pci_device_id *id) ++{ ++ struct middma_device *device; ++ u32 base_addr, bar_size; ++ struct intel_mid_dma_probe_info *info; ++ int err; ++ ++ pr_debug("MDMA: probe for %x\n", pdev->device); ++ info = (void *)id->driver_data; ++ pr_debug("MDMA: CH %d, base %d, block len %d, Periphral mask %x\n", ++ info->max_chan, info->ch_base, ++ info->block_size, info->pimr_mask); ++ ++ err = pci_enable_device(pdev); ++ if (err) ++ goto err_enable_device; ++ ++ err = pci_request_regions(pdev, "intel_mid_dmac"); ++ if (err) ++ goto err_request_regions; ++ ++ err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); ++ if (err) ++ goto err_set_dma_mask; ++ ++ err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ if (err) ++ goto err_set_dma_mask; ++ ++ device = kzalloc(sizeof(*device), GFP_KERNEL); ++ if (!device) { ++ pr_err("ERR_MDMA:kzalloc failed probe\n"); ++ err = -ENOMEM; ++ goto err_kzalloc; ++ } ++ device->pdev = pci_dev_get(pdev); ++ ++ base_addr = pci_resource_start(pdev, 0); ++ bar_size = pci_resource_len(pdev, 0); ++ device->dma_base = ioremap_nocache(base_addr, DMA_REG_SIZE); ++ if (!device->dma_base) { ++ pr_err("ERR_MDMA:ioremap failed\n"); ++ err = -ENOMEM; ++ goto err_ioremap; ++ } ++ pci_set_drvdata(pdev, device); ++ pci_set_master(pdev); ++ device->max_chan = info->max_chan; ++ device->chan_base = info->ch_base; ++ device->block_size = info->block_size; ++ device->pimr_mask = info->pimr_mask; ++ ++ err = mid_setup_dma(pdev); ++ if (err) ++ goto err_dma; ++ ++ pm_runtime_put_noidle(&pdev->dev); ++ pm_runtime_allow(&pdev->dev); ++ return 0; ++ ++err_dma: ++ iounmap(device->dma_base); ++err_ioremap: ++ pci_dev_put(pdev); ++ kfree(device); ++err_kzalloc: ++err_set_dma_mask: ++ pci_release_regions(pdev); ++ pci_disable_device(pdev); ++err_request_regions: ++err_enable_device: ++ pr_err("ERR_MDMA:Probe failed %d\n", err); ++ return err; ++} ++ ++/** ++ * intel_mid_dma_remove - PCI remove ++ * @pdev: Controller PCI device structure ++ * ++ * Free up all resources and data ++ * Call shutdown_dma to complete contoller and chan cleanup ++ */ ++static void intel_mid_dma_remove(struct pci_dev *pdev) ++{ ++ struct middma_device *device = pci_get_drvdata(pdev); ++ ++ pm_runtime_get_noresume(&pdev->dev); ++ pm_runtime_forbid(&pdev->dev); ++ middma_shutdown(pdev); ++ pci_dev_put(pdev); ++ kfree(device); ++ pci_release_regions(pdev); ++ pci_disable_device(pdev); ++} ++ ++/* Power Management */ ++/* ++* dma_suspend - PCI suspend function ++* ++* @pci: PCI device structure ++* @state: PM message ++* ++* This function is called by OS when a power event occurs ++*/ ++static int dma_suspend(struct device *dev) ++{ ++ struct pci_dev *pci = to_pci_dev(dev); ++ int i; ++ struct middma_device *device = pci_get_drvdata(pci); ++ pr_debug("MDMA: dma_suspend called\n"); ++ ++ for (i = 0; i < device->max_chan; i++) { ++ if (device->ch[i].in_use) ++ return -EAGAIN; ++ } ++ dmac1_mask_periphral_intr(device); ++ device->state = SUSPENDED; ++ pci_save_state(pci); ++ pci_disable_device(pci); ++ pci_set_power_state(pci, PCI_D3hot); ++ return 0; ++} ++ ++/** ++* dma_resume - PCI resume function ++* ++* @pci: PCI device structure ++* ++* This function is called by OS when a power event occurs ++*/ ++int dma_resume(struct device *dev) ++{ ++ struct pci_dev *pci = to_pci_dev(dev); ++ int ret; ++ struct middma_device *device = pci_get_drvdata(pci); ++ ++ pr_debug("MDMA: dma_resume called\n"); ++ pci_set_power_state(pci, PCI_D0); ++ pci_restore_state(pci); ++ ret = pci_enable_device(pci); ++ if (ret) { ++ pr_err("MDMA: device can't be enabled for %x\n", pci->device); ++ return ret; ++ } ++ intel_mid_dma_resume(device); ++ return 0; ++} ++ ++static int dma_runtime_suspend(struct device *dev) ++{ ++ struct pci_dev *pci_dev = to_pci_dev(dev); ++ struct middma_device *device = pci_get_drvdata(pci_dev); ++ ++ device->state = SUSPENDED; ++ return 0; ++} ++ ++static int dma_runtime_resume(struct device *dev) ++{ ++ struct pci_dev *pci_dev = to_pci_dev(dev); ++ struct middma_device *device = pci_get_drvdata(pci_dev); ++ ++ device->state = RUNNING; ++ iowrite32(REG_BIT0, device->dma_base + DMA_CFG); ++ return 0; ++} ++ ++static int dma_runtime_idle(struct device *dev) ++{ ++ struct pci_dev *pdev = to_pci_dev(dev); ++ struct middma_device *device = pci_get_drvdata(pdev); ++ int i; ++ ++ for (i = 0; i < device->max_chan; i++) { ++ if (device->ch[i].in_use) ++ return -EAGAIN; ++ } ++ ++ return pm_schedule_suspend(dev, 0); ++} ++ ++/****************************************************************************** ++* PCI stuff ++*/ ++static struct pci_device_id intel_mid_dma_ids[] = { ++ { PCI_VDEVICE(INTEL, INTEL_MID_DMAC1_ID), INFO(2, 6, 4095, 0x200020)}, ++ { PCI_VDEVICE(INTEL, INTEL_MID_DMAC2_ID), INFO(2, 0, 2047, 0)}, ++ { PCI_VDEVICE(INTEL, INTEL_MID_GP_DMAC2_ID), INFO(2, 0, 2047, 0)}, ++ { PCI_VDEVICE(INTEL, INTEL_MFLD_DMAC1_ID), INFO(4, 0, 4095, 0x400040)}, ++ { 0, } ++}; ++MODULE_DEVICE_TABLE(pci, intel_mid_dma_ids); ++ ++static const struct dev_pm_ops intel_mid_dma_pm = { ++ .runtime_suspend = dma_runtime_suspend, ++ .runtime_resume = dma_runtime_resume, ++ .runtime_idle = dma_runtime_idle, ++ .suspend = dma_suspend, ++ .resume = dma_resume, ++}; ++ ++static struct pci_driver intel_mid_dma_pci_driver = { ++ .name = "Intel MID DMA", ++ .id_table = intel_mid_dma_ids, ++ .probe = intel_mid_dma_probe, ++ .remove = __devexit_p(intel_mid_dma_remove), ++#ifdef CONFIG_PM ++ .driver = { ++ .pm = &intel_mid_dma_pm, ++ }, ++#endif ++}; ++ ++static int __init intel_mid_dma_init(void) ++{ ++ pr_debug("INFO_MDMA: LNW DMA Driver Version %s\n", ++ INTEL_MID_DMA_DRIVER_VERSION); ++ return pci_register_driver(&intel_mid_dma_pci_driver); ++} ++fs_initcall(intel_mid_dma_init); ++ ++static void __exit intel_mid_dma_exit(void) ++{ ++ pci_unregister_driver(&intel_mid_dma_pci_driver); ++} ++module_exit(intel_mid_dma_exit); ++ ++MODULE_AUTHOR("Vinod Koul <vinod.koul@intel.com>"); ++MODULE_DESCRIPTION("Intel (R) MID DMAC Driver"); ++MODULE_LICENSE("GPL v2"); ++MODULE_VERSION(INTEL_MID_DMA_DRIVER_VERSION); +diff --git a/drivers/dma/intel_mid_dma_regs.h b/drivers/dma/intel_mid_dma_regs.h +index 17b4219..4be7a01 100644 +--- a/drivers/dma/intel_mid_dma_regs.h ++++ b/drivers/dma/intel_mid_dma_regs.h +@@ -27,6 +27,7 @@ + + #include <linux/dmaengine.h> + #include <linux/dmapool.h> ++#include <linux/intel_mid_dma.h> + #include <linux/pci_ids.h> + + #define INTEL_MID_DMA_DRIVER_VERSION "1.1.0" +@@ -158,115 +159,17 @@ union intel_mid_dma_cfg_hi { + }; + + +-/** +- * struct intel_mid_dma_chan - internal mid representation of a DMA channel +- * @chan: dma_chan strcture represetation for mid chan +- * @ch_regs: MMIO register space pointer to channel register +- * @dma_base: MMIO register space DMA engine base pointer +- * @ch_id: DMA channel id +- * @lock: channel spinlock +- * @active_list: current active descriptors +- * @queue: current queued up descriptors +- * @free_list: current free descriptors +- * @slave: dma slave structure +- * @descs_allocated: total number of descriptors allocated +- * @dma: dma device structure pointer +- * @busy: bool representing if ch is busy (active txn) or not +- * @in_use: bool representing if ch is in use or not +- * @raw_tfr: raw trf interrupt received +- * @raw_block: raw block interrupt received +- */ +-struct intel_mid_dma_chan { +- struct dma_chan chan; +- void __iomem *ch_regs; +- void __iomem *dma_base; +- int ch_id; +- spinlock_t lock; +- struct list_head active_list; +- struct list_head queue; +- struct list_head free_list; +- unsigned int descs_allocated; +- struct middma_device *dma; +- bool busy; +- bool in_use; +- u32 raw_tfr; +- u32 raw_block; +- struct intel_mid_dma_slave *mid_slave; +-}; +- + static inline struct intel_mid_dma_chan *to_intel_mid_dma_chan( + struct dma_chan *chan) + { + return container_of(chan, struct intel_mid_dma_chan, chan); + } + +-enum intel_mid_dma_state { +- RUNNING = 0, +- SUSPENDED, +-}; +-/** +- * struct middma_device - internal representation of a DMA device +- * @pdev: PCI device +- * @dma_base: MMIO register space pointer of DMA +- * @dma_pool: for allocating DMA descriptors +- * @common: embedded struct dma_device +- * @tasklet: dma tasklet for processing interrupts +- * @ch: per channel data +- * @pci_id: DMA device PCI ID +- * @intr_mask: Interrupt mask to be used +- * @mask_reg: MMIO register for periphral mask +- * @chan_base: Base ch index (read from driver data) +- * @max_chan: max number of chs supported (from drv_data) +- * @block_size: Block size of DMA transfer supported (from drv_data) +- * @pimr_mask: MMIO register addr for periphral interrupt (from drv_data) +- * @state: dma PM device state +- */ +-struct middma_device { +- struct pci_dev *pdev; +- void __iomem *dma_base; +- struct pci_pool *dma_pool; +- struct dma_device common; +- struct tasklet_struct tasklet; +- struct intel_mid_dma_chan ch[MAX_CHAN]; +- unsigned int pci_id; +- unsigned int intr_mask; +- void __iomem *mask_reg; +- int chan_base; +- int max_chan; +- int block_size; +- unsigned int pimr_mask; +- enum intel_mid_dma_state state; +-}; +- + static inline struct middma_device *to_middma_device(struct dma_device *common) + { + return container_of(common, struct middma_device, common); + } + +-struct intel_mid_dma_desc { +- void __iomem *block; /*ch ptr*/ +- struct list_head desc_node; +- struct dma_async_tx_descriptor txd; +- size_t len; +- dma_addr_t sar; +- dma_addr_t dar; +- u32 cfg_hi; +- u32 cfg_lo; +- u32 ctl_lo; +- u32 ctl_hi; +- struct pci_pool *lli_pool; +- struct intel_mid_dma_lli *lli; +- dma_addr_t lli_phys; +- unsigned int lli_length; +- unsigned int current_lli; +- dma_addr_t next; +- enum dma_transfer_direction dirn; +- enum dma_status status; +- enum dma_slave_buswidth width; /*width of DMA txn*/ +- enum intel_mid_dma_mode cfg_mode; /*mode configuration*/ +- +-}; +- + struct intel_mid_dma_lli { + dma_addr_t sar; + dma_addr_t dar; +diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig +index 682de75..97e951b 100644 +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -243,13 +243,14 @@ config GPIO_VR41XX + Say yes here to support the NEC VR4100 series General-purpose I/O Uint + + config GPIO_SCH +- tristate "Intel SCH/TunnelCreek/Centerton GPIO" ++ tristate "Intel SCH/TunnelCreek/Centerton/Clanton GPIO" + depends on PCI && X86 + select MFD_CORE + select LPC_SCH + help + Say yes here to support GPIO interface on Intel Poulsbo SCH, +- Intel Tunnel Creek processor or Intel Centerton processor. ++ Intel Tunnel Creek processor, Intel Centerton processor or Intel ++ Clanton. + The Intel SCH contains a total of 14 GPIO pins. Ten GPIOs are + powered by the core power rail and are turned off during sleep + modes (S3 and higher). The remaining four GPIOs are powered by +@@ -261,6 +262,8 @@ config GPIO_SCH + The Intel Centerton processor has a total of 30 GPIO pins. + Twenty-one are powered by the core power rail and 9 from the + suspend power supply. ++ The Intel Clanton has 2 GPIOs powered by the core power well and 6 ++ form the suspend power well. + + config GPIO_ICH + tristate "Intel ICH GPIO" +diff --git a/drivers/gpio/gpio-sch.c b/drivers/gpio/gpio-sch.c +index edae963..73591be 100644 +--- a/drivers/gpio/gpio-sch.c ++++ b/drivers/gpio/gpio-sch.c +@@ -41,6 +41,13 @@ static DEFINE_SPINLOCK(gpio_lock); + + static unsigned short gpio_ba; + ++static void cln_gpio_restrict_release(struct device *dev) {} ++static struct platform_device cln_gpio_restrict_pdev = ++{ ++ .name = "cln-gpio-restrict-nc", ++ .dev.release = cln_gpio_restrict_release, ++}; ++ + static int sch_gpio_core_direction_in(struct gpio_chip *gc, unsigned gpio_num) + { + u8 curr_dirs; +@@ -240,6 +247,14 @@ static int sch_gpio_probe(struct platform_device *pdev) + sch_gpio_resume.ngpio = 9; + break; + ++ case PCI_DEVICE_ID_INTEL_CLANTON_ILB: ++ sch_gpio_core.base = 0; ++ sch_gpio_core.ngpio = 2; ++ ++ sch_gpio_resume.base = 2; ++ sch_gpio_resume.ngpio = 6; ++ break; ++ + default: + err = -ENODEV; + goto err_sch_gpio_core; +@@ -256,6 +271,10 @@ static int sch_gpio_probe(struct platform_device *pdev) + if (err < 0) + goto err_sch_gpio_resume; + ++ err = platform_device_register(&cln_gpio_restrict_pdev); ++ if (err < 0) ++ goto err_sch_gpio_resume; ++ + return 0; + + err_sch_gpio_resume: +@@ -277,6 +296,8 @@ static int sch_gpio_remove(struct platform_device *pdev) + if (gpio_ba) { + int err; + ++ platform_device_unregister(&cln_gpio_restrict_pdev); ++ + err = gpiochip_remove(&sch_gpio_core); + if (err) + dev_err(&pdev->dev, "%s failed, %d\n", +diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c +index 199fca1..5e897ff 100644 +--- a/drivers/gpio/gpiolib.c ++++ b/drivers/gpio/gpiolib.c +@@ -60,11 +60,17 @@ struct gpio_desc { + #define FLAG_ACTIVE_LOW 7 /* sysfs value has active low */ + #define FLAG_OPEN_DRAIN 8 /* Gpio is open drain type */ + #define FLAG_OPEN_SOURCE 9 /* Gpio is open source type */ ++#define FLAG_PULLUP 10 /* Gpio drive is resistive pullup */ ++#define FLAG_PULLDOWN 11 /* Gpio drive is resistive pulldown */ ++#define FLAG_STRONG 12 /* Gpio drive is strong (fast output) */ ++#define FLAG_HIZ 13 /* Gpio drive is Hi-Z (input) */ + + #define ID_SHIFT 16 /* add new flags before this one */ + + #define GPIO_FLAGS_MASK ((1 << ID_SHIFT) - 1) + #define GPIO_TRIGGER_MASK (BIT(FLAG_TRIG_FALL) | BIT(FLAG_TRIG_RISE)) ++#define GPIO_DRIVE_MASK (BIT(FLAG_PULLUP) | BIT(FLAG_PULLDOWN) \ ++ | BIT(FLAG_STRONG) | BIT(FLAG_HIZ)) + + #ifdef CONFIG_DEBUG_FS + const char *label; +@@ -243,6 +249,10 @@ static DEFINE_MUTEX(sysfs_lock); + * * is read/write as zero/nonzero + * * also affects existing and subsequent "falling" and "rising" + * /edge configuration ++ * /drive ++ * * sets signal drive mode ++ * * is read/write as "pullup", "pulldown", "strong" or "hiz" ++ * + */ + + static ssize_t gpio_direction_show(struct device *dev, +@@ -573,9 +583,85 @@ static ssize_t gpio_active_low_store(struct device *dev, + static const DEVICE_ATTR(active_low, 0644, + gpio_active_low_show, gpio_active_low_store); + ++static ssize_t gpio_drive_show(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ const struct gpio_desc *desc = dev_get_drvdata(dev); ++ ssize_t status; ++ ++ mutex_lock(&sysfs_lock); ++ ++ if (!test_bit(FLAG_EXPORT, &desc->flags)) { ++ status = -EIO; ++ } else { ++ if (test_bit(FLAG_PULLUP, &desc->flags)) ++ status = sprintf(buf, "pullup\n"); ++ else if (test_bit(FLAG_PULLDOWN, &desc->flags)) ++ status = sprintf(buf, "pulldown\n"); ++ else if (test_bit(FLAG_STRONG, &desc->flags)) ++ status = sprintf(buf, "strong\n"); ++ else if (test_bit(FLAG_HIZ, &desc->flags)) ++ status = sprintf(buf, "hiz\n"); ++ else ++ status = -EINVAL; ++ } ++ ++ mutex_unlock(&sysfs_lock); ++ return status; ++} ++ ++static ssize_t gpio_drive_store(struct device *dev, ++ struct device_attribute *attr, const char *buf, size_t size) ++{ ++ struct gpio_desc *desc = dev_get_drvdata(dev); ++ unsigned gpio = desc - gpio_desc; ++ ssize_t status; ++ ++ mutex_lock(&sysfs_lock); ++ ++ if (!test_bit(FLAG_EXPORT, &desc->flags)) ++ status = -EIO; ++ else { ++ if (sysfs_streq(buf, "pullup")) { ++ status = gpio_set_drive(gpio, GPIOF_DRIVE_PULLUP); ++ if (!status) { ++ desc->flags &= ~GPIO_DRIVE_MASK; ++ set_bit(FLAG_PULLUP, &desc->flags); ++ } ++ } else if (sysfs_streq(buf, "pulldown")) { ++ status = gpio_set_drive(gpio, GPIOF_DRIVE_PULLDOWN); ++ if (!status) { ++ desc->flags &= ~GPIO_DRIVE_MASK; ++ set_bit(FLAG_PULLDOWN, &desc->flags); ++ } ++ } else if (sysfs_streq(buf, "strong")) { ++ status = gpio_set_drive(gpio, GPIOF_DRIVE_STRONG); ++ if (!status) { ++ desc->flags &= ~GPIO_DRIVE_MASK; ++ set_bit(FLAG_STRONG, &desc->flags); ++ } ++ } else if (sysfs_streq(buf, "hiz")) { ++ status = gpio_set_drive(gpio, GPIOF_DRIVE_HIZ); ++ if (!status) { ++ desc->flags &= ~GPIO_DRIVE_MASK; ++ set_bit(FLAG_HIZ, &desc->flags); ++ } ++ } else { ++ status = -EINVAL; ++ } ++ } ++ ++ mutex_unlock(&sysfs_lock); ++ return status ? : size; ++} ++ ++static const DEVICE_ATTR(drive, 0644, ++ gpio_drive_show, gpio_drive_store); ++ + static const struct attribute *gpio_attrs[] = { + &dev_attr_value.attr, + &dev_attr_active_low.attr, ++ &dev_attr_drive.attr, + NULL, + }; + +@@ -806,7 +892,7 @@ fail_unlock: + } + EXPORT_SYMBOL_GPL(gpio_export); + +-static int match_export(struct device *dev, void *data) ++static int match_export(struct device *dev, const void *data) + { + return dev_get_drvdata(dev) == data; + } +@@ -1677,6 +1763,50 @@ fail: + } + EXPORT_SYMBOL_GPL(gpio_set_debounce); + ++/** ++ * gpio_set_drive - sets drive @mode for a @gpio ++ * @gpio: the gpio to set the drive mode ++ * @mode: the drive mode ++ */ ++int gpio_set_drive(unsigned gpio, unsigned mode) ++{ ++ unsigned long flags; ++ struct gpio_chip *chip; ++ struct gpio_desc *desc = &gpio_desc[gpio]; ++ int status = -EINVAL; ++ ++ spin_lock_irqsave(&gpio_lock, flags); ++ ++ if (!gpio_is_valid(gpio)) ++ goto fail; ++ chip = desc->chip; ++ if (!chip || !chip->set || !chip->set_drive) ++ goto fail; ++ gpio -= chip->base; ++ if (gpio >= chip->ngpio) ++ goto fail; ++ status = gpio_ensure_requested(desc, gpio); ++ if (status < 0) ++ goto fail; ++ ++ /* now we know the gpio is valid and chip won't vanish */ ++ ++ spin_unlock_irqrestore(&gpio_lock, flags); ++ ++ might_sleep_if(chip->can_sleep); ++ ++ return chip->set_drive(chip, gpio, mode); ++ ++fail: ++ spin_unlock_irqrestore(&gpio_lock, flags); ++ if (status) ++ pr_debug("%s: gpio-%d status %d\n", ++ __func__, gpio, status); ++ ++ return status; ++} ++EXPORT_SYMBOL_GPL(gpio_set_drive); ++ + /* I/O calls are only valid after configuration completed; the relevant + * "is this a valid GPIO" error checks should already have been done. + * +diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig +index bdca511..010e4fd 100644 +--- a/drivers/i2c/busses/Kconfig ++++ b/drivers/i2c/busses/Kconfig +@@ -22,7 +22,7 @@ config I2C_ALI1535 + + config I2C_ALI1563 + tristate "ALI 1563" +- depends on PCI && EXPERIMENTAL ++ depends on PCI + help + If you say yes to this option, support will be included for the SMB + Host controller on Acer Labs Inc. (ALI) M1563 South Bridges. The SMB +@@ -56,7 +56,7 @@ config I2C_AMD756 + + config I2C_AMD756_S4882 + tristate "SMBus multiplexing on the Tyan S4882" +- depends on I2C_AMD756 && X86 && EXPERIMENTAL ++ depends on I2C_AMD756 && X86 + help + Enabling this option will add specific SMBus support for the Tyan + S4882 motherboard. On this 4-CPU board, the SMBus is multiplexed +@@ -164,7 +164,7 @@ config I2C_NFORCE2 + + config I2C_NFORCE2_S4985 + tristate "SMBus multiplexing on the Tyan S4985" +- depends on I2C_NFORCE2 && X86 && EXPERIMENTAL ++ depends on I2C_NFORCE2 && X86 + help + Enabling this option will add specific SMBus support for the Tyan + S4985 motherboard. On this 4-CPU board, the SMBus is multiplexed +@@ -215,7 +215,7 @@ config I2C_SIS96X + + config I2C_VIA + tristate "VIA VT82C586B" +- depends on PCI && EXPERIMENTAL ++ depends on PCI + select I2C_ALGOBIT + help + If you say yes to this option, support will be included for the VIA +@@ -267,7 +267,7 @@ comment "Mac SMBus host controller drivers" + + config I2C_HYDRA + tristate "CHRP Apple Hydra Mac I/O I2C interface" +- depends on PCI && PPC_CHRP && EXPERIMENTAL ++ depends on PCI && PPC_CHRP + select I2C_ALGOBIT + help + This supports the use of the I2C interface in the Apple Hydra Mac +@@ -293,7 +293,7 @@ comment "I2C system bus drivers (mostly embedded / system-on-chip)" + + config I2C_AT91 + tristate "Atmel AT91 I2C Two-Wire interface (TWI)" +- depends on ARCH_AT91 && EXPERIMENTAL ++ depends on ARCH_AT91 + help + This supports the use of the I2C interface on Atmel AT91 + processors. +@@ -386,7 +386,7 @@ config I2C_DESIGNWARE_PLATFORM + + config I2C_DESIGNWARE_PCI + tristate "Synopsys DesignWare PCI" +- depends on PCI ++ depends on PCI && !INTEL_QUARK_X1000_SOC + select I2C_DESIGNWARE_CORE + help + If you say yes to this option, support will be included for the +@@ -519,7 +519,6 @@ config I2C_NUC900 + + config I2C_OCORES + tristate "OpenCores I2C Controller" +- depends on EXPERIMENTAL + help + If you say yes to this option, support will be included for the + OpenCores I2C controller. For details see +@@ -712,7 +711,7 @@ config I2C_OCTEON + + config I2C_XILINX + tristate "Xilinx I2C Controller" +- depends on EXPERIMENTAL && HAS_IOMEM ++ depends on HAS_IOMEM + help + If you say yes to this option, support will be included for the + Xilinx I2C controller. +@@ -803,7 +802,7 @@ config I2C_PARPORT_LIGHT + + config I2C_TAOS_EVM + tristate "TAOS evaluation module" +- depends on EXPERIMENTAL ++ depends on TTY + select SERIO + select SERIO_SERPORT + default n +diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c +index f5258c2..2a2d1c9 100644 +--- a/drivers/i2c/busses/i2c-designware-core.c ++++ b/drivers/i2c/busses/i2c-designware-core.c +@@ -164,6 +164,29 @@ static char *abort_sources[] = { + "lost arbitration", + }; + ++/* ++ * Bitmask for struct i2c_dw_data_cmd's `cmd' field. ++ * - DW_IC_CMD_READ: read/~write operation ++ * - DW_IC_CMD_STOP: stop condition generation (only for devices requiring ++ * explicit transaction termination) ++ * - DW_IC_CMD_RESTART: (re)start condition generation (only for devices ++ * requiring explicit transaction termination) ++ */ ++#define DW_IC_CMD_READ 0x01 ++#define DW_IC_CMD_STOP 0x02 ++#define DW_IC_CMD_RESTART 0x04 ++ ++/* ++ * Define the IC_DATA_CMD format. ++ */ ++static union i2c_dw_data_cmd { ++ struct fields { ++ u8 data; ++ u8 cmd; ++ } fields; ++ u16 value; ++} data_cmd; ++ + u32 dw_readl(struct dw_i2c_dev *dev, int offset) + { + u32 value; +@@ -344,6 +367,9 @@ static void i2c_dw_xfer_init(struct dw_i2c_dev *dev) + struct i2c_msg *msgs = dev->msgs; + u32 ic_con; + ++ /* Disable interrupts */ ++ i2c_dw_disable_int(dev); ++ + /* Disable the adapter */ + dw_writel(dev, 0, DW_IC_ENABLE); + +@@ -380,6 +406,7 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev) + u32 addr = msgs[dev->msg_write_idx].addr; + u32 buf_len = dev->tx_buf_len; + u8 *buf = dev->tx_buf; ++ int segment_start = 0; + + intr_mask = DW_IC_INTR_DEFAULT_MASK; + +@@ -403,21 +430,65 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev) + break; + } + ++ segment_start = 0; + if (!(dev->status & STATUS_WRITE_IN_PROGRESS)) { + /* new i2c_msg */ + buf = msgs[dev->msg_write_idx].buf; + buf_len = msgs[dev->msg_write_idx].len; ++ segment_start = 1; + } + + tx_limit = dev->tx_fifo_depth - dw_readl(dev, DW_IC_TXFLR); + rx_limit = dev->rx_fifo_depth - dw_readl(dev, DW_IC_RXFLR); + ++ /* ++ * The maximum number of read requests that can be put into TX ++ * FIFO depends on the number read operations already pending ++ * in RX FIFO + the number of outstanding read operations still ++ * queued in the TX FIFO. ++ * This prevents RX FIFO overrun. ++ */ ++ rx_limit -= dev->rx_outstanding; ++ + while (buf_len > 0 && tx_limit > 0 && rx_limit > 0) { ++ data_cmd.fields.data = 0x00; ++ data_cmd.fields.cmd = 0x00; ++ + if (msgs[dev->msg_write_idx].flags & I2C_M_RD) { +- dw_writel(dev, 0x100, DW_IC_DATA_CMD); ++ /* Master-receiver */ ++ data_cmd.fields.cmd = DW_IC_CMD_READ; + rx_limit--; +- } else +- dw_writel(dev, *buf++, DW_IC_DATA_CMD); ++ dev->rx_outstanding++; ++ } else { ++ /* Master-transmitter */ ++ data_cmd.fields.data = *buf; ++ buf++; ++ } ++ ++ if (1 == dev->explicit_stop ++ && 1 == segment_start) { ++ /* ++ * First byte of a transaction segment for a ++ * device requiring explicit transaction ++ * termination: generate (re)start symbol. ++ */ ++ segment_start = 0; ++ data_cmd.fields.cmd |= DW_IC_CMD_RESTART; ++ } ++ ++ if (1 == dev->explicit_stop ++ && dev->msg_write_idx == dev->msgs_num - 1 ++ && 1 == buf_len) { ++ /* ++ * Last byte of last transction segment for a ++ * device requiring explicit transaction ++ * termination: generate stop symbol. ++ */ ++ data_cmd.fields.cmd |= DW_IC_CMD_STOP; ++ } ++ ++ dw_writel(dev, data_cmd.value, DW_IC_DATA_CMD); ++ + tx_limit--; buf_len--; + } + +@@ -468,8 +539,10 @@ i2c_dw_read(struct dw_i2c_dev *dev) + + rx_valid = dw_readl(dev, DW_IC_RXFLR); + +- for (; len > 0 && rx_valid > 0; len--, rx_valid--) ++ for (; len > 0 && rx_valid > 0; len--, rx_valid--) { + *buf++ = dw_readl(dev, DW_IC_DATA_CMD); ++ dev->rx_outstanding--; ++ } + + if (len > 0) { + dev->status |= STATUS_READ_IN_PROGRESS; +@@ -527,6 +600,7 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) + dev->msg_err = 0; + dev->status = STATUS_IDLE; + dev->abort_source = 0; ++ dev->rx_outstanding = 0; + + ret = i2c_dw_wait_bus_not_busy(dev); + if (ret < 0) +@@ -625,8 +699,6 @@ static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev) + dw_readl(dev, DW_IC_CLR_RX_DONE); + if (stat & DW_IC_INTR_ACTIVITY) + dw_readl(dev, DW_IC_CLR_ACTIVITY); +- if (stat & DW_IC_INTR_STOP_DET) +- dw_readl(dev, DW_IC_CLR_STOP_DET); + if (stat & DW_IC_INTR_START_DET) + dw_readl(dev, DW_IC_CLR_START_DET); + if (stat & DW_IC_INTR_GEN_CALL) +@@ -677,8 +749,21 @@ irqreturn_t i2c_dw_isr(int this_irq, void *dev_id) + * the current transmit status. + */ + ++ /* ++ * Process stop condition after the last transaction segment is ++ * transmitted (and received if appropriate). ++ */ ++ if (dev->msgs_num == dev->msg_write_idx ++ && (DW_IC_INTR_STOP_DET & dw_readl(dev, DW_IC_INTR_STAT)) ++ && 0 == dw_readl(dev, DW_IC_TXFLR) ++ && 0 == dw_readl(dev, DW_IC_RXFLR) ++ && 0 == dev->rx_outstanding) { ++ dw_readl(dev, DW_IC_CLR_STOP_DET); ++ complete(&dev->cmd_complete); ++ } ++ + tx_aborted: +- if ((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || dev->msg_err) ++ if ((stat & (DW_IC_INTR_TX_ABRT)) || dev->msg_err) + complete(&dev->cmd_complete); + + return IRQ_HANDLED; +diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h +index 9c1840e..691aff8 100644 +--- a/drivers/i2c/busses/i2c-designware-core.h ++++ b/drivers/i2c/busses/i2c-designware-core.h +@@ -34,6 +34,14 @@ + #define DW_IC_CON_RESTART_EN 0x20 + #define DW_IC_CON_SLAVE_DISABLE 0x40 + ++struct dw_pci_controller { ++ u32 bus_num; ++ u32 bus_cfg; ++ u32 tx_fifo_depth; ++ u32 rx_fifo_depth; ++ u32 clk_khz; ++ u8 explicit_stop; ++}; + + /** + * struct dw_i2c_dev - private i2c-designware data +@@ -60,6 +68,8 @@ + * @adapter: i2c subsystem adapter node + * @tx_fifo_depth: depth of the hardware tx fifo + * @rx_fifo_depth: depth of the hardware rx fifo ++ * @rx_outstanding: current outstanding master-receiver bytes in TX FIFO ++ * @explicit_stop: set to 1 if hardware requires explicit stop bit transmission + */ + struct dw_i2c_dev { + struct device *dev; +@@ -88,6 +98,8 @@ struct dw_i2c_dev { + u32 master_cfg; + unsigned int tx_fifo_depth; + unsigned int rx_fifo_depth; ++ int rx_outstanding; ++ u8 explicit_stop; + }; + + #define ACCESS_SWAP 0x00000001 +diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c +index 6add851..62ad7dc 100644 +--- a/drivers/i2c/busses/i2c-designware-pcidrv.c ++++ b/drivers/i2c/busses/i2c-designware-pcidrv.c +@@ -56,14 +56,6 @@ enum dw_pci_ctl_id_t { + medfield_5, + }; + +-struct dw_pci_controller { +- u32 bus_num; +- u32 bus_cfg; +- u32 tx_fifo_depth; +- u32 rx_fifo_depth; +- u32 clk_khz; +-}; +- + #define INTEL_MID_STD_CFG (DW_IC_CON_MASTER | \ + DW_IC_CON_SLAVE_DISABLE | \ + DW_IC_CON_RESTART_EN) +@@ -75,6 +67,7 @@ static struct dw_pci_controller dw_pci_controllers[] = { + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 25000, ++ .explicit_stop = 0, + }, + [moorestown_1] = { + .bus_num = 1, +@@ -82,6 +75,7 @@ static struct dw_pci_controller dw_pci_controllers[] = { + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 25000, ++ .explicit_stop = 0, + }, + [moorestown_2] = { + .bus_num = 2, +@@ -89,6 +83,7 @@ static struct dw_pci_controller dw_pci_controllers[] = { + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 25000, ++ .explicit_stop = 0, + }, + [medfield_0] = { + .bus_num = 0, +@@ -96,6 +91,7 @@ static struct dw_pci_controller dw_pci_controllers[] = { + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 25000, ++ .explicit_stop = 0, + }, + [medfield_1] = { + .bus_num = 1, +@@ -103,6 +99,7 @@ static struct dw_pci_controller dw_pci_controllers[] = { + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 25000, ++ .explicit_stop = 0, + }, + [medfield_2] = { + .bus_num = 2, +@@ -110,6 +107,7 @@ static struct dw_pci_controller dw_pci_controllers[] = { + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 25000, ++ .explicit_stop = 0, + }, + [medfield_3] = { + .bus_num = 3, +@@ -117,6 +115,7 @@ static struct dw_pci_controller dw_pci_controllers[] = { + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 25000, ++ .explicit_stop = 0, + }, + [medfield_4] = { + .bus_num = 4, +@@ -124,6 +123,7 @@ static struct dw_pci_controller dw_pci_controllers[] = { + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 25000, ++ .explicit_stop = 0, + }, + [medfield_5] = { + .bus_num = 5, +@@ -131,6 +131,7 @@ static struct dw_pci_controller dw_pci_controllers[] = { + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 25000, ++ .explicit_stop = 0, + }, + }; + static struct i2c_algorithm i2c_dw_algo = { +@@ -282,6 +283,7 @@ const struct pci_device_id *id) + + dev->tx_fifo_depth = controller->tx_fifo_depth; + dev->rx_fifo_depth = controller->rx_fifo_depth; ++ dev->explicit_stop = controller->explicit_stop; + r = i2c_dw_init(dev); + if (r) + goto err_iounmap; +diff --git a/drivers/iio/accel/Kconfig b/drivers/iio/accel/Kconfig +index 05e996f..168989b 100644 +--- a/drivers/iio/accel/Kconfig ++++ b/drivers/iio/accel/Kconfig +@@ -3,15 +3,12 @@ + # + menu "Accelerometers" + +-config HID_SENSOR_ACCEL_3D +- depends on HID_SENSOR_HUB +- select IIO_BUFFER +- select IIO_TRIGGERED_BUFFER +- select HID_SENSOR_IIO_COMMON +- select HID_SENSOR_IIO_TRIGGER +- tristate "HID Accelerometers 3D" +- help +- Say yes here to build support for the HID SENSOR +- accelerometers 3D. ++config IIO_LIS331DLH_INTEL_CLN ++ tristate "STMicroelectronics LIS331DLH accelerometer i2c driver for Intel Clanton platform" ++ depends on INTEL_QUARK_X1000_SOC ++ depends on I2C && SYSFS ++ select IIO_ST_SENSORS_CORE ++ help ++ Selects the LIS331DLH accelerometer driver for the Intel Clanton Hill platform + + endmenu +diff --git a/drivers/iio/accel/Makefile b/drivers/iio/accel/Makefile +index 5bc6855..c82ce57 100644 +--- a/drivers/iio/accel/Makefile ++++ b/drivers/iio/accel/Makefile +@@ -1,5 +1,4 @@ + # + # Makefile for industrial I/O accelerometer drivers + # +- +-obj-$(CONFIG_HID_SENSOR_ACCEL_3D) += hid-sensor-accel-3d.o ++obj-$(CONFIG_IIO_LIS331DLH_INTEL_CLN) += lis331dlh_intel_cln.o +diff --git a/drivers/iio/accel/hid-sensor-accel-3d.c b/drivers/iio/accel/hid-sensor-accel-3d.c +index 0b0c3c6..563a2fe 100644 +--- a/drivers/iio/accel/hid-sensor-accel-3d.c ++++ b/drivers/iio/accel/hid-sensor-accel-3d.c +@@ -45,6 +45,7 @@ enum accel_3d_channel { + struct accel_3d_state { + struct hid_sensor_hub_callbacks callbacks; + struct hid_sensor_iio_common common_attributes; ++ struct hid_sensor_common common_attributes; + struct hid_sensor_hub_attribute_info accel[ACCEL_3D_CHANNEL_MAX]; + u32 accel_val[ACCEL_3D_CHANNEL_MAX]; + }; +diff --git a/drivers/iio/accel/lis331dlh_intel_cln.c b/drivers/iio/accel/lis331dlh_intel_cln.c +new file mode 100644 +index 0000000..57998d0 +--- /dev/null ++++ b/drivers/iio/accel/lis331dlh_intel_cln.c +@@ -0,0 +1,675 @@ ++/* ++ * Intel Clanton Hill platform accelerometer driver ++ * ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ * ++ * Derived from STMicroelectronics accelerometers driver by Denis Ciocca ++ * ++ * The Intel Clanton Hill platform hardware design includes an ++ * STMicroelectronics LIS331DLH accelerometer, intended to be used mainly for ++ * sensing orientation, movement and sudden impacts (e.g. vehicle collision) ++ * ++ * This driver plugs into the Linux Industrial-IO framework to provide a ++ * standardised user-space application interface for retreiving data and events ++ * from the accelerometer. ++ * ++ * The LIS331DLH is connected via I2C to the host CPU on the Clanton Hill ++ * platform and so this driver registers to the kernel as an I2C device driver ++ */ ++ ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/slab.h> ++#include <linux/errno.h> ++#include <linux/types.h> ++#include <linux/mutex.h> ++#include <linux/interrupt.h> ++#include <linux/i2c.h> ++#include <linux/gpio.h> ++#include <linux/irq.h> ++#include <linux/iio/iio.h> ++#include <linux/iio/sysfs.h> ++#include <linux/iio/trigger.h> ++#include <linux/iio/buffer.h> ++ ++#include <linux/iio/common/st_sensors.h> ++#include <linux/iio/common/st_sensors_i2c.h> ++ ++#include <linux/platform_data/lis331dlh_intel_cln.h> ++ ++/* DEFAULT VALUE FOR SENSORS */ ++#define ST_ACCEL_DEFAULT_OUT_X_L_ADDR 0x28 ++#define ST_ACCEL_DEFAULT_OUT_Y_L_ADDR 0x2a ++#define ST_ACCEL_DEFAULT_OUT_Z_L_ADDR 0x2c ++ ++/* FULLSCALE */ ++#define ST_ACCEL_FS_AVL_2G 2 ++#define ST_ACCEL_FS_AVL_4G 4 ++#define ST_ACCEL_FS_AVL_6G 6 ++#define ST_ACCEL_FS_AVL_8G 8 ++#define ST_ACCEL_FS_AVL_16G 16 ++ ++/* CUSTOM VALUES FOR SENSOR 2 */ ++#define ST_ACCEL_2_WAI_EXP 0x32 ++#define ST_ACCEL_2_ODR_ADDR 0x20 ++#define ST_ACCEL_2_ODR_MASK 0x18 ++#define ST_ACCEL_2_ODR_AVL_50HZ_VAL 0x00 ++#define ST_ACCEL_2_ODR_AVL_100HZ_VAL 0x01 ++#define ST_ACCEL_2_ODR_AVL_400HZ_VAL 0x02 ++#define ST_ACCEL_2_ODR_AVL_1000HZ_VAL 0x03 ++#define ST_ACCEL_2_PW_ADDR 0x20 ++#define ST_ACCEL_2_PW_MASK 0xe0 ++#define ST_ACCEL_2_PW_DOWN 0x00 ++#define ST_ACCEL_2_PW_NORMAL 0x20 ++#define ST_ACCEL_2_CTRL_REG1_XEN 0x01 ++#define ST_ACCEL_2_CTRL_REG1_YEN 0x02 ++#define ST_ACCEL_2_CTRL_REG1_ZEN 0x04 ++#define ST_ACCEL_2_FS_ADDR 0x23 ++#define ST_ACCEL_2_FS_MASK 0x30 ++#define ST_ACCEL_2_FS_AVL_2_VAL 0X00 ++#define ST_ACCEL_2_FS_AVL_4_VAL 0X01 ++#define ST_ACCEL_2_FS_AVL_8_VAL 0x03 ++#define ST_ACCEL_2_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000) ++#define ST_ACCEL_2_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000) ++#define ST_ACCEL_2_FS_AVL_8_GAIN IIO_G_TO_M_S_2(3900) ++#define ST_ACCEL_2_BDU_ADDR 0x23 ++#define ST_ACCEL_2_BDU_MASK 0x80 ++#define ST_ACCEL_2_DRDY_IRQ_ADDR 0x22 ++#define ST_ACCEL_2_DRDY_IRQ_MASK 0x02 ++#define ST_ACCEL_2_THRESH_IRQ_ADDR 0x30 ++#define ST_ACCEL_2_THRESH_IRQ_MASK 0x7f ++#define ST_ACCEL_2_INT1_CFG_ADDR 0x30 ++#define ST_ACCEL_2_INT1_SRC_ADDR 0x31 ++#define ST_ACCEL_2_INT1_THRESH_ADDR 0x32 ++#define ST_ACCEL_2_INT1_DURATION_ADDR 0x33 ++#define ST_ACCEL_2_INT2_CFG_ADDR 0x34 ++#define ST_ACCEL_2_INT2_SRC_ADDR 0x35 ++#define ST_ACCEL_2_INT2_THRESH_ADDR 0x36 ++#define ST_ACCEL_2_INT2_DURATION_ADDR 0x37 ++#define ST_ACCEL_2_INT_IA_MASK 0x40 ++#define ST_ACCEL_2_INT_LIR_MASK 0x05 ++#define ST_ACCEL_2_INT_SRC_HIGH_MASK 0x20 ++#define ST_ACCEL_2_INT_CFG_XLIE_EN 0x01 ++#define ST_ACCEL_2_INT_CFG_XHIE_EN 0x02 ++#define ST_ACCEL_2_INT_CFG_YLIE_EN 0x04 ++#define ST_ACCEL_2_INT_CFG_YHIE_EN 0x08 ++#define ST_ACCEL_2_INT_CFG_ZLIE_EN 0x10 ++#define ST_ACCEL_2_INT_CFG_ZHIE_EN 0x20 ++ ++#define ST_ACCEL_2_MULTIREAD_BIT true ++#define CLN_ACCEL_INT2_WAKEUP_THRESH_VAL 0x7f ++ ++static const u8 iio_modifier_map[] = { ++ IIO_NO_MOD, ++ IIO_MOD_X, ++ IIO_MOD_Y, ++ IIO_MOD_X_AND_Y, ++ IIO_MOD_Z, ++ IIO_MOD_X_AND_Z, ++ IIO_MOD_Y_AND_Z, ++ IIO_MOD_X_AND_Y_AND_Z, ++}; ++ ++/* Threshold event ISR bottom half. This function reads interrupt status ++ * registers for INT1 to reset any active interrupt conditions ++ * and pushes an IIO event if a threshold interrupt was active. ++ */ ++static irqreturn_t lis331dlh_intel_cln_threshold_event_handler( ++ int irq, ++ void *private) ++{ ++ int err; ++ u8 data; ++ u8 mask; ++ int i; ++ u64 iio_modifier; ++ ++ struct st_sensor_data *sdata = iio_priv(private); ++ s64 timestamp = iio_get_time_ns(); ++ err = sdata->tf->read_byte(&sdata->tb, sdata->dev, ++ ST_ACCEL_2_INT1_SRC_ADDR, ++ &data); ++ ++ if (err < 0) ++ goto st_sensors_read_err; ++ ++ err = sdata->tf->read_byte(&sdata->tb, sdata->dev, ++ ST_ACCEL_2_INT1_CFG_ADDR, ++ &mask); ++ ++ if (err < 0) ++ goto st_sensors_read_err; ++ ++ if (data & ST_ACCEL_2_INT_IA_MASK) { ++ data &= mask; ++ ++ iio_modifier = 0; ++ for (i = 0; i < ST_SENSORS_NUMBER_DATA_CHANNELS; i++) { ++ iio_modifier <<= 1; ++ iio_modifier += !!(data & ST_ACCEL_2_INT_SRC_HIGH_MASK); ++ data <<= 2; ++ } ++ ++ iio_modifier = iio_modifier_map[iio_modifier]; ++ ++ iio_push_event(private, ++ IIO_EVENT_CODE(IIO_ACCEL, ++ 0, /* non differential */ ++ iio_modifier, ++ IIO_EV_TYPE_THRESH, ++ IIO_EV_DIR_RISING, 0, 0, 0), ++ timestamp); ++ } ++ ++st_sensors_read_err: ++ return IRQ_HANDLED; ++} ++ ++static int lis331dlh_intel_cln_read_raw( ++ struct iio_dev *indio_dev, ++ struct iio_chan_spec const *ch, ++ int *val, int *val2, long mask) ++{ ++ int err; ++ struct st_sensor_data *adata = iio_priv(indio_dev); ++ ++ switch (mask) { ++ case IIO_CHAN_INFO_RAW: ++ err = st_sensors_read_info_raw(indio_dev, ch, val); ++ if (err < 0) ++ goto read_error; ++ ++ return IIO_VAL_INT; ++ case IIO_CHAN_INFO_SCALE: ++ *val = 0; ++ *val2 = adata->current_fullscale->gain; ++ return IIO_VAL_INT_PLUS_MICRO; ++ default: ++ return -EINVAL; ++ } ++ ++read_error: ++ return err; ++} ++ ++static int lis331dlh_intel_cln_write_raw( ++ struct iio_dev *indio_dev, ++ struct iio_chan_spec const *chan, ++ int val, int val2, long mask) ++{ ++ int err; ++ ++ switch (mask) { ++ case IIO_CHAN_INFO_SCALE: ++ err = st_sensors_set_fullscale_by_gain(indio_dev, val2); ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return err; ++} ++ ++ ++static ST_SENSOR_DEV_ATTR_SAMP_FREQ(); ++static ST_SENSORS_DEV_ATTR_SAMP_FREQ_AVAIL(); ++static ST_SENSORS_DEV_ATTR_SCALE_AVAIL(in_accel_scale_available); ++ ++static struct attribute *lis331dlh_intel_cln_attributes[] = { ++ &iio_dev_attr_sampling_frequency_available.dev_attr.attr, ++ &iio_dev_attr_in_accel_scale_available.dev_attr.attr, ++ &iio_dev_attr_sampling_frequency.dev_attr.attr, ++ NULL, ++}; ++ ++static const struct attribute_group lis331dlh_intel_cln_attribute_group = { ++ .attrs = lis331dlh_intel_cln_attributes, ++}; ++ ++static int lis331dlh_intel_cln_read_event_value( ++ struct iio_dev *indio_dev, ++ u64 event_code, ++ int *val) ++{ ++ int err; ++ u8 data; ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ err = sdata->tf->read_byte(&sdata->tb, sdata->dev, ++ ST_ACCEL_2_INT1_THRESH_ADDR, &data); ++ ++ *val = (int) data; ++ return err; ++} ++ ++static int lis331dlh_intel_cln_write_event_value( ++ struct iio_dev *indio_dev, ++ u64 event_code, ++ int val) ++{ ++ int err; ++ struct st_sensor_data *sdata; ++ ++ /* range check */ ++ if ((val < 0) || (val > 0x7f)) ++ return -EINVAL; ++ ++ sdata = iio_priv(indio_dev); ++ ++ err = sdata->tf->write_byte(&sdata->tb, sdata->dev, ++ ST_ACCEL_2_INT1_THRESH_ADDR, val); ++ ++ return err; ++ ++} ++ ++/* Configure the INT1 pin to fire an interrupt on a high threshold event. ++ */ ++static int lis331dlh_intel_cln_configure_threshold_interrupt( ++ struct iio_dev *indio_dev, bool state) ++{ ++ int err = 0; ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ if (sdata->int_thresh == state) ++ return 0; ++ ++ if (state) { ++ err = request_threaded_irq(sdata->get_irq_data_ready(indio_dev), ++ NULL, ++ lis331dlh_intel_cln_threshold_event_handler, ++ IRQF_TRIGGER_RISING | IRQF_ONESHOT, ++ "lis331dlh_intel_cln_threshold", ++ indio_dev); ++ if (err == 0) { ++ sdata->int_thresh = true; ++ err = sdata->tf->write_byte( ++ &sdata->tb, sdata->dev, ++ ST_ACCEL_2_INT1_DURATION_ADDR, 1); ++ } ++ } else { ++ free_irq(sdata->get_irq_data_ready(indio_dev), indio_dev); ++ sdata->int_thresh = false; ++ } ++ ++ return err; ++} ++ ++static int lis331dlh_intel_cln_read_event_config( ++ struct iio_dev *indio_dev, ++ u64 event_code) ++{ ++ int err = 0; ++ u8 data, mask; ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ err = sdata->tf->read_byte(&sdata->tb, sdata->dev, ++ ST_ACCEL_2_INT1_CFG_ADDR, ++ &data); ++ ++ mask = 1 << ((IIO_EVENT_CODE_EXTRACT_MODIFIER(event_code) << 1) - 1); ++ ++ return !!(data & mask); ++} ++ ++static int lis331dlh_intel_cln_write_event_config( ++ struct iio_dev *indio_dev, ++ u64 event_code, ++ int state) ++{ ++ int err; ++ u8 data; ++ u8 mask; ++ ++ bool new_int_state; ++ ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ mask = 1 << ((IIO_EVENT_CODE_EXTRACT_MODIFIER(event_code) << 1) - 1); ++ ++ err = st_sensors_write_data_with_mask(indio_dev, ++ ST_ACCEL_2_INT1_CFG_ADDR, ++ mask, state); ++ ++ if (err == 0) ++ err = sdata->tf->read_byte(&sdata->tb, sdata->dev, ++ ST_ACCEL_2_INT1_CFG_ADDR, &data); ++ ++ if (err == 0) { ++ new_int_state = data & (ST_ACCEL_2_INT_CFG_XHIE_EN | ++ ST_ACCEL_2_INT_CFG_YHIE_EN | ++ ST_ACCEL_2_INT_CFG_ZHIE_EN); ++ err = lis331dlh_intel_cln_configure_threshold_interrupt( ++ indio_dev, new_int_state); ++ } ++ ++ return err; ++} ++ ++/* Configure the INT2 pin to fire an interrupt on a threshold high event. INT2 ++ * should be wired to a suspend well IRQ to wake up the host. ++ */ ++static int lis331dlh_intel_cln_enable_wakeup_interrupt( ++ struct iio_dev *indio_dev) ++{ ++ int err = 0; ++ u8 data; ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ if (err == 0) ++ err = sdata->tf->write_byte(&sdata->tb, sdata->dev, ++ ST_ACCEL_2_INT2_THRESH_ADDR, ++ CLN_ACCEL_INT2_WAKEUP_THRESH_VAL); ++ ++ /* Latch interrupt request on INT2 */ ++ if (err == 0) ++ err = st_sensors_write_data_with_mask( ++ indio_dev, ST_ACCEL_2_DRDY_IRQ_ADDR, ++ ST_ACCEL_2_INT_LIR_MASK, 1); ++ ++ if (err == 0) ++ err = sdata->tf->write_byte(&sdata->tb, sdata->dev, ++ ST_ACCEL_2_INT2_DURATION_ADDR, 0); ++ ++ if (err == 0) ++ err = sdata->tf->write_byte(&sdata->tb, sdata->dev, ++ ST_ACCEL_2_INT2_CFG_ADDR, ++ ST_ACCEL_2_INT_CFG_XHIE_EN | ++ ST_ACCEL_2_INT_CFG_YHIE_EN); ++ ++ /* Clean ST_ACCEL_2_INT2_SRC */ ++ if (err == 0) ++ err = sdata->tf->read_byte(&sdata->tb, sdata->dev, ++ ST_ACCEL_2_INT2_SRC_ADDR, ++ &data); ++ ++ return err; ++} ++ ++static int lis331dlh_intel_cln_disable_wakeup_interrupt( ++ struct iio_dev *indio_dev) ++{ ++ int err = 0; ++ u8 data; ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ if (err == 0) ++ err = sdata->tf->write_byte(&sdata->tb, sdata->dev, ++ ST_ACCEL_2_INT2_CFG_ADDR, ++ 0); ++ ++ /* Clean ST_ACCEL_2_INT2_SRC */ ++ if (err == 0) ++ err = sdata->tf->read_byte(&sdata->tb, sdata->dev, ++ ST_ACCEL_2_INT2_SRC_ADDR, ++ &data); ++ ++ return err; ++} ++ ++static int lis331dlh_intel_cln_handle_wakeup_interrupt( ++ struct iio_dev *indio_dev) ++{ ++ int err; ++ u8 data; ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ s64 timestamp = iio_get_time_ns(); ++ ++ err = sdata->tf->read_byte(&sdata->tb, sdata->dev, ++ ST_ACCEL_2_INT2_SRC_ADDR, ++ &data); ++ ++ if (err == 0) ++ if (data & ST_ACCEL_2_INT_IA_MASK) { ++ iio_push_event(indio_dev, ++ IIO_EVENT_CODE(IIO_ACCEL, ++ 0, /* non differential */ ++ IIO_MOD_X_OR_Y_OR_Z, ++ IIO_EV_TYPE_THRESH, ++ IIO_EV_DIR_EITHER, 0, 0, 0), ++ timestamp); ++ } ++ ++ return err; ++} ++ ++static const struct iio_info accel_info = { ++ .driver_module = THIS_MODULE, ++ .attrs = &lis331dlh_intel_cln_attribute_group, ++ .read_raw = &lis331dlh_intel_cln_read_raw, ++ .write_raw = &lis331dlh_intel_cln_write_raw, ++ .read_event_config = &lis331dlh_intel_cln_read_event_config, ++ .write_event_config = &lis331dlh_intel_cln_write_event_config, ++ .read_event_value = &lis331dlh_intel_cln_read_event_value, ++ .write_event_value = &lis331dlh_intel_cln_write_event_value, ++}; ++ ++static const struct iio_chan_spec st_accel_12bit_channels[] = { ++ ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, ST_SENSORS_SCAN_X, IIO_MOD_X, IIO_LE, ++ ST_SENSORS_DEFAULT_12_REALBITS, ST_ACCEL_DEFAULT_OUT_X_L_ADDR), ++ ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, ST_SENSORS_SCAN_Y, IIO_MOD_Y, IIO_LE, ++ ST_SENSORS_DEFAULT_12_REALBITS, ST_ACCEL_DEFAULT_OUT_Y_L_ADDR), ++ ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, ST_SENSORS_SCAN_Z, IIO_MOD_Z, IIO_LE, ++ ST_SENSORS_DEFAULT_12_REALBITS, ST_ACCEL_DEFAULT_OUT_Z_L_ADDR), ++ IIO_CHAN_SOFT_TIMESTAMP(3) ++}; ++ ++static struct st_sensors lis331dlh_intel_cln_sensor = { ++ .wai = ST_ACCEL_2_WAI_EXP, ++ .sensors_supported = { ++ [0] = "lis331dlh_cln", ++ }, ++ .ch = (struct iio_chan_spec *)st_accel_12bit_channels, ++ .odr = { ++ .addr = ST_ACCEL_2_ODR_ADDR, ++ .mask = ST_ACCEL_2_ODR_MASK, ++ .odr_avl = { ++ { 50, ST_ACCEL_2_ODR_AVL_50HZ_VAL, }, ++ { 100, ST_ACCEL_2_ODR_AVL_100HZ_VAL, }, ++ { 400, ST_ACCEL_2_ODR_AVL_400HZ_VAL, }, ++ { 1000, ST_ACCEL_2_ODR_AVL_1000HZ_VAL, }, ++ }, ++ }, ++ .pw = { ++ .addr = ST_ACCEL_2_PW_ADDR, ++ .mask = ST_ACCEL_2_PW_MASK, ++ .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE, ++ .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, ++ }, ++ .enable_axis = { ++ .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, ++ .mask = ST_SENSORS_DEFAULT_AXIS_MASK, ++ }, ++ .fs = { ++ .addr = ST_ACCEL_2_FS_ADDR, ++ .mask = ST_ACCEL_2_FS_MASK, ++ .fs_avl = { ++ [0] = { ++ .num = ST_ACCEL_FS_AVL_2G, ++ .value = ST_ACCEL_2_FS_AVL_2_VAL, ++ .gain = ST_ACCEL_2_FS_AVL_2_GAIN, ++ }, ++ [1] = { ++ .num = ST_ACCEL_FS_AVL_4G, ++ .value = ST_ACCEL_2_FS_AVL_4_VAL, ++ .gain = ST_ACCEL_2_FS_AVL_4_GAIN, ++ }, ++ [2] = { ++ .num = ST_ACCEL_FS_AVL_8G, ++ .value = ST_ACCEL_2_FS_AVL_8_VAL, ++ .gain = ST_ACCEL_2_FS_AVL_8_GAIN, ++ }, ++ }, ++ }, ++ .bdu = { ++ .addr = ST_ACCEL_2_BDU_ADDR, ++ .mask = ST_ACCEL_2_BDU_MASK, ++ }, ++ .drdy_irq = { ++ .addr = ST_ACCEL_2_DRDY_IRQ_ADDR, ++ .mask = ST_ACCEL_2_DRDY_IRQ_MASK, ++ }, ++ .multi_read_bit = ST_ACCEL_2_MULTIREAD_BIT, ++ .bootime = 2, ++}; ++ ++static int lis331dlh_intel_cln_probe( ++ struct i2c_client *client, ++ const struct i2c_device_id *id) ++{ ++ struct iio_dev *indio_dev; ++ struct st_sensor_data *adata; ++ struct lis331dlh_intel_cln_platform_data *pdata; ++ int ret = 0; ++ ++ indio_dev = iio_device_alloc(sizeof(*adata)); ++ if (indio_dev == NULL) { ++ ret = -ENOMEM; ++ goto iio_device_alloc_error; ++ } ++ ++ i2c_set_clientdata(client, indio_dev); ++ indio_dev->dev.parent = &client->dev; ++ indio_dev->name = client->name; ++ ++ adata = iio_priv(indio_dev); ++ adata->dev = &client->dev; ++ ++ pdata = client->dev.platform_data; ++ if (!pdata) { ++ pr_err("No platform data provided\n"); ++ goto lis331dlh_intel_cln_init_err; ++ } ++ ++ ret = gpio_to_irq(pdata->irq1_pin); ++ if (ret < 0) { ++ pr_err( ++ "Failed to obtain valid IRQ for GPIO %d, " ++ "gpio_to_irq returned %d\n", ++ pdata->irq1_pin, ret); ++ goto lis331dlh_intel_cln_init_err; ++ } ++ to_i2c_client(adata->dev)->irq = ret; ++ ++ st_sensors_i2c_configure(indio_dev, client, adata); ++ ++ indio_dev->modes = INDIO_DIRECT_MODE; ++ indio_dev->info = &accel_info; ++ ++ ret = st_sensors_check_device_support(indio_dev, ++ 1, &lis331dlh_intel_cln_sensor); ++ if (ret < 0) ++ goto lis331dlh_intel_cln_init_err; ++ ++ indio_dev->channels = adata->sensor->ch; ++ indio_dev->num_channels = ST_SENSORS_NUMBER_ALL_CHANNELS; ++ ++ adata->multiread_bit = adata->sensor->multi_read_bit; ++ adata->current_fullscale = (struct st_sensor_fullscale_avl *) ++ &adata->sensor->fs.fs_avl[0]; ++ adata->odr = adata->sensor->odr.odr_avl[0].hz; ++ adata->int_thresh = false; ++ ++ ret = st_sensors_init_sensor(indio_dev); ++ if (ret < 0) ++ goto lis331dlh_intel_cln_init_err; ++ ++ ret = iio_device_register(indio_dev); ++ if (ret) ++ goto lis331dlh_intel_cln_init_err; ++ ++ return 0; ++ ++lis331dlh_intel_cln_init_err: ++ iio_device_free(indio_dev); ++iio_device_alloc_error: ++ return ret; ++} ++ ++static int lis331dlh_intel_cln_remove( ++ struct i2c_client *client) ++{ ++ struct iio_dev *indio_dev = i2c_get_clientdata(client); ++ struct st_sensor_data *adata = iio_priv(indio_dev); ++ ++ st_sensors_set_enable(indio_dev, false); ++ ++ if (adata->int_thresh) ++ free_irq(adata->get_irq_data_ready(indio_dev), indio_dev); ++ ++ iio_device_unregister(indio_dev); ++ ++ iio_device_free(indio_dev); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int lis331dlh_intel_cln_suspend( ++ struct device *dev) ++{ ++ struct iio_dev *indio_dev = dev_get_drvdata(dev); ++ ++ lis331dlh_intel_cln_enable_wakeup_interrupt(indio_dev); ++ ++ return 0; ++} ++ ++static int lis331dlh_intel_cln_resume( ++ struct device *dev) ++{ ++ struct iio_dev *indio_dev = dev_get_drvdata(dev); ++ ++ lis331dlh_intel_cln_handle_wakeup_interrupt(indio_dev); ++ lis331dlh_intel_cln_disable_wakeup_interrupt(indio_dev); ++ ++ return 0; ++} ++ ++static const struct dev_pm_ops lis331dlh_intel_cln_pm_ops = { ++ .suspend = lis331dlh_intel_cln_suspend, ++ .resume = lis331dlh_intel_cln_resume, ++}; ++ ++#define LIS331DLH_INTEL_CLN_PM_OPS (&lis331dlh_intel_cln_pm_ops) ++#else ++#define LIS331DLH_INTEL_CLN_PM_OPS NULL ++#endif ++ ++static const struct i2c_device_id lis331dlh_intel_cln_id_table[] = { ++ { "lis331dlh_cln" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(i2c, lis331dlh_intel_cln_id_table); ++ ++static struct i2c_driver lis331dlh_intel_cln_driver = { ++ .driver = { ++ .owner = THIS_MODULE, ++ .name = "lis331dlh_cln", ++ .pm = LIS331DLH_INTEL_CLN_PM_OPS, ++ }, ++ .probe = lis331dlh_intel_cln_probe, ++ .remove = lis331dlh_intel_cln_remove, ++ .id_table = lis331dlh_intel_cln_id_table, ++}; ++ ++module_i2c_driver(lis331dlh_intel_cln_driver); ++ ++MODULE_AUTHOR("Wojciech Ziemba <wojciech.ziemba@emutex.com>"); ++MODULE_DESCRIPTION("STMicroelectronics LIS331DLH accelerometer i2c driver for Intel Clanton platform"); ++MODULE_LICENSE("GPL v2"); +diff --git a/drivers/iio/adc/ad7298.c b/drivers/iio/adc/ad7298.c +index b34d754..60491e4 100644 +--- a/drivers/iio/adc/ad7298.c ++++ b/drivers/iio/adc/ad7298.c +@@ -33,7 +33,6 @@ + #define AD7298_TAVG (1 << 1) /* temperature sensor averaging enable */ + #define AD7298_PDD (1 << 0) /* partial power down enable */ + +-#define AD7298_MAX_CHAN 8 + #define AD7298_BITS 12 + #define AD7298_STORAGE_BITS 16 + #define AD7298_INTREF_mV 2500 +@@ -46,6 +45,7 @@ struct ad7298_state { + struct spi_device *spi; + struct regulator *reg; + unsigned ext_ref; ++ u16 ext_vin_max[AD7298_MAX_CHAN]; + struct spi_transfer ring_xfer[10]; + struct spi_transfer scan_single_xfer[3]; + struct spi_message ring_msg; +@@ -64,7 +64,7 @@ struct ad7298_state { + .indexed = 1, \ + .channel = index, \ + .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ +- IIO_CHAN_INFO_SCALE_SHARED_BIT, \ ++ IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \ + .address = index, \ + .scan_index = index, \ + .scan_type = { \ +@@ -269,7 +269,10 @@ static int ad7298_read_raw(struct iio_dev *indio_dev, + case IIO_CHAN_INFO_SCALE: + switch (chan->type) { + case IIO_VOLTAGE: +- *val = ad7298_get_ref_voltage(st); ++ if (st->ext_vin_max[chan->channel]) ++ *val = st->ext_vin_max[chan->channel]; ++ else ++ *val = ad7298_get_ref_voltage(st); + *val2 = chan->scan_type.realbits; + return IIO_VAL_FRACTIONAL_LOG2; + case IIO_TEMP: +@@ -304,8 +307,15 @@ static int ad7298_probe(struct spi_device *spi) + + st = iio_priv(indio_dev); + +- if (pdata && pdata->ext_ref) +- st->ext_ref = AD7298_EXTREF; ++ if (pdata) { ++ int i; ++ ++ if (pdata->ext_ref) ++ st->ext_ref = AD7298_EXTREF; ++ ++ for (i = 0; i < AD7298_MAX_CHAN; i++) ++ st->ext_vin_max[i] = pdata->ext_vin_max[i]; ++ } + + if (st->ext_ref) { + st->reg = regulator_get(&spi->dev, "vref"); +diff --git a/drivers/iio/common/Kconfig b/drivers/iio/common/Kconfig +index ed45ee5..3c77727 100644 +--- a/drivers/iio/common/Kconfig ++++ b/drivers/iio/common/Kconfig +@@ -2,4 +2,4 @@ + # IIO common modules + # + +-source "drivers/iio/common/hid-sensors/Kconfig" ++source "drivers/iio/common/st_sensors/Kconfig" +\ No newline at end of file +diff --git a/drivers/iio/common/Makefile b/drivers/iio/common/Makefile +index 8158400..4d22a20 100644 +--- a/drivers/iio/common/Makefile ++++ b/drivers/iio/common/Makefile +@@ -6,4 +6,4 @@ + # instead of duplicating in each module. + # + +-obj-y += hid-sensors/ ++obj-y += st_sensors/ +\ No newline at end of file +diff --git a/drivers/iio/common/st_sensors/Kconfig b/drivers/iio/common/st_sensors/Kconfig +new file mode 100644 +index 0000000..d1b474a +--- /dev/null ++++ b/drivers/iio/common/st_sensors/Kconfig +@@ -0,0 +1,20 @@ ++# ++# STMicroelectronics sensors common library ++# ++ ++menu "STMicro sensors" ++config IIO_ST_SENSORS_I2C ++ tristate "IIO ST SENSORS" ++ help ++ Enable SENSORS I2C option ++ ++config IIO_ST_SENSORS_SPI ++ tristate "IIO SENSORS SPI" ++ help ++ Enable IIO_ST_SENSORS_SPI ++ ++config IIO_ST_SENSORS_CORE ++ tristate "IIO SENSORS CORE" ++ select IIO_ST_SENSORS_I2C if I2C ++ select IIO_ST_SENSORS_SPI if SPI_MASTER ++endmenu +diff --git a/drivers/iio/common/st_sensors/Makefile b/drivers/iio/common/st_sensors/Makefile +new file mode 100644 +index 0000000..9f3e24f +--- /dev/null ++++ b/drivers/iio/common/st_sensors/Makefile +@@ -0,0 +1,10 @@ ++# ++# Makefile for the STMicroelectronics sensor common modules. ++# ++ ++obj-$(CONFIG_IIO_ST_SENSORS_I2C) += st_sensors_i2c.o ++obj-$(CONFIG_IIO_ST_SENSORS_SPI) += st_sensors_spi.o ++obj-$(CONFIG_IIO_ST_SENSORS_CORE) += st_sensors.o ++st_sensors-y := st_sensors_core.o ++st_sensors-$(CONFIG_IIO_BUFFER) += st_sensors_buffer.o ++st_sensors-$(CONFIG_IIO_TRIGGER) += st_sensors_trigger.o +diff --git a/drivers/iio/common/st_sensors/st_sensors_buffer.c b/drivers/iio/common/st_sensors/st_sensors_buffer.c +new file mode 100644 +index 0000000..09b236d +--- /dev/null ++++ b/drivers/iio/common/st_sensors/st_sensors_buffer.c +@@ -0,0 +1,116 @@ ++/* ++ * STMicroelectronics sensors buffer library driver ++ * ++ * Copyright 2012-2013 STMicroelectronics Inc. ++ * ++ * Denis Ciocca <denis.ciocca@st.com> ++ * ++ * Licensed under the GPL-2. ++ */ ++ ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/slab.h> ++#include <linux/iio/iio.h> ++#include <linux/iio/trigger.h> ++#include <linux/interrupt.h> ++#include <linux/iio/buffer.h> ++#include <linux/iio/trigger_consumer.h> ++#include <linux/iio/triggered_buffer.h> ++#include <linux/irqreturn.h> ++ ++#include <linux/iio/common/st_sensors.h> ++ ++ ++int st_sensors_get_buffer_element(struct iio_dev *indio_dev, u8 *buf) ++{ ++ int i, n = 0, len; ++ u8 addr[ST_SENSORS_NUMBER_DATA_CHANNELS]; ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ for (i = 0; i < ST_SENSORS_NUMBER_DATA_CHANNELS; i++) { ++ if (test_bit(i, indio_dev->active_scan_mask)) { ++ addr[n] = indio_dev->channels[i].address; ++ n++; ++ } ++ } ++ switch (n) { ++ case 1: ++ len = sdata->tf->read_multiple_byte(&sdata->tb, sdata->dev, ++ addr[0], ST_SENSORS_BYTE_FOR_CHANNEL, buf, ++ sdata->multiread_bit); ++ break; ++ case 2: ++ if ((addr[1] - addr[0]) == ST_SENSORS_BYTE_FOR_CHANNEL) { ++ len = sdata->tf->read_multiple_byte(&sdata->tb, ++ sdata->dev, addr[0], ++ ST_SENSORS_BYTE_FOR_CHANNEL*n, ++ buf, sdata->multiread_bit); ++ } else { ++ u8 rx_array[ST_SENSORS_BYTE_FOR_CHANNEL* ++ ST_SENSORS_NUMBER_DATA_CHANNELS]; ++ len = sdata->tf->read_multiple_byte(&sdata->tb, ++ sdata->dev, addr[0], ++ ST_SENSORS_BYTE_FOR_CHANNEL* ++ ST_SENSORS_NUMBER_DATA_CHANNELS, ++ rx_array, sdata->multiread_bit); ++ if (len < 0) ++ goto read_data_channels_error; ++ ++ for (i = 0; i < n * ST_SENSORS_NUMBER_DATA_CHANNELS; ++ i++) { ++ if (i < n) ++ buf[i] = rx_array[i]; ++ else ++ buf[i] = rx_array[n + i]; ++ } ++ len = ST_SENSORS_BYTE_FOR_CHANNEL*n; ++ } ++ break; ++ case 3: ++ len = sdata->tf->read_multiple_byte(&sdata->tb, sdata->dev, ++ addr[0], ST_SENSORS_BYTE_FOR_CHANNEL* ++ ST_SENSORS_NUMBER_DATA_CHANNELS, ++ buf, sdata->multiread_bit); ++ break; ++ default: ++ len = -EINVAL; ++ goto read_data_channels_error; ++ } ++ if (len != ST_SENSORS_BYTE_FOR_CHANNEL*n) { ++ len = -EIO; ++ goto read_data_channels_error; ++ } ++ ++read_data_channels_error: ++ return len; ++} ++EXPORT_SYMBOL(st_sensors_get_buffer_element); ++ ++irqreturn_t st_sensors_trigger_handler(int irq, void *p) ++{ ++ int len; ++ struct iio_poll_func *pf = p; ++ struct iio_dev *indio_dev = pf->indio_dev; ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ len = st_sensors_get_buffer_element(indio_dev, sdata->buffer_data); ++ if (len < 0) ++ goto st_sensors_get_buffer_element_error; ++ ++ if (indio_dev->scan_timestamp) ++ *(s64 *)((u8 *)sdata->buffer_data + ++ ALIGN(len, sizeof(s64))) = pf->timestamp; ++ ++ iio_push_to_buffers(indio_dev, sdata->buffer_data); ++ ++st_sensors_get_buffer_element_error: ++ iio_trigger_notify_done(indio_dev->trig); ++ ++ return IRQ_HANDLED; ++} ++EXPORT_SYMBOL(st_sensors_trigger_handler); ++ ++MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>"); ++MODULE_DESCRIPTION("STMicroelectronics ST-sensors buffer"); ++MODULE_LICENSE("GPL v2"); +diff --git a/drivers/iio/common/st_sensors/st_sensors_core.c b/drivers/iio/common/st_sensors/st_sensors_core.c +new file mode 100644 +index 0000000..9873869 +--- /dev/null ++++ b/drivers/iio/common/st_sensors/st_sensors_core.c +@@ -0,0 +1,435 @@ ++/* ++ * STMicroelectronics sensors core library driver ++ * ++ * Copyright 2012-2013 STMicroelectronics Inc. ++ * ++ * Denis Ciocca <denis.ciocca@st.com> ++ * ++ * Licensed under the GPL-2. ++ */ ++ ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/slab.h> ++#include <linux/delay.h> ++#include <linux/iio/iio.h> ++#include <asm/unaligned.h> ++ ++#include <linux/iio/common/st_sensors.h> ++ ++ ++#define ST_SENSORS_WAI_ADDRESS 0x0f ++ ++int st_sensors_write_data_with_mask(struct iio_dev *indio_dev, ++ u8 reg_addr, u8 mask, u8 data) ++{ ++ int err; ++ u8 new_data; ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ err = sdata->tf->read_byte(&sdata->tb, sdata->dev, reg_addr, &new_data); ++ if (err < 0) ++ goto st_sensors_write_data_with_mask_error; ++ ++ new_data = ((new_data & (~mask)) | ((data << __ffs(mask)) & mask)); ++ err = sdata->tf->write_byte(&sdata->tb, sdata->dev, reg_addr, new_data); ++ ++st_sensors_write_data_with_mask_error: ++ return err; ++} ++EXPORT_SYMBOL(st_sensors_write_data_with_mask); ++ ++static int st_sensors_match_odr(struct st_sensors *sensor, ++ unsigned int odr, struct st_sensor_odr_avl *odr_out) ++{ ++ int i, ret = -EINVAL; ++ ++ for (i = 0; i < ST_SENSORS_ODR_LIST_MAX; i++) { ++ if (sensor->odr.odr_avl[i].hz == 0) ++ goto st_sensors_match_odr_error; ++ ++ if (sensor->odr.odr_avl[i].hz == odr) { ++ odr_out->hz = sensor->odr.odr_avl[i].hz; ++ odr_out->value = sensor->odr.odr_avl[i].value; ++ ret = 0; ++ break; ++ } ++ } ++ ++st_sensors_match_odr_error: ++ return ret; ++} ++ ++int st_sensors_set_odr(struct iio_dev *indio_dev, unsigned int odr) ++{ ++ int err; ++ struct st_sensor_odr_avl odr_out = {0, 0}; ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ err = st_sensors_match_odr(sdata->sensor, odr, &odr_out); ++ if (err < 0) ++ goto st_sensors_match_odr_error; ++ ++ if ((sdata->sensor->odr.addr == sdata->sensor->pw.addr) && ++ (sdata->sensor->odr.mask == sdata->sensor->pw.mask)) { ++ if (sdata->enabled == true) { ++ err = st_sensors_write_data_with_mask(indio_dev, ++ sdata->sensor->odr.addr, ++ sdata->sensor->odr.mask, ++ odr_out.value); ++ } else { ++ err = 0; ++ } ++ } else { ++ err = st_sensors_write_data_with_mask(indio_dev, ++ sdata->sensor->odr.addr, sdata->sensor->odr.mask, ++ odr_out.value); ++ } ++ if (err >= 0) ++ sdata->odr = odr_out.hz; ++ ++st_sensors_match_odr_error: ++ return err; ++} ++EXPORT_SYMBOL(st_sensors_set_odr); ++ ++static int st_sensors_match_fs(struct st_sensors *sensor, ++ unsigned int fs, int *index_fs_avl) ++{ ++ int i, ret = -EINVAL; ++ ++ for (i = 0; i < ST_SENSORS_FULLSCALE_AVL_MAX; i++) { ++ if (sensor->fs.fs_avl[i].num == 0) ++ goto st_sensors_match_odr_error; ++ ++ if (sensor->fs.fs_avl[i].num == fs) { ++ *index_fs_avl = i; ++ ret = 0; ++ break; ++ } ++ } ++ ++st_sensors_match_odr_error: ++ return ret; ++} ++ ++static int st_sensors_set_fullscale(struct iio_dev *indio_dev, unsigned int fs) ++{ ++ int err, i = 0; ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ err = st_sensors_match_fs(sdata->sensor, fs, &i); ++ if (err < 0) ++ goto st_accel_set_fullscale_error; ++ ++ err = st_sensors_write_data_with_mask(indio_dev, ++ sdata->sensor->fs.addr, ++ sdata->sensor->fs.mask, ++ sdata->sensor->fs.fs_avl[i].value); ++ if (err < 0) ++ goto st_accel_set_fullscale_error; ++ ++ sdata->current_fullscale = (struct st_sensor_fullscale_avl *) ++ &sdata->sensor->fs.fs_avl[i]; ++ return err; ++ ++st_accel_set_fullscale_error: ++ dev_err(&indio_dev->dev, "failed to set new fullscale.\n"); ++ return err; ++} ++ ++int st_sensors_set_enable(struct iio_dev *indio_dev, bool enable) ++{ ++ u8 tmp_value; ++ int err = -EINVAL; ++ bool found = false; ++ struct st_sensor_odr_avl odr_out = {0, 0}; ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ if (enable) { ++ tmp_value = sdata->sensor->pw.value_on; ++ if ((sdata->sensor->odr.addr == sdata->sensor->pw.addr) && ++ (sdata->sensor->odr.mask == sdata->sensor->pw.mask)) { ++ err = st_sensors_match_odr(sdata->sensor, ++ sdata->odr, &odr_out); ++ if (err < 0) ++ goto set_enable_error; ++ tmp_value = odr_out.value; ++ found = true; ++ } ++ err = st_sensors_write_data_with_mask(indio_dev, ++ sdata->sensor->pw.addr, ++ sdata->sensor->pw.mask, tmp_value); ++ if (err < 0) ++ goto set_enable_error; ++ ++ sdata->enabled = true; ++ ++ if (found) ++ sdata->odr = odr_out.hz; ++ } else { ++ err = st_sensors_write_data_with_mask(indio_dev, ++ sdata->sensor->pw.addr, ++ sdata->sensor->pw.mask, ++ sdata->sensor->pw.value_off); ++ if (err < 0) ++ goto set_enable_error; ++ ++ sdata->enabled = false; ++ } ++ ++set_enable_error: ++ return err; ++} ++EXPORT_SYMBOL(st_sensors_set_enable); ++ ++int st_sensors_set_axis_enable(struct iio_dev *indio_dev, u8 axis_enable) ++{ ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ return st_sensors_write_data_with_mask(indio_dev, ++ sdata->sensor->enable_axis.addr, ++ sdata->sensor->enable_axis.mask, axis_enable); ++} ++EXPORT_SYMBOL(st_sensors_set_axis_enable); ++ ++int st_sensors_init_sensor(struct iio_dev *indio_dev) ++{ ++ int err; ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ mutex_init(&sdata->tb.buf_lock); ++ ++ err = st_sensors_set_enable(indio_dev, true); ++ if (err < 0) ++ goto init_error; ++ ++ err = st_sensors_set_fullscale(indio_dev, ++ sdata->current_fullscale->num); ++ if (err < 0) ++ goto init_error; ++ ++ err = st_sensors_set_odr(indio_dev, sdata->odr); ++ if (err < 0) ++ goto init_error; ++ ++ /* set BDU */ ++ err = st_sensors_write_data_with_mask(indio_dev, ++ sdata->sensor->bdu.addr, sdata->sensor->bdu.mask, true); ++ if (err < 0) ++ goto init_error; ++ ++ err = st_sensors_set_axis_enable(indio_dev, ST_SENSORS_ENABLE_ALL_AXIS); ++ ++init_error: ++ return err; ++} ++EXPORT_SYMBOL(st_sensors_init_sensor); ++ ++int st_sensors_set_dataready_irq(struct iio_dev *indio_dev, bool enable) ++{ ++ int err; ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ /* Enable/Disable the interrupt generator 1. */ ++ if (sdata->sensor->drdy_irq.ig1.en_addr > 0) { ++ err = st_sensors_write_data_with_mask(indio_dev, ++ sdata->sensor->drdy_irq.ig1.en_addr, ++ sdata->sensor->drdy_irq.ig1.en_mask, (int)enable); ++ if (err < 0) ++ goto st_accel_set_dataready_irq_error; ++ } ++ ++ /* Enable/Disable the interrupt generator for data ready. */ ++ err = st_sensors_write_data_with_mask(indio_dev, ++ sdata->sensor->drdy_irq.addr, ++ sdata->sensor->drdy_irq.mask, (int)enable); ++ ++st_accel_set_dataready_irq_error: ++ return err; ++} ++EXPORT_SYMBOL(st_sensors_set_dataready_irq); ++ ++int st_sensors_set_fullscale_by_gain(struct iio_dev *indio_dev, int scale) ++{ ++ int err = -EINVAL, i; ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ for (i = 0; i < ST_SENSORS_FULLSCALE_AVL_MAX; i++) { ++ if ((sdata->sensor->fs.fs_avl[i].gain == scale) && ++ (sdata->sensor->fs.fs_avl[i].gain != 0)) { ++ err = 0; ++ break; ++ } ++ } ++ if (err < 0) ++ goto st_sensors_match_scale_error; ++ ++ err = st_sensors_set_fullscale(indio_dev, ++ sdata->sensor->fs.fs_avl[i].num); ++ ++st_sensors_match_scale_error: ++ return err; ++} ++EXPORT_SYMBOL(st_sensors_set_fullscale_by_gain); ++ ++static int st_sensors_read_axis_data(struct iio_dev *indio_dev, ++ u8 ch_addr, int *data) ++{ ++ int err; ++ u8 outdata[ST_SENSORS_BYTE_FOR_CHANNEL]; ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ err = sdata->tf->read_multiple_byte(&sdata->tb, sdata->dev, ++ ch_addr, ST_SENSORS_BYTE_FOR_CHANNEL, ++ outdata, sdata->multiread_bit); ++ if (err < 0) ++ goto read_error; ++ ++ *data = (s16)get_unaligned_le16(outdata); ++ ++read_error: ++ return err; ++} ++ ++int st_sensors_read_info_raw(struct iio_dev *indio_dev, ++ struct iio_chan_spec const *ch, int *val) ++{ ++ int err; ++ ++ mutex_lock(&indio_dev->mlock); ++ err = st_sensors_read_axis_data(indio_dev, ch->address, val); ++ if (err < 0) ++ goto read_error; ++ ++ *val = *val >> ch->scan_type.shift; ++ mutex_unlock(&indio_dev->mlock); ++ ++ return err; ++ ++read_error: ++ mutex_unlock(&indio_dev->mlock); ++ return err; ++} ++EXPORT_SYMBOL(st_sensors_read_info_raw); ++ ++int st_sensors_check_device_support(struct iio_dev *indio_dev, ++ int num_sensors_list, const struct st_sensors *sensors) ++{ ++ u8 wai; ++ int i, n, err; ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ err = sdata->tf->read_byte(&sdata->tb, sdata->dev, ++ ST_SENSORS_DEFAULT_WAI_ADDRESS, &wai); ++ if (err < 0) { ++ dev_err(&indio_dev->dev, "failed to read Who-Am-I register.\n"); ++ goto read_wai_error; ++ } ++ ++ for (i = 0; i < num_sensors_list; i++) { ++ if (sensors[i].wai == wai) ++ break; ++ } ++ if (i == num_sensors_list) ++ goto device_not_supported; ++ ++ for (n = 0; n < ARRAY_SIZE(sensors[i].sensors_supported); n++) { ++ if (strcmp(indio_dev->name, ++ &sensors[i].sensors_supported[n][0]) == 0) ++ break; ++ } ++ if (n == ARRAY_SIZE(sensors[i].sensors_supported)) { ++ dev_err(&indio_dev->dev, "device name and WhoAmI mismatch.\n"); ++ goto sensor_name_mismatch; ++ } ++ ++ sdata->sensor = (struct st_sensors *)&sensors[i]; ++ ++ return i; ++ ++device_not_supported: ++ dev_err(&indio_dev->dev, "device not supported: WhoAmI (0x%x).\n", wai); ++sensor_name_mismatch: ++ err = -ENODEV; ++read_wai_error: ++ return err; ++} ++EXPORT_SYMBOL(st_sensors_check_device_support); ++ ++ssize_t st_sensors_sysfs_get_sampling_frequency(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ struct st_sensor_data *adata = iio_priv(dev_get_drvdata(dev)); ++ ++ return sprintf(buf, "%d\n", adata->odr); ++} ++EXPORT_SYMBOL(st_sensors_sysfs_get_sampling_frequency); ++ ++ssize_t st_sensors_sysfs_set_sampling_frequency(struct device *dev, ++ struct device_attribute *attr, const char *buf, size_t size) ++{ ++ int err; ++ unsigned int odr; ++ struct iio_dev *indio_dev = dev_get_drvdata(dev); ++ ++ err = kstrtoint(buf, 10, &odr); ++ if (err < 0) ++ goto conversion_error; ++ ++ mutex_lock(&indio_dev->mlock); ++ err = st_sensors_set_odr(indio_dev, odr); ++ mutex_unlock(&indio_dev->mlock); ++ ++conversion_error: ++ return err < 0 ? err : size; ++} ++EXPORT_SYMBOL(st_sensors_sysfs_set_sampling_frequency); ++ ++ssize_t st_sensors_sysfs_sampling_frequency_avail(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ int i, len = 0; ++ struct iio_dev *indio_dev = dev_get_drvdata(dev); ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ mutex_lock(&indio_dev->mlock); ++ for (i = 0; i < ST_SENSORS_ODR_LIST_MAX; i++) { ++ if (sdata->sensor->odr.odr_avl[i].hz == 0) ++ break; ++ ++ len += scnprintf(buf + len, PAGE_SIZE - len, "%d ", ++ sdata->sensor->odr.odr_avl[i].hz); ++ } ++ mutex_unlock(&indio_dev->mlock); ++ buf[len - 1] = '\n'; ++ ++ return len; ++} ++EXPORT_SYMBOL(st_sensors_sysfs_sampling_frequency_avail); ++ ++ssize_t st_sensors_sysfs_scale_avail(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ int i, len = 0; ++ struct iio_dev *indio_dev = dev_get_drvdata(dev); ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ mutex_lock(&indio_dev->mlock); ++ for (i = 0; i < ST_SENSORS_FULLSCALE_AVL_MAX; i++) { ++ if (sdata->sensor->fs.fs_avl[i].num == 0) ++ break; ++ ++ len += scnprintf(buf + len, PAGE_SIZE - len, "0.%06u ", ++ sdata->sensor->fs.fs_avl[i].gain); ++ } ++ mutex_unlock(&indio_dev->mlock); ++ buf[len - 1] = '\n'; ++ ++ return len; ++} ++EXPORT_SYMBOL(st_sensors_sysfs_scale_avail); ++ ++MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>"); ++MODULE_DESCRIPTION("STMicroelectronics ST-sensors core"); ++MODULE_LICENSE("GPL v2"); +diff --git a/drivers/iio/common/st_sensors/st_sensors_i2c.c b/drivers/iio/common/st_sensors/st_sensors_i2c.c +new file mode 100644 +index 0000000..f8e82c5 +--- /dev/null ++++ b/drivers/iio/common/st_sensors/st_sensors_i2c.c +@@ -0,0 +1,80 @@ ++/* ++ * STMicroelectronics sensors i2c library driver ++ * ++ * Copyright 2012-2013 STMicroelectronics Inc. ++ * ++ * Denis Ciocca <denis.ciocca@st.com> ++ * ++ * Licensed under the GPL-2. ++ */ ++ ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/slab.h> ++#include <linux/iio/iio.h> ++ ++#include <linux/iio/common/st_sensors_i2c.h> ++ ++#define ST_SENSORS_I2C_MULTIREAD 0x80 ++ ++static unsigned int st_sensors_i2c_get_irq(struct iio_dev *indio_dev) ++{ ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ return to_i2c_client(sdata->dev)->irq; ++} ++ ++static int st_sensors_i2c_read_byte(struct st_sensor_transfer_buffer *tb, ++ struct device *dev, u8 reg_addr, u8 *res_byte) ++{ ++ int err; ++ ++ err = i2c_smbus_read_byte_data(to_i2c_client(dev), reg_addr); ++ if (err < 0) ++ goto st_accel_i2c_read_byte_error; ++ ++ *res_byte = err & 0xff; ++ ++st_accel_i2c_read_byte_error: ++ return err < 0 ? err : 0; ++} ++ ++static int st_sensors_i2c_read_multiple_byte( ++ struct st_sensor_transfer_buffer *tb, struct device *dev, ++ u8 reg_addr, int len, u8 *data, bool multiread_bit) ++{ ++ if (multiread_bit) ++ reg_addr |= ST_SENSORS_I2C_MULTIREAD; ++ ++ return i2c_smbus_read_i2c_block_data(to_i2c_client(dev), ++ reg_addr, len, data); ++} ++ ++static int st_sensors_i2c_write_byte(struct st_sensor_transfer_buffer *tb, ++ struct device *dev, u8 reg_addr, u8 data) ++{ ++ return i2c_smbus_write_byte_data(to_i2c_client(dev), reg_addr, data); ++} ++ ++static const struct st_sensor_transfer_function st_sensors_tf_i2c = { ++ .read_byte = st_sensors_i2c_read_byte, ++ .write_byte = st_sensors_i2c_write_byte, ++ .read_multiple_byte = st_sensors_i2c_read_multiple_byte, ++}; ++ ++void st_sensors_i2c_configure(struct iio_dev *indio_dev, ++ struct i2c_client *client, struct st_sensor_data *sdata) ++{ ++ i2c_set_clientdata(client, indio_dev); ++ ++ indio_dev->dev.parent = &client->dev; ++ indio_dev->name = client->name; ++ ++ sdata->tf = &st_sensors_tf_i2c; ++ sdata->get_irq_data_ready = st_sensors_i2c_get_irq; ++} ++EXPORT_SYMBOL(st_sensors_i2c_configure); ++ ++MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>"); ++MODULE_DESCRIPTION("STMicroelectronics ST-sensors i2c driver"); ++MODULE_LICENSE("GPL v2"); +diff --git a/drivers/iio/common/st_sensors/st_sensors_spi.c b/drivers/iio/common/st_sensors/st_sensors_spi.c +new file mode 100644 +index 0000000..f0aa2f1 +--- /dev/null ++++ b/drivers/iio/common/st_sensors/st_sensors_spi.c +@@ -0,0 +1,128 @@ ++/* ++ * STMicroelectronics sensors spi library driver ++ * ++ * Copyright 2012-2013 STMicroelectronics Inc. ++ * ++ * Denis Ciocca <denis.ciocca@st.com> ++ * ++ * Licensed under the GPL-2. ++ */ ++ ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/slab.h> ++#include <linux/iio/iio.h> ++ ++#include <linux/iio/common/st_sensors_spi.h> ++ ++ ++#define ST_SENSORS_SPI_MULTIREAD 0xc0 ++#define ST_SENSORS_SPI_READ 0x80 ++ ++static unsigned int st_sensors_spi_get_irq(struct iio_dev *indio_dev) ++{ ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ return to_spi_device(sdata->dev)->irq; ++} ++ ++static int st_sensors_spi_read(struct st_sensor_transfer_buffer *tb, ++ struct device *dev, u8 reg_addr, int len, u8 *data, bool multiread_bit) ++{ ++ struct spi_message msg; ++ int err; ++ ++ struct spi_transfer xfers[] = { ++ { ++ .tx_buf = tb->tx_buf, ++ .bits_per_word = 8, ++ .len = 1, ++ }, ++ { ++ .rx_buf = tb->rx_buf, ++ .bits_per_word = 8, ++ .len = len, ++ } ++ }; ++ ++ mutex_lock(&tb->buf_lock); ++ if ((multiread_bit) && (len > 1)) ++ tb->tx_buf[0] = reg_addr | ST_SENSORS_SPI_MULTIREAD; ++ else ++ tb->tx_buf[0] = reg_addr | ST_SENSORS_SPI_READ; ++ ++ spi_message_init(&msg); ++ spi_message_add_tail(&xfers[0], &msg); ++ spi_message_add_tail(&xfers[1], &msg); ++ err = spi_sync(to_spi_device(dev), &msg); ++ if (err) ++ goto acc_spi_read_error; ++ ++ memcpy(data, tb->rx_buf, len*sizeof(u8)); ++ mutex_unlock(&tb->buf_lock); ++ return len; ++ ++acc_spi_read_error: ++ mutex_unlock(&tb->buf_lock); ++ return err; ++} ++ ++static int st_sensors_spi_read_byte(struct st_sensor_transfer_buffer *tb, ++ struct device *dev, u8 reg_addr, u8 *res_byte) ++{ ++ return st_sensors_spi_read(tb, dev, reg_addr, 1, res_byte, false); ++} ++ ++static int st_sensors_spi_read_multiple_byte( ++ struct st_sensor_transfer_buffer *tb, struct device *dev, ++ u8 reg_addr, int len, u8 *data, bool multiread_bit) ++{ ++ return st_sensors_spi_read(tb, dev, reg_addr, len, data, multiread_bit); ++} ++ ++static int st_sensors_spi_write_byte(struct st_sensor_transfer_buffer *tb, ++ struct device *dev, u8 reg_addr, u8 data) ++{ ++ struct spi_message msg; ++ int err; ++ ++ struct spi_transfer xfers = { ++ .tx_buf = tb->tx_buf, ++ .bits_per_word = 8, ++ .len = 2, ++ }; ++ ++ mutex_lock(&tb->buf_lock); ++ tb->tx_buf[0] = reg_addr; ++ tb->tx_buf[1] = data; ++ ++ spi_message_init(&msg); ++ spi_message_add_tail(&xfers, &msg); ++ err = spi_sync(to_spi_device(dev), &msg); ++ mutex_unlock(&tb->buf_lock); ++ ++ return err; ++} ++ ++static const struct st_sensor_transfer_function st_sensors_tf_spi = { ++ .read_byte = st_sensors_spi_read_byte, ++ .write_byte = st_sensors_spi_write_byte, ++ .read_multiple_byte = st_sensors_spi_read_multiple_byte, ++}; ++ ++void st_sensors_spi_configure(struct iio_dev *indio_dev, ++ struct spi_device *spi, struct st_sensor_data *sdata) ++{ ++ spi_set_drvdata(spi, indio_dev); ++ ++ indio_dev->dev.parent = &spi->dev; ++ indio_dev->name = spi->modalias; ++ ++ sdata->tf = &st_sensors_tf_spi; ++ sdata->get_irq_data_ready = st_sensors_spi_get_irq; ++} ++EXPORT_SYMBOL(st_sensors_spi_configure); ++ ++MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>"); ++MODULE_DESCRIPTION("STMicroelectronics ST-sensors spi driver"); ++MODULE_LICENSE("GPL v2"); +diff --git a/drivers/iio/common/st_sensors/st_sensors_trigger.c b/drivers/iio/common/st_sensors/st_sensors_trigger.c +new file mode 100644 +index 0000000..8b4dd48 +--- /dev/null ++++ b/drivers/iio/common/st_sensors/st_sensors_trigger.c +@@ -0,0 +1,78 @@ ++/* ++ * STMicroelectronics sensors trigger library driver ++ * ++ * Copyright 2012-2013 STMicroelectronics Inc. ++ * ++ * Denis Ciocca <denis.ciocca@st.com> ++ * ++ * Licensed under the GPL-2. ++ */ ++ ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/slab.h> ++#include <linux/iio/iio.h> ++#include <linux/iio/trigger.h> ++#include <linux/interrupt.h> ++ ++#include <linux/iio/common/st_sensors.h> ++ ++ ++int st_sensors_allocate_trigger(struct iio_dev *indio_dev, ++ const struct iio_trigger_ops *trigger_ops) ++{ ++ int err; ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ sdata->trig = iio_trigger_alloc("%s-trigger", indio_dev->name); ++ if (sdata->trig == NULL) { ++ err = -ENOMEM; ++ dev_err(&indio_dev->dev, "failed to allocate iio trigger.\n"); ++ goto iio_trigger_alloc_error; ++ } ++ ++ err = request_threaded_irq(sdata->get_irq_data_ready(indio_dev), ++ iio_trigger_generic_data_rdy_poll, ++ NULL, ++ IRQF_SHARED | /* sharing with the accelerometer events*/ ++ IRQF_TRIGGER_RISING | IRQF_ONESHOT, ++ sdata->trig->name, ++ sdata->trig); ++ if (err) ++ goto request_irq_error; ++ ++ sdata->trig->private_data = indio_dev; ++ sdata->trig->ops = trigger_ops; ++ sdata->trig->dev.parent = sdata->dev; ++ ++ err = iio_trigger_register(sdata->trig); ++ if (err < 0) { ++ dev_err(&indio_dev->dev, "failed to register iio trigger.\n"); ++ goto iio_trigger_register_error; ++ } ++ indio_dev->trig = sdata->trig; ++ ++ return 0; ++ ++iio_trigger_register_error: ++ free_irq(sdata->get_irq_data_ready(indio_dev), sdata->trig); ++request_irq_error: ++ iio_trigger_free(sdata->trig); ++iio_trigger_alloc_error: ++ return err; ++} ++EXPORT_SYMBOL(st_sensors_allocate_trigger); ++ ++void st_sensors_deallocate_trigger(struct iio_dev *indio_dev) ++{ ++ struct st_sensor_data *sdata = iio_priv(indio_dev); ++ ++ iio_trigger_unregister(sdata->trig); ++ free_irq(sdata->get_irq_data_ready(indio_dev), sdata->trig); ++ iio_trigger_free(sdata->trig); ++} ++EXPORT_SYMBOL(st_sensors_deallocate_trigger); ++ ++MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>"); ++MODULE_DESCRIPTION("STMicroelectronics ST-sensors trigger"); ++MODULE_LICENSE("GPL v2"); +diff --git a/drivers/iio/industrialio-buffer.c b/drivers/iio/industrialio-buffer.c +index aaadd32..7b8d510 100644 +--- a/drivers/iio/industrialio-buffer.c ++++ b/drivers/iio/industrialio-buffer.c +@@ -119,8 +119,8 @@ static ssize_t iio_scan_el_show(struct device *dev, + int ret; + struct iio_dev *indio_dev = dev_to_iio_dev(dev); + +- ret = test_bit(to_iio_dev_attr(attr)->address, +- indio_dev->buffer->scan_mask); ++ ret = abs(test_bit(to_iio_dev_attr(attr)->address, ++ indio_dev->buffer->scan_mask)); + + return sprintf(buf, "%d\n", ret); + } +@@ -762,7 +762,7 @@ int iio_scan_mask_query(struct iio_dev *indio_dev, + if (!buffer->scan_mask) + return 0; + +- return test_bit(bit, buffer->scan_mask); ++ return abs(test_bit(bit, buffer->scan_mask)); + }; + EXPORT_SYMBOL_GPL(iio_scan_mask_query); + +diff --git a/drivers/isdn/mISDN/core.c b/drivers/isdn/mISDN/core.c +index 3e24571..da30c5c 100644 +--- a/drivers/isdn/mISDN/core.c ++++ b/drivers/isdn/mISDN/core.c +@@ -168,13 +168,13 @@ static struct class mISDN_class = { + }; + + static int +-_get_mdevice(struct device *dev, void *id) ++_get_mdevice(struct device *dev, const void *id) + { + struct mISDNdevice *mdev = dev_to_mISDN(dev); + + if (!mdev) + return 0; +- if (mdev->id != *(u_int *)id) ++ if (mdev->id != *(const u_int *)id) + return 0; + return 1; + } +diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig +index ff553ba..be79f4a 100644 +--- a/drivers/mfd/Kconfig ++++ b/drivers/mfd/Kconfig +@@ -907,6 +907,44 @@ config MFD_TIMBERDALE + The timberdale FPGA can be found on the Intel Atom development board + for in-vehicle infontainment, called Russellville. + ++config CY8C9540A ++ tristate "Cypress CY8C9540 GPIO/PWM expander" ++ depends on INTEL_CLN_GIP ++ depends on PWM ++ help ++ I/O expander providing GPIO/PWM functionality. ++ This is Clanton-specific for now. ++ ++config INTEL_CLN_GIP ++ tristate "Intel Clanton GIP" ++ depends on PCI && X86 && INTEL_QUARK_X1000_SOC ++ depends on I2C ++ select GENERIC_IRQ_CHIP ++ help ++ GIP driver for Clanton SoC. ++ Clanton GIP is a single PCI function exporting a GPIO and an I2C ++ controller, namely Synopsys DesignWare GPIO and Synopsys DesignWare ++ I2C. The GPIO interface exports a total amount of 8 interrupt-capable ++ GPIOs. ++ ++config INTEL_CLN_GIP_TEST ++ tristate "Intel Clanton GIP support for Integration Testing" ++ depends on INTEL_CLN_GIP ++ depends on INTEL_QUARK_X1000_SOC_FPGAEMU || INTEL_QUARK_X1000_SOC_SVP ++ select I2C_CHARDEV ++ select GPIO_SYSFS ++ select SPI ++ select SPI_BITBANG ++ select SPI_GPIO ++ select SPI_MASTER ++ select SPI_SPIDEV ++ help ++ Clanton GIP automated Integration Testing package. ++ It selects kernel components needed for GPIO and I2C tests as per ++ Integration Test Specification, and it also adds a kernel-space ++ facility for testing the GPIO. ++ Note this module is also used to test the Clanton Legacy GPIO. ++ + config LPC_SCH + tristate "Intel SCH LPC" + depends on PCI +diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile +index 8b977f8..2fb8008 100644 +--- a/drivers/mfd/Makefile ++++ b/drivers/mfd/Makefile +@@ -123,6 +123,13 @@ obj-$(CONFIG_MFD_DB8500_PRCMU) += db8500-prcmu.o + obj-$(CONFIG_AB8500_CORE) += ab8500-core.o ab8500-sysctrl.o + obj-$(CONFIG_MFD_TIMBERDALE) += timberdale.o + obj-$(CONFIG_PMIC_ADP5520) += adp5520.o ++obj-$(CONFIG_CY8C9540A) += cy8c9540a.o ++obj-$(CONFIG_INTEL_CLN_GIP) += intel_cln_gip.o ++intel_cln_gip-objs := intel_cln_gip_core.o \ ++ intel_cln_gip_gpio.o \ ++ intel_cln_gip_i2c.o \ ++ ../i2c/busses/i2c-designware-core.o ++obj-$(CONFIG_INTEL_CLN_GIP_TEST)+=intel_cln_gip_test.o + obj-$(CONFIG_LPC_SCH) += lpc_sch.o + obj-$(CONFIG_LPC_ICH) += lpc_ich.o + obj-$(CONFIG_MFD_RDC321X) += rdc321x-southbridge.o +diff --git a/drivers/mfd/cy8c9540a.c b/drivers/mfd/cy8c9540a.c +new file mode 100644 +index 0000000..9d83e32 +--- /dev/null ++++ b/drivers/mfd/cy8c9540a.c +@@ -0,0 +1,1022 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++/* ++ * Driver for Cypress CY8C9540A I/O Expander and PWM ++ * ++ * Izmir-specific. ++ * Based on gpio-adp5588. ++ */ ++ ++#include <linux/delay.h> ++#include <linux/i2c.h> ++#include <linux/interrupt.h> ++#include <linux/irq.h> ++#include <linux/gpio.h> ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/pwm.h> ++#include <linux/slab.h> ++ ++#define DRV_NAME "cy8c9540a" ++ ++/* CY8C9540A settings */ ++#define NGPIO 40 ++#define NPWM 8 ++#define PWM_MAX_PERIOD 0xff ++#define DEVID_FAMILY_CY8C9540A 0x40 ++#define DEVID_FAMILY_MASK 0xf0 ++#define NPORTS 6 ++#define I2C_A0_ADDR_MASK 0x0001 ++#define POR_SETTINGS_LEN 147 ++ ++/* Register offset */ ++#define REG_INPUT_PORT0 0x00 ++#define REG_OUTPUT_PORT0 0x08 ++#define REG_INTR_STAT_PORT0 0x10 ++#define REG_PORT_SELECT 0x18 ++#define REG_INTR_MASK 0x19 ++#define REG_SELECT_PWM 0x1a ++#define REG_PIN_DIR 0x1c ++#define REG_DRIVE_PULLUP 0x1d ++#define REG_PWM_SELECT 0x28 ++#define REG_PWM_CLK 0x29 ++#define REG_PWM_PERIOD 0x2a ++#define REG_PWM_PULSE_W 0x2b ++#define REG_ENABLE 0x2d ++#define REG_DEVID_STAT 0x2e ++#define REG_CMD 0x30 ++ ++/* Commands */ ++#define CMD_W_EEPROM_POR 0x03 ++#define CMD_R_EEPROM_POR 0x04 ++#define CMD_RECONF_DEV 0x07 ++ ++/* Galileo-specific POR default settings */ ++#define POR_CMD_W_OFFS 2 ++static u8 por_default[POR_SETTINGS_LEN + POR_CMD_W_OFFS] = { ++ REG_CMD, CMD_W_EEPROM_POR, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* Output */ ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* Interrupt mask */ ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* PWM */ ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* Inversion */ ++ 0xe0, 0xe0, 0xff, 0xf3, 0x00, 0xff, 0xff, 0xff, /* Direction */ ++ 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, /* Port0 drive mode */ ++ 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, /* Port1 drive mode */ ++ 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* Port2 drive mode */ ++ 0xf3, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, /* Port3 drive mode */ ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, /* Port4 drive mode */ ++ 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* Port5 drive mode */ ++ 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* Port6 drive mode */ ++ 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* Port7 drive mode */ ++ 0x00, 0xff, 0x00, /* PWM0 */ ++ 0x00, 0xff, 0x00, /* PWM1 */ ++ 0x00, 0xff, 0x00, /* PWM2 */ ++ 0x00, 0xff, 0x00, /* PWM3 */ ++ 0x00, 0xff, 0x00, /* PWM4 */ ++ 0x00, 0xff, 0x00, /* PWM5 */ ++ 0x00, 0xff, 0x00, /* PWM6 */ ++ 0x00, 0xff, 0x00, /* PWM7 */ ++ 0x00, 0xff, 0x00, /* PWM8 */ ++ 0x00, 0xff, 0x00, /* PWM9 */ ++ 0x00, 0xff, 0x00, /* PWM10 */ ++ 0x00, 0xff, 0x00, /* PWM11 */ ++ 0x00, 0xff, 0x00, /* PWM12 */ ++ 0x00, 0xff, 0x00, /* PWM13 */ ++ 0x00, 0xff, 0x00, /* PWM14 */ ++ 0x00, 0xff, 0x00, /* PWM15 */ ++ 0xff, /* PWM CLK divider */ ++ 0x02, /* EEPROM enable */ ++ 0x00 /* CRC (placeholder) */ ++}; ++ ++struct cy8c9540a { ++ struct i2c_client *client; ++ struct gpio_chip gpio_chip; ++ struct pwm_chip pwm_chip; ++ struct mutex lock; ++ /* protect serialized access to the interrupt controller bus */ ++ struct mutex irq_lock; ++ /* cached output registers */ ++ u8 outreg_cache[NPORTS]; ++ /* cached IRQ mask */ ++ u8 irq_mask_cache[NPORTS]; ++ /* IRQ mask to be applied */ ++ u8 irq_mask[NPORTS]; ++ /* Descriptor for raw i2c transactions */ ++ struct i2c_msg i2c_segments[2]; ++ /* POR settings stored in the EEPROM */ ++ u8 por_stored[POR_SETTINGS_LEN]; ++}; ++ ++/* Per-port GPIO offset */ ++static const u8 cy8c9540a_port_offs[] = { ++ 0, ++ 8, ++ 16, ++ 20, ++ 28, ++ 36, ++}; ++ ++/* Galileo-specific data. */ ++ ++#define GPIO_BASE_ID 16 ++#define GPIO_IRQBASE 64 ++#define PWM_BASE_ID 0 ++#define PWM_CLK 0x00 /* see resulting PWM_TCLK_NS */ ++#define PWM_TCLK_NS 31250 /* 32kHz */ ++#define SOC_GPIO_INT_PIN 13 ++#define SOC_GPIO_I2C_A0 7 ++ ++/* PWM-to-GPIO mapping (0 == first Cypress GPIO). */ ++#define PWM_UNUSED -1 ++static const int pwm2gpio_mapping[] = { ++ PWM_UNUSED, ++ 3, ++ PWM_UNUSED, ++ 2, ++ 9, ++ 1, ++ 8, ++ 0, ++}; ++ ++static inline u8 cypress_get_port(unsigned gpio) ++{ ++ u8 i = 0; ++ for (i = 0; i < sizeof(cy8c9540a_port_offs) - 1; i ++) { ++ if (! (gpio / cy8c9540a_port_offs[i + 1])) ++ break; ++ } ++ return i; ++} ++ ++static inline u8 cypress_get_offs(unsigned gpio, u8 port) ++{ ++ return gpio - cy8c9540a_port_offs[port]; ++} ++ ++static int cy8c9540a_gpio_get_value(struct gpio_chip *chip, unsigned gpio) ++{ ++ s32 ret = 0; ++ u8 port = 0; ++ u8 in_reg = 0; ++ struct cy8c9540a *dev = ++ container_of(chip, struct cy8c9540a, gpio_chip); ++ struct i2c_client *client = dev->client; ++ ++ port = cypress_get_port(gpio); ++ in_reg = REG_INPUT_PORT0 + port; ++ ++ ret = i2c_smbus_read_byte_data(client, in_reg); ++ if (ret < 0) { ++ dev_err(&client->dev, "can't read input port%u\n", in_reg); ++ } ++ ++ return !!(ret & BIT(cypress_get_offs(gpio, port))); ++} ++ ++static void cy8c9540a_gpio_set_value(struct gpio_chip *chip, ++ unsigned gpio, int val) ++{ ++ s32 ret = 0; ++ struct cy8c9540a *dev = ++ container_of(chip, struct cy8c9540a, gpio_chip); ++ struct i2c_client *client = dev->client; ++ u8 port = cypress_get_port(gpio); ++ u8 out_reg = REG_OUTPUT_PORT0 + port; ++ ++ mutex_lock(&dev->lock); ++ ++ if (val) { ++ dev->outreg_cache[port] |= BIT(cypress_get_offs(gpio, port)); ++ } else { ++ dev->outreg_cache[port] &= ~BIT(cypress_get_offs(gpio, port)); ++ } ++ ++ ret = i2c_smbus_write_byte_data(client, out_reg, ++ dev->outreg_cache[port]); ++ if (ret < 0) { ++ dev_err(&client->dev, "can't write output port%u\n", port); ++ } ++ ++ mutex_unlock(&dev->lock); ++} ++ ++static int cy8c9540a_gpio_set_drive(struct gpio_chip *chip, unsigned gpio, ++ unsigned mode) ++{ ++ int ret = 0; ++ struct cy8c9540a *dev = ++ container_of(chip, struct cy8c9540a, gpio_chip); ++ struct i2c_client *client = dev->client; ++ u8 port = cypress_get_port(gpio); ++ u8 pin = cypress_get_offs(gpio, port); ++ u8 offs = 0; ++ u8 val = 0; ++ ++ switch(mode) { ++ case GPIOF_DRIVE_PULLUP: ++ offs = 0x0; ++ break; ++ case GPIOF_DRIVE_STRONG: ++ offs = 0x4; ++ break; ++ case GPIOF_DRIVE_HIZ: ++ offs = 0x6; ++ break; ++ default: ++ /* ++ * See databook for alternative modes. This driver won't ++ * support them though. ++ */ ++ return -EINVAL; ++ break; ++ } ++ ++ mutex_lock(&dev->lock); ++ ++ ret = i2c_smbus_write_byte_data(client, REG_PORT_SELECT, port); ++ if (ret < 0) { ++ dev_err(&client->dev, "can't select port %u\n", port); ++ goto end; ++ } ++ ++ ret = i2c_smbus_read_byte_data(client, REG_DRIVE_PULLUP + offs); ++ if (ret < 0) { ++ dev_err(&client->dev, "can't read pin direction\n"); ++ goto end; ++ } ++ ++ val = (u8)(ret | BIT(pin)); ++ ++ ret = i2c_smbus_write_byte_data(client, REG_DRIVE_PULLUP + offs, val); ++ if (ret < 0) { ++ dev_err(&client->dev, "can't set drive mode port %u\n", port); ++ goto end; ++ } ++ ++ ret = 0; ++ ++end: ++ mutex_unlock(&dev->lock); ++ return ret; ++} ++ ++static int cy8c9540a_gpio_direction(struct gpio_chip *chip, unsigned gpio, ++ int out, int val) ++{ ++ s32 ret = 0; ++ u8 pins = 0; ++ struct cy8c9540a *dev = ++ container_of(chip, struct cy8c9540a, gpio_chip); ++ struct i2c_client *client = dev->client; ++ u8 port = cypress_get_port(gpio); ++ ++ ret = cy8c9540a_gpio_set_drive(chip, gpio, out ? ++ GPIOF_DRIVE_STRONG : GPIOF_DRIVE_HIZ); ++ if (ret) { ++ return ret; ++ } ++ ++ mutex_lock(&dev->lock); ++ ++ ret = i2c_smbus_write_byte_data(client, REG_PORT_SELECT, port); ++ if (ret < 0) { ++ dev_err(&client->dev, "can't select port %u\n", port); ++ goto end; ++ } ++ ++ ret = i2c_smbus_read_byte_data(client, REG_PIN_DIR); ++ if (ret < 0) { ++ dev_err(&client->dev, "can't read pin direction\n"); ++ goto end; ++ } ++ ++ pins = (u8)ret & 0xff; ++ if (out) { ++ pins &= ~BIT(cypress_get_offs(gpio, port)); ++ } else { ++ pins |= BIT(cypress_get_offs(gpio, port)); ++ } ++ ++ ret = i2c_smbus_write_byte_data(client, REG_PIN_DIR, pins); ++ if (ret < 0) { ++ dev_err(&client->dev, "can't write pin direction\n"); ++ } ++ ++end: ++ mutex_unlock(&dev->lock); ++ return ret; ++} ++ ++static int cy8c9540a_gpio_direction_output(struct gpio_chip *chip, ++ unsigned gpio, int val) ++{ ++ return cy8c9540a_gpio_direction(chip, gpio, 1, val); ++} ++ ++static int cy8c9540a_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) ++{ ++ return cy8c9540a_gpio_direction(chip, gpio, 0, 0); ++} ++ ++static void cy8c9540a_irq_bus_lock(struct irq_data *d) ++{ ++ struct cy8c9540a *dev = irq_data_get_irq_chip_data(d); ++ mutex_lock(&dev->irq_lock); ++} ++ ++static void cy8c9540a_irq_bus_sync_unlock(struct irq_data *d) ++{ ++ struct cy8c9540a *dev = irq_data_get_irq_chip_data(d); ++ struct i2c_client *client = dev->client; ++ int ret = 0; ++ int i = 0; ++ ++ for (i = 0; i < NPORTS; i++) { ++ if (dev->irq_mask_cache[i] ^ dev->irq_mask[i]) { ++ dev->irq_mask_cache[i] = dev->irq_mask[i]; ++ ret = i2c_smbus_write_byte_data(client, REG_PORT_SELECT, i); ++ if (ret < 0) { ++ dev_err(&client->dev, "can't select port %u\n", i); ++ goto end; ++ } ++ ++ ret = i2c_smbus_write_byte_data(client, REG_INTR_MASK, dev->irq_mask[i]); ++ if (ret < 0) { ++ dev_err(&client->dev, "can't write int mask on port %u\n", i); ++ goto end; ++ } ++ ++ } ++ } ++ ++end: ++ mutex_unlock(&dev->irq_lock); ++} ++ ++static void cy8c9540a_irq_mask(struct irq_data *d) ++{ ++ struct cy8c9540a *dev = irq_data_get_irq_chip_data(d); ++ unsigned gpio = d->irq - GPIO_IRQBASE; ++ u8 port = cypress_get_port(gpio); ++ ++ dev->irq_mask[port] |= BIT(cypress_get_offs(gpio, port)); ++} ++ ++static void cy8c9540a_irq_unmask(struct irq_data *d) ++{ ++ struct cy8c9540a *dev = irq_data_get_irq_chip_data(d); ++ unsigned gpio = d->irq - GPIO_IRQBASE; ++ u8 port = cypress_get_port(gpio); ++ ++ dev->irq_mask[port] &= ~BIT(cypress_get_offs(gpio, port)); ++} ++ ++static int cy8c9540a_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) ++{ ++ return GPIO_IRQBASE + gpio; ++} ++ ++static int cy8c9540a_irq_set_type(struct irq_data *d, unsigned int type) ++{ ++ struct cy8c9540a *dev = irq_data_get_irq_chip_data(d); ++ int ret = 0; ++ ++ if ((type != IRQ_TYPE_EDGE_BOTH)) { ++ dev_err(&dev->client->dev, "irq %d: unsupported type %d\n", ++ d->irq, type); ++ ret = -EINVAL; ++ goto end; ++ } ++ ++end: ++ return ret; ++} ++ ++static struct irq_chip cy8c9540a_irq_chip = { ++ .name = "cy8c9540a-irq", ++ .irq_mask = cy8c9540a_irq_mask, ++ .irq_unmask = cy8c9540a_irq_unmask, ++ .irq_bus_lock = cy8c9540a_irq_bus_lock, ++ .irq_bus_sync_unlock = cy8c9540a_irq_bus_sync_unlock, ++ .irq_set_type = cy8c9540a_irq_set_type, ++}; ++ ++static irqreturn_t cy8c9540a_irq_handler(int irq, void *devid) ++{ ++ struct cy8c9540a *dev = devid; ++ u8 stat[NPORTS], pending = 0; ++ unsigned port = 0, gpio = 0, gpio_irq = 0; ++ int ret = 0; ++ ++ ret = i2c_smbus_read_i2c_block_data(dev->client, REG_INTR_STAT_PORT0, ++ NPORTS, stat); /* W1C */ ++ if (ret < 0) { ++ memset(stat, 0, sizeof(stat)); ++ } ++ ++ ret = IRQ_NONE; ++ ++ for (port = 0; port < NPORTS; port ++) { ++ /* Databook doesn't specify if this is a post-mask status ++ register or not. Consider it 'raw' for safety. */ ++ mutex_lock(&dev->irq_lock); ++ pending = stat[port] & (~dev->irq_mask[port]); ++ mutex_unlock(&dev->irq_lock); ++ ++ while (pending) { ++ ret = IRQ_HANDLED; ++ gpio = __ffs(pending); ++ pending &= ~BIT(gpio); ++ gpio_irq = GPIO_IRQBASE + cy8c9540a_port_offs[port] ++ + gpio; ++ handle_nested_irq(gpio_irq); ++ } ++ } ++ ++ return ret; ++} ++ ++static int cy8c9540a_irq_setup(struct cy8c9540a *dev) ++{ ++ struct i2c_client *client = dev->client; ++ u8 dummy[NPORTS]; ++ unsigned gpio = 0; ++ int ret = 0; ++ int i = 0; ++ ++ mutex_init(&dev->irq_lock); ++ ++ /* Clear interrupt state */ ++ ++ ret = i2c_smbus_read_i2c_block_data(dev->client, REG_INTR_STAT_PORT0, ++ NPORTS, dummy); /* W1C */ ++ if (ret < 0) { ++ dev_err(&client->dev, "couldn't clear int status\n"); ++ goto err; ++ } ++ ++ /* Initialise interrupt mask */ ++ ++ memset(dev->irq_mask_cache, 0xff, sizeof(dev->irq_mask_cache)); ++ memset(dev->irq_mask, 0xff, sizeof(dev->irq_mask)); ++ for (i = 0; i < NPORTS; i++) { ++ ret = i2c_smbus_write_byte_data(client, REG_PORT_SELECT, i); ++ if (ret < 0) { ++ dev_err(&client->dev, "can't select port %u\n", i); ++ goto err; ++ } ++ ++ ret = i2c_smbus_write_byte_data(client, REG_INTR_MASK, dev->irq_mask[i]); ++ if (ret < 0) { ++ dev_err(&client->dev, "can't write int mask on port %u\n", i); ++ goto err; ++ } ++ } ++ ++ /* Allocate external interrupt GPIO pin */ ++ ++ ret = gpio_request(SOC_GPIO_INT_PIN, "cy8c9540a-int"); ++ if (ret) { ++ dev_err(&client->dev, "failed to request gpio%u\n", ++ SOC_GPIO_INT_PIN); ++ goto err; ++ } ++ ++ /* Allocate IRQ descriptors for Cypress GPIOs and set handler */ ++ ++ ret = irq_alloc_descs(GPIO_IRQBASE, GPIO_IRQBASE, NGPIO, 0); ++ if (ret < 0) { ++ dev_err(&client->dev, "failed to allocate IRQ numbers\n"); ++ goto err_free_gpio; ++ } ++ ++ for (gpio = 0; gpio < NGPIO; gpio++) { ++ int irq = gpio + GPIO_IRQBASE; ++ irq_set_chip_data(irq, dev); ++ irq_set_chip_and_handler(irq, &cy8c9540a_irq_chip, ++ handle_edge_irq); ++ irq_set_nested_thread(irq, 1); ++ irq_set_noprobe(irq); ++ } ++ ++ ret = request_threaded_irq(gpio_to_irq(SOC_GPIO_INT_PIN), ++ NULL, ++ cy8c9540a_irq_handler, ++ IRQF_TRIGGER_FALLING | IRQF_ONESHOT, ++ dev_name(&client->dev), dev); ++ if (ret) { ++ dev_err(&client->dev, "failed to request irq %d\n", ++ client->irq); ++ goto err_free_irq_descs; ++ } ++ ++ return 0; ++ ++err_free_irq_descs: ++ irq_free_descs(GPIO_IRQBASE, NGPIO); ++err_free_gpio: ++ gpio_free(SOC_GPIO_INT_PIN); ++err: ++ mutex_destroy(&dev->irq_lock); ++ return ret; ++} ++ ++static void cy8c9540a_irq_teardown(struct cy8c9540a *dev) ++{ ++ mutex_destroy(&dev->irq_lock); ++ irq_free_descs(GPIO_IRQBASE, NGPIO); ++ free_irq(gpio_to_irq(SOC_GPIO_INT_PIN), dev); ++ gpio_free(SOC_GPIO_INT_PIN); ++} ++ ++static int cy8c9540a_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, ++ int duty_ns, int period_ns) ++{ ++ int ret = 0; ++ int period = 0, duty = 0; ++ struct cy8c9540a *dev = ++ container_of(chip, struct cy8c9540a, pwm_chip); ++ struct i2c_client *client = dev->client; ++ ++ if (pwm->pwm > NPWM) { ++ return -EINVAL; ++ } ++ ++ period = period_ns / PWM_TCLK_NS; ++ duty = duty_ns / PWM_TCLK_NS; ++ ++ /* ++ * Check period's upper bound. Note the duty cycle is already sanity ++ * checked by the PWM framework. ++ */ ++ if (period > PWM_MAX_PERIOD) { ++ dev_err(&client->dev, "period must be within [0-%d]ns\n", ++ PWM_MAX_PERIOD * PWM_TCLK_NS); ++ return -EINVAL; ++ } ++ ++ mutex_lock(&dev->lock); ++ ++ ret = i2c_smbus_write_byte_data(client, REG_PWM_SELECT, (u8)pwm->pwm); ++ if (ret < 0) { ++ dev_err(&client->dev, "can't write to REG_PWM_SELECT\n"); ++ goto end; ++ } ++ ++ ret = i2c_smbus_write_byte_data(client, REG_PWM_PERIOD, (u8)period); ++ if (ret < 0) { ++ dev_err(&client->dev, "can't write to REG_PWM_PERIOD\n"); ++ goto end; ++ } ++ ++ ret = i2c_smbus_write_byte_data(client, REG_PWM_PULSE_W, (u8)duty); ++ if (ret < 0) { ++ dev_err(&client->dev, "can't write to REG_PWM_PULSE_W\n"); ++ goto end; ++ } ++ ++end: ++ mutex_unlock(&dev->lock); ++ ++ return ret; ++} ++ ++static int cy8c9540a_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) ++{ ++ int ret = 0; ++ int gpio = 0; ++ int port = 0, pin = 0; ++ u8 out_reg = 0; ++ u8 val = 0; ++ struct cy8c9540a *dev = ++ container_of(chip, struct cy8c9540a, pwm_chip); ++ struct i2c_client *client = dev->client; ++ ++ if (pwm->pwm > NPWM) { ++ return -EINVAL; ++ } ++ ++ gpio = pwm2gpio_mapping[pwm->pwm]; ++ port = cypress_get_port(gpio); ++ pin = cypress_get_offs(gpio, port); ++ out_reg = REG_OUTPUT_PORT0 + port; ++ ++ /* Set pin as output driving high */ ++ ret = cy8c9540a_gpio_direction(&dev->gpio_chip, gpio, 1, 1); ++ if (ret < 0) { ++ dev_err(&client->dev, "can't set pwm%u as output\n", pwm->pwm); ++ return ret; ++ } ++ ++ mutex_lock(&dev->lock); ++ ++ /* Enable PWM */ ++ val = i2c_smbus_read_byte_data(client, REG_SELECT_PWM); ++ if (val < 0) { ++ dev_err(&client->dev, "can't read REG_SELECT_PWM\n"); ++ ret = val; ++ goto end; ++ } ++ val |= BIT((u8)pin); ++ ret = i2c_smbus_write_byte_data(client, REG_SELECT_PWM, val); ++ if (ret < 0) { ++ dev_err(&client->dev, "can't write to SELECT_PWM\n"); ++ goto end; ++ } ++ ++end: ++ mutex_unlock(&dev->lock); ++ ++ return ret; ++} ++ ++static void cy8c9540a_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) ++{ ++ int ret = 0; ++ int gpio = 0; ++ int port = 0, pin = 0; ++ u8 val = 0; ++ struct cy8c9540a *dev = ++ container_of(chip, struct cy8c9540a, pwm_chip); ++ struct i2c_client *client = dev->client; ++ ++ if (pwm->pwm > NPWM) { ++ return; ++ } ++ ++ gpio = pwm2gpio_mapping[pwm->pwm]; ++ if (PWM_UNUSED == gpio) { ++ dev_err(&client->dev, "pwm%d is unused\n", pwm->pwm); ++ return; ++ } ++ ++ port = cypress_get_port(gpio); ++ pin = cypress_get_offs(gpio, port); ++ ++ mutex_lock(&dev->lock); ++ ++ /* Disable PWM */ ++ val = i2c_smbus_read_byte_data(client, REG_SELECT_PWM); ++ if (val < 0) { ++ dev_err(&client->dev, "can't read REG_SELECT_PWM\n"); ++ goto end; ++ } ++ val &= ~BIT((u8)pin); ++ ret = i2c_smbus_write_byte_data(client, REG_SELECT_PWM, val); ++ if (ret < 0) { ++ dev_err(&client->dev, "can't write to SELECT_PWM\n"); ++ } ++ ++end: ++ mutex_unlock(&dev->lock); ++ ++ return; ++} ++ ++/* ++ * Some PWMs are unavailable on Galileo. Prevent user from reserving them. ++ */ ++static int cy8c9540a_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) ++{ ++ int gpio = 0; ++ struct cy8c9540a *dev = ++ container_of(chip, struct cy8c9540a, pwm_chip); ++ struct i2c_client *client = dev->client; ++ ++ if (pwm->pwm > NPWM) { ++ return -EINVAL; ++ } ++ ++ gpio = pwm2gpio_mapping[pwm->pwm]; ++ if (PWM_UNUSED == gpio) { ++ dev_err(&client->dev, "pwm%d unavailable\n", pwm->pwm); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static const struct pwm_ops cy8c9540a_pwm_ops = { ++ .request = cy8c9540a_pwm_request, ++ .config = cy8c9540a_pwm_config, ++ .enable = cy8c9540a_pwm_enable, ++ .disable = cy8c9540a_pwm_disable, ++}; ++ ++/* ++ * cy8c9540a_set_por_default ++ * ++ * Ensure the expander is using platform-specific POR settings. ++ * ++ * Note SMBUS max transaction length is 32 bytes, so we have to fall back to ++ * raw i2c transfers. ++ */ ++static int cy8c9540a_set_por_default(struct cy8c9540a *dev) ++{ ++ int ret = 0; ++ struct i2c_client *client = dev->client; ++ int i = 0; ++ int segments = -1; ++ int crc_index = sizeof(por_default) - 1; ++ u8 reg_cmd_r_por[] = { REG_CMD, CMD_R_EEPROM_POR }; ++ ++ /* Read POR settings stored in EEPROM */ ++ dev->i2c_segments[0].addr = client->addr; ++ dev->i2c_segments[0].flags = 0; /* write */ ++ dev->i2c_segments[0].len = sizeof(reg_cmd_r_por); ++ dev->i2c_segments[0].buf = reg_cmd_r_por; ++ dev->i2c_segments[1].addr = client->addr; ++ dev->i2c_segments[1].flags = I2C_M_RD; ++ dev->i2c_segments[1].len = sizeof(dev->por_stored); ++ dev->i2c_segments[1].buf = dev->por_stored; ++ segments = 2; ++ ret = i2c_transfer(client->adapter, dev->i2c_segments, segments); ++ if (segments != ret) { ++ dev_err(&client->dev, "can't read POR settings (ret=%d)\n", ret); ++ goto end; ++ } else { ++ ret = 0; ++ } ++ ++ /* Compute CRC for platform-defined POR settings */ ++ por_default[crc_index] = 0; ++ for (i = POR_CMD_W_OFFS; i < crc_index; i ++) { ++ por_default[crc_index] ^= por_default[i]; ++ } ++ ++ /* Compare POR settings with platform-defined ones */ ++ for (i = 0; i < sizeof(dev->por_stored); i ++) { ++ if (dev->por_stored[i] != por_default[i + POR_CMD_W_OFFS]) { ++ break; ++ } ++ } ++ if (sizeof(dev->por_stored) == i) { ++ goto end; ++ } ++ ++ /* Update POR settings to EEPROM */ ++ ++ dev_info(&client->dev, "updating EEPROM with platform POR settings\n"); ++ ++ /* Store default POR settings into EEPROM */ ++ dev->i2c_segments[0].addr = client->addr; ++ dev->i2c_segments[0].flags = 0; /* write */ ++ dev->i2c_segments[0].len = sizeof(por_default); ++ dev->i2c_segments[0].buf = por_default; ++ segments = 1; ++ ret = i2c_transfer(client->adapter, dev->i2c_segments, segments); ++ if (segments != ret) { ++ dev_err(&client->dev, "can't write POR settings (ret=%d)\n", ret); ++ goto end; ++ } else { ++ ret = 0; ++ } ++ ++ /* Let EEPROM terminate its last page write. 200ms as per datasheet. */ ++ mdelay(200); ++ ++ /* Reconfigure device with newly stored POR settings */ ++ ret = i2c_smbus_write_byte_data(client, REG_CMD, CMD_RECONF_DEV); ++ if (ret < 0) { ++ dev_err(&client->dev, "can't reconfigure device\n"); ++ goto end; ++ } ++ ++end: ++ return ret; ++} ++ ++/* ++ * cy8c9540a_setup ++ * ++ * Initialise the device with default setup. ++ * No need to roll back if this fails. ++ */ ++static int cy8c9540a_setup(struct cy8c9540a *dev) ++{ ++ int ret = 0; ++ struct i2c_client *client = dev->client; ++ const u8 eeprom_enable_seq[] = {0x43, 0x4D, 0x53, 0x2}; ++ ++ /* Test/set platform-specific POR settings */ ++ ret = cy8c9540a_set_por_default(dev); ++ if (ret) { ++ dev_err(&client->dev, "can't set POR settings (err=%d)\n", ret); ++ goto end; ++ } ++ ++ /* Cache the output registers */ ++ ret = i2c_smbus_read_i2c_block_data(dev->client, REG_OUTPUT_PORT0, ++ sizeof(dev->outreg_cache), ++ dev->outreg_cache); ++ if (ret < 0) { ++ dev_err(&client->dev, "can't cache output registers\n"); ++ goto end; ++ } ++ ++ /* Enable the EEPROM */ ++ ret = i2c_smbus_write_i2c_block_data(client, REG_ENABLE, ++ sizeof(eeprom_enable_seq), ++ eeprom_enable_seq); ++ if (ret < 0) { ++ dev_err(&client->dev, "can't enable EEPROM\n"); ++ goto end; ++ } ++ ++end: ++ return ret; ++} ++ ++static int cy8c9540a_probe(struct i2c_client *client, ++ const struct i2c_device_id *id) ++{ ++ struct cy8c9540a *dev; ++ struct gpio_chip *gc; ++ int ret = 0; ++ s32 dev_id = 0; ++ ++ ret = gpio_request(SOC_GPIO_I2C_A0, "cy8c9540a-addr0"); ++ if (ret) { ++ pr_err("%s: failed to request gpio%u\n", __func__, ++ SOC_GPIO_I2C_A0); ++ return ret; ++ } ++ ++ /* ++ * Galileo uses A0 Extendable Soft Addressing pin on the Cypress part. ++ * The inverted value of A0 is exposed to a SoC GPIO. ++ * ++ * Work out the I2C address of the device based on A0. ++ */ ++ if (gpio_get_value(SOC_GPIO_I2C_A0)) { ++ client->addr &= ~I2C_A0_ADDR_MASK; ++ } else { ++ client->addr |= I2C_A0_ADDR_MASK; ++ } ++ ++ if (!i2c_check_functionality(client->adapter, ++ I2C_FUNC_I2C | ++ I2C_FUNC_SMBUS_I2C_BLOCK | ++ I2C_FUNC_SMBUS_BYTE_DATA)) { ++ dev_err(&client->dev, "i2c adapter doesn't support required " ++ "functionality\n"); ++ ret = -EIO; ++ goto err_i2c_addr; ++ } ++ ++ dev = kzalloc(sizeof(*dev), GFP_KERNEL); ++ if (dev == NULL) { ++ dev_err(&client->dev, "failed to alloc memory\n"); ++ ret = -ENOMEM; ++ goto err_i2c_addr; ++ } ++ ++ dev->client = client; ++ ++ gc = &dev->gpio_chip; ++ gc->direction_input = cy8c9540a_gpio_direction_input; ++ gc->direction_output = cy8c9540a_gpio_direction_output; ++ gc->get = cy8c9540a_gpio_get_value; ++ gc->set = cy8c9540a_gpio_set_value; ++ gc->set_drive = cy8c9540a_gpio_set_drive; ++ ++ gc->can_sleep = 1; ++ ++ gc->base = GPIO_BASE_ID; ++ gc->ngpio = NGPIO; ++ gc->label = client->name; ++ gc->owner = THIS_MODULE; ++ gc->to_irq = cy8c9540a_gpio_to_irq; ++ ++ mutex_init(&dev->lock); ++ ++ /* Whoami */ ++ dev_id = i2c_smbus_read_byte_data(client, REG_DEVID_STAT); ++ if (dev_id < 0) { ++ dev_err(&client->dev, "can't read device ID\n"); ++ ret = dev_id; ++ goto err; ++ } ++ dev_info(&client->dev, "dev_id=0x%x\n", dev_id & 0xff); ++ if (DEVID_FAMILY_CY8C9540A != (dev_id & DEVID_FAMILY_MASK)) { ++ dev_err(&client->dev, "unknown/unsupported dev_id 0x%x\n", ++ dev_id & 0xff); ++ ret = -ENODEV; ++ goto err; ++ } ++ ++ ret = cy8c9540a_setup(dev); ++ if (ret) { ++ goto err; ++ } ++ ++ ret = cy8c9540a_irq_setup(dev); ++ if (ret) { ++ goto err; ++ } ++ ret = gpiochip_add(&dev->gpio_chip); ++ if (ret) { ++ dev_err(&client->dev, "gpiochip_add failed %d\n", ret); ++ goto err_irq; ++ } ++ ++ dev->pwm_chip.dev = &client->dev; ++ dev->pwm_chip.ops = &cy8c9540a_pwm_ops; ++ dev->pwm_chip.base = PWM_BASE_ID; ++ dev->pwm_chip.npwm = NPWM; ++ ++ ret = pwmchip_add(&dev->pwm_chip); ++ if (ret) { ++ dev_err(&client->dev, "pwmchip_add failed %d\n", ret); ++ goto err_gpiochip; ++ } ++ ++ i2c_set_clientdata(client, dev); ++ ++ return 0; ++ ++err_gpiochip: ++ if(gpiochip_remove(&dev->gpio_chip)) ++ dev_warn(&client->dev, "gpiochip_remove failed\n"); ++err_irq: ++ cy8c9540a_irq_teardown(dev); ++err: ++ mutex_destroy(&dev->lock); ++ kfree(dev); ++err_i2c_addr: ++ gpio_free(SOC_GPIO_I2C_A0); ++ ++ return ret; ++} ++ ++static int cy8c9540a_remove(struct i2c_client *client) ++{ ++ struct cy8c9540a *dev = i2c_get_clientdata(client); ++ int ret = 0; ++ int err = 0; ++ ++ ret = pwmchip_remove(&dev->pwm_chip); ++ if (ret < 0) { ++ dev_err(&client->dev, "pwmchip_remove failed %d\n", ret); ++ err = ret; ++ } ++ ++ ret = gpiochip_remove(&dev->gpio_chip); ++ if (ret) { ++ dev_err(&client->dev, "gpiochip_remove failed %d\n", ret); ++ err = ret; ++ } ++ ++ cy8c9540a_irq_teardown(dev); ++ ++ mutex_destroy(&dev->lock); ++ kfree(dev); ++ ++ gpio_free(SOC_GPIO_I2C_A0); ++ ++ return err; ++} ++ ++static const struct i2c_device_id cy8c9540a_id[] = { ++ {DRV_NAME, 0}, ++ {} ++}; ++ ++MODULE_DEVICE_TABLE(i2c, cy8c9540a_id); ++ ++static struct i2c_driver cy8c9540a_driver = { ++ .driver = { ++ .name = DRV_NAME, ++ }, ++ .probe = cy8c9540a_probe, ++ .remove = cy8c9540a_remove, ++ .id_table = cy8c9540a_id, ++}; ++ ++module_i2c_driver(cy8c9540a_driver); ++ ++MODULE_AUTHOR("Josef Ahmad <josef.ahmad@linux.intel.com>"); ++MODULE_DESCRIPTION("GPIO/PWM driver for CY8C9540A I/O expander"); ++MODULE_LICENSE("GPL"); ++ +diff --git a/drivers/mfd/intel_cln_gip.h b/drivers/mfd/intel_cln_gip.h +new file mode 100644 +index 0000000..18ab774 +--- /dev/null ++++ b/drivers/mfd/intel_cln_gip.h +@@ -0,0 +1,101 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton GIP (GPIO/I2C) driver ++ */ ++ ++#ifndef __INTEL_CLNGIP_H__ ++#define __INTEL_CLNGIP_H__ ++ ++#include <linux/i2c.h> ++#include <linux/pci.h> ++#include "../i2c/busses/i2c-designware-core.h" ++ ++/* PCI BAR for register base address */ ++#define GIP_I2C_BAR 0 ++#define GIP_GPIO_BAR 1 ++ ++/** ++ * intel_cln_gpio_probe ++ * ++ * @param pdev: Pointer to GIP PCI device ++ * @return 0 success < 0 failure ++ * ++ * Perform GPIO-specific probing on behalf of the top-level GIP driver. ++ */ ++int intel_cln_gpio_probe(struct pci_dev *pdev); ++ ++/** ++ * intel_cln_gpio_remove ++ * ++ * @param pdev: Pointer to GIP PCI device ++ * ++ * Perform GPIO-specific resource release on behalf of the top-level GIP driver. ++ */ ++void intel_cln_gpio_remove(struct pci_dev *pdev); ++ ++/** ++ * intel_cln_gpio_isr ++ * ++ * @param irq: IRQ number to be served ++ * @param dev_id: used to distinguish the device (for shared interrupts) ++ * ++ * Perform GPIO-specific ISR of the top-level GIP driver. ++ */ ++irqreturn_t intel_cln_gpio_isr(int irq, void *dev_id); ++ ++/** ++ * intel_cln_gpio_save_state ++ * ++ * Save GPIO register state for system-wide suspend events and mask out ++ * interrupts. ++ */ ++void intel_cln_gpio_save_state(void); ++ ++/** ++ * intel_cln_gpio_restore_state ++ * ++ * Restore GPIO register state for system-wide resume events and clear out ++ * spurious interrupts. ++ */ ++void intel_cln_gpio_restore_state(void); ++ ++/** ++ * intel_cln_i2c_probe ++ * @param pdev: Pointer to GIP PCI device ++ * @param drvdata: private driver data ++ * @return 0 success < 0 failure ++ * ++ * Perform I2C-specific probing on behalf of the top-level GIP driver. ++ */ ++int intel_cln_i2c_probe(struct pci_dev *pdev, ++ struct dw_i2c_dev **drvdata); ++ ++/** ++ * intel_cln_i2c_remove ++ * @param pdev: Pointer to GIP PCI device ++ * @param dev: Pointer to I2C private data ++ * ++ * Perform I2C-specific resource release on behalf of the top-level GIP driver. ++ */ ++void intel_cln_i2c_remove(struct pci_dev *pdev, ++ struct dw_i2c_dev *dev); ++ ++#endif /* __INTEL_CLNGIP_H__ */ +diff --git a/drivers/mfd/intel_cln_gip_core.c b/drivers/mfd/intel_cln_gip_core.c +new file mode 100644 +index 0000000..7464b32 +--- /dev/null ++++ b/drivers/mfd/intel_cln_gip_core.c +@@ -0,0 +1,327 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton GIP (GPIO/I2C) PCI driver ++ * ++ * PCI glue logic for Clanton GIP driver. ++ * Clanton GIP is a single PCI function exporting a GPIO and an I2C device. ++ * The PCI driver performs the bus-dependent probe/release operations, and ++ * call into GPIO/I2C specific modules for handling the two diffrerent ++ * functionalities. ++ */ ++ ++#include <asm/cln.h> ++#include <linux/errno.h> ++#include <linux/gpio.h> ++#include <linux/i2c.h> ++#include <linux/init.h> ++#include <linux/interrupt.h> ++#include <linux/irq.h> ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/pci.h> ++#include "intel_cln_gip.h" ++ ++static unsigned int enable_msi = 1; ++module_param(enable_msi, uint, S_IRUGO | S_IWUSR); ++MODULE_PARM_DESC(enable_msi, "Enable PCI MSI mode"); ++ ++static unsigned int i2c = 1; ++module_param(i2c, uint, S_IRUGO | S_IWUSR); ++MODULE_PARM_DESC(i2c, "Register I2C adapter"); ++ ++static unsigned int gpio = 1; ++module_param(gpio, uint, S_IRUGO | S_IWUSR); ++MODULE_PARM_DESC(gpio, "Register GPIO chip"); ++ ++/* GIP private data, supporting only a single instance of the device. */ ++struct intel_cln_gip_data { ++ struct pci_dev *pci_device; ++ struct dw_i2c_dev *i2c_drvdata; ++}; ++ ++/** ++ * intel_cln_gip_handler ++ * ++ * @param irq: IRQ number to be served ++ * @param dev_id: device private data ++ * ++ * Top-level interrupt handler for GIP driver. ++ * It calls into the appropriate sub-routines and gathers the return values. ++ */ ++static irqreturn_t intel_cln_gip_handler(int irq, void *dev_id) ++{ ++ irqreturn_t ret_i2c = IRQ_NONE; ++ irqreturn_t ret_gpio = IRQ_NONE; ++ struct intel_cln_gip_data *data = (struct intel_cln_gip_data *)dev_id; ++ ++ mask_pvm(data->pci_device); ++ ++ if (likely(i2c)) { ++ /* Only I2C gets platform data */ ++ ret_i2c = i2c_dw_isr(irq, data->i2c_drvdata); ++ } ++ ++ if (likely(gpio)) { ++ ret_gpio = intel_cln_gpio_isr(irq, NULL); ++ } ++ ++ unmask_pvm(data->pci_device); ++ ++ if (likely(IRQ_HANDLED == ret_i2c || IRQ_HANDLED == ret_gpio)) ++ return IRQ_HANDLED; ++ ++ /* Each sub-ISR routine returns either IRQ_HANDLED or IRQ_NONE. */ ++ return IRQ_NONE; ++} ++ ++static DEFINE_PCI_DEVICE_TABLE(intel_cln_gip_ids) = { ++ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0934), }, ++ { 0, } ++}; ++MODULE_DEVICE_TABLE(pci, intel_cln_gip_ids); ++ ++#ifdef CONFIG_PM ++ ++/** ++ * cln_gip_suspend ++ * ++ * @param device: Pointer to device ++ * @return 0 success < 0 failure ++ * ++ * Prepare GIP for system-wide transition to sleep state. ++ * Save context, disable GPIO chip and I2C adapter, transition PCI device into ++ * low-power state. ++ */ ++static int cln_gip_suspend(struct device *dev) ++{ ++ int err = 0; ++ struct intel_cln_gip_data *data = NULL; ++ struct pci_dev *pdev = container_of(dev, struct pci_dev, dev); ++ data = (struct intel_cln_gip_data *)pci_get_drvdata(pdev); ++ ++ i2c_dw_disable(data->i2c_drvdata); ++ intel_cln_gpio_save_state(); ++ ++ err = pci_save_state(pdev); ++ if (err) { ++ dev_err(&pdev->dev, "pci_save_state failed\n"); ++ return err; ++ } ++ ++ err = pci_set_power_state(pdev, PCI_D3hot); ++ if (err) { ++ dev_err(&pdev->dev, "pci_set_power_state failed\n"); ++ return err; ++ } ++ ++ return 0; ++} ++ ++/** ++ * cln_gip_resume ++ * ++ * @param device: Pointer to device ++ * @return 0 success < 0 failure ++ * ++ * Prepare GIP for system-wide transition to fully active state. ++ * Set PCI device into full-power state, restore context, enable I2C adapter ++ * and GPIO chip. ++ */ ++static int cln_gip_resume(struct device *dev) ++{ ++ int err = 0; ++ struct intel_cln_gip_data *data = NULL; ++ struct pci_dev *pdev = container_of(dev, struct pci_dev, dev); ++ data = (struct intel_cln_gip_data *)pci_get_drvdata(pdev); ++ ++ err = pci_set_power_state(pdev, PCI_D0); ++ if (err) { ++ dev_err(&pdev->dev, "pci_set_power_state() failed\n"); ++ return err; ++ } ++ ++ pci_restore_state(pdev); ++ ++ intel_cln_gpio_restore_state(); ++ i2c_dw_init(data->i2c_drvdata); ++ ++ return 0; ++} ++ ++#else ++#define cln_gip_suspend NULL ++#define cln_gip_resume NULL ++#endif ++ ++static const struct dev_pm_ops cln_gip_pm_ops = { ++ .resume = cln_gip_resume, ++ .suspend = cln_gip_suspend, ++}; ++ ++/** ++ * intel_cln_gip_probe ++ * ++ * @param pdev: Pointer to GIP PCI device ++ * @param id: GIP PCI Device ID ++ * @return 0 success < 0 failure ++ * ++ * GIP PCI driver probing. Calls into the appropriate probe routines for GPIO ++ * and I2C too. ++ */ ++static int intel_cln_gip_probe(struct pci_dev *pdev, ++ const struct pci_device_id *id) ++{ ++ int retval = 0; ++ struct intel_cln_gip_data *gip_drvdata = NULL; ++ ++ retval = pci_enable_device(pdev); ++ if (retval) ++ return retval; ++ ++ retval = pci_request_regions(pdev, "cln-gip"); ++ if (retval) { ++ dev_err(&pdev->dev, "error requesting PCI region\n"); ++ goto err_pcidev_disable; ++ } ++ ++ gip_drvdata = kzalloc(sizeof(struct intel_cln_gip_data), GFP_KERNEL); ++ if (NULL == gip_drvdata) { ++ retval = -ENOMEM; ++ goto err_pciregions_release; ++ } ++ pci_set_drvdata(pdev, gip_drvdata); ++ ++ gip_drvdata->pci_device = pdev; ++ ++ if (gpio) { ++ retval = intel_cln_gpio_probe(pdev); ++ if (retval) ++ goto err_release_drvdata; ++ } ++ ++ if (i2c) { ++ retval = intel_cln_i2c_probe(pdev, ++ (struct dw_i2c_dev **)&gip_drvdata->i2c_drvdata); ++ if (retval) ++ goto err_release_drvdata; ++ } ++ ++ if (enable_msi) { ++ pci_set_master(pdev); ++ retval = pci_enable_msi(pdev); ++ if (retval) ++ goto err_release_drvdata; ++ } ++ ++ /* ++ * Request a shared IRQ. ++ * Since the dev_id cannot be NULL, it points to PCI device descriptor ++ * if I2C is not registered. ++ */ ++ retval = request_irq(pdev->irq, intel_cln_gip_handler, IRQF_SHARED, ++ "intel_cln_gip", gip_drvdata); ++ if (retval) { ++ dev_err(&pdev->dev, "error requesting IRQ\n"); ++ goto err; ++ } ++ ++ return 0; ++ ++err_release_drvdata: ++ pci_set_drvdata(pdev, NULL); ++ kfree(gip_drvdata); ++err: ++ if (enable_msi) ++ pci_disable_msi(pdev); ++err_pciregions_release: ++ pci_release_regions(pdev); ++err_pcidev_disable: ++ pci_disable_device(pdev); ++ ++ return retval; ++} ++ ++/** ++ * intel_cln_gip_remove ++ * ++ * @param pdev: Pointer to GIP PCI device ++ * ++ * Release resources. Calls into GPIO/I2C dedicate routines too. ++ */ ++static void intel_cln_gip_remove(struct pci_dev *pdev) ++{ ++ struct intel_cln_gip_data *data = NULL; ++ ++ data = (struct intel_cln_gip_data *)pci_get_drvdata(pdev); ++ ++ if (NULL == data) { ++ dev_err(&pdev->dev, "%s: failure getting driver data\n", ++ __func__); ++ return; ++ } ++ ++ free_irq(pdev->irq, data); ++ ++ if (enable_msi) { ++ pci_clear_master(pdev); ++ if (pci_dev_msi_enabled(pdev)) ++ pci_disable_msi(pdev); ++ } ++ ++ if (i2c) ++ intel_cln_i2c_remove(pdev, data->i2c_drvdata); ++ ++ if (gpio) ++ intel_cln_gpio_remove(pdev); ++ ++ pci_set_drvdata(pdev, NULL); ++ kfree(data); ++ ++ pci_release_regions(pdev); ++ pci_disable_device(pdev); ++} ++ ++static struct pci_driver intel_cln_gip_driver = { ++ .name = "intel_cln_gip", ++ .id_table = intel_cln_gip_ids, ++ .probe = intel_cln_gip_probe, ++ .remove = intel_cln_gip_remove, ++ .driver = { ++ .pm = &cln_gip_pm_ops, ++ }, ++}; ++ ++static int intel_cln_gip_init(void) ++{ ++ return pci_register_driver(&intel_cln_gip_driver); ++} ++ ++static void intel_cln_gip_exit(void) ++{ ++ pci_unregister_driver(&intel_cln_gip_driver); ++} ++ ++module_init(intel_cln_gip_init); ++module_exit(intel_cln_gip_exit); ++ ++MODULE_AUTHOR("Intel Corporation"); ++MODULE_DESCRIPTION("Clanton GIP driver"); ++MODULE_LICENSE("Dual BSD/GPL"); +diff --git a/drivers/mfd/intel_cln_gip_gpio.c b/drivers/mfd/intel_cln_gip_gpio.c +new file mode 100644 +index 0000000..6e2bbbf +--- /dev/null ++++ b/drivers/mfd/intel_cln_gip_gpio.c +@@ -0,0 +1,660 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton GIP (GPIO/I2C) - GPIO-specific PCI and core driver ++ * ++ * PCI glue logic and core driver for Clanton GIP/GPIO. ++ * The GIP GPIO device is the DesignWare GPIO. This file defines the PCI glue ++ * for this driver and as well as the core logic for the device. ++ * Please note only a single instance of the GPIO device is supported. ++ * The default number of GPIO is 8, all interrupt-capable. ++ */ ++ ++#include <linux/errno.h> ++#include <linux/gpio.h> ++#include <linux/irq.h> ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/pci.h> ++#include <linux/platform_device.h> ++#include <linux/uio_driver.h> ++#include "intel_cln_gip.h" ++ ++static void cln_gpio_restrict_release(struct device *dev) {} ++static struct platform_device cln_gpio_restrict_pdev = ++{ ++ .name = "cln-gpio-restrict-sc", ++ .dev.release = cln_gpio_restrict_release, ++}; ++struct uio_info *info; ++ ++/* The base GPIO number under GPIOLIB framework */ ++#define INTEL_CLN_GIP_GPIO_BASE 8 ++ ++/* The default number of South-Cluster GPIO on Clanton. */ ++#define INTEL_CLN_GIP_NGPIO 8 ++ ++/* ++ * The default base IRQ for searching and allocating the range of GPIO IRQ ++ * descriptors. ++ */ ++#define INTEL_CLN_GIP_GPIO_IRQBASE 56 ++ ++/* The GPIO private data. */ ++static struct gpio_chip *gc; ++static struct irq_chip_generic *igc; ++static void __iomem *reg_base; ++static spinlock_t lock; ++static int irq_base; ++static unsigned int n_gpio = INTEL_CLN_GIP_NGPIO; ++static unsigned int gpio_irqbase = INTEL_CLN_GIP_GPIO_IRQBASE; ++ ++/* Store GPIO context across system-wide suspend/resume transitions */ ++static struct gpio_saved_regs { ++ u32 data; ++ u32 dir; ++ u32 int_en; ++ u32 int_mask; ++ u32 int_type; ++ u32 int_pol; ++ u32 int_deb; ++} saved_regs; ++ ++/* PortA registers set. Note other ports are unused */ ++#define PORTA_DATA 0x00 /* Data */ ++#define PORTA_DIR 0x04 /* Direction */ ++#define PORTA_INT_EN 0x30 /* Interrupt enable */ ++#define PORTA_INT_MASK 0x34 /* Interrupt mask */ ++#define PORTA_INT_TYPE_LEVEL 0x38 /* Interrupt level*/ ++#define PORTA_INT_POLARITY 0x3c /* Interrupt polarity */ ++#define PORTA_INT_STATUS 0x40 /* Interrupt status */ ++#define PORTA_INT_RAW_STATUS 0x44 /* Interrupt raw status */ ++#define PORTA_DEBOUNCE 0x48 /* Debounce enable */ ++#define PORTA_INT_EOI 0x4c /* Clear interrupt */ ++#define PORTA_EXT 0x50 /* External */ ++ ++module_param(n_gpio, uint, S_IRUGO | S_IWUSR); ++MODULE_PARM_DESC(n_gpio, "Number of GPIO"); ++ ++module_param(gpio_irqbase, uint, S_IRUGO | S_IWUSR); ++MODULE_PARM_DESC(gpio_irqbase, "Base IRQ for GPIO range"); ++ ++/** ++ * intel_cln_gpio_get ++ * @param chip: Pointer to GPIO chip registered by GPIOLIB ++ * @param offset: the GPIO number within the GPIOLIB chip ++ * @return 0 if GPIO is deasserted, 1 if GPIO is asserted ++ * ++ * Read back the value of a GPIO. ++ */ ++static int intel_cln_gpio_get(struct gpio_chip *chip, unsigned offset) ++{ ++ void __iomem *reg_ext = reg_base + PORTA_EXT; ++ u32 val_ext = ioread32(reg_ext); ++ ++ val_ext &= BIT(offset % 32); ++ return (val_ext > 0); ++} ++ ++/** ++ * intel_cln_gpio_set ++ * @param chip: Pointer to GPIO chip registered by GPIOLIB ++ * @param offset: the GPIO number within the GPIOLIB chip ++ * ++ * Set value of a GPIO. ++ */ ++static void intel_cln_gpio_set(struct gpio_chip *chip, unsigned offset, ++ int value) ++{ ++ void __iomem *reg_data = reg_base + PORTA_DATA; ++ u32 val_data = 0; ++ unsigned long flags = 0; ++ ++ spin_lock_irqsave(&lock, flags); ++ ++ val_data = ioread32(reg_data); ++ if (value) ++ iowrite32(val_data | BIT(offset % 32), reg_data); ++ else ++ iowrite32(val_data & ~BIT(offset % 32), reg_data); ++ ++ spin_unlock_irqrestore(&lock, flags); ++} ++ ++/** ++ * intel_cln_gpio_direction_input ++ * @param chip: Pointer to GPIO chip registered by GPIOLIB ++ * @param offset: the GPIO number within the GPIOLIB chip ++ * @return always 0 (success) ++ * ++ * Set direction of a GPIO as input. ++ */ ++static int intel_cln_gpio_direction_input(struct gpio_chip *chip, ++ unsigned offset) ++{ ++ u32 val_dir = 0; ++ void __iomem *reg_dir = reg_base + PORTA_DIR; ++ unsigned long flags = 0; ++ ++ spin_lock_irqsave(&lock, flags); ++ ++ val_dir = ioread32(reg_dir); ++ iowrite32(val_dir & ~BIT(offset % 32), reg_dir); ++ ++ spin_unlock_irqrestore(&lock, flags); ++ ++ return 0; ++} ++ ++/** ++ * intel_cln_gpio_direction_output ++ * @param chip: Pointer to GPIO chip registered by GPIOLIB ++ * @param offset: the GPIO number within the GPIOLIB chip ++ * @param value: value to be driven to the GPIO ++ * @return always 0 (success) ++ * ++ * Set the default value of a GPIO, and then set direction as output. ++ */ ++static int intel_cln_gpio_direction_output(struct gpio_chip *chip, ++ unsigned offset, int value) ++{ ++ u32 val_dir = 0; ++ void __iomem *reg_dir = reg_base + PORTA_DIR; ++ unsigned long flags = 0; ++ ++ /* Ensure glitch-free operation. */ ++ intel_cln_gpio_set(chip, offset, value); ++ ++ spin_lock_irqsave(&lock, flags); ++ ++ val_dir = ioread32(reg_dir); ++ iowrite32(val_dir | BIT(offset % 32), reg_dir); ++ ++ spin_unlock_irqrestore(&lock, flags); ++ ++ return 0; ++} ++ ++/** ++ * intel_cln_gpio_set_debounce ++ * @param chip: Pointer to GPIO chip registered by GPIOLIB ++ * @param offset: the GPIO number within the GPIOLIB chip ++ * @param debounce: 1 to enable, 0 to disable ++ * @return always 0 (success) ++ * ++ * Enable/disable interrupt debounce logic for a GPIO. ++ */ ++static int intel_cln_gpio_set_debounce(struct gpio_chip *chip, ++ unsigned offset, unsigned debounce) ++{ ++ u32 val_deb = 0; ++ void __iomem *reg_deb = reg_base + PORTA_DEBOUNCE; ++ unsigned long flags = 0; ++ ++ spin_lock_irqsave(&lock, flags); ++ ++ val_deb = ioread32(reg_deb); ++ if (debounce) ++ iowrite32(val_deb | BIT(offset % 32), reg_deb); ++ else ++ iowrite32(val_deb & ~BIT(offset % 32), reg_deb); ++ ++ spin_unlock_irqrestore(&lock, flags); ++ ++ return 0; ++} ++ ++/** ++ * intel_cln_gpio_irq_type ++ * @param irq_data: Pointer to information about the IRQ ++ * @param type: set the triggering type of the interrupt ++ * @return always 0 (success) ++ * ++ * Set interrupt triggering type for a GPIO. ++ */ ++static int intel_cln_gpio_irq_type(struct irq_data *d, unsigned type) ++{ ++ int ret = 0; ++ unsigned long flags = 0; ++ void __iomem *reg_level = reg_base + PORTA_INT_TYPE_LEVEL; ++ void __iomem *reg_pol = reg_base + PORTA_INT_POLARITY; ++ u32 val_level = 0; ++ u32 val_pol = 0; ++ u32 gpio = 0; ++ ++ if (NULL == d) { ++ pr_err("%s(): null irq_data\n", __func__); ++ return -EFAULT; ++ } ++ ++ gpio = d->irq - irq_base; ++ ++ spin_lock_irqsave(&lock, flags); ++ ++ val_level = ioread32(reg_level); ++ val_pol = ioread32(reg_pol); ++ ++ switch (type) { ++ case IRQ_TYPE_EDGE_RISING: ++ iowrite32(val_level | BIT(gpio % 32), reg_level); ++ iowrite32(val_pol | BIT(gpio % 32), reg_pol); ++ break; ++ case IRQ_TYPE_EDGE_FALLING: ++ iowrite32(val_level | BIT(gpio % 32), reg_level); ++ iowrite32(val_pol & ~BIT(gpio % 32), reg_pol); ++ break; ++ case IRQ_TYPE_LEVEL_HIGH: ++ iowrite32(val_level & ~BIT(gpio % 32), reg_level); ++ iowrite32(val_pol | BIT(gpio % 32), reg_pol); ++ break; ++ case IRQ_TYPE_LEVEL_LOW: ++ iowrite32(val_level & ~BIT(gpio % 32), reg_level); ++ iowrite32(val_pol & ~BIT(gpio % 32), reg_pol); ++ break; ++ default: ++ ret = -EINVAL; ++ break; ++ } ++ ++ spin_unlock_irqrestore(&lock, flags); ++ ++ return ret; ++} ++ ++/** ++ * intel_cln_gpio_irq_unmask ++ * @param irq_data: Pointer to information about the IRQ ++ * ++ * Unmask interrupts for a GPIO. ++ */ ++static void intel_cln_gpio_irq_unmask(struct irq_data *d) ++{ ++ unsigned long flags = 0; ++ void __iomem *reg_mask = reg_base + PORTA_INT_MASK; ++ u32 val_mask = 0; ++ unsigned gpio = 0; ++ ++ if (NULL == d) { ++ pr_err("%s(): null irq_data\n", __func__); ++ return; ++ } ++ ++ gpio = d->irq - irq_base; ++ ++ spin_lock_irqsave(&lock, flags); ++ val_mask = ioread32(reg_mask); ++ iowrite32(val_mask | BIT(gpio % 32), reg_mask); ++ spin_unlock_irqrestore(&lock, flags); ++} ++ ++/** ++ * intel_cln_gpio_irq_mask ++ * @param irq_data: Pointer to information about the IRQ ++ * ++ * Mask interrupts for a GPIO. ++ */ ++static void intel_cln_gpio_irq_mask(struct irq_data *d) ++{ ++ unsigned long flags = 0; ++ void __iomem *reg_mask = reg_base + PORTA_INT_MASK; ++ u32 val_mask = 0; ++ unsigned gpio = 0; ++ ++ if (NULL == d) { ++ pr_err("%s(): null irq_data\n", __func__); ++ return; ++ } ++ ++ gpio = d->irq - irq_base; ++ ++ spin_lock_irqsave(&lock, flags); ++ val_mask = ioread32(reg_mask); ++ iowrite32(val_mask & ~BIT(gpio % 32), reg_mask); ++ spin_unlock_irqrestore(&lock, flags); ++} ++ ++/** ++ * intel_cln_gpio_irq_enable ++ * @param irq_data: Pointer to information about the IRQ ++ * ++ * Enable interrupts for a GPIO. ++ */ ++static void intel_cln_gpio_irq_enable(struct irq_data *d) ++{ ++ unsigned long flags = 0; ++ void __iomem *reg_inte = reg_base + PORTA_INT_EN; ++ u32 val_inte = 0; ++ unsigned gpio = 0; ++ ++ if (NULL == d) { ++ pr_err("%s(): null irq_data\n", __func__); ++ return; ++ } ++ ++ gpio = d->irq - irq_base; ++ ++ spin_lock_irqsave(&lock, flags); ++ val_inte = ioread32(reg_inte); ++ iowrite32(val_inte | BIT(gpio % 32), reg_inte); ++ spin_unlock_irqrestore(&lock, flags); ++} ++ ++/** ++ * intel_cln_gpio_irq_disable ++ * @param irq_data: Pointer to information about the IRQ ++ * ++ * Disable interrupts for a GPIO. ++ */ ++static void intel_cln_gpio_irq_disable(struct irq_data *d) ++{ ++ unsigned long flags = 0; ++ void __iomem *reg_inte = reg_base + PORTA_INT_EN; ++ u32 val_inte = 0; ++ unsigned gpio = 0; ++ ++ if (NULL == d) { ++ pr_err("%s(): null irq_data\n", __func__); ++ return; ++ } ++ ++ gpio = d->irq - irq_base; ++ ++ spin_lock_irqsave(&lock, flags); ++ val_inte = ioread32(reg_inte); ++ iowrite32(val_inte & ~BIT(gpio % 32), reg_inte); ++ spin_unlock_irqrestore(&lock, flags); ++} ++ ++/** ++ * intel_cln_gpio_to_irq ++ * @param chip: Pointer to GPIO chip registered by GPIOLIB ++ * @param offset: the GPIO number within the GPIOLIB chip ++ * @return IRQ associated to GPIO ++ * ++ * Compute the IRQ number based on the GPIO. ++ */ ++static int intel_cln_gpio_to_irq(struct gpio_chip *chip, unsigned offset) ++{ ++ return irq_base + offset; ++} ++ ++/** ++ * intel_cln_gpio_isr ++ * @param irq: IRQ number ++ * @param dev_id: cookie used to tell what instance of the driver the interrupt ++ * belongs to ++ * @return IRQ_HANDLED if interrupt served, IRQ_NONE if no interrupt pending ++ * ++ * Interrupt Service Routine for GPIO. Identify which GPIOs (if any) is pending ++ * for interrupt to be served, acknowledge the interrupt and serve it. ++ */ ++irqreturn_t intel_cln_gpio_isr(int irq, void *dev_id) ++{ ++ irqreturn_t ret = IRQ_NONE; ++ u32 pending = 0, gpio = 0; ++ void __iomem *reg_pending = reg_base + PORTA_INT_STATUS; ++ void __iomem *reg_eoi = reg_base + PORTA_INT_EOI; ++ ++ /* Which pin (if any) triggered the interrupt */ ++ while ((pending = ioread32(reg_pending))) { ++ /* ++ * Acknowledge all the asserted GPIO interrupt lines before ++ * serving them, so that we don't lose an edge. ++ * This has only effect on edge-triggered interrupts. ++ */ ++ iowrite32(pending, reg_eoi); ++ ++ /* Serve each asserted interrupt */ ++ do { ++ gpio = __ffs(pending); ++ generic_handle_irq( ++ gpio_to_irq(INTEL_CLN_GIP_GPIO_BASE + gpio)); ++ pending &= ~BIT(gpio); ++ ret = IRQ_HANDLED; ++ } while(pending); ++ } ++ ++ return ret; ++} ++ ++/** ++ * intel_cln_gpio_save_state ++ * ++ * Save GPIO register state for system-wide suspend events and mask out ++ * interrupts. ++ */ ++void intel_cln_gpio_save_state(void) ++{ ++ unsigned long flags = 0; ++ ++ spin_lock_irqsave(&lock, flags); ++ ++ saved_regs.int_mask = ioread32(reg_base + PORTA_INT_MASK); ++ saved_regs.int_en = ioread32(reg_base + PORTA_INT_EN); ++ saved_regs.int_deb = ioread32(reg_base + PORTA_DEBOUNCE); ++ saved_regs.int_pol = ioread32(reg_base + PORTA_INT_POLARITY); ++ saved_regs.int_type = ioread32(reg_base + PORTA_INT_TYPE_LEVEL); ++ saved_regs.dir = ioread32(reg_base + PORTA_DIR); ++ saved_regs.data = ioread32(reg_base + PORTA_DATA); ++ ++ /* Mask out interrupts */ ++ iowrite32(0xffffffff, reg_base + PORTA_INT_MASK); ++ ++ spin_unlock_irqrestore(&lock, flags); ++} ++ ++/** ++ * intel_cln_gpio_restore_state ++ * ++ * Restore GPIO register state for system-wide resume events and clear out ++ * spurious interrupts. ++ */ ++void intel_cln_gpio_restore_state(void) ++{ ++ unsigned long flags = 0; ++ ++ spin_lock_irqsave(&lock, flags); ++ ++ iowrite32(saved_regs.data, reg_base + PORTA_DATA); ++ iowrite32(saved_regs.dir, reg_base + PORTA_DIR); ++ iowrite32(saved_regs.int_type, reg_base + PORTA_INT_TYPE_LEVEL); ++ iowrite32(saved_regs.int_pol, reg_base + PORTA_INT_POLARITY); ++ iowrite32(saved_regs.int_deb, reg_base + PORTA_DEBOUNCE); ++ iowrite32(saved_regs.int_en, reg_base + PORTA_INT_EN); ++ iowrite32(saved_regs.int_mask, reg_base + PORTA_INT_MASK); ++ ++ /* Clear out spurious interrupts */ ++ iowrite32(0xffffffff, reg_base + PORTA_INT_EOI); ++ ++ spin_unlock_irqrestore(&lock, flags); ++} ++ ++/** ++ * intel_cln_gpio_probe ++ * @param pdev: Pointer to GIP PCI device ++ * @return 0 success < 0 failure ++ * ++ * Perform GPIO-specific probing on behalf of the top-level GIP driver. ++ * Initiate the GPIO device. ++ */ ++int intel_cln_gpio_probe(struct pci_dev *pdev) ++{ ++ int retval = 0; ++ resource_size_t start = 0, len = 0; ++ ++ /* Get UIO memory */ ++ info = kzalloc(sizeof(struct uio_info), GFP_KERNEL); ++ if (!info) ++ return -ENOMEM; ++ ++ /* Determine the address of the GPIO area */ ++ start = pci_resource_start(pdev, GIP_GPIO_BAR); ++ len = pci_resource_len(pdev, GIP_GPIO_BAR); ++ if (!start || len == 0) { ++ dev_err(&pdev->dev, "bar%d not set\n", GIP_GPIO_BAR); ++ retval = -ENODEV; ++ goto exit; ++ } ++ ++ reg_base = ioremap_nocache(start, len); ++ if (NULL == reg_base) { ++ dev_err(&pdev->dev, "I/O memory remapping failed\n"); ++ retval = -EFAULT; ++ goto exit; ++ } ++ ++ memset(&saved_regs, 0x0, sizeof(saved_regs)); ++ ++ gc = kzalloc(sizeof(struct gpio_chip), GFP_KERNEL); ++ if (!gc) { ++ retval = -ENOMEM; ++ goto err_iounmap; ++ } ++ ++ if (n_gpio == 0 || n_gpio > INTEL_CLN_GIP_NGPIO) { ++ dev_err(&pdev->dev, "n_gpio outside range [1,%d]\n", ++ INTEL_CLN_GIP_NGPIO); ++ retval = -EINVAL; ++ goto err_free_gpiochip; ++ } ++ ++ gc->label = "intel_cln_gip_gpio"; ++ gc->owner = THIS_MODULE; ++ gc->direction_input = intel_cln_gpio_direction_input; ++ gc->direction_output = intel_cln_gpio_direction_output; ++ gc->get = intel_cln_gpio_get; ++ gc->set = intel_cln_gpio_set; ++ gc->set_debounce = intel_cln_gpio_set_debounce; ++ gc->to_irq = intel_cln_gpio_to_irq; ++ gc->base = INTEL_CLN_GIP_GPIO_BASE; ++ gc->ngpio = n_gpio; ++ gc->can_sleep = 0; ++ retval = gpiochip_add(gc); ++ if (retval) { ++ dev_err(&pdev->dev, "failure adding GPIO chip\n"); ++ goto err_free_gpiochip; ++ } ++ ++ spin_lock_init(&lock); ++ ++ /* ++ * Allocate a range of IRQ descriptor for the available GPIO. ++ * IRQs are allocated dynamically. ++ */ ++ irq_base = irq_alloc_descs(-1, gpio_irqbase, n_gpio, NUMA_NO_NODE); ++ if (irq_base < 0) { ++ dev_err(&pdev->dev, "failure adding GPIO IRQ descriptors\n"); ++ goto err_remove_gpiochip; ++ } ++ ++ retval = platform_device_register(&cln_gpio_restrict_pdev); ++ if (retval < 0){ ++ goto err_free_irq_descs; ++ } ++ ++ igc = irq_alloc_generic_chip("intel_cln_gip_gpio", 1, irq_base, ++ reg_base, handle_simple_irq); ++ if (NULL == igc) { ++ retval = -ENOMEM; ++ goto err_free_irq_descs; ++ } ++ ++ /* UIO */ ++ info->mem[0].addr = start; ++ info->mem[0].internal_addr = reg_base; ++ info->mem[0].size = len; ++ info->mem[0].memtype = UIO_MEM_PHYS; ++ info->mem[0].name = "gpio_regs"; ++ info->name = "gpio uio"; ++ info->version = "0.0.1"; ++ ++ if (uio_register_device(&pdev->dev, info)) ++ goto err_free_irq_descs; ++ ++ pr_info("%s UIO addr 0x%08x internal_addr 0x%08x size %lu memtype %d\n", ++ __func__, (unsigned int)info->mem[0].addr, ++ (unsigned int)info->mem[0].internal_addr, info->mem[0].size, ++ info->mem[0].memtype); ++ igc->chip_types->chip.irq_mask = intel_cln_gpio_irq_mask; ++ igc->chip_types->chip.irq_unmask = intel_cln_gpio_irq_unmask; ++ igc->chip_types->chip.irq_set_type = intel_cln_gpio_irq_type; ++ igc->chip_types->chip.irq_enable = intel_cln_gpio_irq_enable; ++ igc->chip_types->chip.irq_disable = intel_cln_gpio_irq_disable; ++ ++ irq_setup_generic_chip(igc, IRQ_MSK(n_gpio), IRQ_GC_INIT_MASK_CACHE, ++ IRQ_NOREQUEST | IRQ_NOPROBE, 0); ++ ++ return 0; ++ ++err_free_irq_descs: ++ irq_free_descs(irq_base, n_gpio); ++err_remove_gpiochip: ++ if (0 != gpiochip_remove(gc)) ++ dev_err(&pdev->dev, "failed removing gpio_chip\n"); ++err_free_gpiochip: ++ kfree(gc); ++err_iounmap: ++ iounmap(reg_base); ++exit: ++ if (info != NULL) ++ kfree(info); ++ return retval; ++} ++ ++/** ++ * intel_cln_gpio_remove ++ * @param pdev: Pointer to GIP PCI device ++ * ++ * Perform GPIO-specific resource release on behalf of the top-level GIP ++ * driver. ++ */ ++void intel_cln_gpio_remove(struct pci_dev *pdev) ++{ ++ if (NULL == igc) { ++ dev_err(&pdev->dev, "null pointer to irq_generic_chip\n"); ++ return; ++ } ++ if (NULL == gc) { ++ dev_err(&pdev->dev, "null pointer to gpio_chip\n"); ++ return; ++ } ++ ++ /* Tear down IRQ descriptors */ ++ irq_remove_generic_chip(igc, IRQ_MSK(n_gpio), 0, ++ IRQ_NOREQUEST | IRQ_NOPROBE); ++ kfree(igc); ++ irq_free_descs(irq_base, n_gpio); ++ ++ platform_device_unregister(&cln_gpio_restrict_pdev); ++ ++ /* Release GPIO chip */ ++ if (0 != gpiochip_remove(gc)) ++ dev_err(&pdev->dev, "failed removing gpio_chip\n"); ++ ++ ++ if (info != NULL){ ++ uio_unregister_device(info); ++ iounmap(info->mem[0].internal_addr); ++ kfree(info); ++ } ++ ++ kfree(gc); ++ iounmap(reg_base); ++} +diff --git a/drivers/mfd/intel_cln_gip_i2c.c b/drivers/mfd/intel_cln_gip_i2c.c +new file mode 100644 +index 0000000..3675e50 +--- /dev/null ++++ b/drivers/mfd/intel_cln_gip_i2c.c +@@ -0,0 +1,204 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton GIP (GPIO/I2C) - I2C-specific PCI driver ++ * ++ * PCI glue logic for Clanton GIP/I2C. ++ * The GIP I2C device is the DesignWare I2C. This file defines the PCI glue ++ * for this driver and is heavily based on ++ * on drivers/i2c/busses/i2c-designware-pcidrv.c. Also, it relies on ++ * drivers/i2c/busses/i2c-designware-core.c for the core logic. ++ * Please note only a single instance of the I2C device is supported. ++ */ ++ ++#include <linux/errno.h> ++#include <linux/i2c.h> ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/pci.h> ++#include "intel_cln_gip.h" ++ ++enum dw_pci_ctl_id_t { ++ clanton_0, ++}; ++ ++static unsigned int i2c_std_mode; ++module_param(i2c_std_mode, uint, S_IRUSR); ++MODULE_PARM_DESC(i2c_std_mode, "Force I2C standard mode"); ++ ++#define INTEL_CLN_STD_CFG (DW_IC_CON_MASTER | \ ++ DW_IC_CON_SLAVE_DISABLE | \ ++ DW_IC_CON_RESTART_EN) ++ ++static struct dw_pci_controller cln_gip_i2c_controller = { ++ .bus_num = 0, ++ .bus_cfg = INTEL_CLN_STD_CFG | DW_IC_CON_SPEED_FAST, ++ .tx_fifo_depth = 16, ++ .rx_fifo_depth = 16, ++ .clk_khz = ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC_FPGAEMU ++ 14000, ++#else ++ 33000, ++#endif ++ .explicit_stop = 1, ++}; ++ ++static struct i2c_algorithm i2c_dw_algo = { ++ .master_xfer = i2c_dw_xfer, ++ .functionality = i2c_dw_func, ++}; ++ ++/** ++ * i2c_dw_get_clk_rate_khz ++ * @param dev: Pointer to I2C device private data ++ * @return clock rate in kHz ++ * ++ * Ancillary function returning the frequency of the clock supplied to the ++ * interface. ++ */ ++static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev) ++{ ++ return dev->controller->clk_khz; ++} ++ ++/** ++ * intel_cln_i2c_probe ++ * @param pdev: Pointer to GIP PCI device ++ * @param drvdata: private driver data ++ * @return 0 success < 0 failure ++ * ++ * Perform I2C-specific probing on behalf of the top-level GIP driver. ++ * Also call into I2C core driver routines for initiating the device. ++ */ ++int intel_cln_i2c_probe(struct pci_dev *pdev, ++ struct dw_i2c_dev **drvdata) ++{ ++ int retval = 0; ++ resource_size_t start = 0, len = 0; ++ struct dw_i2c_dev *dev = NULL; ++ struct i2c_adapter *adap = NULL; ++ void __iomem *reg_base = NULL; ++ struct dw_pci_controller *controller = NULL; ++ ++ controller = &cln_gip_i2c_controller; ++ ++ /* Clanton default configuration is fast mode, unless otherwise asked */ ++ if (i2c_std_mode) ++ controller->bus_cfg = INTEL_CLN_STD_CFG | DW_IC_CON_SPEED_STD; ++ ++ /* Determine the address of the I2C area */ ++ start = pci_resource_start(pdev, GIP_I2C_BAR); ++ len = pci_resource_len(pdev, GIP_I2C_BAR); ++ if (!start || len == 0) { ++ dev_err(&pdev->dev, "bar%d not set\n", GIP_I2C_BAR); ++ retval = -ENODEV; ++ goto err; ++ } ++ ++ reg_base = ioremap_nocache(start, len); ++ if (!reg_base) { ++ dev_err(&pdev->dev, "I/O memory remapping failed\n"); ++ retval = -ENOMEM; ++ goto err; ++ } ++ ++ dev = kzalloc(sizeof(struct dw_i2c_dev), GFP_KERNEL); ++ if (!dev) { ++ retval = -ENOMEM; ++ goto err_iounmap; ++ } ++ ++ init_completion(&dev->cmd_complete); ++ mutex_init(&dev->lock); ++ dev->clk = NULL; ++ dev->controller = controller; ++ dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz; ++ dev->base = reg_base; ++ dev->dev = get_device(&pdev->dev); ++ dev->functionality = ++ I2C_FUNC_I2C | ++ I2C_FUNC_10BIT_ADDR | ++ I2C_FUNC_SMBUS_BYTE | ++ I2C_FUNC_SMBUS_BYTE_DATA | ++ I2C_FUNC_SMBUS_WORD_DATA | ++ I2C_FUNC_SMBUS_I2C_BLOCK; ++ dev->master_cfg = controller->bus_cfg; ++ ++ *drvdata = dev; ++ ++ dev->tx_fifo_depth = controller->tx_fifo_depth; ++ dev->rx_fifo_depth = controller->rx_fifo_depth; ++ dev->explicit_stop = controller->explicit_stop; ++ retval = i2c_dw_init(dev); ++ if (retval) ++ goto err_release_drvdata; ++ ++ adap = &dev->adapter; ++ i2c_set_adapdata(adap, dev); ++ adap->owner = THIS_MODULE; ++ adap->class = 0; ++ adap->algo = &i2c_dw_algo; ++ adap->dev.parent = &pdev->dev; ++ adap->nr = controller->bus_num; ++ snprintf(adap->name, sizeof(adap->name), "intel_cln_gip_i2c"); ++ ++ i2c_dw_disable_int(dev); ++ i2c_dw_clear_int(dev); ++ retval = i2c_add_numbered_adapter(adap); ++ if (retval) { ++ dev_err(&pdev->dev, "failure adding I2C adapter\n"); ++ goto err_release_drvdata; ++ } ++ ++ return 0; ++ ++err_release_drvdata: ++ put_device(&pdev->dev); ++ kfree(dev); ++err_iounmap: ++ iounmap(reg_base); ++err: ++ return retval; ++} ++ ++/** ++ * intel_cln_i2c_remove ++ * @param pdev: Pointer to GIP PCI device ++ * @param dev: Pointer to I2C private data ++ * ++ * Perform I2C-specific resource release on behalf of the top-level GIP driver. ++ */ ++void intel_cln_i2c_remove(struct pci_dev *pdev, ++ struct dw_i2c_dev *dev) ++{ ++ ++ if (NULL == dev) { ++ dev_err(&pdev->dev, "%s: failure getting driver data\n", ++ __func__); ++ return; ++ } ++ ++ i2c_dw_disable(dev); ++ i2c_del_adapter(&dev->adapter); ++ iounmap(dev->base); ++ ++ kfree(dev); ++} +diff --git a/drivers/mfd/intel_cln_gip_test.c b/drivers/mfd/intel_cln_gip_test.c +new file mode 100644 +index 0000000..ea8d846 +--- /dev/null ++++ b/drivers/mfd/intel_cln_gip_test.c +@@ -0,0 +1,1202 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton GIP (GPIO/I2C) Test module ++ * ++ * Clanton GIP + North-Cluster GPIO test module. ++ */ ++ ++#include <asm/tsc.h> ++#include <linux/cdev.h> ++#include <linux/delay.h> ++#include <linux/device.h> ++#include <linux/fs.h> ++#include <linux/gpio.h> ++#include <linux/interrupt.h> ++#include <linux/module.h> ++#include <linux/pci.h> ++#include <linux/platform_device.h> ++#include <linux/printk.h> ++#include <linux/spi/spi.h> ++#include <linux/spi/spi_bitbang.h> ++#include <linux/spi/spi_gpio.h> ++#include <linux/slab.h> ++#include <linux/workqueue.h> ++ ++#define DRIVER_NAME "intel_cln_gip_test" ++ ++/**************************** Exported to LISA *******************************/ ++ ++/* ++ * Internally-used ioctl code. At the moment it is not reserved by any mainline ++ * driver. ++ */ ++#define GIP_TEST_IOCTL_CODE 0xE0 ++ ++/* ++ * Integers for ioctl operation. ++ */ ++#define IOCTL_CLN_GPIO_11 _IO(GIP_TEST_IOCTL_CODE, 0x00) ++#define IOCTL_CLN_GPIO_11_CLEANUP _IO(GIP_TEST_IOCTL_CODE, 0x01) ++#define IOCTL_CLN_GPIO_12 _IO(GIP_TEST_IOCTL_CODE, 0x02) ++#define IOCTL_CLN_GPIO_12_CLEANUP _IO(GIP_TEST_IOCTL_CODE, 0x03) ++#define IOCTL_CLN_GPIO_13 _IO(GIP_TEST_IOCTL_CODE, 0x04) ++#define IOCTL_CLN_GPIO_13_CLEANUP _IO(GIP_TEST_IOCTL_CODE, 0x05) ++#define IOCTL_CLN_GPIO_14 _IO(GIP_TEST_IOCTL_CODE, 0x06) ++#define IOCTL_CLN_GPIO_14_CLEANUP _IO(GIP_TEST_IOCTL_CODE, 0x07) ++#define IOCTL_CLN_GPIO_15 _IO(GIP_TEST_IOCTL_CODE, 0x08) ++#define IOCTL_CLN_GPIO_15_CLEANUP _IO(GIP_TEST_IOCTL_CODE, 0x09) ++#define IOCTL_CLN_GPIO_16 _IO(GIP_TEST_IOCTL_CODE, 0x0A) ++#define IOCTL_CLN_GPIO_16_CLEANUP _IO(GIP_TEST_IOCTL_CODE, 0x0B) ++#define IOCTL_CLN_GPIO_17 _IO(GIP_TEST_IOCTL_CODE, 0x0C) ++#define IOCTL_CLN_GPIO_17_CLEANUP _IO(GIP_TEST_IOCTL_CODE, 0x0D) ++#define IOCTL_CLN_GPIO_19 _IO(GIP_TEST_IOCTL_CODE, 0x0E) ++#define IOCTL_CLN_GPIO_19_CLEANUP _IO(GIP_TEST_IOCTL_CODE, 0x0F) ++#define IOCTL_CLN_GPIO_20 _IO(GIP_TEST_IOCTL_CODE, 0x10) ++#define IOCTL_CLN_GPIO_20_CLEANUP _IO(GIP_TEST_IOCTL_CODE, 0x11) ++#define IOCTL_CLN_GPIO_21 _IO(GIP_TEST_IOCTL_CODE, 0x12) ++#define IOCTL_CLN_GPIO_21_CLEANUP _IO(GIP_TEST_IOCTL_CODE, 0x13) ++#define IOCTL_CLN_GPIO_24 _IO(GIP_TEST_IOCTL_CODE, 0x14) ++#define IOCTL_CLN_GPIO_26 _IO(GIP_TEST_IOCTL_CODE, 0x15) ++#define IOCTL_CLN_GPIO_26_CLEANUP _IO(GIP_TEST_IOCTL_CODE, 0x16) ++/* Exercise callbacks for S0/S3 power-state transitions and vice-versa */ ++#define IOCTL_CLN_GIP_SYSTEM_SUSPEND _IO(GIP_TEST_IOCTL_CODE, 0x17) ++#define IOCTL_CLN_GIP_SYSTEM_RESUME _IO(GIP_TEST_IOCTL_CODE, 0x18) ++ ++#define GPIO_INT_EDGE_POS_LABEL "gpio-edge-pos" ++#define GPIO_INT_EDGE_NEG_LABEL "gpio-edge-neg" ++#define GPIO_INT_LEVEL_HIGH_LABEL "gpio-level-hi" ++#define GPIO_INT_LEVEL_LOW_LABEL "gpio-level-lo" ++#define GPIO_INT_BASIC_LABEL "gpio-edge-pos-basic" ++#define GPIO_PM_TEST_IRQ_LABEL "gpio_pm_test_irq" ++ ++/* ++ * Board GPIO numbers. ++ * Mapping between the North/South cluster GPIO and GPIOLIB IDs. ++ */ ++#define SUT_GPIO_NC_0 0x00 ++#define SUT_GPIO_NC_1 0x01 ++#define SUT_GPIO_NC_2 0x02 ++#define SUT_GPIO_NC_3 0x03 ++#define SUT_GPIO_NC_4 0x04 ++#define SUT_GPIO_NC_5 0x05 ++#define SUT_GPIO_NC_6 0x06 ++#define SUT_GPIO_NC_7 0x07 ++#define SUT_GPIO_SC_0 0x08 ++#define SUT_GPIO_SC_1 0x09 ++#define SUT_GPIO_SC_2 0x0A ++#define SUT_GPIO_SC_3 0x0B ++#define SUT_GPIO_SC_4 0x0C ++#define SUT_GPIO_SC_5 0x0D ++#define SUT_GPIO_SC_6 0x0E ++#define SUT_GPIO_SC_7 0x0F ++ ++/* ++ * Bitbanged SPI bus numbers. ++ */ ++#define GPIO_NC_BITBANG_SPI_BUS 0x0 ++#define GPIO_SC_BITBANG_SPI_BUS 0x1 ++ ++/*****************************************************************************/ ++ ++/** ++ * struct intel_cln_gip_dev ++ * ++ * Structure to represent module state/data/etc ++ */ ++struct intel_cln_gip_test_dev { ++ unsigned int opened; ++ struct platform_device *pldev; /* Platform device */ ++ struct cdev cdev; ++ struct mutex open_lock; ++}; ++ ++static struct intel_cln_gip_test_dev gip_test_dev; ++static struct class *gip_test_class; ++static DEFINE_MUTEX(gip_test_mutex); ++static int gip_test_major; ++ ++/* Private pointers to NC/SC bitbanged SPI devices */ ++static struct platform_device *spi_gpio_nc_pdev = NULL; ++static struct platform_device *spi_gpio_sc_pdev = NULL; ++ ++/* ++ * Level-triggered interrupt variables ++ */ ++/* Level-triggered GPIO workqueue */ ++static struct delayed_work work; ++/* Level-triggered interrupt counter */ ++static unsigned int level_int_count; ++/* By default, a level-triggered interrupt is a low-level triggered */ ++static int level_high_triggered = 0; ++ ++/* ++ * Interrupt performance metrics variables and parameters ++ */ ++/* How many captures */ ++#define INT_PERF_TEST_CAPTURES 10000 ++/* Timestamp for latency test interrupt handler */ ++static cycles_t perf_t1; ++/* Captures to be returned to user space */ ++static cycles_t deltas[INT_PERF_TEST_CAPTURES]; ++/* Couldn't find the actual define for this */ ++#define UINT64_MAX 0xFFFFFFFFFFFFFFFFULL ++ ++static irqreturn_t gpio_pm_test_handler(int irq, void *dev_id) ++{ ++ /* Do nothing, just acknowledge the IRQ subsystem */ ++ return IRQ_HANDLED; ++} ++ ++static irqreturn_t gpio_latency_handler(int irq, void *dev_id) ++{ ++ /* t0 */ ++ perf_t1 = get_cycles(); ++ ++ gpio_set_value(SUT_GPIO_SC_0, 0); ++ ++ return IRQ_HANDLED; ++} ++ ++static irqreturn_t gpio_basic_handler(int irq, void *dev_id) ++{ ++ /* Do nothing, just acknowledge the IRQ subsystem */ ++ return IRQ_HANDLED; ++} ++ ++static irqreturn_t gpio_pos_edge_handler(int irq, void *dev_id) ++{ ++ /* Do nothing, just acknowledge the IRQ subsystem */ ++ return IRQ_HANDLED; ++} ++ ++static irqreturn_t gpio_neg_edge_handler(int irq, void *dev_id) ++{ ++ /* Do nothing, just acknowledge the IRQ subsystem */ ++ return IRQ_HANDLED; ++} ++ ++static irqreturn_t gpio_level_handler(int irq, void *dev_id) ++{ ++ /* Untrigger the interrupt */ ++ gpio_set_value(SUT_GPIO_SC_7, level_high_triggered ? 0 : 1); ++ ++ level_int_count ++; ++ if (level_int_count < 1000) { ++ /* Next task due in a jiffy */ ++ schedule_delayed_work(&work, 1); ++ } else if (level_int_count == 1000){ ++ /* OK */ ++ } else { ++ /* ++ * We may get spurious interrupts. This because the TE requires ++ * some time to drive the actual value to the GPIO. ++ */ ++ pr_info("Spurious interrupt\n"); ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static void gpio_level_drive(struct work_struct *work) ++{ ++ /* TE to trigger the interrupt */ ++ gpio_set_value(SUT_GPIO_SC_7, level_high_triggered ? 1 : 0); ++} ++ ++/* ++ * Define bitbanged SPI interface over Nort-Cluster South-Cluster GPIO blocks. ++ * Assign GPIO to SCK/MOSI/MISO ++ */ ++static struct spi_gpio_platform_data spi_gpio_nc_data = { ++ .sck = SUT_GPIO_NC_3, ++ .mosi = SUT_GPIO_NC_4, ++ .miso = SUT_GPIO_NC_5, ++ .num_chipselect = 1, ++}; ++static struct spi_gpio_platform_data spi_gpio_sc_data = { ++ .sck = SUT_GPIO_SC_2, ++ .mosi = SUT_GPIO_SC_3, ++ .miso = SUT_GPIO_SC_4, ++ .num_chipselect = 1, ++}; ++ ++/* ++ * Board information for SPI devices. ++ */ ++static struct spi_board_info spi_gpio_nc_board_info[] = { ++ { ++ .modalias = "spidev", ++ .max_speed_hz = 1000, ++ .bus_num = GPIO_NC_BITBANG_SPI_BUS, ++ .mode = SPI_MODE_0, ++ .platform_data = &spi_gpio_nc_data, ++ /* Assign GPIO to CS */ ++ .controller_data = (void *)SUT_GPIO_NC_6, ++ }, ++}; ++static struct spi_board_info spi_gpio_sc_board_info[] = { ++ { ++ .modalias = "spidev", ++ .max_speed_hz = 1000, ++ .bus_num = GPIO_SC_BITBANG_SPI_BUS, ++ .mode = SPI_MODE_0, ++ .platform_data = &spi_gpio_sc_data, ++ /* Assign GPIO to CS */ ++ .controller_data = (void *)SUT_GPIO_SC_5, ++ }, ++}; ++ ++/** ++ * gpio_sc_level_int ++ * ++ * Request level triggered IRQ for SUT_GPIO_SC_6 and register ++ * SUT_GPIO_SC_7 as output GPIO. ++ * If positive equals to 0, the IRQ is high-level triggered. ++ * Otherwise, low-level triggered. ++ * Mask the IRQ if requested. ++ */ ++static int gpio_sc_level_int(int positive, int masking) ++{ ++ int ret = 0; ++ int irq = -1; ++ ++ unsigned long out_init_val = ++ (positive ? GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH); ++ ++ level_high_triggered = positive; ++ ++ /* Initialise workqueue task */ ++ INIT_DELAYED_WORK(&work, gpio_level_drive); ++ ++ if (!gpio_is_valid(SUT_GPIO_SC_6)) { ++ pr_err("gpio%d is invalid\n", SUT_GPIO_SC_6); ++ ret = -1; ++ goto fail; ++ } ++ if (!gpio_is_valid(SUT_GPIO_SC_7)) { ++ pr_err("gpio%d is invalid\n", SUT_GPIO_SC_7); ++ ret = -1; ++ goto fail; ++ } ++ ++ ret = gpio_request_one(SUT_GPIO_SC_6, GPIOF_IN, "gpio_hi_level"); ++ if (ret) { ++ pr_err("can't request gpio%d (error %d)\n", SUT_GPIO_SC_6, ret); ++ goto fail; ++ } ++ ret = gpio_request_one(SUT_GPIO_SC_7, out_init_val, "gpio_output"); ++ if (ret) { ++ pr_err("can't request gpio%d (error %d)\n", SUT_GPIO_SC_7, ret); ++ goto fail_release_first_gpio; ++ } ++ ++ irq = gpio_to_irq(SUT_GPIO_SC_6); ++ if (irq < 0) { ++ pr_err("can't map gpio%d to IRQ\n", SUT_GPIO_SC_6); ++ goto fail_release_second_gpio; ++ } ++ ++ if (0 != (ret = request_irq(irq, gpio_level_handler, ++ positive ? IRQF_TRIGGER_HIGH : IRQF_TRIGGER_LOW, ++ positive ? GPIO_INT_LEVEL_HIGH_LABEL : GPIO_INT_LEVEL_LOW_LABEL, ++ NULL))) { ++ pr_err("can't request IRQ for gpio%d\n", SUT_GPIO_SC_6); ++ goto fail_release_second_gpio; ++ } ++ ++ level_int_count = 0; ++ ++ pr_info("Registered output gpio%d and IRQ for gpio%d\n", SUT_GPIO_SC_7, ++ SUT_GPIO_SC_6); ++ ++ if (masking) { ++ disable_irq(gpio_to_irq(SUT_GPIO_SC_6)); ++ pr_info("Masked gpio%d IRQ\n", SUT_GPIO_SC_6); ++ } ++ ++ /* ++ * Submit task to workqueue to drive the external Test Equipment. ++ * Note the task is delayed long enough to have Aarvark already set up. ++ * This because Aardvark has to ignore the initial glitches during the ++ * previous GPIO setup phase. ++ */ ++ schedule_delayed_work(&work, 20 * HZ); ++ ++ return 0; ++ ++fail_release_second_gpio: ++ gpio_free(SUT_GPIO_SC_7); ++fail_release_first_gpio: ++ gpio_free(SUT_GPIO_SC_6); ++fail: ++ pr_err("%s() failed\n", __func__); ++ ++ return ret; ++} ++ ++/** ++ * gpio_sc_level_int_teardown ++ * ++ * Release resources reserved by gpio_sc_level_int(). ++ */ ++static int gpio_sc_level_int_teardown(void) ++{ ++ int irq = -1; ++ ++ if (0 != cancel_delayed_work_sync(&work)) ++ pr_warn("delayed work was still pending\n"); ++ ++ irq = gpio_to_irq(SUT_GPIO_SC_6); ++ if (irq < 0) { ++ pr_err("can't map gpio%d to IRQ\n", SUT_GPIO_SC_6); ++ } else { ++ free_irq(irq, NULL); ++ } ++ ++ /* Make sure no handler is still running by this time */ ++ mdelay(20); ++ ++ gpio_free(SUT_GPIO_SC_7); ++ gpio_free(SUT_GPIO_SC_6); ++ ++ return 0; ++} ++ ++/* ++ * gpio_sc_interrupt_perf ++ * ++ * Performs a basic GPIO interrupt latency test by timestamping delta between ++ * interrupt driven and handled over a GPIO loopback. ++ * ++ * Returns to userspace the array of deltas obtained during each capture. ++ * A total amount of INT_PERF_TEST_CAPTURES captures is performed. ++ * ++ */ ++static int gpio_sc_interrupt_perf(unsigned long user_memloc) ++{ ++ int ret = 0; ++ int irq = -1; ++ int gpio_input = SUT_GPIO_SC_1; ++ int gpio_output = SUT_GPIO_SC_0; ++ unsigned int i = 0; ++ cycles_t perf_t0 = 0; ++ cycles_t delta = 0; ++ ++ /* Casting pointer to user-space location to write */ ++ cycles_t __user *user_ptr = (cycles_t __user *)user_memloc; ++ ++ /* Can we copy the captures array into user-space location? */ ++ if (!access_ok(VERIFY_WRITE, user_ptr, sizeof(deltas))) { ++ pr_err("can't copy 0x%x bytes to user-space address 0x%p\n", ++ sizeof(deltas),user_ptr); ++ return -EFAULT; ++ } ++ ++ /* Setup the GPIO */ ++ if (!gpio_is_valid(gpio_input)) { ++ pr_err("gpio%d is invalid\n", gpio_input); ++ ret = -1; ++ goto fail; ++ } ++ if (!gpio_is_valid(gpio_output)) { ++ pr_err("gpio%d is invalid\n", gpio_output); ++ ret = -1; ++ goto fail; ++ } ++ ret = gpio_request_one(gpio_input, GPIOF_IN, "gpio_intperf_in"); ++ if (ret) { ++ pr_err("can't request gpio%d (error %d)\n", gpio_input, ret); ++ goto fail; ++ } ++ ret = gpio_request_one(gpio_output, GPIOF_OUT_INIT_LOW, "gpio_intperf_out"); ++ if (ret) { ++ pr_err("can't request gpio%d (error %d)\n", gpio_output, ret); ++ goto fail_release_input_gpio; ++ } ++ ++ /* Setup IRQ handler for input GPIO */ ++ irq = gpio_to_irq(gpio_input); ++ if (irq < 0) { ++ pr_err("can't map gpio%d to IRQ\n", gpio_input); ++ goto fail_release_output_gpio; ++ } ++ if (0 != (ret = request_irq(irq, gpio_latency_handler, ++ IRQF_TRIGGER_RISING, "gpio_latency_handler", NULL))) { ++ pr_err("can't request IRQ for gpio%d\n", gpio_input); ++ goto fail_release_output_gpio; ++ } ++ ++ /* Perform test */ ++ for (i = 0; i < INT_PERF_TEST_CAPTURES; i ++) { ++ /* t0 */ ++ perf_t0 = get_cycles(); ++ ++ /* Trigger interrupt */ ++ gpio_set_value(gpio_output, 1); ++ mdelay(2); ++ ++ /* Check for wrap-around and store delta */ ++ if(perf_t0 < perf_t1) { ++ delta = perf_t1 - perf_t0; ++ } else { ++ delta = perf_t1 + (UINT64_MAX - perf_t0); ++ } ++ deltas[i] = delta; ++ } ++ ++ /* Expose results to userspace */ ++ ret = copy_to_user(user_ptr, &deltas, sizeof(deltas)); ++ ++ /* Release resources */ ++ ++ free_irq(irq, NULL); ++ ++fail_release_output_gpio: ++ gpio_free(gpio_output); ++fail_release_input_gpio: ++ gpio_free(gpio_input); ++fail: ++ if (0 != ret) { ++ pr_err("%s() failed\n", __func__); ++ } ++ ++ return ret; ++} ++ ++/** ++ * gpio_sc_pm_test_int ++ * ++ * Request rising edge-triggered IRQ for SUT_GPIO_SC_0 ++ */ ++static int gpio_sc_pm_test_int(void) ++{ ++ int ret = 0; ++ int irq = -1; ++ int gpio_input = SUT_GPIO_SC_0; ++ ++ /* Setup the GPIO */ ++ if (!gpio_is_valid(gpio_input)) { ++ pr_err("gpio%d is invalid\n", gpio_input); ++ ret = -1; ++ goto fail; ++ } ++ ret = gpio_request_one(gpio_input, GPIOF_IN, "gpio_pm_test_in"); ++ if (ret) { ++ pr_err("can't request gpio%d (error %d)\n", gpio_input, ret); ++ goto fail; ++ } ++ ++ /* Setup IRQ handler for input GPIO */ ++ irq = gpio_to_irq(gpio_input); ++ if (irq < 0) { ++ pr_err("can't map gpio%d to IRQ\n", gpio_input); ++ goto fail_release_input_gpio; ++ } ++ if (0 != (ret = request_irq(irq, gpio_pm_test_handler, ++ IRQF_TRIGGER_RISING, GPIO_PM_TEST_IRQ_LABEL, NULL))) { ++ pr_err("can't request IRQ for gpio%d\n", gpio_input); ++ goto fail_release_input_gpio; ++ } ++ ++ return 0; ++ ++fail_release_input_gpio: ++ gpio_free(gpio_input); ++fail: ++ return ret; ++} ++ ++/** ++ * gpio_sc_pm_test_int ++ * ++ * Release resources reserved by gpio_sc_edge_int() ++ */ ++static int gpio_sc_pm_test_int_teardown(void) ++{ ++ int irq = -1; ++ ++ irq = gpio_to_irq(SUT_GPIO_SC_0); ++ if (irq < 0) { ++ pr_err("can't map gpio%d to IRQ\n", SUT_GPIO_SC_0); ++ } else { ++ free_irq(irq, NULL); ++ } ++ ++ gpio_free(SUT_GPIO_SC_0); ++ ++ return 0; ++} ++ ++/** ++ * gpio_sc_edge_int ++ * ++ * Request IRQ for SUT_GPIO_SC_6 and SUT_GPIO_SC_7, respectively positive-edge ++ * and negative edge-triggered. ++ * Mask the IRQs if requested. ++ */ ++static int gpio_sc_edge_int(int masking) ++{ ++ int ret = 0; ++ int irq_pos = -1, irq_neg = -1; ++ ++ if (!gpio_is_valid(SUT_GPIO_SC_6)) { ++ pr_err("gpio%d is invalid\n", SUT_GPIO_SC_6); ++ ret = -1; ++ goto fail; ++ } ++ if (!gpio_is_valid(SUT_GPIO_SC_7)) { ++ pr_err("gpio%d is invalid\n", SUT_GPIO_SC_7); ++ ret = -1; ++ goto fail; ++ } ++ ++ ret = gpio_request_one(SUT_GPIO_SC_6, GPIOF_IN, "gpio_pos_edge"); ++ if (ret) { ++ pr_err("can't request gpio%d (error %d)\n", SUT_GPIO_SC_6, ret); ++ goto fail; ++ } ++ ret = gpio_request_one(SUT_GPIO_SC_7, GPIOF_IN, "gpio_neg_edge"); ++ if (ret) { ++ pr_err("can't request gpio%d (error %d)\n", SUT_GPIO_SC_7, ret); ++ goto fail_release_first_gpio; ++ } ++ ++ irq_pos = gpio_to_irq(SUT_GPIO_SC_6); ++ if (irq_pos < 0) { ++ pr_err("can't map gpio%d to IRQ\n", SUT_GPIO_SC_6); ++ goto fail_release_second_gpio; ++ } ++ irq_neg = gpio_to_irq(SUT_GPIO_SC_7); ++ if (irq_neg < 0) { ++ pr_err("can't map gpio%d to IRQ\n", SUT_GPIO_SC_7); ++ goto fail_release_second_gpio; ++ } ++ ++ if (0 != (ret = request_irq(irq_pos, gpio_pos_edge_handler, ++ IRQF_TRIGGER_RISING, GPIO_INT_EDGE_POS_LABEL, NULL))) { ++ pr_err("can't request IRQ for gpio%d\n", SUT_GPIO_SC_6); ++ goto fail_release_second_gpio; ++ } ++ if (0 != (ret = request_irq(irq_neg, gpio_neg_edge_handler, ++ IRQF_TRIGGER_FALLING, GPIO_INT_EDGE_NEG_LABEL, NULL))) { ++ pr_err("can't request IRQ for gpio%d\n", SUT_GPIO_SC_7); ++ goto fail_release_first_gpio_irq; ++ } ++ ++ pr_info("Registered gpio%d and gpio%d IRQs\n", SUT_GPIO_SC_6, ++ SUT_GPIO_SC_7); ++ ++ if (masking) { ++ disable_irq(gpio_to_irq(SUT_GPIO_SC_6)); ++ disable_irq(gpio_to_irq(SUT_GPIO_SC_7)); ++ pr_info("Masked gpio%d and gpio%d IRQs\n", SUT_GPIO_SC_6, ++ SUT_GPIO_SC_7); ++ } ++ ++ return 0; ++ ++fail_release_first_gpio_irq: ++ free_irq(irq_pos, NULL); ++fail_release_second_gpio: ++ gpio_free(SUT_GPIO_SC_7); ++fail_release_first_gpio: ++ gpio_free(SUT_GPIO_SC_6); ++fail: ++ pr_err("%s() failed\n", __func__); ++ ++ return ret; ++} ++ ++/** ++ * gpio_sc_edge_int_teardown ++ * ++ * Release resources reserved by gpio_sc_edge_int() ++ */ ++static int gpio_sc_edge_int_teardown(void) ++{ ++ int irq_pos = -1, irq_neg = -1; ++ ++ irq_neg = gpio_to_irq(SUT_GPIO_SC_7); ++ if (irq_neg < 0) { ++ pr_err("can't map gpio%d to IRQ\n", SUT_GPIO_SC_7); ++ } else { ++ free_irq(irq_neg, NULL); ++ } ++ irq_pos = gpio_to_irq(SUT_GPIO_SC_6); ++ if (irq_pos < 0) { ++ pr_err("can't map gpio%d to IRQ\n", SUT_GPIO_SC_6); ++ } else { ++ free_irq(irq_pos, NULL); ++ } ++ ++ gpio_free(SUT_GPIO_SC_7); ++ gpio_free(SUT_GPIO_SC_6); ++ ++ return 0; ++} ++ ++/** ++ * gpio_sc_basic_int ++ * ++ * Register rising-edge interrupt handler on SUT_GPIO_SC_1 ++ */ ++static int gpio_sc_basic_int(void) ++{ ++ int ret = 0; ++ int irq = -1; ++ unsigned int gpio = SUT_GPIO_SC_1; ++ ++ if (!gpio_is_valid(gpio)) { ++ pr_err("gpio%d is invalid\n", gpio); ++ ret = -1; ++ goto fail; ++ } ++ ++ ret = gpio_request_one(gpio, GPIOF_IN, "gpio_pos_edge_basic"); ++ if (ret) { ++ pr_err("can't request gpio%d (error %d)\n", gpio, ret); ++ goto fail; ++ } ++ ++ irq = gpio_to_irq(gpio); ++ if (irq < 0) { ++ pr_err("can't map gpio%d to IRQ\n", gpio); ++ goto fail_release_gpio; ++ } ++ ++ if (0 != (ret = request_irq(irq, gpio_basic_handler, ++ IRQF_TRIGGER_RISING, GPIO_INT_BASIC_LABEL, NULL))) { ++ pr_err("can't request IRQ for gpio%d\n", gpio); ++ goto fail_release_gpio; ++ } ++ ++ pr_info("Registered gpio%d IRQ\n", gpio); ++ ++ return 0; ++ ++fail_release_gpio: ++ gpio_free(gpio); ++fail: ++ pr_err("%s() failed\n", __func__); ++ ++ return ret; ++} ++ ++/** ++ * gpio_sc_basic_int_teardown ++ * ++ * Release resources reserved by gpio_sc_basic_int() ++ */ ++static int gpio_sc_basic_int_teardown(void) ++{ ++ int irq = -1; ++ unsigned int gpio = SUT_GPIO_SC_1; ++ ++ irq = gpio_to_irq(gpio); ++ if (irq < 0) { ++ pr_err("can't map gpio%d to IRQ\n", gpio); ++ } else { ++ free_irq(irq, NULL); ++ } ++ ++ gpio_free(gpio); ++ ++ return 0; ++} ++ ++/** ++ * gpio_spidev_register ++ * ++ * Register a bitbanged SPI platform device and export a `spidev' to userspace. ++ * For North Cluster and South Cluster. ++ */ ++static int gpio_spidev_register(int north_cluster) ++{ ++ int err = -ENOMEM; ++ struct platform_device *pdev = NULL; ++ struct spi_gpio_platform_data *pdata = ++ north_cluster ? &spi_gpio_nc_data : &spi_gpio_sc_data; ++ struct spi_board_info *gpio_spi_board_info = ++ (north_cluster ? spi_gpio_nc_board_info : spi_gpio_sc_board_info); ++ ++ if (north_cluster) { ++ spi_gpio_nc_pdev = NULL; ++ } else { ++ spi_gpio_sc_pdev = NULL; ++ } ++ ++ pdev = platform_device_alloc("spi_gpio", ++ north_cluster ? GPIO_NC_BITBANG_SPI_BUS : GPIO_SC_BITBANG_SPI_BUS); ++ if (NULL == pdev) { ++ goto err_out; ++ } ++ err = platform_device_add_data(pdev, pdata, sizeof(*pdata)); ++ if (err) { ++ goto err_put_pd; ++ } ++ err = platform_device_add(pdev); ++ if (err) { ++ goto err_put_pd; ++ } ++ ++ err = spi_register_board_info(gpio_spi_board_info, ++ /* ++ * Note I pass an array here instead of a pointer in order not ++ * to break ARRAY_SIZE. ++ */ ++ ARRAY_SIZE(spi_gpio_sc_board_info)); ++ if (err) { ++ goto err_del_pd; ++ } ++ ++ if (north_cluster) { ++ spi_gpio_nc_pdev = pdev; ++ } else { ++ spi_gpio_sc_pdev = pdev; ++ } ++ ++ return 0; ++ ++err_del_pd: ++ platform_device_del(pdev); ++err_put_pd: ++ platform_device_put(pdev); ++err_out: ++ return err; ++} ++ ++/** ++ * gpio_spidev_unregister ++ * ++ * Release a bitbanged SPI platform device and its `spidev' interface. ++ * For North Cluster and South Cluster. ++ */ ++static int gpio_spidev_unregister(int north_cluster) ++{ ++ int ret = 0; ++ ++ struct platform_device *pdev = ++ (north_cluster ? spi_gpio_nc_pdev : spi_gpio_sc_pdev); ++ struct spi_board_info *gpio_spi_board_info = ++ (north_cluster ? spi_gpio_nc_board_info : spi_gpio_sc_board_info); ++ ++ ret = spi_unregister_board_info(gpio_spi_board_info, ++ /* ++ * Note I pass an array here instead of a pointer in order not ++ * to break ARRAY_SIZE. ++ */ ++ ARRAY_SIZE(spi_gpio_sc_board_info)); ++ ++ if (0 == ret) { ++ platform_device_unregister(pdev); ++ } ++ ++ if (north_cluster) { ++ spi_gpio_nc_pdev = NULL; ++ } else { ++ spi_gpio_sc_pdev = NULL; ++ } ++ ++ return ret; ++} ++ ++/** ++ * gip_system_power_transition ++ * ++ * @param state: 0 if transition to S3, !0 if transition to S0 ++ * @return 0 success < 0 failure ++ * ++ * Exercise system-wide suspend/resume power management transitions. ++ * ++ */ ++static int gip_system_power_transition(int state) ++{ ++ struct pci_dev *gip = pci_get_device(PCI_VENDOR_ID_INTEL, 0x0934, NULL); ++ if (NULL == gip) { ++ pr_err("can't find GIP PCI device\n"); ++ return -ENOENT; ++ } ++ ++ if (0 == state) { ++ gip->driver->driver.pm->suspend(&gip->dev); ++ } else { ++ gip->driver->driver.pm->resume(&gip->dev); ++ } ++ ++ /* Decrement reference count of PCI device */ ++ if (NULL != pci_get_device(PCI_VENDOR_ID_INTEL, 0x0934, gip)) { ++ pr_warn("found duplicate of GIP PCI device?!\n"); ++ } ++ ++ return 0; ++} ++ ++/** ++ * gpio_sc_debounce ++ * ++ * Enable GPIO debounce functionality for SC_GPIO_1 (edge and level triggered) ++ * ++ */ ++static int gpio_sc_debounce(int level) ++{ ++ int ret = 0; ++ int irq = -1; ++ int gpio = SUT_GPIO_SC_0; ++ ++ if (!gpio_is_valid(gpio)) { ++ pr_err("gpio%d is invalid\n", gpio); ++ ret = -1; ++ goto fail; ++ } ++ ++ ret = gpio_request_one(gpio, GPIOF_IN, ++ level ? "gpio_level_mask" : "gpio_edge_mask"); ++ if (ret) { ++ pr_err("can't request gpio%d (error %d)\n", gpio, ret); ++ goto fail; ++ } ++ ++ irq = gpio_to_irq(gpio); ++ if (irq < 0) { ++ pr_err("can't map gpio%d to IRQ\n", gpio); ++ goto fail_release_gpio; ++ } ++ ++ /* ++ * Register IRQ. gpio_pos_edge_handler will do for both level and edge ++ * interrupts, as it's nooping. ++ */ ++ if (0 != (ret = request_irq(irq, gpio_pos_edge_handler, ++ level ? IRQF_TRIGGER_HIGH : IRQF_TRIGGER_RISING, ++ level ? GPIO_INT_LEVEL_HIGH_LABEL : GPIO_INT_EDGE_POS_LABEL, ++ NULL))) { ++ pr_err("can't request IRQ for gpio%d\n", gpio); ++ goto fail_release_gpio; ++ } ++ ++ /* Set debounce */ ++ if (0 != (ret = gpio_set_debounce(gpio, 1))) { ++ pr_err("can't set debounce for gpio%d\n", gpio); ++ goto fail_free_irq; ++ } ++ ++ return 0; ++ ++fail_free_irq: ++ free_irq(irq, NULL); ++fail_release_gpio: ++ gpio_free(gpio); ++fail: ++ pr_err("%s() failed\n", __func__); ++ ++ return ret; ++} ++ ++/** ++ * gpio_sc_debounce_teardown ++ * ++ * Undo gpio_sc_debounce ++ * ++ */ ++static int gpio_sc_debounce_teardown(int level) ++{ ++ int irq = -1; ++ unsigned int gpio = SUT_GPIO_SC_0; ++ ++ irq = gpio_to_irq(gpio); ++ if (irq < 0) { ++ pr_err("can't map gpio%d to IRQ\n", gpio); ++ } else { ++ free_irq(irq, NULL); ++ } ++ ++ gpio_free(gpio); ++ ++ return 0; ++} ++ ++/* ++ * File ops ++ */ ++static long gip_test_ioctl(struct file *file, unsigned int cmd, ++ unsigned long arg) ++{ ++ int ret = -EINVAL; ++ ++ switch (cmd) { ++ case IOCTL_CLN_GPIO_11: ++ /* Edge-triggered interrupts */ ++ ret = gpio_sc_edge_int(0); ++ break; ++ case IOCTL_CLN_GPIO_11_CLEANUP: ++ /* Edge-triggered interrupts cleanup */ ++ ret = gpio_sc_edge_int_teardown(); ++ break; ++ case IOCTL_CLN_GPIO_12: ++ /* Edge-triggered interrupts (masking) */ ++ ret = gpio_sc_edge_int(1); ++ break; ++ case IOCTL_CLN_GPIO_12_CLEANUP: ++ /* Edge-triggered interrupts (masking) cleanup */ ++ ret = gpio_sc_edge_int_teardown(); ++ break; ++ case IOCTL_CLN_GPIO_13: ++ /* GPIO debounce (edge) */ ++ ret = gpio_sc_debounce(0); ++ break; ++ case IOCTL_CLN_GPIO_13_CLEANUP: ++ /* GPIO debounce cleanup (edge) */ ++ ret = gpio_sc_debounce_teardown(0); ++ break; ++ case IOCTL_CLN_GPIO_14: ++ /* High-level triggered interrupts */ ++ ret = gpio_sc_level_int(1, 0); ++ break; ++ case IOCTL_CLN_GPIO_14_CLEANUP: ++ /* High-level triggered interrupts cleanup */ ++ ret = gpio_sc_level_int_teardown(); ++ break; ++ case IOCTL_CLN_GPIO_15: ++ /* Low-level triggered interrupts */ ++ ret = gpio_sc_level_int(0, 0); ++ break; ++ case IOCTL_CLN_GPIO_15_CLEANUP: ++ /*Low-level triggered interrupts cleanup */ ++ ret = gpio_sc_level_int_teardown(); ++ break; ++ case IOCTL_CLN_GPIO_16: ++ /* Level triggered interrupts (masking) */ ++ ret = gpio_sc_level_int(1, 1); ++ break; ++ case IOCTL_CLN_GPIO_16_CLEANUP: ++ /* Level triggered interrupts (masking) cleanup */ ++ ret = gpio_sc_level_int_teardown(); ++ break; ++ case IOCTL_CLN_GPIO_17: ++ /* GPIO debounce (level) */ ++ ret = gpio_sc_debounce(1); ++ break; ++ case IOCTL_CLN_GPIO_17_CLEANUP: ++ /* GPIO debounce cleanup (level) */ ++ ret = gpio_sc_debounce_teardown(1); ++ break; ++ case IOCTL_CLN_GPIO_19: ++ /* Register IRQ for SC_GPIO0 (PM transitions test) */ ++ ret = gpio_sc_pm_test_int(); ++ break; ++ case IOCTL_CLN_GPIO_19_CLEANUP: ++ /* Free IRQ for SC_GPIO0 (PM transitions test) */ ++ ret = gpio_sc_pm_test_int_teardown(); ++ break; ++ case IOCTL_CLN_GPIO_20: ++ /* NC bitbanged SPI */ ++ ret = gpio_spidev_register(1); ++ break; ++ case IOCTL_CLN_GPIO_20_CLEANUP: ++ /* NC bitbanged SPI cleanup */ ++ ret = gpio_spidev_unregister(1); ++ break; ++ case IOCTL_CLN_GPIO_21: ++ /* SC bitbanged SPI */ ++ ret = gpio_spidev_register(0); ++ break; ++ case IOCTL_CLN_GPIO_21_CLEANUP: ++ /* SC bitbanged SPI cleanup */ ++ ret = gpio_spidev_unregister(0); ++ break; ++ case IOCTL_CLN_GPIO_24: ++ /* ++ * SC GPIO interrupt performance test. ++ * Note it's shared between CLN_GPIO_24 and CLN_GPIO_25 ++ * plus it doesn't need any cleanup call. ++ */ ++ ret = gpio_sc_interrupt_perf(arg); ++ break; ++ case IOCTL_CLN_GPIO_26: ++ /* Interrupt for basic loopback test */ ++ ret = gpio_sc_basic_int(); ++ break; ++ case IOCTL_CLN_GPIO_26_CLEANUP: ++ /* Interrupt for basic loopback test cleanup */ ++ ret = gpio_sc_basic_int_teardown(); ++ break; ++ case IOCTL_CLN_GIP_SYSTEM_SUSPEND: ++ ret = gip_system_power_transition(0); ++ break; ++ case IOCTL_CLN_GIP_SYSTEM_RESUME: ++ ret = gip_system_power_transition(1); ++ break; ++ default: ++ break; ++ } ++ ++ return ret; ++} ++ ++static int gip_test_open(struct inode *inode, struct file *file) ++{ ++ mutex_lock(&gip_test_mutex); ++ nonseekable_open(inode, file); ++ ++ if (mutex_lock_interruptible(&gip_test_dev.open_lock)) { ++ mutex_unlock(&gip_test_mutex); ++ return -ERESTARTSYS; ++ } ++ ++ if (gip_test_dev.opened) { ++ mutex_unlock(&gip_test_dev.open_lock); ++ mutex_unlock(&gip_test_mutex); ++ return -EINVAL; ++ } ++ ++ gip_test_dev.opened++; ++ mutex_unlock(&gip_test_dev.open_lock); ++ mutex_unlock(&gip_test_mutex); ++ return 0; ++} ++ ++static int gip_test_release(struct inode *inode, struct file *file) ++{ ++ mutex_lock(&gip_test_dev.open_lock); ++ gip_test_dev.opened = 0; ++ mutex_unlock(&gip_test_dev.open_lock); ++ ++ return 0; ++} ++ ++static const struct file_operations gip_test_file_ops = { ++ .open = gip_test_open, ++ .release = gip_test_release, ++ .unlocked_ioctl = gip_test_ioctl, ++ .llseek = no_llseek, ++}; ++ ++/** ++ * intel_cln_gip_test_probe ++ * ++ * @param pdev: Platform device ++ * @return 0 success < 0 failure ++ * ++ * Callback from platform sub-system to probe ++ */ ++static int intel_cln_gip_test_probe(struct platform_device * pdev) ++{ ++ int retval = 0; ++ unsigned int minor = 0; ++ ++ mutex_init(&gip_test_dev.open_lock); ++ cdev_init(&gip_test_dev.cdev, &gip_test_file_ops); ++ gip_test_dev.cdev.owner = THIS_MODULE; ++ ++ retval = cdev_add(&gip_test_dev.cdev, MKDEV(gip_test_major, minor), 1); ++ if (retval) { ++ printk(KERN_ERR "chardev registration failed\n"); ++ return -EINVAL; ++ } ++ if (IS_ERR(device_create(gip_test_class, NULL, ++ MKDEV(gip_test_major, minor), NULL, ++ "giptest%u", minor))){ ++ dev_err(&pdev->dev, "can't create device\n"); ++ return -EINVAL; ++ } ++ ++ return 0; ++ ++} ++ ++static int intel_cln_gip_test_remove(struct platform_device * pdev) ++{ ++ unsigned int minor = MINOR(gip_test_dev.cdev.dev); ++ ++ device_destroy(gip_test_class, MKDEV(gip_test_major, minor)); ++ cdev_del(&gip_test_dev.cdev); ++ ++ class_destroy(gip_test_class); ++ ++ return 0; ++} ++ ++/* ++ * Platform structures useful for interface to PM subsystem ++ */ ++static struct platform_driver intel_cln_gip_test_driver = { ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++ .remove = intel_cln_gip_test_remove, ++}; ++ ++/** ++ * intel_cln_gip_test_init ++ * ++ * Load module. ++ */ ++static int __init intel_cln_gip_test_init(void) ++{ ++ int retval = 0; ++ dev_t dev; ++ ++ gip_test_class = class_create(THIS_MODULE,"cln_gip_test"); ++ if (IS_ERR(gip_test_class)) { ++ retval = PTR_ERR(gip_test_class); ++ printk(KERN_ERR "gip_test: can't register gip_test class\n"); ++ goto err; ++ } ++ ++ retval = alloc_chrdev_region(&dev, 0, 1, "gip_test"); ++ if (retval) { ++ printk(KERN_ERR "earam_test: can't register character device\n"); ++ goto err_class; ++ } ++ gip_test_major = MAJOR(dev); ++ ++ memset(&gip_test_dev, 0x00, sizeof(gip_test_dev)); ++ gip_test_dev.pldev = platform_create_bundle( ++ &intel_cln_gip_test_driver, intel_cln_gip_test_probe, NULL, 0, NULL, 0); ++ ++ if(IS_ERR(gip_test_dev.pldev)){ ++ printk(KERN_ERR "platform_create_bundle fail!\n"); ++ retval = PTR_ERR(gip_test_dev.pldev); ++ goto err_class; ++ } ++ ++ return 0; ++ ++err_class: ++ class_destroy(gip_test_class); ++err: ++ return retval; ++} ++ ++static void __exit intel_cln_gip_test_exit(void) ++{ ++ platform_device_unregister(gip_test_dev.pldev); ++ platform_driver_unregister(&intel_cln_gip_test_driver); ++} ++ ++module_init(intel_cln_gip_test_init); ++module_exit(intel_cln_gip_test_exit); ++ ++MODULE_AUTHOR("Josef Ahmad <josef.ahmad@intel.com>"); ++MODULE_DESCRIPTION("Clanton GIP test module"); ++MODULE_LICENSE("Dual BSD/GPL"); ++ +diff --git a/drivers/mfd/lpc_sch.c b/drivers/mfd/lpc_sch.c +index 5624fcb..4fbb1fd 100644 +--- a/drivers/mfd/lpc_sch.c ++++ b/drivers/mfd/lpc_sch.c +@@ -41,21 +41,41 @@ + #define WDTBASE 0x84 + #define WDT_IO_SIZE 64 + ++/* BIOS control reg */ ++#define LPC_BIOS_CNTL 0xD8 ++#define LPC_BIOS_CNTL_WE 0x01 ++ ++/* Root complex base address derived registers */ ++#define RCBA_BASE 0xF0 ++ + static struct resource smbus_sch_resource = { + .flags = IORESOURCE_IO, + }; + +- + static struct resource gpio_sch_resource = { + .flags = IORESOURCE_IO, + }; + ++static struct resource spi_res = { ++ .flags = IORESOURCE_MEM, ++ .start = 0, ++ .end = 0, ++}; ++ ++static struct platform_device lpc_sch_spi = { ++ .name = "spi-lpc-sch", ++ .id = -1, ++ .resource = &spi_res, ++}; ++ + static struct mfd_cell lpc_sch_cells[] = { ++#ifndef CONFIG_INTEL_QUARK_X1000_SOC + { + .name = "isch_smbus", + .num_resources = 1, + .resources = &smbus_sch_resource, + }, ++#endif + { + .name = "sch_gpio", + .num_resources = 1, +@@ -79,6 +99,7 @@ static DEFINE_PCI_DEVICE_TABLE(lpc_sch_ids) = { + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB) }, ++ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CLANTON_ILB) }, + { 0, } + }; + MODULE_DEVICE_TABLE(pci, lpc_sch_ids); +@@ -88,22 +109,26 @@ static int lpc_sch_probe(struct pci_dev *dev, + { + unsigned int base_addr_cfg; + unsigned short base_addr; ++ u32 rcba_base, bios_cntl; + int i; + int ret; + +- pci_read_config_dword(dev, SMBASE, &base_addr_cfg); +- if (!(base_addr_cfg & (1 << 31))) { +- dev_err(&dev->dev, "Decode of the SMBus I/O range disabled\n"); +- return -ENODEV; +- } +- base_addr = (unsigned short)base_addr_cfg; +- if (base_addr == 0) { +- dev_err(&dev->dev, "I/O space for SMBus uninitialized\n"); +- return -ENODEV; +- } ++ /* Clanton does not support iLB SMBUS */ ++ if (id->device != PCI_DEVICE_ID_INTEL_CLANTON_ILB) { ++ pci_read_config_dword(dev, SMBASE, &base_addr_cfg); ++ if (!(base_addr_cfg & (1 << 31))) { ++ dev_err(&dev->dev, "Decode of the SMBus I/O range disabled\n"); ++ return -ENODEV; ++ } ++ base_addr = (unsigned short)base_addr_cfg; ++ if (base_addr == 0) { ++ dev_err(&dev->dev, "I/O space for SMBus uninitialized\n"); ++ return -ENODEV; ++ } + +- smbus_sch_resource.start = base_addr; +- smbus_sch_resource.end = base_addr + SMBUS_IO_SIZE - 1; ++ smbus_sch_resource.start = base_addr; ++ smbus_sch_resource.end = base_addr + SMBUS_IO_SIZE - 1; ++ } + + pci_read_config_dword(dev, GPIOBASE, &base_addr_cfg); + if (!(base_addr_cfg & (1 << 31))) { +@@ -132,6 +157,31 @@ static int lpc_sch_probe(struct pci_dev *dev, + if (ret) + goto out_dev; + ++ /* Add RCBA SPI device */ ++ if (id->device == PCI_DEVICE_ID_INTEL_CLANTON_ILB) { ++ pci_read_config_dword(dev, LPC_BIOS_CNTL, &bios_cntl); ++ pr_info("%s BIOS_CNTL 0x%08x\n", __func__, bios_cntl); ++ ++ /* Enable flash write */ ++ bios_cntl |= LPC_BIOS_CNTL_WE; ++ pci_write_config_dword(dev, LPC_BIOS_CNTL, bios_cntl); ++ ++ /* Verify */ ++ pci_read_config_dword(dev, LPC_BIOS_CNTL, &bios_cntl); ++ pr_info("%s new BIOS_CNTL 0x%08x\n", __func__, bios_cntl); ++ } ++ ++ pci_read_config_dword(dev, RCBA_BASE, &rcba_base); ++ rcba_base &= 0xFFFFC000; ++ spi_res.start = rcba_base + 0x3020; ++ spi_res.end = rcba_base + 0x3088; ++ pr_info("%s RCBA @ 0x%08x\n", __func__, rcba_base); ++ ret = platform_device_register(&lpc_sch_spi); ++ if (ret < 0){ ++ pr_err("unable to register %s plat dev\n", lpc_sch_spi.name); ++ goto out_dev; ++ } ++ + if (id->device == PCI_DEVICE_ID_INTEL_ITC_LPC + || id->device == PCI_DEVICE_ID_INTEL_CENTERTON_ILB) { + pci_read_config_dword(dev, WDTBASE, &base_addr_cfg); +diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c +index c7dd0cb..4352c6a 100644 +--- a/drivers/mmc/host/sdhci-pci.c ++++ b/drivers/mmc/host/sdhci-pci.c +@@ -162,6 +162,10 @@ static const struct sdhci_pci_fixes sdhci_cafe = { + SDHCI_QUIRK_BROKEN_TIMEOUT_VAL, + }; + ++static const struct sdhci_pci_fixes sdhci_intel_cln = { ++ .quirks = SDHCI_QUIRK_NO_HISPD_BIT, ++}; ++ + static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot) + { + slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA; +@@ -777,6 +781,14 @@ static const struct pci_device_id pci_ids[] = { + + { + .vendor = PCI_VENDOR_ID_INTEL, ++ .device = PCI_DEVICE_ID_INTEL_CLN_SD, ++ .subvendor = PCI_ANY_ID, ++ .subdevice = PCI_ANY_ID, ++ .driver_data = (kernel_ulong_t)&sdhci_intel_cln, ++ }, ++ ++ { ++ .vendor = PCI_VENDOR_ID_INTEL, + .device = PCI_DEVICE_ID_INTEL_MRST_SD0, + .subvendor = PCI_ANY_ID, + .subdevice = PCI_ANY_ID, +diff --git a/drivers/mtd/devices/Kconfig b/drivers/mtd/devices/Kconfig +index 46dcb54..7af4129 100644 +--- a/drivers/mtd/devices/Kconfig ++++ b/drivers/mtd/devices/Kconfig +@@ -159,6 +159,11 @@ config MTD_MTDRAM + provide storage. You probably want to say 'N' unless you're + testing stuff. + ++config MTD_MTD_CLN_ROM ++ bool "Simple R/O drive for SPI flash in Clanton x86 legacy block" ++ help ++ Driver to enable reading directly from legacy block SPI /sketch part ++ + config MTDRAM_TOTAL_SIZE + int "MTDRAM device size in KiB" + depends on MTD_MTDRAM +diff --git a/drivers/mtd/devices/Makefile b/drivers/mtd/devices/Makefile +index 395733a..4c8e399 100644 +--- a/drivers/mtd/devices/Makefile ++++ b/drivers/mtd/devices/Makefile +@@ -20,5 +20,4 @@ obj-$(CONFIG_MTD_M25P80) += m25p80.o + obj-$(CONFIG_MTD_SPEAR_SMI) += spear_smi.o + obj-$(CONFIG_MTD_SST25L) += sst25l.o + obj-$(CONFIG_MTD_BCM47XXSFLASH) += bcm47xxsflash.o +- +-CFLAGS_docg3.o += -I$(src) +\ No newline at end of file ++CFLAGS_docg3.o += -I$(src) +diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig +index 1164930..4e10f27 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig ++++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig +@@ -26,8 +26,8 @@ config STMMAC_PLATFORM + If unsure, say N. + + config STMMAC_PCI +- bool "STMMAC PCI bus support (EXPERIMENTAL)" +- depends on STMMAC_ETH && PCI && EXPERIMENTAL ++ bool "STMMAC PCI bus support" ++ depends on STMMAC_ETH && PCI + ---help--- + This is to select the Synopsys DWMAC available on PCI devices, + if you have a controller with this interface, say Y or M here. +@@ -54,6 +54,27 @@ config STMMAC_DA + By default, the DMA arbitration scheme is based on Round-robin + (rx:tx priority is 1:1). + ++config STMMAC_PTP ++ bool "STMMAC PTP (1588-2005) Clock Support" ++ default n ++ depends on EXPERIMENTAL ++ select PPS ++ select PTP_1588_CLOCK ++ ---help--- ++ Say Y here if you want support for 1588 Timestamping with a ++ Clanton device, using the PTP 1588 Clock support. This is ++ required to enable timestamping support for the device. ++ ++ If unsure, say N. ++ ++config STMMAC_PTP_CLK_MHZ ++ depends on STMMAC_PTP ++ int "Reference clock in Mhz" ++ default 50 ++ ---help--- ++ Frequency if MHz of the reference clock used to derive PTP time ++ locally. Permissable values are 1 - 255 inclusive ++ + choice + prompt "Select the DMA TX/RX descriptor operating modes" + depends on STMMAC_ETH +diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile +index c8e8ea6..0995db5 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/Makefile ++++ b/drivers/net/ethernet/stmicro/stmmac/Makefile +@@ -3,6 +3,7 @@ stmmac-$(CONFIG_STMMAC_RING) += ring_mode.o + stmmac-$(CONFIG_STMMAC_CHAINED) += chain_mode.o + stmmac-$(CONFIG_STMMAC_PLATFORM) += stmmac_platform.o + stmmac-$(CONFIG_STMMAC_PCI) += stmmac_pci.o ++stmmac-$(CONFIG_STMMAC_PTP) += stmmac_ptp.o + stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o \ + dwmac_lib.o dwmac1000_core.o dwmac1000_dma.o \ + dwmac100_core.o dwmac100_dma.o enh_desc.o norm_desc.o \ +diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h +index 186d148..ad16e73 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/common.h ++++ b/drivers/net/ethernet/stmicro/stmmac/common.h +@@ -32,9 +32,15 @@ + #include <linux/init.h> + #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) + #define STMMAC_VLAN_TAG_USED ++#if defined(CONFIG_INTEL_QUARK_X1000_SOC) ++#define STMMAC_VLAN_HASH ++#endif + #include <linux/if_vlan.h> + #endif + ++#if defined(STMMAC_VLAN_HASH) || defined(CONFIG_STMMAC_PTP) ++#define STMMAC_ATDS_USED ++#endif + #include "descs.h" + #include "mmc.h" + +@@ -319,15 +325,16 @@ struct stmmac_dma_ops { + void (*rx_watchdog) (void __iomem *ioaddr, u32 riwt); + }; + ++struct stmmac_priv; + struct stmmac_ops { + /* MAC core initialization */ + void (*core_init) (void __iomem *ioaddr) ____cacheline_aligned; + /* Enable and verify that the IPC module is supported */ +- int (*rx_ipc) (void __iomem *ioaddr); ++ int (*set_rx_ipc) (void __iomem *ioaddr, bool on); + /* Dump MAC registers */ + void (*dump_regs) (void __iomem *ioaddr); + /* Handle extra events on specific interrupts hw dependent */ +- int (*host_irq_status) (void __iomem *ioaddr); ++ int (*host_irq_status) (struct stmmac_priv * priv); + /* Multicast filter setting */ + void (*set_filter) (struct net_device *dev, int id); + /* Flow control setting */ +@@ -340,6 +347,9 @@ struct stmmac_ops { + unsigned int reg_n); + void (*get_umac_addr) (void __iomem *ioaddr, unsigned char *addr, + unsigned int reg_n); ++ /* Enable/Disable VLAN Hash filters */ ++ int (*vlan_rx_add_vid)(struct stmmac_priv *priv, unsigned short vid); ++ int (*vlan_rx_kill_vid)(struct stmmac_priv *priv, unsigned short vid); + void (*set_eee_mode) (void __iomem *ioaddr); + void (*reset_eee_mode) (void __iomem *ioaddr); + void (*set_eee_timer) (void __iomem *ioaddr, int ls, int tw); +diff --git a/drivers/net/ethernet/stmicro/stmmac/descs.h b/drivers/net/ethernet/stmicro/stmmac/descs.h +index 223adf9..ce08163 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/descs.h ++++ b/drivers/net/ethernet/stmicro/stmmac/descs.h +@@ -25,8 +25,8 @@ + #define __DESCS_H__ + + struct dma_desc { +- /* Receive descriptor */ + union { ++ /* Receive descriptor */ + struct { + /* RDES0 */ + u32 payload_csum_error:1; +@@ -160,6 +160,49 @@ struct dma_desc { + } des01; + unsigned int des2; + unsigned int des3; ++ ++ /* Enhanced mode - with VLAN/1588-2005/IPC CHKSUM offload */ ++ #if defined(STMMAC_ATDS_USED) ++ union { ++ /* Receive descriptor */ ++ struct { ++ /* RDES4 */ ++ u32 ip_payload_type:3; ++ u32 ip_header_error:1; ++ u32 ip_payload_error:1; ++ u32 ip_checksum_bypassed:1; ++ u32 ipv4_packet_received:1; ++ u32 ipv6_packet_received:1; ++ u32 message_type:4; ++ u32 ptp_frame_type:1; ++ u32 ptp_version:1; ++ u32 timestamp_dropped:1; ++ u32 reserved1:1; ++ u32 av_packet_received:1; ++ u32 av_tagged_packet_received:1; ++ u32 vlan_tag_priority_value:3; ++ u32 reserved2:3; ++ u32 layer3_filter_match:1; ++ u32 layer4_filter_match:1; ++ u32 layer3_layer4_filter_num_matched:2; ++ u32 reserved3:4; ++ ++ /* RDES5 */ ++ u32 reserved4; ++ }erx; ++ ++ /* Transmit descriptor */ ++ struct { ++ /* TDES4 */ ++ u32 reserved1; ++ ++ /* TDES5 */ ++ u32 reserved2; ++ } etx; ++ } des05; ++ unsigned int ts_lo; /* des6 Tx/Rx timestmp lo */ ++ unsigned int ts_hi; /* des7 Tx/Rx timestamp hi */ ++ #endif + }; + + /* Transmit checksum insertion control */ +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h +index 7ad56af..3042098 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h +@@ -50,7 +50,14 @@ enum dwmac1000_irq_status { + rgmii_irq = 0x0001, + }; + #define GMAC_INT_MASK 0x0000003c /* interrupt mask register */ +- ++#define GMAC_INT_MASK_LPIIM 0x00000200 /* LPI Interrupt Mask */ ++#define GMAC_INT_MASK_TSIM 0x00000100 /* Timestamp Interrupt Mask */ ++#define GMAC_INT_MASK_PMTIM 0x00000004 /* PMT Interrupt Mask */ ++#define GMAC_INT_MASK_PCSANCIM 0x00000002 /* PCS AN Completion */ ++#define GMAC_INT_MASK_PCSLCHGIM 0x00000001 /* PCS Link Status */ ++#define GMAC_INT_MASK_DEFAULT GMAC_INT_MASK_PCSLCHGIM | GMAC_INT_MASK_PCSANCIM\ ++ | GMAC_INT_MASK_PMTIM | GMAC_INT_MASK_TSIM\ ++ | GMAC_INT_MASK_LPIIM + /* PMT Control and Status */ + #define GMAC_PMT 0x0000002c + enum power_event { +@@ -135,6 +142,7 @@ enum inter_frame_gap { + #define GMAC_FRAME_FILTER_SAIF 0x00000100 /* Inverse Filtering */ + #define GMAC_FRAME_FILTER_SAF 0x00000200 /* Source Address Filter */ + #define GMAC_FRAME_FILTER_HPF 0x00000400 /* Hash or perfect Filter */ ++#define GMAC_FRAME_FILTER_VTFE 0x00010000 /* VLAN Tag Filter Enable */ + #define GMAC_FRAME_FILTER_RA 0x80000000 /* Receive all mode */ + /* GMII ADDR defines */ + #define GMAC_MII_ADDR_WRITE 0x00000002 /* MII Write */ +@@ -145,11 +153,17 @@ enum inter_frame_gap { + #define GMAC_FLOW_CTRL_RFE 0x00000004 /* Rx Flow Control Enable */ + #define GMAC_FLOW_CTRL_TFE 0x00000002 /* Tx Flow Control Enable */ + #define GMAC_FLOW_CTRL_FCB_BPA 0x00000001 /* Flow Control Busy ... */ +- ++/* GMAC VLAN TAG defines */ ++#define GMAC_VLAN_TAG_VTHM 0x00080000 /* Hash Table Match Enable */ ++#define GMAC_VLAN_TAG_ESVL 0x00040000 /* Enable S-VLAN */ ++#define GMAC_VLAN_TAG_VTIM 0x00020000 /* VLAN Tag inverse match */ ++#define GMAC_VLAN_TAG_ETV 0x00010000 /* Enable 12-bit tag comp */ ++#define GMAC_VLAN_TAG_VLMASK 0x0000FFFF /* VLAN tag ID for Rx frames */ + /*--- DMA BLOCK defines ---*/ + /* DMA Bus Mode register defines */ + #define DMA_BUS_MODE_SFT_RESET 0x00000001 /* Software Reset */ + #define DMA_BUS_MODE_DA 0x00000002 /* Arbitration scheme */ ++#define DMA_BUS_MODE_ATDS 0X00000080 /* Alternate Descriptor Size */ + #define DMA_BUS_MODE_DSL_MASK 0x0000007c /* Descriptor Skip Length */ + #define DMA_BUS_MODE_DSL_SHIFT 2 /* (in DWORDS) */ + /* Programmable burst length (passed thorugh platform)*/ +@@ -169,6 +183,7 @@ enum rx_tx_priority_ratio { + #define DMA_BUS_MODE_USP 0x00800000 + #define DMA_BUS_MODE_PBL 0x01000000 + #define DMA_BUS_MODE_AAL 0x02000000 ++#define DMA_BUS_MODE_RIX 0x80000000 + + /* DMA CRS Control and Status Register Mapping */ + #define DMA_HOST_TX_DESC 0x00001048 /* Current Host Tx descriptor */ +@@ -230,5 +245,50 @@ enum rtc_control { + #define GMAC_MMC_TX_INTR 0x108 + #define GMAC_MMC_RX_CSUM_OFFLOAD 0x208 + ++/* VLAN Hash register offset */ ++#define GMAC_VLAN_TAG_REP 0x584 ++#define GMAC_VLAN_HASH 0x588 ++#define GMAC_VLAN_HASH_MAXID 0x0F ++ ++/***************** 1588 regs *****************/ ++#define GMAC_TS_CTRL 0x700 /* Timestamp control reg */ ++#define GMAC_TS_CTRL_TSENA 0x00000001 /* Timestamp enable */ ++#define GMAC_TS_CTRL_TSCFUPDT 0x00000002 /* Timestamp fine/coarse */ ++#define GMAC_TS_CTRL_TSINT 0x00000004 /* Timestamp initialise */ ++#define GMAC_TS_CTRL_TSUPDT 0x00000008 /* Timestamp update */ ++#define GMAC_TS_CTRL_TSTRIG 0x00000010 /* Timestamp trigger en */ ++#define GMAC_TS_CTRL_TSADDREG 0x00000020 /* Timestamp addreg update */ ++#define GMAC_TS_CTRL_TSENALL 0x00000100 /* Timestamp RX enable all */ ++#define GMAC_TS_CTRL_TSCTRLSSR 0x00000200 /* Timestamp rollover ctr */ ++#define GMAC_TS_CTRL_TSVER2ENA 0x00000400 /* Timestamp PTP v2 en */ ++#define GMAC_TS_CTRL_TSIPENA 0x00000800 /* Timestamp PTP over eth */ ++#define GMAC_TS_CTRL_TSIPV6ENA 0x00001000 /* Timestamp over IPV6 */ ++#define GMAC_TS_CTRL_TSIPV4ENA 0x00002000 /* Timestamp over IPV4 */ ++#define GMAC_TS_CTRL_TSEVNTENA 0x00004000 /* Timestamp event only */ ++#define GMAC_TS_CTRL_TSMSTRENA 0x00008000 /* Timestamp master enable */ ++#define GMAC_TS_CTRL_SNTYPSEL0 0x00000000 /* Timestamp type 0 snapshot */ ++#define GMAC_TS_CTRL_SNTYPSEL1 0x00010000 /* Timestamp type 1 snapshot */ ++#define GMAC_TS_CTRL_SNTYPSEL2 0x00020000 /* Timestamp type 2 snapshot */ ++#define GMAC_TS_CTRL_SNTYPSEL3 0x00030000 /* Timestamp type 3 snapshot */ ++#define GMAC_TS_CTRL_TSENMACADR 0x00040000 /* Timestamp mac filter en */ ++#define GMAC_TS_CTRL_ATSFC 0x01000000 /* Timestamp aux fifo clear */ ++#define GMAC_TS_CTRL_ATSEN0 0x02000000 /* Timestamp aux0 snap en */ ++#define GMAC_TS_CTRL_ATSEN1 0x04000000 /* Timestamp aux1 snap en */ ++#define GMAC_TS_CTRL_ATSEN2 0x08000000 /* Timestamp aux2 snap en */ ++#define GMAC_TS_CTRL_ATSEN3 0x10000000 /* Timestamp aux3 enable */ ++#define GMAC_SS_INC 0x704 /* Sub-second increment reg */ ++#define GMAC_ST_SEC 0x708 /* System time seconds */ ++#define GMAC_ST_NSEC 0x70C /* System time nseconds */ ++#define GMAC_ST_SECUP 0x710 /* System time sec-update */ ++#define GMAC_ST_NSECUP 0x714 /* System time nsec-update */ ++#define GMAC_TS_APPEND 0x718 /* Timestamp append */ ++#define GMAC_TT_SEC 0x71C /* Target time seconds */ ++#define GMAC_TT_NSEC 0x720 /* Target time nseconds */ ++#define GMAC_ST_HWSEC 0x724 /* System time high word sec */ ++#define GMAC_ST_TS_STAT 0x728 /* Timestamp status */ ++#define GMAC_PPS_CTRL 0x72C /* PPS signal output control */ ++#define GMAC_AUXTS_NSEC 0x730 /* Aux timestamp counter nsec */ ++#define GMAC_AUXTS_SEC 0x734 /* Aux timestamp counter sec */ ++ + extern const struct stmmac_dma_ops dwmac1000_dma_ops; + #endif /* __DWMAC1000_H__ */ +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c +index bfe0226..b6d04ca 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c +@@ -30,6 +30,7 @@ + #include <linux/slab.h> + #include <asm/io.h> + #include "dwmac1000.h" ++#include "stmmac.h" + + static void dwmac1000_core_init(void __iomem *ioaddr) + { +@@ -38,7 +39,7 @@ static void dwmac1000_core_init(void __iomem *ioaddr) + writel(value, ioaddr + GMAC_CONTROL); + + /* Mask GMAC interrupts */ +- writel(0x207, ioaddr + GMAC_INT_MASK); ++ writel(GMAC_INT_MASK_DEFAULT, ioaddr + GMAC_INT_MASK); + + #ifdef STMMAC_VLAN_TAG_USED + /* Tag detection without filtering */ +@@ -46,11 +47,15 @@ static void dwmac1000_core_init(void __iomem *ioaddr) + #endif + } + +-static int dwmac1000_rx_ipc_enable(void __iomem *ioaddr) ++static int dwmac1000_set_rx_ipc(void __iomem *ioaddr, bool on) + { + u32 value = readl(ioaddr + GMAC_CONTROL); + +- value |= GMAC_CONTROL_IPC; ++ if(on == true){ ++ value |= GMAC_CONTROL_IPC; ++ }else{ ++ value &= ~GMAC_CONTROL_IPC; ++ } + writel(value, ioaddr + GMAC_CONTROL); + + value = readl(ioaddr + GMAC_CONTROL); +@@ -87,6 +92,7 @@ static void dwmac1000_get_umac_addr(void __iomem *ioaddr, unsigned char *addr, + static void dwmac1000_set_filter(struct net_device *dev, int id) + { + void __iomem *ioaddr = (void __iomem *) dev->base_addr; ++ struct stmmac_priv *priv = netdev_priv(dev); + unsigned int value = 0; + unsigned int perfect_addr_number; + +@@ -147,6 +153,10 @@ static void dwmac1000_set_filter(struct net_device *dev, int id) + /* Enable Receive all mode (to debug filtering_fail errors) */ + value |= GMAC_FRAME_FILTER_RA; + #endif ++ if (priv->active_vlans != 0){ ++ /* VLAN hash filtering is active on this interface */ ++ value |= GMAC_FRAME_FILTER_VTFE; ++ } + writel(value, ioaddr + GMAC_FRAME_FILTER); + + CHIP_DBG(KERN_INFO "\tFrame Filter reg: 0x%08x\n\tHash regs: " +@@ -194,38 +204,42 @@ static void dwmac1000_pmt(void __iomem *ioaddr, unsigned long mode) + } + + +-static int dwmac1000_irq_status(void __iomem *ioaddr) ++#ifndef CONFIG_STMMAC_PTP ++#define stmmac_ptp_check_pps_event(x){} ++#endif ++ ++static int dwmac1000_irq_status(struct stmmac_priv *priv) + { +- u32 intr_status = readl(ioaddr + GMAC_INT_STATUS); ++ u32 intr_status = readl(priv->ioaddr + GMAC_INT_STATUS); + int status = 0; + + /* Not used events (e.g. MMC interrupts) are not handled. */ + if ((intr_status & mmc_tx_irq)) { + CHIP_DBG(KERN_INFO "GMAC: MMC tx interrupt: 0x%08x\n", +- readl(ioaddr + GMAC_MMC_TX_INTR)); ++ readl(priv->ioaddr + GMAC_MMC_TX_INTR)); + status |= core_mmc_tx_irq; + } + if (unlikely(intr_status & mmc_rx_irq)) { + CHIP_DBG(KERN_INFO "GMAC: MMC rx interrupt: 0x%08x\n", +- readl(ioaddr + GMAC_MMC_RX_INTR)); ++ readl(priv->ioaddr + GMAC_MMC_RX_INTR)); + status |= core_mmc_rx_irq; + } + if (unlikely(intr_status & mmc_rx_csum_offload_irq)) { + CHIP_DBG(KERN_INFO "GMAC: MMC rx csum offload: 0x%08x\n", +- readl(ioaddr + GMAC_MMC_RX_CSUM_OFFLOAD)); ++ readl(priv->ioaddr + GMAC_MMC_RX_CSUM_OFFLOAD)); + status |= core_mmc_rx_csum_offload_irq; + } + if (unlikely(intr_status & pmt_irq)) { + CHIP_DBG(KERN_INFO "GMAC: received Magic frame\n"); + /* clear the PMT bits 5 and 6 by reading the PMT + * status register. */ +- readl(ioaddr + GMAC_PMT); ++ readl(priv->ioaddr + GMAC_PMT); + status |= core_irq_receive_pmt_irq; + } + /* MAC trx/rx EEE LPI entry/exit interrupts */ + if (intr_status & lpiis_irq) { + /* Clean LPI interrupt by reading the Reg 12 */ +- u32 lpi_status = readl(ioaddr + LPI_CTRL_STATUS); ++ u32 lpi_status = readl(priv->ioaddr + LPI_CTRL_STATUS); + + if (lpi_status & LPI_CTRL_STATUS_TLPIEN) { + CHIP_DBG(KERN_INFO "GMAC TX entered in LPI\n"); +@@ -244,10 +258,110 @@ static int dwmac1000_irq_status(void __iomem *ioaddr) + status |= core_irq_rx_path_exit_lpi_mode; + } + } ++ if (unlikely(intr_status & time_stamp_irq)){ ++ stmmac_ptp_check_pps_event(priv); ++ } + + return status; + } + ++static unsigned int dwmac1000_calc_vlan_4bit_crc ( const char * vlan ) ++{ ++ int i = 0, j = 0, len = 0, bit = 0; ++ unsigned int crc = 0xFFFFFFFF; ++ unsigned int poly = 0x04C11DB7; ++ unsigned char data; ++ ++ if(unlikely(vlan == NULL)){ ++ return 0; ++ } ++ ++ for( i = 0; i < 2; i++ ) { ++ data = vlan[i]; ++ ++ if (i==0){ ++ len = 8; ++ }else{ ++ len = 4; ++ } ++ ++ for( bit = 0; bit < len; bit++ ) { ++ ++ j = ((crc >> 31) ^ data) & 0x1; ++ crc <<= 1; ++ ++ if( j != 0 ){ ++ crc ^= poly; ++ } ++ ++ data >>= 1; ++ } ++ } ++ return crc; ++ ++} ++ ++static int dwmac1000_vlan_rx_add_vid(struct stmmac_priv *priv, unsigned short vid) ++{ ++ u32 reg = 0; ++ u32 bit_nr = 0; ++ ++ if(unlikely(priv == NULL || vid > GMAC_VLAN_HASH_MAXID)){ ++ return -EINVAL; ++ } ++ ++ if(priv->active_vlans == 0){ ++ ++ /* Flip the VTFE bit in GMAC_FRAME_FILTER */ ++ reg = readl(priv->ioaddr + GMAC_FRAME_FILTER); ++ reg |= GMAC_FRAME_FILTER_VTFE; ++ writel(reg, priv->ioaddr + GMAC_FRAME_FILTER); ++ ++ /* Enable hash filtering - based on 12 bit vid */ ++ reg = readl(priv->ioaddr + GMAC_VLAN_TAG); ++ reg |= GMAC_VLAN_TAG_VTHM | GMAC_VLAN_TAG_ETV | 0x0000FFFF; ++ writel(reg, priv->ioaddr + GMAC_VLAN_TAG); ++ } ++ ++ bit_nr = (~dwmac1000_calc_vlan_4bit_crc((const char*)&vid)) >> 28; ++ priv->active_vlans |= 1 << bit_nr; ++ ++ writel(priv->active_vlans, priv->ioaddr + GMAC_VLAN_HASH); ++ ++ return 0; ++} ++ ++static int dwmac1000_vlan_rx_kill_vid(struct stmmac_priv *priv, unsigned short vid) ++{ ++ u32 reg = 0; ++ u32 bit_nr = 0; ++ ++ if(unlikely(priv == NULL || vid > GMAC_VLAN_HASH_MAXID)){ ++ return -EINVAL; ++ } ++ ++ bit_nr = (~dwmac1000_calc_vlan_4bit_crc((const char*)&vid)) >> 28; ++ ++ priv->active_vlans &= ~(1 << bit_nr); ++ writel(priv->active_vlans, priv->ioaddr + GMAC_VLAN_HASH); ++ ++ if(priv->active_vlans == 0){ ++ ++ /* Disable hash filtering */ ++ reg = readl(priv->ioaddr + GMAC_VLAN_TAG); ++ reg &= ~(GMAC_VLAN_TAG_VTHM | GMAC_VLAN_TAG_ETV | 0x00000001); ++ writel(reg, priv->ioaddr + GMAC_VLAN_TAG); ++ ++ /* Flip the VTFE bit in GMAC_FRAME_FILTER */ ++ reg = readl(priv->ioaddr + GMAC_FRAME_FILTER); ++ reg &= ~GMAC_FRAME_FILTER_VTFE; ++ writel(reg, priv->ioaddr + GMAC_FRAME_FILTER); ++ ++ } ++ ++ return 0; ++} ++ + static void dwmac1000_set_eee_mode(void __iomem *ioaddr) + { + u32 value; +@@ -297,9 +411,10 @@ static void dwmac1000_set_eee_timer(void __iomem *ioaddr, int ls, int tw) + writel(value, ioaddr + LPI_TIMER_CTRL); + } + ++ + static const struct stmmac_ops dwmac1000_ops = { + .core_init = dwmac1000_core_init, +- .rx_ipc = dwmac1000_rx_ipc_enable, ++ .set_rx_ipc = dwmac1000_set_rx_ipc, + .dump_regs = dwmac1000_dump_regs, + .host_irq_status = dwmac1000_irq_status, + .set_filter = dwmac1000_set_filter, +@@ -307,6 +422,8 @@ static const struct stmmac_ops dwmac1000_ops = { + .pmt = dwmac1000_pmt, + .set_umac_addr = dwmac1000_set_umac_addr, + .get_umac_addr = dwmac1000_get_umac_addr, ++ .vlan_rx_add_vid = dwmac1000_vlan_rx_add_vid, ++ .vlan_rx_kill_vid = dwmac1000_vlan_rx_kill_vid, + .set_eee_mode = dwmac1000_set_eee_mode, + .reset_eee_mode = dwmac1000_reset_eee_mode, + .set_eee_timer = dwmac1000_set_eee_timer, +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c +index bf83c03..a0c08e1 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c +@@ -59,9 +59,12 @@ static int dwmac1000_dma_init(void __iomem *ioaddr, int pbl, int fb, + * DMA transfers the data in 8, 16, 32, 64, 128 & 256 beats + * depending on pbl value. + */ ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC ++ value = DMA_BUS_MODE_RIX | (pbl << DMA_BUS_MODE_PBL_SHIFT); ++#else + value = DMA_BUS_MODE_PBL | ((pbl << DMA_BUS_MODE_PBL_SHIFT) | + (pbl << DMA_BUS_MODE_RPBL_SHIFT)); +- ++#endif + /* Set the Fixed burst mode */ + if (fb) + value |= DMA_BUS_MODE_FB; +@@ -70,6 +73,10 @@ static int dwmac1000_dma_init(void __iomem *ioaddr, int pbl, int fb, + if (mb) + value |= DMA_BUS_MODE_MB; + ++#if defined(STMMAC_ATDS_USED) ++ value |= DMA_BUS_MODE_ATDS; ++#endif ++ + #ifdef CONFIG_STMMAC_DA + value |= DMA_BUS_MODE_DA; /* Rx has priority over tx */ + #endif +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c +index f83210e..43472c0 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c +@@ -67,12 +67,12 @@ static void dwmac100_dump_mac_regs(void __iomem *ioaddr) + readl(ioaddr + MAC_VLAN2)); + } + +-static int dwmac100_rx_ipc_enable(void __iomem *ioaddr) ++static int dwmac100_set_rx_ipc(void __iomem *ioaddr, bool on) + { + return 0; + } + +-static int dwmac100_irq_status(void __iomem *ioaddr) ++static int dwmac100_irq_status(struct stmmac_priv *priv) + { + return 0; + } +@@ -160,7 +160,7 @@ static void dwmac100_pmt(void __iomem *ioaddr, unsigned long mode) + + static const struct stmmac_ops dwmac100_ops = { + .core_init = dwmac100_core_init, +- .rx_ipc = dwmac100_rx_ipc_enable, ++ .set_rx_ipc = dwmac100_set_rx_ipc, + .dump_regs = dwmac100_dump_mac_regs, + .host_irq_status = dwmac100_irq_status, + .set_filter = dwmac100_set_filter, +diff --git a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c +index 0c74a70..50617c5 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c ++++ b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c +@@ -149,6 +149,7 @@ void dwmac_mmc_intr_all_mask(void __iomem *ioaddr) + { + writel(MMC_DEFAULT_MASK, ioaddr + MMC_RX_INTR_MASK); + writel(MMC_DEFAULT_MASK, ioaddr + MMC_TX_INTR_MASK); ++ writel(MMC_DEFAULT_MASK, ioaddr + MMC_RX_IPC_INTR_MASK); + } + + /* This reads the MAC core counters (if actaully supported). +diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h +index b05df89..611f70e 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h +@@ -27,9 +27,11 @@ + #define DRV_MODULE_VERSION "Nov_2012" + + #include <linux/clk.h> ++#include <linux/clocksource.h> + #include <linux/stmmac.h> + #include <linux/phy.h> + #include <linux/pci.h> ++#include <linux/ptp_clock_kernel.h> + #include "common.h" + + struct stmmac_priv { +@@ -72,8 +74,22 @@ struct stmmac_priv { + u32 msg_enable; + spinlock_t lock; + spinlock_t tx_lock; ++ ++ /* PTP */ ++ struct ptp_clock *ptp_clock; ++ struct ptp_clock_info ptp_caps; ++ struct delayed_work overflow_work; ++ spinlock_t tmreg_lock; ++ struct cyclecounter ccnt; ++ struct timecounter tcnt; ++// struct timecompare tcmp; ++ int hwts; ++ struct stmmac_timer *tm; ++ + int wolopts; + int wol_irq; ++ ++ int active_vlans; + struct plat_stmmacenet_data *plat; + struct stmmac_counters mmc; + struct dma_features dma_cap; +@@ -81,6 +97,8 @@ struct stmmac_priv { + struct clk *stmmac_clk; + int clk_csr; + int synopsys_id; ++ int irqmode_msi; ++ struct pci_dev * pdev; + struct timer_list eee_ctrl_timer; + bool tx_path_in_lpi_mode; + int lpi_irq; +@@ -110,6 +128,63 @@ int stmmac_dvr_remove(struct net_device *ndev); + struct stmmac_priv *stmmac_dvr_probe(struct device *device, + struct plat_stmmacenet_data *plat_dat, + void __iomem *addr); ++#ifdef CONFIG_STMMAC_PTP ++ ++#define STMMAC_PTP_OVERFLOW_CHECK_ENABLED (u32)(1) ++#define STMMAC_PTP_PPS_ENABLED (u32)(1 << 1) ++#define STMMAC_PTP_HWTS_TX_EN (u32)(1 << 2) ++#define STMMAC_PTP_HWTS_RX_EN (u32)(1 << 3) ++ ++extern void stmmac_ptp_init(struct net_device *ndev, struct device * pdev); ++extern void stmmac_ptp_remove(struct stmmac_priv *priv); ++extern int stmmac_ptp_hwtstamp_ioctl(struct stmmac_priv *priv, ++ struct ifreq *ifr, int cmd); ++extern void stmmac_ptp_rx_hwtstamp(struct stmmac_priv *priv, struct dma_desc *pdma, ++ struct sk_buff *skb); ++extern void stmmac_ptp_tx_hwtstamp(struct stmmac_priv *priv, struct dma_desc *pdma, ++ struct sk_buff *skb); ++extern void stmmac_ptp_check_pps_event(struct stmmac_priv *priv); ++#endif ++ ++#ifdef CONFIG_HAVE_CLK ++static inline int stmmac_clk_enable(struct stmmac_priv *priv) ++{ ++ if (!IS_ERR(priv->stmmac_clk)) ++ return clk_prepare_enable(priv->stmmac_clk); ++ ++ return 0; ++} ++ ++static inline void stmmac_clk_disable(struct stmmac_priv *priv) ++{ ++ if (IS_ERR(priv->stmmac_clk)) ++ return; ++ ++ clk_disable_unprepare(priv->stmmac_clk); ++} ++static inline int stmmac_clk_get(struct stmmac_priv *priv) ++{ ++ priv->stmmac_clk = clk_get(priv->device, NULL); ++ ++ if (IS_ERR(priv->stmmac_clk)) ++ return PTR_ERR(priv->stmmac_clk); ++ ++ return 0; ++} ++#else ++static inline int stmmac_clk_enable(struct stmmac_priv *priv) ++{ ++ return 0; ++} ++static inline void stmmac_clk_disable(struct stmmac_priv *priv) ++{ ++} ++static inline int stmmac_clk_get(struct stmmac_priv *priv) ++{ ++ return 0; ++} ++#endif /* CONFIG_HAVE_CLK */ ++ + void stmmac_disable_eee_mode(struct stmmac_priv *priv); + bool stmmac_eee_init(struct stmmac_priv *priv); + +@@ -167,6 +242,7 @@ static inline int stmmac_register_pci(void) + static inline void stmmac_unregister_pci(void) + { + } ++ + #endif /* CONFIG_STMMAC_PCI */ + + #endif /* __STMMAC_H__ */ +diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c +index 1372ce2..0644dcd 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c +@@ -31,6 +31,7 @@ + + #include "stmmac.h" + #include "dwmac_dma.h" ++#include "dwmac1000.h" + + #define REG_SPACE_SIZE 0x1054 + #define MAC100_ETHTOOL_NAME "st_mac100" +@@ -231,9 +232,7 @@ static int stmmac_ethtool_getsettings(struct net_device *dev, + return -EBUSY; + } + cmd->transceiver = XCVR_INTERNAL; +- spin_lock_irq(&priv->lock); + rc = phy_ethtool_gset(phy, cmd); +- spin_unlock_irq(&priv->lock); + return rc; + } + +@@ -244,10 +243,7 @@ static int stmmac_ethtool_setsettings(struct net_device *dev, + struct phy_device *phy = priv->phydev; + int rc; + +- spin_lock(&priv->lock); + rc = phy_ethtool_sset(phy, cmd); +- spin_unlock(&priv->lock); +- + return rc; + } + +@@ -279,7 +275,7 @@ static int stmmac_ethtool_get_regs_len(struct net_device *dev) + static void stmmac_ethtool_gregs(struct net_device *dev, + struct ethtool_regs *regs, void *space) + { +- int i; ++ int i, offset = 0; + u32 *reg_space = (u32 *) space; + + struct stmmac_priv *priv = netdev_priv(dev); +@@ -300,9 +296,20 @@ static void stmmac_ethtool_gregs(struct net_device *dev, + /* MAC registers */ + for (i = 0; i < 55; i++) + reg_space[i] = readl(priv->ioaddr + (i * 4)); ++ ++ /* VLAN registers */ ++ offset = i; ++ reg_space[offset++] = readl(priv->ioaddr + GMAC_VLAN_TAG_REP); ++ reg_space[offset++] = readl(priv->ioaddr + GMAC_VLAN_HASH); ++ ++ /* 1588 registers */ ++ for(i = 0; i < 13; i++); ++ reg_space[i + offset] = readl(priv->ioaddr + (GMAC_TS_CTRL + (i * 4))); ++ + /* DMA registers */ ++ offset += i; + for (i = 0; i < 22; i++) +- reg_space[i + 55] = ++ reg_space[i + offset] = + readl(priv->ioaddr + (DMA_BUS_MODE + (i * 4))); + } + } +diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +index b75f4b2..f74b542 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +@@ -28,6 +28,9 @@ + https://bugzilla.stlinux.com/ + *******************************************************************************/ + ++#if defined(CONFIG_INTEL_QUARK_X1000_SOC) ++#include <asm/cln.h> ++#endif + #include <linux/clk.h> + #include <linux/kernel.h> + #include <linux/interrupt.h> +@@ -135,6 +138,8 @@ static irqreturn_t stmmac_interrupt(int irq, void *dev_id); + #ifdef CONFIG_STMMAC_DEBUG_FS + static int stmmac_init_fs(struct net_device *dev); + static void stmmac_exit_fs(void); ++static int debugfs_registered = 0; ++ + #endif + + #define STMMAC_COAL_TIMER(x) (jiffies + usecs_to_jiffies(x)) +@@ -502,13 +507,29 @@ static int stmmac_set_bfsize(int mtu, int bufsize) + } + + /** ++ * init_dma_err_cleanup ++ * ++ * @dev: net device to clean ++ * Description: Does a cleanup if kmalloc fails during init ++ */ ++static void init_dma_err_cleanup(struct stmmac_priv * priv) ++{ ++ if (priv->tx_skbuff != NULL) ++ kfree(priv->tx_skbuff); ++ if (priv->rx_skbuff_dma != NULL) ++ kfree (priv->rx_skbuff_dma); ++ if (priv->rx_skbuff != NULL) ++ kfree (priv->rx_skbuff); ++} ++ ++/** + * init_dma_desc_rings - init the RX/TX descriptor rings + * @dev: net device structure + * Description: this function initializes the DMA RX/TX descriptors + * and allocates the socket buffers. It suppors the chained and ring + * modes. + */ +-static void init_dma_desc_rings(struct net_device *dev) ++static int init_dma_desc_rings(struct net_device *dev) + { + int i; + struct stmmac_priv *priv = netdev_priv(dev); +@@ -532,8 +553,16 @@ static void init_dma_desc_rings(struct net_device *dev) + txsize, rxsize, bfsize); + + priv->rx_skbuff_dma = kmalloc(rxsize * sizeof(dma_addr_t), GFP_KERNEL); ++ if (priv->rx_skbuff_dma == NULL) ++ return -ENOMEM; ++ + priv->rx_skbuff = + kmalloc(sizeof(struct sk_buff *) * rxsize, GFP_KERNEL); ++ if (priv->rx_skbuff == NULL){ ++ init_dma_err_cleanup(priv); ++ return -ENOMEM; ++ } ++ + priv->dma_rx = + (struct dma_desc *)dma_alloc_coherent(priv->device, + rxsize * +@@ -542,6 +571,11 @@ static void init_dma_desc_rings(struct net_device *dev) + GFP_KERNEL); + priv->tx_skbuff = kmalloc(sizeof(struct sk_buff *) * txsize, + GFP_KERNEL); ++ if (priv->tx_skbuff == NULL){ ++ init_dma_err_cleanup(priv); ++ return -ENOMEM; ++ } ++ + priv->dma_tx = + (struct dma_desc *)dma_alloc_coherent(priv->device, + txsize * +@@ -550,8 +584,9 @@ static void init_dma_desc_rings(struct net_device *dev) + GFP_KERNEL); + + if ((priv->dma_rx == NULL) || (priv->dma_tx == NULL)) { ++ init_dma_err_cleanup(priv); + pr_err("%s:ERROR allocating the DMA Tx/Rx desc\n", __func__); +- return; ++ return -ENOMEM; + } + + DBG(probe, INFO, "stmmac (%s) DMA desc: virt addr (Rx %p, " +@@ -569,8 +604,9 @@ static void init_dma_desc_rings(struct net_device *dev) + skb = __netdev_alloc_skb(dev, bfsize + NET_IP_ALIGN, + GFP_KERNEL); + if (unlikely(skb == NULL)) { ++ init_dma_err_cleanup(priv); + pr_err("%s: Rx init fails; skb is NULL\n", __func__); +- break; ++ return -ENOMEM; + } + skb_reserve(skb, NET_IP_ALIGN); + priv->rx_skbuff[i] = skb; +@@ -615,6 +651,8 @@ static void init_dma_desc_rings(struct net_device *dev) + pr_info("TX descriptor ring:\n"); + display_ring(priv->dma_tx, txsize); + } ++ ++ return 0; + } + + static void dma_free_rx_skbufs(struct stmmac_priv *priv) +@@ -736,6 +774,10 @@ static void stmmac_tx_clean(struct stmmac_priv *priv) + DMA_TO_DEVICE); + priv->hw->ring->clean_desc3(p); + ++#ifdef CONFIG_STMMAC_PTP ++ stmmac_ptp_tx_hwtstamp(priv, p, skb); ++#endif ++ + if (likely(skb != NULL)) { + dev_kfree_skb(skb); + priv->tx_skbuff[entry] = NULL; +@@ -963,6 +1005,25 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv) + } + + /** ++ * stmmac_hw_set_rx_ipc ++ * @priv : pointer to the private device structure. ++ * Enables RX IPC offload if the feature is supported in hardware ++ */ ++static int stmmac_hw_set_rx_ipc(struct stmmac_priv *priv, bool on) ++{ ++ int ret = 0; ++ ++ /* Enable the IPC (Checksum Offload) and check if the feature has been ++ * enabled during the core configuration. */ ++ ret = priv->hw->mac->set_rx_ipc(priv->ioaddr, on); ++ if (on == true && !ret) { ++ pr_warning(" RX IPC Checksum Offload not configured.\n"); ++ priv->plat->rx_coe = STMMAC_RX_COE_NONE; ++ } ++ return ret; ++} ++ ++/** + * stmmac_tx_timer: + * @data: data pointer + * Description: +@@ -1022,7 +1083,12 @@ static int stmmac_open(struct net_device *dev) + priv->dma_tx_size = STMMAC_ALIGN(dma_txsize); + priv->dma_rx_size = STMMAC_ALIGN(dma_rxsize); + priv->dma_buf_sz = STMMAC_ALIGN(buf_sz); +- init_dma_desc_rings(dev); ++ ret = init_dma_desc_rings(dev); ++ if (ret < 0){ ++ pr_err("%s: DMA initialization failed\n", __func__); ++ goto open_error; ++ } ++ + + /* DMA initialization and SW reset */ + ret = stmmac_init_dma_engine(priv); +@@ -1078,6 +1144,9 @@ static int stmmac_open(struct net_device *dev) + /* Set the HW DMA mode and the COE */ + stmmac_dma_operation_mode(priv); + ++ /* Enable RX IPC if supported by silicon */ ++ ret = stmmac_hw_set_rx_ipc(priv, true); ++ + /* Extra statistics */ + memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats)); + priv->xstats.threshold = tc; +@@ -1085,9 +1154,12 @@ static int stmmac_open(struct net_device *dev) + stmmac_mmc_setup(priv); + + #ifdef CONFIG_STMMAC_DEBUG_FS +- ret = stmmac_init_fs(dev); +- if (ret < 0) +- pr_warning("%s: failed debugFS registration\n", __func__); ++ if (debugfs_registered == 0){ ++ debugfs_registered = 1; ++ ret = stmmac_init_fs(dev); ++ if (ret < 0) ++ pr_warning("%s: failed debugFS registration\n", __func__); ++ } + #endif + /* Start the ball rolling... */ + DBG(probe, DEBUG, "%s: DMA RX/TX processes started...\n", dev->name); +@@ -1430,6 +1502,9 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit) + #endif + skb->protocol = eth_type_trans(skb, priv->dev); + ++#ifdef CONFIG_STMMAC_PTP ++ stmmac_ptp_tx_hwtstamp(priv, priv->dma_rx + entry, skb); ++#endif + if (unlikely(!priv->plat->rx_coe)) + skb_checksum_none_assert(skb); + else +@@ -1588,9 +1663,19 @@ static netdev_features_t stmmac_fix_features(struct net_device *dev, + if (priv->plat->bugged_jumbo && (dev->mtu > ETH_DATA_LEN)) + features &= ~NETIF_F_ALL_CSUM; + ++ stmmac_hw_set_rx_ipc(priv, features & NETIF_F_RXCSUM); ++ + return features; + } + ++#if defined(CONFIG_INTEL_QUARK_X1000_SOC) ++ #define mask_pvm(x) cln_pci_pvm_mask(x) ++ #define unmask_pvm(x) cln_pci_pvm_unmask(x) ++#else ++ #define mask_pvm(x) ++ #define unmask_pvm(x) ++#endif ++ + static irqreturn_t stmmac_interrupt(int irq, void *dev_id) + { + struct net_device *dev = (struct net_device *)dev_id; +@@ -1601,10 +1686,12 @@ static irqreturn_t stmmac_interrupt(int irq, void *dev_id) + return IRQ_NONE; + } + ++ mask_pvm(priv->pdev); ++ + /* To handle GMAC own interrupts */ + if (priv->plat->has_gmac) { +- int status = priv->hw->mac->host_irq_status((void __iomem *) +- dev->base_addr); ++ int status = priv->hw->mac->host_irq_status(priv); ++ + if (unlikely(status)) { + if (status & core_mmc_tx_irq) + priv->xstats.mmc_tx_irq_n++; +@@ -1634,6 +1721,8 @@ static irqreturn_t stmmac_interrupt(int irq, void *dev_id) + /* To handle DMA interrupts */ + stmmac_dma_interrupt(priv); + ++ unmask_pvm(priv->pdev); ++ + return IRQ_HANDLED; + } + +@@ -1669,7 +1758,15 @@ static int stmmac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) + if (!priv->phydev) + return -EINVAL; + +- ret = phy_mii_ioctl(priv->phydev, rq, cmd); ++ switch (cmd) { ++#ifdef CONFIG_STMMAC_PTP ++ case SIOCSHWTSTAMP: ++ ret = stmmac_ptp_hwtstamp_ioctl(priv, rq, cmd); ++ break; ++#endif ++ default: ++ ret = phy_mii_ioctl(priv->phydev, rq, cmd); ++ } + + return ret; + } +@@ -1850,6 +1947,21 @@ static void stmmac_exit_fs(void) + } + #endif /* CONFIG_STMMAC_DEBUG_FS */ + ++#ifdef STMMAC_VLAN_HASH ++static int stmmac_vlan_rx_add_vid(struct net_device *dev, unsigned short vid) ++{ ++ struct stmmac_priv *priv = netdev_priv(dev); ++ return priv->hw->mac->vlan_rx_add_vid(priv, vid); ++} ++ ++static int stmmac_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid) ++{ ++ struct stmmac_priv *priv = netdev_priv(dev); ++ return priv->hw->mac->vlan_rx_kill_vid(priv, vid); ++} ++ ++#endif ++ + static const struct net_device_ops stmmac_netdev_ops = { + .ndo_open = stmmac_open, + .ndo_start_xmit = stmmac_xmit, +@@ -1860,6 +1972,10 @@ static const struct net_device_ops stmmac_netdev_ops = { + .ndo_tx_timeout = stmmac_tx_timeout, + .ndo_do_ioctl = stmmac_ioctl, + .ndo_set_config = stmmac_config, ++#ifdef STMMAC_VLAN_HASH ++ .ndo_vlan_rx_add_vid = stmmac_vlan_rx_add_vid, ++ .ndo_vlan_rx_kill_vid = stmmac_vlan_rx_kill_vid, ++#endif + #ifdef CONFIG_NET_POLL_CONTROLLER + .ndo_poll_controller = stmmac_poll_controller, + #endif +@@ -1924,13 +2040,7 @@ static int stmmac_hw_init(struct stmmac_priv *priv) + /* Select the enhnaced/normal descriptor structures */ + stmmac_selec_desc_mode(priv); + +- /* Enable the IPC (Checksum Offload) and check if the feature has been +- * enabled during the core configuration. */ +- ret = priv->hw->mac->rx_ipc(priv->ioaddr); +- if (!ret) { +- pr_warning(" RX IPC Checksum Offload not configured.\n"); +- priv->plat->rx_coe = STMMAC_RX_COE_NONE; +- } ++ ret = stmmac_hw_set_rx_ipc(priv, true); + + if (priv->plat->rx_coe) + pr_info(" RX Checksum Offload Engine supported (type %d)\n", +@@ -2001,6 +2111,12 @@ struct stmmac_priv *stmmac_dvr_probe(struct device *device, + /* Both mac100 and gmac support receive VLAN tag detection */ + ndev->features |= NETIF_F_HW_VLAN_RX; + #endif ++#ifdef STMMAC_VLAN_HASH ++ ndev->features |= NETIF_F_HW_VLAN_FILTER; ++ ndev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | ++ NETIF_F_RXCSUM; ++#endif ++ + priv->msg_enable = netif_msg_init(debug, default_msg_level); + + if (flow_ctrl) +@@ -2044,6 +2160,10 @@ struct stmmac_priv *stmmac_dvr_probe(struct device *device, + else + priv->clk_csr = priv->plat->clk_csr; + ++#ifdef CONFIG_STMMAC_PTP ++ stmmac_ptp_init(ndev, device); ++#endif ++ + /* MDIO bus Registration */ + ret = stmmac_mdio_register(ndev); + if (ret < 0) { +@@ -2060,6 +2180,9 @@ error_clk_get: + unregister_netdev(ndev); + error_netdev_register: + netif_napi_del(&priv->napi); ++#ifdef CONFIG_STMMAC_PTP ++ stmmac_ptp_remove(priv); ++#endif + free_netdev(ndev); + + return NULL; +@@ -2075,7 +2198,7 @@ int stmmac_dvr_remove(struct net_device *ndev) + { + struct stmmac_priv *priv = netdev_priv(ndev); + +- pr_info("%s:\n\tremoving driver", __func__); ++ pr_info("%s:\n\tremoving driver\n", __func__); + + priv->hw->dma->stop_rx(priv->ioaddr); + priv->hw->dma->stop_tx(priv->ioaddr); +@@ -2083,6 +2206,10 @@ int stmmac_dvr_remove(struct net_device *ndev) + stmmac_set_mac(priv->ioaddr, false); + stmmac_mdio_unregister(ndev); + netif_carrier_off(ndev); ++ ++#ifdef CONFIG_STMMAC_PTP ++ stmmac_ptp_remove(priv); ++#endif + unregister_netdev(ndev); + free_netdev(ndev); + +diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c +index 064eaac..38213d2 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c +@@ -24,29 +24,186 @@ + *******************************************************************************/ + + #include <linux/pci.h> ++#include <linux/platform_data/clanton.h> + #include "stmmac.h" + +-struct plat_stmmacenet_data plat_dat; +-struct stmmac_mdio_bus_data mdio_data; +-struct stmmac_dma_cfg dma_cfg; ++/* List of supported PCI device IDs */ ++#define STMMAC_VENDOR_ID 0x700 ++#define STMMAC_DEVICE_ID 0x1108 ++#define STMMAC_CLANTON_ID 0x0937 ++#define MAX_INTERFACES 0x02 ++ ++#if defined (CONFIG_INTEL_QUARK_X1000_SOC) ++static int enable_msi = 1; ++#else ++static int enable_msi = 0; ++#endif ++module_param(enable_msi, int, S_IRUGO | S_IWUSR); ++MODULE_PARM_DESC(enable_msi, "Enable PCI MSI mode"); ++ ++static int bus_id = 1; ++static char stmmac_mac_data[MAX_INTERFACES][ETH_ALEN]; ++ ++struct stmmac_cln_mac_data { ++ int phy_addr; ++ int bus_id; ++ cln_plat_id_t plat_id; ++}; ++ ++static struct stmmac_cln_mac_data phy_data [] = { ++ { ++ .phy_addr = -1, /* not connected */ ++ .bus_id = 1, ++ .plat_id = CLANTON_EMULATION, ++ }, ++ { ++ .phy_addr = 1, ++ .bus_id = 2, ++ .plat_id = CLANTON_EMULATION, ++ }, ++ { ++ .phy_addr = 3, ++ .bus_id = 1, ++ .plat_id = CLANTON_PEAK, ++ }, ++ { ++ .phy_addr = 1, ++ .bus_id = 2, ++ .plat_id = CLANTON_PEAK, ++ }, ++ { ++ .phy_addr = 1, ++ .bus_id = 1, ++ .plat_id = KIPS_BAY, ++ }, ++ { ++ .phy_addr = -1, /* not connected */ ++ .bus_id = 2, ++ .plat_id = KIPS_BAY, ++ }, ++ { ++ .phy_addr = 1, ++ .bus_id = 1, ++ .plat_id = CROSS_HILL, ++ }, ++ { ++ .phy_addr = 1, ++ .bus_id = 2, ++ .plat_id = CROSS_HILL, ++ }, ++ { ++ .phy_addr = 1, ++ .bus_id = 1, ++ .plat_id = CLANTON_HILL, ++ }, ++ { ++ .phy_addr = 1, ++ .bus_id = 2, ++ .plat_id = CLANTON_HILL, ++ }, ++ { ++ .phy_addr = 1, ++ .bus_id = 1, ++ .plat_id = IZMIR, ++ }, ++ { ++ .phy_addr = -1, /* not connected */ ++ .bus_id = 2, ++ .plat_id = IZMIR, ++ }, ++}; ++ ++ ++static int stmmac_find_phy_addr(int mdio_bus_id, cln_plat_id_t cln_plat_id) ++{ ++ int i = 0; ++ ++ for (; i < sizeof(phy_data)/sizeof(struct stmmac_cln_mac_data); i++){ ++ if ( phy_data[i].plat_id == cln_plat_id && ++ phy_data[i].bus_id == mdio_bus_id) ++ return phy_data[i].phy_addr; ++ } ++ ++ return -1; ++} ++ ++static int stmmac_default_data(struct plat_stmmacenet_data *plat_dat, ++ int mdio_bus_id, const struct pci_device_id *id) ++{ ++ int phy_addr = 0; ++ memset(plat_dat, 0, sizeof(struct plat_stmmacenet_data)); ++ ++ plat_dat->mdio_bus_data = kzalloc(sizeof(struct stmmac_mdio_bus_data), ++ GFP_KERNEL); ++ if (plat_dat->mdio_bus_data == NULL) ++ return -ENOMEM; ++ ++ plat_dat->dma_cfg = kzalloc(sizeof(struct stmmac_dma_cfg),GFP_KERNEL); ++ if (plat_dat->dma_cfg == NULL) ++ return -ENOMEM; ++ ++ if (id->device == STMMAC_CLANTON_ID) { ++ ++ phy_addr = stmmac_find_phy_addr(mdio_bus_id, ++ intel_cln_plat_get_id()); ++ if (phy_addr == -1) ++ return -ENODEV; ++ ++ plat_dat->bus_id = mdio_bus_id; ++ plat_dat->phy_addr = phy_addr; ++ plat_dat->interface = PHY_INTERFACE_MODE_RMII; ++ /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ ++ plat_dat->clk_csr = 2; ++ plat_dat->has_gmac = 1; ++ plat_dat->force_sf_dma_mode = 1; ++ ++ plat_dat->mdio_bus_data->phy_reset = NULL; ++ plat_dat->mdio_bus_data->phy_mask = 0; ++ ++ plat_dat->dma_cfg->pbl = 16; ++ plat_dat->dma_cfg->fixed_burst = 1; ++ plat_dat->dma_cfg->burst_len = DMA_AXI_BLEN_256; ++ ++ } else { ++ ++ plat_dat->bus_id = mdio_bus_id; ++ plat_dat->phy_addr = phy_addr; ++ plat_dat->interface = PHY_INTERFACE_MODE_GMII; ++ /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ ++ plat_dat->clk_csr = 2; ++ plat_dat->has_gmac = 1; ++ plat_dat->force_sf_dma_mode = 1; ++ ++ plat_dat->mdio_bus_data->phy_reset = NULL; ++ plat_dat->mdio_bus_data->phy_mask = 0; ++ ++ plat_dat->dma_cfg->pbl = 32; ++ plat_dat->dma_cfg->burst_len = DMA_AXI_BLEN_256; ++ ++ } ++ ++ return 0; ++} + +-static void stmmac_default_data(void) ++/** ++ * stmmac_pci_find_mac ++ * ++ * @prive: pointer to private stmmac structure ++ * @mdio_bus_id : MDIO bus identifier used to find the platform MAC id ++ * ++ * Attempt to find MAC in platform data. If not found then driver will generate ++ * a random one for itself in any case ++ */ ++void stmmac_pci_find_mac (struct stmmac_priv * priv, unsigned int mdio_bus_id) + { +- memset(&plat_dat, 0, sizeof(struct plat_stmmacenet_data)); +- plat_dat.bus_id = 1; +- plat_dat.phy_addr = 0; +- plat_dat.interface = PHY_INTERFACE_MODE_GMII; +- plat_dat.clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ +- plat_dat.has_gmac = 1; +- plat_dat.force_sf_dma_mode = 1; +- +- mdio_data.phy_reset = NULL; +- mdio_data.phy_mask = 0; +- plat_dat.mdio_bus_data = &mdio_data; +- +- dma_cfg.pbl = 32; +- dma_cfg.burst_len = DMA_AXI_BLEN_256; +- plat_dat.dma_cfg = &dma_cfg; ++ unsigned int id = mdio_bus_id - 1; ++ if (priv == NULL || id >= MAX_INTERFACES) ++ return; ++ ++ if (intel_cln_plat_get_mac(PLAT_DATA_MAC0+id, ++ (char*)&stmmac_mac_data[id]) == 0){ ++ memcpy(priv->dev->dev_addr, &stmmac_mac_data[id], ETH_ALEN); ++ } + } + + /** +@@ -67,8 +224,21 @@ static int stmmac_pci_probe(struct pci_dev *pdev, + int ret = 0; + void __iomem *addr = NULL; + struct stmmac_priv *priv = NULL; ++ struct plat_stmmacenet_data *plat_dat = NULL; + int i; + ++ plat_dat = kmalloc(sizeof(struct plat_stmmacenet_data), GFP_KERNEL); ++ if (plat_dat == NULL){ ++ ret = -ENOMEM; ++ goto err_out_map_failed; ++ } ++ ++ /* return -ENODEV for non existing PHY, stop probing here */ ++ ret = stmmac_default_data(plat_dat, bus_id, id); ++ if (ret != 0) ++ goto err_platdata; ++ ++ + /* Enable pci device */ + ret = pci_enable_device(pdev); + if (ret) { +@@ -96,30 +266,51 @@ static int stmmac_pci_probe(struct pci_dev *pdev, + break; + } + pci_set_master(pdev); ++ if(enable_msi == 1){ ++ pci_enable_msi(pdev); ++ pr_info("stmmac MSI mode enabled"); ++ } + +- stmmac_default_data(); ++ pr_info("Vendor 0x%04x Device 0x%04x\n", ++ id->vendor, id->device); + +- priv = stmmac_dvr_probe(&(pdev->dev), &plat_dat, addr); ++ priv = stmmac_dvr_probe(&(pdev->dev), plat_dat, addr); + if (!priv) { + pr_err("%s: main driver probe failed", __func__); + goto err_out; + } ++ ++ stmmac_pci_find_mac(priv, bus_id); ++ + priv->dev->irq = pdev->irq; + priv->wol_irq = pdev->irq; +- ++ priv->irqmode_msi = enable_msi; ++ priv->pdev = pdev; ++ #ifdef CONFIG_INTEL_QUARK_X1000_SOC ++ priv->lpi_irq = -ENXIO; ++ #endif + pci_set_drvdata(pdev, priv->dev); + + pr_debug("STMMAC platform driver registration completed"); ++ bus_id++; + + return 0; + + err_out: + pci_clear_master(pdev); +-err_out_map_failed: + pci_release_regions(pdev); + err_out_req_reg_failed: + pci_disable_device(pdev); +- ++err_platdata: ++ if (plat_dat != NULL){ ++ if (plat_dat->dma_cfg != NULL) ++ kfree (plat_dat->dma_cfg); ++ if (plat_dat->mdio_bus_data != NULL) ++ kfree (plat_dat->mdio_bus_data); ++ kfree(plat_dat); ++ } ++err_out_map_failed: ++ bus_id++; + return ret; + } + +@@ -138,6 +329,21 @@ static void stmmac_pci_remove(struct pci_dev *pdev) + stmmac_dvr_remove(ndev); + + pci_set_drvdata(pdev, NULL); ++ ++ if(enable_msi == 1) { ++ if(pci_dev_msi_enabled(pdev)) { ++ pci_disable_msi(pdev); ++ } ++ } ++ ++ if (priv->plat != NULL) { ++ if (priv->plat->dma_cfg != NULL) ++ kfree (priv->plat->dma_cfg); ++ if (priv->plat->mdio_bus_data != NULL) ++ kfree (priv->plat->mdio_bus_data); ++ kfree(priv->plat); ++ } ++ + pci_iounmap(pdev, priv->ioaddr); + pci_release_regions(pdev); + pci_disable_device(pdev); +@@ -167,12 +373,10 @@ static int stmmac_pci_resume(struct pci_dev *pdev) + } + #endif + +-#define STMMAC_VENDOR_ID 0x700 +-#define STMMAC_DEVICE_ID 0x1108 +- + static DEFINE_PCI_DEVICE_TABLE(stmmac_id_table) = { + {PCI_DEVICE(STMMAC_VENDOR_ID, STMMAC_DEVICE_ID)}, + {PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_MAC)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, STMMAC_CLANTON_ID)}, + {} + }; + +diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c +new file mode 100644 +index 0000000..8552d0c +--- /dev/null ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c +@@ -0,0 +1,723 @@ ++/******************************************************************************* ++ ++ STMMAC 1588-2005 hardware accel ++ Copyright(c) 2012 Intel Corporation. This code is based on IXGBE_PTP ++ ++ This program is free software; you can redistribute it and/or modify it ++ under the terms and conditions of the GNU General Public License, ++ version 2, as published by the Free Software Foundation. ++ ++ This program is distributed in the hope it will be useful, but WITHOUT ++ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ more details. ++ ++ You should have received a copy of the GNU General Public License along with ++ this program; if not, write to the Free Software Foundation, Inc., ++ 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ ++ The full GNU General Public License is included in this distribution in ++ the file called "COPYING". ++ ++ Contact Information::w ++ Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 ++ ++*******************************************************************************/ ++#include "stmmac.h" ++#include "dwmac1000.h" ++#include <linux/export.h> ++#include <linux/net_tstamp.h> ++ ++/* PPSCMD0 */ ++#define STMMAC_PPSCMD_NONE 0x00 /* No command */ ++#define STMMAC_PPSCMD_START_SINGLE 0x01 /* Start single pulse */ ++#define STMMAC_PPSCMD_START_PULSE 0x02 /* Start pulse train */ ++#define STMMAC_PPSCMD_START_CANCEL 0x03 /* Cancel start */ ++#define STMMAC_PPSCMD_STOP_PULSE_ATTIME 0x04 /* Stop pulse train at time */ ++#define STMMAC_PPSCMD_STOP_PULSE_IMMED 0x05 /* Stop pulse train immediate */ ++#define STMMAC_PPSCMD_STOP_CANCEL 0x06 /* Stop cancel pulse train */ ++ ++#define STMMAC_PTP_OVERFLOW_CHECK_ENABLED (u32)(1) ++#define STMMAC_PTP_PPS_ENABLED (u32)(1 << 1) ++#define STMMAC_PTP_HWTS_TX_EN (u32)(1 << 2) ++#define STMMAC_PTP_HWTS_RX_EN (u32)(1 << 3) ++ ++#ifndef NSECS_PER_SEC ++#define NSECS_PER_SEC 1000000000ULL ++#endif ++ ++/* ++ * Structure of STMMAC timer registers ++ * ++ * GMAC_TS_HWSEC GMAC_ST_SEC GMAC_ST_NSEC ++ * +--------------+ +--------------+ +---+---+------+ ++ * STMMAC | 16 | | 32 | | 32 | ++ * +--------------+ +--------------+ +---+---+------+ ++ * ++ * The counter for the STMMAC is 80 bits ++ * - HWSEC == overflow value for ST_SEC => 130 years to overflow (optional) ++ * - ST_SEC == seconds ++ * - ST_NSEC == nanoseconds ++ */ ++ ++/** ++ * stmmac_ptp_read - read raw cycle counter (to be used by time counter) ++ * @cc - the cyclecounter structure ++ * ++ * this function reads the cyclecounter registers and is called by the ++ * cyclecounter structure used to construct a ns counter from the ++ * arbitrary fixed point registers ++ */ ++static cycle_t stmmac_ptp_read(const struct cyclecounter *ccnt) ++{ ++ struct stmmac_priv *priv = ++ container_of(ccnt, struct stmmac_priv, ccnt); ++ cycle_t stamp = 0; ++ ++ stamp = (u64)readl(priv->ioaddr + GMAC_ST_NSEC); ++ stamp |= (u64)readl(priv->ioaddr + GMAC_ST_SEC) << 32; ++ ++ return stamp; ++} ++ ++/** ++ * stmmac_ptp_adjfreq ++ * @ptp - the ptp clock structure ++ * @ppb - parts per billion adjustment from base ++ * ++ * adjust the frequency of the ptp cycle counter by the ++ * indicated ppb from the base frequency. ++ */ ++static int stmmac_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) ++{ ++ return 0; ++} ++ ++/** ++ * stmmac_ptp_adjtime ++ * @ptp - the ptp clock structure ++ * @delta - offset to adjust the cycle counter by ++ * ++ * adjust the timer by resetting the timecounter structure. ++ */ ++static int stmmac_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) ++{ ++ struct stmmac_priv *priv = ++ container_of(ptp, struct stmmac_priv, ptp_caps); ++ unsigned long flags; ++ u64 now; ++ ++ spin_lock_irqsave(&priv->tmreg_lock, flags); ++ ++ now = timecounter_read(&priv->tcnt); ++ now += delta; ++ ++ /* reset the timecounter */ ++ timecounter_init(&priv->tcnt, ++ &priv->ccnt, ++ now); ++ ++ spin_unlock_irqrestore(&priv->tmreg_lock, flags); ++ return 0; ++} ++ ++/** ++ * stmmac_ptp_gettime ++ * @ptp - the ptp clock structure ++ * @ts - timespec structure to hold the current time value ++ * ++ * read the timecounter and return the correct value on ns, ++ * after converting it into a struct timespec. ++ */ ++static int stmmac_ptp_gettime(struct ptp_clock_info *ptp, struct timespec *ts) ++{ ++ struct stmmac_priv *priv = ++ container_of(ptp, struct stmmac_priv, ptp_caps); ++ u64 ns; ++ u32 remainder; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&priv->tmreg_lock, flags); ++ ns = timecounter_read(&priv->tcnt); ++ spin_unlock_irqrestore(&priv->tmreg_lock, flags); ++ ++ ts->tv_sec = div_u64_rem(ns, 1000000000ULL, &remainder); ++ ts->tv_nsec = remainder; ++ ++ return 0; ++} ++ ++/** ++ * stmmac_ptp_settime ++ * @ptp - the ptp clock structure ++ * @ts - the timespec containing the new time for the cycle counter ++ * ++ * reset the timecounter to use a new base value instead of the kernel ++ * wall timer value. ++ */ ++static int stmmac_ptp_settime(struct ptp_clock_info *ptp, ++ const struct timespec *ts) ++{ ++ struct stmmac_priv *priv = ++ container_of(ptp, struct stmmac_priv, ptp_caps); ++ u64 ns; ++ unsigned long flags; ++ ++ ns = ts->tv_sec * 1000000000ULL; ++ ns += ts->tv_nsec; ++ ++ /* reset the timecounter */ ++ spin_lock_irqsave(&priv->tmreg_lock, flags); ++ timecounter_init(&priv->tcnt, &priv->ccnt, ns); ++ spin_unlock_irqrestore(&priv->tmreg_lock, flags); ++ ++ return 0; ++} ++ ++/** ++ * stmmac_ptp_enable ++ * @ptp - the ptp clock structure ++ * @rq - the requested feature to change ++ * @on - whether to enable or disable the feature ++ * ++ * enable (or disable) ancillary features of the phc subsystem. ++ * our driver only supports the PPS feature on the X540 ++ */ ++static int stmmac_ptp_enable(struct ptp_clock_info *ptp, ++ struct ptp_clock_request *rq, int on) ++{ ++ struct stmmac_priv *priv = ++ container_of(ptp, struct stmmac_priv, ptp_caps); ++ uint32_t reg = 0; ++ ++ /** ++ * When enabling PPS functionality in STMMAC we need to unmask the ++ * interrupt mask reg and enable the TSTRIG bit in the timestamp control ++ * reg ++ */ ++ if (rq->type == PTP_CLK_REQ_PPS) { ++ if (on){ ++ priv->hwts |= STMMAC_PTP_PPS_ENABLED; ++ ++ /* Enable TSTRIG */ ++ reg = readl(priv->ioaddr + GMAC_TS_CTRL); ++ reg |= GMAC_TS_CTRL_TSTRIG; ++ writel(reg, priv->ioaddr + GMAC_TS_CTRL); ++ wmb(); ++ ++ /* Unmask interrupt */ ++ reg = readl(priv->ioaddr + GMAC_INT_MASK); ++ printk(KERN_INFO "%s[on] read interrupt mask 0x%08x\n", __func__, reg); ++ reg &= ~GMAC_INT_MASK_TSIM; ++ printk(KERN_INFO "%s[on] write interrupt mask 0x%08x\n", __func__, reg); ++ writel(reg, priv->ioaddr + GMAC_INT_MASK); ++ wmb(); ++ ++ } else { ++ /* Mask interrupt */ ++ reg = readl(priv->ioaddr + GMAC_INT_MASK); ++ printk(KERN_INFO "%s[off] read interrupt mask 0x%08x\n", __func__, reg); ++ reg |= GMAC_INT_MASK_TSIM; ++ printk(KERN_INFO "%s[off] write interrupt mask 0x%08x\n", __func__, reg); ++ writel(reg, priv->ioaddr + GMAC_INT_MASK); ++ wmb(); ++ ++ /* Disable TSTRIG */ ++ reg = readl(priv->ioaddr + GMAC_TS_CTRL); ++ reg &= ~GMAC_TS_CTRL_TSTRIG; ++ writel(reg, priv->ioaddr + GMAC_TS_CTRL); ++ wmb(); ++ ++ priv->hwts &= ++ ~STMMAC_PTP_PPS_ENABLED; ++ } ++ return 0; ++ } ++ ++ return -ENOTSUPP; ++} ++ ++/** ++ * stmmac_ptp_check_pps_event ++ * @priv - the private priv structure ++ * ++ * This function is called by the interrupt routine when checking for ++ * interrupts. It will check and handle a pps event. ++ */ ++void stmmac_ptp_check_pps_event(struct stmmac_priv *priv) ++{ ++ struct ptp_clock_event event; ++ event.type = PTP_CLOCK_PPS; ++ ++ /* Make sure ptp clock is valid, and PPS event enabled */ ++ if (!priv->ptp_clock || ++ !(priv->hwts & STMMAC_PTP_PPS_ENABLED)){ ++ return; ++ } ++ ++ ptp_clock_event(priv->ptp_clock, &event); ++} ++ ++#if 0 ++/** ++ * stmmac_ptp_overflow_check - delayed work to detect SYSTIME overflow ++ * @work: structure containing information about this work task ++ * ++ * this work function is scheduled to continue reading the timecounter ++ * in order to prevent missing when the system time registers wrap ++ * around. This needs to be run approximately twice a minute when no ++ * PTP activity is occurring. ++ */ ++void stmmac_ptp_overflow_check(struct stmmac_priv *priv) ++{ ++ unsigned long elapsed_jiffies = priv->last_overflow_check - jiffies; ++ struct timespec ts; ++ ++ if ((priv->hwts & STMMAC_PTP_OVERFLOW_CHECK_ENABLED) && ++ (elapsed_jiffies >= STMMAC_OVERFLOW_PERIOD)) { ++ stmmac_ptp_gettime(&priv->ptp_caps, &ts); ++ priv->last_overflow_check = jiffies; ++ } ++} ++#endif ++ ++/** ++ * stmmac_ptp_tx_hwtstamp - utility function which checks for TX time stamp ++ * @q_vector: structure containing interrupt and ring information ++ * @skb: particular skb to send timestamp with ++ * ++ * if the timestamp is valid, we convert it into the timecounter ns ++ * value, then store that result into the shhwtstamps structure which ++ * is passed up the network stack ++ */ ++void stmmac_ptp_tx_hwtstamp(struct stmmac_priv *priv, struct dma_desc *pdma, ++ struct sk_buff *skb) ++{ ++ /* Sanity check input */ ++ if (unlikely(priv == NULL || pdma == NULL || skb == NULL)){ ++ return; ++ } ++ ++ if(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP){ ++ struct skb_shared_hwtstamps shhwtstamps; ++ u64 ns; ++ u64 regval; ++ unsigned long flags; ++ ++ regval = (u64)pdma->ts_lo; ++ regval |= (u64)pdma->ts_hi << 32; ++ ++ spin_lock_irqsave(&priv->tmreg_lock, flags); ++ ns = timecounter_cyc2time(&priv->tcnt, regval); ++ spin_unlock_irqrestore(&priv->tmreg_lock, flags); ++ ++ memset(&shhwtstamps, 0, sizeof(shhwtstamps)); ++ shhwtstamps.hwtstamp = ns_to_ktime(ns); ++ skb_tstamp_tx(skb, &shhwtstamps); ++ } ++} ++ ++/** ++ * stmmac_ptp_rx_hwtstamp - utility function which checks for RX time stamp ++ * @q_vector: structure containing interrupt and ring information ++ * @skb: particular skb to send timestamp with ++ * ++ * if the timestamp is valid, we convert it into the timecounter ns ++ * value, then store that result into the shhwtstamps structure which ++ * is passed up the network stack ++ */ ++void stmmac_ptp_rx_hwtstamp(struct stmmac_priv *priv, struct dma_desc *pdma, ++ struct sk_buff *skb) ++{ ++ /* Sanity check input */ ++ if (unlikely(priv == NULL || pdma == NULL || skb == NULL)){ ++ return; ++ } ++ ++ if(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP){ ++ struct skb_shared_hwtstamps shhwtstamps; ++ u64 ns; ++ u64 regval; ++ unsigned long flags; ++ ++ regval = (u64)pdma->ts_lo; ++ regval |= (u64)pdma->ts_hi << 32; ++ ++ spin_lock_irqsave(&priv->tmreg_lock, flags); ++ ns = timecounter_cyc2time(&priv->tcnt, regval); ++ spin_unlock_irqrestore(&priv->tmreg_lock, flags); ++ ++ memset(&shhwtstamps, 0, sizeof(shhwtstamps)); ++ shhwtstamps.hwtstamp = ns_to_ktime(ns); ++ } ++} ++ ++/** ++ * ixgbe_ptp_hwtstamp_ioctl - control hardware time stamping ++ * @priv: pointer to priv struct ++ * @ifreq: ioctl data ++ * @cmd: particular ioctl requested ++ * ++ * Outgoing time stamping can be enabled and disabled. Play nice and ++ * disable it when requested, although it shouldn't case any overhead ++ * when no packet needs it. At most one packet in the queue may be ++ * marked for time stamping, otherwise it would be impossible to tell ++ * for sure to which packet the hardware time stamp belongs. ++ * ++ * Incoming time stamping has to be configured via the hardware ++ * filters. Not all combinations are supported, in particular event ++ * type has to be specified. Matching the kind of event packet is ++ * not supported, with the exception of "all V2 events regardless of ++ * level 2 or 4". ++ */ ++int stmmac_ptp_hwtstamp_ioctl(struct stmmac_priv *priv, ++ struct ifreq *ifr, int cmd) ++{ ++ struct hwtstamp_config config; ++// struct stmmac_priv *priv = netdev_priv(netdev); ++ u32 tsctl = 0; ++ ++ if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) ++ return -EFAULT; ++ ++ /* reserved for future extensions */ ++ if (config.flags) ++ return -EINVAL; ++ ++ /* Snapshot the reg - preserve Timestamp Interrupt Trigger Enable */ ++ tsctl = readl(priv->ioaddr + GMAC_TS_CTRL) & GMAC_TS_CTRL_TSTRIG; ++ ++ /* TX */ ++ switch (config.tx_type) { ++ case HWTSTAMP_TX_OFF: ++ priv->hwts &= ~STMMAC_PTP_HWTS_TX_EN; ++ printk(KERN_INFO "%s set TX PTP en false\n", __func__); ++ break; ++ case HWTSTAMP_TX_ON: ++ priv->hwts |= STMMAC_PTP_HWTS_TX_EN; ++ printk(KERN_INFO "%s set TX PTP en true\n", __func__); ++ break; ++ default: ++ return -ERANGE; ++ } ++ ++ /* RX */ ++ priv->hwts |= STMMAC_PTP_HWTS_RX_EN; ++ ++ switch (config.rx_filter) { ++ ++ ++ case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: ++ /* ++ * V1_L4 UDP any event ++ * SYNC, Follow_Up, Delay_Req, Delay_Resp, ++ * Pdelay_Req, Pdelay_Resp, Pdelay_Resp_Follow_Up ++ * ++ * SNAPTYPSEL=1, TSMSTRENA=x, TSEVNTENA=0, TSVER2ENA=0, IPV4=1 ++ */ ++ tsctl |= GMAC_TS_CTRL_SNTYPSEL1 | GMAC_TS_CTRL_TSIPV4ENA; ++ printk(KERN_INFO "%s HWTSTAMP_FILTER_PTP_V1_L4_EVENT \n", __func__); ++ break; ++ ++ case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: ++ /* ++ * V1_L4 Master ++ * Delay_Req ++ * ++ * SNAPTYPSEL=0, TSMSTRENA=1, TSEVNTENA=1, TSVER2ENA=0, IPV4=1 ++ */ ++ tsctl |= GMAC_TS_CTRL_SNTYPSEL0 | GMAC_TS_CTRL_TSMSTRENA; ++ tsctl |= GMAC_TS_CTRL_TSEVNTENA | GMAC_TS_CTRL_TSIPV4ENA; ++ printk(KERN_INFO "%s HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ \n", __func__); ++ break; ++ ++ case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: ++ /* ++ * V1_L4 Slave ++ * Sync ++ * ++ * SNAPTYPSEL=0, TSMSTRENA=0, TSEVNTENA=1, TSVER2ENA=0, IPV4=1 ++ */ ++ tsctl |= GMAC_TS_CTRL_SNTYPSEL0 | GMAC_TS_CTRL_TSEVNTENA; ++ tsctl |= GMAC_TS_CTRL_TSIPV4ENA; ++ printk(KERN_INFO "%s HWTSTAMP_FILTER_PTP_V1_L4_SYNC \n", __func__); ++ break; ++ ++ case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: ++ /* ++ * V2_L4 UDP any event ++ * SYNC, Follow_Up, Delay_Req, Delay_Resp, ++ * Pdelay_Req, Pdelay_Resp, Pdelay_Resp_Follow_Up ++ * ++ * SNAPTYPSEL=1, TSMSTRENA=x, TSEVNTENA=0, TSVER2ENA=1, IPV4=1 ++ */ ++ tsctl |= GMAC_TS_CTRL_SNTYPSEL1 | GMAC_TS_CTRL_TSVER2ENA | GMAC_TS_CTRL_TSIPV4ENA; ++ printk(KERN_INFO "%s HWTSTAMP_FILTER_PTP_V2_L4_EVENT \n", __func__); ++ break; ++ ++ case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: ++ /* ++ * V2_L4 Master ++ * Delay_Req ++ * ++ * SNAPTYPSEL=0, TSMSTRENA=1, TSEVNTENA=1, TSVER2ENA=1, IPV4=1 ++ */ ++ tsctl |= GMAC_TS_CTRL_SNTYPSEL0 | GMAC_TS_CTRL_TSMSTRENA; ++ tsctl |= GMAC_TS_CTRL_TSEVNTENA | GMAC_TS_CTRL_TSVER2ENA; ++ tsctl |= GMAC_TS_CTRL_TSIPV4ENA; ++ ++ printk(KERN_INFO "%s HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ \n", __func__); ++ break; ++ ++ case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: ++ /* ++ * V2_L4 Slave ++ * Sync ++ * ++ * SNAPTYPSEL=0, TSMSTRENA=0, TSEVNTENA=1, TSVER2ENA=1, IPV4=1 ++ */ ++ tsctl |= GMAC_TS_CTRL_SNTYPSEL0 | GMAC_TS_CTRL_TSVER2ENA | GMAC_TS_CTRL_TSEVNTENA; ++ tsctl |= GMAC_TS_CTRL_TSIPV4ENA; ++ printk(KERN_INFO "%s HWTSTAMP_FILTER_PTP_V2_L4_SYNC \n", __func__); ++ break; ++ ++ case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: ++ /* ++ * V2_L2 Ethernet any event ++ * SYNC, Follow_Up, Delay_Req, Delay_Resp, ++ * Pdelay_Req, Pdelay_Resp, Pdelay_Resp_Follow_Up ++ * ++ * SNAPTYPSEL=1, TSMSTRENA=x, TSEVNTENA=0, TSVER2ENA=1,TSIPENA=1 ++ * TSIPENA=1 ++ */ ++ tsctl |= GMAC_TS_CTRL_SNTYPSEL1 | GMAC_TS_CTRL_TSVER2ENA | GMAC_TS_CTRL_TSIPENA; ++ printk(KERN_INFO "%s HWTSTAMP_FILTER_PTP_V2_L2_EVENT \n", __func__); ++ break; ++ ++ case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: ++ /* ++ * V2_L2 Master ++ * Delay_Req ++ * ++ * SNAPTYPSEL=0, TSMSTRENA=1, TSEVNTENA=1, TSVER2ENA=1,TSIPENA=1 ++ */ ++ tsctl |= GMAC_TS_CTRL_SNTYPSEL0 | GMAC_TS_CTRL_TSMSTRENA; ++ tsctl |= GMAC_TS_CTRL_TSEVNTENA | GMAC_TS_CTRL_TSVER2ENA; ++ tsctl |= GMAC_TS_CTRL_TSIPENA; ++ printk(KERN_INFO "%s HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ \n", __func__); ++ break; ++ ++ case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: ++ /* ++ * V2_L2 Slave ++ * Sync ++ * ++ * SNAPTYPSEL=0, TSMSTRENA=0, TSEVNTENA=1, TSVER2ENA=1, ++ * TSIPENA=1 ++ */ ++ tsctl |= GMAC_TS_CTRL_SNTYPSEL0 | GMAC_TS_CTRL_TSVER2ENA; ++ tsctl |= GMAC_TS_CTRL_TSEVNTENA | GMAC_TS_CTRL_TSIPENA; ++ printk(KERN_INFO "%s HWTSTAMP_FILTER_PTP_V2_L2_SYNC \n", __func__); ++ break; ++ ++ case HWTSTAMP_FILTER_PTP_V2_EVENT: ++ /* ++ * V2_L2 Ethernet any event ++ * SYNC, Follow_Up, Delay_Req, Delay_Resp, ++ * Pdelay_Req, Pdelay_Resp, Pdelay_Resp_Follow_Up ++ * ++ * SNAPTYPSEL=1, TSMSTRENA=x, TSEVNTENA=0, TSVER2ENA=1 ++ * TSIPENA=1, TSIPV4ENA=1 ++ */ ++ tsctl |= GMAC_TS_CTRL_SNTYPSEL1 | GMAC_TS_CTRL_TSVER2ENA; ++ tsctl |= GMAC_TS_CTRL_TSIPENA | GMAC_TS_CTRL_TSIPV4ENA; ++ printk(KERN_INFO "%s HWTSTAMP_FILTER_PTP_V2_EVENT \n", __func__); ++ break; ++ ++ case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: ++ /* ++ * V2_L2_L4 Master ++ * Delay_Req ++ * ++ * SNAPTYPSEL=0, TSMSTRENA=1, TSEVNTENA=1, ++ * TSVER2ENA=1,TSIPENA=1, TSIPV4ENA=1 ++ */ ++ tsctl |= GMAC_TS_CTRL_SNTYPSEL0 | GMAC_TS_CTRL_TSMSTRENA; ++ tsctl |= GMAC_TS_CTRL_TSEVNTENA | GMAC_TS_CTRL_TSVER2ENA; ++ tsctl |= GMAC_TS_CTRL_TSIPENA | GMAC_TS_CTRL_TSIPV4ENA; ++ printk(KERN_INFO "%s HWTSTAMP_FILTER_PTP_V2_DELAY_REQ \n", __func__); ++ break; ++ ++ case HWTSTAMP_FILTER_PTP_V2_SYNC: ++ /* ++ * V2_L2_L4 Slave ++ * Sync ++ * ++ * SNAPTYPSEL=0, TSMSTRENA=0, TSEVNTENA=1, TSVER2ENA=1, ++ * TSIPENA=1, TSIPV4ENA=1 ++ */ ++ tsctl |= GMAC_TS_CTRL_SNTYPSEL0 | GMAC_TS_CTRL_TSVER2ENA; ++ tsctl |= GMAC_TS_CTRL_TSEVNTENA | GMAC_TS_CTRL_TSIPENA; ++ tsctl |= GMAC_TS_CTRL_TSIPV4ENA; ++ printk(KERN_INFO "%s HWTSTAMP_FILTER_PTP_V2_SYNC \n", __func__); ++ break; ++ ++ case HWTSTAMP_FILTER_ALL: ++ /* ++ * V2_L2_L4 Ethernet any event ++ * ++ * SYNC, Follow_Up, Delay_Req, Delay_Resp, ++ * Pdelay_Req, Pdelay_Resp, Pdelay_Resp_Follow_Up ++ * ++ * GMAC_TS_CTRL_TSENALL ++ */ ++ tsctl |= GMAC_TS_CTRL_TSENALL; ++ printk(KERN_INFO "%s HWTSTAMP_FILTER_ALL \n", __func__); ++ break; ++ ++ case HWTSTAMP_FILTER_NONE: ++ printk(KERN_INFO "%s HWTSTAMP_FILTER_NONE \n", __func__); ++ priv->hwts &= ~STMMAC_PTP_HWTS_RX_EN; ++ break; ++ ++ default: ++ printk(KERN_INFO "%s error ioctl rx type %d \n", __func__, config.rx_filter); ++ /* bad/unknown parameter */ ++ return -ERANGE; ++ } ++ ++ /* Set the TS CTRL reg */ ++ tsctl |= GMAC_TS_CTRL_TSENA; ++ writel(tsctl, priv->ioaddr + GMAC_TS_CTRL); ++ wmb(); ++ ++ printk(KERN_INFO "%s sync ts_ctl @ value 0x%08x\n", __func__, tsctl); ++ ++ return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ? ++ -EFAULT : 0; ++} ++ ++ ++#define DEFAULT_PTP_CLK 50 ++ ++/** ++ * stmmac_ptp_init_timestamp - initialise the PTP clock ++ * @priv - pointer to the priv structure ++ * ++ * This function initialises the PTP clock consistent with the method spelled ++ * out in the Snopsys documentation ++ */ ++static void stmmac_ptp_init_timestamp(struct stmmac_priv *priv) ++{ ++ unsigned long tsctl = GMAC_TS_CTRL_TSENA, flags = 0; ++ uint8_t ssinc = CONFIG_STMMAC_PTP_CLK_MHZ; ++ ++ /* Enable TS */ ++ writel(tsctl, priv->ioaddr + GMAC_TS_CTRL); ++ wmb(); ++ ++ /* Write SSINC - number of nano seconds to increment on each clock */ ++ if(ssinc == 0){ ++ ssinc = DEFAULT_PTP_CLK; ++ } ++ ssinc = 1000/ssinc; ++ writel(ssinc, priv->ioaddr + GMAC_SS_INC); ++ wmb(); ++ ++ printk(KERN_INFO "%s setting PTP_CLK to 0x%02x\n", __func__, ssinc); ++ ++ /* Reset system time registers to zero */ ++ writel(0x00000000, priv->ioaddr + GMAC_ST_SEC); ++ writel(0x00000000, priv->ioaddr + GMAC_ST_NSEC); ++ wmb(); ++ ++ /* Set TSINT to latch values in ST_SEC and ST_NSEC */ ++ tsctl |= GMAC_TS_CTRL_TSINT; ++ writel(tsctl, priv->ioaddr + GMAC_TS_CTRL); ++ wmb(); ++ printk(KERN_INFO "%s tsctl == 0x%08lx (TSINIT | TSENA)\n", __func__, tsctl); ++ ++ spin_lock_irqsave(&priv->tmreg_lock, flags); ++ ++ /* Init timecounter */ ++ memset(&priv->ccnt, 0, sizeof(priv->ccnt)); ++ priv->ccnt.read = stmmac_ptp_read; ++ priv->ccnt.mask = CLOCKSOURCE_MASK(64); ++ priv->ccnt.mult = 1; ++ priv->ccnt.shift = 0; ++ ++ /* reset the ns time counter */ ++ timecounter_init(&priv->tcnt, &priv->ccnt, ++ ktime_to_ns(ktime_get_real())); ++ ++ spin_unlock_irqrestore(&priv->tmreg_lock, flags); ++} ++ ++/** ++ * stmmac_ptp_init ++ * @priv - the stmmac private priv structure ++ * ++ * This function performs the required steps for enabling ptp ++ * support. If ptp support has already been loaded it simply calls the ++ * cyclecounter init routine and exits. ++ */ ++void stmmac_ptp_init(struct net_device *ndev, struct device * pdev) ++{ ++ struct stmmac_priv *priv = netdev_priv(ndev); ++ ++ /* Ensure the timestamp interrupt is masked */ ++ writel(GMAC_INT_MASK_TSIM, priv->ioaddr + GMAC_INT_MASK); ++ ++ /* Fill out PTP callback contents */ ++ snprintf(priv->ptp_caps.name, 16, "%pm", ndev->dev_addr); ++ priv->ptp_caps.owner = THIS_MODULE; ++ priv->ptp_caps.max_adj = 0; /* Cannot be adjusted */ ++ priv->ptp_caps.n_alarm = 0; ++ priv->ptp_caps.n_ext_ts = 0; ++ priv->ptp_caps.n_per_out = 0; ++ priv->ptp_caps.pps = 0; ++ priv->ptp_caps.adjfreq = stmmac_ptp_adjfreq; ++ priv->ptp_caps.adjtime = stmmac_ptp_adjtime; ++ priv->ptp_caps.gettime = stmmac_ptp_gettime; ++ priv->ptp_caps.settime = stmmac_ptp_settime; ++ priv->ptp_caps.enable = stmmac_ptp_enable; ++ ++ spin_lock_init(&priv->tmreg_lock); ++ ++ stmmac_ptp_init_timestamp(priv); ++ ++ /* Init to default state */ ++// priv->hwts = STMMAC_PTP_OVERFLOW_CHECK_ENABLED; ++ ++ priv->ptp_clock = ptp_clock_register(&priv->ptp_caps, pdev); ++ if (IS_ERR(priv->ptp_clock)) { ++ priv->ptp_clock = NULL; ++ printk(KERN_ERR "%s ptp_clock_reg failed!\n", __func__); ++ } else { ++ printk(KERN_INFO "%s ptp_clock_reg success!\n", __func__); ++ } ++ ++ return; ++} ++ ++/** ++ * stmmac_ptp_remove - disable ptp device and stop the overflow check ++ * @priv: pointer to priv struct ++ * ++ * this function stops the ptp support, and cancels the delayed work. ++ */ ++void stmmac_ptp_remove(struct stmmac_priv *priv) ++{ ++ /* Ensure the timestamp interrupt is masked */ ++ writel(GMAC_INT_MASK_TSIM, priv->ioaddr + GMAC_INT_MASK); ++ ++ /* stop the overflow check task */ ++// priv->hwts &= ~STMMAC_PTP_OVERFLOW_CHECK_ENABLED; ++ ++ if (priv->ptp_clock != NULL) { ++ ptp_clock_unregister(priv->ptp_clock); ++ priv->ptp_clock = NULL; ++ printk(KERN_INFO "%s removed ptp_clock\n", __func__); ++ } ++} ++ +diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c +index 044b532..dc92097 100644 +--- a/drivers/net/phy/mdio_bus.c ++++ b/drivers/net/phy/mdio_bus.c +@@ -95,7 +95,7 @@ static struct class mdio_bus_class = { + + #if IS_ENABLED(CONFIG_OF_MDIO) + /* Helper function for of_mdio_find_bus */ +-static int of_mdio_bus_match(struct device *dev, void *mdio_bus_np) ++static int of_mdio_bus_match(struct device *dev, const void *mdio_bus_np) + { + return dev->of_node == mdio_bus_np; + } +diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig +index c86bae8..6def5f6 100644 +--- a/drivers/platform/x86/Kconfig ++++ b/drivers/platform/x86/Kconfig +@@ -672,6 +672,10 @@ config INTEL_MFLD_THERMAL + Say Y here to enable thermal driver support for the Intel Medfield + platform. + ++if INTEL_QUARK_X1000_SOC ++source "drivers/platform/x86/quark/Kconfig" ++endif ++ + config INTEL_IPS + tristate "Intel Intelligent Power Sharing" + depends on ACPI +diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile +index bf7e4f9..fce76ef 100644 +--- a/drivers/platform/x86/Makefile ++++ b/drivers/platform/x86/Makefile +@@ -50,3 +50,4 @@ obj-$(CONFIG_INTEL_MID_POWER_BUTTON) += intel_mid_powerbtn.o + obj-$(CONFIG_INTEL_OAKTRAIL) += intel_oaktrail.o + obj-$(CONFIG_SAMSUNG_Q10) += samsung-q10.o + obj-$(CONFIG_APPLE_GMUX) += apple-gmux.o ++obj-$(CONFIG_INTEL_QUARK_X1000_SOC) += quark/ +diff --git a/drivers/platform/x86/quark/Kconfig b/drivers/platform/x86/quark/Kconfig +new file mode 100644 +index 0000000..5d47629 +--- /dev/null ++++ b/drivers/platform/x86/quark/Kconfig +@@ -0,0 +1,75 @@ ++config INTEL_CLN_ESRAM ++ bool "eSRAM - embedded SRAM driver for Intel Clanton platform" ++ depends on INTEL_QUARK_X1000_SOC && PM ++ select KALLSYMS ++ select CRC16 ++ help ++ Say Y here to enable eSRAM overlay and software-initiated ECC ++ updates. eSRAM overlaying allows for code/data structures to be ++ mapped into eSRAM thus providing far faster access to code/data ++ than ordinary DRAM. Slower than cache RAM faster than DRAM. ++ ++config INTEL_CLN_ECC_REFRESH_PERIOD ++ int "Choose eSRAM ECC coverage period" ++ depends on INTEL_CLN_ESRAM ++ default 24 ++ help ++ Select the period over which *RAM ECC codes should be refreshed. ++ IA Core will periodically enable disabled eSRAM pages to ensure all of ++ disabled eSRAM pages are 'address walked' in this period. A logical ++ component within the silicon on Clanton will ensure DRAM (and ++ overlayed eSRAM) pages by extension are similarly updated over the ++ same period. This variable controlls how long a time this address ++ walking algorithm should take. For a noisy environment like a ++ sub-station or a satellite update frequently. For less noisy ++ environments this value should be lower. Default 24 hours is right for ++ most people. Set to zero to disable - this is NOT recommended. Max 48 ++ hours. ++ ++config INTEL_CLN_ECC_SCRUB ++ bool "Hardware ECC Scrub - /proc interface for Intel Clanton platform" ++ depends on INTEL_QUARK_X1000_SOC ++ help ++ Say Y here to enable support for accessing the hardware memory ++ ECC Scrubber via the /proc interface. ++ ++config INTEL_CLN_ECC_SCRUB_OVERRIDE_CONFIG ++ bool "Hardware ECC Scrub - use config settings to override scrub vals" ++ depends on INTEL_CLN_ECC_SCRUB ++ help ++ Say Y here to enable support to use config settings to override ++ BIOS configured scrub values ++ ++config INTEL_CLN_HW_ECC_REFRESH_RATE ++ int "Choose DRAM ECC refresh rate" ++ depends on INTEL_CLN_ECC_SCRUB_OVERRIDE_CONFIG ++ default 20 ++ help ++ Range 0 - 255 mSec ++ ++config INTEL_CLN_HW_ECC_REFRESH_SIZE ++ int "Choose DRAM ECC refresh size" ++ depends on INTEL_CLN_ECC_SCRUB_OVERRIDE_CONFIG ++ default 512 ++ help ++ Range 64-512 bytes, multiples of 32 ++ ++config INTEL_CLN_ECC_SCRUB_S3_CONFIG ++ bool "Hardware ECC Scrub - linux manages S3 entry/resume for scrub" ++ depends on INTEL_CLN_ECC_SCRUB ++ help ++ Say Y here to enable linux to manage S3 entry/resume for the ++ hardware memory ECC Scrubber. ++ ++config INTEL_CLN_THERMAL ++ bool "Thermal driver for Intel Clanton platform" ++ depends on INTEL_QUARK_X1000_SOC ++ help ++ Say Y here to enable Clanton's Thermal driver plus the MSI's ++ that can be hooked from the thermal sub-system ++ ++config INTEL_CLN_AUDIO_CTRL ++ tristate "Audio sub-system control driver for Intel Clanton platform" ++ depends on INTEL_QUARK_X1000_SOC ++ help ++ Say Y here to enable Clanton's audio control driver +diff --git a/drivers/platform/x86/quark/Makefile b/drivers/platform/x86/quark/Makefile +new file mode 100644 +index 0000000..00c4ce7 +--- /dev/null ++++ b/drivers/platform/x86/quark/Makefile +@@ -0,0 +1,18 @@ ++obj-$(CONFIG_INTEL_QUARK_X1000_SOC) += intel_cln_board_data.o ++obj-$(CONFIG_INTEL_QUARK_X1000_SOC) += intel_cln_layout_data.o ++obj-$(CONFIG_INTEL_QUARK_X1000_SOC) += intel_cln_plat_data.o ++obj-$(CONFIG_INTEL_QUARK_X1000_SOC) += intel_cln_plat_clanton_hill.o ++obj-$(CONFIG_INTEL_QUARK_X1000_SOC) += intel_cln_plat_clanton_peak.o ++obj-$(CONFIG_INTEL_QUARK_X1000_SOC) += intel_cln_plat_cross_hill.o ++obj-$(CONFIG_INTEL_QUARK_X1000_SOC) += intel_cln_plat_kips_bay.o ++obj-$(CONFIG_INTEL_QUARK_X1000_SOC) += intel_cln_plat_galileo.o ++obj-$(CONFIG_INTEL_QUARK_X1000_SOC) += intel_cln_sb.o ++obj-$(CONFIG_INTEL_QUARK_X1000_SOC) += intel_cln_imr.o ++obj-$(CONFIG_INTEL_QUARK_X1000_SOC) += intel_cln_imr_kernel.o ++obj-$(CONFIG_INTEL_CLN_ESRAM) += intel_cln_esram.o ++obj-$(CONFIG_INTEL_QUARK_X1000_SOC) += intel_cln_imr_test.o ++obj-$(CONFIG_INTEL_CLN_ESRAM) += intel_cln_esram_test.o ++#obj-$(CONFIG_INTEL_CLN_ESRAM) += intel_cln_smep_test.o ++obj-$(CONFIG_INTEL_CLN_ECC_SCRUB) += intel_cln_ecc_scrub.o ++obj-$(CONFIG_INTEL_CLN_THERMAL) += intel_cln_thermal.o ++obj-$(CONFIG_INTEL_CLN_AUDIO_CTRL) += intel_cln_audio_ctrl.o +diff --git a/drivers/platform/x86/quark/intel_cln_audio_ctrl.c b/drivers/platform/x86/quark/intel_cln_audio_ctrl.c +new file mode 100644 +index 0000000..95bfe78 +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_audio_ctrl.c +@@ -0,0 +1,514 @@ ++/* ++ * Intel Clanton platform audio control driver ++ * ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ * ++ * The Intel Clanton Hill platform hardware design includes an audio subsystem ++ * with a number of interconnected audio interfaces. This driver enables ++ * applications to choose which audio connections to enable for various ++ * application use cases. The interconnections are selectable using GPIO output ++ * pins on the CPU. This driver is also responsible for configuring a Maxim ++ * 9867 audio codec, a component of this audio subsystem, connected to the CPU ++ * via I2C. ++ */ ++ ++#include <linux/module.h> ++#include <linux/printk.h> ++#include <linux/platform_device.h> ++#include <linux/types.h> ++#include <linux/err.h> ++#include <linux/i2c.h> ++#include <linux/gpio.h> ++#include <linux/cdev.h> ++#include <linux/fs.h> ++#include <uapi/linux/ioctl.h> ++#include <linux/mutex.h> ++#include <linux/sysfs.h> ++ ++#include "intel_cln_audio_ctrl.h" ++ ++#define DRIVER_NAME "intel_cln_audio_ctrl" ++ ++/* ++ * GPIO numbers to use for switching audio paths ++ */ ++#define GPIO_AUDIO_S0 11 ++#define GPIO_AUDIO_S1 12 ++#define GPIO_AUDIO_S2 13 ++ ++#define GPIO_AUDIO_DEFAULT (INTEL_CLN_AUDIO_MODE_SPKR_MIC) ++ ++/** ++ * struct intel_cln_audio_ctrl_data ++ * ++ * Structure to represent module state/data/etc ++ */ ++struct intel_cln_audio_ctrl_priv { ++ ++ /* i2c device descriptor for read/write access to MAX9867 registers */ ++ struct i2c_client *max9867_i2c; ++ ++ /* Char dev to provide user-space ioctl interface for audio control */ ++ struct cdev cdev; ++ dev_t cdev_no; ++ struct class *cl; ++ ++ /* Mutex to protect against concurrent access to the ioctl() handler */ ++ struct mutex lock; ++ ++ /* Current GPIO switch value */ ++ unsigned char gpio_val; ++}; ++ ++static int ++intel_cln_audio_ctrl_open(struct inode *inode, struct file *filp) ++{ ++ struct intel_cln_audio_ctrl_priv *priv; ++ ++ priv = container_of(inode->i_cdev, ++ struct intel_cln_audio_ctrl_priv, ++ cdev); ++ filp->private_data = priv; ++ ++ return 0; ++} ++ ++static int ++intel_cln_audio_ctrl_release(struct inode *inode, struct file *filp) ++{ ++ return 0; ++} ++ ++/* ++ * Logic truth table for AUDIO_S[0-3] outputs, illustrating which paths are ++ * connected between audio interfaces A, B, C. Each audio interface has one ++ * effective input (I) port and one effective output (O) port ++ * ++ * A = USB Codec (to Clanton CPU) ++ * B = Spkr/Mic (to car audio system) ++ * C = I2S Codec (to Telit HE910) ++ * ++ * PATH examples: ++ * AO-CO: A-Output connected to C-Output ++ * BI-AI: B-Input connected to A-Input ++ * ++ * NOTE: Assume a CI-AI connection is available in ALL cases (sometimes unused) ++ * ++ * S2 S1 S0 PATHS USE CASE ++ * -- -- -- ----------------- ------------------------------------------------- ++ * 0 0 0 AO-CO BT Headset call ++ * 0 0 1 AO-BO Analog Driver Alerts (CI unused) ++ * 0 1 0 AO-CO,BI-AI XX Unused/invalid (BI *and* CI connected to AI) ++ * 0 1 1 AO-BO,BI-AI Archival Voice Record/Playback (or Driver Alerts) ++ * 1 0 0 AO-CO,BI-CO XX Unused/invalid (A0 *and* BI connected to CO) ++ * 1 0 1 AO-BO,BI-CO Analog hands-free call ++ * 1 1 0 AO-CO,BI-AI,BI-CO XX Unused/invalid (BI connected to AI *and* CO) ++ * 1 1 1 AO-BO,BI-AI,BI-CO XX Unused/invalid (BI connected to AI *and* CO) ++ * ++ * ++ * Mapping to IOCTLs (using more intuitive naming on the API): ++ * ++ * PATHS IOCTL ++ * --------------- ------------------------------------------------------------- ++ * AO-CO INTEL_CLN_AUDIO_MODE_GSM_ONLY ++ * AO-BO INTEL_CLN_AUDIO_MODE_SPKR_ONLY ++ * AO-BO,BI-AI INTEL_CLN_AUDIO_MODE_SPKR_MIC ++ * AO-BO,BI-CO INTEL_CLN_AUDIO_MODE_GSM_SPKR_MIC ++ */ ++ ++static int ++intel_cln_audio_ctrl_gpio_update(struct intel_cln_audio_ctrl_priv *priv) ++{ ++ int ret = 0; ++ struct gpio audio_sw_gpios[] = { ++ { ++ GPIO_AUDIO_S2, ++ GPIOF_OUT_INIT_LOW, ++ "audio_s2" ++ }, ++ { ++ GPIO_AUDIO_S1, ++ GPIOF_OUT_INIT_LOW, ++ "audio_s1" ++ }, ++ { ++ GPIO_AUDIO_S0, ++ GPIOF_OUT_INIT_LOW, ++ "audio_s0" ++ } ++ }; ++ ++ /* ++ * Update the Audio Switch GPIO outputs according to the user selection ++ */ ++ ret = gpio_request_array(audio_sw_gpios, ++ ARRAY_SIZE(audio_sw_gpios)); ++ if (ret) { ++ pr_err("%s: Failed to allocate audio control GPIO pins\n", ++ __func__); ++ return ret; ++ } ++ ++ gpio_set_value(GPIO_AUDIO_S2, (priv->gpio_val >> 2) & 0x1); ++ gpio_set_value(GPIO_AUDIO_S1, (priv->gpio_val >> 1) & 0x1); ++ gpio_set_value(GPIO_AUDIO_S0, (priv->gpio_val >> 0) & 0x1); ++ ++ gpio_free_array(audio_sw_gpios, ++ ARRAY_SIZE(audio_sw_gpios)); ++ ++ return 0; ++} ++ ++static long ++intel_cln_audio_ctrl_ioctl(struct file *filp, ++ unsigned int cmd, ++ unsigned long arg) ++{ ++ struct intel_cln_audio_ctrl_priv *priv = filp->private_data; ++ int ret = 0; ++ ++ ret = mutex_lock_interruptible(&priv->lock); ++ if (ret) ++ return ret; ++ ++ switch (cmd) { ++ case INTEL_CLN_AUDIO_MODE_IOC_GSM_ONLY: ++ case INTEL_CLN_AUDIO_MODE_IOC_SPKR_ONLY: ++ case INTEL_CLN_AUDIO_MODE_IOC_SPKR_MIC: ++ case INTEL_CLN_AUDIO_MODE_IOC_GSM_SPKR_MIC: ++ break; ++ default: ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ priv->gpio_val = _IOC_NR(cmd) & 0x7; ++ ret = intel_cln_audio_ctrl_gpio_update(priv); ++exit: ++ mutex_unlock(&priv->lock); ++ return ret; ++} ++ ++static const struct file_operations intel_cln_audio_ctrl_fops = { ++ .owner = THIS_MODULE, ++ .open = intel_cln_audio_ctrl_open, ++ .release = intel_cln_audio_ctrl_release, ++ .unlocked_ioctl = intel_cln_audio_ctrl_ioctl ++}; ++ ++static int ++intel_cln_audio_ctrl_chrdev_init(struct intel_cln_audio_ctrl_priv *priv) ++{ ++ /* Register a character dev interface (with ioctls) ++ * to allow control of the audio subsystem switch ++ */ ++ int ret; ++ struct device *dev; ++ ++ ret = alloc_chrdev_region(&priv->cdev_no, 0, 1, ++ "intel_cln_audio_ctrl"); ++ if (ret) { ++ pr_err("Failed to alloc chrdev: %d", ret); ++ return ret; ++ } ++ ++ cdev_init(&priv->cdev, &intel_cln_audio_ctrl_fops); ++ ++ ret = cdev_add(&priv->cdev, priv->cdev_no, 1); ++ if (ret) { ++ pr_err("Failed to add cdev: %d", ret); ++ unregister_chrdev_region(priv->cdev_no, 1); ++ return ret; ++ } ++ ++ priv->cl = class_create(THIS_MODULE, "char"); ++ if (IS_ERR(priv->cl)) { ++ pr_err("Failed to create device class: %ld", ++ PTR_ERR(priv->cl)); ++ cdev_del(&priv->cdev); ++ unregister_chrdev_region(priv->cdev_no, 1); ++ return PTR_ERR(priv->cl); ++ } ++ ++ dev = device_create(priv->cl, NULL, priv->cdev_no, NULL, ++ "intel_cln_audio_ctrl"); ++ if (IS_ERR(dev)) { ++ pr_err("Failed to create device: %ld", ++ PTR_ERR(priv->cl)); ++ class_destroy(priv->cl); ++ cdev_del(&priv->cdev); ++ unregister_chrdev_region(priv->cdev_no, 1); ++ return PTR_ERR(dev); ++ } ++ ++ return 0; ++} ++ ++static int ++intel_cln_audio_ctrl_chrdev_remove(struct intel_cln_audio_ctrl_priv *priv) ++{ ++ device_destroy(priv->cl, priv->cdev_no); ++ class_destroy(priv->cl); ++ cdev_del(&priv->cdev); ++ unregister_chrdev_region(priv->cdev_no, 1); ++ ++ return 0; ++} ++ ++ ++ssize_t intel_cln_audio_ctrl_sysfs_show_mode(struct device *dev, ++ struct device_attribute *attr, ++ char *buf) ++{ ++ struct intel_cln_audio_ctrl_priv *priv = dev_get_drvdata(dev); ++ int ret; ++ char *mode; ++ ++ ret = mutex_lock_interruptible(&priv->lock); ++ if (ret) ++ return ret; ++ ++ switch (priv->gpio_val) { ++ case INTEL_CLN_AUDIO_MODE_GSM_ONLY: ++ mode = "gsm"; ++ break; ++ case INTEL_CLN_AUDIO_MODE_SPKR_ONLY: ++ mode = "spkr"; ++ break; ++ case INTEL_CLN_AUDIO_MODE_SPKR_MIC: ++ mode = "spkr_mic"; ++ break; ++ case INTEL_CLN_AUDIO_MODE_GSM_SPKR_MIC: ++ mode = "gsm_spkr_mic"; ++ break; ++ default: ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ ret = scnprintf(buf, PAGE_SIZE, "%s\n", mode); ++ ++exit: ++ mutex_unlock(&priv->lock); ++ return ret; ++} ++ ++ssize_t intel_cln_audio_ctrl_sysfs_store_mode(struct device *dev, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ struct intel_cln_audio_ctrl_priv *priv = dev_get_drvdata(dev); ++ char mode[16]; ++ unsigned char gpio_val; ++ int ret = count; ++ ++ sscanf(buf, "%15s", mode); ++ ++ if (!strcmp(mode, "gsm")) ++ gpio_val = INTEL_CLN_AUDIO_MODE_GSM_ONLY; ++ else if (!strcmp(mode, "spkr")) ++ gpio_val = INTEL_CLN_AUDIO_MODE_SPKR_ONLY; ++ else if (!strcmp(mode, "spkr_mic")) ++ gpio_val = INTEL_CLN_AUDIO_MODE_SPKR_MIC; ++ else if (!strcmp(mode, "gsm_spkr_mic")) ++ gpio_val = INTEL_CLN_AUDIO_MODE_GSM_SPKR_MIC; ++ else ++ return -EINVAL; ++ ++ ret = mutex_lock_interruptible(&priv->lock); ++ if (ret) ++ return ret; ++ ++ priv->gpio_val = gpio_val; ++ ret = intel_cln_audio_ctrl_gpio_update(priv); ++ if (ret) ++ goto exit; ++ ++ ret = count; ++ ++exit: ++ mutex_unlock(&priv->lock); ++ ++ return ret; ++} ++ ++/* Sysfs attribute descriptor (for alternative user-space interface) */ ++static DEVICE_ATTR(audio_switch_mode, S_IWUSR | S_IRUGO, ++ intel_cln_audio_ctrl_sysfs_show_mode, ++ intel_cln_audio_ctrl_sysfs_store_mode); ++ ++/****************************************************************************** ++ * Module hooks ++ ******************************************************************************/ ++ ++static int ++intel_cln_max9867_init(struct i2c_client *client) ++{ ++ int ret; ++ ++ /* MAX9867 register configuration, from Telit HE910 DVI app-note */ ++ ++ u8 reg_cfg_seq1[] = { ++ 0x04, /* Starting register address, followed by data */ ++ 0x00, /* 0x04 Interrupt Enable */ ++ 0x10, /* 0x05 System Clock */ ++ 0x90, /* 0x06 Audio Clock High */ ++ 0x00, /* 0x07 Audio Clock Low */ ++ 0x10, /* 0x08 Interface 1a */ ++ 0x0A, /* 0x09 Interface 1d */ ++ 0x33, /* 0x0A Codec Filters */ ++ 0x00, /* 0x0B DAC Gain/Sidetone */ ++ 0x00, /* 0x0C DAC Level */ ++ 0x33, /* 0x0D ADC Level */ ++ 0x4C, /* 0x0E Left Line Input Level */ ++ 0x4C, /* 0x0F Right Line Input Level */ ++ 0x00, /* 0x10 Left Volume Control */ ++ 0x00, /* 0x11 Right Volume Control */ ++ 0x14, /* 0x12 Left Mic Gain */ ++ 0x14, /* 0x13 Right Mic Gain */ ++ /* Configuration */ ++ 0xA0, /* 0x14 Input */ ++ 0x00, /* 0x15 Microphone */ ++ 0x65 /* 0x16 Mode */ ++ }; ++ ++ u8 reg_cfg_seq2[] = { ++ 0x17, /* Starting register address, followed by data */ ++ 0xEF /* 0x17 System Shutdown */ ++ }; ++ ++ ret = i2c_master_send(client, ++ reg_cfg_seq1, sizeof(reg_cfg_seq1)); ++ if (ret != sizeof(reg_cfg_seq1)) { ++ pr_err("Failed to write MAX9867 config registers (set 1/2)"); ++ return -EIO; ++ } ++ ++ ret = i2c_master_send(client, ++ reg_cfg_seq2, sizeof(reg_cfg_seq2)); ++ if (ret != sizeof(reg_cfg_seq2)) { ++ pr_err("Failed to write MAX9867 config registers (set 2/2)"); ++ return -EIO; ++ } ++ ++ return 0; ++} ++ ++static int ++intel_cln_max9867_get_chip_rev(struct i2c_client *client) ++{ ++ struct i2c_msg msg[2]; ++ u8 data[2]; ++ int ret; ++ ++ data[0] = 0xFF; /* Chip-revision register address = 0xFF */ ++ msg[0].addr = client->addr; ++ msg[0].flags = 0; ++ msg[0].buf = &data[0]; ++ msg[0].len = 1; ++ ++ msg[1].addr = client->addr; ++ msg[1].flags = I2C_M_RD; ++ msg[1].buf = &data[1]; ++ msg[1].len = 1; ++ ++ ret = i2c_transfer(client->adapter, &msg[0], 2); ++ return (ret == 2) ? data[1] : -EIO; ++} ++ ++static int intel_cln_max9867_i2c_probe(struct i2c_client *client, ++ const struct i2c_device_id *id) ++{ ++ struct intel_cln_audio_ctrl_priv *priv; ++ int ret; ++ ++ priv = devm_kzalloc(&client->dev, sizeof(*priv), ++ GFP_KERNEL); ++ if (priv == NULL) ++ return -ENOMEM; ++ ++ i2c_set_clientdata(client, priv); ++ ++ priv->max9867_i2c = client; ++ mutex_init(&priv->lock); ++ ++ ret = intel_cln_max9867_get_chip_rev(client); ++ if (ret >= 0) ++ pr_info("%s: Detected MAX9867 chip revision 0x%02X\n", ++ __func__, ret); ++ else { ++ pr_err("%s: Failed to read MAX9867 chip revision\n", __func__); ++ goto exit; ++ } ++ ++ ret = intel_cln_max9867_init(client); ++ if (ret) ++ goto exit; ++ ++ priv->gpio_val = GPIO_AUDIO_DEFAULT; ++ ret = intel_cln_audio_ctrl_gpio_update(priv); ++ if (ret) ++ goto exit; ++ ++ /* Create a char dev interface, providing an ioctl config option */ ++ ret = intel_cln_audio_ctrl_chrdev_init(priv); ++ if (ret) ++ goto exit; ++ ++ /* Also create a sysfs interface, providing a cmd line config option */ ++ ret = sysfs_create_file(&client->dev.kobj, ++ &dev_attr_audio_switch_mode.attr); ++ ++exit: ++ return ret; ++} ++ ++static int intel_cln_max9867_i2c_remove(struct i2c_client *client) ++{ ++ struct intel_cln_audio_ctrl_priv *priv = i2c_get_clientdata(client); ++ ++ intel_cln_audio_ctrl_chrdev_remove(priv); ++ ++ sysfs_remove_file(&client->dev.kobj, &dev_attr_audio_switch_mode.attr); ++ ++ return 0; ++} ++ ++static const struct i2c_device_id intel_cln_max9867_i2c_id[] = { ++ {"intel-cln-max9867", 0}, ++ {} ++}; ++MODULE_DEVICE_TABLE(i2c, intel_cln_max9867_i2c_id); ++ ++/* i2c codec control layer */ ++static struct i2c_driver intel_cln_audio_ctrl_i2c_driver = { ++ .driver = { ++ .name = "intel_cln_audio_ctrl", ++ .owner = THIS_MODULE, ++ }, ++ .probe = intel_cln_max9867_i2c_probe, ++ .remove = intel_cln_max9867_i2c_remove, ++ .id_table = intel_cln_max9867_i2c_id, ++}; ++ ++module_i2c_driver(intel_cln_audio_ctrl_i2c_driver); ++ ++MODULE_AUTHOR("Dan O'Donovan <dan@emutex.com>"); ++MODULE_DESCRIPTION("Intel Clanton platform audio control driver"); ++MODULE_LICENSE("Dual BSD/GPL"); +diff --git a/drivers/platform/x86/quark/intel_cln_audio_ctrl.h b/drivers/platform/x86/quark/intel_cln_audio_ctrl.h +new file mode 100644 +index 0000000..b6c4692 +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_audio_ctrl.h +@@ -0,0 +1,45 @@ ++/* ++ * Intel Clanton platform audio control driver ++ * ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ * ++ * See intel_cln_audio_ctrl.c for a detailed description ++ * ++ */ ++ ++#ifndef __INTEL_CLN_AUDIO_CTRL_H__ ++#define __INTEL_CLN_AUDIO_CTRL_H__ ++ ++#include <linux/module.h> ++ ++#define INTEL_CLN_AUDIO_MODE_GSM_ONLY 0x0 ++#define INTEL_CLN_AUDIO_MODE_SPKR_ONLY 0x1 ++#define INTEL_CLN_AUDIO_MODE_SPKR_MIC 0x3 ++#define INTEL_CLN_AUDIO_MODE_GSM_SPKR_MIC 0x5 ++ ++#define INTEL_CLN_AUDIO_MODE_IOC_GSM_ONLY \ ++ _IO('x', INTEL_CLN_AUDIO_MODE_GSM_ONLY) ++#define INTEL_CLN_AUDIO_MODE_IOC_SPKR_ONLY \ ++ _IO('x', INTEL_CLN_AUDIO_MODE_SPKR_ONLY) ++#define INTEL_CLN_AUDIO_MODE_IOC_SPKR_MIC \ ++ _IO('x', INTEL_CLN_AUDIO_MODE_SPKR_MIC) ++#define INTEL_CLN_AUDIO_MODE_IOC_GSM_SPKR_MIC \ ++ _IO('x', INTEL_CLN_AUDIO_MODE_GSM_SPKR_MIC) ++ ++#endif /* __INTEL_CLN_AUDIO_CTRL_H__ */ +diff --git a/drivers/platform/x86/quark/intel_cln_board_data.c b/drivers/platform/x86/quark/intel_cln_board_data.c +new file mode 100644 +index 0000000..da226c7 +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_board_data.c +@@ -0,0 +1,207 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton Legacy Platform Data accessor layer ++ * ++ * Simple Legacy SPI flash access layer ++ * ++ * Author : Bryan O'Donoghue <bryan.odonoghue@linux.intel.com> 2013 ++ */ ++ ++#include <asm/io.h> ++#include <linux/errno.h> ++#include <linux/ioport.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/printk.h> ++ ++#define DRIVER_NAME "board_data" ++#define PFX "MFH: " ++#define SPIFLASH_BASEADDR 0xFFF00000 ++#define MFH_OFFSET 0x00008000 ++#define PLATFORM_DATA_OFFSET 0x00010000 ++#define MTD_PART_OFFSET 0x00050000 ++#define MTD_PART_LEN 0x00040000 ++#define MFH_PADDING 0x1E8 ++#define MFH_MAGIC 0x5F4D4648 ++#define FLASH_SIZE 0x00400000 ++ ++/* MFH types supported @ version #1 */ ++#define MFH_ITEM_FW_STAGE1 0x00000000 ++#define MFH_ITEM_FW_STAGE1_SIGNED 0x00000001 ++#define MFH_ITEM_FW_STAGE2 0x00000003 ++#define MFH_ITEM_FW_STAGE2_SIGNED 0x00000004 ++#define MFH_ITEM_FW_STAGE2_CONFIG 0x00000005 ++#define MFH_ITEM_FW_STAGE2_CONFIG_SIGNED 0x00000006 ++#define MFH_ITEM_FW_PARAMS 0x00000007 ++#define MFH_ITEM_FW_RECOVERY 0x00000008 ++#define MFH_ITEM_FW_RECOVERY_SIGNED 0x00000009 ++#define MFH_ITEM_BOOTLOADER 0x0000000B ++#define MFH_ITEM_BOOTLOADER_SIGNED 0x0000000C ++#define MFH_ITEM_BOOTLOADER_CONFIG 0x0000000D ++#define MFH_ITEM_BOOTLOADER_CONFIG_SIGNED 0x0000000E ++#define MFH_ITEM_KERNEL 0x00000010 ++#define MFH_ITEM_KERNEL_SIGNED 0x00000011 ++#define MFH_ITEM_RAMDISK 0x00000012 ++#define MFH_ITEM_RAMDISK_SIGNED 0x00000013 ++#define MFH_ITEM_LOADABLE_PROGRAM 0x00000015 ++#define MFH_ITEM_LOADABLE_PROGRAM_SIGNED 0x00000016 ++#define MFH_ITEM_BUILD_INFO 0x00000018 ++#define MFH_ITEM_VERSION 0x00000019 ++ ++struct intel_cln_mfh { ++ u32 id; ++ u32 ver; ++ u32 flags; ++ u32 next_block; ++ u32 item_count; ++ u32 boot_priority_list; ++ u8 padding[MFH_PADDING]; ++}; ++ ++struct intel_cln_mfh_item { ++ u32 type; ++ u32 addr; ++ u32 len; ++ u32 res0; ++}; ++ ++static struct resource conf_res __initdata = { ++ .flags = IORESOURCE_MEM, ++ .start = 0, ++ .end = 0, ++}; ++ ++static struct resource plat_res __initdata = { ++ .flags = IORESOURCE_MEM, ++ .start = 0, ++ .end = 0, ++}; ++ ++static struct platform_device conf_pdev = { ++ .name = "cln-layout-conf", ++ .id = -1, ++ .resource = &conf_res, ++}; ++ ++struct kobject * board_data_kobj; ++EXPORT_SYMBOL_GPL(board_data_kobj); ++ ++static bool mfh_plat_found = false; ++ ++static long unsigned int flash_version_data; ++static ssize_t flash_version_show(struct kobject *kobj, ++ struct kobj_attribute *attr, char *buf) ++{ ++ return snprintf(buf, 12, "%#010lx\n", flash_version_data); ++} ++ ++static struct kobj_attribute flash_version_attr = ++ __ATTR(flash_version, 0644, flash_version_show, NULL); ++ ++extern int intel_cln_plat_probe(struct resource * pres); ++ ++/** ++ * intel_cln_board_data_init ++ * ++ * Module entry point ++ */ ++static int __init intel_cln_board_data_init(void) ++{ ++ extern struct kobject * firmware_kobj; ++ struct intel_cln_mfh __iomem * mfh; ++ struct intel_cln_mfh_item __iomem * item; ++ struct platform_device * pdev; ++ u32 count; ++ void __iomem * spi_data; ++ int ret = 0; ++ ++ spi_data = ioremap(SPIFLASH_BASEADDR, FLASH_SIZE); ++ if (!spi_data) ++ return -ENODEV; ++ ++ /* get mfh and first item pointer */ ++ mfh = spi_data + MFH_OFFSET; ++ if (mfh->id != MFH_MAGIC){ ++ pr_err(PFX"Bad MFH magic want 0x%08x found 0x%08x @ 0x%p\n", ++ MFH_MAGIC, mfh->id, &mfh->id); ++ return -ENODEV; ++ } ++ ++ pr_info(PFX"mfh @ 0x%p: id 0x%08lx ver 0x%08lx entries 0x%08lx\n", ++ mfh, (unsigned long)mfh->id, (unsigned long)mfh->ver, ++ (unsigned long)mfh->item_count); ++ item = (struct intel_cln_mfh_item __iomem *) ++ &mfh->padding [sizeof(u32) * mfh->boot_priority_list]; ++ ++ /* board_data_kobj subordinate of firmware @ /sys/firmware/board_data */ ++ board_data_kobj = kobject_create_and_add("board_data", firmware_kobj); ++ if (!board_data_kobj) { ++ pr_err(PFX"kset create error\n"); ++ return -ENODEV; ++ } ++ ++ /* Register flash regions as seperate platform devices */ ++ for (count = 0; count < mfh->item_count; count++, item++){ ++ pdev = NULL; ++ ++ switch (item->type){ ++ case MFH_ITEM_BUILD_INFO: ++ conf_res.start = item->addr; ++ conf_res.end = item->addr + item->len; ++ pdev = &conf_pdev; ++ break; ++ case MFH_ITEM_VERSION: ++ flash_version_data = item->res0; ++ if(sysfs_create_file(board_data_kobj, ++ &flash_version_attr.attr)) { ++ pr_err("failed to create sysfs entry for flash version\n"); ++ flash_version_data = 0; ++ } ++ break; ++ default: ++ break; ++ } ++ ++ if (pdev != NULL) ++ platform_device_register(pdev); ++ } ++ ++ /* This ought to be encoded in the MFH ! */ ++ if (mfh_plat_found == false){ ++ pr_err(PFX"Warning platform data MFH missing - using hardcoded " ++ "offsets\n"); ++ ++ /* Platform data */ ++ plat_res.start = SPIFLASH_BASEADDR + PLATFORM_DATA_OFFSET; ++ count = *(uint32_t*)(spi_data + PLATFORM_DATA_OFFSET + sizeof(uint32_t)); ++ plat_res.end = count; ++ ret = intel_cln_plat_probe(&plat_res); ++ } ++ ++ iounmap(spi_data); ++ return ret; ++} ++ ++MODULE_AUTHOR("Bryan O'Donoghue <bryan.odonoghue@intel.com>"); ++MODULE_DESCRIPTION("Intel Clanton SPI Data API"); ++MODULE_LICENSE("Dual BSD/GPL"); ++subsys_initcall(intel_cln_board_data_init); ++ +diff --git a/drivers/platform/x86/quark/intel_cln_ecc_scrub.c b/drivers/platform/x86/quark/intel_cln_ecc_scrub.c +new file mode 100644 +index 0000000..1fb46f6 +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_ecc_scrub.c +@@ -0,0 +1,668 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton DRAM ECC Scrub driver ++ * ++ * !!!!!!! Description ++ * ++ */ ++#include <asm-generic/uaccess.h> ++#include <linux/intel_cln_sb.h> ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/printk.h> ++#include <linux/platform_device.h> ++#include <linux/proc_fs.h> ++ ++#define DRIVER_NAME "intel-cln-ecc" ++#define INTEL_CLN_ECC_SCRUB_PROCDIR "driver/ecc_scrub" ++#define STATUS "status" ++#define CONTROL "control" ++#define INTERVAL "interval" ++#define ECC_BLOCK_SIZE "block_size" ++ ++#define CONTROL_USAGE "ECC Scrub Control: invalid setting. "\ ++ "Valid values are 1 or 0\n" ++#define CONTROL_SCRUB_ON_STR "1\n" ++#define CONTROL_SCRUB_OFF_STR "0\n" ++#define CONTROL_ON_STR "on\n" ++#define CONTROL_OFF_STR "off\n" ++ ++#define INTERVAL_USAGE "ECC Scrub Interval: invalid setting. "\ ++ "Valid range is 1 - 255\n" ++#define SIZE_USAGE "ECC Scrub Block Size: invalid setting. "\ ++ "Valid range is 64 - 512\n" ++ ++#define OVERRIDE_CONFIG_PARM_DESC "Clanton ECC Scrub - "\ ++ "Override BIOS settings "\ ++ "for Scrub Config" ++ ++#define OVERRIDE_START_PARM_DESC "Clanton ECC Scrub - "\ ++ "Override BIOS settings "\ ++ "for Scrub Start address" ++ ++#define OVERRIDE_END_PARM_DESC "Clanton ECC Scrub - "\ ++ "Override BIOS settings "\ ++ "for Scrub End address" ++ ++#define OVERRIDE_NEXT_PARM_DESC "Clanton ECC Scrub - "\ ++ "Override BIOS settings "\ ++ "for Scrub Next address" ++ ++#define MAX_SCRUB_BLOCK_SIZE 512 ++#define MIN_SCRUB_BLOCK_SIZE 64 ++#define MAX_SCRUB_REFRESH 255 ++#define MIN_SCRUB_REFRESH 0 ++ ++#define NOT_OVERRIDDEN 0xfffffffful ++ ++/* Shorten fn names to fit 80 char limit */ ++#ifndef sb_read ++#define sb_read intel_cln_sb_read_reg ++#endif ++#ifndef sb_write ++#define sb_write intel_cln_sb_write_reg ++#endif ++ ++/* Register ID */ ++#define ECC_SCRUB_CONFIG_REG (0x50) ++#define ECC_SCRUB_START_MEM_REG (0x76) ++#define ECC_SCRUB_END_MEM_REG (0x77) ++#define ECC_SCRUB_NEXT_READ_REG (0x7C) ++ ++ ++/* Reg commands */ ++#define THERMAL_CTRL_READ (0x10) ++#define THERMAL_CTRL_WRITE (0x11) ++#define THERMAL_RESUME_SCRUB (0xC2) ++#define THERMAL_PAUSE_SCRUB (0xC3) ++ ++/** ++ * struct intel_cln_ecc_scrub_dev ++ * ++ * Structure to represent module state/data/etc ++ */ ++struct intel_cln_ecc_scrub_dev { ++ ++ /* Linux kernel structures */ ++ struct platform_device *pldev; /* Platform device */ ++ ++ /* Register copies */ ++ u32 start_address; ++ u32 end_address; ++ u32 next_address; ++ u32 config; ++ ++}; ++ ++static struct intel_cln_ecc_scrub_dev ecc_scrub_dev; ++ ++static u32 ecc_scrub_config_override = NOT_OVERRIDDEN; ++static u32 ecc_scrub_start_override = NOT_OVERRIDDEN; ++static u32 ecc_scrub_end_override = NOT_OVERRIDDEN; ++static u32 ecc_scrub_next_override = NOT_OVERRIDDEN; ++ ++/** ++ * intel_cln_ecc_scrub_stat_show ++ * ++ * @param dev: pointer to device ++ * @param attr: attribute pointer ++ * @param buf: output buffer ++ * @return number of bytes successfully read ++ * ++ * Populates ecc_scrub state via /sys/device/platform/intel-cln-ecc/status ++ */ ++static ssize_t ++intel_cln_ecc_scrub_stat_show(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ int len = 0, size = 0; ++ unsigned int count = PAGE_SIZE; ++ u32 reg_data = 0; ++ char *scrub_status = CONTROL_OFF_STR; ++ ++ /* Display start of memory address */ ++ sb_read(SB_ID_THERMAL, THERMAL_CTRL_READ, ECC_SCRUB_START_MEM_REG, ++ ®_data, 1); ++ len += snprintf(buf + len, count - len, ++ "ecc scrub mem start\t\t\t: 0x%08x\n", reg_data); ++ ++ ++ /* Display end of memory address */ ++ sb_read(SB_ID_THERMAL, THERMAL_CTRL_READ, ECC_SCRUB_END_MEM_REG, ++ ®_data, 1); ++ len += snprintf(buf + len, count - len, ++ "ecc scrub mem end\t\t\t: 0x%08x\n", reg_data); ++ ++ /* Display next address to be read */ ++ sb_read(SB_ID_THERMAL, THERMAL_CTRL_READ, ECC_SCRUB_NEXT_READ_REG, ++ ®_data, 1); ++ len += snprintf(buf + len, count - len, ++ "ecc scrub next read\t\t\t: 0x%08x\n", reg_data); ++ ++ /* Display config settings */ ++ sb_read(SB_ID_THERMAL, THERMAL_CTRL_READ, ECC_SCRUB_CONFIG_REG, ++ ®_data, 1); ++ ++ /* Interval is the lsbyte of the config reg, so mask out just ++ * that byte in the data printed. */ ++ len += snprintf(buf + len, count - len, ++ "ecc scrub interval\t\t\t: %d\n", ++ (reg_data & 0x000000ff)); ++ ++ /* Size is indicated in bits 12:8 of register in ++ * terms of 32 byte blocks. */ ++ size = ((reg_data & 0x00001f00) >> 8)*32; ++ len += snprintf(buf + len, count - len, ++ "ecc scrub block_size\t\t\t: %d\n", size); ++ ++ /* Status is indicated in bit 13 of register. */ ++ if ((reg_data & 0x00002000) > 0) ++ scrub_status = CONTROL_ON_STR; ++ ++ len += snprintf(buf + len, count - len, ++ "ecc scrub status\t\t\t: %s\n", scrub_status); ++ return len; ++} ++ ++/** ++ * intel_cln_ecc_scrub_ctrl_show ++ * ++ * @param dev: pointer to device ++ * @param attr: attribute pointer ++ * @param buf: output buffer ++ * @return number of bytes successfully read ++ * ++ * Populates ecc_scrub state via /sys/device/platform/intel-cln-ecc/control ++ */ ++static ssize_t ++intel_cln_ecc_scrub_ctrl_show(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ unsigned int count = PAGE_SIZE; ++ u32 reg_data = 0; ++ char *on_or_off = CONTROL_SCRUB_OFF_STR; ++ ++ sb_read(SB_ID_THERMAL, THERMAL_CTRL_READ, ECC_SCRUB_CONFIG_REG, ++ ®_data, 1); ++ ++ /* Status is indicated in bit 13 of register. */ ++ if ((reg_data & 0x00002000) > 0) ++ /* interval > 0 assume scrubbing on */ ++ on_or_off = CONTROL_SCRUB_ON_STR; ++ ++ return snprintf(buf, count,"%s", on_or_off); ++} ++ ++/** ++ * intel_cln_ecc_scrub_ctrl_store ++ * ++ * @param dev: pointer to device ++ * @param attr: attribute pointer ++ * @param buf: input buffer ++ * @param size: size of input data ++ * @return number of bytes successfully written ++ * ++ * Function allows user-space to switch on/off scrubbing with a simple ++ * echo 1/0 > /sys/device/platform/intel-cln-ecc/control command ++ */ ++static ssize_t ++intel_cln_ecc_scrub_ctrl_store(struct device *dev, ++ struct device_attribute *attr, const char *buf, ++ size_t count) ++{ ++ ssize_t ret = 0; ++ ++ if (count <= 1) ++ return -EINVAL; ++ ++ ret = -EINVAL; ++ ++ /* Check for command starting with "scrub" ++ * and ending with "on" or "off" */ ++ ++ if (!strcmp(buf, CONTROL_SCRUB_ON_STR)) { ++ sb_write(SB_ID_THERMAL, THERMAL_RESUME_SCRUB, ++ 0, 0, 1); ++ ret = 0; ++ } else if (!strcmp(buf, CONTROL_SCRUB_OFF_STR)) { ++ sb_write(SB_ID_THERMAL, THERMAL_PAUSE_SCRUB, 0, ++ 0, 1); ++ ret = 0; ++ } ++ ++ ++ if (ret == 0) ++ ret = (ssize_t)count; ++ ++ else if (ret == -EINVAL) ++ printk(CONTROL_USAGE); ++ ++ return ret; ++} ++ ++/** ++ * intel_cln_ecc_scrub_intrvl_show ++ * ++ * @param dev: pointer to device ++ * @param attr: attribute pointer ++ * @param buf: output buffer ++ * @return number of bytes successfully read ++ * ++ * Populates ecc_scrub state via /sys/device/platform/intel-cln-ecc/interval ++ */ ++static ssize_t ++intel_cln_ecc_scrub_intrvl_show(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ u32 reg_data = 0; ++ ++ /* Interval is the lsbyte of the config reg, ++ * so mask out just that byte in the data printed. */ ++ sb_read(SB_ID_THERMAL, THERMAL_CTRL_READ, ECC_SCRUB_CONFIG_REG, ++ ®_data, 1); ++ ++ return snprintf(buf, PAGE_SIZE, "%d\n", (reg_data & 0x000000ff)); ++} ++ ++/** ++ * intel_cln_ecc_scrub_intrvl_store ++ * ++ * @param dev: pointer to device ++ * @param attr: attribute pointer ++ * @param buf: input buffer ++ * @param size: size of input data ++ * @return number of bytes successfully written ++ * ++ * Function allows user-space to set scrub interval with a value of 1-255 ++ * echo 1-255 > /sys/device/platform/intel-cln-ecc/interval type command ++ */ ++static ssize_t ++intel_cln_ecc_scrub_intrvl_store(struct device *dev, ++ struct device_attribute *attr, const char *buf, ++ size_t count) ++{ ++ ssize_t ret = 0; ++ unsigned long val = 0; ++ u32 reg_data = 0; ++ int ret_temp = 0; ++ ++ if (count <= 1) ++ return -EINVAL; ++ ++ ret = -EINVAL; ++ ++ ret_temp = kstrtoul(buf, 10, &val); ++ ++ if (ret_temp) ++ return ret_temp; ++ ++ if (val > MIN_SCRUB_REFRESH && val <= MAX_SCRUB_REFRESH) { ++ /* Need to read-modify-write config register. */ ++ sb_read(SB_ID_THERMAL, THERMAL_CTRL_READ, ++ ECC_SCRUB_CONFIG_REG, ++ ®_data, 1); ++ ++ reg_data &= 0xffffff00; /* clear lsb. */ ++ reg_data |= val; /* now set interval. */ ++ ++ sb_write(SB_ID_THERMAL, THERMAL_CTRL_WRITE, ++ ECC_SCRUB_CONFIG_REG, ++ reg_data, 1); ++ ret = 0; ++ } else { ++ printk(INTERVAL_USAGE); ++ } ++ ++ if (ret == 0) ++ ret = (ssize_t)count; ++ return ret; ++} ++ ++/** ++ * intel_cln_ecc_scrub_size_show ++ * ++ * @param dev: pointer to device ++ * @param attr: attribute pointer ++ * @param buf: output buffer ++ * @return number of bytes successfully read ++ * ++ * Populates ecc_scrub state via /sys/device/platform/intel-cln-ecc/block_size ++ */ ++static ssize_t ++intel_cln_ecc_scrub_size_show(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ int size = 0; ++ u32 reg_data = 0; ++ ++ /* Size is indicated in bits 12:8 of config register ++ * multiply x32 to get num bytes). */ ++ sb_read(SB_ID_THERMAL, THERMAL_CTRL_READ, ECC_SCRUB_CONFIG_REG, ++ ®_data, 1); ++ size = ((reg_data & 0x00001f00) >> 8)*32; ++ ++ return snprintf(buf, PAGE_SIZE, "%d\n", size); ++} ++ ++/** ++ * intel_cln_ecc_scrub_size_store ++ * ++ * @param dev: pointer to device ++ * @param attr: attribute pointer ++ * @param buf: input buffer ++ * @param size: size of input data ++ * @return number of bytes successfully written ++ * ++ * Function allows user-space to set scrub block size of 64-512 with a simple ++ * echo 64-512 > /sys/device/platform/intel-cln-ecc/block_size command ++ */ ++static ssize_t ++intel_cln_ecc_scrub_size_store(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ ssize_t ret = 0; ++ unsigned long val = 0; ++ u32 reg_data = 0; ++ int ret_temp = 0; ++ ++ if (count <= 1) ++ return -EINVAL; ++ ++ ret = -EINVAL; ++ ret_temp = kstrtoul(buf, 10, &val); ++ ++ if (ret_temp) ++ return ret_temp; ++ ++ if (val >= MIN_SCRUB_BLOCK_SIZE && val <= MAX_SCRUB_BLOCK_SIZE){ ++ ++ /* Need to read-modify-write config register. */ ++ sb_read(SB_ID_THERMAL, THERMAL_CTRL_READ, ++ ECC_SCRUB_CONFIG_REG, ++ ®_data, 1); ++ ++ reg_data &= 0xfffffe0ff; /* clear bits 12:8 */ ++ reg_data |= (val/32)<<8; /* now set size */ ++ ++ sb_write(SB_ID_THERMAL, THERMAL_CTRL_WRITE, ++ ECC_SCRUB_CONFIG_REG, reg_data, 1); ++ ret = 0; ++ } else { ++ printk(SIZE_USAGE); ++ } ++ ++ if (ret == 0) ++ ret = (ssize_t)count; ++ ++ return ret; ++} ++ ++static struct device_attribute dev_attr_status = { ++ .attr = { ++ .name = "status", ++ .mode = 0444, ++ }, ++ .show = intel_cln_ecc_scrub_stat_show, ++}; ++ ++static struct device_attribute dev_attr_control = { ++ .attr = { ++ .name = "control", ++ .mode = 0644, ++ }, ++ .show = intel_cln_ecc_scrub_ctrl_show, ++ .store = intel_cln_ecc_scrub_ctrl_store, ++}; ++ ++static struct device_attribute dev_attr_intrvl = { ++ .attr = { ++ .name = "interval", ++ .mode = 0644, ++ }, ++ .show = intel_cln_ecc_scrub_intrvl_show, ++ .store = intel_cln_ecc_scrub_intrvl_store, ++}; ++ ++static struct device_attribute dev_attr_block_size = { ++ .attr = { ++ .name = "block_size", ++ .mode = 0644, ++ }, ++ .show = intel_cln_ecc_scrub_size_show, ++ .store = intel_cln_ecc_scrub_size_store, ++}; ++ ++static struct attribute *platform_attributes[] = { ++ &dev_attr_status.attr, ++ &dev_attr_control.attr, ++ &dev_attr_intrvl.attr, ++ &dev_attr_block_size.attr, ++ NULL, ++}; ++ ++static struct attribute_group ecc_attrib_group = { ++ .attrs = platform_attributes ++}; ++ ++/***************************************************************************** ++ * Module/PowerManagement hooks ++ *****************************************************************************/ ++/** ++ * intel_cln_ecc_probe ++ * ++ * @param pdev: Platform device ++ * @return 0 success < 0 failure ++ * ++ * Callback from platform sub-system to probe ++ * ++ */ ++static int intel_cln_ecc_scrub_probe(struct platform_device *pdev) ++{ ++ int value_overridden = 0; ++ ++#ifdef CONFIG_INTEL_CLN_ECC_SCRUB_OVERRIDE_CONFIG ++ u32 scrubber_refresh = 0; ++ u32 scrubber_block_size = 0; ++ u32 config_settings = 0; ++#endif ++ ++ memset(&ecc_scrub_dev, 0x00, sizeof(ecc_scrub_dev)); ++ ++ /* Update config settings, if directed so to do */ ++ if (ecc_scrub_start_override != NOT_OVERRIDDEN) { ++ /* start of memory address */ ++ sb_write(SB_ID_THERMAL, THERMAL_CTRL_WRITE, ++ ECC_SCRUB_START_MEM_REG, ecc_scrub_start_override, 1); ++ ++ value_overridden = 1; ++ } ++ if (ecc_scrub_end_override != NOT_OVERRIDDEN) { ++ /* end of memory address */ ++ sb_write(SB_ID_THERMAL, THERMAL_CTRL_WRITE, ++ ECC_SCRUB_END_MEM_REG, ecc_scrub_end_override, 1); ++ ++ value_overridden = 1; ++ } ++ if (ecc_scrub_next_override != NOT_OVERRIDDEN) { ++ /* next address to be read */ ++ sb_write(SB_ID_THERMAL, THERMAL_CTRL_WRITE, ++ ECC_SCRUB_NEXT_READ_REG, ecc_scrub_next_override, 1); ++ ++ value_overridden = 1; ++ } ++ if (ecc_scrub_config_override != NOT_OVERRIDDEN) { ++ sb_write(SB_ID_THERMAL, THERMAL_CTRL_WRITE, ++ ECC_SCRUB_CONFIG_REG, ecc_scrub_config_override, 1); ++ ++ value_overridden = 1; ++ } ++ ++ /* Config Reg can be updated by either command line or kconfig setting ++ * in the case where we have both the command line takes precedence.*/ ++ ++ else { ++#ifdef CONFIG_INTEL_CLN_ECC_SCRUB_OVERRIDE_CONFIG ++ scrubber_refresh = CONFIG_INTEL_CLN_HW_ECC_REFRESH_RATE; ++ scrubber_block_size = CONFIG_INTEL_CLN_HW_ECC_REFRESH_SIZE; ++ ++ if (scrubber_block_size > MAX_SCRUB_BLOCK_SIZE) ++ scrubber_block_size = MAX_SCRUB_BLOCK_SIZE; ++ ++ else if (scrubber_block_size < MIN_SCRUB_BLOCK_SIZE) ++ scrubber_block_size = MIN_SCRUB_BLOCK_SIZE; ++ ++ if (scrubber_refresh > MAX_SCRUB_REFRESH) ++ scrubber_refresh = MAX_SCRUB_REFRESH; ++ ++ ++ /* adjust block size to multiples of 32 - ++ * as that is what the register setting actually expects. */ ++ config_settings = scrubber_block_size/32; ++ config_settings <<= 8; ++ config_settings += scrubber_refresh; ++ ++ /* config settings */ ++ sb_write(SB_ID_THERMAL, THERMAL_CTRL_WRITE, ++ ECC_SCRUB_CONFIG_REG, config_settings, 1); ++ ++ value_overridden = 1; ++#endif ++ } ++ ++ if (value_overridden) ++ sb_write(SB_ID_THERMAL, THERMAL_RESUME_SCRUB, 0, 0, 1); ++ ++ return sysfs_create_group(&pdev->dev.kobj, &ecc_attrib_group); ++} ++ ++/** ++ * intel_cln_ecc_scrub_suspend ++ * ++ * @param pdev: Platform device structure (unused) ++ * @return 0 success < 0 failure ++ * ++ */ ++static int intel_cln_ecc_scrub_suspend(struct device *pdev) ++{ ++#ifdef CONFIG_INTEL_CLN_ECC_SCRUB_S3_CONFIG ++ u32 reg_data = 0; ++ ++ /* Store off the 4 registers associated with scrubbing. */ ++ sb_read(SB_ID_THERMAL, THERMAL_CTRL_READ, ECC_SCRUB_START_MEM_REG, ++ ®_data, 1); ++ ecc_scrub_dev.start_address = reg_data; ++ ++ sb_read(SB_ID_THERMAL, THERMAL_CTRL_READ, ECC_SCRUB_END_MEM_REG, ++ ®_data, 1); ++ ecc_scrub_dev.end_address = reg_data; ++ ++ sb_read(SB_ID_THERMAL, THERMAL_CTRL_READ, ECC_SCRUB_NEXT_READ_REG, ++ ®_data, 1); ++ ecc_scrub_dev.next_address = reg_data; ++ ++ sb_read(SB_ID_THERMAL, THERMAL_CTRL_READ, ECC_SCRUB_CONFIG_REG, ++ ®_data, 1); ++ ecc_scrub_dev.config = reg_data; ++#endif ++ return 0; ++} ++ ++/** ++ * intel_cln_ecc_scrub_resume ++ * ++ * @param pdev: Platform device structure (unused) ++ * @return 0 success < 0 failure ++ */ ++static int intel_cln_ecc_scrub_resume(struct device *pdev) ++{ ++#ifdef CONFIG_INTEL_CLN_ECC_SCRUB_S3_CONFIG ++ ++ sb_write(SB_ID_THERMAL, THERMAL_CTRL_WRITE, ECC_SCRUB_START_MEM_REG, ++ ecc_scrub_dev.start_address, 1); ++ ++ sb_write(SB_ID_THERMAL, THERMAL_CTRL_WRITE, ECC_SCRUB_END_MEM_REG, ++ ecc_scrub_dev.end_address, 1); ++ ++ sb_write(SB_ID_THERMAL, THERMAL_CTRL_WRITE, ECC_SCRUB_NEXT_READ_REG, ++ ecc_scrub_dev.next_address, 1); ++ ++ sb_write(SB_ID_THERMAL, THERMAL_CTRL_WRITE, ECC_SCRUB_CONFIG_REG, ++ ecc_scrub_dev.config, 1); ++ ++ sb_write(SB_ID_THERMAL, THERMAL_RESUME_SCRUB, 0, 0, 1); ++ ++#endif ++ return 0; ++} ++ ++/** ++ * intel_cln_ecc_scrub_remove ++ * ++ * @return 0 success < 0 failure ++ * ++ * Removes a platform device ++ */ ++static int intel_cln_ecc_scrub_remove(struct platform_device *pdev) ++{ ++ return sysfs_create_group(&pdev->dev.kobj, &ecc_attrib_group); ++} ++ ++/* ++ * Power management operations ++ */ ++static const struct dev_pm_ops intel_cln_ecc_scrub_pm_ops = { ++ .suspend = intel_cln_ecc_scrub_suspend, ++ .resume = intel_cln_ecc_scrub_resume, ++}; ++ ++ ++/* ++ * Platform structures useful for interface to PM subsystem ++ */ ++static struct platform_driver intel_cln_ecc_scrub_driver = { ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ .pm = &intel_cln_ecc_scrub_pm_ops, ++ }, ++ .probe = intel_cln_ecc_scrub_probe, ++ .remove = intel_cln_ecc_scrub_remove, ++}; ++ ++ ++MODULE_AUTHOR("Derek Harnett <derek.harnett@intel.com>"); ++MODULE_DESCRIPTION("Intel Clanton DRAM ECC-scrub driver"); ++MODULE_LICENSE("Dual BSD/GPL"); ++ ++module_param(ecc_scrub_config_override, uint, 0644); ++MODULE_PARM_DESC(ecc_scrub_config_override, OVERRIDE_CONFIG_PARM_DESC); ++ ++module_param(ecc_scrub_start_override, uint, 0644); ++MODULE_PARM_DESC(ecc_scrub_start_override, OVERRIDE_START_PARM_DESC); ++ ++module_param(ecc_scrub_end_override, uint, 0644); ++MODULE_PARM_DESC(ecc_scrub_end_override, OVERRIDE_END_PARM_DESC); ++ ++module_param(ecc_scrub_next_override, uint, 0644); ++MODULE_PARM_DESC(ecc_scrub_next_override, OVERRIDE_NEXT_PARM_DESC); ++ ++module_platform_driver(intel_cln_ecc_scrub_driver); ++ +diff --git a/drivers/platform/x86/quark/intel_cln_esram.c b/drivers/platform/x86/quark/intel_cln_esram.c +new file mode 100644 +index 0000000..76d2024 +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_esram.c +@@ -0,0 +1,1144 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton eSRAM overlay driver ++ * ++ * eSRAM is an on-chip fast access SRAM. ++ * ++ * This driver provides the ability to map a kallsyms derived symbol of ++ * arbitrary length or a struct page entitiy. ++ * A sysfs interface is provided to allow map of kernel structures, without ++ * having to use the API from your code directly. ++ * ++ * Example: ++ * echo idt_table > /sys/devices/intel-cln-esram.0/map ++ * ++ * An API is provided to allow for mapping of a) kernel symbols or b) pages. ++ * eSRAM requires 4k physically aligned addresses to work - so a struct page ++ * fits neatly into this. ++ * ++ * intel_cln_esram_map_sym(ohci_irq); ++ * intel_cln_esram_map_page(virt_to_page(ohci_irq), "ohci_irq"); ++ * Are equivalent - with the exception that map_sym() can detect if a mapping ++ * crosses a page-boundary, whereas map_page just maps one page. Generally use ++ * map_sym() for code and map_page() for data ++ * ++ * To populte eSRAM we must copy data to a temporary buffer, overlay and ++ * then copy data back to the eSRAM region. ++ * ++ * When entering S3 - we must save eSRAM state to DRAM, and similarly on restore ++ * to S0 we must repopulate eSRAM ++ * Unmap code is included for reference however the cache coherency of unmap is ++ * not guaranteed so the functionality is not exported by this code ++ * ++ */ ++#include <asm/cacheflush.h> ++#include <asm/desc.h> ++#include <asm/io.h> ++#include <asm/pgtable.h> ++#include <asm/special_insns.h> ++#include <asm-generic/uaccess.h> ++#include <linux/delay.h> ++#include <linux/err.h> ++#include <linux/fs.h> ++#include <linux/intel_cln_sb.h> ++#include <linux/kallsyms.h> ++#include <linux/list.h> ++#include <linux/mm.h> ++#include <linux/module.h> ++#include <linux/printk.h> ++#include <linux/platform_device.h> ++#include <linux/pm.h> ++#include <linux/seq_file.h> ++#include <linux/slab.h> ++#include <linux/spinlock.h> ++#include <linux/timer.h> ++ ++#include "intel_cln_esram.h" ++ ++#define DRIVER_NAME "intel-cln-esram" ++ ++/* Shorten fn names to fit 80 char limit */ ++#ifndef sb_read ++#define sb_read intel_cln_sb_read_reg ++#endif ++#ifndef sb_write ++#define sb_write intel_cln_sb_write_reg ++#endif ++ ++/* Define size of pages, ECC scrub demark etc */ ++#define MAX_PAGE_RETRIES (100) ++#define MS_PER_HOUR (3600000UL) ++#define ESRAM_PAGE_COUNT INTEL_CLN_ESRAM_PAGE_COUNT ++#define ESRAM_PAGE_MASK (0xFFFFF000) ++#define ESRAM_PAGE_SIZE INTEL_CLN_ESRAM_PAGE_SIZE ++#define ESRAM_TOTAL_SIZE (ESRAM_PAGE_COUNT * ESRAM_PAGE_SIZE) ++#define ECC_MAX_REFRESH_PERIOD (48) ++#define ECC_DEFAULT_REFRESH_PERIOD (24) ++#define ECC_DRAM_READSIZE (512) /* bytes per DRAM ECC */ ++#define ECC_ESRAM_READSIZE ESRAM_PAGE_SIZE /* bytes per SRAM ECC */ ++ ++/* Register ID */ ++#define ESRAM_PGPOOL_REG (0x80) /* PGPOOL */ ++#define ESRAM_CTRL_REG (0x81) /* ESRAMCTRL */ ++#define ESRAM_PGBLOCK_REG (0x82) /* Global page ctrl */ ++#define ESCRM_ECCCERR_REG (0x83) /* Correctable ECC */ ++#define ESRAM_ECCUCERR_REG (0x84) /* Uncorrectable ECC */ ++ ++/* Reg commands */ ++#define ESRAM_CTRL_READ (0x10) /* Config reg */ ++#define ESRAM_CTRL_WRITE (0x11) /* Config reg */ ++#define ESRAM_PAGE_READ (0x12) /* Page config read */ ++#define ESRAM_PAGE_WRITE (0x13) /* Page config write */ ++ ++/* ESRAMPGPOOL reg 0x80 - r/w opcodes 0x10/0x11 */ ++#define ESRAM_PGPOOL_FLUSHING(x) ((x>>18)&0x1FF) ++#define ESRAM_PGPOOL_PGBUSY(x) ((x>>9)&0x1FF) ++ ++/* ESRAMCTRL reg 0x81 - r/w opcodes 0x10/0x11 */ ++#define ESRAM_CTRL_FLUSHPRI(x) ((x>>25)&0x03) /* DRAM flush priority */ ++#define ESRAM_CTRL_SIZE(x) ((x>>16)&0xFF) /* # of 4k pages */ ++#define ESRAM_CTRL_ECCTHRESH(x) ((x>>8)&0xFF) /* ECC threshold */ ++#define ESRAM_CTRL_THRESHMSG_EN (0x00000080) /* ECC notification */ ++#define ESRAM_CTRL_ISAVAIL (0x00000010) /* ESRAM on die ? */ ++#define ESRAM_CTRL_BLOCK_MODE (0x00000008) /* Block mode enable */ ++#define ESRAM_CTRL_GLOBAL_LOCK (0x00000004) /* Global lock status */ ++#define ESRAM_CTRL_FLUSHDISABLE (0x00000002) /* Global flush/dis */ ++#define ESRAM_CTRL_SECDEC (0x00000001) /* ECC enable bit */ ++ ++/* PGBLOCK reg 0x82 - opcode 0x10/0x11 */ ++#define ESRAM_PGBLOCK_FLUSHEN (0x80000000) /* Block flush enable */ ++#define ESRAM_PGBLOCK_PGFLUSH (0x40000000) /* Flush the block */ ++#define ESRAM_PGBLOCK_DISABLE (0x20000000) /* Block mode disable */ ++#define ESRAM_PGBLOCK_ENABLE (0x10000000) /* Block mode enable */ ++#define ESRAM_PGBLOCK_LOCK (0x08000000) /* Block mode lock en */ ++#define ESRAM_PGBLOCK_INIT (0x04000000) /* Block init in prog */ ++#define ESRAM_PGBLOCK_BUSY (0x01000000) /* Block is enabled */ ++#define ESRAM_PGBLOCK_SYSADDR(x) (x&0x000000FF) ++ ++/* ESRAMPGCTRL - opcode 0x12/0x13 */ ++#define ESRAM_PAGE_FLUSH_PAGE_EN (0x80000000) /* S3 autoflush */ ++#define ESRAM_PAGE_FLUSH (0x40000000) /* Flush page to DRAM */ ++#define ESRAM_PAGE_DISABLE (0x20000000) /* page disable bit */ ++#define ESRAM_PAGE_EN (0x10000000) /* Page enable */ ++#define ESRAM_PAGE_LOCK (0x08000000) /* Page lock en */ ++#define ESRAM_PAGE_INITIALISING (0x04000000) /* Init in progress */ ++#define ESRAM_PAGE_BUSY (0x01000000) /* Page busy */ ++#define ESRAM_PAGE_MAP_SHIFT (12) /* Shift away 12 LSBs */ ++ ++/* Extra */ ++#define ESRAM_MAP_OP (0x01) ++#define ESRAM_UNMAP_OP (0x00) ++ ++/** ++ * struct esram_refname ++ * ++ * Structure to hold a linked list of names ++ */ ++struct esram_refname { ++ char name[KSYM_SYMBOL_LEN]; /* Name of mapping */ ++ struct list_head list; ++}; ++ ++/** ++ * struct esram_page ++ * ++ * Represents an eSRAM page in our linked list ++ */ ++struct esram_page { ++ ++ struct list_head list; /* List entry descriptor */ ++ struct list_head name_list; /* Linked list for name references */ ++ u32 id; /* Page ID */ ++ u32 phys_addr; /* Physial address of page */ ++ u32 refcount; /* Reference count */ ++ u32 vaddr; /* Virtual address of page */ ++ ++}; ++ ++/** ++ * struct intel_cln_esram_dev ++ * ++ * Structre to represent module state/data/etc ++ */ ++struct intel_cln_esram_dev{ ++ ++ /* Linux kernel structures */ ++ struct list_head page_used; /* Used pages */ ++ struct list_head page_free; /* Free pages */ ++ spinlock_t slock; /* Spinlock */ ++ struct platform_device *pldev; /* Platform device */ ++ ++ /* Actual data */ ++ struct esram_page * pages; ++ u8 cbuf[ESRAM_PAGE_SIZE]; ++ ++ /* Stats */ ++ u32 page_count; /* As reported by silicon */ ++ u32 page_disable_retries; /* Aggreate count on disable */ ++ u32 page_enable_retries; /* Aggregate spin count page enable */ ++ u32 page_free_ct; /* Free pages for mapping code section */ ++}; ++ ++static struct intel_cln_esram_dev esram_dev; ++ ++/* ++ * Kallsyms does not provide data addresses. To map important structures such as ++ * the idt and gdt, we need to frig the lookup with the below. Other entities ++ * can similarly be added. Note we map a page from the given address - anything ++ * larger will require additional code to handle ++ */ ++struct esram_symex { ++ char * name; ++ void * vaddr; ++ u32 size; ++}; ++ ++static struct esram_symex esram_symex[] = ++{ ++ { ++ .name = "idt_table", ++ .vaddr = &idt_table, ++ .size = ESRAM_PAGE_SIZE, ++ }, ++ { ++ .name = "gdt_page", ++ .vaddr = &gdt_page, ++ .size = ESRAM_PAGE_SIZE, ++ }, ++}; ++ ++/** ++ * intel_cln_esram_stat_show ++ * ++ * @param dev: pointer to device ++ * @param attr: attribute pointer ++ * @param buf: output buffer ++ * @return number of bytes successfully read ++ * ++ * Populates eSRAM state via /sys/device/intel-cln-esram.0/stat ++ */ ++static ssize_t intel_cln_esram_stat_show(struct device *dev, ++ struct device_attribute *attr, ++ char *buf) ++ ++{ ++ struct esram_page * epage = NULL; ++ int len = 0; ++ unsigned int count = PAGE_SIZE, size; ++ u32 pgpool = 0, ctrl = 0, pgblock = 0; ++ char * enabled = "enabled"; ++ char * disabled = "disabled"; ++ ++ /* Display page-pool relevant data */ ++ sb_read(SB_ID_ESRAM, ESRAM_CTRL_READ, ESRAM_PGPOOL_REG, &pgpool, 1); ++ size = snprintf(buf, count, ++ "esram-pgpool\t\t\t: 0x%08x\n" ++ "esram-pgpool.free\t\t: %u\n" ++ "esram-pgpool.flushing\t\t: %u\n", ++ pgpool, ESRAM_PGPOOL_PGBUSY(pgpool)+1, ++ ESRAM_PGPOOL_FLUSHING(pgpool) + 1); ++ len += size; ++ count -= size; ++ ++ /* Display ctrl reg - most of this is of interest */ ++ sb_read(SB_ID_ESRAM, ESRAM_CTRL_READ, ESRAM_CTRL_REG, &ctrl, 1); ++ size = snprintf(buf + len, count - len, ++ "esram-ctrl\t\t\t: 0x%08x\n" ++ "esram-ctrl.ecc\t\t\t: %s\n" ++ "esram-ctrl.ecc-theshold\t\t: %u\n" ++ "esram-ctrl.pages\t\t: %u\n" ++ "esram-ctrl.dram-flush-priorityi\t: %u\n", ++ ctrl, (ctrl & ESRAM_CTRL_SECDEC) ? enabled : disabled, ++ ESRAM_CTRL_ECCTHRESH(ctrl), ESRAM_CTRL_SIZE(ctrl)+1, ++ ESRAM_CTRL_FLUSHPRI(ctrl)); ++ len += size; ++ count -= size; ++ ++ /* Display block ctrl/stat - we should be !block mode */ ++ sb_read(SB_ID_ESRAM, ESRAM_CTRL_READ, ESRAM_PGBLOCK_REG, &pgblock, 1); ++ size = snprintf(buf + len, count - len, "esram-block\t\t\t: 0x%08x\n", ++ pgblock); ++ len += size; ++ count -= size; ++ ++ /* Print ECC status regs */ ++ ++ /* Print per-page info */ ++ size = snprintf(buf + len, count - len, ++ "free page\t\t\t: %u\nused page\t\t\t: %u\n" ++ "refresh \t\t\t: %ums\npage enable retries\t\t: %u\n" ++ "page disable retries\t: %u\n", ++ esram_dev.page_free_ct, ++ esram_dev.page_count-esram_dev.page_free_ct, ++ 0, ++ esram_dev.page_enable_retries, ++ esram_dev.page_disable_retries); ++ len += size; ++ count -= size; ++ ++ spin_lock(&esram_dev.slock); ++ if(!list_empty(&esram_dev.page_free)){ ++ ++ epage = list_first_entry(&esram_dev.page_free, struct esram_page, list); ++ size = snprintf(buf + len, count - len, ++ "ecc next page \t\t\t: %u\n",epage->id); ++ len += size; ++ count -= size; ++ ++ ++ } ++ spin_unlock(&esram_dev.slock); ++ ++ /* Return len indicate eof */ ++ return len; ++} ++ ++/** ++ * intel_cln_esram_map_show ++ * ++ * @param dev: pointer to device ++ * @param attr: attribute pointer ++ * @param buf: output buffer ++ * @return number of bytes successfully read ++ * ++ * Read back eSRAM mapped entries ++ */ ++static ssize_t ++intel_cln_esram_map_show(struct device *dev,struct device_attribute *attr, ++ char *buf) ++{ ++ struct esram_page * epage = NULL; ++ struct esram_refname * refname = NULL; ++ int len = 0, size = 0; ++ unsigned int count = PAGE_SIZE; ++ ++ spin_lock(&esram_dev.slock); ++ list_for_each_entry(epage, &esram_dev.page_used, list){ ++ /* Print references */ ++ list_for_each_entry(refname, &epage->name_list, list){ ++ size = snprintf(buf + len, count - len, ++ "%s ", refname->name); ++ len += size; ++ count -= size; ++ } ++ /* Print data */ ++ size += snprintf(buf + len, count - len, ++ "\n\tPage virt 0x%08x phys 0x%08x\n" ++ "\tRefcount %u\n", ++ epage->vaddr, epage->phys_addr, ++ epage->refcount); ++ len += size; ++ count -= size; ++ } ++ spin_unlock(&esram_dev.slock); ++ ++ /* Return len indicate eof */ ++ return len; ++} ++ ++/** ++ * intel_cln_esram_map_store ++ * ++ * @param dev: pointer to device ++ * @param attr: attribute pointer ++ * @param buf: input buffer ++ * @param size: size of input data ++ * @return number of bytes successfully written ++ * ++ * Function allows user-space to switch mappings on/off with a simple ++ * echo idt_table > /sys/devices/intel-cln-esram.0/map type command ++ */ ++static ssize_t ++intel_cln_esram_map_store(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t size) ++{ ++ ssize_t ret = 0; ++ char * sbuf = NULL; ++ unsigned long vaddr = 0, i = 0; ++ unsigned int count = PAGE_SIZE; ++ ++ if(count <= 1){ ++ return -EINVAL; ++ } ++ ++ /* Get input */ ++ sbuf = (char*)buf; ++ ++ /* Fixup entity to scrub spaces */ ++ while(sbuf < (buf + count)){ ++ if(*sbuf == ' ' || *sbuf == '\r' || *sbuf =='\n'){ ++ *sbuf = 0; ++ break; ++ } ++ sbuf++; ++ } ++ ++ /* Check to see if we are being asked to map a non-kallsyms addr */ ++ for(i = 0; i < sizeof(esram_symex)/sizeof(struct esram_symex); i++){ ++ if(strcmp(buf, esram_symex[i].name) == 0){ ++ ret = intel_cln_esram_map_range( ++ esram_symex[i].vaddr, ++ esram_symex[i].size, ++ esram_symex[i].name); ++ goto done; ++ } ++ } ++ ++ /* This path relies on kallsyms to provide name/address data */ ++ vaddr = kallsyms_lookup_name(buf); ++ if(vaddr == 0) ++ goto done; ++ ++ ret = intel_cln_esram_map_symbol((void*)vaddr); ++done: ++ if(ret == 0) ++ ret = (ssize_t)count; ++ return ret; ++} ++ ++static struct device_attribute dev_attr_stats = { ++ .attr = { ++ .name = "stats", ++ .mode = 0444, ++ }, ++ .show = intel_cln_esram_stat_show, ++}; ++ ++static struct device_attribute dev_attr_map = { ++ .attr = { ++ .name = "map", ++ .mode = 0644, ++ }, ++ .show = intel_cln_esram_map_show, ++ .store = intel_cln_esram_map_store, ++}; ++ ++static struct attribute *platform_attributes[] = { ++ &dev_attr_stats.attr, ++ &dev_attr_map.attr, ++ NULL, ++}; ++ ++static struct attribute_group esram_attrib_group = { ++ .attrs = platform_attributes ++}; ++ ++/****************************************************************************** ++ * eSRAM Core ++ ******************************************************************************/ ++ ++/** ++ * intel_cln_esram_page_busy ++ * ++ * @param epage: Pointer to the page descriptor ++ * @return boolean indicating whether or not a page is enabled ++ */ ++static int intel_cln_esram_page_busy(struct esram_page * epage, u8 lock) ++{ ++ u32 reg = 0; ++ ++ sb_read(SB_ID_ESRAM, ESRAM_PAGE_READ, epage->id, ®, lock); ++ return (reg&(ESRAM_PAGE_BUSY | ESRAM_PAGE_FLUSH | ESRAM_PAGE_DISABLE)); ++} ++ ++/** ++ * intel_cln_esram_fault ++ * ++ * Dump eSRAM registers and kernel panic ++ * Nothing else to do at this point ++ */ ++void intel_cln_esram_fault(struct esram_page * epage, u32 lineno) ++{ ++ u32 reg = 0, next = 0, prev = 0, prev_reg = 0; ++ u32 next_reg = 0, block = 0, ctrl = 0; ++ ++ pr_err("eSRAM: fault @ %s:%d\n", __FILE__, lineno); ++ sb_read(SB_ID_ESRAM, ESRAM_PAGE_READ, epage->id, ®, 1); ++ pr_err("read page %d state 0x%08x\n", epage->id, reg); ++ if(epage->id == 0){ ++ next = 1; prev = 127; ++ }else if(epage->id == 127){ ++ next = 0; prev = 126; ++ }else{ ++ next = epage->id+1; ++ prev = epage->id-1; ++ } ++ sb_read(SB_ID_ESRAM, ESRAM_PAGE_READ, next, &next_reg, 1); ++ sb_read(SB_ID_ESRAM, ESRAM_PAGE_READ, prev, &prev_reg, 1); ++ ++ /* Get state */ ++ sb_read(SB_ID_ESRAM, ESRAM_CTRL_READ, ESRAM_CTRL_REG, &ctrl, 1); ++ sb_read(SB_ID_ESRAM, ESRAM_CTRL_READ, ESRAM_PGBLOCK_REG, &block, 1); ++ ++ pr_err("eSRAM: CTRL 0x%08x block 0x%08x\n", ctrl, block); ++ pr_err("Prev page %d state 0x%08x Next page %d state 0x%08x\n" ++ , next, next_reg, prev, prev_reg); ++ BUG(); ++} ++ ++ ++/** ++ * intel_cln_esram_page_enable ++ * ++ * @param epage: struct esram_page carries data to program to register ++ * @param lock: Indicates whether to attain sb spinlock or not ++ * ++ * Enable an eSRAM page spinning for page to become ready. ++ */ ++static void intel_cln_esram_page_enable(struct esram_page *epage, u8 lock) ++{ ++ u32 ret = 0; ++ ++ /* Fault if we try to enable a disabled page */ ++ if(intel_cln_esram_page_busy(epage, lock)){ ++ intel_cln_esram_fault(epage, __LINE__); ++ } ++ ++ /* Program page mapping */ ++ sb_write(SB_ID_ESRAM, ESRAM_PAGE_WRITE, epage->id, ++ ESRAM_PAGE_FLUSH_PAGE_EN | ESRAM_PAGE_EN | ++ (epage->phys_addr>>ESRAM_PAGE_MAP_SHIFT), lock); ++ do { ++ /* Poll until page busy bit becomes true */ ++ ret = intel_cln_esram_page_busy(epage, lock); ++ ++ /* This branch should rarely if ever be true */ ++ if(unlikely(ret == 0)){ ++ esram_dev.page_enable_retries++; ++ } ++ ++ }while(ret == 0); ++} ++ ++/** ++ * intel_cln_esram_page_disable_sync ++ * ++ * @param epage: pointer to eSRAM page descriptor ++ * ++ * This function spins waiting for disable bit to clear, useful right after a ++ * disable/disable-flush command. Interrupts are enabled here, sleeping is OK ++ */ ++static void intel_cln_esram_page_disable_sync(struct esram_page * epage) ++{ ++ u32 ret = 0, retries = 0; ++ do { ++ /* Poll for busy bit clear */ ++ ret = intel_cln_esram_page_busy(epage, 1); ++ ++ /* This branch should rarely if ever be true */ ++ if(unlikely(ret)){ ++ esram_dev.page_disable_retries++; ++ retries++; ++ } ++ ++ if(retries == MAX_PAGE_RETRIES){ ++ intel_cln_esram_fault(epage, __LINE__); ++ } ++ }while(ret); ++} ++ ++/** ++ * intel_cln_esram_page_disable ++ * ++ * @param epage: struct esram_page carries data to program to register ++ * ++ * Disable the eSRAM page no flush. Interrupts are enabled here, sleeping is OK ++ */ ++static void intel_cln_esram_page_disable(struct esram_page *epage) ++{ ++ sb_write(SB_ID_ESRAM, ESRAM_PAGE_WRITE, epage->id, ++ ESRAM_PAGE_DISABLE, 1); ++ intel_cln_esram_page_disable_sync(epage); ++} ++ ++/** ++ * intel_cln_esram_page_flush_disable ++ * ++ * @param epage: struct esram_page carries data to program to register ++ * ++ * Disable the eSRAM page - with flush. Note the architecture will block access ++ * to the overlayed region until the flush has completed => irqs may be switched ++ * on during this operation. ++ */ ++static void intel_cln_esram_page_flush_disable(struct esram_page *epage) ++{ ++ ++ ++ /* Do flush */ ++ sb_write(SB_ID_ESRAM, ESRAM_PAGE_WRITE, epage->id, ++ ESRAM_PAGE_FLUSH | ESRAM_PAGE_DISABLE, 1); ++ ++ intel_cln_esram_page_disable_sync(epage); ++} ++ ++#if 0 ++/** ++ * intel_cln_esram_flush_disable_all ++ * ++ * Flushes and disables all enabled eSRAM pages ++ */ ++static void intel_cln_esram_page_flush_disable_all(void) ++{ ++ struct esram_page * epage = NULL; ++ ++ spin_lock(&esram_dev.slock); ++ list_for_each_entry(epage, &esram_dev.page_used, list){ ++ intel_cln_esram_page_flush_disable(epage); ++ } ++ spin_unlock(&esram_dev.slock); ++} ++#endif ++ ++/** ++ * intel_cln_esram_page_populate_atomic ++ * ++ * @param epage: Pointer to eSRAM page desciptor. ++ * @return 0 placeholder, later versions may return error ++ * ++ * Function takes the mappings given in epage and uses the values to populate ++ * an eSRAM page. The copy/enable/copy routine must be done atomically, since we ++ * may be doing a memcpy() of an ISR for example. ++ * For this reason we wrapper this entire call into a callback provided by ++ * side-band, which does a spin_lock_irqsave calls this function and then does ++ * a spin_lock_irqrestore - thus guaranteeing atomicity of the below code and ++ * respect for the locking strategy of the side-band driver ++ */ ++static int intel_cln_esram_page_populate_atomic(struct esram_page * epage) ++{ ++ unsigned long crz; ++ ++ /* Copy away */ ++ memcpy(&esram_dev.cbuf, (void*)epage->vaddr, ESRAM_PAGE_SIZE); ++ ++ /* If CR0.WP is true - flip it HSD # 4930660 */ ++ crz = read_cr0(); ++ if (crz & X86_CR0_WP){ ++ write_cr0(crz & (~X86_CR0_WP)); ++ } ++ ++ /* Disable NMI */ ++ outb(0x80, 0x70); ++ ++ /* Enable page mapping */ ++ intel_cln_esram_page_enable(epage, 0); ++ ++ /* Copy back - populating memory overlay */ ++ memcpy((void*)epage->vaddr, &esram_dev.cbuf, ESRAM_PAGE_SIZE); ++ ++ /* Re-enable NMI */ ++ outb(0x00, 0x70); ++ ++ /* Restore CR0.WP if appropriate HSD # 4930660 */ ++ if (crz & X86_CR0_WP){ ++ write_cr0(crz); ++ } ++ return 0; ++} ++ ++/** ++ * intel_cln_esram_page_populate ++ * ++ * @param epage: Pointer to eSRAM page desciptor. ++ * @return 0 on success < 0 on failure ++ * ++ * Populates the page. set_memory_rw/set_memory_ro require local irqs enabled. ++ * intel_cln_esram_page_populate_atomic - needs irqs switched off since memory ++ * can be inconsistent during the populate operation. Depopulate operations are ++ * architecturally guaranteed ++ */ ++static int intel_cln_esram_page_populate(struct esram_page * epage) ++{ ++ int flip_rw = 0, level = 0, ret = 0; ++ pte_t * pte = epage != NULL ? lookup_address(epage->vaddr, &level):NULL; ++ ++ if(unlikely(pte == NULL)){ ++ return -EINVAL; ++ } ++ ++ /* Determine if we need to set writable */ ++ flip_rw = !(pte_write(*pte)); ++ ++ /* Ensure memory is r/w - do so before spin_lock_irqsave */ ++ if(flip_rw){ ++ ret = set_memory_rw(epage->vaddr, 1); ++ if (ret != 0){ ++ pr_err("%s error during set_memory_rw = %d\n", ++ __func__, ret); ++ return ret; ++ } ++ } ++ ++ /* Force ECC update @ disable only */ ++ intel_cln_esram_page_enable(epage, 1); ++ intel_cln_esram_page_disable(epage); ++ ++ /* Enable and populate eSRAM page using callback in sb with irqs off */ ++ ret |= intel_cln_sb_runfn_lock( ++ (int (*)(void*))intel_cln_esram_page_populate_atomic,(void*)epage); ++ ++ /* If we set memory writable - restore previous state */ ++ if(flip_rw){ ++ ret |= set_memory_ro(epage->vaddr, 1); ++ if (ret != 0){ ++ pr_err("%s error during set_memory_ro = %d\n", ++ __func__, ret); ++ return ret; ++ } ++ } ++ ++ return ret; ++} ++/** ++ * intel_cln_esram_page_addref ++ * ++ * @param epage: eSRAM page descriptor ++ * @param name: Name of reference to add ++ * @return zero on success negative on error ++ * ++ */ ++static int intel_cln_esram_page_addref(struct esram_page * epage, char * name) ++{ ++ struct esram_refname * refname = NULL; ++ if(unlikely(epage == NULL || name == NULL)){ ++ return -EINVAL; ++ } ++ ++ refname = kzalloc(sizeof(struct esram_refname), GFP_KERNEL); ++ if(unlikely(refname == NULL)){ ++ return -ENOMEM; ++ } ++ ++ /* Add to list */ ++ strncpy(refname->name, name, sizeof(refname->name)); ++ list_add(&refname->list, &epage->name_list); ++ ++ /* Bump reference count */ ++ epage->refcount++; ++ return 0; ++} ++ ++ ++/** ++ * __intel_cln_esram_map_page ++ * ++ * @param page: Page to map ++ * @param name: Name of the mapping ++ * @return 0 success < 0 failure ++ * ++ * Overlay a vritual address rangne eeds to be aligned to a 4k address. ++ * Since multiple items can live in a 4k range, it is possible when calling ++ * into map_page() that a previous mapping will have already covered some or all ++ * of the mapping we want. This is not an error case, if the map function finds ++ * it is being asked to map a 4k range already mapped it returns 0, to indicate ++ * the mapping has suceeded i.e. it's already been mapped. This is logical if ++ * you think about it. In contrast being asked to unmap a region not mapped is ++ * clearly an error... ++ * ++ */ ++static int __intel_cln_esram_map_page(u32 vaddr, char * name) ++{ ++ int ret = 0; ++ struct esram_page * epage = NULL; ++ struct esram_refname * refname = NULL; ++ ++ if(unlikely(name == NULL)){ ++ return -EINVAL; ++ } ++ ++ if(unlikely(esram_dev.page_free_ct == 0)){ ++ return -ENOMEM; ++ } ++ ++ /* Verify if we have already mapped */ ++ list_for_each_entry(epage, &esram_dev.page_used, list){ ++ if(epage->vaddr == vaddr){ ++ ++ /* Page already mapped */ ++ list_for_each_entry(refname, &epage->name_list, list){ ++ if(strcmp(refname->name, name)==0){ ++ /* Page mapped at this name */ ++ return -EINVAL; ++ } ++ } ++ /* New symbol in previous mapping */ ++ return intel_cln_esram_page_addref(epage, name); ++ } ++ } ++ ++ /* Enumerate eSRAM page structure */ ++ epage = list_first_entry(&esram_dev.page_free, struct esram_page, list); ++ epage->phys_addr = virt_to_phys((void*)vaddr); ++ epage->vaddr = vaddr; ++ ret = intel_cln_esram_page_addref(epage, name); ++ if(unlikely(ret < 0)){ ++ return ret; ++ } ++ ++ /* Populate page */ ++ ret = intel_cln_esram_page_populate(epage); ++ ++ /* Move to used list */ ++ list_move(&epage->list, &esram_dev.page_used); ++ esram_dev.page_free_ct--; ++ ++ return ret; ++} ++ ++/** ++ * __intel_cln_esram_unmap_page ++ * ++ * @param page: Page to unmap ++ * @param name: Name of the mapping ++ * @return 0 success < 0 failure ++ * ++ * Unmap a previously mapped virutal address range. ++ * Must be 4k aligned ++ * ++ */ ++static int __intel_cln_esram_unmap_page(u32 vaddr, char * name) ++{ ++ u8 found = 0; ++ struct esram_page * epage = NULL; ++ struct esram_refname * refname = NULL; ++ ++ /* Find physical address */ ++ list_for_each_entry(epage, &esram_dev.page_used, list){ ++ if(epage->vaddr == vaddr){ ++ found = 1; ++ break; ++ } ++ } ++ ++ /* Bail out on error */ ++ if(found == 0){ ++ pr_err("0x%08x not mapped\n", vaddr); ++ return -EINVAL; ++ } ++ ++ /* Determine reference to delete */ ++ found = 0; ++ list_for_each_entry(refname, &epage->name_list, list){ ++ if(strcmp(refname->name,name)==0){ ++ found = 1; ++ break; ++ } ++ } ++ if(unlikely(found == 0)){ ++ pr_err("No mapping %s!\n", name); ++ return -EINVAL; ++ } ++ ++ /* Remove entry decrement reference count */ ++ list_del(&refname->list); ++ kfree(refname); ++ if(--epage->refcount > 0){ ++ return 0; ++ } ++ ++ /* Flush and disable page */ ++ intel_cln_esram_page_flush_disable(epage); ++ ++ /* Move to free list tail - scrub entries come from head */ ++ list_move_tail(&epage->list, &esram_dev.page_free); ++ esram_dev.page_free_ct++; ++ ++ return 0; ++} ++ ++/** ++ * ++ * __intel_cln_esram_page_op ++ * ++ * @param vaddr: Virtual address of symbol ++ * @param size: Size/length of symbol ++ * @param name: Name of mapping ++ * @param map: Boolean indicates whether to map or unmap the page ++ * @return 0 success < 0 failure ++ * ++ * This function maps/unmaps a pages/pages given at the given vaddr. If ++ * the extent of the symbol @ vaddr crosses a page boundary, then we map ++ * multiple pages. Other stuff inside the page, gets a performance boost 'for ++ * free'. Any other data in the page that crosses the physical page boundary ++ * will be partially mapped. ++ */ ++static int __intel_cln_esram_page_op(u32 vaddr, u32 size, char *name, u8 map) ++{ ++ unsigned long offset = 0, page_offset = 0; ++ u32 pages = size/ESRAM_PAGE_SIZE + ((size%ESRAM_PAGE_SIZE) ? 1 : 0); ++ int ret = 0; ++ ++ /* Compare required pages to available pages */ ++ if(map == ESRAM_MAP_OP){ ++ if(pages > esram_dev.page_free_ct) ++ return -ENOMEM; ++ }else{ ++ if(pages > esram_dev.page_count - esram_dev.page_free_ct) ++ return -ENOMEM; ++ } ++ ++ /* Align to 4k and iterate the mappings */ ++ vaddr = vaddr&ESRAM_PAGE_MASK; ++ while(size > 0){ ++ ++ /* Map the page */ ++ spin_lock(&esram_dev.slock); ++ if(map == ESRAM_MAP_OP){ ++ ret = __intel_cln_esram_map_page(vaddr, name); ++ ++ }else{ ++ ret = __intel_cln_esram_unmap_page(vaddr, name); ++ } ++ spin_unlock(&esram_dev.slock); ++ if(unlikely(ret != 0)){ ++ break; ++ } ++ ++ /* Calc appropriate offsets */ ++ page_offset = offset_in_page(vaddr); ++ if(page_offset + size > ESRAM_PAGE_SIZE){ ++ ++ offset = ESRAM_PAGE_SIZE - page_offset; ++ size -= offset; ++ vaddr += ESRAM_PAGE_SIZE; ++ ++ }else{ ++ size = 0; ++ } ++ } ++ ++ return ret; ++} ++ ++/****************************************************************************** ++ * eSRAM API ++ ******************************************************************************/ ++ ++/** ++ * intel_cln_esram_map_range ++ * ++ * @param vaddr: Virtual address to start mapping (must be 4k aligned) ++ * @param size: Size to map from ++ * @param mapname: Mapping name ++ * @return 0 success < 0 failure ++ * ++ * Map 4k increments at given address to eSRAM. ++ */ ++int intel_cln_esram_map_range(void * vaddr, u32 size, char * mapname) ++{ ++ if(size == 0 || mapname == NULL || vaddr == NULL){ ++ return -EINVAL; ++ } ++ return __intel_cln_esram_page_op((u32)vaddr, size, mapname, ESRAM_MAP_OP); ++} ++EXPORT_SYMBOL(intel_cln_esram_map_range); ++ ++/** ++ * intel_cln_esram_map_symbol ++ * ++ * @param vaddr: Virtual address of the symbol ++ * @return 0 success < 0 failure ++ * ++ * Maps a series of 4k chunks starting at vaddr&0xFFFFF000. vaddr shall be a ++ * kernel text section symbol (kernel or loaded module) ++ * ++ * We get the size of the symbol from kallsyms. We guarantee to map the entire ++ * size of the symbol - plus whatever padding is necessary to get alignment to ++ * eSRAM_PAGE_SIZE ++ * Other stuff inside the mapped pages will get a performance boost 'for free'. ++ * If this free boost is not what you want then ++ * ++ * 1. Align to 4k ++ * 2. Pad to 4k ++ * 3. Call intel_cln_esram_map_range() ++ */ ++int intel_cln_esram_map_symbol(void * vaddr) ++{ ++ long unsigned int size = 0, offset = 0; ++ char symname[KSYM_SYMBOL_LEN]; ++ ++ kallsyms_lookup_size_offset((long unsigned int)vaddr, &size, &offset); ++ if(size == 0){ ++ return -EINVAL; ++ } ++ sprint_symbol(symname, (u32)vaddr); ++ ++ return __intel_cln_esram_page_op((u32)vaddr, size, symname, 1); ++} ++EXPORT_SYMBOL(intel_cln_esram_map_symbol); ++ ++/****************************************************************************** ++ * Module/PowerManagement hooks ++ ******************************************************************************/ ++ ++/** ++ * intel_cln_esram_suspend ++ * ++ * @param pdev: Platform device structure (unused) ++ * @param pm: Power managment descriptor ++ * @return 0 success < 0 failure ++ * ++ * For each enabled page - flush to DRAM and disable eSRAM page. ++ * For each 4k region the architecture guarantees atomicity of flush/disable. ++ * Hence any memory transactions to the affected region will stall until ++ * flush/disable completes - hence interrupts are left on. ++ */ ++static int intel_cln_esram_suspend(struct device * pdev) ++{ ++ /* Flush and disable of eSRAM pages is carried out automatically */ ++ return 0; ++} ++ ++/** ++ * intel_cln_esram_resume ++ * ++ * @param pm: Power management descriptor ++ * @return 0 success < 0 failure ++ * ++ * Runs after resume_noirq. Switches pages back to ro, if appropriate. We do ++ * this here since interrupts will be on, as required by the function ++ * set_memory_ro. If it were possible to set memory ro in resume_noirq we would ++ * do it there instead ++ */ ++static int intel_cln_esram_resume(struct device * pdev) ++{ ++ struct esram_page * epage = NULL; ++ int ret = 0; ++ ++ list_for_each_entry(epage, &esram_dev.page_used, list){ ++ ret |= intel_cln_esram_page_populate(epage); ++ } ++ ++ return ret; ++} ++ ++ ++/** ++ * intel_cln_esram_probe ++ * ++ * @param pdev: Platform device ++ * @return 0 success < 0 failure ++ * ++ * Callback from platform sub-system to probe ++ * ++ * This driver manages eSRAM on a per-page basis. Therefore if we find block ++ * mode is enabled, or any global, block-level or page-level locks are in place ++ * at module initialisation time - we bail out. ++ */ ++static int intel_cln_esram_probe(struct platform_device * pdev) ++{ ++ int ret = 0; ++ u32 block = 0, ctrl = 0, i = 0, pgstat = 0; ++ ++ memset(&esram_dev, 0x00, sizeof(esram_dev)); ++ INIT_LIST_HEAD(&esram_dev.page_used); ++ INIT_LIST_HEAD(&esram_dev.page_free); ++ spin_lock_init(&esram_dev.slock); ++ esram_dev.page_free_ct = 0; ++ ++ /* Ensure block mode disabled */ ++ block = ESRAM_PGBLOCK_DISABLE; ++ sb_write(SB_ID_ESRAM, ESRAM_CTRL_WRITE, ESRAM_PGBLOCK_REG, block, 1); ++ ++ /* Get state */ ++ sb_read(SB_ID_ESRAM, ESRAM_CTRL_READ, ESRAM_CTRL_REG, &ctrl, 1); ++ sb_read(SB_ID_ESRAM, ESRAM_CTRL_READ, ESRAM_PGBLOCK_REG, &block, 1); ++ ++ /* Verify state is good to go */ ++ if (ctrl & ESRAM_CTRL_GLOBAL_LOCK){ ++ pr_err ("eSRAM: global lock @ 0x%08x\n", ctrl); ++ return -ENODEV; ++ } ++ ++ if (block & (ESRAM_PGBLOCK_LOCK | ESRAM_PGBLOCK_ENABLE)){ ++ pr_err ("eSRAM: lock @ 0x%08x\n", block); ++ return -ENODEV; ++ } ++ pr_info("eSRAM: CTRL 0x%08x block 0x%08x\n", ctrl, block); ++ ++ /* Calculate # of pages silicon supports */ ++ esram_dev.page_count = ESRAM_CTRL_SIZE(ctrl) + 1; ++ esram_dev.page_free_ct = esram_dev.page_count; ++ pr_info("eSRAM: pages %d\n", esram_dev.page_free_ct); ++ ++ if(esram_dev.page_free_ct <= 1){ ++ pr_err("Too few pages reported by eSRAM sub-system\n"); ++ return -ENOMEM; ++ } ++ ++ /* Allocate an appropriate number of pages */ ++ esram_dev.pages = kzalloc(esram_dev.page_count * ++ sizeof(struct esram_page), GFP_KERNEL); ++ if (esram_dev.pages == NULL){ ++ return -ENOMEM; ++ } ++ ++ /* Initialise list of free pages, explicitely disable as we go */ ++ for(i = 0; i < esram_dev.page_count; i++){ ++ INIT_LIST_HEAD(&esram_dev.pages[i].name_list); ++ esram_dev.pages[i].id = i; ++ ++ /* Read & verify page state */ ++ sb_read(SB_ID_ESRAM, ESRAM_PAGE_READ, i, &pgstat, 1); ++ if(pgstat & (ESRAM_PAGE_BUSY | ESRAM_PAGE_LOCK)){ ++ pr_err("eSRAM: page %d state 0x%08x err\n", i, pgstat); ++ ret = -ENODEV; ++ goto err; ++ } ++ ++ list_add(&esram_dev.pages[i].list, &esram_dev.page_free); ++ } ++ ++ ret = sysfs_create_group(&pdev->dev.kobj, &esram_attrib_group); ++ if (ret) ++ goto err; ++ ++ return 0; ++err: ++ kfree(esram_dev.pages); ++ return ret; ++} ++ ++/* ++ * Power management operations ++ */ ++static const struct dev_pm_ops intel_cln_esram_pm_ops = { ++ .suspend = intel_cln_esram_suspend, ++ .resume = intel_cln_esram_resume, ++}; ++ ++/* ++ * Platform structures useful for interface to PM subsystem ++ */ ++static struct platform_driver intel_cln_esram_driver = { ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ .pm = &intel_cln_esram_pm_ops, ++ }, ++ .probe = intel_cln_esram_probe, ++}; ++ ++module_platform_driver(intel_cln_esram_driver); ++ ++MODULE_AUTHOR("Bryan O'Donoghue <bryan.odonoghue@linux.intel.com>"); ++MODULE_DESCRIPTION("Intel Clanton eSRAM overlay/ECC-scrub driver"); ++MODULE_LICENSE("Dual BSD/GPL"); ++ +diff --git a/drivers/platform/x86/quark/intel_cln_esram.h b/drivers/platform/x86/quark/intel_cln_esram.h +new file mode 100644 +index 0000000..af6156a +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_esram.h +@@ -0,0 +1,107 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton eSRAM overlay driver ++ * ++ * eSRAM is an on-chip fast access SRAM. ++ * ++ * This driver provides the ability to map a kallsyms derived symbol of ++ * arbitrary length or a struct page entitiy. ++ * A proc interface is provided to allow map/unmap of kernel structures, without ++ * having to use the API from your code directly. ++ * ++ * Example: ++ * echo ehci_irq on > /proc/driver/esram/map ++ * echo ehci_irq off > /proc/driver/esram/map ++ * ++ * An API is provided to allow for mapping of a) kernel symbols or b) pages. ++ * eSRAM requires 4k physically aligned addresses to work - so a struct page ++ * fits neatly into this. ++ * ++ * To populte eSRAM we must copy data to a temporary buffer, overlay and ++ * then copy data back to the eSRAM region. ++ * ++ * When entering S3 - we must save eSRAM state to DRAM, and similarly on restore ++ * to S0 we must repopulate eSRAM ++ * ++ * Author : Bryan O'Donoghue <bryan.odonoghue@linux.intel.com> ++ */ ++#ifndef __INTEL_CLN_ESRAM_H__ ++#define __INTEL_CLN_ESRAM_H__ ++ ++#include <linux/module.h> ++ ++/* Basic size of an eSRAM page */ ++#define INTEL_CLN_ESRAM_PAGE_SIZE (0x1000) ++#define INTEL_CLN_ESRAM_PAGE_COUNT (0x80) ++/** ++ * intel_cln_esram_map_range ++ * ++ * @param vaddr: Virtual address to start mapping (must be 4k aligned) ++ * @param size: Size to map from ++ * @param mapname: Mapping name ++ * @return 0 success < 0 failure ++ * ++ * Map 4k increments at given address to eSRAM. ++ */ ++int intel_cln_esram_map_range(void * vaddr, u32 size, char * mapname); ++ ++/** ++ * intel_cln_esram_unmap_range ++ * ++ * @param vaddr: The virtual address to unmap ++ * @return 0 success < 0 failure ++ * ++ * Logical corollary of esram_map_page ++ */ ++int intel_cln_esram_unmap_range(void * vaddr, u32 size, char * mapname); ++ ++/** ++ * intel_cln_esram_map_symbol ++ * ++ * @param vaddr: Virtual address of the symbol ++ * @return 0 success < 0 failure ++ * ++ * Maps a series of 4k chunks starting at vaddr&0xFFFFF000. vaddr shall be a ++ * kernel text section symbol (kernel or loaded module) ++ * ++ * We get the size of the symbol from kallsyms. We guarantee to map the entire ++ * size of the symbol - plus whatever padding is necessary to get alignment to ++ * eSRAM_PAGE_SIZE ++ * Other stuff inside the mapped pages will get a performance boost 'for free'. ++ * If this free boost is not what you want then ++ * 1. Align to 4k ++ * 2. Pad to 4k ++ * 3. Call intel_cln_esram_map_range() ++ */ ++int intel_cln_esram_map_symbol(void * vaddr); ++ ++/** ++ * intel_cln_esram_unmap_symbol ++ * ++ * @param vaddr: Virtual address of the symbol ++ * @return 0 success < 0 failure ++ * ++ * Logical corollary to intel_cln_esram_map_symbol ++ * Undoes any mapping of pages starting at sym for sym's size ++ */ ++int intel_cln_esram_unmap_symbol(void * vaddr); ++ ++#endif /* __INTEL_CLN_ESRAM_H__ */ +diff --git a/drivers/platform/x86/quark/intel_cln_esram_test.c b/drivers/platform/x86/quark/intel_cln_esram_test.c +new file mode 100644 +index 0000000..3d0573d +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_esram_test.c +@@ -0,0 +1,602 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/** ++ * intel_cln_esram_test.c ++ * ++ * Simple test module to provide test cases for ITS integration ++ * ++ */ ++#include <linux/cdev.h> ++#include <linux/crc32.h> ++#include <linux/crc32c.h> ++#include <linux/delay.h> ++#include <linux/device.h> ++#include <linux/fs.h> ++#include <linux/intel_cln_sb.h> ++#include <linux/kallsyms.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/printk.h> ++#include <linux/slab.h> ++ ++#include "intel_cln_esram.h" ++#include "intel_cln_esram_test.h" ++ ++#define DRIVER_NAME "intel_cln_esram_test" ++ ++/** ++ * struct intel_cln_esram_dev ++ * ++ * Structre to represent module state/data/etc ++ */ ++struct intel_cln_esram_test_dev{ ++ unsigned int opened; ++ struct platform_device *pldev; /* Platform device */ ++ struct cdev cdev; ++ struct mutex open_lock; ++ char * pdata; ++ u32 size; ++}; ++ ++static struct intel_cln_esram_test_dev esram_test_dev; ++static struct class *esram_test_class; ++static DEFINE_MUTEX(esram_test_mutex); ++static int esram_test_major; ++static char * name = "testmap"; ++ ++/****************************************************************************** ++ * eSRAM BIST ++ ******************************************************************************/ ++ ++static int crc_cache = 0; ++ ++unsigned long long tsc_delta(unsigned long long first, unsigned long long end) ++{ ++ if (first < end) ++ return end - first; ++ else ++ return (ULLONG_MAX - first) + end; ++} ++ ++ ++/** ++ * intel_cln_crctest ++ * ++ * Do a CRC32 of the specified region. Return the time taken in jiffies ++ */ ++static unsigned long long intel_cln_crctest(char * pdata, u32 crcsize) ++{ ++ unsigned long long j1 = 0, j2 = 0; ++ ++ rdtscll(j1); ++ ++ /* Flush LMT cache to introduce cache miss to our test */ ++ __asm__ __volatile__("wbinvd\n"); ++ crc32(0, pdata, crcsize); ++ ++ rdtscll(j2); ++ ++ return tsc_delta(j1, j2); ++} ++ ++#ifdef __DEBUG__ ++#define bist_err(x){\ ++ pr_err("eSRAM bist err line %d errno %d\n", (__LINE__-2), x);\ ++ return x;\ ++} ++#else ++#define bist_err(x){\ ++ return x;\ ++} ++#endif ++/** ++ * intel_cln_esram_perpage_overlay ++ * ++ * Maps to integration test spec ID CLN.F.SW.APP.eSRAM.0 ++ */ ++int intel_cln_esram_test_perpage_overlay(void) ++{ ++ ++ int ret = 0; ++ u32 idx = 0, size = INTEL_CLN_ESRAM_PAGE_SIZE; ++ ++ /* Set a known state */ ++ for(idx = 0; idx < size; idx += sizeof(u32)){ ++ *((u32*)&esram_test_dev.pdata[idx]) = idx; ++ } ++ ++ ++ /* Basic test of full range of memory */ ++ ret = intel_cln_esram_map_range(esram_test_dev.pdata, size, name); ++ if(ret){ ++ bist_err(ret); ++ } ++ for(idx = 0; idx < size; idx += sizeof(u32)){ ++ if(*((u32*)&esram_test_dev.pdata[idx]) != idx){ ++ pr_err("Entry %d is 0x%08x require 0x%08x", ++ idx, esram_test_dev.pdata[idx], idx); ++ bist_err(-EIO); ++ } ++ } ++ ++#if 0 ++ ret = intel_cln_esram_unmap_range(esram_test_dev.pdata, size, name); ++ if(ret){ ++ bist_err(ret); ++ } ++#endif ++ return 0; ++} ++ ++/** ++ * intel_cln_esram_test_pageref_count ++ * ++ * Ensure page reference couting works as expected ++ */ ++int intel_cln_esram_test_pagref_count(void) ++{ ++ u32 size = INTEL_CLN_ESRAM_PAGE_SIZE; ++ int ret = 0; ++ ++ return 0; ++ /* Map a page */ ++ ret = intel_cln_esram_map_range(esram_test_dev.pdata, size, name); ++ if(ret){ ++ bist_err(ret); ++ } ++ ++ /* Map a second time - and verify mapping fails */ ++ ret = intel_cln_esram_map_range(esram_test_dev.pdata, size, name); ++ if(ret == 0){ ++ bist_err(-EFAULT); ++ } ++ ++#if 0 ++ /* Unmap - OK */ ++ ret = intel_cln_esram_unmap_range(esram_test_dev.pdata, size, name); ++ if(ret){ ++ bist_err(ret); ++ } ++ ++ /* Verify second unmap operation fails */ ++ ret = intel_cln_esram_unmap_range(esram_test_dev.pdata, size, name); ++ if(ret == 0){ ++ bist_err(-EFAULT); ++ } ++#endif ++ return 0; ++} ++ ++extern uint32_t get_crc32table_le(void); ++ ++/** ++ * intel_cln_esram_test_contig_perfmetric ++ * ++ * Do a CRC16 for a contigous area of memory ++ * Map contigous area and get a CRC16 ++ * ++ * Ensure overlayed data takes less time than regular unoverlayed DRAM ++ */ ++int intel_cln_esram_test_contig_perfmetric(void) ++{ ++ u32 crcsize = 0x60000; ++ unsigned long long crc32_fullmap = 0, crc32_fullunmap = 0; ++ uint32_t crc32table_le = kallsyms_lookup_name("crc32table_le"); ++ int ret = 0; ++ ++ if (crc32table_le == 0){ ++ pr_err("%s unable to fine symbol crc32table_le\n", __func__); ++ return -ENODEV; ++ } ++ ++ /* Get raw data metric */ ++ crc_cache = 1; ++ crc32_fullunmap = intel_cln_crctest(esram_test_dev.pdata, crcsize); ++ ++ /* Map CRC16 symbol (algorithm) + code (data) */ ++ ret = intel_cln_esram_map_symbol(crc32_le); ++ if(ret){ ++ bist_err(ret); ++ } ++ ret = intel_cln_esram_map_symbol((void*)crc32table_le); ++ if(ret){ ++ bist_err(ret); ++ } ++ ++ /* Map test data */ ++ ret = intel_cln_esram_map_range(esram_test_dev.pdata, crcsize, name); ++ if(ret){ ++ bist_err(ret); ++ } ++ ++ /* Get metric */ ++ crc_cache = 1; ++ crc32_fullmap = intel_cln_crctest(esram_test_dev.pdata, crcsize); ++#if 0 ++ /* Tidy up */ ++ ret = intel_cln_esram_unmap_range(esram_test_dev.pdata, crcsize, name); ++ if(ret){ ++ bist_err(ret); ++ } ++ ret = intel_cln_esram_unmap_range(((void*)crc32_table), ++ sizeof(crc32_table), name); ++ if(ret){ ++ bist_err(ret); ++ } ++ ret = intel_cln_esram_unmap_symbol(crc32); ++ if(ret){ ++ bist_err(ret); ++ } ++#endif ++ pr_info("%s did crctest - mapped - in %llu ticks\n", __func__, crc32_fullmap); ++ pr_info("%s mapped count %llu unmapped %llu\n", ++ __func__, crc32_fullmap, crc32_fullunmap); ++ return crc32_fullmap < crc32_fullunmap; ++} ++ ++/** ++ * intel_cln_esram_test_kernel_codemap ++ * ++ * Maps some kernel code - a data section and then calls the code contained ++ * therein. Proves out the running overlayed eSRAM works ++ */ ++int intel_cln_esram_test_kernel_codemap(void) ++{ ++#if 0 ++ int ret = intel_cln_esram_map_symbol(msleep); ++ if(ret){ ++ printk(KERN_ERR "%s map symbol msleep fail\n", __FUNCTION__); ++ bist_err(ret); ++ } ++ ++ /* run the mapped code */ ++ msleep(1); ++ ++ /* unmap */ ++ ret = intel_cln_esram_unmap_symbol(msleep); ++ if(ret){ ++ printk(KERN_ERR "%s unmap symbol msleep fail\n", __FUNCTION__); ++ bist_err(ret); ++ } ++#endif ++ return 0; ++} ++ ++/** ++ * intel_cln_esram_test_kernel_datamap ++ * ++ * Tests mapping/unmapping of a kernel data structure ++ */ ++int intel_cln_esram_test_kernel_datamap(void) ++{ ++#if 0 ++ unsigned long jtag = 0; ++ unsigned long ctrl = 0; ++ ++ /* Map the interrupt descriptor table */ ++ int ret = intel_cln_esram_map_range(idt_table, INTEL_CLN_ESRAM_PAGE_SIZE, name); ++ if(ret){ ++ bist_err(ret); ++ } ++ ++ jtag = jiffies; ++ /* Wait for jiffies to tick or timeout to occur (failure) */ ++ while(jtag == jiffies){ ++ ctrl++; ++ } ++ ++ /* unmap */ ++ ret = intel_cln_esram_unmap_range(idt_table, INTEL_CLN_ESRAM_PAGE_SIZE, name); ++ if(ret){ ++ bist_err(ret); ++ } ++#endif ++ return 0; ++} ++ ++/** ++ * intel_cln_esram_test_sub_unsub ++ * ++ * Subscribe and unsubscribe 100% of available eSRAM ++ */ ++int intel_cln_esram_test_sub_unsub(void) ++{ ++ int ret = 0; ++ u32 idx = 0, size = INTEL_CLN_ESRAM_PAGE_SIZE * INTEL_CLN_ESRAM_PAGE_COUNT; ++ ++ /* Set a known state */ ++ for(idx = 0; idx < size; idx += sizeof(u32)){ ++ *((u32*)&esram_test_dev.pdata[idx]) = idx; ++ } ++ ++ /* Basic test of full range of memory */ ++ ret = intel_cln_esram_map_range(esram_test_dev.pdata, size, name); ++ if(ret){ ++ bist_err(ret); ++ } ++ for(idx = 0; idx < size; idx += sizeof(u32)){ ++ if(*((u32*)&esram_test_dev.pdata[idx]) != idx){ ++ pr_err("Entry %d is 0x%08x require 0x%08x", ++ idx, esram_test_dev.pdata[idx], idx); ++ bist_err(-EIO); ++ } ++ } ++#if 0 ++ ret = intel_cln_esram_unmap_range(esram_test_dev.pdata, size, name); ++ if(ret){ ++ bist_err(ret); ++ } ++#endif ++ return 0; ++} ++ ++/** ++ * intel_cln_esram_test_over_sub ++ * ++ * Test oversubscription of eSRAM ++ */ ++int intel_cln_esram_test_over_sub(void) ++{ ++ int ret = 0; ++ u32 size = INTEL_CLN_ESRAM_PAGE_SIZE * (INTEL_CLN_ESRAM_PAGE_COUNT + 1); ++ ++ /* Over subscribe should fail */ ++ ret = intel_cln_esram_map_range(esram_test_dev.pdata, size, name); ++ if(ret == 0){ ++ //intel_cln_esram_unmap_range(esram_test_dev.pdata, size, name); ++ bist_err(-EFAULT); ++ } ++ return 0; ++} ++ ++/* ++ * File ops ++ */ ++static long esram_test_ioctl(struct file *file, unsigned int cmd, ++ unsigned long arg) ++{ ++ int ret = -EINVAL; ++ ++ cmd -= CLN_ESRAM_IOCTL_BASE; ++ switch (cmd) { ++ case CLN_F_SW_APP_ESRAM_0: ++ /* Per page overlay */ ++ ret = intel_cln_esram_test_perpage_overlay(); ++ break; ++ ++ case CLN_F_SW_APP_ESRAM_1: ++ /* Verify page reference counting */ ++ ret = intel_cln_esram_test_pagref_count(); ++ break; ++ ++ case CLN_F_SW_APP_ESRAM_2: ++ /* Performance metric or overlay contig RAM */ ++ ret = intel_cln_esram_test_contig_perfmetric(); ++ if (ret == 1) ++ ret = 0; ++ break; ++ ++ case CLN_F_SW_APP_ESRAM_3: ++ /* Verify mapping of kernel code section */ ++ /* Covered by test #2 */ ++ ret = 0; //intel_cln_esram_test_kernel_codemap(); ++ break; ++ ++ case CLN_F_SW_APP_ESRAM_4: ++ /* Verify mapping of kernel data section (IDT) */ ++ /* Covered by test #2 */ ++ ret = 0; //intel_cln_esram_test_kernel_datamap(); ++ break; ++ ++ case CLN_F_SW_APP_ESRAM_5: ++ /* Complete subscribe/unsubscribe eSRAM */ ++ ret = intel_cln_esram_test_sub_unsub(); ++ break; ++ ++ case CLN_F_SW_APP_ESRAM_6: ++ /* Over subscribe eSRAM */ ++ ret = intel_cln_esram_test_over_sub(); ++ break; ++ ++ default: ++ break; ++ } ++ ++ return ret; ++} ++ ++static int esram_test_open(struct inode *inode, struct file *file) ++{ ++ mutex_lock(&esram_test_mutex); ++ nonseekable_open(inode, file); ++ ++ if (mutex_lock_interruptible(&esram_test_dev.open_lock)) { ++ mutex_unlock(&esram_test_mutex); ++ return -ERESTARTSYS; ++ } ++ ++ if (esram_test_dev.opened) { ++ mutex_unlock(&esram_test_dev.open_lock); ++ mutex_unlock(&esram_test_mutex); ++ return -EINVAL; ++ } ++ ++ esram_test_dev.opened++; ++ mutex_unlock(&esram_test_dev.open_lock); ++ mutex_unlock(&esram_test_mutex); ++ ++ return 0; ++} ++ ++static int esram_test_release(struct inode *inode, struct file *file) ++{ ++ mutex_lock(&esram_test_dev.open_lock); ++ esram_test_dev.opened = 0; ++ mutex_unlock(&esram_test_dev.open_lock); ++ ++ return 0; ++} ++ ++static const struct file_operations esram_test_file_ops = { ++ .open = esram_test_open, ++ .release = esram_test_release, ++ .unlocked_ioctl = esram_test_ioctl, ++ .llseek = no_llseek, ++}; ++ ++ ++/** ++ * intel_cln_esram_test_probe ++ * ++ * @param pdev: Platform device ++ * @return 0 success < 0 failure ++ * ++ * Callback from platform sub-system to probe ++ * ++ * This driver manages eSRAM on a per-page basis. Therefore if we find block ++ * mode is enabled, or any global, block-level or page-level locks are in place ++ * at module initialisation time - we bail out. ++ */ ++static int intel_cln_esram_test_probe(struct platform_device * pdev) ++{ ++ int retval = 0; ++ unsigned int minor = 0; ++ ++ esram_test_dev.size = INTEL_CLN_ESRAM_PAGE_COUNT * INTEL_CLN_ESRAM_PAGE_SIZE; ++ ++ /* Get memory */ ++ esram_test_dev.pdata = kzalloc(esram_test_dev.size, GFP_KERNEL); ++ if(unlikely(esram_test_dev.pdata == NULL)){ ++ pr_err("Can't allocate %d bytes\n", esram_test_dev.size); ++ return -ENOMEM; ++ } ++ ++ mutex_init(&esram_test_dev.open_lock); ++ cdev_init(&esram_test_dev.cdev, &esram_test_file_ops); ++ esram_test_dev.cdev.owner = THIS_MODULE; ++ ++ retval = cdev_add(&esram_test_dev.cdev, MKDEV(esram_test_major, minor), 1); ++ if (retval) { ++ printk(KERN_ERR "chardev registration failed\n"); ++ kfree(esram_test_dev.pdata); ++ return -EINVAL; ++ } ++ if (IS_ERR(device_create(esram_test_class, NULL, ++ MKDEV(esram_test_major, minor), NULL, ++ "esramtest%u", minor))){ ++ dev_err(&pdev->dev, "can't create device\n"); ++ kfree(esram_test_dev.pdata); ++ return -EINVAL; ++ } ++ printk(KERN_INFO "%s/%s/%s complete OK !!\n", __FUNCTION__, __DATE__,__TIME__); ++ return 0; ++ ++} ++ ++/** ++ * intel_cln_esram_remove ++ * ++ * @return 0 success < 0 failure ++ * ++ * Removes a platform device ++ */ ++static int intel_cln_esram_test_remove(struct platform_device * pdev) ++{ ++ unsigned int minor = MINOR(esram_test_dev.cdev.dev); ++ ++ device_destroy(esram_test_class, MKDEV(esram_test_major, minor)); ++ cdev_del(&esram_test_dev.cdev); ++ kfree(esram_test_dev.pdata); ++ ++ return 0; ++} ++ ++/* ++ * Platform structures useful for interface to PM subsystem ++ */ ++static struct platform_driver intel_cln_esram_test_driver = { ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++ .remove = intel_cln_esram_test_remove, ++}; ++ ++/** ++ * intel_cln_esram_init ++ * ++ * @return 0 success < 0 failure ++ * ++ * Module entry point ++ */ ++static int __init intel_cln_esram_test_init(void) ++{ ++ int retval = 0; ++ dev_t dev; ++ ++ esram_test_class = class_create(THIS_MODULE,"cln_esram_test"); ++ if (IS_ERR(esram_test_class)) { ++ retval = PTR_ERR(esram_test_class); ++ printk(KERN_ERR "esram_test: can't register earam_test class\n"); ++ goto err; ++ } ++ ++ retval = alloc_chrdev_region(&dev, 0, 1, "esram_test"); ++ if (retval) { ++ printk(KERN_ERR "earam_test: can't register character device\n"); ++ goto err_class; ++ } ++ esram_test_major = MAJOR(dev); ++ ++ memset(&esram_test_dev, 0x00, sizeof(esram_test_dev)); ++ esram_test_dev.pldev = platform_create_bundle( ++ &intel_cln_esram_test_driver, intel_cln_esram_test_probe, NULL, 0, NULL, 0); ++ ++ if(IS_ERR(esram_test_dev.pldev)){ ++ printk(KERN_ERR "platform_create_bundle fail!\n"); ++ retval = PTR_ERR(esram_test_dev.pldev); ++ goto err_class; ++ } ++ ++ return 0; ++ ++err_class: ++ class_destroy(esram_test_class); ++err: ++ return retval; ++} ++ ++/** ++ * intel_cln_esram_exit ++ * ++ * Module exit ++ */ ++static void __exit intel_cln_esram_test_exit(void) ++{ ++ platform_device_unregister(esram_test_dev.pldev); ++ platform_driver_unregister(&intel_cln_esram_test_driver); ++} ++ ++MODULE_AUTHOR("Bryan O'Donoghue <bryan.odonoghue@linux.intel.com>"); ++MODULE_DESCRIPTION("Intel Clanton eSRAM ITS driver"); ++MODULE_LICENSE("Dual BSD/GPL"); ++ ++module_init(intel_cln_esram_test_init); ++module_exit(intel_cln_esram_test_exit); +diff --git a/drivers/platform/x86/quark/intel_cln_esram_test.h b/drivers/platform/x86/quark/intel_cln_esram_test.h +new file mode 100644 +index 0000000..98e4546 +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_esram_test.h +@@ -0,0 +1,43 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/** ++ * intel_cln_esram_test.h ++ * ++ * Define integers for ioctl operation ++ * ++ * Author : Bryan O'Donoghue <bryan.odonoghue@linux.intel.com> ++ */ ++ ++#ifndef __INTEL_CLN_ESRAM_TEST_H__ ++#define __INTEL_CLN_ESRAM_TEST_H__ ++ ++#define CLN_ESRAM_IOCTL_BASE 255 ++#define CLN_F_SW_APP_ESRAM_0 0x00000000 ++#define CLN_F_SW_APP_ESRAM_1 0x00000001 ++#define CLN_F_SW_APP_ESRAM_2 0x00000002 ++#define CLN_F_SW_APP_ESRAM_3 0x00000003 ++#define CLN_F_SW_APP_ESRAM_4 0x00000004 ++#define CLN_F_SW_APP_ESRAM_5 0x00000005 ++#define CLN_F_SW_APP_ESRAM_6 0x00000006 ++#define CLN_F_SW_APP_ESRAM_7 0x00000007 ++#define CLN_F_SW_APP_ESRAM_8 0x00000008 ++ ++#endif /* __INTEL_CLN_ESRAM_TEST_H__ */ ++ +diff --git a/drivers/platform/x86/quark/intel_cln_imr.c b/drivers/platform/x86/quark/intel_cln_imr.c +new file mode 100644 +index 0000000..b8259a6 +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_imr.c +@@ -0,0 +1,584 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton IMR driver ++ * ++ * IMR stand for Insolate Memory Region, supported by Clanton SoC. ++ * ++ * A total number of 8 IMRs have implemented by Clanton SoC, ++ * Some IMRs might be already occupied by BIOS or Linux during ++ * booting time. ++ * ++ * A user can cat /sys/devices/platform/intel-cln-imr/status for current IMR ++ * status ++ * ++ * To allocate an IMR addresses must be alinged to 1k ++ * ++ * The IMR alloc API will locate the next available IMR slot set up ++ * with input memory region, then apply the input access right masks ++ * ++ * The IMR can be freed with the pre-allocated memory addresses. ++ */ ++ ++#include <asm-generic/uaccess.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/printk.h> ++#include <linux/proc_fs.h> ++ ++#include "intel_cln_imr.h" ++#include <asm/imr.h> ++ ++#define DRIVER_NAME "intel-cln-imr" ++ ++#define IMR_READ_MASK 0x1 ++#define IMR_MAX_ID 7 ++ ++#ifndef phys_to_virt ++#define phys_to_virt __va ++#endif ++ ++/* IMR HW register address structre */ ++struct cln_imr_reg_t { ++ u8 imr_xl; /* high address register */ ++ u8 imr_xh; /* low address register */ ++ u8 imr_rm; /* read mask register */ ++ u8 imr_wm; /* write mask register */ ++} cln_imr_reg_t; ++ ++/** ++ * struct cln_imr_addr_t ++ * ++ * IMR memory address structure ++ */ ++struct cln_imr_addr_t { ++ u32 addr_low; /* low boundary memroy address */ ++ u32 addr_high; /* high boundary memory address */ ++ u32 read_mask; /* read access right mask */ ++ u32 write_mask; /* write access right mask */ ++} cln_imr_addr_t; ++ ++/** ++ * struct cln_imr_pack ++ * ++ * local IMR pack structure ++ */ ++struct cln_imr_pack { ++ bool occupied; /* IMR occupied */ ++ bool locked; /* IMR lock */ ++ struct cln_imr_reg_t reg; /* predefined imr register address */ ++ struct cln_imr_addr_t addr; /* IMR address region structure */ ++ unsigned char info[MAX_INFO_SIZE]; /* IMR info */ ++} cln_imr_pack; ++ ++ ++/* Predefined HW register address */ ++static struct cln_imr_reg_t imr_reg_value[] = { ++ { IMR0L, IMR0H, IMR0RM, IMR0WM }, ++ { IMR1L, IMR1H, IMR1RM, IMR1WM }, ++ { IMR2L, IMR2H, IMR2RM, IMR2WM }, ++ { IMR3L, IMR3H, IMR3RM, IMR3WM }, ++ { IMR4L, IMR4H, IMR4RM, IMR4WM }, ++ { IMR5L, IMR5H, IMR5RM, IMR5WM }, ++ { IMR6L, IMR6H, IMR6RM, IMR6WM }, ++ { IMR7L, IMR7H, IMR7RM, IMR7WM } ++}; ++ ++static struct platform_device *pdev; ++ ++/** ++ * module parameter ++ * IMR slot should repersant the available IMR region from ++ * linux boot and BIOS. ++ * ++ * For example: imr_bit_mask = 0x10111001 ++ * occupied IMR: 0, 3, 4, 5, 7 ++ * un-occupied IMR: 1, 2, 6 ++ */ ++static int imr_bit_mask = 0xFF; ++module_param(imr_bit_mask, int, S_IRUGO|S_IWUSR); ++MODULE_PARM_DESC(imr_bit_mask, "IMR bit mask"); ++ ++/** ++ * module parameter ++ * if IMR lock is a nozero value, all unlocked ++ * imrs will be locked regardless the usage. ++ */ ++static int imr_lock = 0; ++module_param(imr_lock, int, S_IRUGO|S_IWUSR); ++MODULE_PARM_DESC(imr_lock, "switch to lock unused IMR"); ++ ++/* local IMR data structure */ ++struct cln_imr_pack local_imr[IMR_MAXID]; ++ ++/** ++ * intel_cln_imr_read_reg ++ * ++ * @param reg: register address ++ * @return nothing ++ * ++ * return register value from input address. ++ */ ++static inline uint32_t intel_cln_imr_read_reg(uint8_t reg) ++{ ++ uint32_t temp = 0; ++ ++ intel_cln_sb_read_reg(SB_ID_ESRAM, CFG_READ_OPCODE, reg, &temp, 0); ++ return temp; ++} ++ ++/** ++ * intel_clm_imr_latch_data ++ * ++ * @return nothing ++ * ++ * Populate IMR data structure from HW. ++ */ ++static inline void intel_clm_imr_latch_data(void) ++{ ++ int i = 0; ++ ++ for (i = 0; i < IMR_MAXID; i++) { ++ ++ local_imr[i].addr.addr_low = ++ intel_cln_imr_read_reg(imr_reg_value[i].imr_xl); ++ local_imr[i].addr.addr_high = ++ intel_cln_imr_read_reg(imr_reg_value[i].imr_xh); ++ local_imr[i].addr.read_mask = ++ intel_cln_imr_read_reg(imr_reg_value[i].imr_rm); ++ local_imr[i].addr.write_mask = ++ intel_cln_imr_read_reg(imr_reg_value[i].imr_wm); ++ ++ if (local_imr[i].addr.addr_low & IMR_LOCK_BIT) ++ local_imr[i].locked = true; ++ ++ if (local_imr[i].addr.read_mask > 0 && ++ local_imr[i].addr.read_mask < IMR_READ_ENABLE_ALL){ ++ local_imr[i].occupied = true; ++ } else { ++ local_imr[i].occupied = false; ++ memcpy(local_imr[i].info, "NOT USED", MAX_INFO_SIZE); ++ } ++ } ++} ++ ++/** ++ * prepare_input_addr ++ * ++ * @param addr: input physical memory address ++ * @return formated memory address ++ * ++ * 1. verify input memory address alignment ++ * 2. apply IMR_REG_MASK to match the format required by HW ++ */ ++static inline uint32_t prepare_input_addr(uint32_t addr) ++{ ++ if (addr & (IMR_MEM_ALIGN - 1)) ++ return 0; ++ ++ addr = (addr >> 8) & IMR_REG_MASK; ++ return addr; ++} ++ ++/** ++ * intel_cln_imr_find_free_entry ++ * ++ * @return the next free imr slot ++ */ ++static int intel_cln_imr_find_free_entry(void) ++{ ++ int i = 0; ++ ++ intel_clm_imr_latch_data(); ++ ++ for (i = 0; i < IMR_MAXID; i++) { ++ if ((!local_imr[i].occupied) && (!local_imr[i].locked)) ++ return i; ++ } ++ ++ pr_err("%s: No more free IMR available.\n", __func__); ++ return -ENOMEM; ++} ++ ++/** ++ * intel_cln_imr_add_entry ++ * ++ * @param id: imr slot id ++ * @param hi: hi memory address ++ * @param lo: lo memory address ++ * @param read: read access mask ++ * @param write: write access mask ++ * @return nothing ++ * ++ * Setup an IMR entry ++ */ ++static void intel_cln_imr_add_entry(int id, uint32_t hi, ++ uint32_t lo, uint32_t read, uint32_t write, bool lock) ++{ ++ intel_cln_sb_write_reg(SB_ID_ESRAM, CFG_WRITE_OPCODE, ++ imr_reg_value[id].imr_xl, lo, 0); ++ intel_cln_sb_write_reg(SB_ID_ESRAM, CFG_WRITE_OPCODE, ++ imr_reg_value[id].imr_xh, hi, 0); ++ intel_cln_sb_write_reg(SB_ID_ESRAM, CFG_WRITE_OPCODE, ++ imr_reg_value[id].imr_rm, read, 0); ++ intel_cln_sb_write_reg(SB_ID_ESRAM, CFG_WRITE_OPCODE, ++ imr_reg_value[id].imr_wm, write, 0); ++ if (lock) { ++ lo |= IMR_LOCK_BIT; ++ intel_cln_sb_write_reg(SB_ID_ESRAM, CFG_WRITE_OPCODE, ++ imr_reg_value[id].imr_xl, lo, 0); ++ } ++} ++ ++/** ++ * get_phy_addr ++ * @return phy address value ++ * ++ * convert register format to physical address format. ++ */ ++static uint32_t get_phy_addr(uint32_t reg_value) ++{ ++ reg_value = ((reg_value & IMR_REG_MASK) << 8); ++ return reg_value; ++} ++ ++ ++ ++/** ++ * intel_cln_imr_init_mask ++ * ++ * @param mask: module parameter ++ * @return nothing ++ * ++ * prepare local IMR data structure from input module parameter. ++ */ ++static void intel_cln_imr_init_mask(int mask) ++{ ++ int i = 0; ++ ++ BUG_ON((mask > 255 || mask < 0)); ++ ++ for (i = 0; i < IMR_MAXID; i++) { ++ local_imr[i].addr.addr_low = ++ intel_cln_imr_read_reg(imr_reg_value[i].imr_xl); ++ ++ /* mask bit 1 means imr occupied*/ ++ if (((mask>>i) & IMR_READ_MASK) == 0) { ++ if (!(local_imr[i].addr.addr_low & IMR_LOCK_BIT)) ++ intel_cln_remove_imr_entry(i); ++ } ++ } ++} ++ ++/** ++ * intel_cln_remove_imr_entry ++ * ++ * @param id: imr slot id ++ * @return nothing ++ * ++ * remove imr slot based on input id ++ */ ++void intel_cln_remove_imr_entry(int id) ++{ ++ if (id >= IMR_MAXID || local_imr[id].locked) ++ return; ++ ++ intel_cln_sb_write_reg(SB_ID_ESRAM, CFG_WRITE_OPCODE, ++ imr_reg_value[id].imr_rm, IMR_READ_ENABLE_ALL, ++ 0); ++ intel_cln_sb_write_reg(SB_ID_ESRAM, CFG_WRITE_OPCODE, ++ imr_reg_value[id].imr_wm, IMR_WRITE_ENABLE_ALL, ++ 0); ++ intel_cln_sb_write_reg(SB_ID_ESRAM, CFG_WRITE_OPCODE, ++ imr_reg_value[id].imr_xl, IMR_BASE_ADDR, 0); ++ intel_cln_sb_write_reg(SB_ID_ESRAM, CFG_WRITE_OPCODE, ++ imr_reg_value[id].imr_xh, IMR_BASE_ADDR, 0); ++ ++ intel_clm_imr_latch_data(); ++ ++} ++EXPORT_SYMBOL(intel_cln_remove_imr_entry); ++ ++/** ++ * intel_cln_imr_alloc ++ * ++ * @param high: high boundary of memory address ++ * @param low: low boundary of memorry address ++ * @param read: IMR read mask value ++ * @param write: IMR write mask value ++ * @return nothing ++ * ++ * setup the next available IMR with customized read and write masks ++ */ ++int intel_cln_imr_alloc(uint32_t high, uint32_t low, uint32_t read, ++ uint32_t write, unsigned char *info, bool lock) ++{ ++ int id = 0; ++ ++ if (info == NULL) ++ return -EINVAL; ++ ++ if ((low & IMR_LOCK_BIT) || (read == 0 || write == 0)) { ++ pr_err("%s: Invalid acces mode\n", __func__); ++ return -EINVAL; ++ } ++ ++ /* Calculate aligned addresses and validate range */ ++ high = prepare_input_addr(high); ++ low = prepare_input_addr(low); ++ ++ /* Find a free entry */ ++ id = intel_cln_imr_find_free_entry(); ++ if (id < 0) ++ return -ENOMEM; ++ ++ /* Add entry - locking as necessary */ ++ intel_cln_imr_add_entry(id, high, low, (read & IMR_READ_ENABLE_ALL), ++ write, lock); ++ ++ /* Name the new entry */ ++ memcpy(local_imr[id].info, info, MAX_INFO_SIZE); ++ ++ /* Update local data structures */ ++ intel_clm_imr_latch_data(); ++ ++ pr_info("IMR alloc id %d 0x%08x - 0x%08x %s\n", id, low, high, ++ lock ? "locked" : "unlocked"); ++ ++ return 0; ++} ++EXPORT_SYMBOL(intel_cln_imr_alloc); ++ ++/** ++ * intel_cln_imr_free ++ * ++ * @param high: high boundary of memory address ++ * @param low: low boundary of memorry address ++ * @return nothing ++ * ++ * remove the imr based on input memory region ++ */ ++int intel_cln_imr_free(uint32_t high, uint32_t low) ++{ ++ int i = 0; ++ ++ if (low > high) { ++ pr_err("%s: Invalid input address values.\n", __func__); ++ return -EINVAL; ++ } ++ ++ high = prepare_input_addr(high); ++ if (!high) { ++ pr_err("%s: Invalid input memory address.\n", __func__); ++ return -EINVAL; ++ } ++ ++ low = prepare_input_addr(low); ++ if (!low) { ++ pr_err("%s: Invalid input memory address.\n", __func__); ++ return -EINVAL; ++ } ++ ++ for (i = 0; i < IMR_MAXID; i++) { ++ if (local_imr[i].occupied ++ && (local_imr[i].addr.addr_low == low) ++ && (local_imr[i].addr.addr_high == high) ++ && (!local_imr[i].locked)) { ++ intel_cln_remove_imr_entry(i); ++ return 0; ++ } ++ } ++ ++ return -EINVAL; ++} ++EXPORT_SYMBOL(intel_cln_imr_free); ++ ++/** ++ * intel_cln_imr_init_data ++ * ++ * @return nothing ++ * initialize local_imr data structure ++ */ ++static void intel_cln_imr_init_data(void) ++{ ++ int i = 0; ++ char * res_str = "System Reserved Region"; ++ int len = strlen(res_str); ++ ++ intel_clm_imr_latch_data(); ++ ++ for (i = 0; i < IMR_MAXID; i++) { ++ local_imr[i].reg = imr_reg_value[i]; ++ memcpy(local_imr[i].info, res_str, len); ++ } ++} ++ ++/** ++ * intel_cln_imr_lockall ++ * ++ * @param mask: module parameter ++ * @return nothing ++ * ++ * lock up all un-locked IMRs ++ */ ++int intel_cln_imr_lockall(void) ++{ ++ int i = 0; ++ uint32_t temp_addr; ++ ++ /* Enumerate IMR data structures */ ++ intel_cln_imr_init_data(); ++ intel_cln_imr_init_mask(imr_bit_mask); ++ ++ /* Cycle through IMRs locking whichever are unlocked */ ++ for (i = 0; i < IMR_MAXID; i++) { ++ ++ temp_addr = local_imr[i].addr.addr_low; ++ if (!(temp_addr & IMR_LOCK_BIT)) { ++ ++ DBG("%s: locking IMR %d\n", __func__, i); ++ temp_addr |= IMR_LOCK_BIT; ++ intel_cln_sb_write_reg(SB_ID_ESRAM, CFG_WRITE_OPCODE, ++ local_imr[i].reg.imr_xl, ++ temp_addr, 0); ++ } ++ } ++ ++ return 0; ++} ++EXPORT_SYMBOL(intel_cln_imr_lockall); ++ ++/** ++ * intel_cln_imr_stat_show ++ * ++ * @param dev: pointer to device ++ * @param attr: attribute pointer ++ * @param buf: output buffer ++ * @return number of bytes successfully read ++ * ++ * Populates IMR state via /sys/device/intel-cln-imr/stat ++ */ ++static int intel_cln_imr_stat_show(struct device *dev, ++ struct device_attribute *attr, ++ char *buf) ++{ ++ int len = 0; ++ int i = 0; ++ int size, count = PAGE_SIZE; ++ uint32_t hi_phy_addr, lo_phy_addr; ++ ++ for (i = 0; i < IMR_MAXID; i++) { ++ ++ /* read back the actual input physical memory address */ ++ hi_phy_addr = get_phy_addr(local_imr[i].addr.addr_high); ++ lo_phy_addr = get_phy_addr(local_imr[i].addr.addr_low); ++ ++ /* the IMR always protect extra 1k memory size above the input ++ * high reg value ++ */ ++ size = ((hi_phy_addr - lo_phy_addr) / IMR_MEM_ALIGN) + 1; ++ ++ size = snprintf(buf+len, count, ++ "imr - id : %d\n" ++ "info : %s\n" ++ "occupied : %s\n" ++ "locked : %s\n" ++ "size : %d kb\n" ++ "hi addr (phy): 0x%08x\n" ++ "lo addr (phy): 0x%08x\n" ++ "hi addr (vir): 0x%08x\n" ++ "lo addr (vir): 0x%08x\n" ++ "read mask : 0x%08x\n" ++ "write mask : 0x%08x\n\n", ++ i, ++ local_imr[i].info, ++ local_imr[i].occupied ? "yes" : "no", ++ local_imr[i].locked ? "yes" : "no", ++ size, ++ hi_phy_addr, ++ lo_phy_addr, ++ (uint32_t)phys_to_virt(hi_phy_addr), ++ (uint32_t)phys_to_virt(lo_phy_addr), ++ local_imr[i].addr.read_mask, ++ local_imr[i].addr.write_mask); ++ len += size; ++ count -= size; ++ } ++ return len; ++} ++ ++static struct device_attribute dev_attr_stats = { ++ .attr = { ++ .name = "stat", ++ .mode = 0444, }, ++ .show = intel_cln_imr_stat_show, ++}; ++ ++static struct attribute *platform_attributes[] = { ++ &dev_attr_stats.attr, ++ NULL, ++}; ++ ++static struct attribute_group imr_attrib_group = { ++ .attrs = platform_attributes ++}; ++ ++/** ++ * intel_cln_imr_init ++ * ++ * @return 0 success < 0 failue ++ * ++ * module entry point ++ */ ++int __init intel_cln_imr_init(void) ++{ ++ int ret; ++ ++ pdev = platform_device_alloc(DRIVER_NAME, -1); ++ if (!pdev) ++ return -ENOMEM; ++ ++ ret = platform_device_add(pdev); ++ if (ret) ++ goto fail_platform; ++ ++ /* initialise local imr data structure */ ++ intel_cln_imr_init_data(); ++ ++ ret = sysfs_create_group(&pdev->dev.kobj, &imr_attrib_group); ++ if (ret) ++ goto fail_platform; ++ ++ if(intel_cln_imr_runt_setparams() == 0 && imr_lock == 1){ ++ intel_cln_imr_lockall(); ++ } ++ ++ return 0; ++ ++fail_platform: ++ platform_device_del(pdev); ++ return ret; ++} ++EXPORT_SYMBOL(intel_cln_imr_init); ++ ++MODULE_DESCRIPTION("Intel Clanton SOC IMR API "); ++MODULE_AUTHOR("Intel Corporation"); ++MODULE_LICENSE("Dual BSD/GPL"); ++ +diff --git a/drivers/platform/x86/quark/intel_cln_imr.h b/drivers/platform/x86/quark/intel_cln_imr.h +new file mode 100644 +index 0000000..3861d60 +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_imr.h +@@ -0,0 +1,155 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton IMR driver ++ * ++ * IMR stand for Insolate Memory Region, supported by Clanton SoC. ++ * ++ * A total number of 8 IMRs have implemented by Clanton SoC, ++ * some IMRs might be already occupied by BIOS or Linux booting time. ++ * ++ * Input addresses parameter required the actual Physical address. ++ * ++ * The IMR alloc API will locate the next available IMR slot set up ++ * with input memory region, and apply with the default access right ++ * (CPU & CPU_snoop enable). ++ * ++ * The alloc_mask API takes input read & write masks values to set up ++ * IMR with customized access right. ++ * ++ * User can free IMR with pre-alloc specified addresses. ++ */ ++ ++#ifndef __INTEL_CLN_IMR_H__ ++#define __INTEL_CLN_IMR_H__ ++ ++#include <linux/intel_cln_sb.h> ++#include "asm/io.h" ++ ++#define CFG_READ_OPCODE 0x10 /* BUnit Control Read */ ++#define CFG_WRITE_OPCODE 0x11 /* BUnit control write */ ++ ++/* DRAM IMR register addresses */ ++#define IMR0L 0x40 ++#define IMR0H 0x41 ++#define IMR0RM 0x42 ++#define IMR0WM 0x43 ++#define IMR1L 0x44 ++#define IMR1H 0x45 ++#define IMR1RM 0x46 ++#define IMR1WM 0x47 ++#define IMR2L 0x48 ++#define IMR2H 0x49 ++#define IMR2RM 0x4A ++#define IMR2WM 0x4B ++#define IMR3L 0x4C ++#define IMR3H 0x4D ++#define IMR3RM 0x4E ++#define IMR3WM 0x4F ++#define IMR4L 0x50 ++#define IMR4H 0x51 ++#define IMR4RM 0x52 ++#define IMR4WM 0x53 ++#define IMR5L 0x54 ++#define IMR5H 0x55 ++#define IMR5RM 0x56 ++#define IMR5WM 0x57 ++#define IMR6L 0x58 ++#define IMR6H 0x59 ++#define IMR6RM 0x5A ++#define IMR6WM 0x5B ++#define IMR7L 0x5C ++#define IMR7H 0x5D ++#define IMR7RM 0x5E ++#define IMR7WM 0x5F ++ ++#define IMR_LOCK_BIT 0x80000000 ++#define IMR_WRITE_ENABLE_ALL 0xFFFFFFFF ++#define IMR_READ_ENABLE_ALL 0xBFFFFFFF ++#define IMR_REG_MASK 0xFFFFFC ++ ++#define IMR_ESRAM_FLUSH_INIT 0x80000000 /* esram flush */ ++#define IMR_SNOOP_ENABLE 0x40000000 /* core snoops */ ++#define IMR_PUNIT_ENABLE 0x20000000 ++#define IMR_SMM_ENABLE 0x02 /* core SMM access */ ++#define IMR_NON_SMM_ENABLE 0x01 /* core non-SMM access */ ++#define IMR_BASE_ADDR 0x00 ++#define IMR_MEM_ALIGN 0x400 ++ ++#define MAX_INFO_SIZE 64 ++#define IMR_MAXID 8 ++ ++/* snoop + Non SMM write mask */ ++#define IMR_DEFAULT_MASK (IMR_SNOOP_ENABLE \ ++ + IMR_ESRAM_FLUSH_INIT \ ++ + IMR_NON_SMM_ENABLE) ++ ++/* debug printk */ ++#ifdef DEBUG ++#define DBG(args...) pr_info(args) ++#else ++#define DBG(args...) ++#endif ++ ++extern unsigned long _text; ++extern unsigned long __init_begin; ++ ++/** ++ * intel_cln_imr_alloc ++ * ++ * @param high: the end of physical memory address ++ * @param low: the start of physical memory address ++ * @param read: IMR read mask value ++ * @param write: IMR write maks value ++ * @param info: imr information ++ * @param lock: imr lock ++ * ++ * Setup imr with customised read/ write masks ++ */ ++int intel_cln_imr_alloc(u32 high, u32 low, u32 read, u32 write, ++ unsigned char *info, bool lock); ++ ++/** ++ * intel_cln_imr_free ++ * ++ * @param high: high boundary of memory address ++ * @param low: low boundary of memorry address ++ * ++ * remove the imr based on input memory region ++ */ ++int intel_cln_imr_free(u32 high, u32 low); ++ ++/** ++ * intel_cln_remove_imr_entry ++ * ++ * @param id: internal imr data struct id ++ * ++ * Remove imr based on input imr data structure id ++ */ ++void intel_cln_remove_imr_entry(int id); ++ ++/** ++ * intel_cln_imr_init ++ * ++ * Initialise IMRs ++ */ ++int intel_cln_imr_init(void); ++ ++#endif +diff --git a/drivers/platform/x86/quark/intel_cln_imr_kernel.c b/drivers/platform/x86/quark/intel_cln_imr_kernel.c +new file mode 100644 +index 0000000..51e8676 +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_imr_kernel.c +@@ -0,0 +1,139 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton IMR driver ++ * ++ * IMR stand for Insolate Memory Region, supported by Clanton SoC. ++ * ++ * The IMR id 3 is pre-defined as the use for kernel data protection ++ * ++ * The early imr protects entire memory (from the beginning of kernel text ++ * section to the top of memory) during linux boot time. In the linux run ++ * time, the protection need to resize down to memory region that only ++ * contains: kernel text, read only data, and initialized data section. ++ * ++ */ ++#include <linux/errno.h> ++#include <linux/intel_cln_sb.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/platform_data/clanton.h> ++#include <linux/printk.h> ++#include "intel_cln_imr.h" ++ ++/* pre-defined imr id for uncompressed kernel */ ++#define IMR_KERNEL_ID 3 ++ ++/** ++ * addr_hw_ready ++ * ++ * shift input address value to match HW required 1k aligned format ++ */ ++static inline uint32_t addr_hw_ready(uint32_t addr) ++{ ++ /* memory alignment */ ++ addr &= (~((1 << 10) - 1)); ++ ++ /* prepare input addr in HW required format */ ++ addr = (addr >> 8) & IMR_REG_MASK; ++ return addr; ++} ++ ++/** ++ * void intel_cln_imr_runt_kerndata_setup ++ * ++ * Setup imr for kernel text, read only data section ++ * ++ * The read only data (rodata) section placed between text and initialized data ++ * section by kernel. ++ */ ++static void intel_cln_imr_runt_kerndata_setup(void) ++{ ++ uint32_t hi; ++ uint32_t lo; ++ ++ hi = (uint32_t)virt_to_phys(&__init_begin); ++ lo = (uint32_t)virt_to_phys(&_text); ++ ++ /* Set a locked IMR around the kernel .text section */ ++ if (intel_cln_imr_alloc((hi - IMR_MEM_ALIGN), lo, ++ IMR_DEFAULT_MASK, IMR_DEFAULT_MASK, ++ "KERNEL RUNTIME DATA", 1)) { ++ pr_err("IMR: Set up runtime kernel data imr faild!\n"); ++ return; ++ } ++} ++ ++/** ++ * intel_cln_imr_teardown_unlocked ++ * ++ * Remove any unlocked IMR ++ * ++ */ ++static void intel_cln_imr_teardown_unlocked(void) ++{ ++ int i = 0; ++ for (i = 0; i < IMR_MAXID; i++) ++ intel_cln_remove_imr_entry(i); ++} ++ ++/** ++ * intel_cln_imr_runt_setparams ++ * ++ * set imr range for text, read only, initialised data in linux run time ++ */ ++int intel_cln_imr_runt_setparams(void) ++{ ++ /* Setup an IMR around the kernel .text area */ ++ intel_cln_imr_runt_kerndata_setup(); ++ ++ /* Remove any other unlocked IMR */ ++ intel_cln_imr_teardown_unlocked(); ++ ++ return 0; ++} ++EXPORT_SYMBOL(intel_cln_imr_runt_setparams); ++ ++/** ++ * intel_cln_imr_runt_init ++ * ++ * module entry point ++ */ ++static int __init intel_cln_imr_runt_init(void) ++{ ++ return 0; ++} ++ ++/** ++ * intel_cln_imr_runt_exit ++ * ++ * Module exit ++ */ ++static void __exit intel_cln_imr_runt_exit(void) ++{ ++ /* do nothing */ ++} ++ ++MODULE_DESCRIPTION("Intel Clanton SOC IMR API "); ++MODULE_AUTHOR("Intel Corporation"); ++MODULE_LICENSE("Dual BSD/GPL"); ++ ++subsys_initcall(intel_cln_imr_runt_init); ++module_exit(intel_cln_imr_runt_exit); +diff --git a/drivers/platform/x86/quark/intel_cln_imr_test.c b/drivers/platform/x86/quark/intel_cln_imr_test.c +new file mode 100644 +index 0000000..2d98507 +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_imr_test.c +@@ -0,0 +1,357 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton IMR Test module ++ * ++ */ ++ ++#include <linux/cdev.h> ++#include <linux/device.h> ++#include <linux/fs.h> ++#include <linux/intel_cln_sb.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/printk.h> ++#include <linux/slab.h> ++#include "intel_cln_imr.h" ++ ++#define DRIVER_NAME "intel_cln_imr_test" ++ ++/** ++ * XXX intel_cln_sb.h needs to be updated with SB_ID_PUNIT and change ++ * propagated. This is a workaround to make it look less ugly. */ ++#define SB_ID_PUNIT SB_ID_THERMAL ++ ++/* Memory-mapped SPI Flash address */ ++#define ILB_SPIFLASH_BASEADDR 0xFF800000 ++/* PUnit DMA block transfer size, in bytes */ ++#define SPI_DMA_BLOCK_SIZE 512 ++ ++/**************************** Exported to LISA *******************************/ ++ ++/* ++ * Internally-used ioctl code. At the moment it is not reserved by any mainline ++ * driver. ++ */ ++#define IMR_TEST_IOCTL_CODE 0xE1 ++ ++/* ++ * Integers for ioctl operation. ++ */ ++#define IOCTL_CLN_SANITY_CHECK_PUNIT_DMA _IO(IMR_TEST_IOCTL_CODE, 0x00) ++#define IOCTL_CLN_IMR_1 _IO(IMR_TEST_IOCTL_CODE, 0x01) ++ ++/*****************************************************************************/ ++ ++/** ++ * struct intel_cln_imr_dev ++ * ++ * Structure to represent module state/data/etc ++ */ ++struct intel_cln_imr_test_dev { ++ unsigned int opened; ++ struct platform_device *pldev; /* Platform device */ ++ struct cdev cdev; ++ struct mutex open_lock; ++}; ++ ++static struct intel_cln_imr_test_dev imr_test_dev; ++static struct class *imr_test_class; ++static DEFINE_MUTEX(imr_test_mutex); ++static int imr_test_major; ++ ++/* PUnit DMA registers over side-band */ ++#define PUNIT_SPI_DMA_COUNT_REG 0x60 ++#define PUNIT_SPI_DMA_DEST_REG 0x61 ++#define PUNIT_SPI_DMA_SRC_REG 0x62 ++ ++/** ++ * ilb_spi_dma_read ++ * ++ * @param src: physical address in Legacy SPI Flash ++ * @param dst: physical address of destination ++ * @param dma_block_count: number of 512B SPI Flash blocks to be transferred ++ * ++ * Read-access iLB SPI via PUnit DMA engine. ++ * ++ */ ++static void ilb_spi_dma_read(u32 *src, u32 *dst, u32 dma_block_count) ++{ ++ pr_info("%s: src=%p, dst=%p, count=%u\n", __func__, src, dst, ++ dma_block_count); ++ ++ /* Setup source and destination addresses. */ ++ intel_cln_sb_write_reg(SB_ID_PUNIT, CFG_WRITE_OPCODE, ++ PUNIT_SPI_DMA_SRC_REG, (u32) src, 0); ++ intel_cln_sb_write_reg(SB_ID_PUNIT, CFG_WRITE_OPCODE, ++ PUNIT_SPI_DMA_DEST_REG, (u32) dst, 0); ++ ++ pr_info("%s: starting transaction\n", __func__); ++ ++ /* ++ * Setup the number of block to be copied over. Transaction will start ++ * as soon as the register is filled with value. ++ */ ++ intel_cln_sb_write_reg(SB_ID_PUNIT, CFG_WRITE_OPCODE, ++ PUNIT_SPI_DMA_COUNT_REG, dma_block_count, 0); ++ ++ /* Poll for completion. */ ++ while (dma_block_count > 0) { ++ intel_cln_sb_read_reg(SB_ID_PUNIT, CFG_READ_OPCODE, ++ PUNIT_SPI_DMA_COUNT_REG, &dma_block_count, 0); ++ } ++ ++ pr_info("%s: transaction completed\n", __func__); ++} ++ ++/** ++ * punit_dma_sanity_check ++ * ++ * @return 0 if success, 1 if failure ++ * ++ * Perform a basic sanity check for PUnit DMA engine. Copy over a 512B SPI ++ * Flash block. ++ */ ++static int punit_dma_sanity_check(void) ++{ ++ int err = 0; ++ u32 *buffer = NULL; ++ u32 buf_ph_addr = 0; ++ ++ /* Allocate 512B buffer for 1 SPI Flash block */ ++ buffer = kzalloc(SPI_DMA_BLOCK_SIZE, GFP_KERNEL); ++ if (!buffer) { ++ err = -ENOMEM; ++ goto end; ++ } ++ ++ /* DMA first SPI Flash block into buffer */ ++ buf_ph_addr = (u32)virt_to_phys(buffer); ++ ilb_spi_dma_read((u32 *)ILB_SPIFLASH_BASEADDR, (u32 *)buf_ph_addr, 1); ++ ++ kfree(buffer); ++end: ++ return err; ++} ++ ++/** ++ * imr_violate_kernel_punit_dma ++ * ++ * @return always 0 ++ * ++ * PUnit-DMA access to the Uncompressed Kernel IMR. ++ * This is based on set_imr_kernel_data() in intel_cln_imr.c. Find the physical ++ * address of .text section and copy a 512B chunk of legacy SPI via PuUnit DMA. ++ * ++ */ ++static int imr_violate_kernel_punit_dma(void) ++{ ++ extern unsigned long _text; ++ u32 kernel_text = (u32)virt_to_phys(&_text); ++ ++ /* We expect this to trigger an IMR violation reset */ ++ ilb_spi_dma_read((u32 *)ILB_SPIFLASH_BASEADDR, (u32 *)kernel_text, 1); ++ ++ /* ++ * If we're still alive, we have a serious bug: ++ * - we didn't appropriately target the IMR? ++ * - if we have, weren't we prevented from accessing? ++ * - if we weren't prevented, it's unlikely we're alive with a dirty ++ * text section ++ */ ++ pr_err("%s: BUG: still running after DMAing into kernel text!?\n", ++ __func__); ++ ++ return 0; ++} ++ ++/* ++ * File ops ++ */ ++static long imr_test_ioctl(struct file *file, unsigned int cmd, ++ unsigned long arg) ++{ ++ int ret = -EINVAL; ++ ++ switch (cmd) { ++ case IOCTL_CLN_SANITY_CHECK_PUNIT_DMA: ++ /* Check PUnit DMA actually works */ ++ ret = punit_dma_sanity_check(); ++ break; ++ case IOCTL_CLN_IMR_1: ++ /* Kernel IMR violation: PUnit DMA access */ ++ ret = imr_violate_kernel_punit_dma(); ++ break; ++ default: ++ break; ++ } ++ ++ return ret; ++} ++ ++static int imr_test_open(struct inode *inode, struct file *file) ++{ ++ mutex_lock(&imr_test_mutex); ++ nonseekable_open(inode, file); ++ ++ if (mutex_lock_interruptible(&imr_test_dev.open_lock)) { ++ mutex_unlock(&imr_test_mutex); ++ return -ERESTARTSYS; ++ } ++ ++ if (imr_test_dev.opened) { ++ mutex_unlock(&imr_test_dev.open_lock); ++ mutex_unlock(&imr_test_mutex); ++ return -EINVAL; ++ } ++ ++ imr_test_dev.opened++; ++ mutex_unlock(&imr_test_dev.open_lock); ++ mutex_unlock(&imr_test_mutex); ++ return 0; ++} ++ ++static int imr_test_release(struct inode *inode, struct file *file) ++{ ++ mutex_lock(&imr_test_dev.open_lock); ++ imr_test_dev.opened = 0; ++ mutex_unlock(&imr_test_dev.open_lock); ++ ++ return 0; ++} ++ ++static const struct file_operations imr_test_file_ops = { ++ .open = imr_test_open, ++ .release = imr_test_release, ++ .unlocked_ioctl = imr_test_ioctl, ++ .llseek = no_llseek, ++}; ++ ++/** ++ * intel_cln_imr_test_probe ++ * ++ * @param pdev: Platform device ++ * @return 0 success < 0 failure ++ * ++ * Callback from platform sub-system to probe ++ */ ++static int intel_cln_imr_test_probe(struct platform_device * pdev) ++{ ++ int retval = 0; ++ unsigned int minor = 0; ++ ++ mutex_init(&imr_test_dev.open_lock); ++ cdev_init(&imr_test_dev.cdev, &imr_test_file_ops); ++ imr_test_dev.cdev.owner = THIS_MODULE; ++ ++ retval = cdev_add(&imr_test_dev.cdev, MKDEV(imr_test_major, minor), 1); ++ if (retval) { ++ printk(KERN_ERR "chardev registration failed\n"); ++ return -EINVAL; ++ } ++ if (IS_ERR(device_create(imr_test_class, NULL, ++ MKDEV(imr_test_major, minor), NULL, ++ "imrtest%u", minor))){ ++ dev_err(&pdev->dev, "can't create device\n"); ++ return -EINVAL; ++ } ++ ++ return 0; ++ ++} ++ ++static int intel_cln_imr_test_remove(struct platform_device * pdev) ++{ ++ unsigned int minor = MINOR(imr_test_dev.cdev.dev); ++ ++ device_destroy(imr_test_class, MKDEV(imr_test_major, minor)); ++ cdev_del(&imr_test_dev.cdev); ++ ++ class_destroy(imr_test_class); ++ ++ return 0; ++} ++ ++/* ++ * Platform structures useful for interface to PM subsystem ++ */ ++static struct platform_driver intel_cln_imr_test_driver = { ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++ .remove = intel_cln_imr_test_remove, ++}; ++ ++/** ++ * intel_cln_imr_test_init ++ * ++ * Load module. ++ */ ++static int __init intel_cln_imr_test_init(void) ++{ ++ int retval = 0; ++ dev_t dev; ++ ++ imr_test_class = class_create(THIS_MODULE,"cln_imr_test"); ++ if (IS_ERR(imr_test_class)) { ++ retval = PTR_ERR(imr_test_class); ++ printk(KERN_ERR "imr_test: can't register imr_test class\n"); ++ goto err; ++ } ++ ++ retval = alloc_chrdev_region(&dev, 0, 1, "imr_test"); ++ if (retval) { ++ printk(KERN_ERR "earam_test: can't register character device\n"); ++ goto err_class; ++ } ++ imr_test_major = MAJOR(dev); ++ ++ memset(&imr_test_dev, 0x00, sizeof(imr_test_dev)); ++ imr_test_dev.pldev = platform_create_bundle( ++ &intel_cln_imr_test_driver, intel_cln_imr_test_probe, NULL, 0, NULL, 0); ++ ++ if(IS_ERR(imr_test_dev.pldev)){ ++ printk(KERN_ERR "platform_create_bundle fail!\n"); ++ retval = PTR_ERR(imr_test_dev.pldev); ++ goto err_class; ++ } ++ ++ return 0; ++ ++err_class: ++ class_destroy(imr_test_class); ++err: ++ return retval; ++} ++ ++static void __exit intel_cln_imr_test_exit(void) ++{ ++ platform_device_unregister(imr_test_dev.pldev); ++ platform_driver_unregister(&intel_cln_imr_test_driver); ++} ++ ++module_init(intel_cln_imr_test_init); ++module_exit(intel_cln_imr_test_exit); ++ ++MODULE_AUTHOR("Josef Ahmad <josef.ahmad@intel.com>"); ++MODULE_DESCRIPTION("Clanton IMR test module"); ++MODULE_LICENSE("Dual BSD/GPL"); ++ +diff --git a/drivers/platform/x86/quark/intel_cln_layout_data.c b/drivers/platform/x86/quark/intel_cln_layout_data.c +new file mode 100644 +index 0000000..124bccf +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_layout_data.c +@@ -0,0 +1,100 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton Legacy Platform Data Layout.conf accessor ++ * ++ * Simple Legacy SPI flash access layer ++ * ++ * Author : Bryan O'Donoghue <bryan.odonoghue@linux.intel.com> 2013 ++ */ ++ ++#include <asm/io.h> ++#include <linux/errno.h> ++#include <linux/ioport.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/printk.h> ++ ++#define DRIVER_NAME "cln-layout-conf" ++static char __iomem * layout_conf_data; ++static int len; ++ ++static ssize_t layout_conf_show(struct kobject *kobj, ++ struct kobj_attribute *attr, char *buf) ++{ ++ ssize_t plen = len+1; ++ if( plen > PAGE_SIZE ) ++ plen = PAGE_SIZE; ++ memcpy(buf, layout_conf_data, plen); ++ return plen; ++} ++ ++static struct kobj_attribute layout_conf_attr = ++ __ATTR(layout_conf, 0644, layout_conf_show, NULL); ++ ++static int intel_cln_layout_data_probe(struct platform_device *pdev) ++{ ++ extern struct kobject * board_data_kobj; ++ int ret = 0; ++ ++ layout_conf_data = ioremap(pdev->resource->start, ++ resource_size(pdev->resource)); ++ if (!layout_conf_data) ++ return -ENODEV; ++ ++ len = resource_size(pdev->resource); ++ ret = sysfs_create_file(board_data_kobj, &layout_conf_attr.attr); ++ if (ret != 0){ ++ pr_err("failed to create sysfs entry for layout config\n"); ++ iounmap(layout_conf_data); ++ layout_conf_data = NULL; ++ } ++ ++ return ret; ++} ++ ++static int intel_cln_layout_data_remove(struct platform_device *pdev) ++{ ++ extern struct kobject * board_data_kobj; ++ ++ if (layout_conf_data){ ++ sysfs_remove_file(board_data_kobj, &layout_conf_attr.attr); ++ iounmap(layout_conf_data); ++ ++ } ++ return 0; ++} ++ ++static struct platform_driver cln_layout_data_driver = { ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++ .probe = intel_cln_layout_data_probe, ++ .remove = intel_cln_layout_data_remove, ++}; ++ ++module_platform_driver(cln_layout_data_driver); ++ ++MODULE_AUTHOR("Bryan O'Donoghue <bryan.odonoghue@intel.com>"); ++MODULE_DESCRIPTION("Intel Clanton SPI Data API"); ++MODULE_LICENSE("Dual BSD/GPL"); ++MODULE_ALIAS("platform:"DRIVER_NAME); ++ +diff --git a/drivers/platform/x86/quark/intel_cln_plat_clanton_hill.c b/drivers/platform/x86/quark/intel_cln_plat_clanton_hill.c +new file mode 100644 +index 0000000..90da1c8 +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_plat_clanton_hill.c +@@ -0,0 +1,197 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton Legacy Platform Data Layout.conf accessor ++ * ++ * Simple Legacy SPI flash access layer ++ * ++ * Author : Bryan O'Donoghue <bryan.odonoghue@linux.intel.com> 2013 ++ */ ++ ++#include <linux/errno.h> ++#include <linux/gpio.h> ++#include <linux/i2c.h> ++#include <linux/io.h> ++#include <linux/ioport.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/printk.h> ++#include <linux/spi/pxa2xx_spi.h> ++#include <linux/spi/spi.h> ++ ++#define DRIVER_NAME "cln-plat-clanton-hill" ++#define GPIO_RESTRICT_NAME "cln-gpio-restrict-nc" ++ ++/****************************************************************************** ++ * Analog Devices AD7298 SPI Device Platform Data ++ ******************************************************************************/ ++#include "linux/platform_data/ad7298.h" ++ ++/* Maximum input voltage allowed for each ADC input, in milliVolts */ ++#define AD7298_MAX_EXT_VIN 5000 ++#define AD7298_MAX_EXT_VIN_EXT_BATT 30000 ++#define AD7298_MAX_EXT_VIN_INT_BATT 9200 ++ ++static const struct ad7298_platform_data ad7298_platform_data = { ++ .ext_ref = false, ++ .ext_vin_max = { AD7298_MAX_EXT_VIN, AD7298_MAX_EXT_VIN, ++ AD7298_MAX_EXT_VIN, AD7298_MAX_EXT_VIN, ++ AD7298_MAX_EXT_VIN, AD7298_MAX_EXT_VIN, ++ AD7298_MAX_EXT_VIN_EXT_BATT, AD7298_MAX_EXT_VIN_INT_BATT } ++}; ++ ++/****************************************************************************** ++ * Intel Clanton SPI Controller Data ++ ******************************************************************************/ ++static struct pxa2xx_spi_chip cln_ffrd_spi_0_cs_0 = { ++ .gpio_cs = 8, ++}; ++ ++static struct spi_board_info spi_onboard_devs[] = { ++ { ++ .modalias = "ad7298", ++ .max_speed_hz = 5000000, ++ .platform_data = &ad7298_platform_data, ++ .mode = SPI_MODE_2, ++ .bus_num = 0, ++ .chip_select = 0, ++ .controller_data = &cln_ffrd_spi_0_cs_0, ++ }, ++}; ++ ++/****************************************************************************** ++ * ST Microelectronics LIS331DLH I2C Device Platform Data ++ ******************************************************************************/ ++#include <linux/platform_data/lis331dlh_intel_cln.h> ++ ++/* GPIO interrupt pins connected to the LIS331DLH */ ++#define ST_ACCEL_INT1_GPIO 15 ++#define ST_ACCEL_INT2_GPIO 4 ++ ++static struct lis331dlh_intel_cln_platform_data lis331dlh_i2c_platform_data = { ++ .irq1_pin = ST_ACCEL_INT1_GPIO, ++}; ++ ++static struct gpio reserved_gpios[] = { ++ { ++ ST_ACCEL_INT1_GPIO, ++ GPIOF_IN, ++ "st_accel_i2c-int1" ++ }, ++ { ++ ST_ACCEL_INT2_GPIO, ++ GPIOF_IN, ++ "st_accel_i2c-int2" ++ }, ++}; ++ ++static struct i2c_board_info i2c_onboard_devs[] = { ++ { ++ I2C_BOARD_INFO("intel-cln-max9867", 0x18), ++ }, ++ { ++ I2C_BOARD_INFO("lis331dlh_cln", 0x19), ++ .platform_data = &lis331dlh_i2c_platform_data, ++ }, ++}; ++ ++/** ++ * intel_cln_spi_add_onboard_devs ++ * ++ * @return 0 on success or standard errnos on failure ++ * ++ * Registers onboard SPI device(s) present on the Clanton Hill platform ++ */ ++static int intel_cln_spi_add_onboard_devs(void) ++{ ++ return spi_register_board_info(spi_onboard_devs, ++ ARRAY_SIZE(spi_onboard_devs)); ++} ++ ++/** ++ * intel_cln_i2c_add_onboard_devs ++ * ++ * @return 0 on success or standard errnos on failure ++ * ++ * Registers onboard I2C device(s) present on the Clanton Hill platform ++ */ ++static int intel_cln_i2c_add_onboard_devs(void) ++{ ++ return i2c_register_board_info(0, i2c_onboard_devs, ++ ARRAY_SIZE(i2c_onboard_devs)); ++} ++ ++ ++/** ++ * intel_cln_gpio_restrict_probe ++ * ++ * Make GPIOs pertaining to Firmware inaccessible by requesting them. The ++ * GPIOs are never released nor accessed by this driver. ++ */ ++static int intel_cln_gpio_restrict_probe(struct platform_device *pdev) ++{ ++ int ret = gpio_request_array(reserved_gpios, ++ ARRAY_SIZE(reserved_gpios)); ++ if (ret == 0) ++ ret = intel_cln_spi_add_onboard_devs(); ++ ++ return ret; ++} ++ ++static struct platform_driver gpio_restrict_pdriver = { ++ .driver = { ++ .name = GPIO_RESTRICT_NAME, ++ .owner = THIS_MODULE, ++ }, ++ .probe = intel_cln_gpio_restrict_probe, ++}; ++ ++static int intel_cln_plat_clanton_hill_probe(struct platform_device *pdev) ++{ ++ int ret = 0; ++ ++ ret = intel_cln_i2c_add_onboard_devs(); ++ if (ret == 0) ++ ret = platform_driver_register(&gpio_restrict_pdriver); ++ ++ return ret; ++} ++ ++static int intel_cln_plat_clanton_hill_remove(struct platform_device *pdev) ++{ ++ return 0; ++} ++ ++static struct platform_driver cln_clanton_hill_driver = { ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++ .probe = intel_cln_plat_clanton_hill_probe, ++ .remove = intel_cln_plat_clanton_hill_remove, ++}; ++ ++module_platform_driver(cln_clanton_hill_driver); ++ ++MODULE_AUTHOR("Bryan O'Donoghue <bryan.odonoghue@intel.com>"); ++MODULE_DESCRIPTION("Clanton Hill BSP Data"); ++MODULE_LICENSE("Dual BSD/GPL"); ++MODULE_ALIAS("platform:"DRIVER_NAME); ++ +diff --git a/drivers/platform/x86/quark/intel_cln_plat_clanton_peak.c b/drivers/platform/x86/quark/intel_cln_plat_clanton_peak.c +new file mode 100644 +index 0000000..27ca0ea +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_plat_clanton_peak.c +@@ -0,0 +1,92 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton Legacy Platform Data Layout.conf accessor ++ * ++ * Simple Legacy SPI flash access layer ++ * ++ * Author : Bryan O'Donoghue <bryan.odonoghue@linux.intel.com> 2013 ++ */ ++ ++#include <linux/errno.h> ++#include <linux/gpio.h> ++#include <linux/io.h> ++#include <linux/ioport.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/printk.h> ++#include <linux/spi/spi.h> ++ ++#define DRIVER_NAME "cln-plat-clanton-peak" ++ ++static struct spi_board_info spi_onboard_devs[] = { ++ { ++ .modalias = "spidev", ++ .chip_select = 0, ++ .max_speed_hz = 50000000, ++ .bus_num = 0, ++ }, ++ { ++ .modalias = "spidev", ++ .chip_select = 0, ++ .max_speed_hz = 50000000, ++ .bus_num = 1, ++ }, ++}; ++ ++ ++/** ++ * intel_cln_spi_add_onboard_devs ++ * ++ * @return 0 on success or standard errnos on failure ++ * ++ * Registers onboard SPI device(s) present on the Clanton Peak platform ++ */ ++static int intel_cln_spi_add_onboard_devs(void) ++{ ++ return spi_register_board_info(spi_onboard_devs, ++ ARRAY_SIZE(spi_onboard_devs)); ++} ++ ++static int intel_cln_plat_clanton_peak_probe(struct platform_device *pdev) ++{ ++ return intel_cln_spi_add_onboard_devs(); ++} ++ ++static int intel_cln_plat_clanton_peak_remove(struct platform_device *pdev) ++{ ++ return 0; ++} ++ ++static struct platform_driver clanton_peak_driver = { ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++ .probe = intel_cln_plat_clanton_peak_probe, ++ .remove = intel_cln_plat_clanton_peak_remove, ++}; ++ ++module_platform_driver(clanton_peak_driver); ++ ++MODULE_AUTHOR("Bryan O'Donoghue <bryan.odonoghue@intel.com>"); ++MODULE_DESCRIPTION("Clanton Peak BSP Data"); ++MODULE_LICENSE("Dual BSD/GPL"); ++MODULE_ALIAS("platform:"DRIVER_NAME); +diff --git a/drivers/platform/x86/quark/intel_cln_plat_cross_hill.c b/drivers/platform/x86/quark/intel_cln_plat_cross_hill.c +new file mode 100644 +index 0000000..b79ce01 +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_plat_cross_hill.c +@@ -0,0 +1,387 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton Legacy Platform Data Layout.conf accessor ++ * ++ * Simple Legacy SPI flash access layer ++ * ++ * Author : Bryan O'Donoghue <bryan.odonoghue@linux.intel.com> 2013 ++ */ ++ ++#include <linux/errno.h> ++#include <linux/gpio.h> ++#include <linux/io.h> ++#include <linux/ioport.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/printk.h> ++#include <linux/spi/pxa2xx_spi.h> ++#include <linux/spi/spi.h> ++ ++#define DRIVER_NAME "cln-plat-cross-hill" ++#define GPIO_RESTRICT_NAME_NC "cln-gpio-restrict-nc" ++#define GPIO_RESTRICT_NAME_SC "cln-gpio-restrict-sc" ++ ++/* ++ * GPIO numbers to use for reading 4-bit Blackburn Peak SPI daughterboard ID ++ */ ++#define SPI_BPEAK_RESET_GPIO 4 ++#define SPI_BPEAK_ID0_GPIO 3 ++#define SPI_BPEAK_ID1_GPIO 2 ++#define SPI_BPEAK_ID2_GPIO 15 ++#define SPI_BPEAK_ID3_GPIO 14 ++ ++static int nc_gpio_reg; ++static int sc_gpio_reg; ++ ++static int cross_hill_probe; ++ ++/* ++ * Blackburn Peak SPI daughterboard ID values ++ */ ++enum { ++ CLN_SPI_BPEAK_ID_ZB_TI = 0xA, ++ CLN_SPI_BPEAK_ID_ZB_DIGI, ++ CLN_SPI_BPEAK_ID_ZB_INFR_NXP, ++ CLN_SPI_BPEAK_ID_ZB_EXEGIN_ATMEL, ++ CLN_SPI_BPEAK_ID_ADC_MAXIM, ++ CLN_SPI_BPEAK_ID_NONE ++}; ++ ++ ++/****************************************************************************** ++ * Analog Devices AD7298 SPI Device Platform Data ++ ******************************************************************************/ ++#include "linux/platform_data/ad7298.h" ++ ++/* Maximum input voltage allowed for each ADC input, in milliVolts */ ++#define AD7298_MAX_EXT_VIN 5000 ++ ++static const struct ad7298_platform_data ad7298_platform_data = { ++ .ext_ref = false, ++ .ext_vin_max = { AD7298_MAX_EXT_VIN, AD7298_MAX_EXT_VIN, ++ AD7298_MAX_EXT_VIN, AD7298_MAX_EXT_VIN, ++ AD7298_MAX_EXT_VIN, AD7298_MAX_EXT_VIN, ++ AD7298_MAX_EXT_VIN, AD7298_MAX_EXT_VIN } ++}; ++ ++/****************************************************************************** ++ * Intel Clanton SPI Controller Data ++ ******************************************************************************/ ++static struct pxa2xx_spi_chip cln_ffrd_spi_0_cs_0 = { ++ .gpio_cs = 8, ++}; ++ ++static struct pxa2xx_spi_chip cln_ffrd_spi_1_cs_0 = { ++ .gpio_cs = 10, ++}; ++ ++static struct pxa2xx_spi_chip cln_ffrd_spi_1_cs_1 = { ++ .gpio_cs = 11, ++}; ++ ++static struct spi_board_info spi_generic_devs[] = { ++ { ++ .modalias = "spidev", ++ .max_speed_hz = 50000000, ++ .platform_data = NULL, ++ .mode = SPI_MODE_0, ++ .bus_num = 1, ++ .chip_select = 0, ++ .controller_data = &cln_ffrd_spi_1_cs_0, ++ }, ++ ++ { ++ .modalias = "spidev", ++ .max_speed_hz = 50000000, ++ .platform_data = NULL, ++ .mode = SPI_MODE_0, ++ .bus_num = 1, ++ .chip_select = 1, ++ .controller_data = &cln_ffrd_spi_1_cs_1, ++ }, ++ ++}; ++ ++static struct spi_board_info spi_energy_adc_devs[] = { ++ { ++ .modalias = "max78m6610_lmu", ++ .max_speed_hz = 2000000, ++ .platform_data = NULL, ++ .mode = SPI_MODE_3, ++ .bus_num = 1, ++ .chip_select = 0, ++ .controller_data = &cln_ffrd_spi_1_cs_0, ++ }, ++}; ++ ++ ++ ++/** ++ * intel_cln_spi_add_onboard_devs ++ * ++ * @return 0 on success or standard errnos on failure ++ * ++ * Registers onboard SPI device(s) present on the Cross Hill platform ++ */ ++static int intel_cln_spi_add_onboard_devs(void) ++{ ++ struct spi_board_info spi_onboard_devs[] = { ++ { ++ .modalias = "ad7298", ++ .max_speed_hz = 5000000, ++ .platform_data = &ad7298_platform_data, ++ .mode = SPI_MODE_2, ++ .bus_num = 0, ++ .chip_select = 0, ++ .controller_data = &cln_ffrd_spi_0_cs_0, ++ }, ++ }; ++ ++ return spi_register_board_info(spi_onboard_devs, ++ ARRAY_SIZE(spi_onboard_devs)); ++} ++ ++ ++/** ++ * intel_cln_spi_get_bpeak_id ++ * ++ * @param bpeak_id: The Blackburn Peak SPI ID obtained from the daughterboard ++ * @return 0 on success or standard errnos on failure ++ * ++ * Reads an ID from GPIO-connected pins on Blackburn peak SPI daughterboard ++ */ ++static int intel_cln_spi_get_bpeak_id(u8 *bpeak_id) ++{ ++ int ret = 0; ++ struct gpio spi_bpeak_id_gpios[] = { ++ { ++ SPI_BPEAK_RESET_GPIO, ++ GPIOF_OUT_INIT_HIGH, ++ "spi_bpeak_reset" ++ }, ++ { ++ SPI_BPEAK_ID0_GPIO, ++ GPIOF_IN, ++ "spi_bpeak_id0" ++ }, ++ { ++ SPI_BPEAK_ID1_GPIO, ++ GPIOF_IN, ++ "spi_bpeak_id1" ++ }, ++ { ++ SPI_BPEAK_ID2_GPIO, ++ GPIOF_IN, ++ "spi_bpeak_id2" ++ }, ++ { ++ SPI_BPEAK_ID3_GPIO, ++ GPIOF_IN, ++ "spi_bpeak_id3" ++ } ++ }; ++ ++ /* ++ * Read a 4-bit ID value from ID GPIO inputs, which are only valid ++ * while a RESET GPIO output is asserted (active-low) ++ */ ++ ret = gpio_request_array(spi_bpeak_id_gpios, ++ ARRAY_SIZE(spi_bpeak_id_gpios)); ++ if (ret) { ++ pr_err("%s: Failed to allocate Blackburn Peak ID GPIO pins\n", ++ __func__); ++ return ret; ++ } ++ ++ gpio_set_value(SPI_BPEAK_RESET_GPIO, 0); ++ *bpeak_id = ++ (gpio_get_value(SPI_BPEAK_ID3_GPIO) ? 1 << 3 : 0) | ++ (gpio_get_value(SPI_BPEAK_ID2_GPIO) ? 1 << 2 : 0) | ++ (gpio_get_value(SPI_BPEAK_ID1_GPIO) ? 1 << 1 : 0) | ++ (gpio_get_value(SPI_BPEAK_ID0_GPIO) ? 1 : 0); ++ gpio_set_value(SPI_BPEAK_RESET_GPIO, 1); ++ ++ gpio_free_array(spi_bpeak_id_gpios, ++ ARRAY_SIZE(spi_bpeak_id_gpios)); ++ ++ return 0; ++} ++ ++/** ++ * intel_cln_spi_add_bpeak_devs ++ * ++ * @return 0 on success or standard errnos on failure ++ * ++ * Registers SPI device(s) indicated by the ID value obtained from a ++ * Blackburn Peak SPI daughterboard ++ */ ++static int intel_cln_spi_add_bpeak_devs(void) ++{ ++ u8 spi_bpeak_id = 0; ++ int ret = 0; ++ ++ ret = intel_cln_spi_get_bpeak_id(&spi_bpeak_id); ++ if (ret) { ++ pr_err("%s: failed to obtain Blackburn Peak ID\n", ++ __func__); ++ return ret; ++ } ++ ++ switch (spi_bpeak_id) { ++ ++ case CLN_SPI_BPEAK_ID_NONE: ++ break; ++ ++ case CLN_SPI_BPEAK_ID_ADC_MAXIM: ++ { ++ return spi_register_board_info(spi_energy_adc_devs, ++ ARRAY_SIZE(spi_energy_adc_devs)); ++ } ++ case CLN_SPI_BPEAK_ID_ZB_EXEGIN_ATMEL: ++ { ++ pr_debug("CLN_SPI_BPEAK_ID_ZB_EXEGIN_ATMEL.\n"); ++ return spi_register_board_info(spi_generic_devs, ++ ARRAY_SIZE(spi_generic_devs)); ++ } ++ case CLN_SPI_BPEAK_ID_ZB_DIGI: ++ { ++ pr_debug("CLN_SPI_BPEAK_ID_ZB_DIGI load.\n"); ++ return spi_register_board_info(spi_generic_devs, ++ ARRAY_SIZE(spi_generic_devs)); ++ ++ } ++ default: ++ pr_err("%s: Unsupported Blackburn Peak SPI ID %u\n", ++ __func__, spi_bpeak_id); ++ ret = -EINVAL; ++ } ++ ++ return ret; ++} ++ ++/** intel_cln_spi_devs_addon ++ * ++ * addon spi device when gpio support in place ++ */ ++static int intel_cln_spi_devs_addon(void) ++{ ++ int ret = 0; ++ ++ if (cross_hill_probe != 1) { ++ ++ ret = intel_cln_spi_add_onboard_devs(); ++ if (ret) ++ return ret; ++ ++ ret = intel_cln_spi_add_bpeak_devs(); ++ ++ cross_hill_probe = 1; ++ } ++ ++ return ret; ++} ++ ++/** ++ * intel_cln_gpio_restrict_probe_nc ++ * ++ * Make GPIOs pertaining to Firmware inaccessible by requesting them. The ++ * GPIOs are never released nor accessed by this driver. ++ */ ++static int intel_cln_gpio_restrict_probe_nc(struct platform_device *pdev) ++{ ++ int ret; ++ nc_gpio_reg = 1; ++ ++ if (nc_gpio_reg == 1 && sc_gpio_reg == 1) { ++ ret = intel_cln_spi_devs_addon(); ++ if (ret) ++ return ret; ++ } ++ return 0; ++} ++ ++/** ++ * intel_cln_gpio_restrict_probe_sc ++ * ++ * Make GPIOs pertaining to Firmware inaccessible by requesting them. The ++ * GPIOs are never released nor accessed by this driver. ++ */ ++static int intel_cln_gpio_restrict_probe_sc(struct platform_device *pdev) ++{ ++ int ret; ++ sc_gpio_reg = 1; ++ ++ if (nc_gpio_reg == 1 && sc_gpio_reg == 1) { ++ ret = intel_cln_spi_devs_addon(); ++ if (ret) ++ return ret; ++ } ++ return 0; ++} ++ ++static struct platform_driver gpio_restrict_pdriver_nc = { ++ .driver = { ++ .name = GPIO_RESTRICT_NAME_NC, ++ .owner = THIS_MODULE, ++ }, ++ .probe = intel_cln_gpio_restrict_probe_nc, ++}; ++ ++static struct platform_driver gpio_restrict_pdriver_sc = { ++ .driver = { ++ .name = GPIO_RESTRICT_NAME_SC, ++ .owner = THIS_MODULE, ++ }, ++ .probe = intel_cln_gpio_restrict_probe_sc, ++}; ++ ++static int intel_cln_plat_cross_hill_probe(struct platform_device *pdev) ++{ ++ int ret = 0; ++ ++ ret = platform_driver_register(&gpio_restrict_pdriver_nc); ++ if (ret) ++ return ret; ++ ++ return platform_driver_register(&gpio_restrict_pdriver_sc); ++} ++ ++static int intel_cln_plat_cross_hill_remove(struct platform_device *pdev) ++{ ++ return 0; ++} ++ ++static struct platform_driver cln_cross_hill_driver = { ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++ .probe = intel_cln_plat_cross_hill_probe, ++ .remove = intel_cln_plat_cross_hill_remove, ++}; ++ ++module_platform_driver(cln_cross_hill_driver); ++ ++MODULE_AUTHOR("Bryan O'Donoghue <bryan.odonoghue@intel.com>"); ++MODULE_DESCRIPTION("Cross Hill BSP Data"); ++MODULE_LICENSE("Dual BSD/GPL"); ++MODULE_ALIAS("platform:"DRIVER_NAME); ++ +diff --git a/drivers/platform/x86/quark/intel_cln_plat_data.c b/drivers/platform/x86/quark/intel_cln_plat_data.c +new file mode 100644 +index 0000000..059fcee +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_plat_data.c +@@ -0,0 +1,455 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton Legacy Platform Data Layout.conf accessor ++ * ++ * Simple Legacy SPI flash access layer ++ * ++ * Author : Bryan O'Donoghue <bryan.odonoghue@linux.intel.com> 2013 ++ */ ++ ++#include <asm/io.h> ++#include <linux/crc32.h> ++#include <linux/crc32c.h> ++#include <linux/errno.h> ++#include <linux/ioport.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/platform_data/clanton.h> ++#include <linux/printk.h> ++#include <linux/slab.h> ++ ++#define PREFIX "CLN-PLT: " ++#define PLAT_MAGIC 0x54414450 /* PDAT */ ++#define DESC_LEN 0x0A ++#define MAC_STRLEN 20 ++#define MAC_LEN 6 ++ ++struct cln_plat_dat_hdr { ++ uint32_t magic; ++ uint32_t length; ++ uint32_t crc32; ++}; ++ ++struct cln_plat_data { ++ uint16_t plat_id; ++ uint16_t length; ++ uint8_t desc[DESC_LEN]; ++ uint16_t version; ++}; ++ ++struct cln_bsp_reg { ++ struct platform_device pdev; ++ cln_plat_id_t id; ++}; ++ ++static struct cln_bsp_reg bsp_data [] = { ++ { ++ .pdev.name = "cln-plat-clanton-peak", ++ .pdev.id = -1, ++ .id = CLANTON_PEAK, ++ }, ++ { ++ .pdev.name = "cln-plat-kips-bay", ++ .pdev.id = -1, ++ .id = KIPS_BAY, ++ }, ++ { ++ .pdev.name = "cln-plat-cross-hill", ++ .pdev.id = -1, ++ .id = CROSS_HILL, ++ }, ++ { ++ .pdev.name = "cln-plat-clanton-hill", ++ .pdev.id = -1, ++ .id = CLANTON_HILL, ++ }, ++ { ++ .pdev.name = "cln-plat-galileo", ++ .pdev.id = -1, ++ .id = IZMIR, ++ }, ++ ++}; ++ ++/** ++ * struct cln_plat_data_list ++ * ++ * Structure to hold a linked list of platform data refs ++ */ ++struct cln_plat_data_list { ++ char name[DESC_LEN+1]; ++ struct cln_plat_data * plat_data; ++ struct kobj_attribute plat_attr; ++ struct list_head list; ++}; ++ ++static char __iomem * plat_data; ++static char * plat_bin_name = "pdat_bin"; ++static unsigned int plat_bin_size; ++static struct cln_plat_dat_hdr * plat_hdr; ++static struct list_head entry_list; ++ ++/** ++ * intel_cln_plat_sysfs_show_bin ++ * ++ * Generic show routine for any of the sysfs entries of this module ++ */ ++static ssize_t intel_cln_plat_sysfs_show_bin(struct kobject *kobj, ++ struct kobj_attribute *attr, char *buf) ++{ ++ ssize_t plen = plat_bin_size; ++ if( plen > PAGE_SIZE ) ++ plen = PAGE_SIZE; ++ ++ memcpy(buf, plat_data, plen); ++ return plen; ++} ++ ++/** ++ * intel_cln_plat_sysfs_show ++ * ++ * Generic show routine for any of the sysfs entries of this module ++ */ ++static ssize_t intel_cln_plat_sysfs_show(struct kobject *kobj, ++ struct kobj_attribute *attr, char *buf) ++{ ++ unsigned char * data; ++ char fmt[0x20]; ++ struct cln_plat_data_list * plat_item_list; ++ ssize_t plen = 0; ++ ++ list_for_each_entry(plat_item_list, &entry_list, list){ ++ if ( attr == &plat_item_list->plat_attr ){ ++ ++ /* Derive length */ ++ plen = plat_item_list->plat_data->length; ++ if (unlikely(plen > PAGE_SIZE)) ++ plen = PAGE_SIZE; ++ ++ /* Hook data */ ++ data =(char*)(plat_item_list->plat_data); ++ data += +sizeof(struct cln_plat_data); ++ ++ /* Enumrate return */ ++ switch (plat_item_list->plat_data->plat_id){ ++ case PLAT_DATA_ID: ++ case PLAT_DATA_SN: ++ snprintf(fmt, sizeof(fmt), "0x%%0%dx\n", ++ plen*2); ++ return sprintf(buf, fmt, *(int16_t*)data); ++ case PLAT_DATA_MAC0: ++ case PLAT_DATA_MAC1: ++ if (unlikely(plen != MAC_LEN)){ ++ return sprintf(buf, "invalid mac\n"); ++ } ++ return snprintf(buf, MAC_STRLEN, ++ "%02x:%02x:%02x:%02x:%02x:%02x\n", ++ data[0], data[1], data[2], data[3], ++ data[4], data[5]); ++ default: ++ /* Treat as string data */ ++ return snprintf(buf, plen, "%s", data); ++ } ++ } ++ } ++ return 0; ++} ++ ++/** ++ * intel_cln_plat_cleanup ++ * ++ * Generic cleanup code for the platform data interface ++ * ++ */ ++static void intel_cln_plat_cleanup (void) ++{ ++ extern struct kobject * board_data_kobj; ++ struct cln_plat_data_list * plat_item_list; ++ ++ if (plat_data != NULL){ ++ iounmap(plat_data); ++ plat_data = NULL; ++ } ++ ++ list_for_each_entry(plat_item_list, &entry_list, list){ ++ sysfs_remove_file(board_data_kobj, ++ &plat_item_list->plat_attr.attr); ++ kfree(plat_item_list); ++ } ++} ++ ++/** ++ * intel_cln_plat_get_desc_len ++ * ++ * @param desc: Pointer to desc string ++ * @return len on success < 0 failure ++ * ++ * Function called to get a bounds checked desc field from platfrom data ++ * ++ */ ++static int intel_cln_plat_get_desc_len (char * desc) ++{ ++ int len = 0; ++ if (desc == NULL){ ++ return -EINVAL; ++ } ++ ++ for(; *desc != '\0' && len < DESC_LEN; desc++, len++); ++ return len; ++} ++ ++/** ++ * intel_cln_get_id ++ * ++ * @return platform id on success or < CLANTON_PLAT_UNDEFINED on error ++ * ++ * Function called to get platform id ++ * ++ */ ++cln_plat_id_t intel_cln_plat_get_id(void) ++{ ++ unsigned char * data; ++ struct cln_plat_data_list * plat_item_list; ++ ++ if (plat_data == NULL) ++ return CLANTON_PLAT_UNDEFINED; ++ ++ list_for_each_entry(plat_item_list, &entry_list, list){ ++ ++ /* Enumrate return */ ++ if(plat_item_list->plat_data->plat_id == PLAT_DATA_ID){ ++ ++ /* Hook data */ ++ data =(char*)(plat_item_list->plat_data); ++ data += +sizeof(struct cln_plat_data); ++ ++ /* Return payload */ ++ return *(int16_t*)data; ++ } ++ } ++ return CLANTON_PLAT_UNDEFINED; ++} ++EXPORT_SYMBOL(intel_cln_plat_get_id); ++ ++/** ++ * intel_cln_plat_get_mac ++ * ++ * @param id: Index of MAC address to find ++ * @param mac: Output parameter for mac address ++ * ++ * @return 0 success < 0 failure ++ * ++ * Function called to remove the platfrom device from kernel space ++ * ++ */ ++int intel_cln_plat_get_mac(plat_dataid_t id, char * mac) ++{ ++ unsigned char * data; ++ unsigned int plen = 0; ++ struct cln_plat_data_list * plat_item_list; ++ ++ if ((id != PLAT_DATA_MAC0 && id != PLAT_DATA_MAC1) || mac == NULL){ ++ pr_err("invalid input id %d mac %p\n", id, mac); ++ return -EINVAL; ++ } ++ ++ list_for_each_entry(plat_item_list, &entry_list, list){ ++ if(plat_item_list->plat_data->plat_id == id){ ++ ++ /* Derive length */ ++ plen = plat_item_list->plat_data->length; ++ if (unlikely(plen != MAC_LEN)){ ++ pr_err("%s mac len invalid!\n", __func__); ++ return -ENODEV; ++ } ++ ++ /* Hook data */ ++ data =(char*)(plat_item_list->plat_data); ++ data += +sizeof(struct cln_plat_data); ++ ++ /* Good to go */ ++ memcpy(mac, data, MAC_LEN); ++ return 0; ++ } ++ } ++ return -ENODEV; ++} ++EXPORT_SYMBOL(intel_cln_plat_get_mac); ++ ++ ++/** ++ * intel_cln_plat_probe ++ * ++ * @param pdev: Pointer to platform device ++ * @return 0 success < 0 failure ++ * ++ * Function called to probe platform device "cln-plat" ++ * ++ */ ++int intel_cln_plat_probe(struct resource * pres) ++{ ++ char __iomem * end_addr = NULL; ++ char __iomem * data = NULL; ++ cln_plat_id_t id = CLANTON_PLAT_UNDEFINED; ++ extern struct kobject * board_data_kobj; ++ struct cln_plat_data * plat_item = NULL; ++ struct cln_plat_data_list * plat_item_list = NULL; ++ u32 crc = 0; ++ int ret = 0, i = 0; ++ ++ INIT_LIST_HEAD(&entry_list); ++ plat_hdr = ioremap(pres->start, resource_size(pres)); ++ end_addr = (char*)plat_hdr + resource_size(pres); ++ plat_data = (char*)plat_hdr; ++ if (!plat_hdr) ++ return -ENODEV; ++ ++ /* Verify header magic */ ++ if (plat_hdr->magic != PLAT_MAGIC){ ++ pr_err(PREFIX"Expected magic 0x%08x read 0x%08lx\n", ++ PLAT_MAGIC, (unsigned long)plat_hdr->magic); ++ } ++ ++ /* Validate length is sane */ ++ if ((char*)plat_hdr + plat_hdr->length > end_addr || ++ plat_hdr->length < sizeof(struct cln_plat_data)){ ++ pr_err(PREFIX"Invalid length 0x%08lx\n", ++ (unsigned long)plat_hdr->length); ++ return -ENODEV; ++ } ++ ++ /* Point to real end addr */ ++ end_addr = (char*)plat_hdr + ++ sizeof(struct cln_plat_dat_hdr) + plat_hdr->length; ++ plat_bin_size = end_addr - plat_data; ++ ++ /* Get pointer to start of data */ ++ plat_item = (struct cln_plat_data*)(plat_hdr+1); ++ data = ((char*)(plat_item)+sizeof(struct cln_plat_data)); ++ ++ /* Validate CRC32 */ ++ crc = ~crc32(0xFFFFFFFF, plat_item, plat_hdr->length); ++ if (crc != plat_hdr->crc32){ ++ pr_err(PREFIX"CRC 0x%08x header indicates 0x%08x - fatal!\n", ++ crc, plat_hdr->crc32); ++ return -EFAULT; ++ } ++ ++ /* /sys/firmware/board_data/plat_bin - dump entire platform binary */ ++ plat_item_list = kzalloc(sizeof(struct cln_plat_data_list), ++ GFP_KERNEL); ++ if (unlikely(plat_item_list == NULL)) { ++ pr_err("kzalloc fail !\n"); ++ intel_cln_plat_cleanup(); ++ return -ENOMEM; ++ } ++ sysfs_attr_init(&plat_item_list->plat_attr.attr); ++ plat_item_list->plat_attr.attr.name = plat_bin_name; ++ plat_item_list->plat_attr.attr.mode = 0644; ++ plat_item_list->plat_attr.show = intel_cln_plat_sysfs_show_bin; ++ ++ ret = sysfs_create_file(board_data_kobj, ++ &plat_item_list->plat_attr.attr); ++ if (unlikely(ret != 0)){ ++ intel_cln_plat_cleanup(); ++ pr_err("failed to create sysfs entry\n"); ++ return ret; ++ } ++ ++ /* Add to list */ ++ list_add(&plat_item_list->list, &entry_list); ++ ++ /* Iterate through each entry - add sysfs entry as appropriate */ ++ while ( (char*)plat_item < end_addr){ ++ ++ /* Bounds check */ ++ if (data + plat_item->length > end_addr){ ++ pr_err(PREFIX"Data 0x%p over-runs max-addr 0x%p\n", ++ data, end_addr); ++ break; ++ } ++ ++ /* Extract data */ ++ switch(plat_item->plat_id){ ++ case PLAT_DATA_ID: ++ id = *((uint16_t*)data); ++ pr_info(PREFIX"Clanton Platform ID = %d\n", id); ++ break; ++ case PLAT_DATA_SN: ++ case PLAT_DATA_MAC0: ++ case PLAT_DATA_MAC1: ++ break; ++ default: ++ /* Unknown identifier */ ++ break; ++ } ++ ++ plat_item_list = kzalloc(sizeof(struct cln_plat_data_list), ++ GFP_KERNEL); ++ if (unlikely(plat_item_list == NULL)) { ++ pr_err("kzalloc fail !\n"); ++ intel_cln_plat_cleanup(); ++ return -ENOMEM; ++ } ++ ++ /* Get name of entity */ ++ i = intel_cln_plat_get_desc_len(plat_item->desc); ++ if (i <= 0){ ++ pr_err("desc len is %d!\n", i); ++ intel_cln_plat_cleanup(); ++ return i; ++ } ++ ++ memcpy(plat_item_list->name, plat_item->desc, i); ++ plat_item_list->plat_data = plat_item; ++ ++ sysfs_attr_init(&plat_item_list->plat_attr.attr); ++ plat_item_list->plat_attr.attr.name = plat_item_list->name; ++ plat_item_list->plat_attr.attr.mode = 0644; ++ plat_item_list->plat_attr.show = intel_cln_plat_sysfs_show; ++ ++ ret = sysfs_create_file(board_data_kobj, ++ &plat_item_list->plat_attr.attr); ++ if (unlikely(ret != 0)){ ++ intel_cln_plat_cleanup(); ++ pr_err("failed to create sysfs entry\n"); ++ return ret; ++ } ++ ++ /* Add to list */ ++ list_add(&plat_item_list->list, &entry_list); ++ ++ /* Next */ ++ plat_item = (struct cln_plat_data*) ++ (((char*)plat_item) + plat_item->length + sizeof(struct cln_plat_data)); ++ data = ((char*)(plat_item) + sizeof(struct cln_plat_data)); ++ } ++ ++ /* Register BSP enabling platform code */ ++ for (i = 0; i < sizeof(bsp_data)/sizeof(struct cln_bsp_reg); i++){ ++ if (bsp_data[i].id == id){ ++ platform_device_register(&bsp_data[i].pdev); ++ } ++ } ++ ++ return ret; ++} ++EXPORT_SYMBOL(intel_cln_plat_probe); +diff --git a/drivers/platform/x86/quark/intel_cln_plat_galileo.c b/drivers/platform/x86/quark/intel_cln_plat_galileo.c +new file mode 100644 +index 0000000..48ce294 +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_plat_galileo.c +@@ -0,0 +1,264 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton Legacy Platform Data Layout.conf accessor ++ * ++ * Simple Legacy SPI flash access layer ++ * ++ * Author : Bryan O'Donoghue <bryan.odonoghue@linux.intel.com> 2013 ++ */ ++ ++#include <linux/errno.h> ++#include <linux/gpio.h> ++#include <linux/i2c.h> ++#include <linux/i2c/at24.h> ++#include <linux/io.h> ++#include <linux/ioport.h> ++#include <linux/module.h> ++#include <linux/mtd/partitions.h> ++#include <linux/mtd/physmap.h> ++#include <linux/platform_device.h> ++#include <linux/printk.h> ++#include <linux/spi/pxa2xx_spi.h> ++#include <linux/spi/spi.h> ++#include <linux/spi/flash.h> ++#include <linux/i2c/at24.h> ++ ++#define DRIVER_NAME "cln-plat-galileo" ++#define GPIO_RESTRICT_NAME "cln-gpio-restrict-sc" ++#define LPC_SCH_SPINAME "spi-lpc-sch" ++ ++#define CLN_SPI_MAX_CLK_DEFAULT 5000000 ++ ++/****************************************************************************** ++ * Analog Devices AD7298 SPI Device Platform Data ++ ******************************************************************************/ ++#include "linux/platform_data/ad7298.h" ++ ++/* Maximum input voltage allowed for each ADC input, in milliVolts */ ++#define AD7298_MAX_EXT_VIN 5000 ++ ++static const struct ad7298_platform_data ad7298_platform_data = { ++ .ext_ref = false, ++ .ext_vin_max = { AD7298_MAX_EXT_VIN, AD7298_MAX_EXT_VIN, ++ AD7298_MAX_EXT_VIN, AD7298_MAX_EXT_VIN, ++ AD7298_MAX_EXT_VIN, AD7298_MAX_EXT_VIN, ++ AD7298_MAX_EXT_VIN, AD7298_MAX_EXT_VIN } ++}; ++ ++static struct at24_platform_data at24_platform_data = { ++ .byte_len = (11 * 1024), ++ .page_size = 1, ++ .flags = AT24_FLAG_ADDR16, ++}; ++ ++/****************************************************************************** ++ * Intel Izmir i2c clients ++ ******************************************************************************/ ++static struct i2c_board_info __initdata galileo_i2c_board_info[] = { ++ { ++ /* Note following address may change at driver load time */ ++ I2C_BOARD_INFO("cy8c9540a", 0x20), ++ }, ++ { ++ I2C_BOARD_INFO("at24", 0x50), ++ .platform_data = &at24_platform_data, ++ }, ++}; ++ ++/****************************************************************************** ++ * Intel Clanton SPI Controller Data ++ ******************************************************************************/ ++static struct pxa2xx_spi_chip cln_ffrd_spi_0_cs_0 = { ++ .gpio_cs = 8, ++}; ++ ++static struct pxa2xx_spi_chip cln_ffrd_spi_1_cs_0 = { ++ .gpio_cs = 10, ++}; ++ ++#define LPC_SCH_SPI_BUS_ID 0x03 ++ ++static struct platform_device lpc_sch_spi = { ++ .name = "spi-lpc-sch-drv", ++ .id = LPC_SCH_SPI_BUS_ID, ++}; ++ ++/* TODO: extract this data from layout.conf encoded in flash */ ++struct mtd_partition ilb_partitions [] = { ++ { ++ .name = "grub", ++ .size = 4096, ++ .offset = 0, ++ }, ++ { ++ .name = "grub.conf", ++ .size = 0xA00, ++ .offset = 0x50500, ++ }, ++ { ++ .name = "layout.conf", ++ .size = 4096, ++ .offset = 0x708000, ++ }, ++ { ++ .name = "sketch", ++ .size = 0x40000, ++ .offset = 0x750000, ++ }, ++ { ++ .name = "raw", ++ .size = 8192000, ++ .offset = 0, ++ ++ }, ++}; ++ ++static struct flash_platform_data ilb_flash = { ++ .type = "s25fl064k", ++ .parts = ilb_partitions, ++ .nr_parts = ARRAY_SIZE(ilb_partitions), ++}; ++ ++static struct spi_board_info spi_onboard_devs[] = { ++ { ++ .modalias = "m25p80", ++ .platform_data = &ilb_flash, ++ .bus_num = LPC_SCH_SPI_BUS_ID, ++ .chip_select = 0, ++ }, ++ { ++ .modalias = "ad7298", ++ .max_speed_hz = CLN_SPI_MAX_CLK_DEFAULT, ++ .platform_data = &ad7298_platform_data, ++ .mode = SPI_MODE_2, ++ .bus_num = 0, ++ .chip_select = 0, ++ .controller_data = &cln_ffrd_spi_0_cs_0, ++ }, ++ { ++ .modalias = "spidev", ++ .chip_select = 0, ++ .controller_data = &cln_ffrd_spi_1_cs_0, ++ .max_speed_hz = 50000000, ++ .bus_num = 1, ++ }, ++}; ++ ++/** ++ * intel_cln_spi_add_onboard_devs ++ * ++ * @return 0 on success or standard errnos on failure ++ * ++ * Registers onboard SPI device(s) present on the Izmir platform ++ */ ++static int intel_cln_spi_add_onboard_devs(void) ++{ ++ ++ return spi_register_board_info(spi_onboard_devs, ++ ARRAY_SIZE(spi_onboard_devs)); ++} ++ ++ ++/** ++ * intel_cln_gpio_restrict_probe ++ * ++ * Make GPIOs pertaining to Firmware inaccessible by requesting them. The ++ * GPIOs are never released nor accessed by this driver. ++ */ ++static int intel_cln_gpio_restrict_probe(struct platform_device *pdev) ++{ ++ int ret = 0; ++ ++ ret = intel_cln_spi_add_onboard_devs(); ++ ++ return ret; ++} ++ ++static struct platform_driver gpio_restrict_pdriver = { ++ .driver = { ++ .name = GPIO_RESTRICT_NAME, ++ .owner = THIS_MODULE, ++ }, ++ .probe = intel_cln_gpio_restrict_probe, ++}; ++ ++/* LPC SPI */ ++static int intel_cln_plat_galileo_lpcspi_probe(struct platform_device *pdev) ++{ ++ lpc_sch_spi.resource = pdev->resource; ++ return platform_device_register(&lpc_sch_spi); ++} ++ ++static struct platform_driver intel_cln_plat_galileo_lpcspi_pdriver = { ++ .driver = { ++ .name = LPC_SCH_SPINAME, ++ .owner = THIS_MODULE, ++ }, ++ .probe = intel_cln_plat_galileo_lpcspi_probe, ++}; ++ ++static int intel_cln_plat_galileo_probe(struct platform_device *pdev) ++{ ++ int ret = 0; ++ ++ /* i2c */ ++ ret = i2c_register_board_info(0, galileo_i2c_board_info, ++ ARRAY_SIZE(galileo_i2c_board_info)); ++ if (ret) { ++ goto end; ++ } ++ ++ /* gpio */ ++ ret = platform_driver_register(&gpio_restrict_pdriver); ++ if (ret) ++ goto end; ++ ++#if 0 ++ /* legacy SPI - TBD */ ++ ret = platform_driver_register(&intel_cln_plat_galileo_lpcspi_pdriver); ++ if (ret) ++ goto end; ++#endif ++end: ++ return ret; ++} ++ ++static int intel_cln_plat_galileo_remove(struct platform_device *pdev) ++{ ++ return 0; ++} ++ ++static struct platform_driver cln_galileo_driver = { ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++ .probe = intel_cln_plat_galileo_probe, ++ .remove = intel_cln_plat_galileo_remove, ++}; ++ ++module_platform_driver(cln_galileo_driver); ++ ++MODULE_AUTHOR("Bryan O'Donoghue <bryan.odonoghue@intel.com>"); ++MODULE_DESCRIPTION("Galileo BSP Data"); ++MODULE_LICENSE("Dual BSD/GPL"); ++MODULE_ALIAS("platform:"DRIVER_NAME); ++ +diff --git a/drivers/platform/x86/quark/intel_cln_plat_kips_bay.c b/drivers/platform/x86/quark/intel_cln_plat_kips_bay.c +new file mode 100644 +index 0000000..1f3deb2 +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_plat_kips_bay.c +@@ -0,0 +1,176 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton Legacy Platform Data Layout.conf accessor ++ * ++ * Simple Legacy SPI flash access layer ++ * ++ * Author : Bryan O'Donoghue <bryan.odonoghue@linux.intel.com> 2013 ++ */ ++ ++#include <linux/errno.h> ++#include <linux/gpio.h> ++#include <linux/io.h> ++#include <linux/ioport.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/printk.h> ++#include <linux/spi/pxa2xx_spi.h> ++#include <linux/spi/spi.h> ++ ++#define DRIVER_NAME "cln-plat-kips-bay" ++#define GPIO_RESTRICT_NAME "cln-gpio-restrict-sc" ++ ++static int gpio_cs = 1; ++ ++module_param(gpio_cs, int, S_IRUGO | S_IWUSR); ++MODULE_PARM_DESC(gpio_cs, "Enable GPIO chip-select for SPI channel 1"); ++ ++ ++/****************************************************************************** ++ * Analog Devices AD7298 SPI Device Platform Data ++ ******************************************************************************/ ++#include "linux/platform_data/ad7298.h" ++ ++/* Maximum input voltage allowed for each ADC input, in milliVolts */ ++#define AD7298_MAX_EXT_VIN 5000 ++ ++static const struct ad7298_platform_data ad7298_platform_data = { ++ .ext_ref = false, ++ .ext_vin_max = { AD7298_MAX_EXT_VIN, AD7298_MAX_EXT_VIN, ++ AD7298_MAX_EXT_VIN, AD7298_MAX_EXT_VIN, ++ AD7298_MAX_EXT_VIN, AD7298_MAX_EXT_VIN, ++ AD7298_MAX_EXT_VIN, AD7298_MAX_EXT_VIN } ++}; ++ ++/****************************************************************************** ++ * Intel Clanton SPI Controller Data ++ ******************************************************************************/ ++static struct pxa2xx_spi_chip cln_ffrd_spi_0_cs_0 = { ++ .gpio_cs = 8, ++}; ++ ++static struct pxa2xx_spi_chip cln_ffrd_spi_1_cs_0 = { ++ .gpio_cs = 10, ++}; ++ ++static struct spi_board_info spi0_onboard_devs[] = { ++ { ++ .modalias = "ad7298", ++ .max_speed_hz = 5000000, ++ .platform_data = &ad7298_platform_data, ++ .mode = SPI_MODE_2, ++ .bus_num = 0, ++ .chip_select = 0, ++ .controller_data = &cln_ffrd_spi_0_cs_0, ++ } ++}; ++ ++static struct spi_board_info spi1_onboard_devs_gpiocs[] = { ++ { ++ .modalias = "spidev", ++ .chip_select = 0, ++ .controller_data = NULL, ++ .max_speed_hz = 50000000, ++ .bus_num = 1, ++ .controller_data = &cln_ffrd_spi_1_cs_0, ++ }, ++}; ++ ++static struct spi_board_info spi1_onboard_devs[] = { ++ { ++ .modalias = "spidev", ++ .chip_select = 0, ++ .controller_data = NULL, ++ .max_speed_hz = 50000000, ++ .bus_num = 1, ++ }, ++}; ++ ++/** ++ * intel_cln_spi_add_onboard_devs ++ * ++ * @return 0 on success or standard errnos on failure ++ * ++ * Registers onboard SPI device(s) present on the Kips Bay platform ++ */ ++static int intel_cln_spi_add_onboard_devs(void) ++{ ++ int ret = 0; ++ ++ ret = spi_register_board_info(spi0_onboard_devs, ++ ARRAY_SIZE(spi0_onboard_devs)); ++ if (ret) ++ return ret; ++ ++ if (gpio_cs) ++ return spi_register_board_info(spi1_onboard_devs_gpiocs, ++ ARRAY_SIZE(spi1_onboard_devs_gpiocs)); ++ else ++ return spi_register_board_info(spi1_onboard_devs, ++ ARRAY_SIZE(spi1_onboard_devs)); ++} ++ ++ ++/** ++ * intel_cln_gpio_restrict_probe ++ * ++ * Make GPIOs pertaining to Firmware inaccessible by requesting them. The ++ * GPIOs are never released nor accessed by this driver. ++ */ ++static int intel_cln_gpio_restrict_probe(struct platform_device *pdev) ++{ ++ return intel_cln_spi_add_onboard_devs(); ++} ++ ++static struct platform_driver gpio_restrict_pdriver = { ++ .driver = { ++ .name = GPIO_RESTRICT_NAME, ++ .owner = THIS_MODULE, ++ }, ++ .probe = intel_cln_gpio_restrict_probe, ++}; ++ ++static int intel_cln_plat_kips_bay_probe(struct platform_device *pdev) ++{ ++ return platform_driver_register(&gpio_restrict_pdriver); ++} ++ ++static int intel_cln_plat_kips_bay_remove(struct platform_device *pdev) ++{ ++ return 0; ++} ++ ++static struct platform_driver cln_kips_bay_driver = { ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++ .probe = intel_cln_plat_kips_bay_probe, ++ .remove = intel_cln_plat_kips_bay_remove, ++}; ++ ++module_platform_driver(cln_kips_bay_driver); ++ ++MODULE_AUTHOR("Bryan O'Donoghue <bryan.odonoghue@intel.com>"); ++MODULE_DESCRIPTION("Kips Bay BSP Data"); ++MODULE_LICENSE("Dual BSD/GPL"); ++MODULE_ALIAS("platform:"DRIVER_NAME); ++ +diff --git a/drivers/platform/x86/quark/intel_cln_sb.c b/drivers/platform/x86/quark/intel_cln_sb.c +new file mode 100644 +index 0000000..be27d6a +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_sb.c +@@ -0,0 +1,252 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton side-band driver ++ * ++ * Thread-safe sideband read/write routine. ++ * ++ * Author : Bryan O'Donoghue <bryan.odonoghue@linux.intel.com> 2012 ++ */ ++ ++#include <linux/errno.h> ++#include <linux/intel_cln_sb.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/printk.h> ++#include <linux/spinlock.h> ++#include <linux/pci.h> ++#include "intel_cln_imr.h" ++ ++#define INTEL_CLN_SB_CMD_ADDR (0x000000D0) ++#define INTEL_CLN_SB_DATA_ADDR (0x000000D4) ++ ++#define INTEL_CLN_SB_MCR_SHIFT (24) ++#define INTEL_CLN_SB_PORT_SHIFT (16) ++#define INTEL_CLN_SB_REG_SHIFT (8) ++#define INTEL_CLN_SB_BYTEEN (0xF0) /* enable all 32 bits */ ++ ++/* Simple structure for module */ ++struct intel_cln_sb_dev{ ++ struct pci_dev * pdev; ++ spinlock_t slock; ++ u8 initialized; ++}; ++ ++static struct intel_cln_sb_dev sb_dev = { ++ .initialized = 0 ++}; ++ ++/* Dependant drivers */ ++static struct platform_device pdev [] = { ++ { ++ .name = "intel-cln-esram", ++ }, ++ { ++ .name = "intel-cln-ecc", ++ }, ++ { ++ .name = "intel-cln-thrm", ++ }, ++}; ++ ++/** ++ * intel_cln_sb_read_reg ++ * ++ * @param cln_sb_id: Sideband identifier ++ * @param command: Command to send to destination identifier ++ * @param reg: Target register w/r to cln_sb_id ++ * @return nothing ++ * ++ * Utility function to allow thread-safe read of side-band ++ * command - can be different read op-code types - which is why we don't ++ * hard-code this value directly into msg ++ */ ++void intel_cln_sb_read_reg(cln_sb_id id, u8 cmd, u8 reg, u32 *data, u8 lock) ++{ ++ u32 msg = (cmd << INTEL_CLN_SB_MCR_SHIFT) | ++ ((id << INTEL_CLN_SB_PORT_SHIFT) & 0xFF0000)| ++ ((reg << INTEL_CLN_SB_REG_SHIFT) & 0xFF00)| ++ INTEL_CLN_SB_BYTEEN; ++ ++ if(data == NULL) ++ return; ++ ++ if (likely(lock == 1)) { ++ spin_lock(&sb_dev.slock); ++ } ++ ++ pci_write_config_dword(sb_dev.pdev, INTEL_CLN_SB_CMD_ADDR, msg); ++ pci_read_config_dword(sb_dev.pdev, INTEL_CLN_SB_DATA_ADDR, data); ++ ++ if(likely(lock == 1)){ ++ spin_unlock(&sb_dev.slock); ++ } ++ ++} ++EXPORT_SYMBOL(intel_cln_sb_read_reg); ++ ++/** ++ * intel_cln_sb_write_reg ++ * ++ * @param cln_sb_id: Sideband identifier ++ * @param command: Command to send to destination identifier ++ * @param reg: Target register w/r to cln_sb_id ++ * @return nothing ++ * ++ * Utility function to allow thread-safe write of side-band ++ */ ++void intel_cln_sb_write_reg(cln_sb_id id, u8 cmd, u8 reg, u32 data, u8 lock) ++{ ++ u32 msg = (cmd << INTEL_CLN_SB_MCR_SHIFT) | ++ ((id << INTEL_CLN_SB_PORT_SHIFT) & 0xFF0000)| ++ ((reg << INTEL_CLN_SB_REG_SHIFT) & 0xFF00)| ++ INTEL_CLN_SB_BYTEEN; ++ ++ if(likely(lock == 1)){ ++ spin_lock(&sb_dev.slock); ++ } ++ ++ pci_write_config_dword(sb_dev.pdev, INTEL_CLN_SB_DATA_ADDR, data); ++ pci_write_config_dword(sb_dev.pdev, INTEL_CLN_SB_CMD_ADDR, msg); ++ ++ if(likely(lock == 1)){ ++ spin_unlock(&sb_dev.slock); ++ } ++} ++EXPORT_SYMBOL(intel_cln_sb_write_reg); ++ ++/** ++ * intel_cln_sb_runfn_lock ++ * ++ * @param fn: Callback function - which requires side-band spinlock and !irq ++ * @param arg: Callback argument ++ * @return 0 on success < 0 on failure ++ * ++ * Runs the given function pointer inside of a call to the local spinlock using ++ * spin_lock_irqsave/spin_unlock_irqrestore. Needed for the eSRAMv1 driver to ++ * guarantee atomicity, but, available to any other user of sideband provided ++ * rules are respected. ++ * Rules: ++ * fn may not sleep ++ * fn may not change the state of irqs ++ */ ++int intel_cln_sb_runfn_lock(int (*fn)( void * arg ), void * arg) ++{ ++ unsigned long flags = 0; ++ int ret = 0; ++ ++ if(unlikely(fn == NULL)){ ++ return -EINVAL; ++ } ++ ++ /* Get spinlock with IRQs off */ ++ spin_lock_irqsave(&sb_dev.slock, flags); ++ ++ /* Run function atomically */ ++ ret = fn(arg); ++ ++ /* Release lock */ ++ spin_unlock_irqrestore(&sb_dev.slock, flags); ++ ++ return ret; ++} ++EXPORT_SYMBOL(intel_cln_sb_runfn_lock); ++ ++/** ++ * sb_probe ++ * ++ * @param dev: the PCI device matching ++ * @param id: entry in the match table ++ * @return 0 ++ * ++ * Callback from PCI layer when dev/vendor ids match. ++ * Sets up necessary resources ++ */ ++static int intel_cln_sb_probe(struct pci_dev *dev, const struct pci_device_id *id) ++{ ++ int i = 0; ++ ++ /* Init struct */ ++ memset(&sb_dev, 0x00, sizeof(sb_dev)); ++ ++ /* Hook device */ ++ sb_dev.pdev = dev; ++ ++ /* Init locking structures */ ++ spin_lock_init(&sb_dev.slock); ++ ++ /* Set state */ ++ sb_dev.initialized = 1; ++ ++ /* Register side-band sub-ordinate drivers */ ++ for (i = 0; i < sizeof(pdev)/sizeof(struct platform_device); i++){ ++ /* Register side-band sub-ordinate drivers */ ++ platform_device_register(&pdev[i]); ++ } ++ pr_info("Intel Clanton side-band driver registered\n"); ++ ++ /* Switch off boot-time IMRs nice and early */ ++ return intel_cln_imr_init(); ++} ++ ++/** ++ * sb_remove ++ * ++ * @param pdev: PCI device ++ * @return nothing ++ * ++ * Callback from PCI sub-system upon PCI dev removal ++ */ ++static void intel_cln_sb_remove(struct pci_dev *pdev) ++{ ++} ++ ++/* Clanton hardware */ ++struct pci_device_id intel_cln_sb_ids[] = { ++ { PCI_VDEVICE(INTEL, 0x0958), 0}, ++ { 0 } ++}; ++ ++MODULE_DEVICE_TABLE(pci, intel_cln_sb_ids); ++ ++/* PCI callbacks */ ++static struct pci_driver intel_cln_sb_driver = { ++ .name = "intel_cln_sb", ++ .id_table = intel_cln_sb_ids, ++ .probe = intel_cln_sb_probe, ++ .remove = intel_cln_sb_remove, ++}; ++ ++/** ++ * intel_cln_sb_init ++ * ++ * Module entry point ++ */ ++static int __init intel_cln_sb_init(void) ++{ ++ return pci_register_driver(&intel_cln_sb_driver); ++} ++ ++MODULE_AUTHOR("Bryan O'Donoghue <bryan.odonoghue@linux.intel.com>"); ++MODULE_DESCRIPTION("Intel Clanton SOC side-band driver"); ++MODULE_LICENSE("Dual BSD/GPL"); ++ ++/* Initialise early since other drivers eSRAM, DRAM ECC and thermal depend */ ++subsys_initcall(intel_cln_sb_init); +diff --git a/drivers/platform/x86/quark/intel_cln_smep_test.c b/drivers/platform/x86/quark/intel_cln_smep_test.c +new file mode 100644 +index 0000000..16f43db +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_smep_test.c +@@ -0,0 +1,290 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/** ++ * intel_cln_smep_test.c ++ * ++ * Simple test module to verify SMEP works as expected on MIA ++ * DO NOT RELEASE THIS FILE OUTSIDE OF CLANTON GROUP ++ * DO NOT ATTEMPT TO UPSTREAM THIS CODE - YOU WILL BE PUBLICLY EMBARRSSED ! ++ * ++ * Author : Bryan O'Donoghue <bryan.odonoghue@intel.com> ++ * ++ */ ++#include <asm/processor.h> ++#include <asm/processor-flags.h> ++#include <linux/cdev.h> ++#include <linux/crc16.h> ++#include <linux/delay.h> ++#include <linux/device.h> ++#include <linux/fs.h> ++#include <linux/module.h> ++#include <linux/platform_device.h> ++#include <linux/printk.h> ++#include <linux/slab.h> ++ ++#define DRIVER_NAME "intel_cln_smep_test" ++ ++/** ++ * struct intel_cln_smep_dev ++ * ++ * Structre to represent module state/data/etc ++ */ ++struct intel_cln_smep_test_dev{ ++ unsigned int opened; ++ struct platform_device *pldev; /* Platform device */ ++ struct cdev cdev; ++ struct mutex open_lock; ++ char * pdata; ++ u32 size; ++}; ++ ++static struct intel_cln_smep_test_dev smep_test_dev; ++static struct class *smep_test_class; ++static DEFINE_MUTEX(smep_test_mutex); ++static int smep_test_major; ++static char * name = "testmap"; ++ ++/** ++ * smep_test_ioctl ++ * ++ * Allows user-space to command kernel switch SMEP on/off ++ */ ++static long smep_test_ioctl(struct file *file, unsigned int cmd, ++ unsigned long arg) ++{ ++ int cr4 = 0; ++ ++ cr4 = read_cr4(); ++ printk(KERN_INFO "%s entry CR4 is 0x%08x\n", __FUNCTION__, cr4); ++ ++ switch(cmd){ ++ case 0: ++ printk(KERN_INFO "Switching SMEP off\n"); ++ cr4 &= ~X86_CR4_SMEP; ++ ++ break; ++ case 1: ++ printk(KERN_INFO "Switching SMEP on\n"); ++ cr4 |= X86_CR4_SMEP; ++ break; ++ default: ++ return -EINVAL; ++ } ++ /* Latch value */ ++ write_cr4(cr4); ++ ++ /* Print contents of CR4 */ ++ cr4 = read_cr4(); ++ printk(KERN_INFO "%s exit CR4 is 0x%08x\n", __FUNCTION__, cr4); ++ ++ return 0; ++} ++ ++/** ++ * smep_test_write ++ * ++ * Accepts a buffer from user-space and then tries to execute the contents ++ * Be very careful ++ */ ++static ssize_t smep_test_write(struct file *file, const char __user *buf, ++ size_t count, loff_t *ppos) ++{ ++ /* ++ * We assume we are passed a pointer to function of type ++ * void fn(void) ++ */ ++ void (*fn)(void) = (void(*))buf; ++ if (count) { ++ printk(KERN_INFO "Will attempt exec %d bytes of ring3 code @ 0x%p\n", ++ count, buf); ++ fn(); ++ printk(KERN_INFO "Exec of data @ 0x%p complete\n", buf); ++ } ++ return count; ++} ++ ++static int smep_test_open(struct inode *inode, struct file *file) ++{ ++ mutex_lock(&smep_test_mutex); ++ nonseekable_open(inode, file); ++ ++ if (mutex_lock_interruptible(&smep_test_dev.open_lock)) { ++ mutex_unlock(&smep_test_mutex); ++ return -ERESTARTSYS; ++ } ++ ++ if (smep_test_dev.opened) { ++ mutex_unlock(&smep_test_dev.open_lock); ++ mutex_unlock(&smep_test_mutex); ++ return -EINVAL; ++ } ++ ++ smep_test_dev.opened++; ++ mutex_unlock(&smep_test_dev.open_lock); ++ mutex_unlock(&smep_test_mutex); ++ return 0; ++} ++ ++static int smep_test_release(struct inode *inode, struct file *file) ++{ ++ mutex_lock(&smep_test_dev.open_lock); ++ smep_test_dev.opened = 0; ++ mutex_unlock(&smep_test_dev.open_lock); ++ ++ return 0; ++} ++ ++ ++ ++static const struct file_operations smep_test_file_ops = { ++ .open = smep_test_open, ++ .release = smep_test_release, ++ .unlocked_ioctl = smep_test_ioctl, ++ .write = smep_test_write, ++ .llseek = no_llseek, ++}; ++ ++ ++/** ++ * intel_cln_smep_test_probe ++ * ++ * @param pdev: Platform device ++ * @return 0 success < 0 failure ++ * ++ * Callback from platform sub-system to probe ++ * ++ * This driver manages eSRAM on a per-page basis. Therefore if we find block ++ * mode is enabled, or any global, block-level or page-level locks are in place ++ * at module initialisation time - we bail out. ++ */ ++static int intel_cln_smep_test_probe(struct platform_device * pdev) ++{ ++ int retval = 0; ++ unsigned int minor = 0; ++ ++ mutex_init(&smep_test_dev.open_lock); ++ cdev_init(&smep_test_dev.cdev, &smep_test_file_ops); ++ smep_test_dev.cdev.owner = THIS_MODULE; ++ ++ retval = cdev_add(&smep_test_dev.cdev, MKDEV(smep_test_major, minor), 1); ++ if (retval) { ++ printk(KERN_ERR "chardev registration failed\n"); ++ return -EINVAL; ++ } ++ if (IS_ERR(device_create(smep_test_class, NULL, ++ MKDEV(smep_test_major, minor), NULL, ++ "smeptest%u", minor))){ ++ dev_err(&pdev->dev, "can't create device\n"); ++ return -EINVAL; ++ } ++ printk(KERN_INFO "%s complete OK - device /dev/smeptest%u\n", __FUNCTION__, minor); ++ return 0; ++ ++} ++ ++/** ++ * intel_cln_smep_remove ++ * ++ * @return 0 success < 0 failure ++ * ++ * Removes a platform device ++ */ ++static int intel_cln_smep_test_remove(struct platform_device * pdev) ++{ ++ unsigned int minor = MINOR(smep_test_dev.cdev.dev); ++ ++ device_destroy(smep_test_class, MKDEV(smep_test_major, minor)); ++ cdev_del(&smep_test_dev.cdev); ++ ++ return 0; ++} ++ ++/* ++ * Platform structures useful for interface to PM subsystem ++ */ ++static struct platform_driver intel_cln_smep_test_driver = { ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++ .remove = intel_cln_smep_test_remove, ++}; ++ ++/** ++ * intel_cln_smep_init ++ * ++ * @return 0 success < 0 failure ++ * ++ * Module entry point ++ */ ++static int __init intel_cln_smep_test_init(void) ++{ ++ int retval = 0; ++ dev_t dev; ++ ++ smep_test_class = class_create(THIS_MODULE,"cln_smep_test"); ++ if (IS_ERR(smep_test_class)) { ++ retval = PTR_ERR(smep_test_class); ++ printk(KERN_ERR "smep_test: can't register earam_test class\n"); ++ goto err; ++ } ++ ++ retval = alloc_chrdev_region(&dev, 0, 1, "smep_test"); ++ if (retval) { ++ printk(KERN_ERR "smep_test: can't register character device\n"); ++ goto err_class; ++ } ++ smep_test_major = MAJOR(dev); ++ ++ memset(&smep_test_dev, 0x00, sizeof(smep_test_dev)); ++ smep_test_dev.pldev = platform_create_bundle( ++ &intel_cln_smep_test_driver, intel_cln_smep_test_probe, NULL, 0, NULL, 0); ++ ++ if(IS_ERR(smep_test_dev.pldev)){ ++ printk(KERN_ERR "smep_test platform_create_bundle fail!\n"); ++ retval = PTR_ERR(smep_test_dev.pldev); ++ goto err_class; ++ } ++ ++ return 0; ++ ++err_class: ++ class_destroy(smep_test_class); ++err: ++ return retval; ++} ++ ++/** ++ * intel_cln_smep_exit ++ * ++ * Module exit ++ */ ++static void __exit intel_cln_smep_test_exit(void) ++{ ++ platform_device_unregister(smep_test_dev.pldev); ++ platform_driver_unregister(&intel_cln_smep_test_driver); ++} ++ ++MODULE_AUTHOR("Bryan O'Donoghue <bryan.odonoghue@linux.intel.com>"); ++MODULE_DESCRIPTION("Intel Clanton SMEP test"); ++MODULE_LICENSE("Dual BSD/GPL"); ++ ++module_init(intel_cln_smep_test_init); ++module_exit(intel_cln_smep_test_exit); +diff --git a/drivers/platform/x86/quark/intel_cln_thermal.c b/drivers/platform/x86/quark/intel_cln_thermal.c +new file mode 100644 +index 0000000..ce0da9cd +--- /dev/null ++++ b/drivers/platform/x86/quark/intel_cln_thermal.c +@@ -0,0 +1,360 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton Thermal driver ++ */ ++#include <linux/err.h> ++#include <linux/fs.h> ++#include <linux/intel_cln_sb.h> ++#include <linux/list.h> ++#include <linux/mm.h> ++#include <linux/module.h> ++#include <linux/printk.h> ++#include <linux/platform_device.h> ++#include <linux/pm.h> ++#include <linux/slab.h> ++#include <linux/spinlock.h> ++#include <linux/thermal.h> ++#include <linux/timer.h> ++ ++#define DRIVER_NAME "intel-cln-thrm" ++ ++/* Definition of register locations for thermal management */ ++#define THRM_CTRL_REG (0x80) /* Thermal control */ ++#define THRM_MODE_REG (0xB0) /* Thermal mode */ ++#define THRM_MODE_SENSOR_EN (0x00008000) /* Thermal mode sensor enable */ ++#define THRM_TEMP_REG (0xB1) /* Thermal sensor temperature */ ++#define THRM_TRPCLR_REG (0xB2) /* Catastropic/Hot trip/clear */ ++#define THRM_AUXTRP_REG (0xB3) /* Aux0-Aux3 trip point */ ++#define THRM_AUXCLR_REG (0xB4) /* Aux0-Aux3 clear trip */ ++#define THRM_STATUS_REG (0xB5) /* Thermal sensor status */ ++#define THRM_TRIPBEHAVE_REG (0xB6) /* Trip point behavior */ ++#define THRM_MSIADDR_REG (0xC5) /* Thermal MSI addres reg */ ++#define THRM_MSIDATA_REG (0xC6) /* Thermal MSI data reg */ ++#define THRM_CTRL_READ (0x10) /* Config reg */ ++#define THRM_CTRL_WRITE (0x11) /* Config reg */ ++ ++#define SOC_TSENSOR_REG (0x34) ++#define SOC_TSENSOR_RST (0x00000001) ++#define SOC_CTRL_READ (0x06) ++#define SOC_CTRL_WRITE (0x07) ++ ++ ++#define THRM_ZONE_COUNT 2 /* Only hot/critical relevant */ ++#define ACTIVE_INTERVAL (1000) ++#define IDLE_INTERVAL (20000) ++#define MCELSIUS(x) ((x) * 1000) ++ ++/* CPU Zone information */ ++#define CATASTROPIC_ZONE 0 ++#define HOT_ZONE 1 ++#define AUX0_ZONE 2 /* Unused */ ++#define AUX1_ZONE 3 /* Unused */ ++#define AUX2_ZONE 4 /* Unused */ ++#define AUX3_ZONE 5 /* Unused */ ++#define MIN_USED_ZONE CATASTROPIC_ZONE ++#define MAX_USED_ZONE HOT_ZONE ++/* ++ * Default catastrophic/hot trip values - in degrees celsius ++ * Maximum temperature is 105 degrees ++ */ ++#define CRIT_TEMP 104 ++#define HOT_TEMP 95 ++#define RAW2CELSIUS_DIFF 50 ++ ++static int driver_enable = 1; ++module_param(driver_enable, int, S_IRUGO | S_IWUSR); ++MODULE_PARM_DESC(driver_enable, "Disable Thermal Driver Polling"); ++ ++/* Shorten fn names to fit 80 char limit */ ++#ifndef sb_read ++#define sb_read intel_cln_sb_read_reg ++#endif ++#ifndef sb_write ++#define sb_write intel_cln_sb_write_reg ++#endif ++ ++struct intel_cln_therm_zone { ++ enum thermal_trip_type type; ++ int trip_value; ++}; ++ ++/** ++ * struct intel_cln_thermal_dev ++ * ++ */ ++struct intel_cln_thermal_dev { ++ enum thermal_device_mode mode; ++ struct intel_cln_therm_zone tzone[THRM_ZONE_COUNT]; ++ struct mutex lock; ++ struct platform_device *pldev; /* Platform device */ ++ struct thermal_zone_device *therm_dev; /* Thermal device */ ++}; ++ ++static struct intel_cln_thermal_dev cln_tdev; ++ ++/****************************************************************************** ++ * Thermal API implementation ++ ******************************************************************************/ ++ ++/** ++ * get_temp ++ * ++ * @param tz: Thermal zone descriptor ++ * ++ * Get the current temperature ++ * We have exactly one thermal zone/sensor ++ * Value passed is an unsigned long - our sensor reports up to -50 celsius so we ++ * just clip at zero if the temperature is negative. ++ */ ++static int intel_cln_thermal_get_temp(struct thermal_zone_device *tz, ++ unsigned long *temp) ++{ ++ sb_read(SB_ID_THERMAL, THRM_CTRL_READ, THRM_TEMP_REG, (u32 *)temp, 1); ++ *temp -= RAW2CELSIUS_DIFF; ++ ++ /* Clip to unsigned output value if sensor is reporting sub-zero */ ++ if ((int)*temp < 0) ++ *temp = 0; ++ ++ *temp = MCELSIUS(*temp&0x000000FF); ++ ++ return 0; ++} ++ ++/** ++ * get_trend ++ * ++ * Wears good clothes ++ */ ++static int intel_cln_thermal_get_trend(struct thermal_zone_device *tz, ++ int trip, enum thermal_trend *trend) ++{ ++ if (tz->temperature >= trip) ++ *trend = THERMAL_TREND_RAISING; ++ else ++ *trend = THERMAL_TREND_DROPPING; ++ ++ return 0; ++} ++ ++/** ++ * intel_cln_thermal_get_mode ++ * ++ * Get the mode ++ */ ++static int intel_cln_thermal_get_mode(struct thermal_zone_device *tz, ++ enum thermal_device_mode *mode) ++{ ++ mutex_lock(&cln_tdev.lock); ++ *mode = cln_tdev.mode; ++ mutex_unlock(&cln_tdev.lock); ++ ++ return 0; ++} ++ ++/** ++ * intel_cln_thermal_set_mode ++ * ++ * Set the mode ++ */ ++static int intel_cln_thermal_set_mode(struct thermal_zone_device *tz, ++ enum thermal_device_mode mode) ++{ ++ mutex_lock(&cln_tdev.lock); ++ ++ if (mode == THERMAL_DEVICE_ENABLED) ++ cln_tdev.therm_dev->polling_delay = IDLE_INTERVAL; ++ else ++ cln_tdev.therm_dev->polling_delay = 0; ++ cln_tdev.mode = mode; ++ ++ mutex_unlock(&cln_tdev.lock); ++ ++ thermal_zone_device_update(cln_tdev.therm_dev); ++ pr_info("thermal polling set for duration=%d msec\n", ++ cln_tdev.therm_dev->polling_delay); ++ return 0; ++} ++ ++/** ++ * intel_cln_thermal_get_trip_type ++ * ++ * Get trip type ++ */ ++static int intel_cln_thermal_get_trip_type(struct thermal_zone_device *tz, ++ int trip, enum thermal_trip_type *type) ++{ ++ if (trip < MIN_USED_ZONE || trip > MAX_USED_ZONE) ++ return -EINVAL; ++ ++ *type = cln_tdev.tzone[trip].type; ++ return 0; ++} ++ ++/** ++ * intel_cln_thermal_get_trip_temp ++ * ++ * Get trip temp ++ */ ++static int intel_cln_thermal_get_trip_temp(struct thermal_zone_device *tz, ++ int trip, unsigned long *temp) ++{ ++ if (trip < MIN_USED_ZONE || trip > MAX_USED_ZONE) ++ return -EINVAL; ++ ++ /* Convert the temperature into millicelsius */ ++ *temp = cln_tdev.tzone[trip].trip_value; ++ ++ return 0; ++} ++ ++/** ++ * intel_cln_thermal_get_trip_type ++ * ++ * Get trip temp ++ */ ++static int intel_cln_thermal_get_crit_temp(struct thermal_zone_device *tz, ++ unsigned long *temp) ++{ ++ /* Critical zone */ ++ *temp = cln_tdev.tzone[CATASTROPIC_ZONE].trip_value; ++ return 0; ++} ++ ++static struct thermal_zone_device_ops intel_cln_thrm_dev_ops = { ++ .get_temp = intel_cln_thermal_get_temp, ++ .get_trend = intel_cln_thermal_get_trend, ++ .get_mode = intel_cln_thermal_get_mode, ++ .set_mode = intel_cln_thermal_set_mode, ++ .get_trip_type = intel_cln_thermal_get_trip_type, ++ .get_trip_temp = intel_cln_thermal_get_trip_temp, ++ .get_crit_temp = intel_cln_thermal_get_crit_temp, ++}; ++ ++ ++ ++/** ++ * intel_cln_init_zone ++ * ++ * Initialise a zone ++ */ ++static void intel_cln_thermal_init_zone(struct intel_cln_therm_zone *tz, ++ enum thermal_trip_type type, int trip_value) ++{ ++ tz->type = type; ++ tz->trip_value = MCELSIUS(trip_value); ++} ++ ++/****************************************************************************** ++ * Module Entry/Exit hooks ++ ******************************************************************************/ ++ ++/** ++ * intel_cln_thermal_probe ++ * ++ * @param pdev: Platform device ++ * @return 0 success < 0 failure ++ * ++ * Callback from platform sub-system to probe ++ * ++ * This routine registers a thermal device with the kernel's thermal management ++ * sub-system ++ */ ++static int intel_cln_thermal_probe(struct platform_device *pdev) ++{ ++ int err = 0; ++ int critical_temp = 0, hot_temp = 0; ++ uint32_t regval = 0; ++ ++ if (driver_enable == 0) ++ return 0; ++ ++ memset(&cln_tdev, 0x00, sizeof(cln_tdev)); ++ ++ critical_temp = CRIT_TEMP; ++ hot_temp = HOT_TEMP; ++ ++ /* Enumerate zone type data */ ++ memset(&cln_tdev, 0x00, sizeof(cln_tdev)); ++ mutex_init(&cln_tdev.lock); ++ ++ /* Set initial state disabled */ ++ cln_tdev.mode = THERMAL_DEVICE_ENABLED; ++ ++ intel_cln_thermal_init_zone(&cln_tdev.tzone[CATASTROPIC_ZONE], ++ THERMAL_TRIP_CRITICAL, critical_temp); ++ intel_cln_thermal_init_zone(&cln_tdev.tzone[HOT_ZONE], ++ THERMAL_TRIP_HOT, hot_temp); ++ ++ /* Register a thermal zone */ ++ cln_tdev.therm_dev = thermal_zone_device_register(DRIVER_NAME, ++ THRM_ZONE_COUNT, 0, 0, &intel_cln_thrm_dev_ops, ++ 0, IDLE_INTERVAL, ACTIVE_INTERVAL); ++ ++ if (IS_ERR(cln_tdev.therm_dev)) { ++ err = PTR_ERR(cln_tdev.therm_dev); ++ return err; ++ } ++ ++ /* Read the BIOS configured hardware catastrophic trip temp */ ++ sb_read(SB_ID_THERMAL, THRM_CTRL_READ, THRM_TRPCLR_REG, ®val, 1); ++ regval = (regval & 0xff) - 50; ++ ++ pr_info("THRM: critical reset %d c hot %d c hardware failover %d c\n", ++ critical_temp, hot_temp, regval); ++ ++ return 0; ++} ++ ++/** ++ * intel_cln_thermal_remove ++ * ++ * @return 0 success < 0 failure ++ * ++ * Removes a platform device ++ */ ++static int intel_cln_thermal_remove(struct platform_device *pdev) ++{ ++ if (cln_tdev.therm_dev != NULL) { ++ thermal_zone_device_unregister(cln_tdev.therm_dev); ++ return 0; ++ } ++ return -EINVAL; ++} ++ ++/* ++ * Platform structures useful for interface to PM subsystem ++ */ ++static struct platform_driver intel_cln_thermal_driver = { ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++ .probe = intel_cln_thermal_probe, ++ .remove = intel_cln_thermal_remove, ++}; ++ ++module_platform_driver(intel_cln_thermal_driver); ++ ++ ++MODULE_AUTHOR("Bryan O'Donoghue <bryan.odonoghue@linux.intel.com>"); ++MODULE_DESCRIPTION("Intel Clanton Thermal driver"); ++MODULE_LICENSE("Dual BSD/GPL"); +diff --git a/drivers/power/power_supply_core.c b/drivers/power/power_supply_core.c +index 8a7cfb3..5deac43 100644 +--- a/drivers/power/power_supply_core.c ++++ b/drivers/power/power_supply_core.c +@@ -141,7 +141,7 @@ int power_supply_set_battery_charged(struct power_supply *psy) + } + EXPORT_SYMBOL_GPL(power_supply_set_battery_charged); + +-static int power_supply_match_device_by_name(struct device *dev, void *data) ++static int power_supply_match_device_by_name(struct device *dev, const void *data) + { + const char *name = data; + struct power_supply *psy = dev_get_drvdata(dev); +@@ -149,7 +149,7 @@ static int power_supply_match_device_by_name(struct device *dev, void *data) + return strcmp(psy->name, name) == 0; + } + +-struct power_supply *power_supply_get_by_name(char *name) ++struct power_supply *power_supply_get_by_name(const char *name) + { + struct device *dev = class_find_device(power_supply_class, NULL, name, + power_supply_match_device_by_name); +diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig +index e513cd9..03120a8 100644 +--- a/drivers/pwm/Kconfig ++++ b/drivers/pwm/Kconfig +@@ -28,6 +28,10 @@ menuconfig PWM + + if PWM + ++config PWM_SYSFS ++ bool ++ default y if SYSFS ++ + config PWM_AB8500 + tristate "AB8500 PWM support" + depends on AB8500_CORE && ARCH_U8500 +diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile +index 62a2963..f98371b 100644 +--- a/drivers/pwm/Makefile ++++ b/drivers/pwm/Makefile +@@ -1,4 +1,5 @@ + obj-$(CONFIG_PWM) += core.o ++obj-$(CONFIG_PWM_SYSFS) += sysfs.o + obj-$(CONFIG_PWM_AB8500) += pwm-ab8500.o + obj-$(CONFIG_PWM_BFIN) += pwm-bfin.o + obj-$(CONFIG_PWM_IMX) += pwm-imx.o +diff --git a/drivers/pwm/core.c b/drivers/pwm/core.c +index 903138b..bfc8c05 100644 +--- a/drivers/pwm/core.c ++++ b/drivers/pwm/core.c +@@ -272,6 +272,8 @@ int pwmchip_add(struct pwm_chip *chip) + if (IS_ENABLED(CONFIG_OF)) + of_pwmchip_add(chip); + ++ pwmchip_sysfs_export(chip); ++ + out: + mutex_unlock(&pwm_lock); + return ret; +@@ -308,6 +310,8 @@ int pwmchip_remove(struct pwm_chip *chip) + + free_pwms(chip); + ++ pwmchip_sysfs_unexport(chip); ++ + out: + mutex_unlock(&pwm_lock); + return ret; +@@ -400,10 +404,19 @@ EXPORT_SYMBOL_GPL(pwm_free); + */ + int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) + { ++ int err; ++ + if (!pwm || duty_ns < 0 || period_ns <= 0 || duty_ns > period_ns) + return -EINVAL; + +- return pwm->chip->ops->config(pwm->chip, pwm, duty_ns, period_ns); ++ err = pwm->chip->ops->config(pwm->chip, pwm, duty_ns, period_ns); ++ if (err) ++ return err; ++ ++ pwm->duty_cycle = duty_ns; ++ pwm->period = period_ns; ++ ++ return 0; + } + EXPORT_SYMBOL_GPL(pwm_config); + +@@ -416,6 +429,8 @@ EXPORT_SYMBOL_GPL(pwm_config); + */ + int pwm_set_polarity(struct pwm_device *pwm, enum pwm_polarity polarity) + { ++ int err; ++ + if (!pwm || !pwm->chip->ops) + return -EINVAL; + +@@ -425,7 +440,13 @@ int pwm_set_polarity(struct pwm_device *pwm, enum pwm_polarity polarity) + if (test_bit(PWMF_ENABLED, &pwm->flags)) + return -EBUSY; + +- return pwm->chip->ops->set_polarity(pwm->chip, pwm, polarity); ++ err = pwm->chip->ops->set_polarity(pwm->chip, pwm, polarity); ++ if (err) ++ return err; ++ ++ pwm->polarity = polarity; ++ ++ return 0; + } + EXPORT_SYMBOL_GPL(pwm_set_polarity); + +diff --git a/drivers/pwm/sysfs.c b/drivers/pwm/sysfs.c +new file mode 100644 +index 0000000..4cd6d78 +--- /dev/null ++++ b/drivers/pwm/sysfs.c +@@ -0,0 +1,353 @@ ++/* ++ * A simple sysfs interface for the generic PWM framework ++ * ++ * Copyright (C) 2013 H Hartley Sweeten <hsweeten@visionengravers.com> ++ * ++ * Based on previous work by Lars Poeschel <poeschel@lemonage.de> ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2, or (at your option) ++ * any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#include <linux/export.h> ++#include <linux/device.h> ++#include <linux/mutex.h> ++#include <linux/err.h> ++#include <linux/slab.h> ++#include <linux/kdev_t.h> ++#include <linux/pwm.h> ++ ++struct pwm_export { ++ struct device child; ++ struct pwm_device *pwm; ++}; ++ ++static struct pwm_export *child_to_pwm_export(struct device *child) ++{ ++ return container_of(child, struct pwm_export, child); ++} ++ ++static struct pwm_device *child_to_pwm_device(struct device *child) ++{ ++ struct pwm_export *export = child_to_pwm_export(child); ++ ++ return export->pwm; ++} ++ ++static ssize_t pwm_period_show(struct device *child, ++ struct device_attribute *attr, ++ char *buf) ++{ ++ const struct pwm_device *pwm = child_to_pwm_device(child); ++ ++ return sprintf(buf, "%u\n", pwm->period); ++} ++ ++static ssize_t pwm_period_store(struct device *child, ++ struct device_attribute *attr, ++ const char *buf, size_t size) ++{ ++ struct pwm_device *pwm = child_to_pwm_device(child); ++ unsigned int val; ++ int ret; ++ ++ ret = kstrtouint(buf, 0, &val); ++ if (ret) ++ return ret; ++ ++ ret = pwm_config(pwm, pwm->duty_cycle, val); ++ ++ return ret ? : size; ++} ++ ++static ssize_t pwm_duty_cycle_show(struct device *child, ++ struct device_attribute *attr, ++ char *buf) ++{ ++ const struct pwm_device *pwm = child_to_pwm_device(child); ++ ++ return sprintf(buf, "%u\n", pwm->duty_cycle); ++} ++ ++static ssize_t pwm_duty_cycle_store(struct device *child, ++ struct device_attribute *attr, ++ const char *buf, size_t size) ++{ ++ struct pwm_device *pwm = child_to_pwm_device(child); ++ unsigned int val; ++ int ret; ++ ++ ret = kstrtouint(buf, 0, &val); ++ if (ret) ++ return ret; ++ ++ ret = pwm_config(pwm, val, pwm->period); ++ ++ return ret ? : size; ++} ++ ++static ssize_t pwm_enable_show(struct device *child, ++ struct device_attribute *attr, ++ char *buf) ++{ ++ const struct pwm_device *pwm = child_to_pwm_device(child); ++ int enabled = test_bit(PWMF_ENABLED, &pwm->flags); ++ ++ return sprintf(buf, "%d\n", enabled); ++} ++ ++static ssize_t pwm_enable_store(struct device *child, ++ struct device_attribute *attr, ++ const char *buf, size_t size) ++{ ++ struct pwm_device *pwm = child_to_pwm_device(child); ++ int val, ret; ++ ++ ret = kstrtoint(buf, 0, &val); ++ if (ret) ++ return ret; ++ ++ switch (val) { ++ case 0: ++ pwm_disable(pwm); ++ break; ++ case 1: ++ ret = pwm_enable(pwm); ++ break; ++ default: ++ ret = -EINVAL; ++ break; ++ } ++ ++ return ret ? : size; ++} ++ ++static ssize_t pwm_polarity_show(struct device *child, ++ struct device_attribute *attr, ++ char *buf) ++{ ++ const struct pwm_device *pwm = child_to_pwm_device(child); ++ ++ return sprintf(buf, "%s\n", pwm->polarity ? "inversed" : "normal"); ++} ++ ++static ssize_t pwm_polarity_store(struct device *child, ++ struct device_attribute *attr, ++ const char *buf, size_t size) ++{ ++ struct pwm_device *pwm = child_to_pwm_device(child); ++ enum pwm_polarity polarity; ++ int ret; ++ ++ if (sysfs_streq(buf, "normal")) ++ polarity = PWM_POLARITY_NORMAL; ++ else if (sysfs_streq(buf, "inversed")) ++ polarity = PWM_POLARITY_INVERSED; ++ else ++ return -EINVAL; ++ ++ ret = pwm_set_polarity(pwm, polarity); ++ ++ return ret ? : size; ++} ++ ++static DEVICE_ATTR(period, 0644, pwm_period_show, pwm_period_store); ++static DEVICE_ATTR(duty_cycle, 0644, pwm_duty_cycle_show, pwm_duty_cycle_store); ++static DEVICE_ATTR(enable, 0644, pwm_enable_show, pwm_enable_store); ++static DEVICE_ATTR(polarity, 0644, pwm_polarity_show, pwm_polarity_store); ++ ++static struct attribute *pwm_attrs[] = { ++ &dev_attr_period.attr, ++ &dev_attr_duty_cycle.attr, ++ &dev_attr_enable.attr, ++ &dev_attr_polarity.attr, ++ NULL ++}; ++ ++static const struct attribute_group pwm_attr_group = { ++ .attrs = pwm_attrs, ++}; ++ ++static const struct attribute_group *pwm_attr_groups[] = { ++ &pwm_attr_group, ++ NULL, ++}; ++ ++static void pwm_export_release(struct device *child) ++{ ++ struct pwm_export *export = child_to_pwm_export(child); ++ ++ kfree(export); ++} ++ ++static int pwm_export_child(struct device *parent, struct pwm_device *pwm) ++{ ++ struct pwm_export *export; ++ int ret; ++ ++ if (test_and_set_bit(PWMF_EXPORTED, &pwm->flags)) ++ return -EBUSY; ++ ++ export = kzalloc(sizeof(*export), GFP_KERNEL); ++ if (!export) { ++ clear_bit(PWMF_EXPORTED, &pwm->flags); ++ return -ENOMEM; ++ } ++ ++ export->pwm = pwm; ++ ++ export->child.release = pwm_export_release; ++ export->child.parent = parent; ++ export->child.devt = MKDEV(0, 0); ++ export->child.groups = pwm_attr_groups; ++ dev_set_name(&export->child, "pwm%u", pwm->hwpwm); ++ ++ ret = device_register(&export->child); ++ if (ret) { ++ clear_bit(PWMF_EXPORTED, &pwm->flags); ++ kfree(export); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int pwm_unexport_match(struct device *child, void *data) ++{ ++ return child_to_pwm_device(child) == data; ++} ++ ++static int pwm_unexport_child(struct device *parent, struct pwm_device *pwm) ++{ ++ struct device *child; ++ ++ if (!test_and_clear_bit(PWMF_EXPORTED, &pwm->flags)) ++ return -ENODEV; ++ ++ child = device_find_child(parent, pwm, pwm_unexport_match); ++ if (!child) ++ return -ENODEV; ++ ++ /* for device_find_child() */ ++ put_device(child); ++ device_unregister(child); ++ pwm_put(pwm); ++ ++ return 0; ++} ++ ++static ssize_t pwm_export_store(struct device *parent, ++ struct device_attribute *attr, ++ const char *buf, size_t len) ++{ ++ struct pwm_chip *chip = dev_get_drvdata(parent); ++ struct pwm_device *pwm; ++ unsigned int hwpwm; ++ int ret; ++ ++ ret = kstrtouint(buf, 0, &hwpwm); ++ if (ret < 0) ++ return ret; ++ ++ if (hwpwm >= chip->npwm) ++ return -ENODEV; ++ ++ pwm = pwm_request_from_chip(chip, hwpwm, "sysfs"); ++ if (IS_ERR(pwm)) ++ return PTR_ERR(pwm); ++ ++ ret = pwm_export_child(parent, pwm); ++ if (ret < 0) ++ pwm_put(pwm); ++ ++ return ret ? : len; ++} ++ ++static ssize_t pwm_unexport_store(struct device *parent, ++ struct device_attribute *attr, ++ const char *buf, size_t len) ++{ ++ struct pwm_chip *chip = dev_get_drvdata(parent); ++ unsigned int hwpwm; ++ int ret; ++ ++ ret = kstrtouint(buf, 0, &hwpwm); ++ if (ret < 0) ++ return ret; ++ ++ if (hwpwm >= chip->npwm) ++ return -ENODEV; ++ ++ ret = pwm_unexport_child(parent, &chip->pwms[hwpwm]); ++ ++ return ret ? : len; ++} ++ ++static ssize_t pwm_npwm_show(struct device *parent, ++ struct device_attribute *attr, ++ char *buf) ++{ ++ const struct pwm_chip *chip = dev_get_drvdata(parent); ++ ++ return sprintf(buf, "%u\n", chip->npwm); ++} ++ ++static struct device_attribute pwm_chip_attrs[] = { ++ __ATTR(export, 0200, NULL, pwm_export_store), ++ __ATTR(unexport, 0200, NULL, pwm_unexport_store), ++ __ATTR(npwm, 0444, pwm_npwm_show, NULL), ++ __ATTR_NULL, ++}; ++ ++static struct class pwm_class = { ++ .name = "pwm", ++ .owner = THIS_MODULE, ++ .dev_attrs = pwm_chip_attrs, ++}; ++ ++static int pwmchip_sysfs_match(struct device *parent, const void *data) ++{ ++ return dev_get_drvdata(parent) == data; ++} ++ ++void pwmchip_sysfs_export(struct pwm_chip *chip) ++{ ++ struct device *parent; ++ ++ /* ++ * If device_create() fails the pwm_chip is still usable by ++ * the kernel its just not exported. ++ */ ++ parent = device_create(&pwm_class, chip->dev, MKDEV(0, 0), chip, ++ "pwmchip%d", chip->base); ++ if (IS_ERR(parent)) { ++ dev_warn(chip->dev, ++ "device_create failed for pwm_chip sysfs export\n"); ++ } ++} ++ ++void pwmchip_sysfs_unexport(struct pwm_chip *chip) ++{ ++ struct device *parent; ++ ++ parent = class_find_device(&pwm_class, NULL, chip, ++ pwmchip_sysfs_match); ++ if (parent) { ++ /* for class_find_device() */ ++ put_device(parent); ++ device_unregister(parent); ++ } ++} ++ ++static int __init pwm_sysfs_init(void) ++{ ++ return class_register(&pwm_class); ++} ++subsys_initcall(pwm_sysfs_init); +diff --git a/drivers/rtc/interface.c b/drivers/rtc/interface.c +index 9592b93..42bd57d 100644 +--- a/drivers/rtc/interface.c ++++ b/drivers/rtc/interface.c +@@ -587,16 +587,16 @@ void rtc_update_irq(struct rtc_device *rtc, + } + EXPORT_SYMBOL_GPL(rtc_update_irq); + +-static int __rtc_match(struct device *dev, void *data) ++static int __rtc_match(struct device *dev, const void *data) + { +- char *name = (char *)data; ++ const char *name = data; + + if (strcmp(dev_name(dev), name) == 0) + return 1; + return 0; + } + +-struct rtc_device *rtc_class_open(char *name) ++struct rtc_device *rtc_class_open(const char *name) + { + struct device *dev; + struct rtc_device *rtc = NULL; +diff --git a/drivers/scsi/hosts.c b/drivers/scsi/hosts.c +index 593085a..df0c3c7 100644 +--- a/drivers/scsi/hosts.c ++++ b/drivers/scsi/hosts.c +@@ -468,10 +468,10 @@ void scsi_unregister(struct Scsi_Host *shost) + } + EXPORT_SYMBOL(scsi_unregister); + +-static int __scsi_host_match(struct device *dev, void *data) ++static int __scsi_host_match(struct device *dev, const void *data) + { + struct Scsi_Host *p; +- unsigned short *hostnum = (unsigned short *)data; ++ const unsigned short *hostnum = data; + + p = class_to_shost(dev); + return p->host_no == *hostnum; +diff --git a/drivers/scsi/osd/osd_uld.c b/drivers/scsi/osd/osd_uld.c +index 4375417..0fab6b5 100644 +--- a/drivers/scsi/osd/osd_uld.c ++++ b/drivers/scsi/osd/osd_uld.c +@@ -268,18 +268,11 @@ static inline bool _the_same_or_null(const u8 *a1, unsigned a1_len, + return 0 == memcmp(a1, a2, a1_len); + } + +-struct find_oud_t { +- const struct osd_dev_info *odi; +- struct device *dev; +- struct osd_uld_device *oud; +-} ; +- +-int _mach_odi(struct device *dev, void *find_data) ++static int _match_odi(struct device *dev, const void *find_data) + { + struct osd_uld_device *oud = container_of(dev, struct osd_uld_device, + class_dev); +- struct find_oud_t *fot = find_data; +- const struct osd_dev_info *odi = fot->odi; ++ const struct osd_dev_info *odi = find_data; + + if (_the_same_or_null(oud->odi.systemid, oud->odi.systemid_len, + odi->systemid, odi->systemid_len) && +@@ -287,7 +280,6 @@ int _mach_odi(struct device *dev, void *find_data) + odi->osdname, odi->osdname_len)) { + OSD_DEBUG("found device sysid_len=%d osdname=%d\n", + odi->systemid_len, odi->osdname_len); +- fot->oud = oud; + return 1; + } else { + return 0; +@@ -301,19 +293,19 @@ int _mach_odi(struct device *dev, void *find_data) + */ + struct osd_dev *osduld_info_lookup(const struct osd_dev_info *odi) + { +- struct find_oud_t find = {.odi = odi}; +- +- find.dev = class_find_device(&osd_uld_class, NULL, &find, _mach_odi); +- if (likely(find.dev)) { ++ struct device *dev = class_find_device(&osd_uld_class, NULL, odi, _match_odi); ++ if (likely(dev)) { + struct osd_dev_handle *odh = kzalloc(sizeof(*odh), GFP_KERNEL); ++ struct osd_uld_device *oud = container_of(dev, ++ struct osd_uld_device, class_dev); + + if (unlikely(!odh)) { +- put_device(find.dev); ++ put_device(dev); + return ERR_PTR(-ENOMEM); + } + +- odh->od = find.oud->od; +- odh->oud = find.oud; ++ odh->od = oud->od; ++ odh->oud = oud; + + return &odh->od; + } +diff --git a/drivers/scsi/scsi_transport_iscsi.c b/drivers/scsi/scsi_transport_iscsi.c +index 31969f2..59d427b 100644 +--- a/drivers/scsi/scsi_transport_iscsi.c ++++ b/drivers/scsi/scsi_transport_iscsi.c +@@ -183,10 +183,10 @@ static struct attribute_group iscsi_endpoint_group = { + + #define ISCSI_MAX_EPID -1 + +-static int iscsi_match_epid(struct device *dev, void *data) ++static int iscsi_match_epid(struct device *dev, const void *data) + { + struct iscsi_endpoint *ep = iscsi_dev_to_endpoint(dev); +- uint64_t *epid = (uint64_t *) data; ++ const uint64_t *epid = data; + + return *epid == ep->id; + } +diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig +index 2e188e1..5043dc4 100644 +--- a/drivers/spi/Kconfig ++++ b/drivers/spi/Kconfig +@@ -35,6 +35,14 @@ config SPI_DEBUG + Say "yes" to enable debug messaging (like dev_dbg and pr_debug), + sysfs, and debugfs support in SPI controller and protocol drivers. + ++config GEN3_SPI ++ bool "Intel Media SOC SPI support" ++ depends on SPI && ARCH_GEN3 && INTEL_QUARK_X1000_SOC ++ default y ++ help ++ This option enables Intel Media SOC SPI support. ++ For Clanton this option depends on INTEL_QUARK_X1000_SOC. ++ + # + # MASTER side ... talking to discrete SPI slave chips including microcontrollers + # +@@ -74,7 +82,15 @@ config SPI_ATMEL + This selects a driver for the Atmel SPI Controller, present on + many AT32 (AVR32) and AT91 (ARM) chips. + +-config SPI_BFIN5XX ++config SPI_CE5XX_SPI_FLASH ++ tristate "CE5XX SPI FLASH" ++ depends on ARCH_GEN3 && HW_MUTEXES ++ default y ++ help ++ This selects a driver for CE5XX Serial Flash controler ++ ++ ++config SPI_BFIN + tristate "SPI controller driver for ADI Blackfin5xx" + depends on BLACKFIN + help +@@ -302,12 +318,21 @@ config SPI_PXA2XX + depends on (ARCH_PXA || (X86_32 && PCI)) && EXPERIMENTAL + select PXA_SSP if ARCH_PXA + help +- This enables using a PXA2xx or Sodaville SSP port as a SPI master ++ This enables using a PXA2xx or Intel CE4100/CE4200/CE5300 port as a SPI master + controller. The driver can be configured to use any SSP port and + additional documentation can be found a Documentation/spi/pxa2xx. + + config SPI_PXA2XX_PCI +- def_bool SPI_PXA2XX && X86_32 && PCI ++ tristate "Intel CE SPI PCI adapter" ++ depends on SPI_PXA2XX && X86_32 && PCI && GEN3_SPI ++ help ++ This driver supports the Intel CE SPI master controller and acts ++ as the PCI-SPI glue code for PXA's driver ++ ++config SPI_CE5XX_SPI_SLAVE ++ tristate "CE5XX SPI SLAVE" ++ help ++ This selects a driver for CE5XX SPI Slave controler, it is emudulated into a spi device + + config SPI_RSPI + tristate "Renesas RSPI controller" +@@ -471,6 +496,14 @@ config SPI_DW_MMIO + depends on SPI_DESIGNWARE && HAVE_CLK + + # ++# Bring out the LPC_SCH SPI block ++# ++ ++config SPI_LPC_SCH ++ tristate "LPC SCH Legacy SPI controller" ++ depends on LPC_SCH ++ ++# + # There are lots of SPI device types, with sensors and memory + # being probably the most widely used ones. + # +diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile +index 64e970b..b67de97 100644 +--- a/drivers/spi/Makefile ++++ b/drivers/spi/Makefile +@@ -26,6 +26,7 @@ obj-$(CONFIG_SPI_DESIGNWARE) += spi-dw.o + obj-$(CONFIG_SPI_DW_MMIO) += spi-dw-mmio.o + obj-$(CONFIG_SPI_DW_PCI) += spi-dw-midpci.o + spi-dw-midpci-objs := spi-dw-pci.o spi-dw-mid.o ++obj-$(CONFIG_SPI_LPC_SCH) += spi-lpc-sch.o + obj-$(CONFIG_SPI_EP93XX) += spi-ep93xx.o + obj-$(CONFIG_SPI_FALCON) += spi-falcon.o + obj-$(CONFIG_SPI_FSL_LIB) += spi-fsl-lib.o +diff --git a/drivers/spi/spi-gpio.c b/drivers/spi/spi-gpio.c +index c7cf0b7..0fa345c 100644 +--- a/drivers/spi/spi-gpio.c ++++ b/drivers/spi/spi-gpio.c +@@ -265,9 +265,9 @@ static int spi_gpio_setup(struct spi_device *spi) + } + } + if (!status) { +- status = spi_bitbang_setup(spi); + /* in case it was initialized from static board data */ + spi_gpio->cs_gpios[spi->chip_select] = cs; ++ status = spi_bitbang_setup(spi); + } + + if (status) { +diff --git a/drivers/spi/spi-pxa2xx-pci.c b/drivers/spi/spi-pxa2xx-pci.c +index cf95587..7292888 100644 +--- a/drivers/spi/spi-pxa2xx-pci.c ++++ b/drivers/spi/spi-pxa2xx-pci.c +@@ -7,6 +7,47 @@ + #include <linux/of_device.h> + #include <linux/module.h> + #include <linux/spi/pxa2xx_spi.h> ++#include <linux/irq.h> ++#include <linux/platform_data/clanton.h> ++ ++/* defined here to avoid including arch/x86/pci/intel_media_proc_gen3.c */ ++#define CE3100_SOC_DEVICE_ID 0x2E50 ++#define CE4100_SOC_DEVICE_ID 0x0708 ++#define CE4200_SOC_DEVICE_ID 0x0709 ++#define CE5300_SOC_DEVICE_ID 0x0C40 ++#define CE2600_SOC_DEVICE_ID 0x0931 ++ ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC_FPGAEMU ++#define CE4200_NUM_SPI_MASTER 1 ++#else ++#define CE4200_NUM_SPI_MASTER 2 ++#endif ++ ++#define CE4X00_SPI_MAX_SPEED 1843200 ++ ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC ++#define CE4200_NUM_CHIPSELECT 2 ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC_FPGAEMU ++#define CE5X00_SPI_MAX_SPEED 3500000 ++#else ++#define CE5X00_SPI_MAX_SPEED 50000000 ++#endif ++#else ++#define CE4200_NUM_CHIPSELECT 4 ++#define CE5X00_SPI_MAX_SPEED 5000000 ++#endif ++ ++#define SPI_CE_DEBUG ++ ++static int interface; ++ ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC ++static int enable_msi = 1; ++#else ++static int enable_msi; ++#endif ++module_param(enable_msi, int, S_IRUGO | S_IWUSR); ++MODULE_PARM_DESC(enable_msi, "Enable PCI MSI mode"); + + struct ce4100_info { + struct ssp_device ssp; +@@ -57,10 +98,11 @@ static int ce4100_spi_probe(struct pci_dev *dev, + int ret; + resource_size_t phys_beg; + resource_size_t phys_len; +- struct ce4100_info *spi_info; ++ struct ce4100_info *spi_info = NULL; + struct platform_device *pdev; + struct pxa2xx_spi_master spi_pdata; + struct ssp_device *ssp; ++ unsigned int id; + + ret = pci_enable_device(dev); + if (ret) +@@ -77,42 +119,75 @@ static int ce4100_spi_probe(struct pci_dev *dev, + } + + pdev = platform_device_alloc("pxa2xx-spi", dev->devfn); ++ if (!pdev) { ++ ret = -ENOMEM; ++ goto err_release_mem_region; ++ } + spi_info = kzalloc(sizeof(*spi_info), GFP_KERNEL); +- if (!pdev || !spi_info ) { ++ if (!spi_info) { + ret = -ENOMEM; +- goto err_nomem; ++ goto err_platform_device_put; + } + memset(&spi_pdata, 0, sizeof(spi_pdata)); +- spi_pdata.num_chipselect = dev->devfn; ++ spi_pdata.num_chipselect = CE4200_NUM_CHIPSELECT; + + ret = platform_device_add_data(pdev, &spi_pdata, sizeof(spi_pdata)); + if (ret) +- goto err_nomem; ++ goto err_free_spi_info; + ++ pdev->id = interface; + pdev->dev.parent = &dev->dev; ++#ifdef CONFIG_OF + pdev->dev.of_node = dev->dev.of_node; ++#endif + ssp = &spi_info->ssp; ++ ssp->pcidev = dev; + ssp->phys_base = pci_resource_start(dev, 0); + ssp->mmio_base = ioremap(phys_beg, phys_len); + if (!ssp->mmio_base) { + dev_err(&pdev->dev, "failed to ioremap() registers\n"); + ret = -EIO; +- goto err_nomem; ++ goto err_ioremap; ++ } ++ pci_set_master(dev); ++ if (enable_msi == 1) { ++ ret = pci_enable_msi(dev); ++ if (ret) { ++ dev_err(&dev->dev, "failed to allocate MSI entry\n"); ++ goto err_dev_add; ++ } + } ++ + ssp->irq = dev->irq; + ssp->port_id = pdev->id; +- ssp->type = PXA25x_SSP; + ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC ++ id = CE5300_SOC_DEVICE_ID; ++#else ++ intelce_get_soc_info(&id, NULL); ++#endif ++ switch (id) { ++ case CE5300_SOC_DEVICE_ID: ++ ssp->type = CE5X00_SSP; ++ break; ++ case CE4200_SOC_DEVICE_ID: ++ default: ++ ssp->type = CE4100_SSP; ++ break; ++ } + mutex_lock(&ssp_lock); + list_add(&ssp->node, &ssp_list); + mutex_unlock(&ssp_lock); + + pci_set_drvdata(dev, spi_info); + ++ spi_info->spi_pdev = pdev; + ret = platform_device_add(pdev); + if (ret) + goto err_dev_add; + ++ interface++; ++ + return ret; + + err_dev_add: +@@ -121,11 +196,16 @@ err_dev_add: + list_del(&ssp->node); + mutex_unlock(&ssp_lock); + iounmap(ssp->mmio_base); ++err_ioremap: + +-err_nomem: +- release_mem_region(phys_beg, phys_len); +- platform_device_put(pdev); ++err_free_spi_info: + kfree(spi_info); ++ ++err_platform_device_put: ++ platform_device_put(pdev); ++ ++err_release_mem_region: ++ release_mem_region(phys_beg, phys_len); + return ret; + } + +@@ -146,21 +226,50 @@ static void ce4100_spi_remove(struct pci_dev *dev) + list_del(&ssp->node); + mutex_unlock(&ssp_lock); + ++ if (enable_msi == 1) { ++ if (pci_dev_msi_enabled(dev)) ++ pci_disable_msi(dev); ++ } ++ + pci_set_drvdata(dev, NULL); + pci_disable_device(dev); + kfree(spi_info); + } + ++ ++#ifdef CONFIG_PM ++static int ce4XXX_spi_suspend(struct pci_dev *dev, pm_message_t state) ++{ ++ pci_save_state(dev); ++ pci_set_power_state(dev, pci_choose_state(dev, state)); ++ return 0; ++} ++ ++static int ce4XXX_spi_resume(struct pci_dev *dev) ++{ ++ pci_set_power_state(dev, PCI_D0); ++ pci_restore_state(dev); ++ ++ return 0; ++} ++#endif ++ + static DEFINE_PCI_DEVICE_TABLE(ce4100_spi_devices) = { + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x2e6a) }, ++ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0935) }, + { }, + }; ++ + MODULE_DEVICE_TABLE(pci, ce4100_spi_devices); + + static struct pci_driver ce4100_spi_driver = { + .name = "ce4100_spi", + .id_table = ce4100_spi_devices, + .probe = ce4100_spi_probe, ++#ifdef CONFIG_PM ++ .suspend = ce4XXX_spi_suspend, ++ .resume = ce4XXX_spi_resume, ++#endif + .remove = ce4100_spi_remove, + }; + +diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c +index 5c8c4f5..125e76a 100644 +--- a/drivers/spi/spi-pxa2xx.c ++++ b/drivers/spi/spi-pxa2xx.c +@@ -26,14 +26,18 @@ + #include <linux/spi/pxa2xx_spi.h> + #include <linux/dma-mapping.h> + #include <linux/spi/spi.h> +-#include <linux/workqueue.h> + #include <linux/delay.h> ++#include <linux/clk.h> + #include <linux/gpio.h> + #include <linux/slab.h> ++#include <linux/io.h> ++#include <linux/delay.h> ++#include <linux/pm_runtime.h> ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC ++#include <asm/cln.h> ++#endif + +-#include <asm/io.h> + #include <asm/irq.h> +-#include <asm/delay.h> + + + MODULE_AUTHOR("Stephen Street"); +@@ -51,6 +55,9 @@ MODULE_ALIAS("platform:pxa2xx-spi"); + #define MAX_DMA_LEN 8191 + #define DMA_ALIGNMENT 8 + ++#define CE5X00_FIFO_DEPTH 32 ++#define CE4X00_FIFO_DEPTH 4 ++ + /* + * for testing SSCR1 changes that require SSP restart, basically + * everything except the service and interrupt enables, the pxa270 developer +@@ -59,35 +66,144 @@ MODULE_ALIAS("platform:pxa2xx-spi"); + * service and interrupt enables + */ + #define SSCR1_CHANGE_MASK (SSCR1_TTELP | SSCR1_TTE | SSCR1_SCFR \ +- | SSCR1_ECRA | SSCR1_ECRB | SSCR1_SCLKDIR \ +- | SSCR1_SFRMDIR | SSCR1_RWOT | SSCR1_TRAIL \ +- | SSCR1_IFS | SSCR1_STRF | SSCR1_EFWR \ +- | SSCR1_RFT | SSCR1_TFT | SSCR1_MWDS \ +- | SSCR1_SPH | SSCR1_SPO | SSCR1_LBM) +- +-#define DEFINE_SSP_REG(reg, off) \ +-static inline u32 read_##reg(void const __iomem *p) \ +-{ return __raw_readl(p + (off)); } \ +-\ +-static inline void write_##reg(u32 v, void __iomem *p) \ +-{ __raw_writel(v, p + (off)); } +- +-DEFINE_SSP_REG(SSCR0, 0x00) +-DEFINE_SSP_REG(SSCR1, 0x04) +-DEFINE_SSP_REG(SSSR, 0x08) +-DEFINE_SSP_REG(SSITR, 0x0c) +-DEFINE_SSP_REG(SSDR, 0x10) +-DEFINE_SSP_REG(SSTO, 0x28) +-DEFINE_SSP_REG(SSPSP, 0x2c) +- +-#define START_STATE ((void*)0) +-#define RUNNING_STATE ((void*)1) +-#define DONE_STATE ((void*)2) +-#define ERROR_STATE ((void*)-1) ++ | SSCR1_ECRA | SSCR1_ECRB | SSCR1_SCLKDIR \ ++ | SSCR1_SFRMDIR | SSCR1_RWOT | SSCR1_TRAIL \ ++ | SSCR1_IFS | SSCR1_STRF | SSCR1_EFWR \ ++ | SSCR1_RFT | SSCR1_TFT | SSCR1_MWDS \ ++ | SSCR1_SPH | SSCR1_SPO | SSCR1_LBM) ++ ++#define CE5X00_SSCR1_CHANGE_MASK (SSCR1_TTELP | SSCR1_TTE | SSCR1_SCFR \ ++ | SSCR1_ECRA | SSCR1_ECRB | SSCR1_SCLKDIR \ ++ | SSCR1_SFRMDIR | SSCR1_RWOT | SSCR1_TRAIL \ ++ | SSCR1_IFS | CE5X00_SSCR1_STRF \ ++ | CE5X00_SSCR1_EFWR \ ++ | CE5X00_SSCR1_RFT | CE5X00_SSCR1_TFT \ ++ | SSCR1_MWDS \ ++ | SSCR1_SPH | SSCR1_SPO | SSCR1_LBM) ++ ++ ++#define DEFINE_SSP_REG(reg, off) \ ++ static inline u32 read_##reg(void const __iomem *p) \ ++ { return __raw_readl(p + (off)); } \ ++ \ ++ static inline void write_##reg(u32 v, void __iomem *p) \ ++ { __raw_writel(v, p + (off)); } ++ ++DEFINE_SSP_REG(sscr0, 0x00) ++DEFINE_SSP_REG(sscr1, 0x04) ++DEFINE_SSP_REG(sssr, 0x08) ++DEFINE_SSP_REG(ssitr, 0x0c) ++DEFINE_SSP_REG(ssdr, 0x10) ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC ++DEFINE_SSP_REG(dds_rate, 0x28) /* SSTO unused for clanton */ ++#endif ++DEFINE_SSP_REG(ssto, 0x28) ++DEFINE_SSP_REG(sspsp, 0x2c) ++ ++#define START_STATE ((void *)0) ++#define RUNNING_STATE ((void *)1) ++#define DONE_STATE ((void *)2) ++#define ERROR_STATE ((void *)-1) + + #define QUEUE_RUNNING 0 + #define QUEUE_STOPPED 1 + ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC ++#define DDS_MAX 0x800000 ++#define DDS_666666 0x666666 ++#define DDS_400000 0x400000 ++#define DDS_200000 0x200000 ++#define DDS_100000 0x100000 ++#define DDS_80000 0x80000 ++#define DDS_40000 0x40000 ++#define DDS_20000 0x20000 ++#define DDS_10000 0x10000 ++#define DDS_8000 0x8000 ++ ++#if defined(CONFIG_INTEL_QUARK_X1000_SOC_FPGAEMU) ++/* these values are different on emulations where system clock is 14mhz */ ++#define FSYS 14 /* mhz */ ++#define BITRATE_50MHZ 3500000 ++#define BITRATE_40MHZ 2800000 ++#define BITRATE_25MHZ 1750000 ++#define BITRATE_20MHZ 1400000 ++#define BITRATE_16667KHZ 1167000 ++#define BITRATE_13333KHZ 933000 ++#define BITRATE_12500KHZ 875000 ++#define BITRATE_10MHZ 700000 ++#define BITRATE_8MHZ 560000 ++#define BITRATE_6250KHZ 438000 ++#define BITRATE_5MHZ 350000 ++#define BITRATE_4MHZ 280000 ++#define BITRATE_3125KHZ 219000 ++#define BITRATE_2500KHZ 175000 ++#define BITRATE_2MHZ 140000 ++#define BITRATE_1563KHZ 109000 ++#define BITRATE_1250KHZ 88000 ++#define BITRATE_1MHZ 70000 ++#define BITRATE_800KHZ 56000 ++#define BITRATE_781KHZ 54688 ++#define BITRATE_625KHZ 43750 ++#define BITRATE_500KHZ 35000 ++#define BITRATE_400KHZ 28000 ++#define BITRATE_390KHZ 27344 ++#define BITRATE_250KHZ 17500 ++#define BITRATE_200KHZ 14000 ++#define BITRATE_195KHZ 13672 ++#define BITRATE_125KHZ 8750 ++#define BITRATE_100KHZ 7000 ++#define BITRATE_50KHZ 3500 ++#define BITRATE_25KHZ 1750 ++#define BITRATE_10KHZ 701 ++#define BITRATE_5KHZ 353 ++#define BITRATE_1KHZ 70 ++#define BITRATE_MAX BITRATE_50MHZ ++#define BITRATE_MIN BITRATE_1KHZ ++ ++#else ++ ++#define BITRATE_50MHZ 50000000 ++#define BITRATE_40MHZ 40000000 ++#define BITRATE_25MHZ 25000000 ++#define BITRATE_20MHZ 20000000 ++#define BITRATE_16667KHZ 16667000 ++#define BITRATE_13333KHZ 13333000 ++#define BITRATE_12500KHZ 12500000 ++#define BITRATE_10MHZ 10000000 ++#define BITRATE_8MHZ 8000000 ++#define BITRATE_6250KHZ 6250000 ++#define BITRATE_5MHZ 5000000 ++#define BITRATE_4MHZ 4000000 ++#define BITRATE_3125KHZ 3125000 ++#define BITRATE_2500KHZ 2500000 ++#define BITRATE_2MHZ 2000000 ++#define BITRATE_1563KHZ 1563000 ++#define BITRATE_1250KHZ 1250000 ++#define BITRATE_1MHZ 1000000 ++#define BITRATE_800KHZ 800000 ++#define BITRATE_781KHZ 781250 ++#define BITRATE_625KHZ 625000 ++#define BITRATE_500KHZ 500000 ++#define BITRATE_400KHZ 400000 ++#define BITRATE_390KHZ 390625 ++#define BITRATE_250KHZ 250000 ++#define BITRATE_200KHZ 200000 ++#define BITRATE_195KHZ 195313 ++#define BITRATE_125KHZ 125000 ++#define BITRATE_100KHZ 100000 ++#define BITRATE_50KHZ 50000 ++#define BITRATE_25KHZ 25000 ++#define BITRATE_10KHZ 10016 ++#define BITRATE_5KHZ 5040 ++#define BITRATE_1KHZ 1000 ++#define BITRATE_MIN BITRATE_1KHZ ++#define BITRATE_MAX BITRATE_50MHZ ++#define FSYS 200 /* mhz */ ++ ++#endif /* #if defined(CONFIG_INTEL_QUARK_X1000_SOC_FPGAEMU) */ ++ ++#endif /* CONFIG_INTEL_QUARK_X1000_SOC */ ++ + struct driver_data { + /* Driver model hookup */ + struct platform_device *pdev; +@@ -117,20 +233,12 @@ struct driver_data { + u32 clear_sr; + u32 mask_sr; + +- /* Driver message queue */ +- struct workqueue_struct *workqueue; +- struct work_struct pump_messages; +- spinlock_t lock; +- struct list_head queue; +- int busy; +- int run; +- +- /* Message Transfer pump */ ++ /* Message per-transfer pump */ + struct tasklet_struct pump_transfers; + + /* Current message transfer state info */ +- struct spi_message* cur_msg; +- struct spi_transfer* cur_transfer; ++ struct spi_message *cur_msg; ++ struct spi_transfer *cur_transfer; + struct chip_data *cur_chip; + size_t len; + void *tx; +@@ -153,6 +261,9 @@ struct driver_data { + struct chip_data { + u32 cr0; + u32 cr1; ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC ++ u32 dds_rate; ++#endif + u32 psp; + u32 timeout; + u8 n_bytes; +@@ -173,14 +284,14 @@ struct chip_data { + void (*cs_control)(u32 command); + }; + +-static void pump_messages(struct work_struct *work); +- + static void cs_assert(struct driver_data *drv_data) + { + struct chip_data *chip = drv_data->cur_chip; + +- if (drv_data->ssp_type == CE4100_SSP) { +- write_SSSR(drv_data->cur_chip->frm, drv_data->ioaddr); ++ if (drv_data->ssp_type == CE4100_SSP || ++ (drv_data->ssp_type == CE5X00_SSP && ++ (!gpio_is_valid(chip->gpio_cs)))) { ++ write_sssr(drv_data->cur_chip->frm, drv_data->ioaddr); + return; + } + +@@ -197,9 +308,11 @@ static void cs_deassert(struct driver_data *drv_data) + { + struct chip_data *chip = drv_data->cur_chip; + +- if (drv_data->ssp_type == CE4100_SSP) ++ if (drv_data->ssp_type == CE4100_SSP || ++ (drv_data->ssp_type == CE5X00_SSP ++ && (!gpio_is_valid(chip->gpio_cs)))) { + return; +- ++ } + if (chip->cs_control) { + chip->cs_control(PXA2XX_CS_DEASSERT); + return; +@@ -209,14 +322,15 @@ static void cs_deassert(struct driver_data *drv_data) + gpio_set_value(chip->gpio_cs, !chip->gpio_cs_inverted); + } + +-static void write_SSSR_CS(struct driver_data *drv_data, u32 val) ++static void write_sssr_cs(struct driver_data *drv_data, u32 val) + { + void __iomem *reg = drv_data->ioaddr; + +- if (drv_data->ssp_type == CE4100_SSP) +- val |= read_SSSR(reg) & SSSR_ALT_FRM_MASK; ++ if (drv_data->ssp_type == CE4100_SSP ++ || drv_data->ssp_type == CE5X00_SSP) ++ val |= read_sssr(reg) & SSSR_ALT_FRM_MASK; + +- write_SSSR(val, reg); ++ write_sssr(val, reg); + } + + static int pxa25x_ssp_comp(struct driver_data *drv_data) +@@ -225,6 +339,10 @@ static int pxa25x_ssp_comp(struct driver_data *drv_data) + return 1; + if (drv_data->ssp_type == CE4100_SSP) + return 1; ++#ifdef CONFIG_GEN3_SPI ++ if (drv_data->ssp_type == CE5X00_SSP) ++ return 2; ++#endif + return 0; + } + +@@ -235,25 +353,46 @@ static int flush(struct driver_data *drv_data) + void __iomem *reg = drv_data->ioaddr; + + do { +- while (read_SSSR(reg) & SSSR_RNE) { +- read_SSDR(reg); +- } +- } while ((read_SSSR(reg) & SSSR_BSY) && --limit); +- write_SSSR_CS(drv_data, SSSR_ROR); ++ while (read_sssr(reg) & SSSR_RNE) ++ read_ssdr(reg); ++ } while ((read_sssr(reg) & SSSR_BSY) && --limit); ++ write_sssr_cs(drv_data, SSSR_ROR); + + return limit; + } + ++#ifdef CONFIG_GEN3_SPI ++static void wait_till_not_busy(struct driver_data *drv_data) ++{ ++ /* ++ * Most cases, the BSY bit will be cleared in very short time. ++ * But if the controller is set to the slowest speed, the BSY ++ * bit waitting time will increase a lot. ++ * Here, we set the wait time to 100ms is to deal with such corner case, ++ * but in real world, there is almost no one will use the slowest ++ * speed to transfer data, which means there is no need to add more ++ * complex code to to deal with the slowest speed case. ++ */ ++ unsigned long end = jiffies + 1 + usecs_to_jiffies(100000); ++ void __iomem *reg = drv_data->ioaddr; ++ while (time_before(jiffies, end)) { ++ if (!(read_sssr(reg) & SSSR_BSY)) ++ return; ++ } ++ pr_err("SPI MASTER keeps busy for 100ms after a read/write!\n"); ++} ++#endif ++ + static int null_writer(struct driver_data *drv_data) + { + void __iomem *reg = drv_data->ioaddr; + u8 n_bytes = drv_data->n_bytes; + +- if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK) +- || (drv_data->tx == drv_data->tx_end)) ++ if ((!(read_sssr(reg) & SSSR_TNF)) ++ || (drv_data->tx == drv_data->tx_end)) + return 0; + +- write_SSDR(0, reg); ++ write_ssdr(0, reg); + drv_data->tx += n_bytes; + + return 1; +@@ -264,9 +403,9 @@ static int null_reader(struct driver_data *drv_data) + void __iomem *reg = drv_data->ioaddr; + u8 n_bytes = drv_data->n_bytes; + +- while ((read_SSSR(reg) & SSSR_RNE) ++ while ((read_sssr(reg) & SSSR_RNE) + && (drv_data->rx < drv_data->rx_end)) { +- read_SSDR(reg); ++ read_ssdr(reg); + drv_data->rx += n_bytes; + } + +@@ -277,11 +416,11 @@ static int u8_writer(struct driver_data *drv_data) + { + void __iomem *reg = drv_data->ioaddr; + +- if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK) +- || (drv_data->tx == drv_data->tx_end)) ++ if ((!(read_sssr(reg) & SSSR_TNF)) ++ || (drv_data->tx == drv_data->tx_end)) + return 0; + +- write_SSDR(*(u8 *)(drv_data->tx), reg); ++ write_ssdr(*(u8 *)(drv_data->tx), reg); + ++drv_data->tx; + + return 1; +@@ -291,9 +430,9 @@ static int u8_reader(struct driver_data *drv_data) + { + void __iomem *reg = drv_data->ioaddr; + +- while ((read_SSSR(reg) & SSSR_RNE) +- && (drv_data->rx < drv_data->rx_end)) { +- *(u8 *)(drv_data->rx) = read_SSDR(reg); ++ while ((read_sssr(reg) & SSSR_RNE) ++ && (drv_data->rx < drv_data->rx_end)) { ++ *(u8 *)(drv_data->rx) = read_ssdr(reg); + ++drv_data->rx; + } + +@@ -304,11 +443,11 @@ static int u16_writer(struct driver_data *drv_data) + { + void __iomem *reg = drv_data->ioaddr; + +- if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK) +- || (drv_data->tx == drv_data->tx_end)) ++ if ((!(read_sssr(reg) & SSSR_TNF)) ++ || (drv_data->tx == drv_data->tx_end)) + return 0; + +- write_SSDR(*(u16 *)(drv_data->tx), reg); ++ write_ssdr(*(u16 *)(drv_data->tx), reg); + drv_data->tx += 2; + + return 1; +@@ -318,9 +457,9 @@ static int u16_reader(struct driver_data *drv_data) + { + void __iomem *reg = drv_data->ioaddr; + +- while ((read_SSSR(reg) & SSSR_RNE) +- && (drv_data->rx < drv_data->rx_end)) { +- *(u16 *)(drv_data->rx) = read_SSDR(reg); ++ while ((read_sssr(reg) & SSSR_RNE) ++ && (drv_data->rx < drv_data->rx_end)) { ++ *(u16 *)(drv_data->rx) = read_ssdr(reg); + drv_data->rx += 2; + } + +@@ -331,11 +470,11 @@ static int u32_writer(struct driver_data *drv_data) + { + void __iomem *reg = drv_data->ioaddr; + +- if (((read_SSSR(reg) & SSSR_TFL_MASK) == SSSR_TFL_MASK) +- || (drv_data->tx == drv_data->tx_end)) ++ if ((!(read_sssr(reg) & SSSR_TNF)) ++ || (drv_data->tx == drv_data->tx_end)) + return 0; + +- write_SSDR(*(u32 *)(drv_data->tx), reg); ++ write_ssdr(*(u32 *)(drv_data->tx), reg); + drv_data->tx += 4; + + return 1; +@@ -345,9 +484,9 @@ static int u32_reader(struct driver_data *drv_data) + { + void __iomem *reg = drv_data->ioaddr; + +- while ((read_SSSR(reg) & SSSR_RNE) +- && (drv_data->rx < drv_data->rx_end)) { +- *(u32 *)(drv_data->rx) = read_SSDR(reg); ++ while ((read_sssr(reg) & SSSR_RNE) ++ && (drv_data->rx < drv_data->rx_end)) { ++ *(u32 *)(drv_data->rx) = read_ssdr(reg); + drv_data->rx += 4; + } + +@@ -443,20 +582,11 @@ static void unmap_dma_buffers(struct driver_data *drv_data) + /* caller already set message->status; dma and pio irqs are blocked */ + static void giveback(struct driver_data *drv_data) + { +- struct spi_transfer* last_transfer; +- unsigned long flags; +- struct spi_message *msg; ++ struct spi_transfer *last_transfer; + +- spin_lock_irqsave(&drv_data->lock, flags); +- msg = drv_data->cur_msg; +- drv_data->cur_msg = NULL; +- drv_data->cur_transfer = NULL; +- queue_work(drv_data->workqueue, &drv_data->pump_messages); +- spin_unlock_irqrestore(&drv_data->lock, flags); +- +- last_transfer = list_entry(msg->transfers.prev, +- struct spi_transfer, +- transfer_list); ++ last_transfer = list_entry(drv_data->cur_msg->transfers.prev, ++ struct spi_transfer, ++ transfer_list); + + /* Delay if requested before any change in chip select */ + if (last_transfer->delay_usecs) +@@ -475,41 +605,33 @@ static void giveback(struct driver_data *drv_data) + * time with the following tests unless this was hinted. + * + * We cannot postpone this until pump_messages, because +- * after calling msg->complete (below) the driver that +- * sent the current message could be unloaded, which +- * could invalidate the cs_control() callback... ++ * after calling spi_finalize_current_message (below) the ++ * driver that sent the current message could be unloaded, ++ * which could invalidate the cs_control() callback... + */ +- + /* get a pointer to the next message, if any */ +- spin_lock_irqsave(&drv_data->lock, flags); +- if (list_empty(&drv_data->queue)) +- next_msg = NULL; +- else +- next_msg = list_entry(drv_data->queue.next, +- struct spi_message, queue); +- spin_unlock_irqrestore(&drv_data->lock, flags); ++ next_msg = spi_get_next_queued_message(drv_data->master); + + /* see if the next and current messages point + * to the same chip + */ +- if (next_msg && next_msg->spi != msg->spi) ++ if (next_msg && next_msg->spi != drv_data->cur_msg->spi) + next_msg = NULL; +- if (!next_msg || msg->state == ERROR_STATE) ++ if (!next_msg || drv_data->cur_msg->state == ERROR_STATE) + cs_deassert(drv_data); + } + +- msg->state = NULL; +- if (msg->complete) +- msg->complete(msg->context); +- ++ drv_data->cur_msg = NULL; ++ drv_data->cur_transfer = NULL; + drv_data->cur_chip = NULL; ++ spi_finalize_current_message(drv_data->master); + } + + static int wait_ssp_rx_stall(void const __iomem *ioaddr) + { + unsigned long limit = loops_per_jiffy << 1; + +- while ((read_SSSR(ioaddr) & SSSR_BSY) && --limit) ++ while ((read_sssr(ioaddr) & SSSR_BSY) && --limit) + cpu_relax(); + + return limit; +@@ -532,12 +654,12 @@ static void dma_error_stop(struct driver_data *drv_data, const char *msg) + /* Stop and reset */ + DCSR(drv_data->rx_channel) = RESET_DMA_CHANNEL; + DCSR(drv_data->tx_channel) = RESET_DMA_CHANNEL; +- write_SSSR_CS(drv_data, drv_data->clear_sr); +- write_SSCR1(read_SSCR1(reg) & ~drv_data->dma_cr1, reg); ++ write_sssr_cs(drv_data, drv_data->clear_sr); ++ write_sscr1(read_sscr1(reg) & ~drv_data->dma_cr1, reg); + if (!pxa25x_ssp_comp(drv_data)) +- write_SSTO(0, reg); ++ write_ssto(0, reg); + flush(drv_data); +- write_SSCR0(read_SSCR0(reg) & ~SSCR0_SSE, reg); ++ write_sscr0(read_sscr0(reg) & ~SSCR0_SSE, reg); + + unmap_dma_buffers(drv_data); + +@@ -553,8 +675,8 @@ static void dma_transfer_complete(struct driver_data *drv_data) + struct spi_message *msg = drv_data->cur_msg; + + /* Clear and disable interrupts on SSP and DMA channels*/ +- write_SSCR1(read_SSCR1(reg) & ~drv_data->dma_cr1, reg); +- write_SSSR_CS(drv_data, drv_data->clear_sr); ++ write_sscr1(read_sscr1(reg) & ~drv_data->dma_cr1, reg); ++ write_sssr_cs(drv_data, drv_data->clear_sr); + DCSR(drv_data->tx_channel) = RESET_DMA_CHANNEL; + DCSR(drv_data->rx_channel) = RESET_DMA_CHANNEL; + +@@ -630,7 +752,7 @@ static irqreturn_t dma_transfer(struct driver_data *drv_data) + u32 irq_status; + void __iomem *reg = drv_data->ioaddr; + +- irq_status = read_SSSR(reg) & drv_data->mask_sr; ++ irq_status = read_sssr(reg) & drv_data->mask_sr; + if (irq_status & SSSR_ROR) { + dma_error_stop(drv_data, "dma_transfer: fifo overrun"); + return IRQ_HANDLED; +@@ -639,7 +761,7 @@ static irqreturn_t dma_transfer(struct driver_data *drv_data) + /* Check for false positive timeout */ + if ((irq_status & SSSR_TINT) + && (DCSR(drv_data->tx_channel) & DCSR_RUN)) { +- write_SSSR(SSSR_TINT, reg); ++ write_sssr(SSSR_TINT, reg); + return IRQ_HANDLED; + } + +@@ -648,7 +770,7 @@ static irqreturn_t dma_transfer(struct driver_data *drv_data) + /* Clear and disable timeout interrupt, do the rest in + * dma_transfer_complete */ + if (!pxa25x_ssp_comp(drv_data)) +- write_SSTO(0, reg); ++ write_ssto(0, reg); + + /* finish this transfer, start the next */ + dma_transfer_complete(drv_data); +@@ -666,23 +788,26 @@ static void reset_sccr1(struct driver_data *drv_data) + struct chip_data *chip = drv_data->cur_chip; + u32 sccr1_reg; + +- sccr1_reg = read_SSCR1(reg) & ~drv_data->int_cr1; +- sccr1_reg &= ~SSCR1_RFT; ++ sccr1_reg = read_sscr1(reg) & ~drv_data->int_cr1; ++ if (drv_data->ssp_type == CE5X00_SSP) ++ sccr1_reg &= ~CE5X00_SSCR1_RFT; ++ else ++ sccr1_reg &= ~SSCR1_RFT; + sccr1_reg |= chip->threshold; +- write_SSCR1(sccr1_reg, reg); ++ write_sscr1(sccr1_reg, reg); + } + +-static void int_error_stop(struct driver_data *drv_data, const char* msg) ++static void int_error_stop(struct driver_data *drv_data, const char *msg) + { + void __iomem *reg = drv_data->ioaddr; + + /* Stop and reset SSP */ +- write_SSSR_CS(drv_data, drv_data->clear_sr); ++ write_sssr_cs(drv_data, drv_data->clear_sr); + reset_sccr1(drv_data); + if (!pxa25x_ssp_comp(drv_data)) +- write_SSTO(0, reg); ++ write_ssto(0, reg); + flush(drv_data); +- write_SSCR0(read_SSCR0(reg) & ~SSCR0_SSE, reg); ++ write_sscr0(read_sscr0(reg) & ~SSCR0_SSE, reg); + + dev_err(&drv_data->pdev->dev, "%s\n", msg); + +@@ -695,10 +820,10 @@ static void int_transfer_complete(struct driver_data *drv_data) + void __iomem *reg = drv_data->ioaddr; + + /* Stop SSP */ +- write_SSSR_CS(drv_data, drv_data->clear_sr); ++ write_sssr_cs(drv_data, drv_data->clear_sr); + reset_sccr1(drv_data); + if (!pxa25x_ssp_comp(drv_data)) +- write_SSTO(0, reg); ++ write_ssto(0, reg); + + /* Update total byte transferred return count actual bytes read */ + drv_data->cur_msg->actual_length += drv_data->len - +@@ -715,14 +840,16 @@ static void int_transfer_complete(struct driver_data *drv_data) + tasklet_schedule(&drv_data->pump_transfers); + } + ++#ifndef CONFIG_GEN3_SPI ++ + static irqreturn_t interrupt_transfer(struct driver_data *drv_data) + { + void __iomem *reg = drv_data->ioaddr; + +- u32 irq_mask = (read_SSCR1(reg) & SSCR1_TIE) ? ++ u32 irq_mask = (read_sscr1(reg) & SSCR1_TIE) ? + drv_data->mask_sr : drv_data->mask_sr & ~SSSR_TFS; + +- u32 irq_status = read_SSSR(reg) & irq_mask; ++ u32 irq_status = read_sssr(reg) & irq_mask; + + if (irq_status & SSSR_ROR) { + int_error_stop(drv_data, "interrupt_transfer: fifo overrun"); +@@ -730,7 +857,7 @@ static irqreturn_t interrupt_transfer(struct driver_data *drv_data) + } + + if (irq_status & SSSR_TINT) { +- write_SSSR(SSSR_TINT, reg); ++ write_sssr_cs(drv_data, SSSR_TINT); + if (drv_data->read(drv_data)) { + int_transfer_complete(drv_data); + return IRQ_HANDLED; +@@ -751,10 +878,12 @@ static irqreturn_t interrupt_transfer(struct driver_data *drv_data) + } + + if (drv_data->tx == drv_data->tx_end) { +- u32 bytes_left; ++#ifndef CONFIG_GEN3_SPI ++ u32 bytes_left = 0; ++#endif + u32 sccr1_reg; + +- sccr1_reg = read_SSCR1(reg); ++ sccr1_reg = read_sscr1(reg); + sccr1_reg &= ~SSCR1_TIE; + + /* +@@ -762,13 +891,13 @@ static irqreturn_t interrupt_transfer(struct driver_data *drv_data) + * remaining RX bytes. + */ + if (pxa25x_ssp_comp(drv_data)) { +- ++#ifndef CONFIG_GEN3_SPI + sccr1_reg &= ~SSCR1_RFT; + + bytes_left = drv_data->rx_end - drv_data->rx; + switch (drv_data->n_bytes) { + case 4: +- bytes_left >>= 1; ++ bytes_left >>= 2; + case 2: + bytes_left >>= 1; + } +@@ -777,23 +906,198 @@ static irqreturn_t interrupt_transfer(struct driver_data *drv_data) + bytes_left = RX_THRESH_DFLT; + + sccr1_reg |= SSCR1_RxTresh(bytes_left); ++#endif ++ } ++ write_sscr1(sccr1_reg, reg); ++#ifdef CONFIG_GEN3_SPI ++ if (!wait_ssp_rx_stall(reg)) { ++ int_error_stop(drv_data, ++ "interrupt_transfer: rx stall failed"); ++ return IRQ_HANDLED; ++ } ++ ++ if (!drv_data->read(drv_data)) { ++ int_error_stop(drv_data, ++ "interrupt_transfer: " ++ "trailing byte read failed"); ++ return IRQ_HANDLED; ++ } ++ ++ int_transfer_complete(drv_data); ++#endif ++ ++ } ++ ++ /* We did something */ ++ return IRQ_HANDLED; ++} ++#else ++#ifdef WANT_TO_USE_THIS ++static int is_txfifo_empty(struct driver_data *drv_data, u32 tfl_mask) ++{ ++ void __iomem *reg = drv_data->ioaddr; ++ u32 sssr = read_sssr(reg); ++ u32 tx_fifo_entry = 0; ++ tx_fifo_entry = (sssr & tfl_mask)>>8; ++ if ((sssr & SSSR_TNF) && (!tx_fifo_entry)) ++ return 1; ++ return 0; ++} ++#endif ++ ++static void pxa2xx_update_tx_threshold(struct driver_data *drv_data, ++ u32 threshold) ++{ ++ void __iomem *reg = drv_data->ioaddr; ++ u32 sscr1_reg = 0; ++ sscr1_reg = read_sscr1(reg); ++ sscr1_reg |= SSCR1_TIE; ++ if (drv_data->ssp_type == CE5X00_SSP) { ++ sscr1_reg &= ~CE5X00_SSCR1_TFT; ++ sscr1_reg |= CE5X00_SSCR1_TxTresh(threshold); ++ } else { ++ sscr1_reg &= ~SSCR1_TFT; ++ sscr1_reg |= SSCR1_TxTresh(threshold); ++ } ++ ++ write_sscr1(sscr1_reg, reg); ++} ++ ++static void pxa2xx_mask_intr(void __iomem *reg, u32 intr) ++{ ++ u32 mask; ++ mask = read_sscr1(reg) & ~intr; ++ write_sscr1(mask, reg); ++} ++ ++static void pxa2xx_unmask_intr(void __iomem *reg, u32 intr) ++{ ++ u32 mask; ++ mask = read_sscr1(reg) | intr; ++ write_sscr1(mask, reg); ++} ++ ++static irqreturn_t interrupt_transfer(struct driver_data *drv_data) ++{ ++ void __iomem *reg = drv_data->ioaddr; ++ ++ u32 tx_count; ++ u32 irq_mask = (read_sscr1(reg) & SSCR1_TIE) ? ++ drv_data->mask_sr : drv_data->mask_sr & ~SSSR_TFS; ++ ++ int left; ++ ++ u32 tmp_sssr = read_sssr(reg); ++ u32 irq_status = tmp_sssr & irq_mask; ++ /* ++ * Transmit FIFO Level Depth/MASK/Default value ++ */ ++ u32 fifo_depth, sssr_tfl_mask, sscr1_tft_mask, tfl_default; ++ ++ /* ++ * Check whether the irq is valid spi interrupt ++ */ ++ if (!(tmp_sssr & (SSSR_TFS | SSSR_RFS | SSSR_ROR))) ++ return IRQ_NONE; ++ ++ switch (drv_data->ssp_type) { ++ case CE4100_SSP: ++ fifo_depth = CE4X00_FIFO_DEPTH; ++ sssr_tfl_mask = SSSR_TFL_MASK; ++ sscr1_tft_mask = SSCR1_TFT; ++ tfl_default = TX_THRESH_DFLT; ++ break; ++ case CE5X00_SSP: ++ fifo_depth = CE5X00_FIFO_DEPTH; ++ sssr_tfl_mask = CE5X00_SSSR_TFL_MASK; ++ sscr1_tft_mask = CE5X00_SSCR1_TFT; ++ tfl_default = TX_THRESH_CE5X00_DFLT; ++ break; ++ default: ++ int_error_stop(drv_data, "Unsupported spi contoller type"); ++ return IRQ_HANDLED; ++ } ++ ++ ++ if (irq_status & SSSR_ROR) { ++ int_error_stop(drv_data, "interrupt_transfer: fifo overrun"); ++ return IRQ_HANDLED; ++ } ++ ++ ++ if (irq_status & SSSR_TINT) { ++ write_sssr_cs(drv_data, SSSR_TINT); ++ if (drv_data->read(drv_data)) { ++ int_transfer_complete(drv_data); ++ return IRQ_HANDLED; + } +- write_SSCR1(sccr1_reg, reg); + } + ++ ++ if (irq_status & SSSR_TFS) { ++ ++ /* ++ * Mask the Transmit interrupt ++ */ ++ pxa2xx_mask_intr(reg, SSCR1_TIE); ++ ++ left = (drv_data->tx_end - drv_data->tx) / drv_data->n_bytes; ++ ++ tmp_sssr = read_sssr(reg); ++ tmp_sssr = (tmp_sssr & sssr_tfl_mask)>>8; ++ /* ++ * Choose the correct tx_count to fill the Tx fifo and ++ * avoid the Rx Fifo overrun ++ */ ++ tx_count = (fifo_depth - 1) - tmp_sssr; ++ ++ if (left <= tx_count) { ++ if (left > 0) { ++ drv_data->read(drv_data); ++ pxa2xx_update_tx_threshold(drv_data, 1); ++ while ((left) > 0) { ++ left--; ++ drv_data->write(drv_data); ++ } ++ pxa2xx_unmask_intr(reg, SSCR1_TIE); ++ return IRQ_HANDLED; ++ } else { ++ /* ++ * Tx transfer is done now, ++ * Read data when controller is not busy. ++ */ ++ wait_till_not_busy(drv_data); ++ drv_data->read(drv_data); ++ pxa2xx_unmask_intr(reg, SSCR1_TIE); ++ int_transfer_complete(drv_data); ++ return IRQ_HANDLED; ++ } ++ } else { ++ left = (left > tx_count) ? tx_count : left; ++ drv_data->read(drv_data); ++ while ((left) > 0) { ++ left--; ++ drv_data->write(drv_data); ++ } ++ pxa2xx_unmask_intr(reg, SSCR1_TIE); ++ return IRQ_HANDLED; ++ } ++ } + /* We did something */ + return IRQ_HANDLED; + } ++#endif + + static irqreturn_t ssp_int(int irq, void *dev_id) + { + struct driver_data *drv_data = dev_id; + void __iomem *reg = drv_data->ioaddr; +- u32 sccr1_reg = read_SSCR1(reg); ++ u32 sccr1_reg = read_sscr1(reg); + u32 mask = drv_data->mask_sr; + u32 status; ++ irqreturn_t ret; + +- status = read_SSSR(reg); ++ status = read_sssr(reg); + + /* Ignore possible writes if we don't need to write */ + if (!(sccr1_reg & SSCR1_TIE)) +@@ -802,22 +1106,27 @@ static irqreturn_t ssp_int(int irq, void *dev_id) + if (!(status & mask)) + return IRQ_NONE; + ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC ++ mask_pvm(drv_data->ssp->pcidev); ++#endif + if (!drv_data->cur_msg) { + +- write_SSCR0(read_SSCR0(reg) & ~SSCR0_SSE, reg); +- write_SSCR1(read_SSCR1(reg) & ~drv_data->int_cr1, reg); ++ write_sscr0(read_sscr0(reg) & ~SSCR0_SSE, reg); ++ write_sscr1(read_sscr1(reg) & ~drv_data->int_cr1, reg); + if (!pxa25x_ssp_comp(drv_data)) +- write_SSTO(0, reg); +- write_SSSR_CS(drv_data, drv_data->clear_sr); +- +- dev_err(&drv_data->pdev->dev, "bad message state " +- "in interrupt handler\n"); ++ write_ssto(0, reg); ++ write_sssr_cs(drv_data, drv_data->clear_sr); + ++ dev_err(&drv_data->pdev->dev, ++ "bad message state in interrupt handler\n"); + /* Never fail */ + return IRQ_HANDLED; + } +- +- return drv_data->transfer_handler(drv_data); ++ ret = drv_data->transfer_handler(drv_data); ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC ++ unmask_pvm(drv_data->ssp->pcidev); ++#endif ++ return ret; + } + + static int set_dma_burst_and_threshold(struct chip_data *chip, +@@ -916,16 +1225,192 @@ static int set_dma_burst_and_threshold(struct chip_data *chip, + + return retval; + } ++#ifdef CONFIG_GEN3_SPI ++/* this returns the value of DDS_FREQ not Input_Clock ++ DDS_FREQ = Input_Clock ( DDS_CLK_RATEdec / 2^24) */ ++static unsigned long spi_clk_get_rate(int ssp_type) ++{ ++ switch (ssp_type) { ++ case CE5X00_SSP: ++ /* CE5X00 clk is 10MHZ */ ++ return 10000000; ++ case CE4100_SSP: ++ /* CE4X00 clk is 3.684MHZ */ ++ default: ++ return 3686400; ++ } + ++ return 3686400; ++} ++#endif ++ ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC ++/* see Clanton SPI data sheet for implementation rationale */ ++u32 cln_set_clk_regvals(u32 rate, u32 *dds, u32 *clk_div) ++{ ++ if (rate <= BITRATE_MAX && rate >= BITRATE_MIN) { ++ if (rate >= BITRATE_50MHZ) { ++ *dds = DDS_MAX; ++ *clk_div = 0; ++ return BITRATE_50MHZ; ++ } else if (rate >= BITRATE_40MHZ) { ++ *dds = DDS_666666; ++ *clk_div = 0; ++ return BITRATE_40MHZ; ++ } else if (rate >= BITRATE_25MHZ) { ++ *dds = DDS_400000; ++ *clk_div = 0; ++ return BITRATE_25MHZ; ++ } else if (rate >= BITRATE_20MHZ) { ++ *dds = DDS_666666; ++ *clk_div = 1; ++ return BITRATE_20MHZ; ++ } else if (rate >= BITRATE_16667KHZ) { ++ *dds = DDS_MAX; ++ *clk_div = 2; ++ return BITRATE_16667KHZ; ++ } else if (rate >= BITRATE_13333KHZ) { ++ *dds = DDS_666666; ++ *clk_div = 2; ++ return BITRATE_13333KHZ; ++ } else if (rate >= BITRATE_12500KHZ) { ++ *dds = DDS_200000; ++ *clk_div = 0; ++ return BITRATE_12500KHZ; ++ } else if (rate >= BITRATE_10MHZ) { ++ *dds = DDS_MAX; ++ *clk_div = 4; ++ return BITRATE_10MHZ; ++ } else if (rate >= BITRATE_8MHZ) { ++ *dds = DDS_666666; ++ *clk_div = 4; ++ return BITRATE_8MHZ; ++ } else if (rate >= BITRATE_6250KHZ) { ++ *dds = DDS_400000; ++ *clk_div = 3; ++ return BITRATE_6250KHZ; ++ } else if (rate >= BITRATE_5MHZ) { ++ *dds = DDS_400000; ++ *clk_div = 4; ++ return BITRATE_5MHZ; ++ } else if (rate >= BITRATE_4MHZ) { ++ *dds = DDS_666666; ++ *clk_div = 9; ++ return BITRATE_4MHZ; ++ } else if (rate >= BITRATE_3125KHZ) { ++ *dds = DDS_80000; ++ *clk_div = 0; ++ return BITRATE_3125KHZ; ++ } else if (rate >= BITRATE_2500KHZ) { ++ *dds = DDS_400000; ++ *clk_div = 9; ++ return BITRATE_2500KHZ; ++ } else if (rate >= BITRATE_2MHZ) { ++ *dds = DDS_666666; ++ *clk_div = 19; ++ return BITRATE_2MHZ; ++ } else if (rate >= BITRATE_1563KHZ) { ++ *dds = DDS_40000; ++ *clk_div = 0; ++ return BITRATE_1563KHZ; ++ } else if (rate >= BITRATE_1250KHZ) { ++ *dds = DDS_200000; ++ *clk_div = 9; ++ return BITRATE_1250KHZ; ++ } else if (rate >= BITRATE_1MHZ) { ++ *dds = DDS_400000; ++ *clk_div = 24; ++ return BITRATE_1MHZ; ++ } else if (rate >= BITRATE_800KHZ) { ++ *dds = DDS_666666; ++ *clk_div = 49; ++ return BITRATE_800KHZ; ++ } else if (rate >= BITRATE_781KHZ) { ++ *dds = DDS_20000; ++ *clk_div = 0; ++ return BITRATE_781KHZ; ++ } else if (rate >= BITRATE_625KHZ) { ++ *dds = DDS_200000; ++ *clk_div = 19; ++ return BITRATE_625KHZ; ++ } else if (rate >= BITRATE_500KHZ) { ++ *dds = DDS_400000; ++ *clk_div = 49; ++ return BITRATE_500KHZ; ++ } else if (rate >= BITRATE_400KHZ) { ++ *dds = DDS_666666; ++ *clk_div = 99; ++ return BITRATE_400KHZ; ++ } else if (rate >= BITRATE_390KHZ) { ++ *dds = DDS_10000; ++ *clk_div = 0; ++ return BITRATE_390KHZ; ++ } else if (rate >= BITRATE_250KHZ) { ++ *dds = DDS_400000; ++ *clk_div = 99; ++ return BITRATE_250KHZ; ++ } else if (rate >= BITRATE_200KHZ) { ++ *dds = DDS_666666; ++ *clk_div = 199; ++ return BITRATE_200KHZ; ++ } else if (rate >= BITRATE_195KHZ) { ++ *dds = DDS_8000; ++ *clk_div = 0; ++ return BITRATE_195KHZ; ++ } else if (rate >= BITRATE_125KHZ) { ++ *dds = DDS_100000; ++ *clk_div = 49; ++ return BITRATE_125KHZ; ++ } else if (rate >= BITRATE_100KHZ) { ++ *dds = DDS_200000; ++ *clk_div = 124; ++ return BITRATE_100KHZ; ++ } else if (rate >= BITRATE_50KHZ) { ++ *dds = DDS_100000; ++ *clk_div = 124; ++ return BITRATE_50KHZ; ++ } else if (rate >= BITRATE_25KHZ) { ++ *dds = DDS_80000; ++ *clk_div = 124; ++ return BITRATE_25KHZ; ++ } else if (rate >= BITRATE_10KHZ) { ++ *dds = DDS_20000; ++ *clk_div = 77; ++ return BITRATE_10KHZ; ++ } else if (rate >= BITRATE_5KHZ) { ++ *dds = DDS_20000; ++ *clk_div = 154; ++ return BITRATE_5KHZ; ++ } else if (rate >= BITRATE_1KHZ) { ++ *dds = DDS_8000; ++ *clk_div = 194; ++ return BITRATE_1KHZ; ++ } ++ } else { ++ *dds = DDS_8000; ++ *clk_div = 194; ++ return BITRATE_MIN; ++ } ++ return 0; ++} ++#else ++/* this returns the value that SCR needs to be set to ++ Bit rate = DDS_FREQ / (2 x (SCR + 1)) */ + static unsigned int ssp_get_clk_div(struct ssp_device *ssp, int rate) + { ++#ifdef CONFIG_GEN3_SPI ++ unsigned long ssp_clk = spi_clk_get_rate(ssp->type); ++#else + unsigned long ssp_clk = clk_get_rate(ssp->clk); ++#endif + +- if (ssp->type == PXA25x_SSP || ssp->type == CE4100_SSP) ++ if (ssp->type == PXA25x_SSP || ssp->type == CE4100_SSP ++ || ssp->type == CE5X00_SSP) + return ((ssp_clk / (2 * rate) - 1) & 0xff) << 8; + else + return ((ssp_clk / rate - 1) & 0xfff) << 8; + } ++#endif /* CONFIG_INTEL_QUARK_X1000_SOC */ + + static void pump_transfers(unsigned long data) + { +@@ -934,7 +1419,11 @@ static void pump_transfers(unsigned long data) + struct spi_transfer *transfer = NULL; + struct spi_transfer *previous = NULL; + struct chip_data *chip = NULL; ++#ifndef CONFIG_INTEL_QUARK_X1000_SOC + struct ssp_device *ssp = drv_data->ssp; ++#else ++ u32 actual_speed = 0; ++#endif + void __iomem *reg = drv_data->ioaddr; + u32 clk_div = 0; + u8 bits = 0; +@@ -947,8 +1436,11 @@ static void pump_transfers(unsigned long data) + /* Get current state information */ + message = drv_data->cur_msg; + transfer = drv_data->cur_transfer; ++ + chip = drv_data->cur_chip; + ++ if (transfer->bits_per_word) ++ chip->n_bytes = (transfer->bits_per_word + 7)/8; + /* Handle for abort */ + if (message->state == ERROR_STATE) { + message->status = -EIO; +@@ -992,11 +1484,11 @@ static void pump_transfers(unsigned long data) + } + + /* warn ... we force this to PIO mode */ +- if (printk_ratelimit()) +- dev_warn(&message->spi->dev, "pump_transfers: " +- "DMA disabled for transfer length %ld " +- "greater than %d\n", +- (long)drv_data->len, MAX_DMA_LEN); ++ dev_warn_ratelimited(&message->spi->dev, ++ "pump_transfers: " ++ "DMA disabled for transfer length %ld " ++ "greater than %d\n", ++ (long)drv_data->len, MAX_DMA_LEN); + } + + /* Setup the transfer state based on the type of transfer */ +@@ -1009,19 +1501,21 @@ static void pump_transfers(unsigned long data) + drv_data->n_bytes = chip->n_bytes; + drv_data->dma_width = chip->dma_width; + drv_data->tx = (void *)transfer->tx_buf; +- drv_data->tx_end = drv_data->tx + transfer->len; ++ drv_data->tx_end = drv_data->tx ++ + (transfer->len/drv_data->n_bytes)*drv_data->n_bytes; + drv_data->rx = transfer->rx_buf; +- drv_data->rx_end = drv_data->rx + transfer->len; ++ drv_data->rx_end = drv_data->rx ++ + (transfer->len/drv_data->n_bytes)*drv_data->n_bytes; + drv_data->rx_dma = transfer->rx_dma; + drv_data->tx_dma = transfer->tx_dma; +- drv_data->len = transfer->len & DCMD_LENGTH; ++ drv_data->len = (transfer->len/drv_data->n_bytes) ++ * drv_data->n_bytes & DCMD_LENGTH; + drv_data->write = drv_data->tx ? chip->write : null_writer; + drv_data->read = drv_data->rx ? chip->read : null_reader; + + /* Change speed and bit per word on a per transfer */ + cr0 = chip->cr0; + if (transfer->speed_hz || transfer->bits_per_word) { +- + bits = chip->bits_per_word; + speed = chip->speed_hz; + +@@ -1031,8 +1525,13 @@ static void pump_transfers(unsigned long data) + if (transfer->bits_per_word) + bits = transfer->bits_per_word; + ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC ++ actual_speed = cln_set_clk_regvals ++ (speed, &chip->dds_rate, &clk_div); ++ clk_div = (clk_div << 8); ++#else + clk_div = ssp_get_clk_div(ssp, speed); +- ++#endif + if (bits <= 8) { + drv_data->n_bytes = 1; + drv_data->dma_width = DCMD_WIDTH1; +@@ -1061,18 +1560,32 @@ static void pump_transfers(unsigned long data) + if (set_dma_burst_and_threshold(chip, message->spi, + bits, &dma_burst, + &dma_thresh)) +- if (printk_ratelimit()) +- dev_warn(&message->spi->dev, +- "pump_transfers: " +- "DMA burst size reduced to " +- "match bits_per_word\n"); ++ dev_warn_ratelimited(&message->spi->dev, ++ "pump_transfers: " ++ "DMA burst size reduced to" ++ " match bits_per_word\n"); + } + +- cr0 = clk_div +- | SSCR0_Motorola +- | SSCR0_DataSize(bits > 16 ? bits - 16 : bits) +- | SSCR0_SSE +- | (bits > 16 ? SSCR0_EDSS : 0); ++ switch (drv_data->ssp_type) { ++ case CE5X00_SSP: ++ chip->cr0 = clk_div ++ | CE5X00_SSCR0_Motorola ++ | CE5X00_SSCR0_DataSize(bits > 32 ? ++ 8 : bits) ++ | SSCR0_SSE; ++ break; ++ case CE4100_SSP: ++ case PXA25x_SSP: ++ default: ++ chip->cr0 = clk_div ++ | SSCR0_Motorola ++ | SSCR0_DataSize(bits > 16 ? ++ bits - 16 : bits) ++ | SSCR0_SSE ++ | (bits > 16 ? SSCR0_EDSS : 0); ++ } ++ ++ cr0 = chip->cr0; + } + + message->state = RUNNING_STATE; +@@ -1138,7 +1651,7 @@ static void pump_transfers(unsigned long data) + + /* Clear status and start DMA engine */ + cr1 = chip->cr1 | dma_thresh | drv_data->dma_cr1; +- write_SSSR(drv_data->clear_sr, reg); ++ write_sssr(drv_data->clear_sr, reg); + DCSR(drv_data->rx_channel) |= DCSR_RUN; + DCSR(drv_data->tx_channel) |= DCSR_RUN; + } else { +@@ -1147,100 +1660,72 @@ static void pump_transfers(unsigned long data) + + /* Clear status */ + cr1 = chip->cr1 | chip->threshold | drv_data->int_cr1; +- write_SSSR_CS(drv_data, drv_data->clear_sr); ++ write_sssr_cs(drv_data, drv_data->clear_sr); + } + + /* see if we need to reload the config registers */ +- if ((read_SSCR0(reg) != cr0) +- || (read_SSCR1(reg) & SSCR1_CHANGE_MASK) != +- (cr1 & SSCR1_CHANGE_MASK)) { ++ if (drv_data->ssp_type == CE5X00_SSP) { ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC ++ if (read_dds_rate(reg) != chip->dds_rate) ++ write_dds_rate(chip->dds_rate, reg); ++#endif ++ if ((read_sscr0(reg) != cr0) ++ || (read_sscr1(reg) & CE5X00_SSCR1_CHANGE_MASK) != ++ (cr1 & CE5X00_SSCR1_CHANGE_MASK)) { ++ /* stop the SSP, and update the other bits */ ++ write_sscr0(cr0 & ~SSCR0_SSE, reg); ++ if (!pxa25x_ssp_comp(drv_data)) ++ write_ssto(chip->timeout, reg); ++ /* first set CR1 w/o interrupt and service enables */ ++ write_sscr1(cr1 & CE5X00_SSCR1_CHANGE_MASK, reg); ++ /* restart the SSP */ ++ write_sscr0(cr0, reg); + ++ } else { ++ if (!pxa25x_ssp_comp(drv_data)) ++ write_ssto(chip->timeout, reg); ++ } ++ } else if ((read_sscr0(reg) != cr0) ++ || (read_sscr1(reg) & SSCR1_CHANGE_MASK) != ++ (cr1 & SSCR1_CHANGE_MASK)) { + /* stop the SSP, and update the other bits */ +- write_SSCR0(cr0 & ~SSCR0_SSE, reg); ++ write_sscr0(cr0 & ~SSCR0_SSE, reg); + if (!pxa25x_ssp_comp(drv_data)) +- write_SSTO(chip->timeout, reg); ++ write_ssto(chip->timeout, reg); + /* first set CR1 without interrupt and service enables */ +- write_SSCR1(cr1 & SSCR1_CHANGE_MASK, reg); ++ write_sscr1(cr1 & SSCR1_CHANGE_MASK, reg); + /* restart the SSP */ +- write_SSCR0(cr0, reg); ++ write_sscr0(cr0, reg); + +- } else { +- if (!pxa25x_ssp_comp(drv_data)) +- write_SSTO(chip->timeout, reg); ++ } else if (!pxa25x_ssp_comp(drv_data)) { ++ write_ssto(chip->timeout, reg); + } +- + cs_assert(drv_data); + + /* after chip select, release the data by enabling service + * requests and interrupts, without changing any mode bits */ +- write_SSCR1(cr1, reg); ++ write_sscr1(cr1, reg); + } + +-static void pump_messages(struct work_struct *work) ++static int transfer_one_message(struct spi_master *master, ++ struct spi_message *msg) + { +- struct driver_data *drv_data = +- container_of(work, struct driver_data, pump_messages); +- unsigned long flags; +- +- /* Lock queue and check for queue work */ +- spin_lock_irqsave(&drv_data->lock, flags); +- if (list_empty(&drv_data->queue) || drv_data->run == QUEUE_STOPPED) { +- drv_data->busy = 0; +- spin_unlock_irqrestore(&drv_data->lock, flags); +- return; +- } ++ struct driver_data *drv_data = spi_master_get_devdata(master); + +- /* Make sure we are not already running a message */ +- if (drv_data->cur_msg) { +- spin_unlock_irqrestore(&drv_data->lock, flags); +- return; +- } +- +- /* Extract head of queue */ +- drv_data->cur_msg = list_entry(drv_data->queue.next, +- struct spi_message, queue); +- list_del_init(&drv_data->cur_msg->queue); ++ /* Initial message state */ ++ drv_data->cur_msg = msg; ++ msg->state = START_STATE; + +- /* Initial message state*/ +- drv_data->cur_msg->state = START_STATE; +- drv_data->cur_transfer = list_entry(drv_data->cur_msg->transfers.next, +- struct spi_transfer, +- transfer_list); ++ drv_data->cur_transfer = list_entry(msg->transfers.next, ++ struct spi_transfer, transfer_list); + + /* prepare to setup the SSP, in pump_transfers, using the per + * chip configuration */ +- drv_data->cur_chip = spi_get_ctldata(drv_data->cur_msg->spi); ++ drv_data->cur_chip = spi_get_ctldata(msg->spi); + +- /* Mark as busy and launch transfers */ ++ /* Launch transfers */ + tasklet_schedule(&drv_data->pump_transfers); + +- drv_data->busy = 1; +- spin_unlock_irqrestore(&drv_data->lock, flags); +-} +- +-static int transfer(struct spi_device *spi, struct spi_message *msg) +-{ +- struct driver_data *drv_data = spi_master_get_devdata(spi->master); +- unsigned long flags; +- +- spin_lock_irqsave(&drv_data->lock, flags); +- +- if (drv_data->run == QUEUE_STOPPED) { +- spin_unlock_irqrestore(&drv_data->lock, flags); +- return -ESHUTDOWN; +- } +- +- msg->actual_length = 0; +- msg->status = -EINPROGRESS; +- msg->state = START_STATE; +- +- list_add_tail(&msg->queue, &drv_data->queue); +- +- if (drv_data->run == QUEUE_RUNNING && !drv_data->busy) +- queue_work(drv_data->workqueue, &drv_data->pump_messages); +- +- spin_unlock_irqrestore(&drv_data->lock, flags); +- + return 0; + } + +@@ -1267,8 +1752,9 @@ static int setup_cs(struct spi_device *spi, struct chip_data *chip, + if (gpio_is_valid(chip_info->gpio_cs)) { + err = gpio_request(chip_info->gpio_cs, "SPI_CS"); + if (err) { +- dev_err(&spi->dev, "failed to request chip select " +- "GPIO%d\n", chip_info->gpio_cs); ++ dev_err(&spi->dev, ++ "failed to request chip select " ++ "GPIO%d\n", chip_info->gpio_cs); + return err; + } + +@@ -1282,6 +1768,31 @@ static int setup_cs(struct spi_device *spi, struct chip_data *chip, + return err; + } + ++static int prepare_transfer_hardware(struct spi_master *master) ++{ ++ struct driver_data *drv_data = spi_master_get_devdata(master); ++ ++ /* ++ * Just make sure we have all we need to run the transfer by syncing ++ * with the runtime PM framework. ++ */ ++ pm_runtime_get_sync(&drv_data->pdev->dev); ++ return 0; ++} ++ ++static int unprepare_transfer_hardware(struct spi_master *master) ++{ ++ struct driver_data *drv_data = spi_master_get_devdata(master); ++ ++ /* nothing more to do - disable spi/ssp and power off */ ++ write_sscr0(0, drv_data->ioaddr); ++ clk_disable(drv_data->ssp->clk); ++ ++ pm_runtime_put(&drv_data->pdev->dev); ++ ++ return 0; ++} ++ + static int setup(struct spi_device *spi) + { + struct pxa2xx_spi_chip *chip_info = NULL; +@@ -1289,21 +1800,29 @@ static int setup(struct spi_device *spi) + struct driver_data *drv_data = spi_master_get_devdata(spi->master); + struct ssp_device *ssp = drv_data->ssp; + unsigned int clk_div; ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC ++ u32 actual_speed; ++#endif + uint tx_thres = TX_THRESH_DFLT; + uint rx_thres = RX_THRESH_DFLT; +- +- if (!pxa25x_ssp_comp(drv_data) ++ if (drv_data->ssp_type == CE5X00_SSP) { ++ tx_thres = TX_THRESH_CE5X00_DFLT; ++ rx_thres = RX_THRESH_CE5X00_DFLT; ++ } ++ if ((!pxa25x_ssp_comp(drv_data) || pxa25x_ssp_comp(drv_data) == 2) + && (spi->bits_per_word < 4 || spi->bits_per_word > 32)) { +- dev_err(&spi->dev, "failed setup: ssp_type=%d, bits/wrd=%d " +- "b/w not 4-32 for type non-PXA25x_SSP\n", +- drv_data->ssp_type, spi->bits_per_word); ++ dev_err(&spi->dev, ++ "failed setup: ssp_type=%d, bits/wrd=%d " ++ "b/w not 4-32 for type non-PXA25x_SSP\n", ++ drv_data->ssp_type, spi->bits_per_word); + return -EINVAL; +- } else if (pxa25x_ssp_comp(drv_data) ++ } else if (pxa25x_ssp_comp(drv_data) == 1 + && (spi->bits_per_word < 4 + || spi->bits_per_word > 16)) { +- dev_err(&spi->dev, "failed setup: ssp_type=%d, bits/wrd=%d " +- "b/w not 4-16 for type PXA25x_SSP\n", +- drv_data->ssp_type, spi->bits_per_word); ++ dev_err(&spi->dev, ++ "failed setup: ssp_type=%d, bits/wrd=%d " ++ "b/w not 4-16 for type PXA25x_SSP\n", ++ drv_data->ssp_type, spi->bits_per_word); + return -EINVAL; + } + +@@ -1319,8 +1838,9 @@ static int setup(struct spi_device *spi) + + if (drv_data->ssp_type == CE4100_SSP) { + if (spi->chip_select > 4) { +- dev_err(&spi->dev, "failed setup: " +- "cs number must not be > 4.\n"); ++ dev_err(&spi->dev, ++ "failed setup: " ++ "cs number must not be > 4.\n"); + kfree(chip); + return -EINVAL; + } +@@ -1328,6 +1848,7 @@ static int setup(struct spi_device *spi) + chip->frm = spi->chip_select; + } else + chip->gpio_cs = -1; ++ + chip->enable_dma = 0; + chip->timeout = TIMOUT_DFLT; + chip->dma_burst_size = drv_data->master_info->enable_dma ? +@@ -1340,6 +1861,7 @@ static int setup(struct spi_device *spi) + + /* chip_info isn't always needed */ + chip->cr1 = 0; ++ chip->cr0 = 0; + if (chip_info) { + if (chip_info->timeout) + chip->timeout = chip_info->timeout; +@@ -1353,9 +1875,6 @@ static int setup(struct spi_device *spi) + chip->cr1 = SSCR1_LBM; + } + +- chip->threshold = (SSCR1_RxTresh(rx_thres) & SSCR1_RFT) | +- (SSCR1_TxTresh(tx_thres) & SSCR1_TFT); +- + /* set dma burst and threshold outside of chip_info path so that if + * chip_info goes away after setting chip->enable_dma, the + * burst and threshold can still respond to changes in bits_per_word */ +@@ -1364,33 +1883,73 @@ static int setup(struct spi_device *spi) + if (set_dma_burst_and_threshold(chip, spi, spi->bits_per_word, + &chip->dma_burst_size, + &chip->dma_threshold)) { +- dev_warn(&spi->dev, "in setup: DMA burst size reduced " +- "to match bits_per_word\n"); ++ dev_warn(&spi->dev, ++ "in setup: DMA burst size reduced " ++ "to match bits_per_word\n"); + } + } +- ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC ++ actual_speed = cln_set_clk_regvals(spi->max_speed_hz, ++ &chip->dds_rate, &clk_div); ++ clk_div = (clk_div << 8); ++#else + clk_div = ssp_get_clk_div(ssp, spi->max_speed_hz); ++#endif + chip->speed_hz = spi->max_speed_hz; + +- chip->cr0 = clk_div ++ switch (drv_data->ssp_type) { ++ case CE5X00_SSP: ++ chip->cr0 = clk_div ++ | CE5X00_SSCR0_Motorola ++ | CE5X00_SSCR0_DataSize(spi->bits_per_word > 32 ? ++ 8 : spi->bits_per_word) ++ | SSCR0_SSE; ++ chip->threshold = (CE5X00_SSCR1_RxTresh(rx_thres) ++ & CE5X00_SSCR1_RFT) | ++ (CE5X00_SSCR1_TxTresh(tx_thres) & CE5X00_SSCR1_TFT); ++ break; ++ case CE4100_SSP: ++ case PXA25x_SSP: ++ default: ++ chip->cr0 = clk_div + | SSCR0_Motorola + | SSCR0_DataSize(spi->bits_per_word > 16 ? + spi->bits_per_word - 16 : spi->bits_per_word) + | SSCR0_SSE + | (spi->bits_per_word > 16 ? SSCR0_EDSS : 0); ++ chip->threshold = (SSCR1_RxTresh(rx_thres) & SSCR1_RFT) | ++ (SSCR1_TxTresh(tx_thres) & SSCR1_TFT); ++ } ++ + chip->cr1 &= ~(SSCR1_SPO | SSCR1_SPH); ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC ++ chip->cr1 |= (((spi->mode & SPI_CPHA) != 0) ? SSCR1_SPH : 0) ++ | (((spi->mode & SPI_CPOL) != 0) ? SSCR1_SPO : 0) ++ | (((spi->mode & SPI_LOOP) != 0) ? SSCR1_LBM : 0); ++#else + chip->cr1 |= (((spi->mode & SPI_CPHA) != 0) ? SSCR1_SPH : 0) + | (((spi->mode & SPI_CPOL) != 0) ? SSCR1_SPO : 0); ++#endif + + /* NOTE: PXA25x_SSP _could_ use external clocking ... */ + if (!pxa25x_ssp_comp(drv_data)) +- dev_dbg(&spi->dev, "%ld Hz actual, %s\n", ++ dev_dbg(&spi->dev, ++ "%ld Hz actual, %s\n", ++#ifndef CONFIG_GEN3_SPI + clk_get_rate(ssp->clk) ++#else ++ spi_clk_get_rate(ssp->type) ++#endif + / (1 + ((chip->cr0 & SSCR0_SCR(0xfff)) >> 8)), + chip->enable_dma ? "DMA" : "PIO"); + else +- dev_dbg(&spi->dev, "%ld Hz actual, %s\n", ++ dev_dbg(&spi->dev, ++ "%ld Hz actual, %s\n", ++#ifndef CONFIG_GEN3_SPI + clk_get_rate(ssp->clk) / 2 ++#else ++ spi_clk_get_rate(ssp->type) / 2 ++#endif + / (1 + ((chip->cr0 & SSCR0_SCR(0x0ff)) >> 8)), + chip->enable_dma ? "DMA" : "PIO"); + +@@ -1405,7 +1964,9 @@ static int setup(struct spi_device *spi) + chip->read = u16_reader; + chip->write = u16_writer; + } else if (spi->bits_per_word <= 32) { ++#ifndef CONFIG_GEN3_SPI + chip->cr0 |= SSCR0_EDSS; ++#endif + chip->n_bytes = 4; + chip->dma_width = DCMD_WIDTH4; + chip->read = u32_reader; +@@ -1438,94 +1999,6 @@ static void cleanup(struct spi_device *spi) + kfree(chip); + } + +-static int init_queue(struct driver_data *drv_data) +-{ +- INIT_LIST_HEAD(&drv_data->queue); +- spin_lock_init(&drv_data->lock); +- +- drv_data->run = QUEUE_STOPPED; +- drv_data->busy = 0; +- +- tasklet_init(&drv_data->pump_transfers, +- pump_transfers, (unsigned long)drv_data); +- +- INIT_WORK(&drv_data->pump_messages, pump_messages); +- drv_data->workqueue = create_singlethread_workqueue( +- dev_name(drv_data->master->dev.parent)); +- if (drv_data->workqueue == NULL) +- return -EBUSY; +- +- return 0; +-} +- +-static int start_queue(struct driver_data *drv_data) +-{ +- unsigned long flags; +- +- spin_lock_irqsave(&drv_data->lock, flags); +- +- if (drv_data->run == QUEUE_RUNNING || drv_data->busy) { +- spin_unlock_irqrestore(&drv_data->lock, flags); +- return -EBUSY; +- } +- +- drv_data->run = QUEUE_RUNNING; +- drv_data->cur_msg = NULL; +- drv_data->cur_transfer = NULL; +- drv_data->cur_chip = NULL; +- spin_unlock_irqrestore(&drv_data->lock, flags); +- +- queue_work(drv_data->workqueue, &drv_data->pump_messages); +- +- return 0; +-} +- +-static int stop_queue(struct driver_data *drv_data) +-{ +- unsigned long flags; +- unsigned limit = 500; +- int status = 0; +- +- spin_lock_irqsave(&drv_data->lock, flags); +- +- /* This is a bit lame, but is optimized for the common execution path. +- * A wait_queue on the drv_data->busy could be used, but then the common +- * execution path (pump_messages) would be required to call wake_up or +- * friends on every SPI message. Do this instead */ +- drv_data->run = QUEUE_STOPPED; +- while ((!list_empty(&drv_data->queue) || drv_data->busy) && limit--) { +- spin_unlock_irqrestore(&drv_data->lock, flags); +- msleep(10); +- spin_lock_irqsave(&drv_data->lock, flags); +- } +- +- if (!list_empty(&drv_data->queue) || drv_data->busy) +- status = -EBUSY; +- +- spin_unlock_irqrestore(&drv_data->lock, flags); +- +- return status; +-} +- +-static int destroy_queue(struct driver_data *drv_data) +-{ +- int status; +- +- status = stop_queue(drv_data); +- /* we are unloading the module or failing to load (only two calls +- * to this routine), and neither call can handle a return value. +- * However, destroy_workqueue calls flush_workqueue, and that will +- * block until all work is done. If the reason that stop_queue +- * timed out is that the work will never finish, then it does no +- * good to call destroy_workqueue, so return anyway. */ +- if (status != 0) +- return status; +- +- destroy_workqueue(drv_data->workqueue); +- +- return 0; +-} +- + static int pxa2xx_spi_probe(struct platform_device *pdev) + { + struct device *dev = &pdev->dev; +@@ -1557,16 +2030,27 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) + drv_data->ssp = ssp; + + master->dev.parent = &pdev->dev; ++#ifdef CONFIG_OF ++#ifndef CONFIG_GEN3_SPI + master->dev.of_node = pdev->dev.of_node; ++#endif ++#endif ++ + /* the spi->mode bits understood by this driver: */ ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC ++ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP; ++#else + master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; +- ++#endif + master->bus_num = pdev->id; + master->num_chipselect = platform_info->num_chipselect; + master->dma_alignment = DMA_ALIGNMENT; + master->cleanup = cleanup; + master->setup = setup; +- master->transfer = transfer; ++ master->prepare_transfer_hardware = prepare_transfer_hardware; ++ master->transfer_one_message = transfer_one_message; ++ master->unprepare_transfer_hardware = unprepare_transfer_hardware; ++ master->rt = true; + + drv_data->ssp_type = ssp->type; + drv_data->null_dma_buf = (u32 *)ALIGN((u32)(drv_data + +@@ -1628,43 +2112,59 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) + clk_enable(ssp->clk); + + /* Load default SSP configuration */ +- write_SSCR0(0, drv_data->ioaddr); +- write_SSCR1(SSCR1_RxTresh(RX_THRESH_DFLT) | +- SSCR1_TxTresh(TX_THRESH_DFLT), +- drv_data->ioaddr); +- write_SSCR0(SSCR0_SCR(2) +- | SSCR0_Motorola +- | SSCR0_DataSize(8), +- drv_data->ioaddr); ++ write_sscr0(0, drv_data->ioaddr); ++ switch (drv_data->ssp_type) { ++ case CE5X00_SSP: ++ write_sscr1(CE5X00_SSCR1_RxTresh(RX_THRESH_CE5X00_DFLT) | ++ CE5X00_SSCR1_TxTresh(TX_THRESH_CE5X00_DFLT), ++ drv_data->ioaddr); ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC ++ /* using the Motorola SPI protocol and use 8 bit frame */ ++ write_sscr0(CE5X00_SSCR0_Motorola ++ | CE5X00_SSCR0_DataSize(8), ++ drv_data->ioaddr); ++#else ++ /* default using Motorola SPI protocol and use 8 bit frame */ ++ write_sscr0(SSCR0_SCR(2) ++ | CE5X00_SSCR0_Motorola ++ | CE5X00_SSCR0_DataSize(8), ++ drv_data->ioaddr); ++#endif ++ break; ++ case CE4100_SSP: ++ case PXA25x_SSP: ++ default: ++ write_sscr1(SSCR1_RxTresh(RX_THRESH_DFLT) | ++ SSCR1_TxTresh(TX_THRESH_DFLT), ++ drv_data->ioaddr); ++ write_sscr0(SSCR0_SCR(2) ++ | SSCR0_Motorola ++ | SSCR0_DataSize(8), ++ drv_data->ioaddr); ++ } + if (!pxa25x_ssp_comp(drv_data)) +- write_SSTO(0, drv_data->ioaddr); +- write_SSPSP(0, drv_data->ioaddr); ++ write_ssto(0, drv_data->ioaddr); ++#ifndef CONFIG_GEN3_SPI ++ /* ++ * SSPSP register is resrved on the CEXXXX SOCs. ++ */ ++ write_sspsp(0, drv_data->ioaddr); ++#endif + +- /* Initial and start queue */ +- status = init_queue(drv_data); +- if (status != 0) { +- dev_err(&pdev->dev, "problem initializing queue\n"); +- goto out_error_clock_enabled; +- } +- status = start_queue(drv_data); +- if (status != 0) { +- dev_err(&pdev->dev, "problem starting queue\n"); +- goto out_error_clock_enabled; +- } ++ /* Initialise transfer pump */ ++ tasklet_init(&drv_data->pump_transfers, ++ pump_transfers, (unsigned long)drv_data); + + /* Register with the SPI framework */ + platform_set_drvdata(pdev, drv_data); + status = spi_register_master(master); + if (status != 0) { + dev_err(&pdev->dev, "problem registering spi master\n"); +- goto out_error_queue_alloc; ++ goto out_error_clock_enabled; + } + + return status; + +-out_error_queue_alloc: +- destroy_queue(drv_data); +- + out_error_clock_enabled: + clk_disable(ssp->clk); + +@@ -1687,28 +2187,13 @@ static int pxa2xx_spi_remove(struct platform_device *pdev) + { + struct driver_data *drv_data = platform_get_drvdata(pdev); + struct ssp_device *ssp; +- int status = 0; + + if (!drv_data) + return 0; + ssp = drv_data->ssp; + +- /* Remove the queue */ +- status = destroy_queue(drv_data); +- if (status != 0) +- /* the kernel does not check the return status of this +- * this routine (mod->exit, within the kernel). Therefore +- * nothing is gained by returning from here, the module is +- * going away regardless, and we should not leave any more +- * resources allocated than necessary. We cannot free the +- * message memory in drv_data->queue, but we can release the +- * resources below. I think the kernel should honor -EBUSY +- * returns but... */ +- dev_err(&pdev->dev, "pxa2xx_spi_remove: workqueue will not " +- "complete, message memory not freed\n"); +- + /* Disable the SSP at the peripheral and SOC level */ +- write_SSCR0(0, drv_data->ioaddr); ++ write_sscr0(0, drv_data->ioaddr); + clk_disable(ssp->clk); + + /* Release DMA */ +@@ -1725,6 +2210,9 @@ static int pxa2xx_spi_remove(struct platform_device *pdev) + /* Release SSP */ + pxa_ssp_free(ssp); + ++ /* Disable transfer pump */ ++ tasklet_disable(&drv_data->pump_transfers); ++ + /* Disconnect from the SPI framework */ + spi_unregister_master(drv_data->master); + +@@ -1738,7 +2226,8 @@ static void pxa2xx_spi_shutdown(struct platform_device *pdev) + { + int status = 0; + +- if ((status = pxa2xx_spi_remove(pdev)) != 0) ++ status = pxa2xx_spi_remove(pdev); ++ if (status != 0) + dev_err(&pdev->dev, "shutdown failed with %d\n", status); + } + +@@ -1749,10 +2238,15 @@ static int pxa2xx_spi_suspend(struct device *dev) + struct ssp_device *ssp = drv_data->ssp; + int status = 0; + +- status = stop_queue(drv_data); +- if (status != 0) ++ status = spi_master_suspend(drv_data->master); ++ if (status) { ++ dev_warn(dev, "cannot suspend master\n"); + return status; +- write_SSCR0(0, drv_data->ioaddr); ++ } ++ ++ pm_runtime_get_sync(dev); ++ ++ write_sscr0(0, drv_data->ioaddr); + clk_disable(ssp->clk); + + return 0; +@@ -1774,14 +2268,14 @@ static int pxa2xx_spi_resume(struct device *dev) + /* Enable the SSP clock */ + clk_enable(ssp->clk); + ++ pm_runtime_put(dev); ++ + /* Start the queue running */ +- status = start_queue(drv_data); +- if (status != 0) { ++ status = spi_master_resume(drv_data->master); ++ if (status) + dev_err(dev, "problem starting queue (%d)\n", status); +- return status; +- } + +- return 0; ++ return status; + } + + static const struct dev_pm_ops pxa2xx_spi_pm_ops = { +diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c +index 19ee901..493ce4a 100644 +--- a/drivers/spi/spi.c ++++ b/drivers/spi/spi.c +@@ -1248,10 +1248,10 @@ int spi_master_resume(struct spi_master *master) + } + EXPORT_SYMBOL_GPL(spi_master_resume); + +-static int __spi_master_match(struct device *dev, void *data) ++static int __spi_master_match(struct device *dev, const void *data) + { + struct spi_master *m; +- u16 *bus_num = data; ++ const u16 *bus_num = data; + + m = container_of(dev, struct spi_master, dev); + return m->bus_num == *bus_num; +diff --git a/drivers/staging/iio/adc/Kconfig b/drivers/staging/iio/adc/Kconfig +index fb8c239..1309fac 100644 +--- a/drivers/staging/iio/adc/Kconfig ++++ b/drivers/staging/iio/adc/Kconfig +@@ -137,4 +137,17 @@ config SPEAR_ADC + Say yes here to build support for the integrated ADC inside the + ST SPEAr SoC. Provides direct access via sysfs. + ++config MAX78M6610_LMU ++ tristate "Maxim 78M6610+LMU driver" ++ depends on SPI ++ select IIO_BUFFER ++ select IIO_TRIGGERED_BUFFER ++ help ++ Say yes here to build support for Maxim Energy Measurement Processor ++ for Load Monitoring Units. ++ ++ To compile this driver as a module, choose M here: the ++ module will be called max78m6610_lmu. ++ ++ + endmenu +diff --git a/drivers/staging/iio/adc/Makefile b/drivers/staging/iio/adc/Makefile +index d285596..2c4e7e1 100644 +--- a/drivers/staging/iio/adc/Makefile ++++ b/drivers/staging/iio/adc/Makefile +@@ -21,3 +21,4 @@ obj-$(CONFIG_AD7280) += ad7280a.o + obj-$(CONFIG_LPC32XX_ADC) += lpc32xx_adc.o + obj-$(CONFIG_MXS_LRADC) += mxs-lradc.o + obj-$(CONFIG_SPEAR_ADC) += spear_adc.o ++obj-$(CONFIG_MAX78M6610_LMU) += max78m6610_lmu.o +diff --git a/drivers/staging/iio/adc/max78m6610_lmu.c b/drivers/staging/iio/adc/max78m6610_lmu.c +new file mode 100644 +index 0000000..f38ed57 +--- /dev/null ++++ b/drivers/staging/iio/adc/max78m6610_lmu.c +@@ -0,0 +1,837 @@ ++/* ++ * max78m6610+lmu SPI protocol driver ++ * ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ * ++ * This SPI protocol driver is developed for the Maxim 78M6610+LMU (eADC). ++ * The driver is developed as a part of the Clanton BSP where integrated into ++ * Clanton Evaluation Boards Cross Hill Industrial-E. ++ * ++ * The Maxim 78M6610+LMU is an energy measurement processor (EMP) for ++ * load monitoring on single or spilt-phase AC loads. It supports varies ++ * interface configuration protocols through I/O pins. ++ * ++ * With 3 wire serial input/output interfaces provided by Clanton SoC, ++ * the 78M6610+LMU can be connected directly as SPI slave device. ++ */ ++ ++#include <linux/iio/iio.h> ++#include <linux/iio/buffer.h> ++#include <linux/iio/types.h> ++#include <linux/iio/trigger.h> ++#include <linux/iio/trigger_consumer.h> ++#include <linux/iio/triggered_buffer.h> ++#include <linux/spi/spi.h> ++#include <linux/version.h> ++ ++#define INSTAN_VA 0x33 /* instaneous Voltage for VA source */ ++#define INSTAN_IA 0x44 /* instaneous Current for IA source */ ++#define INSTAN_PA 0x5C /* instaneous Active Power for source A*/ ++#define INSTAN_PQA 0x5E /* instaneous Reactive Power for source A*/ ++#define VA_RMS 0x2B /* RMS voltage for VA source */ ++#define IA_RMS 0x3E /* RMS current for VA source */ ++#define WATT_A 0x4B /* Active Power for source A */ ++#define VAR_A 0x51 /* Reactive power for source A */ ++#define VA_A 0x4E /* Volt-Amperes for source A */ ++#define PFA 0x65 /* Source A Power Factor */ ++ ++#define INSTAN_VB 0x34 /* instaneous Voltage for VB source */ ++#define INSTAN_IB 0x45 /* instaneous Current for IB source */ ++#define INSTAN_PB 0x5D /* instaneous Active Power for source B*/ ++#define INSTAN_PQB 0x5F /* instaneous Voltage for VB source */ ++#define VB_RMS 0x2C /* RMS voltage for VB source */ ++#define IB_RMS 0x3F /* RMS current for VB source */ ++#define WATT_B 0x4C /* Active Power for source B */ ++#define VAR_B 0x52 /* Reactive power for source B */ ++#define VA_B 0x4F /* Volt-amperes for source B */ ++#define PFB 0x66 /* Source B Power Factor */ ++ ++/* Addr bit 6-7: ADDR6, ADDR7 */ ++#define SPI_CB_ADDR_MASK_7_6(x) (((x) & 0xC0) >> 6) ++/* Addr bit 0 - 5 */ ++#define SPI_TB_ADDR_MASK_5_0(x) ((x) & 0x3F) ++ ++#define SPI_CB_NBR_ACC 0x00 /* number register of accesss, limit to 1 */ ++#define SPI_CB_CMD 0x01 /* SPI command flag */ ++#define SPI_OP_READ 0x00 /* bit 1: Read/Write RD:0 W:1 */ ++#define SPI_OP_WRITE 0x02 /* bit 1: Read/Write RD:0 W:1 */ ++/* Positive / negative conversion */ ++#define SIGN_CONVERT 0xFFFFFFFFFFFFFFFF ++#define DATA_BIT_MASK 0x00FFFFFF ++#define SIGN_BIT_NUM 23 ++#define SPI_MSG_LEN 5 ++#define RX_OFFSET 1 ++ ++/* SPI message Control byte */ ++#define SPI_CB(x) ((SPI_CB_NBR_ACC << 4)\ ++ | (SPI_CB_ADDR_MASK_7_6(x) << 2)\ ++ | SPI_CB_CMD) ++/* SPI message Transaction byte */ ++#define SPI_TB_READ(x) ((SPI_TB_ADDR_MASK_5_0(x) << 2)\ ++ | SPI_OP_READ) ++ ++ ++/** ++ * max78m6610_lmu_channels structure maps eADC measurement features to ++ * correlates IIO channels ++ */ ++static const struct iio_chan_spec max78m6610_lmu_channels[] = { ++ /* IIO Channels for source A */ ++ { ++ .type = IIO_VOLTAGE, ++ .indexed = 1, ++ .channel = 0, ++ .extend_name = "inst", ++ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | ++ IIO_CHAN_INFO_SCALE_SHARED_BIT, ++ .address = INSTAN_VA, ++ .scan_index = 0, ++ .scan_type = { ++ .sign = 's', ++ .realbits = 32, ++ .storagebits = 32, ++ .shift = 23, ++ }, ++ }, ++ { ++ .type = IIO_CURRENT, ++ .indexed = 1, ++ .channel = 0, ++ .extend_name = "rms", ++ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | ++ IIO_CHAN_INFO_SCALE_SHARED_BIT, ++ .address = IA_RMS, ++ .scan_index = 1, ++ .scan_type = { ++ .sign = 's', ++ .realbits = 32, ++ .storagebits = 32, ++ .shift = 23, ++ }, ++ }, ++ { ++ .type = IIO_POWER, ++ .indexed = 1, ++ .channel = 0, ++ .extend_name = "inst_act", ++ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | ++ IIO_CHAN_INFO_SCALE_SHARED_BIT, ++ .address = INSTAN_PA, ++ .scan_index = 2, ++ .scan_type = { ++ .sign = 's', ++ .realbits = 32, ++ .storagebits = 32, ++ .shift = 23, ++ }, ++ }, ++ { ++ .type = IIO_POWER, ++ .indexed = 1, ++ .channel = 0, ++ .extend_name = "inst_react", ++ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | ++ IIO_CHAN_INFO_SCALE_SHARED_BIT, ++ .address = INSTAN_PQA, ++ .scan_index = 3, ++ .scan_type = { ++ .sign = 's', ++ .realbits = 32, ++ .storagebits = 32, ++ .shift = 23, ++ }, ++ }, ++ { ++ .type = IIO_POWER, ++ .indexed = 1, ++ .channel = 0, ++ .extend_name = "avg_act", ++ /* IIO_CHAN_INFO_AVERAGE_RAW is not used here, ++ * this average value is provide by HW register, ++ */ ++ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | ++ IIO_CHAN_INFO_SCALE_SHARED_BIT, ++ .address = WATT_A, ++ .scan_index = 4, ++ .scan_type = { ++ .sign = 's', ++ .realbits = 32, ++ .storagebits = 32, ++ .shift = 23, ++ }, ++ }, ++ { ++ .type = IIO_POWER, ++ .indexed = 1, ++ .channel = 0, ++ .extend_name = "avg_react", ++ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | ++ IIO_CHAN_INFO_SCALE_SHARED_BIT, ++ .address = VAR_A, ++ .scan_index = 5, ++ .scan_type = { ++ .sign = 's', ++ .realbits = 32, ++ .storagebits = 32, ++ .shift = 23, ++ }, ++ }, ++ { ++ .type = IIO_POWER, ++ .indexed = 1, ++ .channel = 0, ++ .extend_name = "apparent", ++ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | ++ IIO_CHAN_INFO_SCALE_SHARED_BIT, ++ .address = VA_A, ++ .scan_index = 6, ++ .scan_type = { ++ .sign = 's', ++ .realbits = 32, ++ .storagebits = 32, ++ .shift = 23, ++ }, ++ }, ++ { ++ .type = IIO_POWER, ++ .indexed = 1, ++ .channel = 0, ++ .extend_name = "factor", ++ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | ++ IIO_CHAN_INFO_SCALE_SHARED_BIT, ++ .address = PFA, ++ .scan_index = 7, ++ .scan_type = { ++ .sign = 's', ++ .realbits = 32, /* data type S.22 */ ++ .storagebits = 32, ++ .shift = 22, ++ }, ++ }, ++ { ++ .type = IIO_VOLTAGE, ++ .indexed = 1, ++ .channel = 0, ++ .extend_name = "rms", ++ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | ++ IIO_CHAN_INFO_SCALE_SHARED_BIT, ++ .address = VA_RMS, ++ .scan_index = 8, ++ .scan_type = { ++ .sign = 's', ++ .realbits = 32, ++ .storagebits = 32, ++ .shift = 23, ++ }, ++ }, ++ ++ /* IIO channels for source B */ ++ { ++ .type = IIO_VOLTAGE, ++ .indexed = 1, ++ .channel = 1, ++ .extend_name = "inst", ++ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | ++ IIO_CHAN_INFO_SCALE_SHARED_BIT, ++ .address = INSTAN_VB, ++ .scan_index = 9, ++ .scan_type = { ++ .sign = 's', ++ .realbits = 32, ++ .storagebits = 32, ++ .shift = 23, ++ }, ++ }, ++ { ++ .type = IIO_CURRENT, ++ .indexed = 1, ++ .channel = 1, ++ .extend_name = "rms", ++ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | ++ IIO_CHAN_INFO_SCALE_SHARED_BIT, ++ .address = IB_RMS, ++ .scan_index = 10, ++ .scan_type = { ++ .sign = 's', ++ .realbits = 32, ++ .storagebits = 32, ++ .shift = 23, ++ }, ++ }, ++ { ++ .type = IIO_POWER, ++ .indexed = 1, ++ .channel = 1, ++ .extend_name = "inst_act", ++ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | ++ IIO_CHAN_INFO_SCALE_SHARED_BIT, ++ .address = INSTAN_PB, ++ .scan_index = 11, ++ .scan_type = { ++ .sign = 's', ++ .realbits = 32, ++ .storagebits = 32, ++ .shift = 23, ++ }, ++ }, ++ { ++ .type = IIO_POWER, ++ .indexed = 1, ++ .channel = 1, ++ .extend_name = "inst_react", ++ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | ++ IIO_CHAN_INFO_SCALE_SHARED_BIT, ++ .address = INSTAN_PQB, ++ .scan_index = 12, ++ .scan_type = { ++ .sign = 's', ++ .realbits = 32, ++ .storagebits = 32, ++ .shift = 23, ++ }, ++ }, ++ { ++ .type = IIO_POWER, ++ .indexed = 1, ++ .channel = 1, ++ .extend_name = "avg_act", ++ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | ++ IIO_CHAN_INFO_SCALE_SHARED_BIT, ++ .address = WATT_B, ++ .scan_index = 13, ++ .scan_type = { ++ .sign = 's', ++ .realbits = 32, ++ .storagebits = 32, ++ .shift = 23, ++ }, ++ }, ++ { ++ .type = IIO_POWER, ++ .indexed = 1, ++ .channel = 1, ++ .extend_name = "avg_react", ++ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | ++ IIO_CHAN_INFO_SCALE_SHARED_BIT, ++ .address = VAR_B, ++ .scan_index = 14, ++ .scan_type = { ++ .sign = 's', ++ .realbits = 32, ++ .storagebits = 32, ++ .shift = 23, ++ }, ++ }, ++ { ++ .type = IIO_POWER, ++ .indexed = 1, ++ .channel = 1, ++ .extend_name = "apparent", ++ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | ++ IIO_CHAN_INFO_SCALE_SHARED_BIT, ++ .address = VA_B, ++ .scan_index = 15, ++ .scan_type = { ++ .sign = 's', ++ .realbits = 32, ++ .storagebits = 32, ++ .shift = 23, ++ }, ++ }, ++ { ++ .type = IIO_POWER, ++ .indexed = 1, ++ .channel = 1, ++ .extend_name = "factor", ++ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | ++ IIO_CHAN_INFO_SCALE_SHARED_BIT, ++ .address = PFB, ++ .scan_index = 16, ++ .scan_type = { ++ .sign = 's', ++ .realbits = 32, /* data type S.22 */ ++ .storagebits = 32, ++ .shift = 22, ++ }, ++ }, ++ { ++ .type = IIO_VOLTAGE, ++ .indexed = 1, ++ .channel = 1, ++ .extend_name = "rms", ++ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | ++ IIO_CHAN_INFO_SCALE_SHARED_BIT, ++ .address = VB_RMS, ++ .scan_index = 17, ++ .scan_type = { ++ .sign = 's', ++ .realbits = 32, ++ .storagebits = 32, ++ .shift = 23, ++ }, ++ }, ++ { ++ .type = IIO_CURRENT, ++ .indexed = 1, ++ .channel = 0, ++ .extend_name = "inst", ++ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | ++ IIO_CHAN_INFO_SCALE_SHARED_BIT, ++ .address = INSTAN_IA, ++ .scan_index = 18, ++ .scan_type = { ++ .sign = 's', ++ .realbits = 32, ++ .storagebits = 32, ++ .shift = 23, ++ }, ++ }, ++ { ++ .type = IIO_CURRENT, ++ .indexed = 1, ++ .channel = 1, ++ .extend_name = "inst", ++ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | ++ IIO_CHAN_INFO_SCALE_SHARED_BIT, ++ .address = INSTAN_IB, ++ .scan_index = 19, ++ .scan_type = { ++ .sign = 's', ++ .realbits = 32, ++ .storagebits = 32, ++ .shift = 23, ++ }, ++ }, ++ ++ IIO_CHAN_SOFT_TIMESTAMP(20), ++}; ++ ++/* max number of iio channels */ ++#define MAX_CHAN_NUM ARRAY_SIZE(max78m6610_lmu_channels) ++ ++/* eADC state structure */ ++struct max78m6610_lmu_state { ++ struct spi_device *spi; ++ struct iio_dev_attr *iio_attr; ++ struct spi_transfer ring_xfer[MAX_CHAN_NUM]; ++ struct spi_transfer scan_single_xfer; ++ struct spi_message ring_msg; ++ struct spi_message scan_single_msg; ++ ++ u8 tx_buf[SPI_MSG_LEN * MAX_CHAN_NUM]; ++ u8 rx_buf[SPI_MSG_LEN * MAX_CHAN_NUM + sizeof(s64)]; ++}; ++ ++/** ++ * ret_fraction_log2 ++ * ++ * @param val: pointer to val ++ * @param val2: pointer to val2 ++ * @return: no returns ++ * ++ * this function to re-implement of IIO_VAL_FRACTIONAL_LOG2 marco in IIO ++ * because of the do_div() function is not correctly handle the negative ++ * input value. ++ */ ++static void ret_fraction_log2(int *val, int *val2) ++{ ++ s64 tmp; ++ ++ tmp = *val; ++ ++ if (*val < 0) { ++ pr_debug("%s: before shr: tmp=0x%016llX, *val=0x%08X, tmp=%lld, *val=%d\n", ++ __func__, tmp, *val, tmp, *val); ++ /* the do_div function will return trash if the value ++ * of input is negative. We need to treat tmp as ++ * a positive number for calculation. ++ * 1. XOR tmp with 0xFFFFFFFFFFFFFFFF. ++ * 2. add on the differential ++ */ ++ tmp = (tmp ^ SIGN_CONVERT) + 1; ++ tmp = tmp * 1000000000LL >> (*val2); ++ *val2 = do_div(tmp, 1000000000LL); ++ *val = tmp; ++ /* the IIO_VAL_INT_PLUS_NANO marco is used in the later stage ++ * to return the proper format of output. ++ * The IIO use the value of val2 to determinate the sign ++ * of the output. ++ * Convert val2 from positive to negative to fool IIO to ++ * display the ++ * correct output format. ++ */ ++ *val2 = *val2 ^ SIGN_CONVERT; ++ pr_debug("%s: at the end: *val=0x%08x, tmp=%lld, *val=%d\n", ++ __func__, *val, tmp, *val); ++ ++ } else { ++ ++ tmp = tmp * 1000000000LL >> (*val2); ++ *val2 = do_div(tmp, 1000000000LL); ++ *val = tmp; ++ } ++} ++ ++/** ++ * max78m6610_lmu_update_scan_mode ++ * ++ * @param indio_dev: iio_dev pointer. ++ * @param active_scan_mask: pointer to scan mask. ++ * @return 0 on success or standard errnos on failure ++ * ++ * setup the spi transfer buffer for the actived scan mask ++ **/ ++static int max78m6610_lmu_update_scan_mode(struct iio_dev *indio_dev, ++ const unsigned long *active_scan_mask) ++{ ++ struct max78m6610_lmu_state *st = iio_priv(indio_dev); ++ int i, tx = 0, k = 0; ++ unsigned addr; ++ ++ spi_message_init(&st->ring_msg); ++ ++ /* scan through all the channels */ ++ for (i = 0; i < MAX_CHAN_NUM; i++) { ++ /* we build the the spi message here that support ++ * multiple register access request on the selected channel */ ++ if (test_bit(i, active_scan_mask)) { ++ addr = max78m6610_lmu_channels[i].address; ++ /* first two bytes are the contol bytes */ ++ st->tx_buf[tx] = SPI_CB(addr); ++ st->tx_buf[tx+1] = SPI_TB_READ(addr); ++ ++ st->ring_xfer[k].cs_change = 0; ++ st->ring_xfer[k].tx_buf = &st->tx_buf[tx]; ++ /* rx buffer */ ++ /* All the HW registers in the HW are designed as 24 bit ++ * size, so we skip the first byte in the rx_buf when ++ * constructing the ring_xfer. ++ */ ++ st->ring_xfer[k].rx_buf = &st->rx_buf[tx]; ++ st->ring_xfer[k].len = SPI_MSG_LEN; ++ st->ring_xfer[k].cs_change = 1; ++ ++ spi_message_add_tail(&st->ring_xfer[k], ++ &st->ring_msg); ++ /* update in bytes number */ ++ tx += SPI_MSG_LEN; ++ k++; ++ } ++ } ++ ++ return 0; ++} ++ ++/** ++ * max78m6610_lmu_trigger_handle ++ * ++ * @param irq: irq indicator ++ * @parma p: iio pull funciton pointer ++ * @return IRQ_HANDLED ++ * ++ * bh handler of trigger launched polling to ring buffer ++ * ++ **/ ++static irqreturn_t max78m6610_lmu_trigger_handler(int irq, void *p) ++{ ++ struct iio_poll_func *pf = p; ++ struct iio_dev *indio_dev = pf->indio_dev; ++ struct max78m6610_lmu_state *st = iio_priv(indio_dev); ++ ++ u32 scan_buf[((sizeof(u32)*MAX_CHAN_NUM)+sizeof(s64))/sizeof(u32)]; ++ s64 time_ns = 0; ++ int b_sent; ++ int i = 0, rx_bit = 0; ++ int scan_count; ++ ++ b_sent = spi_sync(st->spi, &st->ring_msg); ++ if (b_sent) { ++ pr_err("spi_sync failed.\n"); ++ goto done; ++ } ++ ++ scan_count = bitmap_weight(indio_dev->active_scan_mask, ++ indio_dev->masklength); ++ ++ if (indio_dev->scan_timestamp) { ++ time_ns = iio_get_time_ns(); ++ memcpy((u8 *)scan_buf + indio_dev->scan_bytes - sizeof(s64), ++ &time_ns, sizeof(time_ns)); ++ } ++ ++ for (i = 0; i < scan_count; i++) { ++ u32 *rx_buf_32 = NULL; ++ rx_bit = i*SPI_MSG_LEN + RX_OFFSET; ++ rx_buf_32 = (u32 *)&(st->rx_buf[rx_bit]); ++ *rx_buf_32 = be32_to_cpu(*rx_buf_32) & DATA_BIT_MASK; ++ scan_buf[i] = sign_extend32(*rx_buf_32, ++ SIGN_BIT_NUM); ++ } ++ ++ iio_push_to_buffers(indio_dev, (u8 *)scan_buf); ++done: ++ iio_trigger_notify_done(indio_dev->trig); ++ ++ return IRQ_HANDLED; ++} ++ ++/** ++ * max78m6610_lmu_scan_direct ++ * ++ * @param st: max78m6610 state structure pointer ++ * @param addr: register address ++ * @return: signed 32-bits result value or standard errno on failure. ++ * ++ * buildup SPI message to scan HW register based on input address. ++ */ ++static int max78m6610_lmu_scan_direct(struct max78m6610_lmu_state *st, ++ unsigned addr) ++{ ++ int ret; ++ u32 *rx_buf_32 = NULL; ++ ++ pr_debug("build SPI request msg to addr 0x%02x\n", addr); ++ ++ st->tx_buf[0] = SPI_CB(addr); ++ st->tx_buf[1] = SPI_TB_READ(addr); ++ ++ ret = spi_sync(st->spi, &st->scan_single_msg); ++ if (ret) { ++ pr_err("spi_sync return non-zero value\n"); ++ return -EIO; ++ } ++ ++ rx_buf_32 = (uint32_t *)&(st->rx_buf[RX_OFFSET]); ++ *rx_buf_32 = be32_to_cpu(*rx_buf_32) & DATA_BIT_MASK; ++ ++ ret = sign_extend32(*rx_buf_32, SIGN_BIT_NUM); ++ ++ return ret; ++} ++ ++/** ++ * max78m6610_lmu_read_raw ++ * ++ * @param indio_dev: iio_dev pointer ++ * @param chan: pointer to iio channel spec struct ++ * @param val: return value pointer ++ * @param val2: return value 2 ponter ++ * @parma m: read mask ++ * @return: IIO value type ++ * ++ * This function will be invoked when request a value form the device. ++ * Read mask specifies which value, return value will specify the type of ++ * value returned from device, val and val2 will contains the elements ++ * making up the return value. ++ */ ++static int max78m6610_lmu_read_raw(struct iio_dev *indio_dev, ++ struct iio_chan_spec const *chan, ++ int *val, ++ int *val2, ++ long m) ++{ ++ int ret; ++ struct max78m6610_lmu_state *st = iio_priv(indio_dev); ++ ++ switch (m) { ++ ++ case IIO_CHAN_INFO_RAW: ++ mutex_lock(&indio_dev->mlock); ++ if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED) { ++ ret = -EBUSY; ++ return ret; ++ } else { ++ ret = max78m6610_lmu_scan_direct(st, chan->address); ++ } ++ mutex_unlock(&indio_dev->mlock); ++ ++ *val = ret; ++ *val2 = chan->scan_type.shift; ++ ++ ret_fraction_log2(val, val2); ++ return IIO_VAL_INT_PLUS_NANO; ++ ++ /* the full scale units : -1.0 to 1-LSB (0x7FFFFF) ++ * As an example, if 230V-peak at the input to the voltage ++ * divider gives 250mV-peak at the chip input, one would get a ++ * full scale register reading of 1 - LSB (0x7FFFFF) for ++ * instaneous voltage. ++ * Similarly, if 30Apk at the sensor input provides 250mV-peak ++ * to the chip input, a full scale register value of 1 - LSB ++ * (0x7FFFFF) for instanteous current would correspond to ++ * 30 amps. ++ * Full scale watts correspond to the result of full scale ++ * current and voltage so, in this example, full scale watts ++ * is 230 x 30 or 6900 watts. ++ */ ++ ++ case IIO_CHAN_INFO_SCALE: ++ switch (chan->type) { ++ case IIO_CURRENT: ++ *val = 250; /* unit mV */ ++ return IIO_VAL_INT; ++ ++ case IIO_VOLTAGE: ++ *val = 250; /* unit: mV */ ++ return IIO_VAL_INT; ++ ++ case IIO_POWER: ++ *val = 250*250; /* uV */ ++ return IIO_VAL_INT; ++ ++ default: ++ return -EINVAL; ++ } ++ ++ } ++ return -EINVAL; ++} ++ ++/* Driver specific iio info structure */ ++static const struct iio_info max78m6610_lmu_info = { ++ .read_raw = max78m6610_lmu_read_raw, ++ .update_scan_mode = max78m6610_lmu_update_scan_mode, ++ .driver_module = THIS_MODULE, ++}; ++ ++/** ++ * max78m6610_lmu_probe ++ * ++ * @param spi: spi device pointer ++ * @return: return 0 or standard errorids if failure ++ * ++ * device driver probe funciton for iio_dev struct initialisation. ++ */ ++static int max78m6610_lmu_probe(struct spi_device *spi) ++{ ++ struct max78m6610_lmu_state *st; ++ struct iio_dev *indio_dev = iio_device_alloc(sizeof(*st)); ++ int ret; ++ ++ if (indio_dev == NULL) ++ return -ENOMEM; ++ st = iio_priv(indio_dev); ++ ++ spi_set_drvdata(spi, indio_dev); ++ st->spi = spi; ++ ++ indio_dev->name = spi_get_device_id(spi)->name; ++ indio_dev->dev.parent = &spi->dev; ++ indio_dev->modes = INDIO_DIRECT_MODE; ++ indio_dev->channels = max78m6610_lmu_channels; ++ indio_dev->num_channels = ARRAY_SIZE(max78m6610_lmu_channels); ++ indio_dev->info = &max78m6610_lmu_info; ++ ++ /* Setup default message */ ++ st->scan_single_xfer.tx_buf = &st->tx_buf[0]; ++ st->scan_single_xfer.rx_buf = &st->rx_buf[0]; ++ st->scan_single_xfer.len = SPI_MSG_LEN; ++ ++ spi_message_init(&st->scan_single_msg); ++ spi_message_add_tail(&st->scan_single_xfer, &st->scan_single_msg); ++ ++ ret = iio_triggered_buffer_setup(indio_dev, NULL, ++ &max78m6610_lmu_trigger_handler, NULL); ++ if (ret) { ++ pr_err("triger buffer setup failed !\n"); ++ goto error_free; ++ } ++ ++ pr_debug("%s: alloc dev id: %d\n", __func__, indio_dev->id); ++ ret = iio_device_register(indio_dev); ++ if (ret) ++ goto error_cleanup_ring; ++ ++ return 0; ++ ++error_cleanup_ring: ++ iio_triggered_buffer_cleanup(indio_dev); ++error_free: ++ iio_device_free(indio_dev); ++ ++ return ret; ++} ++ ++/** ++ * max78m6610_lmu_remove ++ * ++ * @param spi: spi device pointer ++ * @return: return 0 ++ * ++ * iio device unregister & cleanup ++ */ ++static int max78m6610_lmu_remove(struct spi_device *spi) ++{ ++ struct iio_dev *indio_dev = spi_get_drvdata(spi); ++ ++ iio_device_unregister(indio_dev); ++ iio_triggered_buffer_cleanup(indio_dev); ++ iio_device_free(indio_dev); ++ ++ return 0; ++} ++ ++static const struct spi_device_id max78m6610_lmu_id[] = { ++ {"max78m6610_lmu", 0}, ++ {} ++}; ++MODULE_DEVICE_TABLE(spi, max78m6610_lmu_id); ++ ++static struct spi_driver max78m6610_lmu_driver = { ++ .driver = { ++ .name = "max78m6610_lmu", ++ .owner = THIS_MODULE, ++ }, ++ .probe = max78m6610_lmu_probe, ++ .remove = max78m6610_lmu_remove, ++ .id_table = max78m6610_lmu_id, ++}; ++ ++/** ++ * max78m6610_lmu_init ++ * ++ * device driver module init ++ */ ++static __init int max78m6610_lmu_init(void) ++{ ++ int ret; ++ ++ ret = spi_register_driver(&max78m6610_lmu_driver); ++ if (ret < 0) ++ return ret; ++ ++ return 0; ++} ++module_init(max78m6610_lmu_init); ++ ++/** ++ * max78m6610_lmu_exit ++ * ++ * device driver module exit ++ */ ++static __exit void max78m6610_lmu_exit(void) ++{ ++ spi_unregister_driver(&max78m6610_lmu_driver); ++} ++module_exit(max78m6610_lmu_exit); ++ ++ ++MODULE_AUTHOR("Kai Ji <kai.ji@emutex.com>"); ++MODULE_DESCRIPTION("Maxim 78M6610+LMU eADC"); ++MODULE_LICENSE("GPL v2"); +diff --git a/drivers/tty/serial/8250/8250.c b/drivers/tty/serial/8250/8250.c +index 733f22c..5f85dde 100644 +--- a/drivers/tty/serial/8250/8250.c ++++ b/drivers/tty/serial/8250/8250.c +@@ -561,6 +561,59 @@ serial_port_out_sync(struct uart_port *p, int offset, int value) + } + } + ++/* Uart divisor latch read */ ++static inline int _serial_dl_read(struct uart_8250_port *up) ++{ ++ return serial_in(up, UART_DLL) | serial_in(up, UART_DLM) << 8; ++} ++ ++/* Uart divisor latch write */ ++static inline void _serial_dl_write(struct uart_8250_port *up, int value) ++{ ++ serial_out(up, UART_DLL, value & 0xff); ++ serial_out(up, UART_DLM, value >> 8 & 0xff); ++} ++ ++#if defined(CONFIG_MIPS_ALCHEMY) ++/* Au1x00 haven't got a standard divisor latch */ ++static int serial_dl_read(struct uart_8250_port *up) ++{ ++ if (up->port.iotype == UPIO_AU) ++ return __raw_readl(up->port.membase + 0x28); ++ else ++ return _serial_dl_read(up); ++} ++ ++static void serial_dl_write(struct uart_8250_port *up, int value) ++{ ++ if (up->port.iotype == UPIO_AU) ++ __raw_writel(value, up->port.membase + 0x28); ++ else ++ _serial_dl_write(up, value); ++} ++#elif defined(CONFIG_SERIAL_8250_RM9K) ++static int serial_dl_read(struct uart_8250_port *up) ++{ ++ return (up->port.iotype == UPIO_RM9000) ? ++ (((__raw_readl(up->port.membase + 0x10) << 8) | ++ (__raw_readl(up->port.membase + 0x08) & 0xff)) & 0xffff) : ++ _serial_dl_read(up); ++} ++ ++static void serial_dl_write(struct uart_8250_port *up, int value) ++{ ++ if (up->port.iotype == UPIO_RM9000) { ++ __raw_writel(value, up->port.membase + 0x08); ++ __raw_writel(value >> 8, up->port.membase + 0x10); ++ } else { ++ _serial_dl_write(up, value); ++ } ++} ++#else ++#define serial_dl_read(up) _serial_dl_read(up) ++#define serial_dl_write(up, value) _serial_dl_write(up, value) ++#endif ++ + /* + * For the 16C950 + */ +diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c +index 5cdb092..9f5d030 100644 +--- a/drivers/tty/serial/8250/8250_pci.c ++++ b/drivers/tty/serial/8250/8250_pci.c +@@ -27,7 +27,13 @@ + + #include "8250.h" + +-#undef SERIAL_DEBUG_PCI ++/* CLANTON FPGA */ ++#define SERIAL_DEBUG_PCI ++ ++/* TODO: Bryan remove ! */ ++static unsigned int clanton_enable_msi = 0; ++module_param(clanton_enable_msi, uint, 0644); ++MODULE_PARM_DESC(clanton_enable_msi, "Enable MSI operation on Clanton 8250-PCI"); + + /* + * init function returns: +@@ -156,6 +162,20 @@ afavlab_setup(struct serial_private *priv, const struct pciserial_board *board, + } + + /* ++ * UART parameters for Intel Clanton setup ++ */ ++static int ++pci_intel_cln_setup(struct serial_private *priv, ++ const struct pciserial_board *board, ++ struct uart_8250_port *port, int idx) ++{ ++ unsigned int bar, offset = board->first_offset; ++ bar = FL_GET_BASE(board->flags); ++ ++ return setup_port(priv, port, bar, offset, board->reg_shift); ++} ++ ++/* + * HP's Remote Management Console. The Diva chip came in several + * different versions. N-class, L2000 and A500 have two Diva chips, each + * with 3 UARTs (the third UART on the second chip is unused). Superdome +@@ -1410,6 +1430,14 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = { + .subdevice = PCI_ANY_ID, + .setup = kt_serial_setup, + }, ++ { ++ .vendor = PCI_VENDOR_ID_INTEL, ++ .device = 0x0936, ++ .subvendor = PCI_ANY_ID, ++ .subdevice = PCI_ANY_ID, ++ .setup = pci_intel_cln_setup, ++ }, ++ + /* + * ITE + */ +@@ -2139,6 +2167,8 @@ enum pci_board_num_t { + pbn_oxsemi_2_4000000, + pbn_oxsemi_4_4000000, + pbn_oxsemi_8_4000000, ++ pbn_intel_cb, ++ pbn_intel_cln, + pbn_intel_i960, + pbn_sgi_ioc3, + pbn_computone_4, +@@ -2725,6 +2755,12 @@ static struct pciserial_board pci_boards[] = { + .reg_shift = 2, + .first_offset = 0x10000, + }, ++ [pbn_intel_cln] = { ++ .flags = FL_BASE0, ++ .num_ports = 1, ++ .base_baud = 2764800, ++ .reg_shift = 2, ++ }, + [pbn_sgi_ioc3] = { + .flags = FL_BASE0|FL_NOIRQ, + .num_ports = 1, +@@ -3187,6 +3223,14 @@ pciserial_init_one(struct pci_dev *dev, const struct pci_device_id *ent) + if (rc) + return rc; + ++ /* TODO: Bryan remove ! */ ++ if(clanton_enable_msi == 1){ ++ if(pci_enable_msi(dev)!=0){ ++ printk(KERN_ERR "CLANTON/DEBUG unable to enable MSIs on serial port!\n"); ++ } ++ } ++ ++ + if (ent->driver_data == pbn_default) { + /* + * Use a copy of the pci_board entry for this; +@@ -3998,6 +4042,12 @@ static struct pci_device_id serial_pci_tbl[] = { + { PCI_VENDOR_ID_MORETON, PCI_DEVICE_ID_RASTEL_2PORT, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, + pbn_b2_bt_2_115200 }, ++ /* ++ * Clanton descriptor ++ */ ++ { PCI_VENDOR_ID_INTEL, 0x0936, ++ PCI_ANY_ID, PCI_ANY_ID, 0, 0, ++ pbn_intel_cln }, + + /* + * EKF addition for i960 Boards form EKF with serial port +diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig +index 02e706e..a656d3b 100644 +--- a/drivers/tty/serial/Kconfig ++++ b/drivers/tty/serial/Kconfig +@@ -1327,6 +1327,26 @@ config SERIAL_IFX6X60 + help + Support for the IFX6x60 modem devices on Intel MID platforms. + ++config SERIAL_CLN_UART ++ tristate "Intel Clanton UART" ++ depends on PCI ++ select SERIAL_CORE ++ select DMADEVICES ++ select INTEL_CLN_DMAC ++ help ++ This driver is for Intel(R) Clanton UART with DMA enabled. ++ If you don't want DMA then you should use the standard 8250_pci ++ driver. ++ ++config SERIAL_CLN_UART_CONSOLE ++ bool "Support for console on Intel Clanton UART" ++ depends on SERIAL_CLN_UART=y ++ select SERIAL_CORE_CONSOLE ++ help ++ Say Y here if you wish to use the Clanton UART as the system console ++ (the system console is the device which receives all kernel messages and ++ warnings and which allows logins in single user mode). ++ + config SERIAL_PCH_UART + tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) UART" + depends on PCI +diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile +index df1b998..62a1833 100644 +--- a/drivers/tty/serial/Makefile ++++ b/drivers/tty/serial/Makefile +@@ -74,6 +74,7 @@ obj-$(CONFIG_SERIAL_VT8500) += vt8500_serial.o + obj-$(CONFIG_SERIAL_MRST_MAX3110) += mrst_max3110.o + obj-$(CONFIG_SERIAL_MFD_HSU) += mfd.o + obj-$(CONFIG_SERIAL_IFX6X60) += ifx6x60.o ++obj-$(CONFIG_SERIAL_CLN_UART) += intel_cln_uart.o + obj-$(CONFIG_SERIAL_PCH_UART) += pch_uart.o + obj-$(CONFIG_SERIAL_MSM_SMD) += msm_smd_tty.o + obj-$(CONFIG_SERIAL_MXS_AUART) += mxs-auart.o +diff --git a/drivers/tty/serial/intel_cln_uart.c b/drivers/tty/serial/intel_cln_uart.c +new file mode 100644 +index 0000000..17454d0 +--- /dev/null ++++ b/drivers/tty/serial/intel_cln_uart.c +@@ -0,0 +1,1759 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton DMA-UART driver ++ * ++ * The hardware here consists of ++ * 1 x MMIO BAR with 16550 compatible deisgnware UART regs - byte aligned ++ * 1 x MMIO BAR with a designware DMAC - modified for byte aligned bursts ++ * Lots of code stolen with pride from pch_uart.c/mfd.c ++ * ++ * DMA Config - set by hardware as a default ++ * ++ * Channel 0 : RX (Device to host) ++ * CTL0_LO : 0x00304837 ++ * CTL0_HI : 0x00000002 ++ * CFG0_LO : 0x00000C00 (HS_DST_SRC | HS_SEL_SRC) ++ * CFG0_HI : 0x00000004 ++ * ++ * ++ * Channel 1 : TX (Host to device) ++ * CTL1_LO : 0x00304837 ++ * CTL1_HI : 0x00000002 ++ * CFG1_LO : 0x00000C20 (HS_DST_SRC | HS_SEL_SRC | CH_PRIOR:001) ++ * CFG1_HI : 0x00000004 (PROTCTL = 001) ++ * ++ */ ++ ++#include <asm/io.h> ++#include <linux/console.h> ++#include <linux/debugfs.h> ++#include <linux/intel_mid_dma.h> ++#include <linux/module.h> ++#include <linux/pci.h> ++#include <linux/pm_runtime.h> ++#include <linux/serial_core.h> ++#include <linux/serial_reg.h> ++#include <linux/slab.h> ++#include <linux/spinlock.h> ++#include <linux/tty_flip.h> ++ ++#define CLN_UART_MAX_INSTANCES 2 ++#define CLN_UART_DMA_CHANNELS 2 ++#define CLN_UART_DMA_TXCHAN 1 ++#define CLN_UART_DMA_RXCHAN 0 ++#define CLN_UART_FIFO_LEN 16 ++#define CLN_UART_DRIVER_DEVICE "ttyCLN" ++#define CLN_UART_DMA_BUF_SIZE PAGE_SIZE ++ ++#define CLN_UART_MODE_MSI 0x00000001 ++#define CLN_UART_MODE_DMA 0x00000002 ++ ++#define CLN_UART_DEFAULT_UARTCLK 1843200 /* 1.8432 MHz */ ++ ++/* IIR bits - TO is non-standard */ ++#define INTEL_CLN_UART_IIR_MS 0x00 ++#define INTEL_CLN_UART_IIR_NOIRQ 0x01 ++#define INTEL_CLN_UART_IIR_THRE 0x02 ++#define INTEL_CLN_UART_IIR_RXD 0x04 ++#define INTEL_CLN_UART_IIR_RLS 0x06 ++#define INTEL_CLN_UART_IIR_BUSY 0x07 ++#define INTEL_CLN_UART_IIR_TO 0x08 ++ ++static bool dma_enable = false; ++static int intel_cln_uart_port_ct = 0; ++module_param(dma_enable, bool, 0644); ++MODULE_PARM_DESC(dma_enable, "Enable/disable DMA - default true"); ++ ++/** ++ * struct inel_cln_uart_buffer ++ * ++ * Descriptor for a UART bufer ++ */ ++struct intel_cln_uart_buffer { ++ dma_addr_t dma_addr; ++ unsigned char *buf_virt; ++ u32 offs; ++ int size; ++}; ++ ++/** ++ * struct intel_cln_uart ++ * ++ * Describes an individual UART ++ */ ++struct intel_cln_uart { ++ char name[10]; ++ int uartclk; ++ int tx_dma_use; ++ int start_tx; ++ int start_rx; ++ int dma_tx_nent; ++ int tx_empty; ++ ++ spinlock_t lock; ++ struct dentry *debugfs; ++ struct device *dev; ++ struct dma_async_tx_descriptor *desc_tx; ++ struct dma_async_tx_descriptor *desc_rx; ++ struct dma_chan *tx_chan; ++ struct dma_chan *rx_chan; ++ struct middma_device mid_dma; ++ struct intel_cln_uart_buffer txbuf; ++ struct intel_cln_uart_buffer rxbuf; ++ struct intel_mid_dma_slave dmas_rx; ++ struct intel_mid_dma_slave dmas_tx; ++ struct scatterlist *sg_tx_p; ++ struct scatterlist sg_rx; ++ struct uart_port port; ++ ++ unsigned char fcr; ++ unsigned char ier; ++ unsigned char lcr; ++ unsigned char mcr; ++ ++ unsigned long paddr; ++ unsigned long iolen; ++ unsigned long tx_trigger_level; ++ unsigned long rx_trigger_level; ++ u32 irq; ++ u32 mode; ++}; ++ ++/** ++ * serial_in ++ * ++ * @param up: pointer to uart descriptor ++ * @param offset: register offset ++ * ++ * Reads a register @ offset ++ */ ++static inline unsigned int serial_in(struct intel_cln_uart *up, int offset) ++{ ++ return (unsigned int)readb(up->port.membase + offset); ++} ++ ++/** ++ * serial_out ++ * ++ * @param up: pointer to uart descriptor ++ * @param offset: register offset ++ * ++ * Writes a register @ offset ++ */ ++static inline void serial_out(struct intel_cln_uart *up, int offset, int value) ++{ ++ unsigned char val = value & 0xff; ++ writeb(val, up->port.membase + offset); ++} ++ ++/** ++ * intel_cln_uart_handle_rx_to ++ * ++ * For FIFO RX timeout just read the data until nothing else to read ++ */ ++static int intel_cln_uart_hal_read(struct intel_cln_uart *up, unsigned char *buf, ++ int rx_size) ++{ ++ int i; ++ u8 rbr, lsr; ++ ++ lsr = serial_in(up, UART_LSR); ++ for (i = 0, lsr = serial_in(up, UART_LSR); ++ i < rx_size && lsr & UART_LSR_DR; ++ lsr = serial_in(up, UART_LSR)) { ++ rbr = serial_in(up, UART_RX); ++ buf[i++] = rbr; ++ } ++ return i; ++} ++ ++/** ++ * intel_cln_uart_hal_write ++ * ++ * For FIFO RX timeout just read the data until nothing else to read ++ */ ++static void intel_cln_uart_hal_write(struct intel_cln_uart *up, unsigned char *buf, ++ int tx_size) ++{ ++ int i; ++ unsigned int thr; ++ ++ for (i = 0; i < tx_size;) { ++ thr = buf[i++]; ++ serial_out(up, UART_TX, thr); ++ } ++} ++ ++#ifdef CONFIG_DEBUG_FS ++#define INTEL_CLN_UART_REGS_BUFSIZE 1024 ++ ++/** ++ * port_show_regs ++ * ++ * @param file: pointer to uart descriptor ++ * @param user_buf: register offset ++ * @param count: ++ * @param ppos: ++ * ++ * Dump uart regs to string @ user_buf ++ */ ++static ssize_t port_show_regs(struct file *file, char __user *user_buf, ++ size_t count, loff_t *ppos) ++{ ++ struct intel_cln_uart *up = file->private_data; ++ char *buf; ++ u32 len = 0; ++ ssize_t ret; ++ ++ buf = kzalloc(INTEL_CLN_UART_REGS_BUFSIZE, GFP_KERNEL); ++ if (!buf) ++ return 0; ++ ++ len += snprintf(buf + len, INTEL_CLN_UART_REGS_BUFSIZE - len, ++ "INTEL_CLN_UART port regs:\n"); ++ ++ len += snprintf(buf + len, INTEL_CLN_UART_REGS_BUFSIZE - len, ++ "=================================\n"); ++ len += snprintf(buf + len, INTEL_CLN_UART_REGS_BUFSIZE - len, ++ "IER: \t\t0x%08x\n", serial_in(up, UART_IER)); ++ len += snprintf(buf + len, INTEL_CLN_UART_REGS_BUFSIZE - len, ++ "IIR: \t\t0x%08x\n", serial_in(up, UART_IIR)); ++ len += snprintf(buf + len, INTEL_CLN_UART_REGS_BUFSIZE - len, ++ "LCR: \t\t0x%08x\n", serial_in(up, UART_LCR)); ++ len += snprintf(buf + len, INTEL_CLN_UART_REGS_BUFSIZE - len, ++ "MCR: \t\t0x%08x\n", serial_in(up, UART_MCR)); ++ len += snprintf(buf + len, INTEL_CLN_UART_REGS_BUFSIZE - len, ++ "LSR: \t\t0x%08x\n", serial_in(up, UART_LSR)); ++ len += snprintf(buf + len, INTEL_CLN_UART_REGS_BUFSIZE - len, ++ "MSR: \t\t0x%08x\n", serial_in(up, UART_MSR)); ++ len += snprintf(buf + len, INTEL_CLN_UART_REGS_BUFSIZE - len, ++ "FCR: \t\t0x%08x\n", serial_in(up, UART_FCR)); ++ ++ if (len > INTEL_CLN_UART_REGS_BUFSIZE) ++ len = INTEL_CLN_UART_REGS_BUFSIZE; ++ ++ ret = simple_read_from_buffer(user_buf, count, ppos, buf, len); ++ kfree(buf); ++ return ret; ++} ++ ++static const struct file_operations port_regs_ops = { ++ .owner = THIS_MODULE, ++ .open = simple_open, ++ .read = port_show_regs, ++ .llseek = default_llseek, ++}; ++ ++/** ++ * intel_cln_uart_debugfs_init ++ * ++ * @param up: pointer to uart descriptor ++ * ++ * Create a debug FS entry for the UART and associated register entries ++ */ ++static int intel_cln_uart_debugfs_init(struct intel_cln_uart *up) ++{ ++ up->debugfs = debugfs_create_dir("intel_cln_uart", NULL); ++ if (!up->debugfs) ++ return -ENOMEM; ++ ++ debugfs_create_file(up->name, S_IFREG | S_IRUGO, ++ up->debugfs, (void *)up, &port_regs_ops); ++ return 0; ++} ++ ++/** ++ * intel_cln_uart_debugfs_remove ++ * ++ * @param up: pointer to uart descriptor ++ * ++ * Remove recursive debug FS entries for the UART ++ */ ++static void intel_cln_uart_debugfs_remove(struct intel_cln_uart *intel_cln_uart) ++{ ++ if (intel_cln_uart->debugfs) ++ debugfs_remove_recursive(intel_cln_uart->debugfs); ++} ++ ++#else ++static inline int intel_cln_uart_debugfs_init(struct intel_cln_uart *intel_cln_uart) ++{ ++ return 0; ++} ++ ++static inline void intel_cln_uart_debugfs_remove(struct intel_cln_uart *intel_cln_uart) ++{ ++} ++#endif /* CONFIG_DEBUG_FS */ ++ ++/** ++ * intel_cln_uart_enable_ms ++ * ++ * @param up: pointer to uart port structure ++ * ++ * Enable the modem status interrupt ++ */ ++static void intel_cln_uart_enable_ms(struct uart_port *port) ++{ ++ struct intel_cln_uart *up = ++ container_of(port, struct intel_cln_uart, port); ++ ++ up->ier |= UART_IER_MSI; ++ serial_out(up, UART_IER, up->ier); ++} ++ ++/** ++ * intel_cln_uart_dma_tx_complete ++ * ++ * @param arg: Pointer to intel_cln_uart ++ * ++ * TX DMA completion callback ++ */ ++static void intel_cln_uart_dma_tx_complete(void *arg) ++{ ++ struct intel_cln_uart *up = arg; ++ struct uart_port *port = &up->port; ++ struct circ_buf *xmit = &port->state->xmit; ++ struct scatterlist *sg = up->sg_tx_p; ++ int i; ++ ++ for (i = 0; i < up->dma_tx_nent; i++, sg++) { ++ xmit->tail += sg_dma_len(sg); ++ port->icount.tx += sg_dma_len(sg); ++ } ++ xmit->tail &= UART_XMIT_SIZE - 1; ++ async_tx_ack(up->desc_tx); ++ dma_unmap_sg(port->dev, sg, up->dma_tx_nent, DMA_TO_DEVICE); ++ up->tx_dma_use = 0; ++ up->dma_tx_nent = 0; ++ kfree(up->sg_tx_p); ++ ++ /* TODO: move to function */ ++ up->ier |= UART_IER_THRI; ++ serial_out(up, UART_IER, up->ier); ++} ++ ++static int pop_tx(struct intel_cln_uart *up, int size) ++{ ++ int count = 0; ++ struct uart_port *port = &up->port; ++ struct circ_buf *xmit = &port->state->xmit; ++ ++ if (uart_tx_stopped(port) || uart_circ_empty(xmit) || count >= size) ++ goto pop_tx_end; ++ ++ do { ++ int cnt_to_end = ++ CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); ++ int sz = min(size - count, cnt_to_end); ++ intel_cln_uart_hal_write(up, &xmit->buf[xmit->tail], sz); ++ xmit->tail = (xmit->tail + sz) & (UART_XMIT_SIZE - 1); ++ count += sz; ++ } while (!uart_circ_empty(xmit) && count < size); ++ ++pop_tx_end: ++ dev_dbg(up->port.dev, "%d characters. Remained %d characters.(%lu)\n", ++ count, size - count, jiffies); ++ ++ return count; ++} ++ ++static int pop_tx_x(struct intel_cln_uart *up, unsigned char *buf) ++{ ++ int ret = 0; ++ struct uart_port *port = &up->port; ++ ++ if (port->x_char) { ++ dev_dbg(up->port.dev, "%s:X character send %02x (%lu)\n", ++ __func__, port->x_char, jiffies); ++ buf[0] = port->x_char; ++ port->x_char = 0; ++ ret = 1; ++ } ++ ++ return ret; ++} ++ ++static int push_rx(struct intel_cln_uart *up, const unsigned char *buf, ++ int size) ++{ ++ struct uart_port *port; ++ struct tty_struct *tty; ++ ++ port = &up->port; ++ tty = tty_port_tty_get(&port->state->port); ++ if (!tty) { ++ dev_dbg(up->port.dev, "%s:tty is busy now", __func__); ++ return -EBUSY; ++ } ++ ++ tty_insert_flip_string(tty, buf, size); ++ tty_flip_buffer_push(tty); ++ tty_kref_put(tty); ++ ++ return 0; ++} ++ ++/** ++ * intel_cln_uart_dma_tx ++ * ++ * @param arg: Pointer to intel_cln_uart ++ * ++ * Initiate a TX DMA transaction ++ */ ++void intel_cln_uart_dma_tx(struct intel_cln_uart *up) ++{ ++ struct uart_port *port = &up->port; ++ struct circ_buf *xmit = &port->state->xmit; ++ struct scatterlist *sg; ++ int nent; ++ int fifo_size; ++ //int tx_empty; ++ struct dma_async_tx_descriptor *desc; ++ int num; ++ int i; ++ int bytes; ++ int size; ++ int rem; ++ ++ if (!up->start_tx) { ++ dev_info(up->port.dev, "%s:Tx isn't started. (%lu)\n", ++ __func__, jiffies); ++ ++ /* TODO: move to function */ ++ up->ier &= ~UART_IER_THRI; ++ serial_out(up, UART_IER, up->ier); ++ ++ up->tx_empty = 1; ++ return; ++ } ++ ++ if (up->tx_dma_use) { ++ dev_dbg(up->port.dev, "%s:Tx is not completed. (%lu)\n", ++ __func__, jiffies); ++ ++ /* TODO: move to function */ ++ up->ier &= ~UART_IER_THRI; ++ serial_out(up, UART_IER, up->ier); ++ ++ up->tx_empty = 1; ++ return; ++ } ++ ++ fifo_size = max((int)port->fifosize, 1); ++ if (pop_tx_x(up, xmit->buf)) { ++ intel_cln_uart_hal_write(up, xmit->buf, 1); ++ port->icount.tx++; ++ fifo_size--; ++ } ++ ++ bytes = min((int)CIRC_CNT(xmit->head, xmit->tail, ++ UART_XMIT_SIZE), CIRC_CNT_TO_END(xmit->head, ++ xmit->tail, UART_XMIT_SIZE)); ++ if (!bytes) { ++ dev_dbg(up->port.dev, "%s 0 bytes return\n", __func__); ++ ++ /* TODO: move to function */ ++ up->ier &= ~UART_IER_THRI; ++ serial_out(up, UART_IER, up->ier); ++ ++ uart_write_wakeup(port); ++ return; ++ } ++ ++ if (bytes > fifo_size) { ++ num = bytes / fifo_size + 1; ++ size = fifo_size; ++ rem = bytes % fifo_size; ++ } else { ++ num = 1; ++ size = bytes; ++ rem = bytes; ++ } ++ ++ dev_dbg(up->port.dev, "%s num=%d size=%d rem=%d\n", ++ __func__, num, size, rem); ++ ++ up->tx_dma_use = 1; ++ ++ up->sg_tx_p = kzalloc(sizeof(struct scatterlist)*num, GFP_ATOMIC); ++ ++ sg_init_table(up->sg_tx_p, num); /* Initialize SG table */ ++ sg = up->sg_tx_p; ++ ++ for (i = 0; i < num; i++, sg++) { ++ if (i == (num - 1)) ++ sg_set_page(sg, virt_to_page(xmit->buf), ++ rem, fifo_size * i); ++ else ++ sg_set_page(sg, virt_to_page(xmit->buf), ++ size, fifo_size * i); ++ } ++ ++ sg = up->sg_tx_p; ++ nent = dma_map_sg(port->dev, sg, num, DMA_TO_DEVICE); ++ if (!nent) { ++ dev_err(up->port.dev, "%s:dma_map_sg Failed\n", __func__); ++ return; ++ } ++ up->dma_tx_nent = nent; ++ ++ for (i = 0; i < nent; i++, sg++) { ++ sg->offset = (xmit->tail & (UART_XMIT_SIZE - 1)) + ++ fifo_size * i; ++ sg_dma_address(sg) = (sg_dma_address(sg) & ++ ~(UART_XMIT_SIZE - 1)) + sg->offset; ++ if (i == (nent - 1)) ++ sg_dma_len(sg) = rem; ++ else ++ sg_dma_len(sg) = size; ++ } ++ ++ desc = dmaengine_prep_slave_sg(up->tx_chan, ++ up->sg_tx_p, nent, DMA_MEM_TO_DEV, ++ DMA_PREP_INTERRUPT | DMA_CTRL_ACK); ++ if (!desc) { ++ dev_err(up->port.dev, "%s:device_prep_slave_sg Failed\n", ++ __func__); ++ return; ++ } ++ dma_sync_sg_for_device(port->dev, up->sg_tx_p, nent, DMA_TO_DEVICE); ++ up->desc_tx = desc; ++ desc->callback = intel_cln_uart_dma_tx_complete; ++ desc->callback_param = up; ++ ++ desc->tx_submit(desc); ++ ++ dma_async_issue_pending(up->tx_chan); ++ up->tx_empty = 0; ++ ++ return; ++} ++ ++/** ++ * intel_cln_uart_start_tx ++ * ++ * @param arg: Pointer to intel_cln_uart ++ * ++ * Enable TX interrupts on the UART @ port ++ */ ++static void intel_cln_uart_start_tx(struct uart_port *port) ++{ ++ struct intel_cln_uart *up = ++ container_of(port, struct intel_cln_uart, port); ++ ++ up->start_tx = 1; ++ up->ier |= UART_IER_THRI; ++ serial_out(up, UART_IER, up->ier); ++} ++ ++/** ++ * intel_cln_uart_stop_tx ++ * ++ * @param arg: Pointer to intel_cln_uart ++ * ++ * Disable TX interrupts on the UART @ port ++ */ ++static void intel_cln_uart_stop_tx(struct uart_port *port) ++{ ++ struct intel_cln_uart *up = ++ container_of(port, struct intel_cln_uart, port); ++ ++ up->start_tx = 0; ++ up->tx_dma_use = 0; ++ up->ier &= ~UART_IER_THRI; ++ serial_out(up, UART_IER, up->ier); ++} ++ ++/** ++ * intel_cln_uart_tx ++ * ++ * @up: pointer to UART instance ++ * ++ * Transmit characters in non-DMA mode ++ */ ++static void intel_cln_uart_tx(struct intel_cln_uart *up) ++{ ++ struct uart_port *port = &up->port; ++ struct circ_buf *xmit = &port->state->xmit; ++ int fifo_size; ++ int tx_size; ++ int size; ++ int tx_empty; ++ ++ if (!up->start_tx) { ++ dev_info(up->port.dev, "%s:Tx isn't started. (%lu)\n", ++ __func__, jiffies); ++ ++ /* TODO: move to function */ ++ up->ier |= UART_IER_THRI; ++ serial_out(up, UART_IER, up->ier); ++ ++ up->tx_empty = 1; ++ return; ++ } ++ ++ fifo_size = max((int)port->fifosize, 1); ++ tx_empty = 1; ++ if (pop_tx_x(up, xmit->buf)) { ++ intel_cln_uart_hal_write(up, xmit->buf, 1); ++ port->icount.tx++; ++ tx_empty = 0; ++ fifo_size--; ++ } ++ size = min(xmit->head - xmit->tail, fifo_size); ++ if (size < 0) ++ size = fifo_size; ++ ++ tx_size = pop_tx(up, size); ++ if (tx_size > 0) { ++ port->icount.tx += tx_size; ++ tx_empty = 0; ++ } ++ ++ up->tx_empty = tx_empty; ++ ++ if (tx_empty) { ++ /* TODO: move to function */ ++ up->ier |= UART_IER_THRI; ++ serial_out(up, UART_IER, up->ier); ++ ++ uart_write_wakeup(port); ++ } ++ ++ return; ++} ++ ++/** ++ * intel_cln_uart_stop_rx ++ * ++ * Stop RX on the given UART ++ */ ++static void intel_cln_uart_stop_rx(struct uart_port *port) ++{ ++ struct intel_cln_uart *up = ++ container_of(port, struct intel_cln_uart, port); ++ ++ up->start_rx = 0; ++ up->ier &= ~UART_IER_RLSI; ++ up->port.read_status_mask &= ~UART_LSR_DR; ++ serial_out(up, UART_IER, up->ier); ++} ++ ++/** ++ * intel_cln_uart_handle_rx_to ++ * ++ * For FIFO RX timeout just read the data until nothing else to read ++ */ ++static int intel_cln_uart_rx_to(struct intel_cln_uart *up) ++{ ++ struct intel_cln_uart_buffer *buf; ++ int rx_size; ++ int ret; ++ ++ if (!up->start_rx) { ++ up->ier &= ~UART_IER_RLSI; ++ up->port.read_status_mask &= ~UART_LSR_DR; ++ serial_out(up, UART_IER, up->ier); ++ return 0; ++ } ++ ++ buf = &up->rxbuf; ++ do { ++ rx_size = intel_cln_uart_hal_read(up, buf->buf_virt, buf->size); ++ ret = push_rx(up, buf->buf_virt, rx_size); ++ if (ret) ++ return 0; ++ } while (rx_size == buf->size); ++ ++ return 0; ++} ++ ++/** ++ * intel_cln_uart_dma_push_rx ++ * ++ * Take DMA RX data and push into the TTY layer ++ */ ++static int intel_cln_uart_dma_push_rx(struct intel_cln_uart *up, int size) ++{ ++ struct tty_struct *tty; ++ int room; ++ struct uart_port *port = &up->port; ++ ++ port = &up->port; ++ tty = tty_port_tty_get(&port->state->port); ++ if (!tty) { ++ dev_dbg(up->port.dev, "%s:tty is busy now", __func__); ++ return 0; ++ } ++ ++ room = tty_buffer_request_room(tty, size); ++ ++ if (room < size) ++ dev_warn(up->dev, "Rx overrun: dropping %u bytes\n", ++ size - room); ++ if (!room) ++ return room; ++ ++ tty_insert_flip_string(tty, sg_virt(&up->sg_rx), size); ++ ++ port->icount.rx += room; ++ tty_kref_put(tty); ++ ++ return room; ++} ++ ++/** ++ * intel_cln_uart_dma_rx_complete ++ * ++ * Called when a UART RX interrupt happens - initiates a DMA transaction ++ */ ++static void intel_cln_uart_dma_rx_complete(void *arg) ++{ ++ struct intel_cln_uart *up = arg; ++ struct uart_port *port = &up->port; ++ struct tty_struct *tty = tty_port_tty_get(&port->state->port); ++ int count; ++ ++ if (!tty) { ++ dev_dbg(up->port.dev, "%s:tty is busy now", __func__); ++ return; ++ } ++ ++ dma_sync_sg_for_cpu(up->dev, &up->sg_rx, 1, DMA_FROM_DEVICE); ++ count = intel_cln_uart_dma_push_rx(up, up->rx_trigger_level); ++ if (count) ++ tty_flip_buffer_push(tty); ++ tty_kref_put(tty); ++ async_tx_ack(up->desc_rx); ++} ++ ++/** ++ * intel_cln_uart_dma_rx ++ * ++ * Called when a UART RX interrupt happens - initiates a DMA transaction ++ */ ++void intel_cln_uart_dma_rx(struct intel_cln_uart *up) ++{ ++ struct dma_async_tx_descriptor *desc; ++ ++ sg_init_table(&up->sg_rx, 1); /* Initialize SG table */ ++ ++ sg_dma_len(&up->sg_rx) = up->rx_trigger_level; ++ ++ sg_set_page(&up->sg_rx, virt_to_page(up->rxbuf.buf_virt), ++ sg_dma_len(&up->sg_rx), (unsigned long)up->rxbuf.buf_virt & ++ ~PAGE_MASK); ++ ++ sg_dma_address(&up->sg_rx) = up->rxbuf.dma_addr; ++ ++ desc = dmaengine_prep_slave_sg(up->rx_chan, ++ &up->sg_rx, 1, DMA_DEV_TO_MEM, ++ DMA_PREP_INTERRUPT | DMA_CTRL_ACK); ++ ++ if (!desc) ++ return; ++ ++ up->desc_rx = desc; ++ desc->callback = intel_cln_uart_dma_rx_complete; ++ desc->callback_param = up; ++ desc->tx_submit(desc); ++ dma_async_issue_pending(up->rx_chan); ++} ++ ++/** ++ * check_modem_status ++ * ++ * @param up: pointer to UART descriptor ++ * ++ * Check modem status ++ */ ++static inline void check_modem_status(struct intel_cln_uart *up) ++{ ++ int status; ++ ++ status = serial_in(up, UART_MSR); ++ ++ if ((status & UART_MSR_ANY_DELTA) == 0) ++ return; ++ ++ if (status & UART_MSR_TERI) ++ up->port.icount.rng++; ++ if (status & UART_MSR_DDSR) ++ up->port.icount.dsr++; ++ /* We may only get DDCD when HW init and reset */ ++ if (status & UART_MSR_DDCD) ++ uart_handle_dcd_change(&up->port, status & UART_MSR_DCD); ++ /* Will start/stop_tx accordingly */ ++ if (status & UART_MSR_DCTS) ++ uart_handle_cts_change(&up->port, status & UART_MSR_CTS); ++ ++ wake_up_interruptible(&up->port.state->port.delta_msr_wait); ++} ++ ++/** ++ * intel_cln_uart_isr ++ * ++ * @param irq: interrupt identifier ++ * @param dev_id: pointer to the device structure data ++ * ++ * This handles the interrupt from one port. And calls into the DMAC interrupt ++ * handler directly which is what will run our asynchronous tx/rx DMA callbacks ++ * ++ */ ++static void intel_cln_uart_err_ir(struct intel_cln_uart *up, unsigned int lsr) ++{ ++ up->fcr = serial_in(up, UART_FCR); ++ ++ /* Reset FIFO */ ++ up->fcr |= UART_FCR_CLEAR_RCVR; ++ serial_out(up, UART_FCR, up->fcr); ++ ++ if (lsr & UART_LSR_FIFOE) ++ dev_err(up->port.dev, "Error data in FIFO\n"); ++ ++ if (lsr & UART_LSR_FE) ++ dev_err(up->port.dev, "Framing Error\n"); ++ ++ if (lsr & UART_LSR_PE) ++ dev_err(up->port.dev, "Parity Error\n"); ++ ++ if (lsr & UART_LSR_OE) ++ dev_err(up->port.dev, "Overrun Error\n"); ++} ++ ++/** ++ * intel_cln_uart_isr ++ * ++ * @param irq: interrupt identifier ++ * @param dev_id: pointer to the device structure data ++ * ++ * This handles the interrupt from one port. And calls into the DMAC interrupt ++ * handler directly which is what will run our asynchronous tx/rx DMA callbacks ++ * ++ */ ++static irqreturn_t intel_cln_uart_isr(int irq, void *dev_id) ++{ ++ struct intel_cln_uart *up = dev_id; ++ unsigned int iid = 0, lsr, ret = IRQ_HANDLED; ++ unsigned long flags; ++ ++ if(likely(up->mode & CLN_UART_MODE_MSI)){ ++ /* TODO: see about moving this to the IO/APIC layer */ ++ } ++ ++ spin_lock_irqsave(&up->port.lock, flags); ++ ++ if (up->mode & CLN_UART_MODE_DMA) { ++ /* Run the ISR for the DMA directly */ ++ intel_mid_dma_interrupt(irq, dev_id); ++ } ++ ++ while ((iid = serial_in(up, UART_IIR)) > 1) { ++ ++ switch (iid) { ++ case INTEL_CLN_UART_IIR_RLS: ++ /* Receiver Line Status */ ++ lsr = serial_in(up, UART_LSR); ++ if (lsr & (UART_LSR_FIFOE | UART_LSR_FE | ++ UART_LSR_PE | UART_LSR_OE)) { ++ intel_cln_uart_err_ir(up, lsr); ++ } ++ break; ++ case INTEL_CLN_UART_IIR_RXD: ++ /* Received Data Ready */ ++ if(up->mode & CLN_UART_MODE_DMA){ ++ intel_cln_uart_dma_rx(up); ++ }else{ ++ intel_cln_uart_rx_to(up); ++ } ++ break; ++ case INTEL_CLN_UART_IIR_TO: ++ /* Received Data Ready (FIFO Timeout) */ ++ intel_cln_uart_rx_to(up); ++ break; ++ case INTEL_CLN_UART_IIR_THRE: ++ /* Transmitter Holding Register Empty */ ++ if(up->mode & CLN_UART_MODE_DMA){ ++ intel_cln_uart_dma_tx(up); ++ }else{ ++ intel_cln_uart_tx(up); ++ } ++ break; ++ default: ++ /* Never junp to this label */ ++ dev_err(up->port.dev, "%s:iid=%d (%lu)\n", __func__, ++ iid, jiffies); ++ ret = -1; ++ break; ++ } ++ } ++ ++ check_modem_status(up); ++ ++ spin_unlock_irqrestore(&up->port.lock, flags); ++ ++ if(likely(up->mode & CLN_UART_MODE_MSI)){ ++ /* TODO: see about moving this to the IO/APIC layer */ ++ } ++ ++ return ret; ++} ++ ++static unsigned int intel_cln_uart_tx_empty(struct uart_port *port) ++{ ++ struct intel_cln_uart *up = ++ container_of(port, struct intel_cln_uart, port); ++ unsigned long flags; ++ unsigned int ret; ++ ++ spin_lock_irqsave(&up->port.lock, flags); ++ ret = up->tx_empty; ++ spin_unlock_irqrestore(&up->port.lock, flags); ++ ++ return ret; ++} ++ ++static unsigned int intel_cln_uart_get_mctrl(struct uart_port *port) ++{ ++ struct intel_cln_uart *up = ++ container_of(port, struct intel_cln_uart, port); ++ unsigned char status; ++ unsigned int ret; ++ ++ status = serial_in(up, UART_MSR); ++ ++ ret = 0; ++ if (status & UART_MSR_DCD) ++ ret |= TIOCM_CAR; ++ if (status & UART_MSR_RI) ++ ret |= TIOCM_RNG; ++ if (status & UART_MSR_DSR) ++ ret |= TIOCM_DSR; ++ if (status & UART_MSR_CTS) ++ ret |= TIOCM_CTS; ++ return ret; ++} ++ ++static void intel_cln_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) ++{ ++ struct intel_cln_uart *up = ++ container_of(port, struct intel_cln_uart, port); ++ unsigned char mcr = 0; ++ ++ if (mctrl & TIOCM_RTS) ++ mcr |= UART_MCR_RTS; ++ if (mctrl & TIOCM_DTR) ++ mcr |= UART_MCR_DTR; ++ if (mctrl & TIOCM_OUT1) ++ mcr |= UART_MCR_OUT1; ++ if (mctrl & TIOCM_OUT2) ++ mcr |= UART_MCR_OUT2; ++ if (mctrl & TIOCM_LOOP) ++ mcr |= UART_MCR_LOOP; ++ ++ mcr |= up->mcr; ++ ++ serial_out(up, UART_MCR, mcr); ++} ++ ++static void intel_cln_uart_break_ctl(struct uart_port *port, int break_state) ++{ ++ struct intel_cln_uart *up = ++ container_of(port, struct intel_cln_uart, port); ++ unsigned long flags; ++ ++ pr_info("%s entry\n", __FUNCTION__); ++ ++ spin_lock_irqsave(&up->port.lock, flags); ++ if (break_state == -1) ++ up->lcr |= UART_LCR_SBC; ++ else ++ up->lcr &= ~UART_LCR_SBC; ++ serial_out(up, UART_LCR, up->lcr); ++ spin_unlock_irqrestore(&up->port.lock, flags); ++} ++ ++/** ++ * intel_cln_uart_startup ++ * ++ * @port: Pointer to the uart port to be started ++ * ++ */ ++static int intel_cln_uart_startup(struct uart_port *port) ++{ ++ struct intel_cln_uart *up = ++ container_of(port, struct intel_cln_uart, port); ++ unsigned long flags; ++ ++ pr_info("%s entry\n", __FUNCTION__); ++ ++ /* ++ * Clear the FIFO buffers and disable them. ++ * (they will be reenabled in set_termios()) ++ */ ++ serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); ++ serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | ++ UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); ++ serial_out(up, UART_FCR, 0); ++ ++ /* Clear the interrupt registers. */ ++ (void) serial_in(up, UART_LSR); ++ (void) serial_in(up, UART_RX); ++ (void) serial_in(up, UART_IIR); ++ (void) serial_in(up, UART_MSR); ++ ++ /* Now, initialize the UART, default is 8n1 */ ++ serial_out(up, UART_LCR, UART_LCR_WLEN8); ++ ++ spin_lock_irqsave(&up->port.lock, flags); ++ ++ up->port.mctrl |= TIOCM_OUT2; ++ intel_cln_uart_set_mctrl(&up->port, up->port.mctrl); ++ ++ /* ++ * Finally, enable interrupts. Note: Modem status interrupts ++ * are set via set_termios(), which will be occurring imminently ++ * anyway, so we don't enable them here. ++ */ ++ if (!(up->mode & CLN_UART_MODE_DMA)) ++ up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE; ++ else ++ up->ier = 0; ++ serial_out(up, UART_IER, up->ier); ++ ++ /* And clear the interrupt registers again for luck. */ ++ (void) serial_in(up, UART_LSR); ++ (void) serial_in(up, UART_RX); ++ (void) serial_in(up, UART_IIR); ++ (void) serial_in(up, UART_MSR); ++ ++ up->start_rx = 1; ++ ++ /* Coarse locking */ ++ spin_unlock_irqrestore(&up->port.lock, flags); ++ ++ return 0; ++} ++ ++static void intel_cln_uart_shutdown(struct uart_port *port) ++{ ++ struct intel_cln_uart *up = ++ container_of(port, struct intel_cln_uart, port); ++ unsigned long flags; ++ ++ pr_info("%s entry\n", __FUNCTION__); ++ ++ /* Disable interrupts from this port */ ++ up->ier = 0; ++ up->start_tx = up->start_rx = 0; ++ serial_out(up, UART_IER, 0); ++ ++ spin_lock_irqsave(&up->port.lock, flags); ++ up->port.mctrl &= ~TIOCM_OUT2; ++ intel_cln_uart_set_mctrl(&up->port, up->port.mctrl); ++ spin_unlock_irqrestore(&up->port.lock, flags); ++ ++ /* Disable break condition and FIFOs */ ++ serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); ++ serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | ++ UART_FCR_CLEAR_RCVR | ++ UART_FCR_CLEAR_XMIT); ++ serial_out(up, UART_FCR, 0); ++ ++ /* Unmap DMA */ ++ if (up->mode & CLN_UART_MODE_DMA) { ++ dma_unmap_single(port->dev, up->txbuf.dma_addr, ++ UART_XMIT_SIZE, DMA_TO_DEVICE); ++ ++ dma_unmap_single(port->dev, up->rxbuf.dma_addr, ++ CLN_UART_DMA_BUF_SIZE, DMA_FROM_DEVICE); ++ } ++ ++} ++ ++/** ++ * intel_cln_uart_set_termios ++ * ++ * @param port: Pointer to UART structure ++ * @termios: Pointer to termios control structure ++ * @old: Pointer to old termios structure ++ * ++ * Set the UART into the mode specified by the termios structure ++ */ ++static void ++intel_cln_uart_set_termios(struct uart_port *port, struct ktermios *termios, ++ struct ktermios *old) ++{ ++ struct intel_cln_uart *up = ++ container_of(port, struct intel_cln_uart, port); ++ unsigned char cval; ++ unsigned long flags; ++ unsigned int baud, quot; ++// int div; TODO: on hardware ++ ++ pr_info("%s up %p port %p termios %p ktermios %p\n", ++ __FUNCTION__, up, port, termios, old); ++ ++ switch (termios->c_cflag & CSIZE) { ++ case CS5: ++ cval = UART_LCR_WLEN5; ++ break; ++ case CS6: ++ cval = UART_LCR_WLEN6; ++ break; ++ case CS7: ++ cval = UART_LCR_WLEN7; ++ break; ++ default: ++ case CS8: ++ cval = UART_LCR_WLEN8; ++ break; ++ } ++ ++ if (termios->c_cflag & CSTOPB) ++ cval |= UART_LCR_STOP; ++ if (termios->c_cflag & PARENB) ++ cval |= UART_LCR_PARITY; ++ if (!(termios->c_cflag & PARODD)) ++ cval |= UART_LCR_EPAR; ++ ++ termios->c_cflag &= ~CMSPAR; /* Mark/Space parity is not supported */ ++ ++ /* ++ * Ask the core to calculate the divisor for us. ++ */ ++ baud = uart_get_baud_rate(port, termios, old, ++ port->uartclk / 16 / 0xffff, ++ port->uartclk / 16); ++ quot = uart_get_divisor(port, baud); ++ ++ pr_info("%s resulting baud rate was %d\n", __FUNCTION__, baud); ++ ++ /* Init to FIFO enabled mode - RX-trig (FIFO-2) TX-trig TX-trig (FIFO/2) */ ++ up->fcr = UART_FCR_ENABLE_FIFO | UART_FCR_T_TRIG_11 | UART_FCR_R_TRIG_11; ++ if (up->mode & CLN_UART_MODE_DMA) ++ up->fcr |= UART_FCR_DMA_SELECT; ++ ++ up->rx_trigger_level = up->port.fifosize-2; ++ up->tx_trigger_level = up->port.fifosize/2; ++ ++ /* ++ * Ok, we're now changing the port state. Do it with ++ * interrupts disabled. ++ */ ++ spin_lock_irqsave(&up->port.lock, flags); ++ ++ /* Update the per-port timeout */ ++ uart_update_timeout(port, termios->c_cflag, baud); ++ ++ up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; ++ if (termios->c_iflag & INPCK) ++ up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; ++ if (termios->c_iflag & (BRKINT | PARMRK)) ++ up->port.read_status_mask |= UART_LSR_BI; ++ ++ /* Characters to ignore */ ++ up->port.ignore_status_mask = 0; ++ if (termios->c_iflag & IGNPAR) ++ up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; ++ if (termios->c_iflag & IGNBRK) { ++ up->port.ignore_status_mask |= UART_LSR_BI; ++ /* ++ * If we're ignoring parity and break indicators, ++ * ignore overruns too (for real raw support). ++ */ ++ if (termios->c_iflag & IGNPAR) ++ up->port.ignore_status_mask |= UART_LSR_OE; ++ } ++ ++ /* Ignore all characters if CREAD is not set */ ++ if ((termios->c_cflag & CREAD) == 0) ++ up->port.ignore_status_mask |= UART_LSR_DR; ++ ++ /* ++ * CTS flow control flag and modem status interrupts, disable ++ * MSI by default ++ */ ++ up->ier &= ~UART_IER_MSI; ++ if (UART_ENABLE_MS(&up->port, termios->c_cflag)) ++ up->ier |= UART_IER_MSI; ++ ++ if (termios->c_cflag & CRTSCTS) ++ up->mcr |= UART_MCR_AFE | UART_MCR_RTS; ++ else ++ up->mcr &= ~UART_MCR_AFE; ++ ++ serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */ ++ serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */ ++ serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */ ++ serial_out(up, UART_LCR, cval); /* reset DLAB */ ++ up->lcr = cval; /* Save LCR */ ++ ++ intel_cln_uart_set_mctrl(&up->port, up->port.mctrl); ++ up->fcr = 0; ++ serial_out(up, UART_FCR, up->fcr); ++ ++ /* Set IER state */ ++ serial_out(up, UART_IER, up->ier); ++ ++ /* Unlock spinlock */ ++ spin_unlock_irqrestore(&up->port.lock, flags); ++} ++ ++static void ++intel_cln_uart_pm(struct uart_port *port, unsigned int state, ++ unsigned int oldstate) ++{ ++} ++ ++static void intel_cln_uart_release_port(struct uart_port *port) ++{ ++} ++ ++static int intel_cln_uart_request_port(struct uart_port *port) ++{ ++ return 0; ++} ++ ++static void intel_cln_uart_config_port(struct uart_port *port, int flags) ++{ ++ struct intel_cln_uart *up = ++ container_of(port, struct intel_cln_uart, port); ++ up->port.type = PORT_MFD; ++} ++ ++/** ++ * intel_cln_uart_verify_port ++ * ++ * @param port: Pointer to UART descriptor ++ * @param ser: Serail configuration structure ++ * ++ * Sets the port into hi-speed/lo-speed mode ++ */ ++static int ++intel_cln_uart_verify_port(struct uart_port *port, struct serial_struct *ser) ++{ ++ struct intel_cln_uart *up = ++ container_of(port, struct intel_cln_uart, port); ++ ++ if (ser->flags & UPF_LOW_LATENCY) { ++ dev_info(up->port.dev, ++ "CLN UART : Use PIO Mode (without DMA)\n"); ++ up->mode &= ~CLN_UART_MODE_DMA; ++ ser->flags &= ~UPF_LOW_LATENCY; ++ } else { ++ up->mode |= CLN_UART_MODE_DMA; ++ dev_info(up->port.dev, "CLN UART : Use DMA Mode\n"); ++ } ++ ++ return 0; ++} ++ ++/** ++ * intel_cln_uart_type ++ * ++ * @param port: Pointer to UART descriptor ++ * ++ * Returns the type of the port ++ */ ++static const char * ++intel_cln_uart_type(struct uart_port *port) ++{ ++ struct intel_cln_uart *up = ++ container_of(port, struct intel_cln_uart, port); ++ return up->name; ++} ++ ++/* Mainly for uart console use */ ++static struct uart_driver intel_cln_uart_driver; ++ ++#ifdef CONFIG_INTEL_CLN_UART_CONSOLE ++ ++static struct intel_cln_uart *intel_cln_uart_ports[2]; ++#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) ++ ++/* Wait for transmitter & holding register to empty */ ++static inline void wait_for_xmitr(struct intel_cln_uart *up) ++{ ++ unsigned int status, tmout = 1000; ++ ++ /* Wait up to 1ms for the character to be sent. */ ++ do { ++ status = serial_in(up, UART_LSR); ++ ++ if (status & UART_LSR_BI) ++ up->lsr_break_flag = UART_LSR_BI; ++ ++ if (--tmout == 0) ++ break; ++ udelay(1); ++ } while (!(status & BOTH_EMPTY)); ++ ++ /* Wait up to 1s for flow control if necessary */ ++ if (up->port.flags & UPF_CONS_FLOW) { ++ tmout = 1000000; ++ while (--tmout && ++ ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0)) ++ udelay(1); ++ } ++} ++ ++static void intel_cln_uart_console_putchar(struct uart_port *port, int ch) ++{ ++ struct intel_cln_uart *up = ++ container_of(port, struct intel_cln_uart, port); ++ ++ wait_for_xmitr(up); ++ serial_out(up, UART_TX, ch); ++} ++ ++/* ++ * Print a string to the serial port trying not to disturb ++ * any possible real use of the port... ++ * ++ * The console_lock must be held when we get here. ++ */ ++static void ++intel_cln_uart_console_write(struct console *co, const char *s, unsigned int count) ++{ ++ struct intel_cln_uart *up = &intel_cln_uart_ports[co->index]; ++ unsigned long flags; ++ unsigned int ier; ++ int locked = 1; ++ ++ local_irq_save(flags); ++ if (up->port.sysrq) ++ locked = 0; ++ else if (oops_in_progress) { ++ locked = spin_trylock(&up->port.lock); ++ } else ++ spin_lock(&up->port.lock); ++ ++ /* First save the IER then disable the interrupts */ ++ ier = serial_in(up, UART_IER); ++ serial_out(up, UART_IER, 0); ++ ++ uart_console_write(&up->port, s, count, intel_cln_uart_console_putchar); ++ ++ /* ++ * Finally, wait for transmitter to become empty ++ * and restore the IER ++ */ ++ wait_for_xmitr(up); ++ serial_out(up, UART_IER, ier); ++ ++ if (locked) ++ spin_unlock(&up->port.lock); ++ local_irq_restore(flags); ++} ++ ++static struct console intel_cln_uart_console; ++ ++static int __init ++intel_cln_uart_console_setup(struct console *co, char *options) ++{ ++ struct intel_cln_uart *up; ++ int baud = 115200; ++ int bits = 8; ++ int parity = 'n'; ++ int flow = 'n'; ++ ++ if (co->index == -1 || co->index >= intel_cln_uart_driver.nr) ++ co->index = 0; ++ up = intel_cln_uart_ports[co->index]; ++ if (!up) ++ return -ENODEV; ++ ++ if (options) ++ uart_parse_options(options, &baud, &parity, &bits, &flow); ++ ++ return uart_set_options(&up->port, co, baud, parity, bits, flow); ++} ++ ++ ++static struct uart_driver intel_cln_uart_driver; ++static struct console intel_cln_uart_console = { ++ .name = "ttyCLN", ++ .write = intel_cln_uart_console_write, ++ .device = uart_console_device, ++ .setup = intel_cln_uart_console_setup, ++ .flags = CON_PRINTBUFFER, ++ .index = -1, ++ .data = &intel_cln_uart_driver, ++}; ++ ++#define INTEL_CLN_UART_CONSOLE (&intel_cln_uart_console) ++#else ++#define INTEL_CLN_UART_CONSOLE NULL ++#endif ++ ++static struct uart_driver intel_cln_uart_driver = { ++ .owner = THIS_MODULE, ++ .driver_name = KBUILD_MODNAME, ++ .dev_name = CLN_UART_DRIVER_DEVICE, ++ .major = TTY_MAJOR, ++ .minor = 129, ++ .nr = CLN_UART_MAX_INSTANCES, ++ .cons = INTEL_CLN_UART_CONSOLE, ++}; ++ ++static struct uart_ops intel_cln_uart_ops = { ++ .tx_empty = intel_cln_uart_tx_empty, ++ .set_mctrl = intel_cln_uart_set_mctrl, ++ .get_mctrl = intel_cln_uart_get_mctrl, ++ .stop_tx = intel_cln_uart_stop_tx, ++ .start_tx = intel_cln_uart_start_tx, ++ .stop_rx = intel_cln_uart_stop_rx, ++ .enable_ms = intel_cln_uart_enable_ms, ++ .break_ctl = intel_cln_uart_break_ctl, ++ .startup = intel_cln_uart_startup, ++ .shutdown = intel_cln_uart_shutdown, ++ .set_termios = intel_cln_uart_set_termios, ++ .pm = intel_cln_uart_pm, ++ .type = intel_cln_uart_type, ++ .release_port = intel_cln_uart_release_port, ++ .request_port = intel_cln_uart_request_port, ++ .config_port = intel_cln_uart_config_port, ++ .verify_port = intel_cln_uart_verify_port, ++}; ++ ++/** ++ * intel_cln_dma_chan_filter ++ * ++ * Simple descriptor disjunct function ++ */ ++static bool intel_cln_dma_chan_filter(struct dma_chan * chan, void *param) ++{ ++// struct intel_mid_dma_slave *dws = param; ++ ++// pr_info("%s compare device %p to %p\n", __FUNCTION__, dws->dma_dev, chan->device->dev); ++ ++ //return dws->dmac && (&dws->dmac->dev == chan->device->dev); ++ return 1; // TBD ++} ++ ++/** ++ * intel_cln_uart_probe ++ * ++ * @param dev: the PCI device matching ++ * @param id: entry in the match table ++ * @return 0 ++ * ++ * Callback from PCI layer when dev/vendor ids match. ++ * Sets up necessary resources ++ */ ++static int intel_cln_uart_probe(struct pci_dev *pdev, ++ const struct pci_device_id *id) ++{ ++ dma_cap_mask_t mask; ++ int ret = 0; ++ struct intel_cln_uart *up = NULL; ++ unsigned long flags = 0, len = 0; ++ ++ printk(KERN_INFO "Intel Clanton UART-DMA (ID: %04x:%04x)\n", ++ pdev->vendor, pdev->device); ++ ++ /* Driver desc */ ++ up = kzalloc(sizeof(struct intel_cln_uart), GFP_KERNEL); ++ if (up == NULL){ ++ ret = -ENOMEM; ++ goto err; ++ } ++ up->mid_dma.pdev = pci_dev_get(pdev); ++ ++ ret = pci_enable_device(pdev); ++ if (ret){ ++ goto err; ++ } ++ ++ /* Attempt MSI enable */ ++ //if(pci_enable_msi(pdev)){ ++ if(1){ ++ dev_warn(&pdev->dev, "MSI enable fail\n"); ++ flags = IRQF_SHARED; ++ }else{ ++ /* ++ * MSI enable good - set IRQ type to level. This seems wrong ++ * since PCI is an edge triggered interrupt system - but, the IP ++ * block connected to the bridge is level triggered. Setting the ++ * IRQ type to LEVEL_HIGH will trigger the ++ * io_apic->irq_mask()/unmask() functions to be automagically ++ * called by the kernel - which saves us from having to do nasty ++ * PCI config space writes explicitely in the ISR - kernel ++ * entry/exit functions will do that for us ++ */ ++ irq_set_irq_type(pdev->irq, IRQ_TYPE_LEVEL_HIGH); ++ up->mode |= CLN_UART_MODE_MSI; ++ } ++ ++ /* DMA hook */ ++ if(dma_enable == true){ ++ up->mode |= CLN_UART_MODE_DMA; ++ } ++ up->mode = 0; ++ ++ /* Hook an IRQ - in whichever mode */ ++ ret = request_irq(pdev->irq, intel_cln_uart_isr, flags, KBUILD_MODNAME, ++ up); ++ if (ret) { ++ dev_err(&pdev->dev, "can not get IRQ\n"); ++ goto err_dev; ++ } ++ ++ /* Add debugfs entries */ ++ intel_cln_uart_debugfs_init(up); ++ ++ /* Init spinlock */ ++ spin_lock_init(&up->lock); ++ ++ /* UART regs on BAR0 */ ++ up->port.mapbase = pci_resource_start(pdev, 0); ++ len = pci_resource_len(pdev, 0); ++ up->port.membase = ioremap_nocache(up->port.mapbase, len); ++ if(up->port.membase == NULL){ ++ ret = -ENODEV; ++ goto err_dev; ++ } ++ ++ /* Init DMA driver */ ++ up->mid_dma.max_chan = CLN_UART_DMA_CHANNELS; /* Max channels */ ++ up->mid_dma.chan_base = 0; /* Index start */ ++ up->mid_dma.block_size = CLN_UART_FIFO_LEN; /* MAX DMA block */ ++ up->mid_dma.pimr_mask = 0; /* Per int regs bool */ ++ ++ ret = intel_cln_dma_probe(pdev, &up->mid_dma); ++ if(ret != 0){ ++ dev_err(&pdev->dev, "Unable to init DMA sub-system\n"); ++ goto err_dev; ++ } ++ ++ /* Request DMA channels TODO: move to startup() once debugged on hw */ ++ dma_cap_zero(mask); ++ dma_cap_set(DMA_SLAVE, mask); ++ ++ up->rx_chan = dma_request_channel(mask, intel_cln_dma_chan_filter, &up->dmas_rx); ++ if(up->rx_chan == NULL){ ++ dev_err(&pdev->dev, "Unable to hook DMA RX channel\n"); ++ goto err_bar0; ++ }; ++ up->dmas_rx.hs_mode = LNW_DMA_SW_HS; ++ up->dmas_rx.cfg_mode = LNW_DMA_PER_TO_MEM; ++ ++ up->tx_chan = dma_request_channel(mask, intel_cln_dma_chan_filter, &up->dmas_tx); ++ if(up->tx_chan == NULL){ ++ dev_err(&pdev->dev, "Unable to hook DMA RX channel\n"); ++ goto err_bar0; ++ }; ++ up->dmas_tx.hs_mode = LNW_DMA_SW_HS; ++ up->dmas_tx.cfg_mode = LNW_DMA_MEM_TO_PER; ++ ++ dev_info(&pdev->dev, "using %s for DMA RX %s for DMA TX\n", ++ dev_name(&up->rx_chan->dev->device), dev_name(&up->tx_chan->dev->device)); ++ ++ /* Enumerate port */ ++ up->irq = pdev->irq; ++ up->dev = &pdev->dev; ++ up->tx_empty = 1; ++ ++// up->port_type = PORT_MAX_8250 + 10; /* TODO: add to include/linux/serial_core.h */ ++ up->uartclk = CLN_UART_DEFAULT_UARTCLK; ++ up->port.uartclk = up->uartclk; ++ up->port.dev = &pdev->dev; ++ up->port.irq = pdev->irq; ++ up->port.iotype = UPIO_MEM; ++ up->port.ops = &intel_cln_uart_ops; ++ up->port.flags = UPF_BOOT_AUTOCONF; ++ up->port.fifosize = 16; ++ up->port.line = pdev->dev.id; ++ snprintf(up->name, sizeof(up->name), "cln_port%d", intel_cln_uart_port_ct++); ++ ++ /* Get Consistent memory for DMA TODO: move to startup() once debugged on hw */ ++ up->rxbuf.buf_virt = dma_alloc_coherent(up->port.dev, up->port.fifosize, ++ &up->rxbuf.dma_addr, GFP_KERNEL); ++ up->rxbuf.size = up->port.fifosize; ++ ++ /* Add UART */ ++ uart_add_one_port(&intel_cln_uart_driver, &up->port); ++ pci_set_drvdata(pdev, up); ++ ++ pm_runtime_put_noidle(&pdev->dev); ++ pm_runtime_allow(&pdev->dev); ++ ++ return 0; ++ ++err_bar0: ++ iounmap(up->port.membase); ++err_dev: ++ free_irq(up->irq, NULL); ++ pci_disable_device(pdev); ++err: ++ kfree(up); ++ return ret; ++} ++ ++/** ++ * uart_remove ++ * ++ * @param pdev: PCI device ++ * @return nothing ++ * ++ * Callback from PCI sub-system upon PCI dev removal ++ */ ++static void intel_cln_uart_remove(struct pci_dev *pdev) ++{ ++ struct intel_cln_uart *up = pci_get_drvdata(pdev); ++ if (!up) ++ return; ++ ++ /* Shutdown DMA */ ++ intel_cln_dma_remove(pdev, &up->mid_dma); ++ ++ /* TODO: move to remove() when h/w proved out */ ++ if (up->tx_chan) { ++ dma_release_channel(up->tx_chan); ++ up->tx_chan = NULL; ++ } ++ if (up->rx_chan) { ++ dma_release_channel(up->rx_chan); ++ up->rx_chan = NULL; ++ } ++ ++ if (sg_dma_address(&up->sg_rx)) ++ dma_free_coherent(up->port.dev, up->port.fifosize, ++ sg_virt(&up->sg_rx), ++ sg_dma_address(&up->sg_rx)); ++ ++ /* Remove UART */ ++ uart_remove_one_port(&intel_cln_uart_driver, &up->port); ++ ++ pci_set_drvdata(pdev, NULL); ++ free_irq(up->irq, NULL); ++ pci_disable_device(pdev); ++ ++ /* Remove debugfs entries */ ++ intel_cln_uart_debugfs_remove(up); ++ ++ kfree(up); ++} ++ ++#ifdef CONFIG_PM ++ ++static int intel_cln_uart_suspend(struct pci_dev *pdev, pm_message_t state) ++{ ++ struct intel_cln_uart *up = pci_get_drvdata(pdev); ++ ++ /* Suspend DMA regs */ ++ intel_cln_dma_suspend(&up->mid_dma); ++ ++ ++ /* Suspend UART */ ++ uart_suspend_port(&intel_cln_uart_driver, &up->port); ++ ++ pci_save_state(pdev); ++ pci_set_power_state(pdev, pci_choose_state(pdev, state)); ++ return 0; ++} ++ ++static int intel_cln_uart_resume(struct pci_dev *pdev) ++{ ++ struct intel_cln_uart *up = pci_get_drvdata(pdev); ++ int ret; ++ ++ pci_set_power_state(pdev, PCI_D0); ++ pci_restore_state(pdev); ++ ++ ret = pci_enable_device(pdev); ++ if (ret){ ++ dev_warn(&pdev->dev, ++ "INTEL_CLN_UART: can't re-enable device, try to continue\n"); ++ } ++ ++ uart_resume_port(&intel_cln_uart_driver, &up->port); ++ ++ /* Resume DMA regs */ ++ intel_cln_dma_resume(&up->mid_dma); ++ ++ return 0; ++} ++ ++#else ++ ++#define intel_cln_uart_suspend NULL ++#define intel_cln_uart_resume NULL ++ ++#endif ++ ++struct pci_device_id intel_cln_uart_ids[] = { ++ { PCI_VDEVICE(INTEL, 0x0936), 0}, ++ { 0 } ++}; ++ ++MODULE_DEVICE_TABLE(pci, intel_cln_uart_ids); ++ ++/* PCI callbacks */ ++static struct pci_driver intel_cln_uart_pci_desc = { ++ .name = "intel_cln_uart", ++ .id_table = intel_cln_uart_ids, ++ .probe = intel_cln_uart_probe, ++ .remove = intel_cln_uart_remove, ++ .suspend = intel_cln_uart_suspend, ++ .resume = intel_cln_uart_resume, ++}; ++ ++/** ++ * intel_cln_uart_init ++ * ++ * Module entry point ++ */ ++static int __init intel_cln_uart_init(void) ++{ ++ int ret; ++ ++ /* register as UART driver */ ++ ret = uart_register_driver(&intel_cln_uart_driver); ++ if (ret < 0) ++ return ret; ++ ++ /* register as PCI driver */ ++ ret = pci_register_driver(&intel_cln_uart_pci_desc); ++ if (ret < 0) ++ uart_unregister_driver(&intel_cln_uart_driver); ++ ++ return ret; ++} ++ ++/** ++ * intel_cln_uart_exit ++ * ++ * Module exit ++ */ ++static void __exit intel_cln_uart_exit(void) ++{ ++ pci_unregister_driver(&intel_cln_uart_pci_desc); ++} ++ ++MODULE_AUTHOR("Bryan O'Donoghue <bryan.odonoghue@linux.intel.com>"); ++MODULE_DESCRIPTION("Intel Clanton UART-DMA driver"); ++MODULE_LICENSE("Dual BSD/GPL"); ++ ++module_init(intel_cln_uart_init); ++module_exit(intel_cln_uart_exit); +diff --git a/drivers/tty/tty_io.c b/drivers/tty/tty_io.c +index da9fde8..6b20fd6 100644 +--- a/drivers/tty/tty_io.c ++++ b/drivers/tty/tty_io.c +@@ -2906,9 +2906,9 @@ void do_SAK(struct tty_struct *tty) + + EXPORT_SYMBOL(do_SAK); + +-static int dev_match_devt(struct device *dev, void *data) ++static int dev_match_devt(struct device *dev, const void *data) + { +- dev_t *devt = data; ++ const dev_t *devt = data; + return dev->devt == *devt; + } + +diff --git a/drivers/tty/tty_ldisc.c b/drivers/tty/tty_ldisc.c +index c578229..78f1be2 100644 +--- a/drivers/tty/tty_ldisc.c ++++ b/drivers/tty/tty_ldisc.c +@@ -934,17 +934,17 @@ void tty_ldisc_release(struct tty_struct *tty, struct tty_struct *o_tty) + * race with the set_ldisc code path. + */ + +- tty_lock_pair(tty, o_tty); + tty_ldisc_halt(tty); +- tty_ldisc_flush_works(tty); +- if (o_tty) { ++ if (o_tty) + tty_ldisc_halt(o_tty); ++ ++ tty_ldisc_flush_works(tty); ++ if (o_tty) + tty_ldisc_flush_works(o_tty); +- } + ++ tty_lock_pair(tty, o_tty); + /* This will need doing differently if we need to lock */ + tty_ldisc_kill(tty); +- + if (o_tty) + tty_ldisc_kill(o_tty); + +diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig +index 14625fd..21222a8 100644 +--- a/drivers/usb/gadget/Kconfig ++++ b/drivers/usb/gadget/Kconfig +@@ -439,7 +439,7 @@ config USB_GOKU + gadget drivers to also be dynamically linked. + + config USB_EG20T +- tristate "Intel EG20T PCH/LAPIS Semiconductor IOH(ML7213/ML7831) UDC" ++ tristate "Intel CLN/EG20T PCH/LAPIS Semiconductor IOH(ML7213/ML7831) UDC" + depends on PCI + help + This is a USB device driver for EG20T PCH. +@@ -459,7 +459,8 @@ config USB_EG20T + ML7831 is for general purpose use. + ML7213/ML7831 is companion chip for Intel Atom E6xx series. + ML7213/ML7831 is completely compatible for Intel EG20T PCH. +- ++ ++ This driver can be used with Intel's Clanton SOC platform + # + # LAST -- dummy/emulated controller + # +diff --git a/drivers/usb/gadget/pch_udc.c b/drivers/usb/gadget/pch_udc.c +index 6490c00..848c502 100644 +--- a/drivers/usb/gadget/pch_udc.c ++++ b/drivers/usb/gadget/pch_udc.c +@@ -6,6 +6,7 @@ + * the Free Software Foundation; version 2 of the License. + */ + #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++#include <asm/cln.h> + #include <linux/kernel.h> + #include <linux/module.h> + #include <linux/pci.h> +@@ -18,6 +19,10 @@ + #include <linux/gpio.h> + #include <linux/irq.h> + ++static unsigned int enable_msi = 1; ++module_param(enable_msi, uint, S_IRUGO | S_IWUSR); ++MODULE_PARM_DESC(enable_msi, "Enable PCI MSI mode"); ++ + /* GPIO port for VBUS detecting */ + static int vbus_gpio_port = -1; /* GPIO port number (-1:Not used) */ + +@@ -343,6 +348,7 @@ struct pch_vbus_gpio_data { + * @setup_data: Received setup data + * @phys_addr: of device memory + * @base_addr: for mapped device memory ++ * @bar: Indicates which PCI BAR for USB regs + * @irq: IRQ line for the device + * @cfg_data: current cfg, intf, and alt in use + * @vbus_gpio: GPIO informaton for detecting VBUS +@@ -371,13 +377,16 @@ struct pch_udc_dev { + struct usb_ctrlrequest setup_data; + unsigned long phys_addr; + void __iomem *base_addr; ++ unsigned bar; + unsigned irq; + struct pch_udc_cfg_data cfg_data; + struct pch_vbus_gpio_data vbus_gpio; + }; + +-#define PCH_UDC_PCI_BAR 1 ++#define PCH_UDC_PCI_BAR_CLANTON 0 ++#define PCH_UDC_PCI_BAR_EG20T 1 + #define PCI_DEVICE_ID_INTEL_EG20T_UDC 0x8808 ++#define PCI_DEVICE_ID_INTEL_CLANTON_UDC 0x0939 + #define PCI_VENDOR_ID_ROHM 0x10DB + #define PCI_DEVICE_ID_ML7213_IOH_UDC 0x801D + #define PCI_DEVICE_ID_ML7831_IOH_UDC 0x8808 +@@ -2779,55 +2788,70 @@ static irqreturn_t pch_udc_isr(int irq, void *pdev) + { + struct pch_udc_dev *dev = (struct pch_udc_dev *) pdev; + u32 dev_intr, ep_intr; +- int i; +- +- dev_intr = pch_udc_read_device_interrupts(dev); +- ep_intr = pch_udc_read_ep_interrupts(dev); +- +- /* For a hot plug, this find that the controller is hung up. */ +- if (dev_intr == ep_intr) +- if (dev_intr == pch_udc_readl(dev, UDC_DEVCFG_ADDR)) { +- dev_dbg(&dev->pdev->dev, "UDC: Hung up\n"); +- /* The controller is reset */ +- pch_udc_writel(dev, UDC_SRST, UDC_SRST_ADDR); +- return IRQ_HANDLED; ++ int i, events = 0; ++ ++ mask_pvm(dev->pdev); ++ do { ++ events = 0; ++ dev_intr = pch_udc_read_device_interrupts(dev); ++ ep_intr = pch_udc_read_ep_interrupts(dev); ++ ++ /* For a hot plug, this find that the controller is hung up. */ ++ if (dev_intr == ep_intr) ++ if (dev_intr == pch_udc_readl(dev, UDC_DEVCFG_ADDR)) { ++ dev_dbg(&dev->pdev->dev, "UDC: Hung up\n"); ++ /* The controller is reset */ ++ pch_udc_writel(dev, UDC_SRST, UDC_SRST_ADDR); ++ unmask_pvm(dev->pdev); ++ return IRQ_HANDLED; ++ } ++ if (dev_intr){ ++ /* Clear device interrupts */ ++ pch_udc_write_device_interrupts(dev, dev_intr); ++ events = 1; + } +- if (dev_intr) +- /* Clear device interrupts */ +- pch_udc_write_device_interrupts(dev, dev_intr); +- if (ep_intr) +- /* Clear ep interrupts */ +- pch_udc_write_ep_interrupts(dev, ep_intr); +- if (!dev_intr && !ep_intr) +- return IRQ_NONE; +- spin_lock(&dev->lock); +- if (dev_intr) +- pch_udc_dev_isr(dev, dev_intr); +- if (ep_intr) { +- pch_udc_read_all_epstatus(dev, ep_intr); +- /* Process Control In interrupts, if present */ +- if (ep_intr & UDC_EPINT_IN_EP0) { +- pch_udc_svc_control_in(dev); +- pch_udc_postsvc_epinters(dev, 0); ++ if (ep_intr){ ++ /* Clear ep interrupts */ ++ pch_udc_write_ep_interrupts(dev, ep_intr); ++ events = 1; + } +- /* Process Control Out interrupts, if present */ +- if (ep_intr & UDC_EPINT_OUT_EP0) +- pch_udc_svc_control_out(dev); +- /* Process data in end point interrupts */ +- for (i = 1; i < PCH_UDC_USED_EP_NUM; i++) { +- if (ep_intr & (1 << i)) { +- pch_udc_svc_data_in(dev, i); +- pch_udc_postsvc_epinters(dev, i); ++ if (!dev_intr && !ep_intr){ ++ unmask_pvm(dev->pdev); ++ return IRQ_NONE; ++ } ++ spin_lock(&dev->lock); ++ if (dev_intr){ ++ pch_udc_dev_isr(dev, dev_intr); ++ } ++ if (ep_intr) { ++ pch_udc_read_all_epstatus(dev, ep_intr); ++ /* Process Control In interrupts, if present */ ++ if (ep_intr & UDC_EPINT_IN_EP0) { ++ pch_udc_svc_control_in(dev); ++ pch_udc_postsvc_epinters(dev, 0); ++ } ++ /* Process Control Out interrupts, if present */ ++ if (ep_intr & UDC_EPINT_OUT_EP0) ++ pch_udc_svc_control_out(dev); ++ /* Process data in end point interrupts */ ++ for (i = 1; i < PCH_UDC_USED_EP_NUM; i++) { ++ if (ep_intr & (1 << i)) { ++ pch_udc_svc_data_in(dev, i); ++ pch_udc_postsvc_epinters(dev, i); ++ } + } ++ /* Process data out end point interrupts */ ++ for (i = UDC_EPINT_OUT_SHIFT + 1; ++ i < (UDC_EPINT_OUT_SHIFT + PCH_UDC_USED_EP_NUM); ++ i++) ++ if (ep_intr & (1 << i)) ++ pch_udc_svc_data_out(dev, ++ i - UDC_EPINT_OUT_SHIFT); + } +- /* Process data out end point interrupts */ +- for (i = UDC_EPINT_OUT_SHIFT + 1; i < (UDC_EPINT_OUT_SHIFT + +- PCH_UDC_USED_EP_NUM); i++) +- if (ep_intr & (1 << i)) +- pch_udc_svc_data_out(dev, i - +- UDC_EPINT_OUT_SHIFT); +- } +- spin_unlock(&dev->lock); ++ spin_unlock(&dev->lock); ++ }while(events == 1); ++ unmask_pvm(dev->pdev); ++ + return IRQ_HANDLED; + } + +@@ -3108,7 +3132,7 @@ static void pch_udc_remove(struct pci_dev *pdev) + iounmap(dev->base_addr); + if (dev->mem_region) + release_mem_region(dev->phys_addr, +- pci_resource_len(pdev, PCH_UDC_PCI_BAR)); ++ pci_resource_len(pdev, dev->bar)); + if (dev->active) + pci_disable_device(pdev); + if (dev->registered) +@@ -3184,9 +3208,16 @@ static int pch_udc_probe(struct pci_dev *pdev, + dev->active = 1; + pci_set_drvdata(pdev, dev); + ++ /* Determine BAR based on PCI ID */ ++ if(id->device == PCI_DEVICE_ID_INTEL_CLANTON_UDC){ ++ dev->bar = PCH_UDC_PCI_BAR_CLANTON; ++ }else { ++ dev->bar = PCH_UDC_PCI_BAR_EG20T; ++ } ++ + /* PCI resource allocation */ +- resource = pci_resource_start(pdev, 1); +- len = pci_resource_len(pdev, 1); ++ resource = pci_resource_start(pdev, dev->bar); ++ len = pci_resource_len(pdev, dev->bar); + + if (!request_mem_region(resource, len, KBUILD_MODNAME)) { + dev_err(&pdev->dev, "%s: pci device used already\n", __func__); +@@ -3213,6 +3244,12 @@ static int pch_udc_probe(struct pci_dev *pdev, + retval = -ENODEV; + goto finished; + } ++ ++ pci_set_master(pdev); ++ if (enable_msi == 1){ ++ pci_enable_msi(pdev); ++ } ++ + if (request_irq(pdev->irq, pch_udc_isr, IRQF_SHARED, KBUILD_MODNAME, + dev)) { + dev_err(&pdev->dev, "%s: request_irq(%d) fail\n", __func__, +@@ -3223,7 +3260,7 @@ static int pch_udc_probe(struct pci_dev *pdev, + dev->irq = pdev->irq; + dev->irq_registered = 1; + +- pci_set_master(pdev); ++ + pci_try_set_mwi(pdev); + + /* device struct setup */ +@@ -3261,6 +3298,11 @@ finished: + + static DEFINE_PCI_DEVICE_TABLE(pch_udc_pcidev_id) = { + { ++ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CLANTON_UDC), ++ .class = (PCI_CLASS_SERIAL_USB << 8) | 0xfe, ++ .class_mask = 0xffffffff, ++ }, ++ { + PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EG20T_UDC), + .class = (PCI_CLASS_SERIAL_USB << 8) | 0xfe, + .class_mask = 0xffffffff, +diff --git a/drivers/usb/gadget/serial.c b/drivers/usb/gadget/serial.c +index 44752f5..e02a4c9 100644 +--- a/drivers/usb/gadget/serial.c ++++ b/drivers/usb/gadget/serial.c +@@ -127,6 +127,15 @@ static unsigned n_ports = 1; + module_param(n_ports, uint, 0); + MODULE_PARM_DESC(n_ports, "number of ports to create, default=1"); + ++static __u16 vendor = GS_VENDOR_ID; ++module_param(vendor, ushort, 0); ++MODULE_PARM_DESC(vendor, "User specified vendor ID (default=" ++ __MODULE_STRING(GS_VENDOR_ID)")"); ++ ++static __u16 product = 0; ++module_param(product, ushort, 0); ++MODULE_PARM_DESC(product, "User specified product ID"); ++ + /*-------------------------------------------------------------------------*/ + + static int __init serial_bind_config(struct usb_configuration *c) +@@ -172,6 +181,14 @@ static int __init gs_bind(struct usb_composite_dev *cdev) + status = strings_dev[STRING_DESCRIPTION_IDX].id; + serial_config_driver.iConfiguration = status; + ++ /* Allow command line over-ride to set specific vendor/device id */ ++ if (vendor != GS_VENDOR_ID) ++ device_desc.idVendor = cpu_to_le16(vendor); ++ if (product != 0) ++ device_desc.idProduct = cpu_to_le16(product); ++ pr_info("g_serial: Vendor 0x%04x Product 0x%04x\n", ++ device_desc.idVendor, device_desc.idProduct); ++ + if (gadget_is_otg(cdev->gadget)) { + serial_config_driver.descriptors = otg_desc; + serial_config_driver.bmAttributes |= USB_CONFIG_ATT_WAKEUP; +@@ -201,6 +218,7 @@ static __refdata struct usb_composite_driver gserial_driver = { + .bind = gs_bind, + }; + ++static int bCfgVal; + static int __init init(void) + { + /* We *could* export two configs; that'd be much cleaner... +@@ -208,19 +226,19 @@ static int __init init(void) + */ + if (use_acm) { + serial_config_driver.label = "CDC ACM config"; +- serial_config_driver.bConfigurationValue = 2; ++ serial_config_driver.bConfigurationValue = ++bCfgVal; + device_desc.bDeviceClass = USB_CLASS_COMM; + device_desc.idProduct = + cpu_to_le16(GS_CDC_PRODUCT_ID); + } else if (use_obex) { + serial_config_driver.label = "CDC OBEX config"; +- serial_config_driver.bConfigurationValue = 3; ++ serial_config_driver.bConfigurationValue = ++bCfgVal; + device_desc.bDeviceClass = USB_CLASS_COMM; + device_desc.idProduct = + cpu_to_le16(GS_CDC_OBEX_PRODUCT_ID); + } else { + serial_config_driver.label = "Generic Serial config"; +- serial_config_driver.bConfigurationValue = 1; ++ serial_config_driver.bConfigurationValue = ++bCfgVal; + device_desc.bDeviceClass = USB_CLASS_VENDOR_SPEC; + device_desc.idProduct = + cpu_to_le16(GS_PRODUCT_ID); +diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c +index 170b939..e34f67c 100644 +--- a/drivers/usb/host/ehci-pci.c ++++ b/drivers/usb/host/ehci-pci.c +@@ -50,6 +50,10 @@ static int ehci_pci_reinit(struct ehci_hcd *ehci, struct pci_dev *pdev) + if (!retval) + ehci_dbg(ehci, "MWI active\n"); + ++ /* Reset the threshold limit */ ++ if(unlikely(usb_is_intel_cln(pdev))) ++ usb_set_cln_bulk_thresh(pdev); ++ + return 0; + } + +diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c +index 4c338ec..401780b 100644 +--- a/drivers/usb/host/pci-quirks.c ++++ b/drivers/usb/host/pci-quirks.c +@@ -722,6 +722,48 @@ static int handshake(void __iomem *ptr, u32 mask, u32 done, + return -ETIMEDOUT; + } + ++#define PCI_DEVICE_ID_INTEL_QUARK_X1000_SOC 0x0939 ++bool usb_is_intel_cln(struct pci_dev *pdev) ++{ ++ return pdev->vendor == PCI_VENDOR_ID_INTEL && ++ pdev->device == PCI_DEVICE_ID_INTEL_QUARK_X1000_SOC; ++ ++} ++EXPORT_SYMBOL_GPL(usb_is_intel_cln); ++ ++#define EHCI_INSNREG01 0x84 ++#define EHCI_INSNREG01_THRESH 0x007F007F /* Threshold value */ ++void usb_set_cln_bulk_thresh(struct pci_dev *pdev) ++{ ++ void __iomem *base, *op_reg_base; ++ u8 cap_length; ++ u32 val; ++ ++ if (!mmio_resource_enabled(pdev, 0)) ++ return; ++ ++ base = pci_ioremap_bar(pdev, 0); ++ if (base == NULL) ++ return; ++ ++ cap_length = readb(base); ++ op_reg_base = base + cap_length; ++ ++ val = readl(op_reg_base + EHCI_INSNREG01); ++ dev_printk(KERN_INFO, &pdev->dev, "INSNREG01 is 0x%08x\n", val); ++ ++ val = EHCI_INSNREG01_THRESH; ++ ++ writel(val, op_reg_base + EHCI_INSNREG01); ++ ++ val = readl(op_reg_base + EHCI_INSNREG01); ++ dev_printk(KERN_INFO, &pdev->dev, "INSNREG01 is 0x%08x\n", val); ++ ++ iounmap(base); ++ ++} ++EXPORT_SYMBOL_GPL(usb_set_cln_bulk_thresh); ++ + #define PCI_DEVICE_ID_INTEL_LYNX_POINT_XHCI 0x8C31 + #define PCI_DEVICE_ID_INTEL_LYNX_POINT_LP_XHCI 0x9C31 + +diff --git a/drivers/usb/host/pci-quirks.h b/drivers/usb/host/pci-quirks.h +index 7f69a39..3bca8f7 100644 +--- a/drivers/usb/host/pci-quirks.h ++++ b/drivers/usb/host/pci-quirks.h +@@ -9,6 +9,8 @@ void usb_amd_dev_put(void); + void usb_amd_quirk_pll_disable(void); + void usb_amd_quirk_pll_enable(void); + bool usb_is_intel_switchable_xhci(struct pci_dev *pdev); ++bool usb_is_intel_cln(struct pci_dev *pdev); ++void usb_set_cln_bulk_thresh(struct pci_dev *pdev); + void usb_enable_xhci_ports(struct pci_dev *xhci_pdev); + void usb_disable_xhci_ports(struct pci_dev *xhci_pdev); + #else +diff --git a/drivers/uwb/lc-rc.c b/drivers/uwb/lc-rc.c +index 4d688c7..3eca6ce 100644 +--- a/drivers/uwb/lc-rc.c ++++ b/drivers/uwb/lc-rc.c +@@ -40,9 +40,9 @@ + + #include "uwb-internal.h" + +-static int uwb_rc_index_match(struct device *dev, void *data) ++static int uwb_rc_index_match(struct device *dev, const void *data) + { +- int *index = data; ++ const int *index = data; + struct uwb_rc *rc = dev_get_drvdata(dev); + + if (rc->index == *index) +@@ -334,9 +334,9 @@ void uwb_rc_rm(struct uwb_rc *rc) + } + EXPORT_SYMBOL_GPL(uwb_rc_rm); + +-static int find_rc_try_get(struct device *dev, void *data) ++static int find_rc_try_get(struct device *dev, const void *data) + { +- struct uwb_rc *target_rc = data; ++ const struct uwb_rc *target_rc = data; + struct uwb_rc *rc = dev_get_drvdata(dev); + + if (rc == NULL) { +@@ -386,9 +386,9 @@ static inline struct uwb_rc *uwb_rc_get(struct uwb_rc *rc) + return rc; + } + +-static int find_rc_grandpa(struct device *dev, void *data) ++static int find_rc_grandpa(struct device *dev, const void *data) + { +- struct device *grandpa_dev = data; ++ const struct device *grandpa_dev = data; + struct uwb_rc *rc = dev_get_drvdata(dev); + + if (rc->uwb_dev.dev.parent->parent == grandpa_dev) { +@@ -419,7 +419,7 @@ struct uwb_rc *uwb_rc_get_by_grandpa(const struct device *grandpa_dev) + struct device *dev; + struct uwb_rc *rc = NULL; + +- dev = class_find_device(&uwb_rc_class, NULL, (void *)grandpa_dev, ++ dev = class_find_device(&uwb_rc_class, NULL, grandpa_dev, + find_rc_grandpa); + if (dev) + rc = dev_get_drvdata(dev); +@@ -432,9 +432,9 @@ EXPORT_SYMBOL_GPL(uwb_rc_get_by_grandpa); + * + * @returns the pointer to the radio controller, properly referenced + */ +-static int find_rc_dev(struct device *dev, void *data) ++static int find_rc_dev(struct device *dev, const void *data) + { +- struct uwb_dev_addr *addr = data; ++ const struct uwb_dev_addr *addr = data; + struct uwb_rc *rc = dev_get_drvdata(dev); + + if (rc == NULL) { +@@ -453,8 +453,7 @@ struct uwb_rc *uwb_rc_get_by_dev(const struct uwb_dev_addr *addr) + struct device *dev; + struct uwb_rc *rc = NULL; + +- dev = class_find_device(&uwb_rc_class, NULL, (void *)addr, +- find_rc_dev); ++ dev = class_find_device(&uwb_rc_class, NULL, addr, find_rc_dev); + if (dev) + rc = dev_get_drvdata(dev); + +diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h +index 20ca766..8265ccc 100644 +--- a/include/asm-generic/gpio.h ++++ b/include/asm-generic/gpio.h +@@ -65,6 +65,7 @@ struct device_node; + * @direction_output: configures signal "offset" as output, or returns error + * @set_debounce: optional hook for setting debounce time for specified gpio in + * interrupt triggered gpio chips ++ * @set_drive: optional hook for setting the drive signal for "offset" + * @set: assigns output value for signal "offset" + * @to_irq: optional hook supporting non-static gpio_to_irq() mappings; + * implementation may not sleep +@@ -113,6 +114,8 @@ struct gpio_chip { + unsigned offset, int value); + int (*set_debounce)(struct gpio_chip *chip, + unsigned offset, unsigned debounce); ++ int (*set_drive)(struct gpio_chip *chip, ++ unsigned offset, unsigned mode); + + void (*set)(struct gpio_chip *chip, + unsigned offset, int value); +@@ -172,6 +175,7 @@ extern int gpio_direction_input(unsigned gpio); + extern int gpio_direction_output(unsigned gpio, int value); + + extern int gpio_set_debounce(unsigned gpio, unsigned debounce); ++extern int gpio_set_drive(unsigned gpio, unsigned mode); + + extern int gpio_get_value_cansleep(unsigned gpio); + extern void gpio_set_value_cansleep(unsigned gpio, int value); +diff --git a/include/linux/device.h b/include/linux/device.h +index 43dcda9..13de5ee 100644 +--- a/include/linux/device.h ++++ b/include/linux/device.h +@@ -395,8 +395,8 @@ extern int class_for_each_device(struct class *class, struct device *start, + void *data, + int (*fn)(struct device *dev, void *data)); + extern struct device *class_find_device(struct class *class, +- struct device *start, void *data, +- int (*match)(struct device *, void *)); ++ struct device *start, const void *data, ++ int (*match)(struct device *, const void *)); + + struct class_attribute { + struct attribute attr; +diff --git a/include/linux/efi-bgrt.h b/include/linux/efi-bgrt.h +index 051b21f..165426b 100644 +--- a/include/linux/efi-bgrt.h ++++ b/include/linux/efi-bgrt.h +@@ -6,6 +6,7 @@ + #include <linux/acpi.h> + + void efi_bgrt_init(void); ++bool efi_bgrt_probe(void); + + /* The BGRT data itself; only valid if bgrt_image != NULL. */ + extern void *bgrt_image; +@@ -15,6 +16,7 @@ extern struct acpi_table_bgrt *bgrt_tab; + #else /* !CONFIG_ACPI_BGRT */ + + static inline void efi_bgrt_init(void) {} ++static inline bool efi_bgrt_probe(void) { return false; } + + #endif /* !CONFIG_ACPI_BGRT */ + +diff --git a/include/linux/gpio.h b/include/linux/gpio.h +index bfe6656..cadd9d2 100644 +--- a/include/linux/gpio.h ++++ b/include/linux/gpio.h +@@ -27,6 +27,11 @@ + #define GPIOF_EXPORT_DIR_FIXED (GPIOF_EXPORT) + #define GPIOF_EXPORT_DIR_CHANGEABLE (GPIOF_EXPORT | GPIOF_EXPORT_CHANGEABLE) + ++#define GPIOF_DRIVE_PULLUP (1 << 6) ++#define GPIOF_DRIVE_PULLDOWN (1 << 7) ++#define GPIOF_DRIVE_STRONG (1 << 8) ++#define GPIOF_DRIVE_HIZ (1 << 9) ++ + /** + * struct gpio - a structure describing a GPIO with configuration + * @gpio: the GPIO number +@@ -156,6 +161,11 @@ static inline int gpio_set_debounce(unsigned gpio, unsigned debounce) + return -ENOSYS; + } + ++static inline int gpio_set_drive(unsigned gpio, unsigned mode) ++{ ++ return -ENOSYS; ++} ++ + static inline int gpio_get_value(unsigned gpio) + { + /* GPIO can never have been requested or set as {in,out}put */ +diff --git a/include/linux/iio/common/st_sensors.h b/include/linux/iio/common/st_sensors.h +new file mode 100644 +index 0000000..337da33 +--- /dev/null ++++ b/include/linux/iio/common/st_sensors.h +@@ -0,0 +1,290 @@ ++/* ++ * STMicroelectronics sensors library driver ++ * ++ * Copyright 2012-2013 STMicroelectronics Inc. ++ * ++ * Denis Ciocca <denis.ciocca@st.com> ++ * ++ * Licensed under the GPL-2. ++ */ ++ ++#ifndef ST_SENSORS_H ++#define ST_SENSORS_H ++ ++#include <linux/i2c.h> ++#include <linux/spi/spi.h> ++#include <linux/irqreturn.h> ++#include <linux/iio/trigger.h> ++#include <linux/iio/events.h> ++ ++#define ST_SENSORS_TX_MAX_LENGTH 2 ++#define ST_SENSORS_RX_MAX_LENGTH 6 ++ ++#define ST_SENSORS_ODR_LIST_MAX 10 ++#define ST_SENSORS_FULLSCALE_AVL_MAX 10 ++ ++#define ST_SENSORS_NUMBER_ALL_CHANNELS 4 ++#define ST_SENSORS_NUMBER_DATA_CHANNELS 3 ++#define ST_SENSORS_ENABLE_ALL_AXIS 0x07 ++#define ST_SENSORS_BYTE_FOR_CHANNEL 2 ++#define ST_SENSORS_SCAN_X 0 ++#define ST_SENSORS_SCAN_Y 1 ++#define ST_SENSORS_SCAN_Z 2 ++#define ST_SENSORS_DEFAULT_12_REALBITS 12 ++#define ST_SENSORS_DEFAULT_16_REALBITS 16 ++#define ST_SENSORS_DEFAULT_POWER_ON_VALUE 0x01 ++#define ST_SENSORS_DEFAULT_POWER_OFF_VALUE 0x00 ++#define ST_SENSORS_DEFAULT_WAI_ADDRESS 0x0f ++#define ST_SENSORS_DEFAULT_AXIS_ADDR 0x20 ++#define ST_SENSORS_DEFAULT_AXIS_MASK 0x07 ++#define ST_SENSORS_DEFAULT_AXIS_N_BIT 3 ++ ++#define ST_SENSORS_MAX_NAME 17 ++#define ST_SENSORS_MAX_4WAI 7 ++ ++#define ST_SENSORS_LSM_CHANNELS(device_type, index, mod, endian, bits, addr) \ ++{ \ ++ .type = device_type, \ ++ .modified = 1, \ ++ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ ++ IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \ ++ .scan_index = index, \ ++ .channel = mod, \ ++ .channel2 = mod, \ ++ .address = addr, \ ++ .scan_type = { \ ++ .sign = 's', \ ++ .realbits = bits, \ ++ .shift = 16 - bits, \ ++ .storagebits = 16, \ ++ .endianness = endian, \ ++ }, \ ++ .event_mask = IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING), \ ++} ++ ++#define ST_SENSOR_DEV_ATTR_SAMP_FREQ() \ ++ IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO, \ ++ st_sensors_sysfs_get_sampling_frequency, \ ++ st_sensors_sysfs_set_sampling_frequency) ++ ++#define ST_SENSORS_DEV_ATTR_SAMP_FREQ_AVAIL() \ ++ IIO_DEV_ATTR_SAMP_FREQ_AVAIL( \ ++ st_sensors_sysfs_sampling_frequency_avail) ++ ++#define ST_SENSORS_DEV_ATTR_SCALE_AVAIL(name) \ ++ IIO_DEVICE_ATTR(name, S_IRUGO, \ ++ st_sensors_sysfs_scale_avail, NULL , 0); ++ ++struct st_sensor_odr_avl { ++ unsigned int hz; ++ u8 value; ++}; ++ ++struct st_sensor_odr { ++ u8 addr; ++ u8 mask; ++ struct st_sensor_odr_avl odr_avl[ST_SENSORS_ODR_LIST_MAX]; ++}; ++ ++struct st_sensor_power { ++ u8 addr; ++ u8 mask; ++ u8 value_off; ++ u8 value_on; ++}; ++ ++struct st_sensor_axis { ++ u8 addr; ++ u8 mask; ++}; ++ ++struct st_sensor_fullscale_avl { ++ unsigned int num; ++ u8 value; ++ unsigned int gain; ++ unsigned int gain2; ++}; ++ ++struct st_sensor_fullscale { ++ u8 addr; ++ u8 mask; ++ struct st_sensor_fullscale_avl fs_avl[ST_SENSORS_FULLSCALE_AVL_MAX]; ++}; ++ ++/** ++ * struct st_sensor_bdu - ST sensor device block data update ++ * @addr: address of the register. ++ * @mask: mask to write the block data update flag. ++ */ ++struct st_sensor_bdu { ++ u8 addr; ++ u8 mask; ++}; ++ ++/** ++ * struct st_sensor_data_ready_irq - ST sensor device data-ready interrupt ++ * @addr: address of the register. ++ * @mask: mask to write the on/off value. ++ * struct ig1 - represents the Interrupt Generator 1 of sensors. ++ * @en_addr: address of the enable ig1 register. ++ * @en_mask: mask to write the on/off value for enable. ++ */ ++struct st_sensor_data_ready_irq { ++ u8 addr; ++ u8 mask; ++ struct { ++ u8 en_addr; ++ u8 en_mask; ++ } ig1; ++}; ++ ++/** ++ * struct st_sensor_transfer_buffer - ST sensor device I/O buffer ++ * @buf_lock: Mutex to protect rx and tx buffers. ++ * @tx_buf: Buffer used by SPI transfer function to send data to the sensors. ++ * This buffer is used to avoid DMA not-aligned issue. ++ * @rx_buf: Buffer used by SPI transfer to receive data from sensors. ++ * This buffer is used to avoid DMA not-aligned issue. ++ */ ++struct st_sensor_transfer_buffer { ++ struct mutex buf_lock; ++ u8 rx_buf[ST_SENSORS_RX_MAX_LENGTH]; ++ u8 tx_buf[ST_SENSORS_TX_MAX_LENGTH] ____cacheline_aligned; ++}; ++ ++/** ++ * struct st_sensor_transfer_function - ST sensor device I/O function ++ * @read_byte: Function used to read one byte. ++ * @write_byte: Function used to write one byte. ++ * @read_multiple_byte: Function used to read multiple byte. ++ */ ++struct st_sensor_transfer_function { ++ int (*read_byte) (struct st_sensor_transfer_buffer *tb, ++ struct device *dev, u8 reg_addr, u8 *res_byte); ++ int (*write_byte) (struct st_sensor_transfer_buffer *tb, ++ struct device *dev, u8 reg_addr, u8 data); ++ int (*read_multiple_byte) (struct st_sensor_transfer_buffer *tb, ++ struct device *dev, u8 reg_addr, int len, u8 *data, ++ bool multiread_bit); ++}; ++ ++/** ++ * struct st_sensors - ST sensors list ++ * @wai: Contents of WhoAmI register. ++ * @sensors_supported: List of supported sensors by struct itself. ++ * @ch: IIO channels for the sensor. ++ * @odr: Output data rate register and ODR list available. ++ * @pw: Power register of the sensor. ++ * @enable_axis: Enable one or more axis of the sensor. ++ * @fs: Full scale register and full scale list available. ++ * @bdu: Block data update register. ++ * @drdy_irq: Data ready register of the sensor. ++ * @multi_read_bit: Use or not particular bit for [I2C/SPI] multi-read. ++ * @bootime: samples to discard when sensor passing from power-down to power-up. ++ */ ++struct st_sensors { ++ u8 wai; ++ char sensors_supported[ST_SENSORS_MAX_4WAI][ST_SENSORS_MAX_NAME]; ++ struct iio_chan_spec *ch; ++ struct st_sensor_odr odr; ++ struct st_sensor_power pw; ++ struct st_sensor_axis enable_axis; ++ struct st_sensor_fullscale fs; ++ struct st_sensor_bdu bdu; ++ struct st_sensor_data_ready_irq drdy_irq; ++ bool multi_read_bit; ++ unsigned int bootime; ++}; ++ ++/** ++ * struct st_sensor_data - ST sensor device status ++ * @dev: Pointer to instance of struct device (I2C or SPI). ++ * @trig: The trigger in use by the core driver. ++ * @sensor: Pointer to the current sensor struct in use. ++ * @current_fullscale: Maximum range of measure by the sensor. ++ * @enabled: Status of the sensor (false->off, true->on). ++ * @multiread_bit: Use or not particular bit for [I2C/SPI] multiread. ++ * @buffer_data: Data used by buffer part. ++ * @odr: Output data rate of the sensor [Hz]. ++ * @get_irq_data_ready: Function to get the IRQ used for data ready signal. ++ * @tf: Transfer function structure used by I/O operations. ++ * @tb: Transfer buffers and mutex used by I/O operations. ++ */ ++struct st_sensor_data { ++ struct device *dev; ++ struct iio_trigger *trig; ++ struct st_sensors *sensor; ++ struct st_sensor_fullscale_avl *current_fullscale; ++ ++ bool enabled; ++ bool int_thresh; ++ bool multiread_bit; ++ ++ char *buffer_data; ++ ++ unsigned int odr; ++ ++ unsigned int (*get_irq_data_ready) (struct iio_dev *indio_dev); ++ ++ const struct st_sensor_transfer_function *tf; ++ struct st_sensor_transfer_buffer tb; ++}; ++ ++#ifdef CONFIG_IIO_BUFFER ++irqreturn_t st_sensors_trigger_handler(int irq, void *p); ++ ++int st_sensors_get_buffer_element(struct iio_dev *indio_dev, u8 *buf); ++#endif ++ ++#ifdef CONFIG_IIO_TRIGGER ++int st_sensors_allocate_trigger(struct iio_dev *indio_dev, ++ const struct iio_trigger_ops *trigger_ops); ++ ++void st_sensors_deallocate_trigger(struct iio_dev *indio_dev); ++ ++#else ++static inline int st_sensors_allocate_trigger(struct iio_dev *indio_dev, ++ const struct iio_trigger_ops *trigger_ops) ++{ ++ return 0; ++} ++static inline void st_sensors_deallocate_trigger(struct iio_dev *indio_dev) ++{ ++ return; ++} ++#endif ++ ++int st_sensors_init_sensor(struct iio_dev *indio_dev); ++ ++int st_sensors_write_data_with_mask(struct iio_dev *indio_dev, ++ u8 reg_addr, u8 mask, u8 data); ++ ++int st_sensors_set_enable(struct iio_dev *indio_dev, bool enable); ++ ++int st_sensors_set_axis_enable(struct iio_dev *indio_dev, u8 axis_enable); ++ ++int st_sensors_set_odr(struct iio_dev *indio_dev, unsigned int odr); ++ ++int st_sensors_set_dataready_irq(struct iio_dev *indio_dev, bool enable); ++ ++int st_sensors_set_fullscale_by_gain(struct iio_dev *indio_dev, int scale); ++ ++int st_sensors_read_info_raw(struct iio_dev *indio_dev, ++ struct iio_chan_spec const *ch, int *val); ++ ++int st_sensors_check_device_support(struct iio_dev *indio_dev, ++ int num_sensors_list, const struct st_sensors *sensors); ++ ++ssize_t st_sensors_sysfs_get_sampling_frequency(struct device *dev, ++ struct device_attribute *attr, char *buf); ++ ++ssize_t st_sensors_sysfs_set_sampling_frequency(struct device *dev, ++ struct device_attribute *attr, const char *buf, size_t size); ++ ++ssize_t st_sensors_sysfs_sampling_frequency_avail(struct device *dev, ++ struct device_attribute *attr, char *buf); ++ ++ssize_t st_sensors_sysfs_scale_avail(struct device *dev, ++ struct device_attribute *attr, char *buf); ++ ++#endif /* ST_SENSORS_H */ +diff --git a/include/linux/iio/common/st_sensors_i2c.h b/include/linux/iio/common/st_sensors_i2c.h +new file mode 100644 +index 0000000..67d8453 +--- /dev/null ++++ b/include/linux/iio/common/st_sensors_i2c.h +@@ -0,0 +1,20 @@ ++/* ++ * STMicroelectronics sensors i2c library driver ++ * ++ * Copyright 2012-2013 STMicroelectronics Inc. ++ * ++ * Denis Ciocca <denis.ciocca@st.com> ++ * ++ * Licensed under the GPL-2. ++ */ ++ ++#ifndef ST_SENSORS_I2C_H ++#define ST_SENSORS_I2C_H ++ ++#include <linux/i2c.h> ++#include <linux/iio/common/st_sensors.h> ++ ++void st_sensors_i2c_configure(struct iio_dev *indio_dev, ++ struct i2c_client *client, struct st_sensor_data *sdata); ++ ++#endif /* ST_SENSORS_I2C_H */ +diff --git a/include/linux/iio/common/st_sensors_spi.h b/include/linux/iio/common/st_sensors_spi.h +new file mode 100644 +index 0000000..d964a35 +--- /dev/null ++++ b/include/linux/iio/common/st_sensors_spi.h +@@ -0,0 +1,20 @@ ++/* ++ * STMicroelectronics sensors spi library driver ++ * ++ * Copyright 2012-2013 STMicroelectronics Inc. ++ * ++ * Denis Ciocca <denis.ciocca@st.com> ++ * ++ * Licensed under the GPL-2. ++ */ ++ ++#ifndef ST_SENSORS_SPI_H ++#define ST_SENSORS_SPI_H ++ ++#include <linux/spi/spi.h> ++#include <linux/iio/common/st_sensors.h> ++ ++void st_sensors_spi_configure(struct iio_dev *indio_dev, ++ struct spi_device *spi, struct st_sensor_data *sdata); ++ ++#endif /* ST_SENSORS_SPI_H */ +diff --git a/include/linux/intel_cln_sb.h b/include/linux/intel_cln_sb.h +new file mode 100644 +index 0000000..6092fc0 +--- /dev/null ++++ b/include/linux/intel_cln_sb.h +@@ -0,0 +1,90 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton side-band driver ++ * ++ * Thread-safe sideband read/write routine. ++ * ++ * Author : Bryan O'Donoghue <bryan.odonoghue@linux.intel.com> 2012 ++ */ ++ ++#ifndef __INTEL_CLN_SB_H__ ++#define __INTEL_CLN_SB_H__ ++ ++#include <linux/types.h> ++ ++typedef enum { ++ SB_ID_HUNIT = 0x03, ++ SB_ID_THERMAL = 0x04, ++ SB_ID_ESRAM = 0x05, ++ SB_ID_SOC = 0x31, ++}cln_sb_id; ++ ++/** ++ * intel_cln_sb_read_reg ++ * ++ * @param cln_sb_id: Sideband identifier ++ * @param command: Command to send to destination identifier ++ * @param reg: Target register w/r to cln_sb_id ++ * @return nothing ++ * ++ * Utility function to allow thread-safe read of side-band ++ * command - can be different read op-code types - which is why we don't ++ * hard-code this value directly into msg ++ */ ++void intel_cln_sb_read_reg(cln_sb_id id, u8 cmd, u8 reg, u32 *data, u8 lock); ++ ++/** ++ * intel_cln_sb_write_reg ++ * ++ * @param cln_sb_id: Sideband identifier ++ * @param command: Command to send to destination identifier ++ * @param reg: Target register w/r to cln_sb_id ++ * @return nothing ++ * ++ * Utility function to allow thread-safe write of side-band ++ */ ++void intel_cln_sb_write_reg(cln_sb_id id, u8 cmd, u8 reg, u32 data, u8 lock); ++ ++/** ++ * intel_cln_sb_runfn_lock ++ * ++ * @param fn: Callback function - which requires side-band spinlock and !irq ++ * @param arg: Callback argument ++ * @return 0 on success < 0 on failure ++ * ++ * Runs the given function pointer inside of a call to the local spinlock using ++ * spin_lock_irqsave/spin_unlock_irqrestore. Needed for the eSRAMv1 driver to ++ * guarantee atomicity, but, available to any other user of sideband provided ++ * rules are respected. ++ * Rules: ++ * fn may not sleep ++ * fn may not change the state of irqs ++ */ ++int intel_cln_sb_runfn_lock(int (*fn)( void * arg ), void * arg); ++ ++/** ++ * intel_cln_sb_initialized ++ * ++ * False if sideband running on non-Clanton system ++ */ ++int intel_cln_sb_initialized(void); ++ ++#endif /* __INTEL_CLN_SB_H__ */ +diff --git a/include/linux/intel_mid_dma.h b/include/linux/intel_mid_dma.h +index 10496bd..fdb8085 100644 +--- a/include/linux/intel_mid_dma.h ++++ b/include/linux/intel_mid_dma.h +@@ -26,8 +26,10 @@ + #define __INTEL_MID_DMA_H__ + + #include <linux/dmaengine.h> ++#include <linux/interrupt.h> + + #define DMA_PREP_CIRCULAR_LIST (1 << 10) ++#define MAX_CHAN 4 + + /*DMA mode configurations*/ + enum intel_mid_dma_mode { +@@ -73,4 +75,163 @@ struct intel_mid_dma_slave { + struct dma_slave_config dma_slave; + }; + ++/** ++ * struct intel_mid_dma_chan - internal mid representation of a DMA channel ++ * @chan: dma_chan strcture represetation for mid chan ++ * @ch_regs: MMIO register space pointer to channel register ++ * @dma_base: MMIO register space DMA engine base pointer ++ * @ch_id: DMA channel id ++ * @lock: channel spinlock ++ * @active_list: current active descriptors ++ * @queue: current queued up descriptors ++ * @free_list: current free descriptors ++ * @slave: dma slave struture ++ * @descs_allocated: total number of decsiptors allocated ++ * @dma: dma device struture pointer ++ * @busy: bool representing if ch is busy (active txn) or not ++ * @in_use: bool representing if ch is in use or not ++ * @raw_tfr: raw trf interrupt received ++ * @raw_block: raw block interrupt received ++ */ ++struct intel_mid_dma_chan { ++ struct dma_chan chan; ++ void __iomem *ch_regs; ++ void __iomem *dma_base; ++ int ch_id; ++ spinlock_t lock; ++ struct list_head active_list; ++ struct list_head queue; ++ struct list_head free_list; ++ unsigned int descs_allocated; ++ struct middma_device *dma; ++ bool busy; ++ bool in_use; ++ u32 raw_tfr; ++ u32 raw_block; ++ struct intel_mid_dma_slave *mid_slave; ++}; ++ ++struct intel_mid_dma_desc { ++ void __iomem *block; /*ch ptr*/ ++ struct list_head desc_node; ++ struct dma_async_tx_descriptor txd; ++ size_t len; ++ dma_addr_t sar; ++ dma_addr_t dar; ++ u32 cfg_hi; ++ u32 cfg_lo; ++ u32 ctl_lo; ++ u32 ctl_hi; ++ struct pci_pool *lli_pool; ++ struct intel_mid_dma_lli *lli; ++ dma_addr_t lli_phys; ++ unsigned int lli_length; ++ unsigned int current_lli; ++ dma_addr_t next; ++ enum dma_transfer_direction dirn; ++ enum dma_status status; ++ enum dma_slave_buswidth width; /*width of DMA txn*/ ++ enum intel_mid_dma_mode cfg_mode; /*mode configuration*/ ++ ++}; ++ ++ ++enum intel_mid_dma_state { ++ RUNNING = 0, ++ SUSPENDED, ++}; ++/** ++ * struct middma_device - internal representation of a DMA device ++ * @pdev: PCI device ++ * @dma_base: MMIO register space pointer of DMA ++ * @dma_pool: for allocating DMA descriptors ++ * @common: embedded struct dma_device ++ * @tasklet: dma tasklet for processing interrupts ++ * @ch: per channel data ++ * @pci_id: DMA device PCI ID ++ * @intr_mask: Interrupt mask to be used ++ * @mask_reg: MMIO register for periphral mask ++ * @chan_base: Base ch index (read from driver data) ++ * @max_chan: max number of chs supported (from drv_data) ++ * @block_size: Block size of DMA transfer supported (from drv_data) ++ * @pimr_mask: MMIO register addr for periphral interrupt (from drv_data) ++ * @state: dma PM device state ++ */ ++struct middma_device { ++ struct pci_dev *pdev; ++ void __iomem *dma_base; ++ struct pci_pool *dma_pool; ++ struct dma_device common; ++ struct tasklet_struct tasklet; ++ struct intel_mid_dma_chan ch[MAX_CHAN]; ++ unsigned int pci_id; ++ unsigned int intr_mask; ++ void __iomem *mask_reg; ++ int chan_base; ++ int max_chan; ++ int block_size; ++ bool ispci_fn; ++ unsigned int pimr_mask; ++ enum intel_mid_dma_state state; ++}; ++ ++/** ++ * intel_mid_dma_interrupt - DMA ISR ++ * @irq: IRQ where interrupt occurred ++ * @data: ISR cllback data (the controller structure) ++ * ++ * See if this is our interrupt if so then schedule the tasklet ++ * otherwise ignore ++ */ ++irqreturn_t intel_mid_dma_interrupt(int irq, void *data); ++ ++/** ++ * middma_shutdown - Shutdown the DMA controller ++ * @pdev: Controller PCI device structure ++ * ++ * Called by remove ++ * Unregister DMa controller, clear all structures and free interrupt ++ */ ++void intel_mid_dma_shutdown(struct pci_dev *pdev, struct middma_device *device); ++ ++/** ++ * intel_mid_dma_probe - PCI Probe ++ * @pdev: Controller PCI device structure ++ * @id: pci device id structure ++ * ++ * Initialize the PCI device, map BARs, query driver data. ++ * Call intel_setup_dma to complete contoller and chan initilzation ++ */ ++int intel_cln_dma_probe(struct pci_dev *pdev, ++ struct middma_device *device); ++/** ++ * intel_mid_dma_remove - PCI remove ++ * @pdev: Controller PCI device structure ++ * ++ * Free up all resources and data ++ * Call shutdown_dma to complete contoller and chan cleanup ++ */ ++void intel_cln_dma_remove(struct pci_dev *pdev, struct middma_device *device); ++ ++/* Power Management */ ++/* ++* dma_suspend - PCI suspend function ++* ++* @pci: PCI device structure ++* @state: PM message ++* ++* This function is called by OS when a power event occurs ++*/ ++int intel_cln_dma_suspend(struct middma_device *device); ++ ++/** ++* intel_cln_dma_resume - PCI resume function ++* ++* @pci: PCI device structure ++* ++* This function is called by OS when a power event occurs ++*/ ++int intel_cln_dma_resume(struct middma_device *device); ++ ++ + #endif /*__INTEL_MID_DMA_H__*/ +diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h +index 0eb6579..060fce2 100644 +--- a/include/linux/pci_ids.h ++++ b/include/linux/pci_ids.h +@@ -2512,6 +2512,7 @@ + #define PCI_DEVICE_ID_INTEL_MFD_EMMC0 0x0823 + #define PCI_DEVICE_ID_INTEL_MFD_EMMC1 0x0824 + #define PCI_DEVICE_ID_INTEL_MRST_SD2 0x084F ++#define PCI_DEVICE_ID_INTEL_CLANTON_ILB 0x095E + #define PCI_DEVICE_ID_INTEL_I960 0x0960 + #define PCI_DEVICE_ID_INTEL_I960RM 0x0962 + #define PCI_DEVICE_ID_INTEL_CENTERTON_ILB 0x0c60 +@@ -2534,6 +2535,7 @@ + #define PCI_DEVICE_ID_INTEL_82840_HB 0x1a21 + #define PCI_DEVICE_ID_INTEL_82845_HB 0x1a30 + #define PCI_DEVICE_ID_INTEL_IOAT 0x1a38 ++#define PCI_DEVICE_ID_INTEL_CLN_SD 0x08A7 + #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN 0x1c41 + #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX 0x1c5f + #define PCI_DEVICE_ID_INTEL_PATSBURG_LPC_0 0x1d40 +diff --git a/include/linux/platform_data/ad7298.h b/include/linux/platform_data/ad7298.h +index fbf8adf..721ed6f 100644 +--- a/include/linux/platform_data/ad7298.h ++++ b/include/linux/platform_data/ad7298.h +@@ -9,12 +9,17 @@ + #ifndef __LINUX_PLATFORM_DATA_AD7298_H__ + #define __LINUX_PLATFORM_DATA_AD7298_H__ + ++#define AD7298_MAX_CHAN 8 ++ + /** + * struct ad7298_platform_data - Platform data for the ad7298 ADC driver + * @ext_ref: Whether to use an external reference voltage. ++ * @ext_vin_max: External input voltage range for each voltage input channel ++ * (set to non-zero if platform uses external voltage dividers) + **/ + struct ad7298_platform_data { + bool ext_ref; ++ u16 ext_vin_max[AD7298_MAX_CHAN]; + }; + + #endif /* IIO_ADC_AD7298_H_ */ +diff --git a/include/linux/platform_data/clanton.h b/include/linux/platform_data/clanton.h +new file mode 100644 +index 0000000..95b5e6d +--- /dev/null ++++ b/include/linux/platform_data/clanton.h +@@ -0,0 +1,58 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++/* ++ * Intel Clanton platform data definition ++ */ ++ ++#ifndef _PDATA_CLANTON_H ++#define _PDATA_CLANTON_H ++ ++typedef enum { ++ CLANTON_PLAT_UNDEFINED = 0, ++ CLANTON_EMULATION = 1, ++ CLANTON_PEAK = 2, ++ KIPS_BAY = 3, ++ CROSS_HILL = 4, ++ CLANTON_HILL = 5, ++ IZMIR = 6, ++}cln_plat_id_t; ++ ++typedef enum { ++ PLAT_DATA_ID = 1, ++ PLAT_DATA_SN = 2, ++ PLAT_DATA_MAC0 = 3, ++ PLAT_DATA_MAC1 = 4, ++}plat_dataid_t; ++ ++ ++#ifdef CONFIG_INTEL_QUARK_X1000_SOC ++extern cln_plat_id_t intel_cln_plat_get_id(void); ++extern int intel_cln_plat_get_mac(plat_dataid_t id, char * mac); ++#else ++static inline cln_plat_id_t intel_cln_plat_get_id(void) ++{ ++ return CLANTON_PLAT_UNDEFINED; ++} ++static int intel_cln_plat_get_mac(plat_dataid_t id, char * mac) ++{ ++ return -ENODEV; ++} ++#endif ++#endif /* _PDATA_CLANTON_H */ +diff --git a/include/linux/platform_data/lis331dlh_intel_cln.h b/include/linux/platform_data/lis331dlh_intel_cln.h +new file mode 100644 +index 0000000..00e3006 +--- /dev/null ++++ b/include/linux/platform_data/lis331dlh_intel_cln.h +@@ -0,0 +1,36 @@ ++/* ++ * Platform data for Intel Clanton Hill platform accelerometer driver ++ * ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ * ++ */ ++ ++#ifndef __LINUX_PLATFORM_DATA_LIS331DLH_INTEL_CLN_H__ ++#define __LINUX_PLATFORM_DATA_LIS331DLH_INTEL_CLN_H__ ++ ++/** ++ * struct lis331dlh_intel_cln_platform_data - Platform data for the ST Micro ++ * accelerometer driver ++ * @irq1_pin: GPIO pin number for the threshold interrupt(INT1). ++ **/ ++struct lis331dlh_intel_cln_platform_data { ++ int irq1_pin; ++}; ++ ++#endif /* LINUX_PLATFORM_DATA_LIS331DLH_INTEL_CLN_H_ */ +diff --git a/include/linux/platform_data/st_accel_i2c.h b/include/linux/platform_data/st_accel_i2c.h +new file mode 100644 +index 0000000..1dc3d93 +--- /dev/null ++++ b/include/linux/platform_data/st_accel_i2c.h +@@ -0,0 +1,32 @@ ++/* ++ * Copyright(c) 2013 Intel Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ * Contact Information: ++ * Intel Corporation ++ */ ++ ++#ifndef __LINUX_PLATFORM_DATA_ST_ACCEL_H__ ++#define __LINUX_PLATFORM_DATA_ST_ACCEL_H__ ++ ++/** ++ * struct st_accel_i2c_platform_data - Platform data for the ST Micro accelerometer driver ++ * @irq2: IRQ number for the second INT pin. ++ **/ ++struct st_accel_i2c_platform_data { ++ int irq2; ++}; ++ ++#endif /* LINUX_PLATFORM_DATA_ST_ACCEL_H_ */ +diff --git a/include/linux/power_supply.h b/include/linux/power_supply.h +index 1f0ab90..86ecaa6 100644 +--- a/include/linux/power_supply.h ++++ b/include/linux/power_supply.h +@@ -224,7 +224,7 @@ struct power_supply_info { + int use_for_apm; + }; + +-extern struct power_supply *power_supply_get_by_name(char *name); ++extern struct power_supply *power_supply_get_by_name(const char *name); + extern void power_supply_changed(struct power_supply *psy); + extern int power_supply_am_i_supplied(struct power_supply *psy); + extern int power_supply_set_battery_charged(struct power_supply *psy); +diff --git a/include/linux/pwm.h b/include/linux/pwm.h +index 6d661f3..6842d11 100644 +--- a/include/linux/pwm.h ++++ b/include/linux/pwm.h +@@ -76,6 +76,7 @@ enum pwm_polarity { + enum { + PWMF_REQUESTED = 1 << 0, + PWMF_ENABLED = 1 << 1, ++ PWMF_EXPORTED = 1 << 2, + }; + + struct pwm_device { +@@ -86,7 +87,9 @@ struct pwm_device { + struct pwm_chip *chip; + void *chip_data; + +- unsigned int period; /* in nanoseconds */ ++ unsigned int period; /* in nanoseconds */ ++ unsigned int duty_cycle; /* in nanoseconds */ ++ enum pwm_polarity polarity; + }; + + static inline void pwm_set_period(struct pwm_device *pwm, unsigned int period) +@@ -100,6 +103,17 @@ static inline unsigned int pwm_get_period(struct pwm_device *pwm) + return pwm ? pwm->period : 0; + } + ++static inline void pwm_set_duty_cycle(struct pwm_device *pwm, unsigned int duty) ++{ ++ if (pwm) ++ pwm->duty_cycle = duty; ++} ++ ++static inline unsigned int pwm_get_duty_cycle(struct pwm_device *pwm) ++{ ++ return pwm ? pwm->duty_cycle : 0; ++} ++ + /* + * pwm_set_polarity - configure the polarity of a PWM signal + */ +@@ -252,4 +266,17 @@ static inline void pwm_add_table(struct pwm_lookup *table, size_t num) + } + #endif + ++#ifdef CONFIG_PWM_SYSFS ++void pwmchip_sysfs_export(struct pwm_chip *chip); ++void pwmchip_sysfs_unexport(struct pwm_chip *chip); ++#else ++static inline void pwmchip_sysfs_export(struct pwm_chip *chip) ++{ ++} ++ ++static inline void pwmchip_sysfs_unexport(struct pwm_chip *chip) ++{ ++} ++#endif /* CONFIG_PWM_SYSFS */ ++ + #endif /* __LINUX_PWM_H */ +diff --git a/include/linux/pxa2xx_ssp.h b/include/linux/pxa2xx_ssp.h +index f366320..9810c71 100644 +--- a/include/linux/pxa2xx_ssp.h ++++ b/include/linux/pxa2xx_ssp.h +@@ -104,6 +104,28 @@ + #define SSCR1_TxTresh(x) (((x) - 1) << 6) /* level [1..4] */ + #define SSCR1_RFT (0x00000c00) /* Receive FIFO Threshold (mask) */ + #define SSCR1_RxTresh(x) (((x) - 1) << 10) /* level [1..4] */ ++ ++/* CE5X00 SSCR0 bit definition */ ++#define CE5X00_SSCR0_DSS ((1<<5)-1) /* Data Size Select (mask) */ ++#define CE5X00_SSCR0_DataSize(x) ((x) - 1) /* Data Size Select [4..32] */ ++#define CE5X00_SSCR0_FRF (((1<<2)-1) << 5) /* FRame Format (mask) */ ++#define CE5X00_SSCR0_Motorola (0x0 << 5) /* Motorola's Serial Peripheral Interface (SPI) */ ++#define CE5X00_SSCR0_TI (0x1 << 5) /* Texas Instruments' Synchronous Serial Protocol (SSP) */ ++#define CE5X00_SSCR0_National (0x2 << 5) /* National Microwire */ ++ ++#define RX_THRESH_CE5X00_DFLT 16 ++#define TX_THRESH_CE5X00_DFLT 16 ++ ++#define CE5X00_SSSR_TFL_MASK (0x1F << 8) /* Transmit FIFO Level mask */ ++#define CE5X00_SSSR_RFL_MASK (0x1F << 13) /* Receive FIFO Level mask */ ++ ++#define CE5X00_SSCR1_TFT (((1<<5)-1) << 6) /* Transmit FIFO Threshold (mask) */ ++#define CE5X00_SSCR1_TxTresh(x) (((x) - 1) << 6) /* level [1..32] */ ++#define CE5X00_SSCR1_RFT (((1<<5)-1) << 11) /* Receive FIFO Threshold (mask) */ ++#define CE5X00_SSCR1_RxTresh(x) (((x) - 1) << 11) /* level [1..32] */ ++#define CE5X00_SSCR1_STRF (1 << 17) /* Select FIFO or EFWR */ ++#define CE5X00_SSCR1_EFWR (1 << 16) /* Enable FIFO Write/Read */ ++ + #endif + + /* extra bits in PXA255, PXA26x and PXA27x SSP ports */ +@@ -164,6 +186,7 @@ enum pxa_ssp_type { + PXA168_SSP, + PXA910_SSP, + CE4100_SSP, ++ CE5X00_SSP, + }; + + struct ssp_device { +@@ -181,6 +204,7 @@ struct ssp_device { + int irq; + int drcmr_rx; + int drcmr_tx; ++ struct pci_dev *pcidev; + }; + + /** +@@ -208,4 +232,5 @@ static inline u32 pxa_ssp_read_reg(struct ssp_device *dev, u32 reg) + + struct ssp_device *pxa_ssp_request(int port, const char *label); + void pxa_ssp_free(struct ssp_device *); ++int pxa_msi_enabled(void); + #endif +diff --git a/include/linux/rtc.h b/include/linux/rtc.h +index 9531845c..445fe6e 100644 +--- a/include/linux/rtc.h ++++ b/include/linux/rtc.h +@@ -148,7 +148,7 @@ extern int rtc_initialize_alarm(struct rtc_device *rtc, + extern void rtc_update_irq(struct rtc_device *rtc, + unsigned long num, unsigned long events); + +-extern struct rtc_device *rtc_class_open(char *name); ++extern struct rtc_device *rtc_class_open(const char *name); + extern void rtc_class_close(struct rtc_device *rtc); + + extern int rtc_irq_register(struct rtc_device *rtc, +diff --git a/include/linux/spi/pxa2xx_spi.h b/include/linux/spi/pxa2xx_spi.h +index c73d144..acac9ae 100644 +--- a/include/linux/spi/pxa2xx_spi.h ++++ b/include/linux/spi/pxa2xx_spi.h +@@ -130,23 +130,12 @@ static inline void pxa_free_dma(int dma_ch) + { + } + +-/* +- * The CE4100 does not have the clk framework implemented and SPI clock can +- * not be switched on/off or the divider changed. +- */ +-static inline void clk_disable(struct clk *clk) +-{ +-} +- +-static inline int clk_enable(struct clk *clk) +-{ +- return 0; +-} +- ++#ifndef CONFIG_GEN3_SPI + static inline unsigned long clk_get_rate(struct clk *clk) + { + return 3686400; + } ++#endif + + #endif + #endif +diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h +index f629189..307d218 100644 +--- a/include/linux/spi/spi.h ++++ b/include/linux/spi/spi.h +@@ -80,6 +80,8 @@ struct spi_device { + #define SPI_MODE_2 (SPI_CPOL|0) + #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) + #define SPI_CS_HIGH 0x04 /* chipselect active high? */ ++#define SPI_MODE_QUAD_IO 0x05 /* Quad IO mode using 4 wire */ ++#define SPI_MODE_DUAL_IO 0x06 /* Dual IO mode using 2 wire */ + #define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */ + #define SPI_3WIRE 0x10 /* SI/SO signals shared */ + #define SPI_LOOP 0x20 /* loopback mode */ +diff --git a/init/do_mounts.c b/init/do_mounts.c +index 1d1b634..a2b49f2 100644 +--- a/init/do_mounts.c ++++ b/init/do_mounts.c +@@ -81,9 +81,9 @@ struct uuidcmp { + * + * Returns 1 if the device matches, and 0 otherwise. + */ +-static int match_dev_by_uuid(struct device *dev, void *data) ++static int match_dev_by_uuid(struct device *dev, const void *data) + { +- struct uuidcmp *cmp = data; ++ const struct uuidcmp *cmp = data; + struct hd_struct *part = dev_to_part(dev); + + if (!part->info) +diff --git a/kernel/power/suspend_test.c b/kernel/power/suspend_test.c +index 25596e4..9b2a1d5 100644 +--- a/kernel/power/suspend_test.c ++++ b/kernel/power/suspend_test.c +@@ -112,7 +112,7 @@ static void __init test_wakealarm(struct rtc_device *rtc, suspend_state_t state) + rtc_set_alarm(rtc, &alm); + } + +-static int __init has_wakealarm(struct device *dev, void *name_ptr) ++static int __init has_wakealarm(struct device *dev, const void *data) + { + struct rtc_device *candidate = to_rtc_device(dev); + +@@ -121,7 +121,6 @@ static int __init has_wakealarm(struct device *dev, void *name_ptr) + if (!device_may_wakeup(candidate->dev.parent)) + return 0; + +- *(const char **)name_ptr = dev_name(dev); + return 1; + } + +@@ -159,8 +158,8 @@ static int __init test_suspend(void) + static char warn_no_rtc[] __initdata = + KERN_WARNING "PM: no wakealarm-capable RTC driver is ready\n"; + +- char *pony = NULL; + struct rtc_device *rtc = NULL; ++ struct device *dev; + + /* PM is initialized by now; is that state testable? */ + if (test_state == PM_SUSPEND_ON) +@@ -171,9 +170,9 @@ static int __init test_suspend(void) + } + + /* RTCs have initialized by now too ... can we use one? */ +- class_find_device(rtc_class, NULL, &pony, has_wakealarm); +- if (pony) +- rtc = rtc_class_open(pony); ++ dev = class_find_device(rtc_class, NULL, NULL, has_wakealarm); ++ if (dev) ++ rtc = rtc_class_open(dev_name(dev)); + if (!rtc) { + printk(warn_no_rtc); + goto done; +diff --git a/.meta/cfg/kernel-cache/bsp/clanton/clanton.cfg b/.meta/cfg/kernel-cache/bsp/clanton/clanton.cfg +new file mode 100644 +index 0000000..b4c8852 +--- /dev/null ++++ b/.meta/cfg/kernel-cache/bsp/clanton/clanton.cfg +@@ -0,0 +1,2938 @@ ++# ++# Automatically generated file; DO NOT EDIT. ++# Linux/i386 3.8.7 Kernel Configuration ++# ++# CONFIG_64BIT is not set ++CONFIG_X86_32=y ++CONFIG_X86=y ++CONFIG_INSTRUCTION_DECODER=y ++CONFIG_OUTPUT_FORMAT="elf32-i386" ++CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig" ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_HAVE_LATENCYTOP_SUPPORT=y ++CONFIG_MMU=y ++CONFIG_NEED_SG_DMA_LENGTH=y ++CONFIG_GENERIC_ISA_DMA=y ++CONFIG_GENERIC_BUG=y ++CONFIG_GENERIC_HWEIGHT=y ++CONFIG_GENERIC_GPIO=y ++CONFIG_ARCH_MAY_HAVE_PC_FDC=y ++CONFIG_RWSEM_XCHGADD_ALGORITHM=y ++CONFIG_GENERIC_CALIBRATE_DELAY=y ++CONFIG_ARCH_HAS_CPU_RELAX=y ++CONFIG_ARCH_HAS_DEFAULT_IDLE=y ++CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y ++CONFIG_ARCH_HAS_CPU_AUTOPROBE=y ++CONFIG_HAVE_SETUP_PER_CPU_AREA=y ++CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y ++CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y ++CONFIG_ARCH_HIBERNATION_POSSIBLE=y ++CONFIG_ARCH_SUSPEND_POSSIBLE=y ++# CONFIG_ZONE_DMA32 is not set ++# CONFIG_AUDIT_ARCH is not set ++CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y ++CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y ++CONFIG_X86_32_LAZY_GS=y ++CONFIG_ARCH_HWEIGHT_CFLAGS="-fcall-saved-ecx -fcall-saved-edx" ++CONFIG_ARCH_SUPPORTS_UPROBES=y ++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" ++CONFIG_HAVE_IRQ_WORK=y ++CONFIG_IRQ_WORK=y ++CONFIG_BUILDTIME_EXTABLE_SORT=y ++ ++# ++# General setup ++# ++CONFIG_EXPERIMENTAL=y ++CONFIG_BROKEN_ON_SMP=y ++CONFIG_INIT_ENV_ARG_LIMIT=32 ++CONFIG_CROSS_COMPILE="" ++CONFIG_LOCALVERSION="" ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_HAVE_KERNEL_GZIP=y ++CONFIG_HAVE_KERNEL_BZIP2=y ++CONFIG_HAVE_KERNEL_LZMA=y ++CONFIG_HAVE_KERNEL_XZ=y ++CONFIG_HAVE_KERNEL_LZO=y ++# CONFIG_KERNEL_GZIP is not set ++# CONFIG_KERNEL_BZIP2 is not set ++CONFIG_KERNEL_LZMA=y ++# CONFIG_KERNEL_XZ is not set ++# CONFIG_KERNEL_LZO is not set ++CONFIG_DEFAULT_HOSTNAME="(none)" ++# CONFIG_SWAP is not set ++CONFIG_SYSVIPC=y ++CONFIG_SYSVIPC_SYSCTL=y ++CONFIG_POSIX_MQUEUE=y ++CONFIG_POSIX_MQUEUE_SYSCTL=y ++# CONFIG_FHANDLE is not set ++# CONFIG_AUDIT is not set ++CONFIG_HAVE_GENERIC_HARDIRQS=y ++ ++# ++# IRQ subsystem ++# ++CONFIG_GENERIC_HARDIRQS=y ++CONFIG_GENERIC_IRQ_PROBE=y ++CONFIG_GENERIC_IRQ_SHOW=y ++CONFIG_GENERIC_IRQ_CHIP=y ++CONFIG_IRQ_DOMAIN=y ++# CONFIG_IRQ_DOMAIN_DEBUG is not set ++CONFIG_IRQ_FORCED_THREADING=y ++CONFIG_SPARSE_IRQ=y ++CONFIG_CLOCKSOURCE_WATCHDOG=y ++CONFIG_KTIME_SCALAR=y ++CONFIG_GENERIC_CLOCKEVENTS=y ++CONFIG_GENERIC_CLOCKEVENTS_BUILD=y ++CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y ++CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y ++CONFIG_GENERIC_CMOS_UPDATE=y ++ ++# ++# Timers subsystem ++# ++CONFIG_TICK_ONESHOT=y ++CONFIG_NO_HZ=y ++CONFIG_HIGH_RES_TIMERS=y ++ ++# ++# CPU/Task time and stats accounting ++# ++CONFIG_TICK_CPU_ACCOUNTING=y ++# CONFIG_IRQ_TIME_ACCOUNTING is not set ++CONFIG_BSD_PROCESS_ACCT=y ++# CONFIG_BSD_PROCESS_ACCT_V3 is not set ++# CONFIG_TASKSTATS is not set ++ ++# ++# RCU Subsystem ++# ++CONFIG_TINY_RCU=y ++# CONFIG_PREEMPT_RCU is not set ++# CONFIG_TREE_RCU_TRACE is not set ++CONFIG_IKCONFIG=y ++CONFIG_IKCONFIG_PROC=y ++CONFIG_LOG_BUF_SHIFT=18 ++CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y ++CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y ++CONFIG_ARCH_WANTS_PROT_NUMA_PROT_NONE=y ++CONFIG_CGROUPS=y ++# CONFIG_CGROUP_DEBUG is not set ++CONFIG_CGROUP_FREEZER=y ++# CONFIG_CGROUP_DEVICE is not set ++CONFIG_CPUSETS=y ++CONFIG_PROC_PID_CPUSET=y ++CONFIG_CGROUP_CPUACCT=y ++CONFIG_RESOURCE_COUNTERS=y ++# CONFIG_MEMCG is not set ++# CONFIG_CGROUP_HUGETLB is not set ++# CONFIG_CGROUP_PERF is not set ++CONFIG_CGROUP_SCHED=y ++CONFIG_FAIR_GROUP_SCHED=y ++# CONFIG_CFS_BANDWIDTH is not set ++# CONFIG_RT_GROUP_SCHED is not set ++# CONFIG_BLK_CGROUP is not set ++# CONFIG_CHECKPOINT_RESTORE is not set ++CONFIG_NAMESPACES=y ++CONFIG_UTS_NS=y ++CONFIG_IPC_NS=y ++# CONFIG_USER_NS is not set ++CONFIG_PID_NS=y ++CONFIG_NET_NS=y ++CONFIG_UIDGID_CONVERTED=y ++# CONFIG_UIDGID_STRICT_TYPE_CHECKS is not set ++# CONFIG_SCHED_AUTOGROUP is not set ++# CONFIG_SYSFS_DEPRECATED is not set ++CONFIG_RELAY=y ++CONFIG_BLK_DEV_INITRD=y ++CONFIG_INITRAMFS_SOURCE="" ++CONFIG_RD_GZIP=y ++CONFIG_RD_BZIP2=y ++CONFIG_RD_LZMA=y ++# CONFIG_RD_XZ is not set ++# CONFIG_RD_LZO is not set ++# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set ++CONFIG_SYSCTL=y ++CONFIG_ANON_INODES=y ++CONFIG_EXPERT=y ++CONFIG_HAVE_UID16=y ++CONFIG_UID16=y ++CONFIG_SYSCTL_SYSCALL=y ++CONFIG_SYSCTL_EXCEPTION_TRACE=y ++CONFIG_KALLSYMS=y ++CONFIG_KALLSYMS_ALL=y ++CONFIG_HOTPLUG=y ++CONFIG_PRINTK=y ++CONFIG_BUG=y ++CONFIG_ELF_CORE=y ++# CONFIG_PCSPKR_PLATFORM is not set ++CONFIG_HAVE_PCSPKR_PLATFORM=y ++CONFIG_BASE_FULL=y ++CONFIG_FUTEX=y ++CONFIG_EPOLL=y ++CONFIG_SIGNALFD=y ++CONFIG_TIMERFD=y ++CONFIG_EVENTFD=y ++CONFIG_SHMEM=y ++CONFIG_AIO=y ++CONFIG_EMBEDDED=y ++CONFIG_HAVE_PERF_EVENTS=y ++ ++# ++# Kernel Performance Events And Counters ++# ++CONFIG_PERF_EVENTS=y ++# CONFIG_DEBUG_PERF_USE_VMALLOC is not set ++CONFIG_VM_EVENT_COUNTERS=y ++CONFIG_PCI_QUIRKS=y ++CONFIG_SLUB_DEBUG=y ++# CONFIG_COMPAT_BRK is not set ++# CONFIG_SLAB is not set ++CONFIG_SLUB=y ++# CONFIG_SLOB is not set ++# CONFIG_PROFILING is not set ++CONFIG_HAVE_OPROFILE=y ++CONFIG_OPROFILE_NMI_TIMER=y ++# CONFIG_KPROBES is not set ++CONFIG_JUMP_LABEL=y ++CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y ++CONFIG_HAVE_IOREMAP_PROT=y ++CONFIG_HAVE_KPROBES=y ++CONFIG_HAVE_KRETPROBES=y ++CONFIG_HAVE_OPTPROBES=y ++CONFIG_HAVE_ARCH_TRACEHOOK=y ++CONFIG_HAVE_DMA_ATTRS=y ++CONFIG_HAVE_DMA_CONTIGUOUS=y ++CONFIG_GENERIC_SMP_IDLE_THREAD=y ++CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y ++CONFIG_HAVE_DMA_API_DEBUG=y ++CONFIG_HAVE_HW_BREAKPOINT=y ++CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y ++CONFIG_HAVE_USER_RETURN_NOTIFIER=y ++CONFIG_HAVE_PERF_EVENTS_NMI=y ++CONFIG_HAVE_PERF_REGS=y ++CONFIG_HAVE_PERF_USER_STACK_DUMP=y ++CONFIG_HAVE_ARCH_JUMP_LABEL=y ++CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y ++CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y ++CONFIG_HAVE_CMPXCHG_LOCAL=y ++CONFIG_HAVE_CMPXCHG_DOUBLE=y ++CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y ++CONFIG_HAVE_ARCH_SECCOMP_FILTER=y ++CONFIG_SECCOMP_FILTER=y ++CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y ++CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y ++CONFIG_MODULES_USE_ELF_REL=y ++CONFIG_GENERIC_SIGALTSTACK=y ++CONFIG_CLONE_BACKWARDS=y ++ ++# ++# GCOV-based kernel profiling ++# ++# CONFIG_GCOV_KERNEL is not set ++CONFIG_HAVE_GENERIC_DMA_COHERENT=y ++CONFIG_SLABINFO=y ++CONFIG_RT_MUTEXES=y ++CONFIG_BASE_SMALL=0 ++CONFIG_MODULES=y ++# CONFIG_MODULE_FORCE_LOAD is not set ++CONFIG_MODULE_UNLOAD=y ++# CONFIG_MODULE_FORCE_UNLOAD is not set ++# CONFIG_MODVERSIONS is not set ++# CONFIG_MODULE_SRCVERSION_ALL is not set ++# CONFIG_MODULE_SIG is not set ++CONFIG_BLOCK=y ++# CONFIG_LBDAF is not set ++CONFIG_BLK_DEV_BSG=y ++# CONFIG_BLK_DEV_BSGLIB is not set ++# CONFIG_BLK_DEV_INTEGRITY is not set ++ ++# ++# Partition Types ++# ++CONFIG_PARTITION_ADVANCED=y ++# CONFIG_ACORN_PARTITION is not set ++# CONFIG_OSF_PARTITION is not set ++# CONFIG_AMIGA_PARTITION is not set ++# CONFIG_ATARI_PARTITION is not set ++# CONFIG_MAC_PARTITION is not set ++CONFIG_MSDOS_PARTITION=y ++CONFIG_BSD_DISKLABEL=y ++# CONFIG_MINIX_SUBPARTITION is not set ++# CONFIG_SOLARIS_X86_PARTITION is not set ++# CONFIG_UNIXWARE_DISKLABEL is not set ++# CONFIG_LDM_PARTITION is not set ++# CONFIG_SGI_PARTITION is not set ++# CONFIG_ULTRIX_PARTITION is not set ++# CONFIG_SUN_PARTITION is not set ++# CONFIG_KARMA_PARTITION is not set ++# CONFIG_EFI_PARTITION is not set ++# CONFIG_SYSV68_PARTITION is not set ++ ++# ++# IO Schedulers ++# ++CONFIG_IOSCHED_NOOP=y ++CONFIG_IOSCHED_DEADLINE=y ++CONFIG_IOSCHED_CFQ=y ++# CONFIG_DEFAULT_DEADLINE is not set ++CONFIG_DEFAULT_CFQ=y ++# CONFIG_DEFAULT_NOOP is not set ++CONFIG_DEFAULT_IOSCHED="cfq" ++CONFIG_UNINLINE_SPIN_UNLOCK=y ++CONFIG_FREEZER=y ++ ++# ++# Processor type and features ++# ++# CONFIG_ZONE_DMA is not set ++# CONFIG_SMP is not set ++CONFIG_X86_MPPARSE=y ++CONFIG_X86_EXTENDED_PLATFORM=y ++CONFIG_INTEL_QUARK_X1000_SOC=y ++# CONFIG_X86_WANT_INTEL_MID is not set ++# CONFIG_X86_RDC321X is not set ++CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y ++ ++# ++# Intel Media SOC Gen3 support ++# ++CONFIG_ARCH_GEN3=y ++# CONFIG_X86_32_IRIS is not set ++CONFIG_SCHED_OMIT_FRAME_POINTER=y ++# CONFIG_PARAVIRT_GUEST is not set ++CONFIG_NO_BOOTMEM=y ++# CONFIG_MEMTEST is not set ++# CONFIG_M486 is not set ++# CONFIG_M586 is not set ++CONFIG_M586TSC=y ++# CONFIG_M586MMX is not set ++# CONFIG_M686 is not set ++# CONFIG_MPENTIUMII is not set ++# CONFIG_MPENTIUMIII is not set ++# CONFIG_MPENTIUMM is not set ++# CONFIG_MPENTIUM4 is not set ++# CONFIG_MK6 is not set ++# CONFIG_MK7 is not set ++# CONFIG_MK8 is not set ++# CONFIG_MCRUSOE is not set ++# CONFIG_MEFFICEON is not set ++# CONFIG_MWINCHIPC6 is not set ++# CONFIG_MWINCHIP3D is not set ++# CONFIG_MELAN is not set ++# CONFIG_MGEODEGX1 is not set ++# CONFIG_MGEODE_LX is not set ++# CONFIG_MCYRIXIII is not set ++# CONFIG_MVIAC3_2 is not set ++# CONFIG_MVIAC7 is not set ++# CONFIG_MCORE2 is not set ++# CONFIG_MATOM is not set ++CONFIG_X86_GENERIC=y ++CONFIG_X86_INTERNODE_CACHE_SHIFT=6 ++CONFIG_X86_L1_CACHE_SHIFT=6 ++# CONFIG_X86_PPRO_FENCE is not set ++CONFIG_X86_F00F_BUG=y ++CONFIG_X86_ALIGNMENT_16=y ++CONFIG_X86_INTEL_USERCOPY=y ++CONFIG_X86_TSC=y ++CONFIG_X86_CMPXCHG64=y ++CONFIG_X86_MINIMUM_CPU_FAMILY=5 ++# CONFIG_PROCESSOR_SELECT is not set ++CONFIG_CPU_SUP_INTEL=y ++CONFIG_CPU_SUP_CYRIX_32=y ++CONFIG_CPU_SUP_AMD=y ++CONFIG_CPU_SUP_CENTAUR=y ++CONFIG_CPU_SUP_TRANSMETA_32=y ++CONFIG_CPU_SUP_UMC_32=y ++CONFIG_HPET_TIMER=y ++CONFIG_HPET_EMULATE_RTC=y ++# CONFIG_DMI is not set ++CONFIG_NR_CPUS=1 ++# CONFIG_PREEMPT_NONE is not set ++CONFIG_PREEMPT_VOLUNTARY=y ++# CONFIG_PREEMPT is not set ++CONFIG_X86_UP_APIC=y ++CONFIG_X86_UP_IOAPIC=y ++CONFIG_X86_LOCAL_APIC=y ++CONFIG_X86_IO_APIC=y ++# CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS is not set ++CONFIG_X86_MCE=y ++CONFIG_X86_MCE_INTEL=y ++# CONFIG_X86_MCE_AMD is not set ++# CONFIG_X86_ANCIENT_MCE is not set ++CONFIG_X86_MCE_THRESHOLD=y ++# CONFIG_X86_MCE_INJECT is not set ++CONFIG_X86_THERMAL_VECTOR=y ++CONFIG_VM86=y ++# CONFIG_TOSHIBA is not set ++# CONFIG_I8K is not set ++CONFIG_X86_REBOOTFIXUPS=y ++CONFIG_MICROCODE=y ++CONFIG_MICROCODE_INTEL=y ++# CONFIG_MICROCODE_AMD is not set ++CONFIG_MICROCODE_OLD_INTERFACE=y ++CONFIG_X86_MSR=y ++CONFIG_X86_CPUID=y ++# CONFIG_NOHIGHMEM is not set ++# CONFIG_HIGHMEM4G is not set ++CONFIG_HIGHMEM64G=y ++CONFIG_VMSPLIT_3G=y ++# CONFIG_VMSPLIT_2G is not set ++# CONFIG_VMSPLIT_1G is not set ++CONFIG_PAGE_OFFSET=0xC0000000 ++CONFIG_HIGHMEM=y ++CONFIG_X86_PAE=y ++CONFIG_ARCH_PHYS_ADDR_T_64BIT=y ++CONFIG_ARCH_DMA_ADDR_T_64BIT=y ++CONFIG_ARCH_FLATMEM_ENABLE=y ++CONFIG_ARCH_SPARSEMEM_ENABLE=y ++CONFIG_ARCH_SELECT_MEMORY_MODEL=y ++CONFIG_ILLEGAL_POINTER_VALUE=0 ++CONFIG_SELECT_MEMORY_MODEL=y ++CONFIG_FLATMEM_MANUAL=y ++# CONFIG_SPARSEMEM_MANUAL is not set ++CONFIG_FLATMEM=y ++CONFIG_FLAT_NODE_MEM_MAP=y ++CONFIG_SPARSEMEM_STATIC=y ++CONFIG_HAVE_MEMBLOCK=y ++CONFIG_HAVE_MEMBLOCK_NODE_MAP=y ++CONFIG_ARCH_DISCARD_MEMBLOCK=y ++CONFIG_PAGEFLAGS_EXTENDED=y ++CONFIG_SPLIT_PTLOCK_CPUS=999999 ++# CONFIG_COMPACTION is not set ++CONFIG_PHYS_ADDR_T_64BIT=y ++CONFIG_ZONE_DMA_FLAG=0 ++CONFIG_BOUNCE=y ++CONFIG_VIRT_TO_BUS=y ++# CONFIG_KSM is not set ++CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 ++CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y ++# CONFIG_MEMORY_FAILURE is not set ++# CONFIG_TRANSPARENT_HUGEPAGE is not set ++CONFIG_CROSS_MEMORY_ATTACH=y ++CONFIG_NEED_PER_CPU_KM=y ++# CONFIG_CLEANCACHE is not set ++# CONFIG_HIGHPTE is not set ++# CONFIG_X86_CHECK_BIOS_CORRUPTION is not set ++CONFIG_X86_RESERVE_LOW=64 ++# CONFIG_MATH_EMULATION is not set ++# CONFIG_MTRR is not set ++# CONFIG_ARCH_RANDOM is not set ++CONFIG_X86_SMAP=y ++CONFIG_EFI=y ++CONFIG_EFI_STUB=y ++CONFIG_EFI_CAPSULE=y ++CONFIG_SECCOMP=y ++# CONFIG_CC_STACKPROTECTOR is not set ++CONFIG_HZ_100=y ++# CONFIG_HZ_250 is not set ++# CONFIG_HZ_300 is not set ++# CONFIG_HZ_1000 is not set ++CONFIG_HZ=100 ++CONFIG_SCHED_HRTICK=y ++CONFIG_KEXEC=y ++# CONFIG_CRASH_DUMP is not set ++CONFIG_PHYSICAL_START=0x400000 ++# CONFIG_RELOCATABLE is not set ++CONFIG_PHYSICAL_ALIGN=0x1000000 ++# CONFIG_COMPAT_VDSO is not set ++# CONFIG_CMDLINE_BOOL is not set ++CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y ++ ++# ++# Power management and ACPI options ++# ++CONFIG_SUSPEND=y ++CONFIG_SUSPEND_FREEZER=y ++CONFIG_PM_SLEEP=y ++# CONFIG_PM_AUTOSLEEP is not set ++# CONFIG_PM_WAKELOCKS is not set ++CONFIG_PM_RUNTIME=y ++CONFIG_PM=y ++CONFIG_PM_DEBUG=y ++# CONFIG_PM_ADVANCED_DEBUG is not set ++CONFIG_PM_SLEEP_DEBUG=y ++CONFIG_PM_TRACE=y ++CONFIG_PM_TRACE_RTC=y ++CONFIG_ACPI=y ++CONFIG_ACPI_SLEEP=y ++CONFIG_ACPI_PROCFS=y ++CONFIG_ACPI_PROCFS_POWER=y ++CONFIG_ACPI_EC_DEBUGFS=y ++# CONFIG_ACPI_PROC_EVENT is not set ++CONFIG_ACPI_AC=y ++# CONFIG_ACPI_BATTERY is not set ++CONFIG_ACPI_BUTTON=y ++# CONFIG_ACPI_FAN is not set ++# CONFIG_ACPI_DOCK is not set ++CONFIG_ACPI_I2C=m ++CONFIG_ACPI_PROCESSOR=y ++# CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set ++CONFIG_ACPI_THERMAL=y ++# CONFIG_ACPI_CUSTOM_DSDT is not set ++# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set ++CONFIG_ACPI_BLACKLIST_YEAR=0 ++CONFIG_ACPI_DEBUG=y ++# CONFIG_ACPI_DEBUG_FUNC_TRACE is not set ++CONFIG_ACPI_PCI_SLOT=y ++CONFIG_X86_PM_TIMER=y ++# CONFIG_ACPI_CONTAINER is not set ++# CONFIG_ACPI_SBS is not set ++# CONFIG_ACPI_HED is not set ++# CONFIG_ACPI_CUSTOM_METHOD is not set ++# CONFIG_ACPI_BGRT is not set ++# CONFIG_ACPI_APEI is not set ++# CONFIG_SFI is not set ++# CONFIG_APM is not set ++ ++# ++# CPU Frequency scaling ++# ++# CONFIG_CPU_FREQ is not set ++CONFIG_CPU_IDLE=y ++# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set ++CONFIG_CPU_IDLE_GOV_LADDER=y ++CONFIG_CPU_IDLE_GOV_MENU=y ++# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set ++# CONFIG_INTEL_IDLE is not set ++ ++# ++# Bus options (PCI etc.) ++# ++CONFIG_PCI=y ++# CONFIG_PCI_GOBIOS is not set ++# CONFIG_PCI_GOMMCONFIG is not set ++# CONFIG_PCI_GODIRECT is not set ++CONFIG_PCI_GOANY=y ++CONFIG_PCI_BIOS=y ++CONFIG_PCI_DIRECT=y ++CONFIG_PCI_MMCONFIG=y ++CONFIG_PCI_DOMAINS=y ++# CONFIG_PCI_CNB20LE_QUIRK is not set ++CONFIG_PCIEPORTBUS=y ++CONFIG_PCIEAER=y ++# CONFIG_PCIE_ECRC is not set ++# CONFIG_PCIEAER_INJECT is not set ++CONFIG_PCIEASPM=y ++# CONFIG_PCIEASPM_DEBUG is not set ++CONFIG_PCIEASPM_DEFAULT=y ++# CONFIG_PCIEASPM_POWERSAVE is not set ++# CONFIG_PCIEASPM_PERFORMANCE is not set ++CONFIG_PCIE_PME=y ++CONFIG_ARCH_SUPPORTS_MSI=y ++CONFIG_PCI_MSI=y ++CONFIG_PCI_DEBUG=y ++# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set ++# CONFIG_PCI_STUB is not set ++CONFIG_HT_IRQ=y ++# CONFIG_PCI_IOV is not set ++# CONFIG_PCI_PRI is not set ++# CONFIG_PCI_PASID is not set ++CONFIG_PCI_IOAPIC=y ++CONFIG_PCI_LABEL=y ++CONFIG_ISA_DMA_API=y ++# CONFIG_ISA is not set ++# CONFIG_SCx200 is not set ++# CONFIG_ALIX is not set ++# CONFIG_NET5501 is not set ++CONFIG_AMD_NB=y ++# CONFIG_PCCARD is not set ++# CONFIG_HOTPLUG_PCI is not set ++# CONFIG_RAPIDIO is not set ++ ++# ++# Executable file formats / Emulations ++# ++CONFIG_BINFMT_ELF=y ++CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y ++CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y ++CONFIG_HAVE_AOUT=y ++# CONFIG_BINFMT_AOUT is not set ++# CONFIG_BINFMT_MISC is not set ++CONFIG_COREDUMP=y ++CONFIG_HAVE_ATOMIC_IOMAP=y ++CONFIG_HAVE_TEXT_POKE_SMP=y ++CONFIG_NET=y ++ ++# ++# Networking options ++# ++CONFIG_PACKET=y ++# CONFIG_PACKET_DIAG is not set ++CONFIG_UNIX=y ++# CONFIG_UNIX_DIAG is not set ++CONFIG_XFRM=y ++# CONFIG_XFRM_USER is not set ++# CONFIG_XFRM_SUB_POLICY is not set ++# CONFIG_XFRM_MIGRATE is not set ++# CONFIG_XFRM_STATISTICS is not set ++# CONFIG_NET_KEY is not set ++CONFIG_INET=y ++# CONFIG_IP_MULTICAST is not set ++# CONFIG_IP_ADVANCED_ROUTER is not set ++# CONFIG_IP_PNP is not set ++# CONFIG_NET_IPIP is not set ++# CONFIG_NET_IPGRE_DEMUX is not set ++# CONFIG_ARPD is not set ++CONFIG_SYN_COOKIES=y ++# CONFIG_NET_IPVTI is not set ++# CONFIG_INET_AH is not set ++# CONFIG_INET_ESP is not set ++# CONFIG_INET_IPCOMP is not set ++# CONFIG_INET_XFRM_TUNNEL is not set ++# CONFIG_INET_TUNNEL is not set ++CONFIG_INET_XFRM_MODE_TRANSPORT=y ++CONFIG_INET_XFRM_MODE_TUNNEL=y ++CONFIG_INET_XFRM_MODE_BEET=y ++CONFIG_INET_LRO=y ++CONFIG_INET_DIAG=y ++CONFIG_INET_TCP_DIAG=y ++# CONFIG_INET_UDP_DIAG is not set ++# CONFIG_TCP_CONG_ADVANCED is not set ++CONFIG_TCP_CONG_CUBIC=y ++CONFIG_DEFAULT_TCP_CONG="cubic" ++# CONFIG_TCP_MD5SIG is not set ++CONFIG_IPV6=m ++# CONFIG_IPV6_PRIVACY is not set ++# CONFIG_IPV6_ROUTER_PREF is not set ++# CONFIG_IPV6_OPTIMISTIC_DAD is not set ++# CONFIG_INET6_AH is not set ++# CONFIG_INET6_ESP is not set ++# CONFIG_INET6_IPCOMP is not set ++# CONFIG_IPV6_MIP6 is not set ++# CONFIG_INET6_XFRM_TUNNEL is not set ++# CONFIG_INET6_TUNNEL is not set ++CONFIG_INET6_XFRM_MODE_TRANSPORT=m ++CONFIG_INET6_XFRM_MODE_TUNNEL=m ++CONFIG_INET6_XFRM_MODE_BEET=m ++# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set ++# CONFIG_IPV6_SIT is not set ++# CONFIG_IPV6_TUNNEL is not set ++# CONFIG_IPV6_GRE is not set ++# CONFIG_IPV6_MULTIPLE_TABLES is not set ++# CONFIG_IPV6_MROUTE is not set ++# CONFIG_NETLABEL is not set ++# CONFIG_NETWORK_SECMARK is not set ++# CONFIG_NETWORK_PHY_TIMESTAMPING is not set ++# CONFIG_NETFILTER is not set ++# CONFIG_IP_DCCP is not set ++# CONFIG_IP_SCTP is not set ++# CONFIG_RDS is not set ++# CONFIG_TIPC is not set ++# CONFIG_ATM is not set ++# CONFIG_L2TP is not set ++CONFIG_STP=m ++CONFIG_GARP=m ++# CONFIG_BRIDGE is not set ++CONFIG_HAVE_NET_DSA=y ++CONFIG_VLAN_8021Q=m ++CONFIG_VLAN_8021Q_GVRP=y ++# CONFIG_DECNET is not set ++CONFIG_LLC=m ++# CONFIG_LLC2 is not set ++# CONFIG_IPX is not set ++# CONFIG_ATALK is not set ++# CONFIG_X25 is not set ++# CONFIG_LAPB is not set ++# CONFIG_WAN_ROUTER is not set ++# CONFIG_PHONET is not set ++# CONFIG_IEEE802154 is not set ++# CONFIG_NET_SCHED is not set ++# CONFIG_DCB is not set ++# CONFIG_DNS_RESOLVER is not set ++# CONFIG_BATMAN_ADV is not set ++# CONFIG_OPENVSWITCH is not set ++# CONFIG_NETPRIO_CGROUP is not set ++CONFIG_BQL=y ++ ++# ++# Network testing ++# ++# CONFIG_NET_PKTGEN is not set ++# CONFIG_HAMRADIO is not set ++# CONFIG_CAN is not set ++# CONFIG_IRDA is not set ++CONFIG_BT=m ++CONFIG_BT_RFCOMM=m ++CONFIG_BT_RFCOMM_TTY=y ++CONFIG_BT_BNEP=m ++CONFIG_BT_BNEP_MC_FILTER=y ++CONFIG_BT_BNEP_PROTO_FILTER=y ++CONFIG_BT_HIDP=m ++ ++# ++# Bluetooth device drivers ++# ++CONFIG_BT_HCIBTUSB=m ++# CONFIG_BT_HCIBTSDIO is not set ++# CONFIG_BT_HCIUART is not set ++# CONFIG_BT_HCIBCM203X is not set ++# CONFIG_BT_HCIBPA10X is not set ++# CONFIG_BT_HCIBFUSB is not set ++CONFIG_BT_HCIVHCI=m ++# CONFIG_BT_MRVL is not set ++# CONFIG_BT_ATH3K is not set ++# CONFIG_AF_RXRPC is not set ++CONFIG_WIRELESS=y ++CONFIG_WEXT_CORE=y ++CONFIG_WEXT_PROC=y ++CONFIG_CFG80211=m ++# CONFIG_NL80211_TESTMODE is not set ++# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set ++# CONFIG_CFG80211_REG_DEBUG is not set ++# CONFIG_CFG80211_CERTIFICATION_ONUS is not set ++CONFIG_CFG80211_DEFAULT_PS=y ++# CONFIG_CFG80211_DEBUGFS is not set ++# CONFIG_CFG80211_INTERNAL_REGDB is not set ++CONFIG_CFG80211_WEXT=y ++# CONFIG_LIB80211 is not set ++CONFIG_MAC80211=m ++CONFIG_MAC80211_HAS_RC=y ++# CONFIG_MAC80211_RC_PID is not set ++CONFIG_MAC80211_RC_MINSTREL=y ++CONFIG_MAC80211_RC_MINSTREL_HT=y ++CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y ++CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" ++# CONFIG_MAC80211_MESH is not set ++CONFIG_MAC80211_LEDS=y ++# CONFIG_MAC80211_DEBUGFS is not set ++# CONFIG_MAC80211_MESSAGE_TRACING is not set ++# CONFIG_MAC80211_DEBUG_MENU is not set ++# CONFIG_WIMAX is not set ++CONFIG_RFKILL=m ++CONFIG_RFKILL_LEDS=y ++CONFIG_RFKILL_INPUT=y ++# CONFIG_NET_9P is not set ++# CONFIG_CAIF is not set ++# CONFIG_CEPH_LIB is not set ++# CONFIG_NFC is not set ++ ++# ++# Device Drivers ++# ++ ++# ++# Generic Driver Options ++# ++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" ++CONFIG_DEVTMPFS=y ++CONFIG_DEVTMPFS_MOUNT=y ++CONFIG_STANDALONE=y ++CONFIG_PREVENT_FIRMWARE_BUILD=y ++CONFIG_FW_LOADER=y ++CONFIG_FIRMWARE_IN_KERNEL=y ++CONFIG_EXTRA_FIRMWARE="" ++# CONFIG_DEBUG_DRIVER is not set ++CONFIG_DEBUG_DEVRES=y ++# CONFIG_SYS_HYPERVISOR is not set ++# CONFIG_GENERIC_CPU_DEVICES is not set ++CONFIG_DMA_SHARED_BUFFER=y ++# CONFIG_CMA is not set ++ ++# ++# Bus devices ++# ++# CONFIG_CONNECTOR is not set ++CONFIG_MTD=y ++# CONFIG_MTD_TESTS is not set ++# CONFIG_MTD_REDBOOT_PARTS is not set ++# CONFIG_MTD_CMDLINE_PARTS is not set ++# CONFIG_MTD_AR7_PARTS is not set ++ ++# ++# User Modules And Translation Layers ++# ++CONFIG_MTD_CHAR=m ++CONFIG_MTD_BLKDEVS=m ++CONFIG_MTD_BLOCK=m ++# CONFIG_MTD_BLOCK_RO is not set ++# CONFIG_FTL is not set ++# CONFIG_NFTL is not set ++# CONFIG_INFTL is not set ++# CONFIG_RFD_FTL is not set ++# CONFIG_SSFDC is not set ++# CONFIG_SM_FTL is not set ++# CONFIG_MTD_OOPS is not set ++ ++# ++# RAM/ROM/Flash chip drivers ++# ++# CONFIG_MTD_CFI is not set ++# CONFIG_MTD_JEDECPROBE is not set ++CONFIG_MTD_MAP_BANK_WIDTH_1=y ++CONFIG_MTD_MAP_BANK_WIDTH_2=y ++CONFIG_MTD_MAP_BANK_WIDTH_4=y ++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set ++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set ++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set ++CONFIG_MTD_CFI_I1=y ++CONFIG_MTD_CFI_I2=y ++# CONFIG_MTD_CFI_I4 is not set ++# CONFIG_MTD_CFI_I8 is not set ++# CONFIG_MTD_RAM is not set ++# CONFIG_MTD_ROM is not set ++# CONFIG_MTD_ABSENT is not set ++ ++# ++# Mapping drivers for chip access ++# ++# CONFIG_MTD_COMPLEX_MAPPINGS is not set ++# CONFIG_MTD_TS5500 is not set ++# CONFIG_MTD_INTEL_VR_NOR is not set ++# CONFIG_MTD_PLATRAM is not set ++ ++# ++# Self-contained MTD device drivers ++# ++# CONFIG_MTD_PMC551 is not set ++# CONFIG_MTD_DATAFLASH is not set ++CONFIG_MTD_M25P80=m ++CONFIG_M25PXX_USE_FAST_READ=y ++# CONFIG_MTD_SST25L is not set ++# CONFIG_MTD_SLRAM is not set ++# CONFIG_MTD_PHRAM is not set ++# CONFIG_MTD_MTDRAM is not set ++# CONFIG_MTD_MTD_CLN_ROM is not set ++# CONFIG_MTD_BLOCK2MTD is not set ++ ++# ++# Disk-On-Chip Device Drivers ++# ++# CONFIG_MTD_DOCG3 is not set ++# CONFIG_MTD_NAND is not set ++# CONFIG_MTD_ONENAND is not set ++ ++# ++# LPDDR flash memory drivers ++# ++# CONFIG_MTD_LPDDR is not set ++# CONFIG_MTD_UBI is not set ++# CONFIG_PARPORT is not set ++CONFIG_PNP=y ++# CONFIG_PNP_DEBUG_MESSAGES is not set ++ ++# ++# Protocols ++# ++CONFIG_PNPACPI=y ++CONFIG_BLK_DEV=y ++# CONFIG_BLK_DEV_FD is not set ++# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set ++# CONFIG_BLK_CPQ_DA is not set ++# CONFIG_BLK_CPQ_CISS_DA is not set ++# CONFIG_BLK_DEV_DAC960 is not set ++# CONFIG_BLK_DEV_UMEM is not set ++# CONFIG_BLK_DEV_COW_COMMON is not set ++CONFIG_BLK_DEV_LOOP=y ++CONFIG_BLK_DEV_LOOP_MIN_COUNT=2 ++# CONFIG_BLK_DEV_CRYPTOLOOP is not set ++# CONFIG_BLK_DEV_DRBD is not set ++# CONFIG_BLK_DEV_NBD is not set ++# CONFIG_BLK_DEV_NVME is not set ++# CONFIG_BLK_DEV_SX8 is not set ++CONFIG_BLK_DEV_RAM=y ++CONFIG_BLK_DEV_RAM_COUNT=1 ++CONFIG_BLK_DEV_RAM_SIZE=81920 ++# CONFIG_BLK_DEV_XIP is not set ++# CONFIG_CDROM_PKTCDVD is not set ++# CONFIG_ATA_OVER_ETH is not set ++# CONFIG_BLK_DEV_HD is not set ++# CONFIG_BLK_DEV_RBD is not set ++ ++# ++# Misc devices ++# ++# CONFIG_SENSORS_LIS3LV02D is not set ++# CONFIG_AD525X_DPOT is not set ++# CONFIG_IBM_ASM is not set ++# CONFIG_PHANTOM is not set ++# CONFIG_INTEL_MID_PTI is not set ++# CONFIG_SGI_IOC4 is not set ++# CONFIG_TIFM_CORE is not set ++# CONFIG_ICS932S401 is not set ++# CONFIG_ENCLOSURE_SERVICES is not set ++# CONFIG_HP_ILO is not set ++# CONFIG_APDS9802ALS is not set ++# CONFIG_ISL29003 is not set ++# CONFIG_ISL29020 is not set ++# CONFIG_SENSORS_TSL2550 is not set ++# CONFIG_SENSORS_BH1780 is not set ++# CONFIG_SENSORS_BH1770 is not set ++# CONFIG_SENSORS_APDS990X is not set ++# CONFIG_HMC6352 is not set ++# CONFIG_DS1682 is not set ++# CONFIG_TI_DAC7512 is not set ++# CONFIG_VMWARE_BALLOON is not set ++# CONFIG_BMP085_I2C is not set ++# CONFIG_BMP085_SPI is not set ++# CONFIG_PCH_PHUB is not set ++# CONFIG_USB_SWITCH_FSA9480 is not set ++# CONFIG_C2PORT is not set ++ ++# ++# EEPROM support ++# ++CONFIG_EEPROM_AT24=m ++# CONFIG_EEPROM_AT25 is not set ++# CONFIG_EEPROM_LEGACY is not set ++# CONFIG_EEPROM_MAX6875 is not set ++# CONFIG_EEPROM_93CX6 is not set ++# CONFIG_EEPROM_93XX46 is not set ++# CONFIG_CB710_CORE is not set ++ ++# ++# Texas Instruments shared transport line discipline ++# ++# CONFIG_TI_ST is not set ++# CONFIG_SENSORS_LIS3_I2C is not set ++ ++# ++# Altera FPGA firmware download module ++# ++# CONFIG_ALTERA_STAPL is not set ++CONFIG_HAVE_IDE=y ++# CONFIG_IDE is not set ++ ++# ++# SCSI device support ++# ++CONFIG_SCSI_MOD=y ++# CONFIG_RAID_ATTRS is not set ++CONFIG_SCSI=y ++CONFIG_SCSI_DMA=y ++# CONFIG_SCSI_TGT is not set ++# CONFIG_SCSI_NETLINK is not set ++CONFIG_SCSI_PROC_FS=y ++ ++# ++# SCSI support type (disk, tape, CD-ROM) ++# ++CONFIG_BLK_DEV_SD=y ++# CONFIG_CHR_DEV_ST is not set ++# CONFIG_CHR_DEV_OSST is not set ++# CONFIG_BLK_DEV_SR is not set ++CONFIG_CHR_DEV_SG=y ++# CONFIG_CHR_DEV_SCH is not set ++# CONFIG_SCSI_MULTI_LUN is not set ++CONFIG_SCSI_CONSTANTS=y ++# CONFIG_SCSI_LOGGING is not set ++# CONFIG_SCSI_SCAN_ASYNC is not set ++ ++# ++# SCSI Transports ++# ++CONFIG_SCSI_SPI_ATTRS=y ++# CONFIG_SCSI_FC_ATTRS is not set ++# CONFIG_SCSI_ISCSI_ATTRS is not set ++# CONFIG_SCSI_SAS_ATTRS is not set ++# CONFIG_SCSI_SAS_LIBSAS is not set ++# CONFIG_SCSI_SRP_ATTRS is not set ++# CONFIG_SCSI_LOWLEVEL is not set ++# CONFIG_SCSI_DH is not set ++# CONFIG_SCSI_OSD_INITIATOR is not set ++# CONFIG_ATA is not set ++# CONFIG_MD is not set ++# CONFIG_TARGET_CORE is not set ++# CONFIG_FUSION is not set ++ ++# ++# IEEE 1394 (FireWire) support ++# ++# CONFIG_FIREWIRE is not set ++# CONFIG_FIREWIRE_NOSY is not set ++# CONFIG_I2O is not set ++# CONFIG_MACINTOSH_DRIVERS is not set ++CONFIG_NETDEVICES=y ++CONFIG_NET_CORE=y ++# CONFIG_BONDING is not set ++# CONFIG_DUMMY is not set ++# CONFIG_EQUALIZER is not set ++# CONFIG_NET_FC is not set ++CONFIG_MII=y ++# CONFIG_NET_TEAM is not set ++# CONFIG_MACVLAN is not set ++# CONFIG_VXLAN is not set ++# CONFIG_NETCONSOLE is not set ++# CONFIG_NETPOLL is not set ++# CONFIG_NET_POLL_CONTROLLER is not set ++# CONFIG_TUN is not set ++# CONFIG_VETH is not set ++# CONFIG_ARCNET is not set ++ ++# ++# CAIF transport drivers ++# ++ ++# ++# Distributed Switch Architecture drivers ++# ++# CONFIG_NET_DSA_MV88E6XXX is not set ++# CONFIG_NET_DSA_MV88E6060 is not set ++# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set ++# CONFIG_NET_DSA_MV88E6131 is not set ++# CONFIG_NET_DSA_MV88E6123_61_65 is not set ++CONFIG_ETHERNET=y ++# CONFIG_NET_VENDOR_3COM is not set ++# CONFIG_NET_VENDOR_ADAPTEC is not set ++# CONFIG_NET_VENDOR_ALTEON is not set ++# CONFIG_NET_VENDOR_AMD is not set ++# CONFIG_NET_VENDOR_ATHEROS is not set ++CONFIG_NET_CADENCE=y ++# CONFIG_ARM_AT91_ETHER is not set ++# CONFIG_MACB is not set ++# CONFIG_NET_VENDOR_BROADCOM is not set ++# CONFIG_NET_VENDOR_BROCADE is not set ++# CONFIG_NET_CALXEDA_XGMAC is not set ++# CONFIG_NET_VENDOR_CHELSIO is not set ++# CONFIG_NET_VENDOR_CISCO is not set ++# CONFIG_DNET is not set ++# CONFIG_NET_VENDOR_DEC is not set ++# CONFIG_NET_VENDOR_DLINK is not set ++# CONFIG_NET_VENDOR_EMULEX is not set ++# CONFIG_NET_VENDOR_EXAR is not set ++# CONFIG_NET_VENDOR_HP is not set ++CONFIG_NET_VENDOR_INTEL=y ++# CONFIG_E100 is not set ++CONFIG_E1000=m ++# CONFIG_E1000E is not set ++# CONFIG_IGB is not set ++# CONFIG_IGBVF is not set ++# CONFIG_IXGB is not set ++# CONFIG_IXGBE is not set ++# CONFIG_IXGBEVF is not set ++# CONFIG_NET_VENDOR_I825XX is not set ++# CONFIG_IP1000 is not set ++# CONFIG_JME is not set ++# CONFIG_NET_VENDOR_MARVELL is not set ++# CONFIG_NET_VENDOR_MELLANOX is not set ++# CONFIG_NET_VENDOR_MICREL is not set ++# CONFIG_NET_VENDOR_MICROCHIP is not set ++# CONFIG_NET_VENDOR_MYRI is not set ++# CONFIG_FEALNX is not set ++# CONFIG_NET_VENDOR_NATSEMI is not set ++# CONFIG_NET_VENDOR_NVIDIA is not set ++# CONFIG_NET_VENDOR_OKI is not set ++# CONFIG_ETHOC is not set ++# CONFIG_NET_PACKET_ENGINE is not set ++# CONFIG_NET_VENDOR_QLOGIC is not set ++# CONFIG_NET_VENDOR_REALTEK is not set ++# CONFIG_NET_VENDOR_RDC is not set ++# CONFIG_NET_VENDOR_SEEQ is not set ++# CONFIG_NET_VENDOR_SILAN is not set ++# CONFIG_NET_VENDOR_SIS is not set ++# CONFIG_SFC is not set ++# CONFIG_NET_VENDOR_SMSC is not set ++CONFIG_NET_VENDOR_STMICRO=y ++CONFIG_STMMAC_ETH=m ++# CONFIG_STMMAC_PLATFORM is not set ++CONFIG_STMMAC_PCI=y ++# CONFIG_STMMAC_DEBUG_FS is not set ++CONFIG_STMMAC_DA=y ++# CONFIG_STMMAC_PTP is not set ++CONFIG_STMMAC_RING=y ++# CONFIG_STMMAC_CHAINED is not set ++# CONFIG_NET_VENDOR_SUN is not set ++# CONFIG_NET_VENDOR_TEHUTI is not set ++# CONFIG_NET_VENDOR_TI is not set ++# CONFIG_NET_VENDOR_VIA is not set ++# CONFIG_NET_VENDOR_WIZNET is not set ++# CONFIG_FDDI is not set ++# CONFIG_HIPPI is not set ++# CONFIG_NET_SB1000 is not set ++CONFIG_PHYLIB=y ++ ++# ++# MII PHY device drivers ++# ++# CONFIG_AT803X_PHY is not set ++# CONFIG_AMD_PHY is not set ++# CONFIG_MARVELL_PHY is not set ++# CONFIG_DAVICOM_PHY is not set ++# CONFIG_QSEMI_PHY is not set ++# CONFIG_LXT_PHY is not set ++# CONFIG_CICADA_PHY is not set ++# CONFIG_VITESSE_PHY is not set ++# CONFIG_SMSC_PHY is not set ++# CONFIG_BROADCOM_PHY is not set ++# CONFIG_BCM87XX_PHY is not set ++# CONFIG_ICPLUS_PHY is not set ++# CONFIG_REALTEK_PHY is not set ++# CONFIG_NATIONAL_PHY is not set ++# CONFIG_STE10XP is not set ++# CONFIG_LSI_ET1011C_PHY is not set ++# CONFIG_MICREL_PHY is not set ++# CONFIG_FIXED_PHY is not set ++# CONFIG_MDIO_BITBANG is not set ++# CONFIG_MICREL_KS8995MA is not set ++CONFIG_PPP=m ++# CONFIG_PPP_BSDCOMP is not set ++CONFIG_PPP_DEFLATE=m ++# CONFIG_PPP_FILTER is not set ++# CONFIG_PPP_MPPE is not set ++# CONFIG_PPP_MULTILINK is not set ++# CONFIG_PPPOE is not set ++CONFIG_PPP_ASYNC=m ++# CONFIG_PPP_SYNC_TTY is not set ++# CONFIG_SLIP is not set ++CONFIG_SLHC=m ++ ++# ++# USB Network Adapters ++# ++# CONFIG_USB_CATC is not set ++# CONFIG_USB_KAWETH is not set ++# CONFIG_USB_PEGASUS is not set ++# CONFIG_USB_RTL8150 is not set ++# CONFIG_USB_USBNET is not set ++# CONFIG_USB_HSO is not set ++# CONFIG_USB_IPHETH is not set ++CONFIG_WLAN=y ++# CONFIG_LIBERTAS_THINFIRM is not set ++# CONFIG_AIRO is not set ++# CONFIG_ATMEL is not set ++# CONFIG_AT76C50X_USB is not set ++# CONFIG_PRISM54 is not set ++# CONFIG_USB_ZD1201 is not set ++# CONFIG_USB_NET_RNDIS_WLAN is not set ++# CONFIG_RTL8180 is not set ++# CONFIG_RTL8187 is not set ++# CONFIG_ADM8211 is not set ++# CONFIG_MAC80211_HWSIM is not set ++# CONFIG_MWL8K is not set ++# CONFIG_ATH_CARDS is not set ++# CONFIG_B43 is not set ++# CONFIG_B43LEGACY is not set ++# CONFIG_BRCMFMAC is not set ++# CONFIG_HOSTAP is not set ++# CONFIG_IPW2100 is not set ++# CONFIG_IPW2200 is not set ++CONFIG_IWLWIFI=m ++CONFIG_IWLDVM=m ++ ++# ++# Debugging Options ++# ++# CONFIG_IWLWIFI_DEBUG is not set ++CONFIG_IWLWIFI_P2P=y ++# CONFIG_IWL4965 is not set ++# CONFIG_IWL3945 is not set ++# CONFIG_LIBERTAS is not set ++# CONFIG_HERMES is not set ++# CONFIG_P54_COMMON is not set ++# CONFIG_RT2X00 is not set ++# CONFIG_RTL8192CE is not set ++# CONFIG_RTL8192SE is not set ++# CONFIG_RTL8192DE is not set ++# CONFIG_RTL8723AE is not set ++# CONFIG_RTL8192CU is not set ++# CONFIG_WL_TI is not set ++# CONFIG_ZD1211RW is not set ++# CONFIG_MWIFIEX is not set ++ ++# ++# Enable WiMAX (Networking options) to see the WiMAX drivers ++# ++# CONFIG_WAN is not set ++# CONFIG_VMXNET3 is not set ++# CONFIG_ISDN is not set ++ ++# ++# Input device support ++# ++CONFIG_INPUT=y ++# CONFIG_INPUT_FF_MEMLESS is not set ++# CONFIG_INPUT_POLLDEV is not set ++# CONFIG_INPUT_SPARSEKMAP is not set ++# CONFIG_INPUT_MATRIXKMAP is not set ++ ++# ++# Userland interfaces ++# ++# CONFIG_INPUT_MOUSEDEV is not set ++# CONFIG_INPUT_JOYDEV is not set ++CONFIG_INPUT_EVDEV=m ++# CONFIG_INPUT_EVBUG is not set ++ ++# ++# Input Device Drivers ++# ++# CONFIG_INPUT_KEYBOARD is not set ++# CONFIG_INPUT_MOUSE is not set ++# CONFIG_INPUT_JOYSTICK is not set ++# CONFIG_INPUT_TABLET is not set ++# CONFIG_INPUT_TOUCHSCREEN is not set ++# CONFIG_INPUT_MISC is not set ++ ++# ++# Hardware I/O ports ++# ++# CONFIG_SERIO is not set ++# CONFIG_GAMEPORT is not set ++ ++# ++# Character devices ++# ++CONFIG_VT=y ++CONFIG_CONSOLE_TRANSLATIONS=y ++CONFIG_VT_CONSOLE=y ++CONFIG_VT_CONSOLE_SLEEP=y ++CONFIG_HW_CONSOLE=y ++CONFIG_VT_HW_CONSOLE_BINDING=y ++CONFIG_UNIX98_PTYS=y ++# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set ++CONFIG_LEGACY_PTYS=y ++CONFIG_LEGACY_PTY_COUNT=32 ++CONFIG_SERIAL_NONSTANDARD=y ++# CONFIG_ROCKETPORT is not set ++# CONFIG_CYCLADES is not set ++# CONFIG_MOXA_INTELLIO is not set ++# CONFIG_MOXA_SMARTIO is not set ++# CONFIG_SYNCLINK is not set ++# CONFIG_SYNCLINKMP is not set ++# CONFIG_SYNCLINK_GT is not set ++# CONFIG_NOZOMI is not set ++# CONFIG_ISI is not set ++# CONFIG_N_HDLC is not set ++# CONFIG_N_GSM is not set ++# CONFIG_TRACE_SINK is not set ++CONFIG_DEVKMEM=y ++# CONFIG_STALDRV is not set ++ ++# ++# Serial drivers ++# ++CONFIG_SERIAL_8250=y ++# CONFIG_SERIAL_8250_PNP is not set ++CONFIG_SERIAL_8250_CONSOLE=y ++CONFIG_FIX_EARLYCON_MEM=y ++CONFIG_SERIAL_8250_PCI=y ++CONFIG_SERIAL_8250_NR_UARTS=8 ++CONFIG_SERIAL_8250_RUNTIME_UARTS=2 ++CONFIG_SERIAL_8250_EXTENDED=y ++CONFIG_SERIAL_8250_MANY_PORTS=y ++CONFIG_SERIAL_8250_SHARE_IRQ=y ++CONFIG_SERIAL_8250_DETECT_IRQ=y ++CONFIG_SERIAL_8250_RSA=y ++ ++# ++# Non-8250 serial port support ++# ++# CONFIG_SERIAL_MAX3100 is not set ++# CONFIG_SERIAL_MAX310X is not set ++# CONFIG_SERIAL_MFD_HSU is not set ++CONFIG_SERIAL_CORE=y ++CONFIG_SERIAL_CORE_CONSOLE=y ++# CONFIG_SERIAL_JSM is not set ++# CONFIG_SERIAL_SCCNXP is not set ++# CONFIG_SERIAL_TIMBERDALE is not set ++# CONFIG_SERIAL_ALTERA_JTAGUART is not set ++# CONFIG_SERIAL_ALTERA_UART is not set ++# CONFIG_SERIAL_IFX6X60 is not set ++# CONFIG_SERIAL_CLN_UART is not set ++# CONFIG_SERIAL_PCH_UART is not set ++# CONFIG_SERIAL_ARC is not set ++# CONFIG_TTY_PRINTK is not set ++# CONFIG_IPMI_HANDLER is not set ++# CONFIG_HW_RANDOM is not set ++# CONFIG_NVRAM is not set ++CONFIG_RTC=y ++# CONFIG_R3964 is not set ++# CONFIG_APPLICOM is not set ++# CONFIG_SONYPI is not set ++# CONFIG_MWAVE is not set ++# CONFIG_PC8736x_GPIO is not set ++# CONFIG_NSC_GPIO is not set ++# CONFIG_RAW_DRIVER is not set ++CONFIG_HPET=y ++# CONFIG_HPET_MMAP is not set ++# CONFIG_HANGCHECK_TIMER is not set ++# CONFIG_TCG_TPM is not set ++# CONFIG_TELCLOCK is not set ++CONFIG_DEVPORT=y ++CONFIG_I2C=m ++CONFIG_I2C_BOARDINFO=y ++CONFIG_I2C_COMPAT=y ++CONFIG_I2C_CHARDEV=m ++# CONFIG_I2C_MUX is not set ++CONFIG_I2C_HELPER_AUTO=y ++ ++# ++# I2C Hardware Bus support ++# ++ ++# ++# PC SMBus host controller drivers ++# ++# CONFIG_I2C_ALI1535 is not set ++# CONFIG_I2C_ALI1563 is not set ++# CONFIG_I2C_ALI15X3 is not set ++# CONFIG_I2C_AMD756 is not set ++# CONFIG_I2C_AMD8111 is not set ++# CONFIG_I2C_I801 is not set ++# CONFIG_I2C_ISCH is not set ++# CONFIG_I2C_PIIX4 is not set ++# CONFIG_I2C_NFORCE2 is not set ++# CONFIG_I2C_SIS5595 is not set ++# CONFIG_I2C_SIS630 is not set ++# CONFIG_I2C_SIS96X is not set ++# CONFIG_I2C_VIA is not set ++# CONFIG_I2C_VIAPRO is not set ++ ++# ++# ACPI drivers ++# ++# CONFIG_I2C_SCMI is not set ++ ++# ++# I2C system bus drivers (mostly embedded / system-on-chip) ++# ++# CONFIG_I2C_CBUS_GPIO is not set ++# CONFIG_I2C_EG20T is not set ++# CONFIG_I2C_GPIO is not set ++# CONFIG_I2C_INTEL_MID is not set ++# CONFIG_I2C_OCORES is not set ++# CONFIG_I2C_PCA_PLATFORM is not set ++# CONFIG_I2C_PXA_PCI is not set ++# CONFIG_I2C_SIMTEC is not set ++# CONFIG_I2C_XILINX is not set ++ ++# ++# External I2C/SMBus adapter drivers ++# ++# CONFIG_I2C_DIOLAN_U2C is not set ++# CONFIG_I2C_PARPORT_LIGHT is not set ++# CONFIG_I2C_TINY_USB is not set ++ ++# ++# Other I2C/SMBus bus drivers ++# ++# CONFIG_SCx200_ACB is not set ++# CONFIG_I2C_STUB is not set ++# CONFIG_I2C_DEBUG_CORE is not set ++# CONFIG_I2C_DEBUG_ALGO is not set ++# CONFIG_I2C_DEBUG_BUS is not set ++CONFIG_SPI=y ++CONFIG_SPI_DEBUG=y ++CONFIG_GEN3_SPI=y ++CONFIG_SPI_MASTER=y ++ ++# ++# SPI Master Controller Drivers ++# ++# CONFIG_SPI_ALTERA is not set ++CONFIG_SPI_BITBANG=y ++CONFIG_SPI_GPIO=y ++# CONFIG_SPI_OC_TINY is not set ++CONFIG_SPI_PXA2XX=m ++CONFIG_SPI_PXA2XX_PCI=m ++# CONFIG_SPI_CE5XX_SPI_SLAVE is not set ++# CONFIG_SPI_SC18IS602 is not set ++# CONFIG_SPI_TOPCLIFF_PCH is not set ++# CONFIG_SPI_XCOMM is not set ++# CONFIG_SPI_XILINX is not set ++# CONFIG_SPI_DESIGNWARE is not set ++# CONFIG_SPI_LPC_SCH is not set ++ ++# ++# SPI Protocol Masters ++# ++CONFIG_SPI_SPIDEV=m ++# CONFIG_SPI_TLE62X0 is not set ++# CONFIG_HSI is not set ++ ++# ++# PPS support ++# ++CONFIG_PPS=m ++# CONFIG_PPS_DEBUG is not set ++ ++# ++# PPS clients support ++# ++# CONFIG_PPS_CLIENT_KTIMER is not set ++# CONFIG_PPS_CLIENT_LDISC is not set ++# CONFIG_PPS_CLIENT_GPIO is not set ++ ++# ++# PPS generators support ++# ++ ++# ++# PTP clock support ++# ++CONFIG_PTP_1588_CLOCK=m ++ ++# ++# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. ++# ++CONFIG_PTP_1588_CLOCK_PCH=m ++CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y ++CONFIG_ARCH_REQUIRE_GPIOLIB=y ++CONFIG_GPIOLIB=y ++CONFIG_GPIO_ACPI=y ++# CONFIG_DEBUG_GPIO is not set ++CONFIG_GPIO_SYSFS=y ++ ++# ++# Memory mapped GPIO drivers: ++# ++# CONFIG_GPIO_GENERIC_PLATFORM is not set ++# CONFIG_GPIO_IT8761E is not set ++# CONFIG_GPIO_TS5500 is not set ++CONFIG_GPIO_SCH=m ++# CONFIG_GPIO_ICH is not set ++# CONFIG_GPIO_VX855 is not set ++ ++# ++# I2C GPIO expanders: ++# ++# CONFIG_GPIO_MAX7300 is not set ++# CONFIG_GPIO_MAX732X is not set ++# CONFIG_GPIO_PCA953X is not set ++# CONFIG_GPIO_PCF857X is not set ++# CONFIG_GPIO_ADP5588 is not set ++ ++# ++# PCI GPIO expanders: ++# ++# CONFIG_GPIO_BT8XX is not set ++# CONFIG_GPIO_AMD8111 is not set ++# CONFIG_GPIO_LANGWELL is not set ++# CONFIG_GPIO_PCH is not set ++# CONFIG_GPIO_ML_IOH is not set ++# CONFIG_GPIO_RDC321X is not set ++ ++# ++# SPI GPIO expanders: ++# ++# CONFIG_GPIO_MAX7301 is not set ++# CONFIG_GPIO_MCP23S08 is not set ++# CONFIG_GPIO_MC33880 is not set ++# CONFIG_GPIO_74X164 is not set ++ ++# ++# AC97 GPIO expanders: ++# ++ ++# ++# MODULbus GPIO expanders: ++# ++ ++# ++# USB GPIO expanders: ++# ++# CONFIG_W1 is not set ++CONFIG_POWER_SUPPLY=y ++# CONFIG_POWER_SUPPLY_DEBUG is not set ++# CONFIG_PDA_POWER is not set ++# CONFIG_GENERIC_ADC_BATTERY is not set ++# CONFIG_TEST_POWER is not set ++# CONFIG_BATTERY_DS2780 is not set ++# CONFIG_BATTERY_DS2781 is not set ++# CONFIG_BATTERY_DS2782 is not set ++# CONFIG_BATTERY_SBS is not set ++# CONFIG_BATTERY_BQ27x00 is not set ++# CONFIG_BATTERY_MAX17040 is not set ++# CONFIG_BATTERY_MAX17042 is not set ++# CONFIG_CHARGER_MAX8903 is not set ++# CONFIG_CHARGER_LP8727 is not set ++# CONFIG_CHARGER_GPIO is not set ++# CONFIG_CHARGER_BQ2415X is not set ++# CONFIG_CHARGER_SMB347 is not set ++# CONFIG_POWER_RESET is not set ++# CONFIG_POWER_AVS is not set ++# CONFIG_HWMON is not set ++CONFIG_THERMAL=y ++CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y ++# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set ++# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set ++# CONFIG_FAIR_SHARE is not set ++CONFIG_STEP_WISE=y ++# CONFIG_USER_SPACE is not set ++# CONFIG_WATCHDOG is not set ++CONFIG_SSB_POSSIBLE=y ++ ++# ++# Sonics Silicon Backplane ++# ++# CONFIG_SSB is not set ++CONFIG_BCMA_POSSIBLE=y ++ ++# ++# Broadcom specific AMBA ++# ++# CONFIG_BCMA is not set ++ ++# ++# Multifunction device drivers ++# ++CONFIG_MFD_CORE=y ++# CONFIG_MFD_SM501 is not set ++# CONFIG_MFD_RTSX_PCI is not set ++# CONFIG_MFD_TI_AM335X_TSCADC is not set ++# CONFIG_HTC_PASIC3 is not set ++# CONFIG_MFD_LM3533 is not set ++# CONFIG_TPS6105X is not set ++# CONFIG_TPS65010 is not set ++# CONFIG_TPS6507X is not set ++# CONFIG_MFD_TPS65217 is not set ++# CONFIG_MFD_TPS65912_SPI is not set ++# CONFIG_MFD_STMPE is not set ++# CONFIG_MFD_TMIO is not set ++# CONFIG_MFD_DA9052_SPI is not set ++# CONFIG_MFD_ARIZONA_I2C is not set ++# CONFIG_MFD_ARIZONA_SPI is not set ++# CONFIG_MFD_WM831X_SPI is not set ++# CONFIG_MFD_PCF50633 is not set ++# CONFIG_MFD_MC13XXX_SPI is not set ++# CONFIG_MFD_MC13XXX_I2C is not set ++# CONFIG_ABX500_CORE is not set ++# CONFIG_EZX_PCAP is not set ++# CONFIG_MFD_CS5535 is not set ++# CONFIG_MFD_TIMBERDALE is not set ++CONFIG_CY8C9540A=m ++CONFIG_INTEL_CLN_GIP=m ++CONFIG_LPC_SCH=y ++# CONFIG_LPC_ICH is not set ++# CONFIG_MFD_RDC321X is not set ++# CONFIG_MFD_JANZ_CMODIO is not set ++# CONFIG_MFD_VX855 is not set ++# CONFIG_MFD_WL1273_CORE is not set ++# CONFIG_MFD_VIPERBOARD is not set ++# CONFIG_MFD_RETU is not set ++# CONFIG_REGULATOR is not set ++CONFIG_MEDIA_SUPPORT=m ++ ++# ++# Multimedia core support ++# ++CONFIG_MEDIA_CAMERA_SUPPORT=y ++# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set ++# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set ++# CONFIG_MEDIA_RADIO_SUPPORT is not set ++# CONFIG_MEDIA_RC_SUPPORT is not set ++# CONFIG_MEDIA_CONTROLLER is not set ++CONFIG_VIDEO_DEV=m ++CONFIG_VIDEO_V4L2=m ++# CONFIG_VIDEO_ADV_DEBUG is not set ++# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set ++CONFIG_VIDEOBUF2_CORE=m ++CONFIG_VIDEOBUF2_MEMOPS=m ++CONFIG_VIDEOBUF2_VMALLOC=m ++ ++# ++# Media drivers ++# ++CONFIG_MEDIA_USB_SUPPORT=y ++ ++# ++# Webcam devices ++# ++CONFIG_USB_VIDEO_CLASS=m ++CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y ++# CONFIG_USB_GSPCA is not set ++# CONFIG_USB_PWC is not set ++# CONFIG_VIDEO_CPIA2 is not set ++# CONFIG_USB_ZR364XX is not set ++# CONFIG_USB_STKWEBCAM is not set ++# CONFIG_USB_S2255 is not set ++# CONFIG_USB_SN9C102 is not set ++ ++# ++# Webcam, TV (analog/digital) USB devices ++# ++# CONFIG_VIDEO_EM28XX is not set ++# CONFIG_MEDIA_PCI_SUPPORT is not set ++# CONFIG_V4L_PLATFORM_DRIVERS is not set ++# CONFIG_V4L_MEM2MEM_DRIVERS is not set ++# CONFIG_V4L_TEST_DRIVERS is not set ++ ++# ++# Supported MMC/SDIO adapters ++# ++# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set ++ ++# ++# Media ancillary drivers (tuners, sensors, i2c, frontends) ++# ++ ++# ++# Encoders, decoders, sensors and other helper chips ++# ++ ++# ++# Audio decoders, processors and mixers ++# ++# CONFIG_VIDEO_TVAUDIO is not set ++# CONFIG_VIDEO_TDA7432 is not set ++# CONFIG_VIDEO_TDA9840 is not set ++# CONFIG_VIDEO_TEA6415C is not set ++# CONFIG_VIDEO_TEA6420 is not set ++# CONFIG_VIDEO_MSP3400 is not set ++# CONFIG_VIDEO_CS5345 is not set ++# CONFIG_VIDEO_CS53L32A is not set ++# CONFIG_VIDEO_TLV320AIC23B is not set ++# CONFIG_VIDEO_WM8775 is not set ++# CONFIG_VIDEO_WM8739 is not set ++# CONFIG_VIDEO_VP27SMPX is not set ++ ++# ++# RDS decoders ++# ++# CONFIG_VIDEO_SAA6588 is not set ++ ++# ++# Video decoders ++# ++# CONFIG_VIDEO_ADV7180 is not set ++# CONFIG_VIDEO_ADV7183 is not set ++# CONFIG_VIDEO_BT819 is not set ++# CONFIG_VIDEO_BT856 is not set ++# CONFIG_VIDEO_BT866 is not set ++# CONFIG_VIDEO_KS0127 is not set ++# CONFIG_VIDEO_SAA7110 is not set ++# CONFIG_VIDEO_SAA711X is not set ++# CONFIG_VIDEO_SAA7191 is not set ++# CONFIG_VIDEO_TVP514X is not set ++# CONFIG_VIDEO_TVP5150 is not set ++# CONFIG_VIDEO_TVP7002 is not set ++# CONFIG_VIDEO_VPX3220 is not set ++ ++# ++# Video and audio decoders ++# ++# CONFIG_VIDEO_SAA717X is not set ++# CONFIG_VIDEO_CX25840 is not set ++ ++# ++# MPEG video encoders ++# ++# CONFIG_VIDEO_CX2341X is not set ++ ++# ++# Video encoders ++# ++# CONFIG_VIDEO_SAA7127 is not set ++# CONFIG_VIDEO_SAA7185 is not set ++# CONFIG_VIDEO_ADV7170 is not set ++# CONFIG_VIDEO_ADV7175 is not set ++# CONFIG_VIDEO_ADV7343 is not set ++# CONFIG_VIDEO_ADV7393 is not set ++# CONFIG_VIDEO_AK881X is not set ++ ++# ++# Camera sensor devices ++# ++# CONFIG_VIDEO_OV7670 is not set ++# CONFIG_VIDEO_VS6624 is not set ++# CONFIG_VIDEO_MT9V011 is not set ++# CONFIG_VIDEO_TCM825X is not set ++# CONFIG_VIDEO_SR030PC30 is not set ++ ++# ++# Flash devices ++# ++ ++# ++# Video improvement chips ++# ++# CONFIG_VIDEO_UPD64031A is not set ++# CONFIG_VIDEO_UPD64083 is not set ++ ++# ++# Miscelaneous helper chips ++# ++# CONFIG_VIDEO_THS7303 is not set ++# CONFIG_VIDEO_M52790 is not set ++ ++# ++# Sensors used on soc_camera driver ++# ++ ++# ++# Customise DVB Frontends ++# ++# CONFIG_DVB_AU8522_V4L is not set ++# CONFIG_DVB_TUNER_DIB0070 is not set ++# CONFIG_DVB_TUNER_DIB0090 is not set ++ ++# ++# Tools to develop new frontends ++# ++# CONFIG_DVB_DUMMY_FE is not set ++ ++# ++# Graphics support ++# ++# CONFIG_AGP is not set ++# CONFIG_VGA_ARB is not set ++# CONFIG_VGA_SWITCHEROO is not set ++# CONFIG_DRM is not set ++# CONFIG_STUB_POULSBO is not set ++# CONFIG_VGASTATE is not set ++# CONFIG_VIDEO_OUTPUT_CONTROL is not set ++# CONFIG_FB is not set ++# CONFIG_EXYNOS_VIDEO is not set ++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set ++ ++# ++# Console display driver support ++# ++# CONFIG_VGA_CONSOLE is not set ++CONFIG_DUMMY_CONSOLE=y ++CONFIG_SOUND=m ++# CONFIG_SOUND_OSS_CORE is not set ++CONFIG_SND=m ++CONFIG_SND_TIMER=m ++CONFIG_SND_PCM=m ++CONFIG_SND_HWDEP=m ++CONFIG_SND_RAWMIDI=m ++# CONFIG_SND_SEQUENCER is not set ++# CONFIG_SND_MIXER_OSS is not set ++# CONFIG_SND_PCM_OSS is not set ++# CONFIG_SND_HRTIMER is not set ++# CONFIG_SND_RTCTIMER is not set ++# CONFIG_SND_DYNAMIC_MINORS is not set ++CONFIG_SND_SUPPORT_OLD_API=y ++CONFIG_SND_VERBOSE_PROCFS=y ++# CONFIG_SND_VERBOSE_PRINTK is not set ++# CONFIG_SND_DEBUG is not set ++CONFIG_SND_DMA_SGBUF=y ++# CONFIG_SND_RAWMIDI_SEQ is not set ++# CONFIG_SND_OPL3_LIB_SEQ is not set ++# CONFIG_SND_OPL4_LIB_SEQ is not set ++# CONFIG_SND_SBAWE_SEQ is not set ++# CONFIG_SND_EMU10K1_SEQ is not set ++CONFIG_SND_DRIVERS=y ++# CONFIG_SND_DUMMY is not set ++# CONFIG_SND_ALOOP is not set ++# CONFIG_SND_MTPAV is not set ++# CONFIG_SND_SERIAL_U16550 is not set ++# CONFIG_SND_MPU401 is not set ++CONFIG_SND_PCI=y ++# CONFIG_SND_AD1889 is not set ++# CONFIG_SND_ALS300 is not set ++# CONFIG_SND_ALS4000 is not set ++# CONFIG_SND_ALI5451 is not set ++# CONFIG_SND_ASIHPI is not set ++# CONFIG_SND_ATIIXP is not set ++# CONFIG_SND_ATIIXP_MODEM is not set ++# CONFIG_SND_AU8810 is not set ++# CONFIG_SND_AU8820 is not set ++# CONFIG_SND_AU8830 is not set ++# CONFIG_SND_AW2 is not set ++# CONFIG_SND_AZT3328 is not set ++# CONFIG_SND_BT87X is not set ++# CONFIG_SND_CA0106 is not set ++# CONFIG_SND_CMIPCI is not set ++# CONFIG_SND_OXYGEN is not set ++# CONFIG_SND_CS4281 is not set ++# CONFIG_SND_CS46XX is not set ++# CONFIG_SND_CS5530 is not set ++# CONFIG_SND_CS5535AUDIO is not set ++# CONFIG_SND_CTXFI is not set ++# CONFIG_SND_DARLA20 is not set ++# CONFIG_SND_GINA20 is not set ++# CONFIG_SND_LAYLA20 is not set ++# CONFIG_SND_DARLA24 is not set ++# CONFIG_SND_GINA24 is not set ++# CONFIG_SND_LAYLA24 is not set ++# CONFIG_SND_MONA is not set ++# CONFIG_SND_MIA is not set ++# CONFIG_SND_ECHO3G is not set ++# CONFIG_SND_INDIGO is not set ++# CONFIG_SND_INDIGOIO is not set ++# CONFIG_SND_INDIGODJ is not set ++# CONFIG_SND_INDIGOIOX is not set ++# CONFIG_SND_INDIGODJX is not set ++# CONFIG_SND_EMU10K1 is not set ++# CONFIG_SND_EMU10K1X is not set ++# CONFIG_SND_ENS1370 is not set ++# CONFIG_SND_ENS1371 is not set ++# CONFIG_SND_ES1938 is not set ++# CONFIG_SND_ES1968 is not set ++# CONFIG_SND_FM801 is not set ++# CONFIG_SND_HDA_INTEL is not set ++# CONFIG_SND_HDSP is not set ++# CONFIG_SND_HDSPM is not set ++# CONFIG_SND_ICE1712 is not set ++# CONFIG_SND_ICE1724 is not set ++# CONFIG_SND_INTEL8X0 is not set ++# CONFIG_SND_INTEL8X0M is not set ++# CONFIG_SND_KORG1212 is not set ++# CONFIG_SND_LOLA is not set ++# CONFIG_SND_LX6464ES is not set ++# CONFIG_SND_MAESTRO3 is not set ++# CONFIG_SND_MIXART is not set ++# CONFIG_SND_NM256 is not set ++# CONFIG_SND_PCXHR is not set ++# CONFIG_SND_RIPTIDE is not set ++# CONFIG_SND_RME32 is not set ++# CONFIG_SND_RME96 is not set ++# CONFIG_SND_RME9652 is not set ++# CONFIG_SND_SIS7019 is not set ++# CONFIG_SND_SONICVIBES is not set ++# CONFIG_SND_TRIDENT is not set ++# CONFIG_SND_VIA82XX is not set ++# CONFIG_SND_VIA82XX_MODEM is not set ++# CONFIG_SND_VIRTUOSO is not set ++# CONFIG_SND_VX222 is not set ++# CONFIG_SND_YMFPCI is not set ++CONFIG_SND_SPI=y ++CONFIG_SND_USB=y ++CONFIG_SND_USB_AUDIO=m ++# CONFIG_SND_USB_UA101 is not set ++# CONFIG_SND_USB_USX2Y is not set ++# CONFIG_SND_USB_CAIAQ is not set ++# CONFIG_SND_USB_US122L is not set ++# CONFIG_SND_USB_6FIRE is not set ++# CONFIG_SND_SOC is not set ++# CONFIG_SOUND_PRIME is not set ++ ++# ++# HID support ++# ++CONFIG_HID=y ++# CONFIG_HID_BATTERY_STRENGTH is not set ++# CONFIG_HIDRAW is not set ++# CONFIG_UHID is not set ++CONFIG_HID_GENERIC=y ++ ++# ++# Special HID drivers ++# ++# CONFIG_HID_A4TECH is not set ++# CONFIG_HID_ACRUX is not set ++# CONFIG_HID_APPLE is not set ++# CONFIG_HID_AUREAL is not set ++# CONFIG_HID_BELKIN is not set ++# CONFIG_HID_CHERRY is not set ++# CONFIG_HID_CHICONY is not set ++# CONFIG_HID_PRODIKEYS is not set ++# CONFIG_HID_CYPRESS is not set ++# CONFIG_HID_DRAGONRISE is not set ++# CONFIG_HID_EMS_FF is not set ++# CONFIG_HID_ELECOM is not set ++# CONFIG_HID_EZKEY is not set ++# CONFIG_HID_HOLTEK is not set ++# CONFIG_HID_KEYTOUCH is not set ++# CONFIG_HID_KYE is not set ++# CONFIG_HID_UCLOGIC is not set ++# CONFIG_HID_WALTOP is not set ++# CONFIG_HID_GYRATION is not set ++# CONFIG_HID_ICADE is not set ++# CONFIG_HID_TWINHAN is not set ++# CONFIG_HID_KENSINGTON is not set ++# CONFIG_HID_LCPOWER is not set ++# CONFIG_HID_LENOVO_TPKBD is not set ++# CONFIG_HID_LOGITECH is not set ++# CONFIG_HID_MAGICMOUSE is not set ++# CONFIG_HID_MICROSOFT is not set ++# CONFIG_HID_MONTEREY is not set ++# CONFIG_HID_MULTITOUCH is not set ++# CONFIG_HID_NTRIG is not set ++# CONFIG_HID_ORTEK is not set ++# CONFIG_HID_PANTHERLORD is not set ++# CONFIG_HID_PETALYNX is not set ++# CONFIG_HID_PICOLCD is not set ++# CONFIG_HID_PRIMAX is not set ++# CONFIG_HID_PS3REMOTE is not set ++# CONFIG_HID_ROCCAT is not set ++# CONFIG_HID_SAITEK is not set ++# CONFIG_HID_SAMSUNG is not set ++# CONFIG_HID_SONY is not set ++# CONFIG_HID_SPEEDLINK is not set ++# CONFIG_HID_SUNPLUS is not set ++# CONFIG_HID_GREENASIA is not set ++# CONFIG_HID_SMARTJOYPLUS is not set ++# CONFIG_HID_TIVO is not set ++# CONFIG_HID_TOPSEED is not set ++# CONFIG_HID_THRUSTMASTER is not set ++# CONFIG_HID_WACOM is not set ++# CONFIG_HID_WIIMOTE is not set ++# CONFIG_HID_ZEROPLUS is not set ++# CONFIG_HID_ZYDACRON is not set ++# CONFIG_HID_SENSOR_HUB is not set ++ ++# ++# USB HID support ++# ++CONFIG_USB_HID=m ++# CONFIG_HID_PID is not set ++# CONFIG_USB_HIDDEV is not set ++ ++# ++# USB HID Boot Protocol drivers ++# ++# CONFIG_USB_KBD is not set ++# CONFIG_USB_MOUSE is not set ++ ++# ++# I2C HID support ++# ++# CONFIG_I2C_HID is not set ++CONFIG_USB_ARCH_HAS_OHCI=y ++CONFIG_USB_ARCH_HAS_EHCI=y ++CONFIG_USB_ARCH_HAS_XHCI=y ++CONFIG_USB_SUPPORT=y ++CONFIG_USB_COMMON=m ++CONFIG_USB_ARCH_HAS_HCD=y ++CONFIG_USB=m ++# CONFIG_USB_DEBUG is not set ++# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set ++ ++# ++# Miscellaneous USB options ++# ++# CONFIG_USB_DYNAMIC_MINORS is not set ++# CONFIG_USB_SUSPEND is not set ++# CONFIG_USB_OTG_WHITELIST is not set ++# CONFIG_USB_OTG_BLACKLIST_HUB is not set ++# CONFIG_USB_DWC3 is not set ++# CONFIG_USB_MON is not set ++# CONFIG_USB_WUSB_CBAF is not set ++ ++# ++# USB Host Controller Drivers ++# ++# CONFIG_USB_C67X00_HCD is not set ++# CONFIG_USB_XHCI_HCD is not set ++CONFIG_USB_EHCI_HCD=m ++# CONFIG_USB_EHCI_ROOT_HUB_TT is not set ++CONFIG_USB_EHCI_TT_NEWSCHED=y ++CONFIG_USB_EHCI_PCI=m ++# CONFIG_USB_OXU210HP_HCD is not set ++# CONFIG_USB_ISP116X_HCD is not set ++# CONFIG_USB_ISP1760_HCD is not set ++# CONFIG_USB_ISP1362_HCD is not set ++CONFIG_USB_OHCI_HCD=m ++# CONFIG_USB_OHCI_HCD_PLATFORM is not set ++# CONFIG_USB_EHCI_HCD_PLATFORM is not set ++# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set ++# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set ++CONFIG_USB_OHCI_LITTLE_ENDIAN=y ++CONFIG_USB_UHCI_HCD=m ++# CONFIG_USB_SL811_HCD is not set ++# CONFIG_USB_R8A66597_HCD is not set ++# CONFIG_USB_MUSB_HDRC is not set ++# CONFIG_USB_CHIPIDEA is not set ++# CONFIG_USB_RENESAS_USBHS is not set ++ ++# ++# USB Device Class drivers ++# ++CONFIG_USB_ACM=m ++# CONFIG_USB_PRINTER is not set ++# CONFIG_USB_WDM is not set ++# CONFIG_USB_TMC is not set ++ ++# ++# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may ++# ++ ++# ++# also be needed; see USB_STORAGE Help for more info ++# ++CONFIG_USB_STORAGE=m ++# CONFIG_USB_STORAGE_DEBUG is not set ++# CONFIG_USB_STORAGE_REALTEK is not set ++# CONFIG_USB_STORAGE_DATAFAB is not set ++# CONFIG_USB_STORAGE_FREECOM is not set ++# CONFIG_USB_STORAGE_ISD200 is not set ++# CONFIG_USB_STORAGE_USBAT is not set ++# CONFIG_USB_STORAGE_SDDR09 is not set ++# CONFIG_USB_STORAGE_SDDR55 is not set ++# CONFIG_USB_STORAGE_JUMPSHOT is not set ++# CONFIG_USB_STORAGE_ALAUDA is not set ++# CONFIG_USB_STORAGE_ONETOUCH is not set ++# CONFIG_USB_STORAGE_KARMA is not set ++# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set ++# CONFIG_USB_STORAGE_ENE_UB6250 is not set ++ ++# ++# USB Imaging devices ++# ++# CONFIG_USB_MDC800 is not set ++# CONFIG_USB_MICROTEK is not set ++ ++# ++# USB port drivers ++# ++CONFIG_USB_SERIAL=m ++# CONFIG_USB_SERIAL_GENERIC is not set ++# CONFIG_USB_SERIAL_AIRCABLE is not set ++# CONFIG_USB_SERIAL_ARK3116 is not set ++# CONFIG_USB_SERIAL_BELKIN is not set ++# CONFIG_USB_SERIAL_CH341 is not set ++# CONFIG_USB_SERIAL_WHITEHEAT is not set ++# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set ++# CONFIG_USB_SERIAL_CP210X is not set ++# CONFIG_USB_SERIAL_CYPRESS_M8 is not set ++# CONFIG_USB_SERIAL_EMPEG is not set ++# CONFIG_USB_SERIAL_FTDI_SIO is not set ++# CONFIG_USB_SERIAL_FUNSOFT is not set ++# CONFIG_USB_SERIAL_VISOR is not set ++# CONFIG_USB_SERIAL_IPAQ is not set ++# CONFIG_USB_SERIAL_IR is not set ++# CONFIG_USB_SERIAL_EDGEPORT is not set ++# CONFIG_USB_SERIAL_EDGEPORT_TI is not set ++# CONFIG_USB_SERIAL_F81232 is not set ++# CONFIG_USB_SERIAL_GARMIN is not set ++# CONFIG_USB_SERIAL_IPW is not set ++# CONFIG_USB_SERIAL_IUU is not set ++# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set ++# CONFIG_USB_SERIAL_KEYSPAN is not set ++# CONFIG_USB_SERIAL_KLSI is not set ++# CONFIG_USB_SERIAL_KOBIL_SCT is not set ++# CONFIG_USB_SERIAL_MCT_U232 is not set ++# CONFIG_USB_SERIAL_METRO is not set ++# CONFIG_USB_SERIAL_MOS7720 is not set ++# CONFIG_USB_SERIAL_MOS7840 is not set ++# CONFIG_USB_SERIAL_MOTOROLA is not set ++# CONFIG_USB_SERIAL_NAVMAN is not set ++CONFIG_USB_SERIAL_PL2303=m ++# CONFIG_USB_SERIAL_OTI6858 is not set ++# CONFIG_USB_SERIAL_QCAUX is not set ++# CONFIG_USB_SERIAL_QUALCOMM is not set ++# CONFIG_USB_SERIAL_SPCP8X5 is not set ++# CONFIG_USB_SERIAL_HP4X is not set ++# CONFIG_USB_SERIAL_SAFE is not set ++# CONFIG_USB_SERIAL_SIEMENS_MPI is not set ++# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set ++# CONFIG_USB_SERIAL_SYMBOL is not set ++# CONFIG_USB_SERIAL_TI is not set ++# CONFIG_USB_SERIAL_CYBERJACK is not set ++# CONFIG_USB_SERIAL_XIRCOM is not set ++# CONFIG_USB_SERIAL_OPTION is not set ++# CONFIG_USB_SERIAL_OMNINET is not set ++# CONFIG_USB_SERIAL_OPTICON is not set ++# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set ++# CONFIG_USB_SERIAL_ZIO is not set ++# CONFIG_USB_SERIAL_ZTE is not set ++# CONFIG_USB_SERIAL_SSU100 is not set ++# CONFIG_USB_SERIAL_QT2 is not set ++# CONFIG_USB_SERIAL_DEBUG is not set ++ ++# ++# USB Miscellaneous drivers ++# ++# CONFIG_USB_EMI62 is not set ++# CONFIG_USB_EMI26 is not set ++# CONFIG_USB_ADUTUX is not set ++# CONFIG_USB_SEVSEG is not set ++# CONFIG_USB_RIO500 is not set ++# CONFIG_USB_LEGOTOWER is not set ++# CONFIG_USB_LCD is not set ++# CONFIG_USB_LED is not set ++# CONFIG_USB_CYPRESS_CY7C63 is not set ++# CONFIG_USB_CYTHERM is not set ++# CONFIG_USB_IDMOUSE is not set ++# CONFIG_USB_FTDI_ELAN is not set ++# CONFIG_USB_APPLEDISPLAY is not set ++# CONFIG_USB_SISUSBVGA is not set ++# CONFIG_USB_LD is not set ++# CONFIG_USB_TRANCEVIBRATOR is not set ++# CONFIG_USB_IOWARRIOR is not set ++# CONFIG_USB_TEST is not set ++# CONFIG_USB_ISIGHTFW is not set ++# CONFIG_USB_YUREX is not set ++# CONFIG_USB_EZUSB_FX2 is not set ++ ++# ++# USB Physical Layer drivers ++# ++# CONFIG_USB_ISP1301 is not set ++# CONFIG_USB_RCAR_PHY is not set ++CONFIG_USB_GADGET=m ++# CONFIG_USB_GADGET_DEBUG is not set ++# CONFIG_USB_GADGET_DEBUG_FILES is not set ++# CONFIG_USB_GADGET_DEBUG_FS is not set ++CONFIG_USB_GADGET_VBUS_DRAW=2 ++CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 ++ ++# ++# USB Peripheral Controller ++# ++# CONFIG_USB_R8A66597 is not set ++# CONFIG_USB_MV_UDC is not set ++# CONFIG_USB_M66592 is not set ++# CONFIG_USB_AMD5536UDC is not set ++# CONFIG_USB_NET2272 is not set ++# CONFIG_USB_NET2280 is not set ++# CONFIG_USB_GOKU is not set ++CONFIG_USB_EG20T=m ++# CONFIG_USB_DUMMY_HCD is not set ++CONFIG_USB_LIBCOMPOSITE=m ++CONFIG_USB_ZERO=m ++# CONFIG_USB_AUDIO is not set ++CONFIG_USB_ETH=m ++CONFIG_USB_ETH_RNDIS=y ++# CONFIG_USB_ETH_EEM is not set ++# CONFIG_USB_G_NCM is not set ++# CONFIG_USB_GADGETFS is not set ++# CONFIG_USB_FUNCTIONFS is not set ++CONFIG_USB_MASS_STORAGE=m ++CONFIG_USB_G_SERIAL=m ++# CONFIG_USB_MIDI_GADGET is not set ++# CONFIG_USB_G_PRINTER is not set ++# CONFIG_USB_CDC_COMPOSITE is not set ++# CONFIG_USB_G_ACM_MS is not set ++# CONFIG_USB_G_MULTI is not set ++# CONFIG_USB_G_HID is not set ++# CONFIG_USB_G_DBGP is not set ++# CONFIG_USB_G_WEBCAM is not set ++ ++# ++# OTG and related infrastructure ++# ++# CONFIG_USB_GPIO_VBUS is not set ++# CONFIG_NOP_USB_XCEIV is not set ++# CONFIG_UWB is not set ++CONFIG_MMC=m ++# CONFIG_MMC_DEBUG is not set ++# CONFIG_MMC_UNSAFE_RESUME is not set ++# CONFIG_MMC_CLKGATE is not set ++ ++# ++# MMC/SD/SDIO Card Drivers ++# ++CONFIG_MMC_BLOCK=m ++CONFIG_MMC_BLOCK_MINORS=8 ++CONFIG_MMC_BLOCK_BOUNCE=y ++# CONFIG_SDIO_UART is not set ++# CONFIG_MMC_TEST is not set ++ ++# ++# MMC/SD/SDIO Host Controller Drivers ++# ++CONFIG_MMC_SDHCI=m ++CONFIG_MMC_SDHCI_PCI=m ++# CONFIG_MMC_RICOH_MMC is not set ++# CONFIG_MMC_SDHCI_ACPI is not set ++CONFIG_MMC_SDHCI_PLTFM=m ++# CONFIG_MMC_WBSD is not set ++# CONFIG_MMC_TIFM_SD is not set ++# CONFIG_MMC_CB710 is not set ++# CONFIG_MMC_VIA_SDMMC is not set ++# CONFIG_MMC_VUB300 is not set ++# CONFIG_MMC_USHC is not set ++# CONFIG_MEMSTICK is not set ++CONFIG_NEW_LEDS=y ++CONFIG_LEDS_CLASS=m ++ ++# ++# LED drivers ++# ++# CONFIG_LEDS_LM3530 is not set ++# CONFIG_LEDS_LM3642 is not set ++# CONFIG_LEDS_PCA9532 is not set ++# CONFIG_LEDS_GPIO is not set ++# CONFIG_LEDS_LP3944 is not set ++# CONFIG_LEDS_LP5521 is not set ++# CONFIG_LEDS_LP5523 is not set ++# CONFIG_LEDS_PCA955X is not set ++# CONFIG_LEDS_PCA9633 is not set ++# CONFIG_LEDS_DAC124S085 is not set ++# CONFIG_LEDS_BD2802 is not set ++# CONFIG_LEDS_LT3593 is not set ++# CONFIG_LEDS_TCA6507 is not set ++# CONFIG_LEDS_LM355x is not set ++# CONFIG_LEDS_OT200 is not set ++# CONFIG_LEDS_BLINKM is not set ++CONFIG_LEDS_TRIGGERS=y ++ ++# ++# LED Triggers ++# ++# CONFIG_LEDS_TRIGGER_TIMER is not set ++# CONFIG_LEDS_TRIGGER_ONESHOT is not set ++# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set ++# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set ++# CONFIG_LEDS_TRIGGER_CPU is not set ++# CONFIG_LEDS_TRIGGER_GPIO is not set ++# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set ++ ++# ++# iptables trigger is under Netfilter config (LED target) ++# ++# CONFIG_LEDS_TRIGGER_TRANSIENT is not set ++# CONFIG_ACCESSIBILITY is not set ++# CONFIG_INFINIBAND is not set ++# CONFIG_EDAC is not set ++# CONFIG_RTC_CLASS is not set ++CONFIG_DMADEVICES=y ++# CONFIG_DMADEVICES_DEBUG is not set ++ ++# ++# DMA Devices ++# ++CONFIG_INTEL_MID_DMAC=m ++CONFIG_INTEL_MID_PCI=m ++CONFIG_INTEL_CLN_DMAC=m ++# CONFIG_INTEL_IOATDMA is not set ++# CONFIG_TIMB_DMA is not set ++# CONFIG_PCH_DMA is not set ++CONFIG_DMA_ENGINE=y ++ ++# ++# DMA Clients ++# ++# CONFIG_NET_DMA is not set ++# CONFIG_ASYNC_TX_DMA is not set ++# CONFIG_DMATEST is not set ++# CONFIG_AUXDISPLAY is not set ++CONFIG_UIO=m ++# CONFIG_UIO_CIF is not set ++# CONFIG_UIO_PDRV is not set ++# CONFIG_UIO_PDRV_GENIRQ is not set ++# CONFIG_UIO_DMEM_GENIRQ is not set ++# CONFIG_UIO_AEC is not set ++# CONFIG_UIO_SERCOS3 is not set ++# CONFIG_UIO_PCI_GENERIC is not set ++# CONFIG_UIO_NETX is not set ++ ++# ++# Virtio drivers ++# ++# CONFIG_VIRTIO_PCI is not set ++# CONFIG_VIRTIO_MMIO is not set ++ ++# ++# Microsoft Hyper-V guest support ++# ++# CONFIG_HYPERV is not set ++CONFIG_STAGING=y ++# CONFIG_ET131X is not set ++# CONFIG_SLICOSS is not set ++# CONFIG_USBIP_CORE is not set ++# CONFIG_W35UND is not set ++# CONFIG_PRISM2_USB is not set ++# CONFIG_ECHO is not set ++# CONFIG_COMEDI is not set ++# CONFIG_ASUS_OLED is not set ++# CONFIG_R8187SE is not set ++# CONFIG_RTL8192U is not set ++# CONFIG_RTLLIB is not set ++# CONFIG_R8712U is not set ++# CONFIG_RTS5139 is not set ++# CONFIG_TRANZPORT is not set ++# CONFIG_LINE6_USB is not set ++# CONFIG_USB_SERIAL_QUATECH2 is not set ++# CONFIG_VT6655 is not set ++# CONFIG_VT6656 is not set ++# CONFIG_DX_SEP is not set ++ ++# ++# IIO staging drivers ++# ++# CONFIG_IIO_SW_RING is not set ++ ++# ++# Accelerometers ++# ++# CONFIG_ADIS16201 is not set ++# CONFIG_ADIS16203 is not set ++# CONFIG_ADIS16204 is not set ++# CONFIG_ADIS16209 is not set ++# CONFIG_ADIS16220 is not set ++# CONFIG_ADIS16240 is not set ++# CONFIG_KXSD9 is not set ++# CONFIG_LIS3L02DQ is not set ++# CONFIG_SCA3000 is not set ++ ++# ++# Analog to digital converters ++# ++# CONFIG_AD7291 is not set ++# CONFIG_AD7606 is not set ++# CONFIG_AD799X is not set ++# CONFIG_AD7780 is not set ++# CONFIG_AD7816 is not set ++# CONFIG_AD7192 is not set ++# CONFIG_ADT7410 is not set ++# CONFIG_AD7280 is not set ++CONFIG_MAX78M6610_LMU=m ++ ++# ++# Analog digital bi-direction converters ++# ++# CONFIG_ADT7316 is not set ++ ++# ++# Capacitance to digital converters ++# ++# CONFIG_AD7150 is not set ++# CONFIG_AD7152 is not set ++# CONFIG_AD7746 is not set ++ ++# ++# Direct Digital Synthesis ++# ++# CONFIG_AD5930 is not set ++# CONFIG_AD9832 is not set ++# CONFIG_AD9834 is not set ++# CONFIG_AD9850 is not set ++# CONFIG_AD9852 is not set ++# CONFIG_AD9910 is not set ++# CONFIG_AD9951 is not set ++ ++# ++# Digital gyroscope sensors ++# ++# CONFIG_ADIS16060 is not set ++# CONFIG_ADIS16080 is not set ++# CONFIG_ADIS16130 is not set ++# CONFIG_ADIS16260 is not set ++# CONFIG_ADXRS450 is not set ++ ++# ++# Network Analyzer, Impedance Converters ++# ++# CONFIG_AD5933 is not set ++ ++# ++# Inertial measurement units ++# ++# CONFIG_ADIS16400 is not set ++ ++# ++# Light sensors ++# ++# CONFIG_SENSORS_ISL29018 is not set ++# CONFIG_SENSORS_ISL29028 is not set ++# CONFIG_SENSORS_TSL2563 is not set ++# CONFIG_TSL2583 is not set ++# CONFIG_TSL2x7x is not set ++ ++# ++# Magnetometer sensors ++# ++# CONFIG_SENSORS_AK8975 is not set ++# CONFIG_SENSORS_HMC5843 is not set ++ ++# ++# Active energy metering IC ++# ++# CONFIG_ADE7753 is not set ++# CONFIG_ADE7754 is not set ++# CONFIG_ADE7758 is not set ++# CONFIG_ADE7759 is not set ++# CONFIG_ADE7854 is not set ++ ++# ++# Resolver to digital converters ++# ++# CONFIG_AD2S90 is not set ++# CONFIG_AD2S1200 is not set ++# CONFIG_AD2S1210 is not set ++ ++# ++# Triggers - standalone ++# ++# CONFIG_IIO_GPIO_TRIGGER is not set ++CONFIG_IIO_SYSFS_TRIGGER=m ++# CONFIG_IIO_SIMPLE_DUMMY is not set ++# CONFIG_ZSMALLOC is not set ++# CONFIG_CRYSTALHD is not set ++# CONFIG_ACPI_QUICKSTART is not set ++# CONFIG_USB_ENESTORAGE is not set ++# CONFIG_BCM_WIMAX is not set ++# CONFIG_FT1000 is not set ++ ++# ++# Speakup console speech ++# ++# CONFIG_SPEAKUP is not set ++# CONFIG_TOUCHSCREEN_CLEARPAD_TM1217 is not set ++# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set ++# CONFIG_STAGING_MEDIA is not set ++ ++# ++# Android ++# ++# CONFIG_ANDROID is not set ++# CONFIG_USB_WPAN_HCD is not set ++# CONFIG_WIMAX_GDM72XX is not set ++# CONFIG_CSR_WIFI is not set ++# CONFIG_NET_VENDOR_SILICOM is not set ++# CONFIG_CED1401 is not set ++# CONFIG_DGRP is not set ++# CONFIG_SB105X is not set ++CONFIG_X86_PLATFORM_DEVICES=y ++# CONFIG_ACERHDF is not set ++# CONFIG_ASUS_LAPTOP is not set ++# CONFIG_FUJITSU_TABLET is not set ++# CONFIG_AMILO_RFKILL is not set ++# CONFIG_HP_ACCEL is not set ++# CONFIG_SONY_LAPTOP is not set ++# CONFIG_THINKPAD_ACPI is not set ++# CONFIG_SENSORS_HDAPS is not set ++# CONFIG_INTEL_MENLOW is not set ++# CONFIG_ACPI_WMI is not set ++# CONFIG_TOPSTAR_LAPTOP is not set ++# CONFIG_TOSHIBA_BT_RFKILL is not set ++# CONFIG_ACPI_CMPC is not set ++CONFIG_INTEL_CLN_ESRAM=y ++CONFIG_INTEL_CLN_ECC_REFRESH_PERIOD=24 ++CONFIG_INTEL_CLN_ECC_SCRUB=y ++# CONFIG_INTEL_CLN_ECC_SCRUB_OVERRIDE_CONFIG is not set ++# CONFIG_INTEL_CLN_ECC_SCRUB_S3_CONFIG is not set ++CONFIG_INTEL_CLN_THERMAL=y ++CONFIG_INTEL_CLN_AUDIO_CTRL=m ++# CONFIG_INTEL_IPS is not set ++# CONFIG_IBM_RTL is not set ++# CONFIG_XO15_EBOOK is not set ++ ++# ++# Hardware Spinlock drivers ++# ++CONFIG_CLKSRC_I8253=y ++CONFIG_CLKEVT_I8253=y ++CONFIG_CLKBLD_I8253=y ++# CONFIG_IOMMU_SUPPORT is not set ++ ++# ++# Remoteproc drivers (EXPERIMENTAL) ++# ++# CONFIG_STE_MODEM_RPROC is not set ++ ++# ++# Rpmsg drivers (EXPERIMENTAL) ++# ++# CONFIG_VIRT_DRIVERS is not set ++# CONFIG_PM_DEVFREQ is not set ++# CONFIG_EXTCON is not set ++# CONFIG_MEMORY is not set ++CONFIG_IIO=m ++CONFIG_IIO_BUFFER=y ++CONFIG_IIO_BUFFER_CB=y ++CONFIG_IIO_KFIFO_BUF=m ++CONFIG_IIO_TRIGGERED_BUFFER=m ++CONFIG_IIO_TRIGGER=y ++CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 ++ ++# ++# Accelerometers ++# ++CONFIG_IIO_LIS331DLH_INTEL_CLN=m ++ ++# ++# Analog to digital converters ++# ++# CONFIG_AD7266 is not set ++CONFIG_AD7298=m ++# CONFIG_AD7791 is not set ++# CONFIG_AD7793 is not set ++# CONFIG_AD7476 is not set ++# CONFIG_AD7887 is not set ++# CONFIG_MAX1363 is not set ++# CONFIG_TI_ADC081C is not set ++ ++# ++# Amplifiers ++# ++# CONFIG_AD8366 is not set ++ ++# ++# STMicro sensors ++# ++CONFIG_IIO_ST_SENSORS_I2C=m ++CONFIG_IIO_ST_SENSORS_SPI=m ++CONFIG_IIO_ST_SENSORS_CORE=m ++ ++# ++# Digital to analog converters ++# ++# CONFIG_AD5064 is not set ++# CONFIG_AD5360 is not set ++# CONFIG_AD5380 is not set ++# CONFIG_AD5421 is not set ++# CONFIG_AD5624R_SPI is not set ++# CONFIG_AD5446 is not set ++# CONFIG_AD5449 is not set ++# CONFIG_AD5504 is not set ++# CONFIG_AD5755 is not set ++# CONFIG_AD5764 is not set ++# CONFIG_AD5791 is not set ++# CONFIG_AD5686 is not set ++# CONFIG_MAX517 is not set ++# CONFIG_MCP4725 is not set ++ ++# ++# Frequency Synthesizers DDS/PLL ++# ++ ++# ++# Clock Generator/Distribution ++# ++# CONFIG_AD9523 is not set ++ ++# ++# Phase-Locked Loop (PLL) frequency synthesizers ++# ++# CONFIG_ADF4350 is not set ++ ++# ++# Digital gyroscope sensors ++# ++# CONFIG_ADIS16136 is not set ++ ++# ++# Inertial measurement units ++# ++# CONFIG_ADIS16480 is not set ++ ++# ++# Light sensors ++# ++# CONFIG_ADJD_S311 is not set ++# CONFIG_VCNL4000 is not set ++ ++# ++# Magnetometer sensors ++# ++# CONFIG_VME_BUS is not set ++CONFIG_PWM=y ++CONFIG_PWM_SYSFS=y ++# CONFIG_IPACK_BUS is not set ++ ++# ++# Firmware Drivers ++# ++# CONFIG_EDD is not set ++CONFIG_FIRMWARE_MEMMAP=y ++CONFIG_EFI_VARS=m ++# CONFIG_DELL_RBU is not set ++# CONFIG_DCDBAS is not set ++# CONFIG_ISCSI_IBFT_FIND is not set ++# CONFIG_GOOGLE_FIRMWARE is not set ++ ++# ++# File systems ++# ++CONFIG_DCACHE_WORD_ACCESS=y ++CONFIG_EXT2_FS=y ++# CONFIG_EXT2_FS_XATTR is not set ++# CONFIG_EXT2_FS_XIP is not set ++CONFIG_EXT3_FS=y ++# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set ++CONFIG_EXT3_FS_XATTR=y ++CONFIG_EXT3_FS_POSIX_ACL=y ++CONFIG_EXT3_FS_SECURITY=y ++# CONFIG_EXT4_FS is not set ++CONFIG_JBD=y ++# CONFIG_JBD_DEBUG is not set ++CONFIG_FS_MBCACHE=y ++# CONFIG_REISERFS_FS is not set ++# CONFIG_JFS_FS is not set ++# CONFIG_XFS_FS is not set ++# CONFIG_BTRFS_FS is not set ++# CONFIG_NILFS2_FS is not set ++CONFIG_FS_POSIX_ACL=y ++CONFIG_FILE_LOCKING=y ++CONFIG_FSNOTIFY=y ++CONFIG_DNOTIFY=y ++CONFIG_INOTIFY_USER=y ++# CONFIG_FANOTIFY is not set ++# CONFIG_QUOTA is not set ++# CONFIG_QUOTACTL is not set ++# CONFIG_AUTOFS4_FS is not set ++# CONFIG_FUSE_FS is not set ++CONFIG_GENERIC_ACL=y ++ ++# ++# Caches ++# ++# CONFIG_FSCACHE is not set ++ ++# ++# CD-ROM/DVD Filesystems ++# ++# CONFIG_ISO9660_FS is not set ++# CONFIG_UDF_FS is not set ++ ++# ++# DOS/FAT/NT Filesystems ++# ++CONFIG_FAT_FS=y ++# CONFIG_MSDOS_FS is not set ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_CODEPAGE=437 ++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" ++# CONFIG_NTFS_FS is not set ++ ++# ++# Pseudo filesystems ++# ++CONFIG_PROC_FS=y ++CONFIG_PROC_KCORE=y ++CONFIG_PROC_SYSCTL=y ++CONFIG_PROC_PAGE_MONITOR=y ++CONFIG_SYSFS=y ++CONFIG_TMPFS=y ++CONFIG_TMPFS_POSIX_ACL=y ++CONFIG_TMPFS_XATTR=y ++CONFIG_HUGETLBFS=y ++CONFIG_HUGETLB_PAGE=y ++# CONFIG_CONFIGFS_FS is not set ++# CONFIG_MISC_FILESYSTEMS is not set ++CONFIG_NETWORK_FILESYSTEMS=y ++# CONFIG_NFS_FS is not set ++# CONFIG_NFSD is not set ++# CONFIG_CEPH_FS is not set ++# CONFIG_CIFS is not set ++# CONFIG_NCP_FS is not set ++# CONFIG_CODA_FS is not set ++# CONFIG_AFS_FS is not set ++CONFIG_NLS=y ++CONFIG_NLS_DEFAULT="utf8" ++CONFIG_NLS_CODEPAGE_437=y ++# CONFIG_NLS_CODEPAGE_737 is not set ++# CONFIG_NLS_CODEPAGE_775 is not set ++CONFIG_NLS_CODEPAGE_850=y ++# CONFIG_NLS_CODEPAGE_852 is not set ++# CONFIG_NLS_CODEPAGE_855 is not set ++# CONFIG_NLS_CODEPAGE_857 is not set ++# CONFIG_NLS_CODEPAGE_860 is not set ++# CONFIG_NLS_CODEPAGE_861 is not set ++# CONFIG_NLS_CODEPAGE_862 is not set ++# CONFIG_NLS_CODEPAGE_863 is not set ++# CONFIG_NLS_CODEPAGE_864 is not set ++# CONFIG_NLS_CODEPAGE_865 is not set ++# CONFIG_NLS_CODEPAGE_866 is not set ++# CONFIG_NLS_CODEPAGE_869 is not set ++# CONFIG_NLS_CODEPAGE_936 is not set ++# CONFIG_NLS_CODEPAGE_950 is not set ++# CONFIG_NLS_CODEPAGE_932 is not set ++# CONFIG_NLS_CODEPAGE_949 is not set ++# CONFIG_NLS_CODEPAGE_874 is not set ++# CONFIG_NLS_ISO8859_8 is not set ++# CONFIG_NLS_CODEPAGE_1250 is not set ++# CONFIG_NLS_CODEPAGE_1251 is not set ++CONFIG_NLS_ASCII=y ++CONFIG_NLS_ISO8859_1=y ++# CONFIG_NLS_ISO8859_2 is not set ++# CONFIG_NLS_ISO8859_3 is not set ++# CONFIG_NLS_ISO8859_4 is not set ++# CONFIG_NLS_ISO8859_5 is not set ++# CONFIG_NLS_ISO8859_6 is not set ++# CONFIG_NLS_ISO8859_7 is not set ++# CONFIG_NLS_ISO8859_9 is not set ++# CONFIG_NLS_ISO8859_13 is not set ++# CONFIG_NLS_ISO8859_14 is not set ++# CONFIG_NLS_ISO8859_15 is not set ++# CONFIG_NLS_KOI8_R is not set ++# CONFIG_NLS_KOI8_U is not set ++# CONFIG_NLS_MAC_ROMAN is not set ++# CONFIG_NLS_MAC_CELTIC is not set ++# CONFIG_NLS_MAC_CENTEURO is not set ++# CONFIG_NLS_MAC_CROATIAN is not set ++# CONFIG_NLS_MAC_CYRILLIC is not set ++# CONFIG_NLS_MAC_GAELIC is not set ++# CONFIG_NLS_MAC_GREEK is not set ++# CONFIG_NLS_MAC_ICELAND is not set ++# CONFIG_NLS_MAC_INUIT is not set ++# CONFIG_NLS_MAC_ROMANIAN is not set ++# CONFIG_NLS_MAC_TURKISH is not set ++# CONFIG_NLS_UTF8 is not set ++ ++# ++# Kernel hacking ++# ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y ++CONFIG_PRINTK_TIME=y ++CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 ++# CONFIG_ENABLE_WARN_DEPRECATED is not set ++CONFIG_ENABLE_MUST_CHECK=y ++CONFIG_FRAME_WARN=2048 ++CONFIG_MAGIC_SYSRQ=y ++# CONFIG_STRIP_ASM_SYMS is not set ++# CONFIG_READABLE_ASM is not set ++# CONFIG_UNUSED_SYMBOLS is not set ++CONFIG_DEBUG_FS=y ++CONFIG_HEADERS_CHECK=y ++# CONFIG_DEBUG_SECTION_MISMATCH is not set ++CONFIG_DEBUG_KERNEL=y ++# CONFIG_DEBUG_SHIRQ is not set ++# CONFIG_LOCKUP_DETECTOR is not set ++# CONFIG_PANIC_ON_OOPS is not set ++CONFIG_PANIC_ON_OOPS_VALUE=0 ++# CONFIG_DETECT_HUNG_TASK is not set ++# CONFIG_SCHED_DEBUG is not set ++# CONFIG_SCHEDSTATS is not set ++CONFIG_TIMER_STATS=y ++# CONFIG_DEBUG_OBJECTS is not set ++# CONFIG_SLUB_DEBUG_ON is not set ++# CONFIG_SLUB_STATS is not set ++CONFIG_HAVE_DEBUG_KMEMLEAK=y ++# CONFIG_DEBUG_KMEMLEAK is not set ++# CONFIG_DEBUG_RT_MUTEXES is not set ++# CONFIG_RT_MUTEX_TESTER is not set ++CONFIG_DEBUG_SPINLOCK=y ++CONFIG_DEBUG_MUTEXES=y ++CONFIG_DEBUG_LOCK_ALLOC=y ++CONFIG_PROVE_LOCKING=y ++# CONFIG_PROVE_RCU is not set ++# CONFIG_SPARSE_RCU_POINTER is not set ++CONFIG_LOCKDEP=y ++# CONFIG_LOCK_STAT is not set ++# CONFIG_DEBUG_LOCKDEP is not set ++CONFIG_TRACE_IRQFLAGS=y ++# CONFIG_DEBUG_ATOMIC_SLEEP is not set ++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set ++CONFIG_STACKTRACE=y ++# CONFIG_DEBUG_STACK_USAGE is not set ++# CONFIG_DEBUG_KOBJECT is not set ++# CONFIG_DEBUG_HIGHMEM is not set ++CONFIG_DEBUG_BUGVERBOSE=y ++# CONFIG_DEBUG_INFO is not set ++# CONFIG_DEBUG_VM is not set ++# CONFIG_DEBUG_VIRTUAL is not set ++# CONFIG_DEBUG_WRITECOUNT is not set ++CONFIG_DEBUG_MEMORY_INIT=y ++# CONFIG_DEBUG_LIST is not set ++# CONFIG_TEST_LIST_SORT is not set ++# CONFIG_DEBUG_SG is not set ++# CONFIG_DEBUG_NOTIFIERS is not set ++# CONFIG_DEBUG_CREDENTIALS is not set ++CONFIG_ARCH_WANT_FRAME_POINTERS=y ++CONFIG_FRAME_POINTER=y ++# CONFIG_BOOT_PRINTK_DELAY is not set ++# CONFIG_RCU_TORTURE_TEST is not set ++# CONFIG_RCU_TRACE is not set ++# CONFIG_BACKTRACE_SELF_TEST is not set ++# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set ++# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set ++# CONFIG_LKDTM is not set ++# CONFIG_NOTIFIER_ERROR_INJECTION is not set ++# CONFIG_FAULT_INJECTION is not set ++# CONFIG_LATENCYTOP is not set ++# CONFIG_DEBUG_PAGEALLOC is not set ++CONFIG_USER_STACKTRACE_SUPPORT=y ++CONFIG_HAVE_FUNCTION_TRACER=y ++CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y ++CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST=y ++CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y ++CONFIG_HAVE_DYNAMIC_FTRACE=y ++CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y ++CONFIG_HAVE_SYSCALL_TRACEPOINTS=y ++CONFIG_HAVE_C_RECORDMCOUNT=y ++CONFIG_TRACING_SUPPORT=y ++# CONFIG_FTRACE is not set ++# CONFIG_RBTREE_TEST is not set ++# CONFIG_INTERVAL_TREE_TEST is not set ++# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set ++# CONFIG_BUILD_DOCSRC is not set ++# CONFIG_DYNAMIC_DEBUG is not set ++# CONFIG_DMA_API_DEBUG is not set ++# CONFIG_ATOMIC64_SELFTEST is not set ++# CONFIG_SAMPLES is not set ++CONFIG_HAVE_ARCH_KGDB=y ++# CONFIG_KGDB is not set ++CONFIG_HAVE_ARCH_KMEMCHECK=y ++# CONFIG_KMEMCHECK is not set ++# CONFIG_TEST_KSTRTOX is not set ++# CONFIG_STRICT_DEVMEM is not set ++CONFIG_X86_VERBOSE_BOOTUP=y ++CONFIG_EARLY_PRINTK=y ++# CONFIG_EARLY_PRINTK_DBGP is not set ++CONFIG_DEBUG_STACKOVERFLOW=y ++CONFIG_X86_PTDUMP=y ++CONFIG_DEBUG_RODATA=y ++# CONFIG_DEBUG_RODATA_TEST is not set ++CONFIG_DEBUG_SET_MODULE_RONX=y ++# CONFIG_DEBUG_NX_TEST is not set ++# CONFIG_DOUBLEFAULT is not set ++# CONFIG_IOMMU_STRESS is not set ++CONFIG_HAVE_MMIOTRACE_SUPPORT=y ++CONFIG_IO_DELAY_TYPE_0X80=0 ++CONFIG_IO_DELAY_TYPE_0XED=1 ++CONFIG_IO_DELAY_TYPE_UDELAY=2 ++CONFIG_IO_DELAY_TYPE_NONE=3 ++CONFIG_IO_DELAY_0X80=y ++# CONFIG_IO_DELAY_0XED is not set ++# CONFIG_IO_DELAY_UDELAY is not set ++# CONFIG_IO_DELAY_NONE is not set ++CONFIG_DEFAULT_IO_DELAY_TYPE=0 ++CONFIG_DEBUG_BOOT_PARAMS=y ++# CONFIG_CPA_DEBUG is not set ++CONFIG_OPTIMIZE_INLINING=y ++# CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set ++# CONFIG_DEBUG_NMI_SELFTEST is not set ++ ++# ++# Security options ++# ++CONFIG_KEYS=y ++# CONFIG_ENCRYPTED_KEYS is not set ++CONFIG_KEYS_DEBUG_PROC_KEYS=y ++# CONFIG_SECURITY_DMESG_RESTRICT is not set ++CONFIG_SECURITY=y ++# CONFIG_SECURITYFS is not set ++CONFIG_SECURITY_NETWORK=y ++# CONFIG_SECURITY_NETWORK_XFRM is not set ++# CONFIG_SECURITY_PATH is not set ++# CONFIG_SECURITY_SMACK is not set ++# CONFIG_SECURITY_TOMOYO is not set ++# CONFIG_SECURITY_APPARMOR is not set ++# CONFIG_SECURITY_YAMA is not set ++# CONFIG_IMA is not set ++# CONFIG_EVM is not set ++CONFIG_DEFAULT_SECURITY_DAC=y ++CONFIG_DEFAULT_SECURITY="" ++CONFIG_CRYPTO=y ++ ++# ++# Crypto core or helper ++# ++CONFIG_CRYPTO_ALGAPI=y ++CONFIG_CRYPTO_ALGAPI2=y ++CONFIG_CRYPTO_AEAD2=y ++CONFIG_CRYPTO_BLKCIPHER=m ++CONFIG_CRYPTO_BLKCIPHER2=y ++CONFIG_CRYPTO_HASH=y ++CONFIG_CRYPTO_HASH2=y ++CONFIG_CRYPTO_RNG=m ++CONFIG_CRYPTO_RNG2=y ++CONFIG_CRYPTO_PCOMP2=y ++CONFIG_CRYPTO_MANAGER=m ++CONFIG_CRYPTO_MANAGER2=y ++# CONFIG_CRYPTO_USER is not set ++CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y ++# CONFIG_CRYPTO_GF128MUL is not set ++# CONFIG_CRYPTO_NULL is not set ++CONFIG_CRYPTO_WORKQUEUE=y ++# CONFIG_CRYPTO_CRYPTD is not set ++# CONFIG_CRYPTO_AUTHENC is not set ++# CONFIG_CRYPTO_TEST is not set ++ ++# ++# Authenticated Encryption with Associated Data ++# ++# CONFIG_CRYPTO_CCM is not set ++# CONFIG_CRYPTO_GCM is not set ++# CONFIG_CRYPTO_SEQIV is not set ++ ++# ++# Block modes ++# ++# CONFIG_CRYPTO_CBC is not set ++# CONFIG_CRYPTO_CTR is not set ++# CONFIG_CRYPTO_CTS is not set ++CONFIG_CRYPTO_ECB=m ++# CONFIG_CRYPTO_LRW is not set ++# CONFIG_CRYPTO_PCBC is not set ++# CONFIG_CRYPTO_XTS is not set ++ ++# ++# Hash modes ++# ++# CONFIG_CRYPTO_HMAC is not set ++# CONFIG_CRYPTO_XCBC is not set ++# CONFIG_CRYPTO_VMAC is not set ++ ++# ++# Digest ++# ++CONFIG_CRYPTO_CRC32C=y ++# CONFIG_CRYPTO_CRC32C_INTEL is not set ++# CONFIG_CRYPTO_GHASH is not set ++# CONFIG_CRYPTO_MD4 is not set ++# CONFIG_CRYPTO_MD5 is not set ++# CONFIG_CRYPTO_MICHAEL_MIC is not set ++# CONFIG_CRYPTO_RMD128 is not set ++# CONFIG_CRYPTO_RMD160 is not set ++# CONFIG_CRYPTO_RMD256 is not set ++# CONFIG_CRYPTO_RMD320 is not set ++# CONFIG_CRYPTO_SHA1 is not set ++CONFIG_CRYPTO_SHA256=m ++# CONFIG_CRYPTO_SHA512 is not set ++# CONFIG_CRYPTO_TGR192 is not set ++# CONFIG_CRYPTO_WP512 is not set ++ ++# ++# Ciphers ++# ++CONFIG_CRYPTO_AES=y ++# CONFIG_CRYPTO_AES_586 is not set ++# CONFIG_CRYPTO_AES_NI_INTEL is not set ++# CONFIG_CRYPTO_ANUBIS is not set ++CONFIG_CRYPTO_ARC4=m ++# CONFIG_CRYPTO_BLOWFISH is not set ++# CONFIG_CRYPTO_CAMELLIA is not set ++# CONFIG_CRYPTO_CAST5 is not set ++# CONFIG_CRYPTO_CAST6 is not set ++# CONFIG_CRYPTO_DES is not set ++# CONFIG_CRYPTO_FCRYPT is not set ++# CONFIG_CRYPTO_KHAZAD is not set ++# CONFIG_CRYPTO_SALSA20 is not set ++# CONFIG_CRYPTO_SALSA20_586 is not set ++# CONFIG_CRYPTO_SEED is not set ++# CONFIG_CRYPTO_SERPENT is not set ++# CONFIG_CRYPTO_SERPENT_SSE2_586 is not set ++# CONFIG_CRYPTO_TEA is not set ++# CONFIG_CRYPTO_TWOFISH is not set ++# CONFIG_CRYPTO_TWOFISH_586 is not set ++ ++# ++# Compression ++# ++# CONFIG_CRYPTO_DEFLATE is not set ++# CONFIG_CRYPTO_ZLIB is not set ++# CONFIG_CRYPTO_LZO is not set ++ ++# ++# Random Number Generation ++# ++CONFIG_CRYPTO_ANSI_CPRNG=m ++# CONFIG_CRYPTO_USER_API_HASH is not set ++# CONFIG_CRYPTO_USER_API_SKCIPHER is not set ++CONFIG_CRYPTO_HW=y ++# CONFIG_CRYPTO_DEV_PADLOCK is not set ++# CONFIG_CRYPTO_DEV_GEODE is not set ++# CONFIG_ASYMMETRIC_KEY_TYPE is not set ++CONFIG_HAVE_KVM=y ++# CONFIG_VIRTUALIZATION is not set ++# CONFIG_BINARY_PRINTF is not set ++ ++# ++# Library routines ++# ++CONFIG_BITREVERSE=y ++CONFIG_GENERIC_STRNCPY_FROM_USER=y ++CONFIG_GENERIC_STRNLEN_USER=y ++CONFIG_GENERIC_FIND_FIRST_BIT=y ++CONFIG_GENERIC_PCI_IOMAP=y ++CONFIG_GENERIC_IOMAP=y ++CONFIG_GENERIC_IO=y ++CONFIG_PERCPU_RWSEM=y ++CONFIG_CRC_CCITT=m ++CONFIG_CRC16=y ++CONFIG_CRC_T10DIF=y ++# CONFIG_CRC_ITU_T is not set ++CONFIG_CRC32=y ++# CONFIG_CRC32_SELFTEST is not set ++CONFIG_CRC32_SLICEBY8=y ++# CONFIG_CRC32_SLICEBY4 is not set ++# CONFIG_CRC32_SARWATE is not set ++# CONFIG_CRC32_BIT is not set ++# CONFIG_CRC7 is not set ++# CONFIG_LIBCRC32C is not set ++# CONFIG_CRC8 is not set ++CONFIG_ZLIB_INFLATE=y ++CONFIG_ZLIB_DEFLATE=m ++# CONFIG_XZ_DEC is not set ++# CONFIG_XZ_DEC_BCJ is not set ++CONFIG_DECOMPRESS_GZIP=y ++CONFIG_DECOMPRESS_BZIP2=y ++CONFIG_DECOMPRESS_LZMA=y ++CONFIG_HAS_IOMEM=y ++CONFIG_HAS_IOPORT=y ++CONFIG_HAS_DMA=y ++CONFIG_DQL=y ++CONFIG_NLATTR=y ++CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y ++CONFIG_AVERAGE=y ++# CONFIG_CORDIC is not set ++# CONFIG_DDR is not set +diff --git a/.meta/cfg/kernel-cache/bsp/clanton/clanton_emutex.cfg b/.meta/cfg/kernel-cache/bsp/clanton/clanton_emutex.cfg +new file mode 100644 +index 0000000..f032487 +--- /dev/null ++++ b/.meta/cfg/kernel-cache/bsp/clanton/clanton_emutex.cfg +@@ -0,0 +1,2938 @@ ++# ++# Automatically generated file; DO NOT EDIT. ++# Linux/i386 3.8.7 Kernel Configuration ++# ++# CONFIG_64BIT is not set ++CONFIG_X86_32=y ++CONFIG_X86=y ++CONFIG_INSTRUCTION_DECODER=y ++CONFIG_OUTPUT_FORMAT="elf32-i386" ++CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig" ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_HAVE_LATENCYTOP_SUPPORT=y ++CONFIG_MMU=y ++CONFIG_NEED_SG_DMA_LENGTH=y ++CONFIG_GENERIC_ISA_DMA=y ++CONFIG_GENERIC_BUG=y ++CONFIG_GENERIC_HWEIGHT=y ++CONFIG_GENERIC_GPIO=y ++CONFIG_ARCH_MAY_HAVE_PC_FDC=y ++CONFIG_RWSEM_XCHGADD_ALGORITHM=y ++CONFIG_GENERIC_CALIBRATE_DELAY=y ++CONFIG_ARCH_HAS_CPU_RELAX=y ++CONFIG_ARCH_HAS_DEFAULT_IDLE=y ++CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y ++CONFIG_ARCH_HAS_CPU_AUTOPROBE=y ++CONFIG_HAVE_SETUP_PER_CPU_AREA=y ++CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y ++CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y ++CONFIG_ARCH_HIBERNATION_POSSIBLE=y ++CONFIG_ARCH_SUSPEND_POSSIBLE=y ++# CONFIG_ZONE_DMA32 is not set ++# CONFIG_AUDIT_ARCH is not set ++CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y ++CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y ++CONFIG_X86_32_LAZY_GS=y ++CONFIG_ARCH_HWEIGHT_CFLAGS="-fcall-saved-ecx -fcall-saved-edx" ++CONFIG_ARCH_SUPPORTS_UPROBES=y ++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" ++CONFIG_HAVE_IRQ_WORK=y ++CONFIG_IRQ_WORK=y ++CONFIG_BUILDTIME_EXTABLE_SORT=y ++ ++# ++# General setup ++# ++CONFIG_EXPERIMENTAL=y ++CONFIG_BROKEN_ON_SMP=y ++CONFIG_INIT_ENV_ARG_LIMIT=32 ++CONFIG_CROSS_COMPILE="" ++CONFIG_LOCALVERSION="" ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_HAVE_KERNEL_GZIP=y ++CONFIG_HAVE_KERNEL_BZIP2=y ++CONFIG_HAVE_KERNEL_LZMA=y ++CONFIG_HAVE_KERNEL_XZ=y ++CONFIG_HAVE_KERNEL_LZO=y ++# CONFIG_KERNEL_GZIP is not set ++# CONFIG_KERNEL_BZIP2 is not set ++CONFIG_KERNEL_LZMA=y ++# CONFIG_KERNEL_XZ is not set ++# CONFIG_KERNEL_LZO is not set ++CONFIG_DEFAULT_HOSTNAME="(none)" ++# CONFIG_SWAP is not set ++CONFIG_SYSVIPC=y ++CONFIG_SYSVIPC_SYSCTL=y ++CONFIG_POSIX_MQUEUE=y ++CONFIG_POSIX_MQUEUE_SYSCTL=y ++# CONFIG_FHANDLE is not set ++# CONFIG_AUDIT is not set ++CONFIG_HAVE_GENERIC_HARDIRQS=y ++ ++# ++# IRQ subsystem ++# ++CONFIG_GENERIC_HARDIRQS=y ++CONFIG_GENERIC_IRQ_PROBE=y ++CONFIG_GENERIC_IRQ_SHOW=y ++CONFIG_GENERIC_IRQ_CHIP=y ++CONFIG_IRQ_DOMAIN=y ++# CONFIG_IRQ_DOMAIN_DEBUG is not set ++CONFIG_IRQ_FORCED_THREADING=y ++CONFIG_SPARSE_IRQ=y ++CONFIG_CLOCKSOURCE_WATCHDOG=y ++CONFIG_KTIME_SCALAR=y ++CONFIG_GENERIC_CLOCKEVENTS=y ++CONFIG_GENERIC_CLOCKEVENTS_BUILD=y ++CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y ++CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y ++CONFIG_GENERIC_CMOS_UPDATE=y ++ ++# ++# Timers subsystem ++# ++CONFIG_TICK_ONESHOT=y ++CONFIG_NO_HZ=y ++CONFIG_HIGH_RES_TIMERS=y ++ ++# ++# CPU/Task time and stats accounting ++# ++CONFIG_TICK_CPU_ACCOUNTING=y ++# CONFIG_IRQ_TIME_ACCOUNTING is not set ++CONFIG_BSD_PROCESS_ACCT=y ++# CONFIG_BSD_PROCESS_ACCT_V3 is not set ++# CONFIG_TASKSTATS is not set ++ ++# ++# RCU Subsystem ++# ++CONFIG_TINY_RCU=y ++# CONFIG_PREEMPT_RCU is not set ++# CONFIG_TREE_RCU_TRACE is not set ++CONFIG_IKCONFIG=y ++CONFIG_IKCONFIG_PROC=y ++CONFIG_LOG_BUF_SHIFT=18 ++CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y ++CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y ++CONFIG_ARCH_WANTS_PROT_NUMA_PROT_NONE=y ++CONFIG_CGROUPS=y ++# CONFIG_CGROUP_DEBUG is not set ++CONFIG_CGROUP_FREEZER=y ++# CONFIG_CGROUP_DEVICE is not set ++CONFIG_CPUSETS=y ++CONFIG_PROC_PID_CPUSET=y ++CONFIG_CGROUP_CPUACCT=y ++CONFIG_RESOURCE_COUNTERS=y ++# CONFIG_MEMCG is not set ++# CONFIG_CGROUP_HUGETLB is not set ++# CONFIG_CGROUP_PERF is not set ++CONFIG_CGROUP_SCHED=y ++CONFIG_FAIR_GROUP_SCHED=y ++# CONFIG_CFS_BANDWIDTH is not set ++# CONFIG_RT_GROUP_SCHED is not set ++# CONFIG_BLK_CGROUP is not set ++# CONFIG_CHECKPOINT_RESTORE is not set ++CONFIG_NAMESPACES=y ++CONFIG_UTS_NS=y ++CONFIG_IPC_NS=y ++# CONFIG_USER_NS is not set ++CONFIG_PID_NS=y ++CONFIG_NET_NS=y ++CONFIG_UIDGID_CONVERTED=y ++# CONFIG_UIDGID_STRICT_TYPE_CHECKS is not set ++# CONFIG_SCHED_AUTOGROUP is not set ++# CONFIG_SYSFS_DEPRECATED is not set ++CONFIG_RELAY=y ++CONFIG_BLK_DEV_INITRD=y ++CONFIG_INITRAMFS_SOURCE="" ++CONFIG_RD_GZIP=y ++CONFIG_RD_BZIP2=y ++CONFIG_RD_LZMA=y ++# CONFIG_RD_XZ is not set ++# CONFIG_RD_LZO is not set ++# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set ++CONFIG_SYSCTL=y ++CONFIG_ANON_INODES=y ++CONFIG_EXPERT=y ++CONFIG_HAVE_UID16=y ++CONFIG_UID16=y ++CONFIG_SYSCTL_SYSCALL=y ++CONFIG_SYSCTL_EXCEPTION_TRACE=y ++CONFIG_KALLSYMS=y ++CONFIG_KALLSYMS_ALL=y ++CONFIG_HOTPLUG=y ++CONFIG_PRINTK=y ++CONFIG_BUG=y ++CONFIG_ELF_CORE=y ++# CONFIG_PCSPKR_PLATFORM is not set ++CONFIG_HAVE_PCSPKR_PLATFORM=y ++CONFIG_BASE_FULL=y ++CONFIG_FUTEX=y ++CONFIG_EPOLL=y ++CONFIG_SIGNALFD=y ++CONFIG_TIMERFD=y ++CONFIG_EVENTFD=y ++CONFIG_SHMEM=y ++CONFIG_AIO=y ++CONFIG_EMBEDDED=y ++CONFIG_HAVE_PERF_EVENTS=y ++ ++# ++# Kernel Performance Events And Counters ++# ++CONFIG_PERF_EVENTS=y ++# CONFIG_DEBUG_PERF_USE_VMALLOC is not set ++CONFIG_VM_EVENT_COUNTERS=y ++CONFIG_PCI_QUIRKS=y ++CONFIG_SLUB_DEBUG=y ++# CONFIG_COMPAT_BRK is not set ++# CONFIG_SLAB is not set ++CONFIG_SLUB=y ++# CONFIG_SLOB is not set ++# CONFIG_PROFILING is not set ++CONFIG_HAVE_OPROFILE=y ++CONFIG_OPROFILE_NMI_TIMER=y ++# CONFIG_KPROBES is not set ++CONFIG_JUMP_LABEL=y ++CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y ++CONFIG_HAVE_IOREMAP_PROT=y ++CONFIG_HAVE_KPROBES=y ++CONFIG_HAVE_KRETPROBES=y ++CONFIG_HAVE_OPTPROBES=y ++CONFIG_HAVE_ARCH_TRACEHOOK=y ++CONFIG_HAVE_DMA_ATTRS=y ++CONFIG_HAVE_DMA_CONTIGUOUS=y ++CONFIG_GENERIC_SMP_IDLE_THREAD=y ++CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y ++CONFIG_HAVE_DMA_API_DEBUG=y ++CONFIG_HAVE_HW_BREAKPOINT=y ++CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y ++CONFIG_HAVE_USER_RETURN_NOTIFIER=y ++CONFIG_HAVE_PERF_EVENTS_NMI=y ++CONFIG_HAVE_PERF_REGS=y ++CONFIG_HAVE_PERF_USER_STACK_DUMP=y ++CONFIG_HAVE_ARCH_JUMP_LABEL=y ++CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y ++CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y ++CONFIG_HAVE_CMPXCHG_LOCAL=y ++CONFIG_HAVE_CMPXCHG_DOUBLE=y ++CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y ++CONFIG_HAVE_ARCH_SECCOMP_FILTER=y ++CONFIG_SECCOMP_FILTER=y ++CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y ++CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y ++CONFIG_MODULES_USE_ELF_REL=y ++CONFIG_GENERIC_SIGALTSTACK=y ++CONFIG_CLONE_BACKWARDS=y ++ ++# ++# GCOV-based kernel profiling ++# ++# CONFIG_GCOV_KERNEL is not set ++CONFIG_HAVE_GENERIC_DMA_COHERENT=y ++CONFIG_SLABINFO=y ++CONFIG_RT_MUTEXES=y ++CONFIG_BASE_SMALL=0 ++CONFIG_MODULES=y ++# CONFIG_MODULE_FORCE_LOAD is not set ++CONFIG_MODULE_UNLOAD=y ++# CONFIG_MODULE_FORCE_UNLOAD is not set ++# CONFIG_MODVERSIONS is not set ++# CONFIG_MODULE_SRCVERSION_ALL is not set ++# CONFIG_MODULE_SIG is not set ++CONFIG_BLOCK=y ++# CONFIG_LBDAF is not set ++CONFIG_BLK_DEV_BSG=y ++# CONFIG_BLK_DEV_BSGLIB is not set ++# CONFIG_BLK_DEV_INTEGRITY is not set ++ ++# ++# Partition Types ++# ++CONFIG_PARTITION_ADVANCED=y ++# CONFIG_ACORN_PARTITION is not set ++# CONFIG_OSF_PARTITION is not set ++# CONFIG_AMIGA_PARTITION is not set ++# CONFIG_ATARI_PARTITION is not set ++# CONFIG_MAC_PARTITION is not set ++CONFIG_MSDOS_PARTITION=y ++CONFIG_BSD_DISKLABEL=y ++# CONFIG_MINIX_SUBPARTITION is not set ++# CONFIG_SOLARIS_X86_PARTITION is not set ++# CONFIG_UNIXWARE_DISKLABEL is not set ++# CONFIG_LDM_PARTITION is not set ++# CONFIG_SGI_PARTITION is not set ++# CONFIG_ULTRIX_PARTITION is not set ++# CONFIG_SUN_PARTITION is not set ++# CONFIG_KARMA_PARTITION is not set ++# CONFIG_EFI_PARTITION is not set ++# CONFIG_SYSV68_PARTITION is not set ++ ++# ++# IO Schedulers ++# ++CONFIG_IOSCHED_NOOP=y ++CONFIG_IOSCHED_DEADLINE=y ++CONFIG_IOSCHED_CFQ=y ++# CONFIG_DEFAULT_DEADLINE is not set ++CONFIG_DEFAULT_CFQ=y ++# CONFIG_DEFAULT_NOOP is not set ++CONFIG_DEFAULT_IOSCHED="cfq" ++CONFIG_UNINLINE_SPIN_UNLOCK=y ++CONFIG_FREEZER=y ++ ++# ++# Processor type and features ++# ++# CONFIG_ZONE_DMA is not set ++# CONFIG_SMP is not set ++CONFIG_X86_MPPARSE=y ++CONFIG_X86_EXTENDED_PLATFORM=y ++CONFIG_INTEL_QUARK_X1000_SOC=y ++# CONFIG_X86_WANT_INTEL_MID is not set ++# CONFIG_X86_RDC321X is not set ++CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y ++ ++# ++# Intel Media SOC Gen3 support ++# ++CONFIG_ARCH_GEN3=y ++# CONFIG_X86_32_IRIS is not set ++CONFIG_SCHED_OMIT_FRAME_POINTER=y ++# CONFIG_PARAVIRT_GUEST is not set ++CONFIG_NO_BOOTMEM=y ++# CONFIG_MEMTEST is not set ++# CONFIG_M486 is not set ++# CONFIG_M586 is not set ++CONFIG_M586TSC=y ++# CONFIG_M586MMX is not set ++# CONFIG_M686 is not set ++# CONFIG_MPENTIUMII is not set ++# CONFIG_MPENTIUMIII is not set ++# CONFIG_MPENTIUMM is not set ++# CONFIG_MPENTIUM4 is not set ++# CONFIG_MK6 is not set ++# CONFIG_MK7 is not set ++# CONFIG_MK8 is not set ++# CONFIG_MCRUSOE is not set ++# CONFIG_MEFFICEON is not set ++# CONFIG_MWINCHIPC6 is not set ++# CONFIG_MWINCHIP3D is not set ++# CONFIG_MELAN is not set ++# CONFIG_MGEODEGX1 is not set ++# CONFIG_MGEODE_LX is not set ++# CONFIG_MCYRIXIII is not set ++# CONFIG_MVIAC3_2 is not set ++# CONFIG_MVIAC7 is not set ++# CONFIG_MCORE2 is not set ++# CONFIG_MATOM is not set ++CONFIG_X86_GENERIC=y ++CONFIG_X86_INTERNODE_CACHE_SHIFT=6 ++CONFIG_X86_L1_CACHE_SHIFT=6 ++# CONFIG_X86_PPRO_FENCE is not set ++CONFIG_X86_F00F_BUG=y ++CONFIG_X86_ALIGNMENT_16=y ++CONFIG_X86_INTEL_USERCOPY=y ++CONFIG_X86_TSC=y ++CONFIG_X86_CMPXCHG64=y ++CONFIG_X86_MINIMUM_CPU_FAMILY=5 ++# CONFIG_PROCESSOR_SELECT is not set ++CONFIG_CPU_SUP_INTEL=y ++CONFIG_CPU_SUP_CYRIX_32=y ++CONFIG_CPU_SUP_AMD=y ++CONFIG_CPU_SUP_CENTAUR=y ++CONFIG_CPU_SUP_TRANSMETA_32=y ++CONFIG_CPU_SUP_UMC_32=y ++CONFIG_HPET_TIMER=y ++CONFIG_HPET_EMULATE_RTC=y ++# CONFIG_DMI is not set ++CONFIG_NR_CPUS=1 ++# CONFIG_PREEMPT_NONE is not set ++CONFIG_PREEMPT_VOLUNTARY=y ++# CONFIG_PREEMPT is not set ++CONFIG_X86_UP_APIC=y ++CONFIG_X86_UP_IOAPIC=y ++CONFIG_X86_LOCAL_APIC=y ++CONFIG_X86_IO_APIC=y ++# CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS is not set ++CONFIG_X86_MCE=y ++CONFIG_X86_MCE_INTEL=y ++# CONFIG_X86_MCE_AMD is not set ++# CONFIG_X86_ANCIENT_MCE is not set ++CONFIG_X86_MCE_THRESHOLD=y ++# CONFIG_X86_MCE_INJECT is not set ++CONFIG_X86_THERMAL_VECTOR=y ++CONFIG_VM86=y ++# CONFIG_TOSHIBA is not set ++# CONFIG_I8K is not set ++CONFIG_X86_REBOOTFIXUPS=y ++CONFIG_MICROCODE=y ++CONFIG_MICROCODE_INTEL=y ++# CONFIG_MICROCODE_AMD is not set ++CONFIG_MICROCODE_OLD_INTERFACE=y ++CONFIG_X86_MSR=y ++CONFIG_X86_CPUID=y ++# CONFIG_NOHIGHMEM is not set ++# CONFIG_HIGHMEM4G is not set ++CONFIG_HIGHMEM64G=y ++CONFIG_VMSPLIT_3G=y ++# CONFIG_VMSPLIT_2G is not set ++# CONFIG_VMSPLIT_1G is not set ++CONFIG_PAGE_OFFSET=0xC0000000 ++CONFIG_HIGHMEM=y ++CONFIG_X86_PAE=y ++CONFIG_ARCH_PHYS_ADDR_T_64BIT=y ++CONFIG_ARCH_DMA_ADDR_T_64BIT=y ++CONFIG_ARCH_FLATMEM_ENABLE=y ++CONFIG_ARCH_SPARSEMEM_ENABLE=y ++CONFIG_ARCH_SELECT_MEMORY_MODEL=y ++CONFIG_ILLEGAL_POINTER_VALUE=0 ++CONFIG_SELECT_MEMORY_MODEL=y ++CONFIG_FLATMEM_MANUAL=y ++# CONFIG_SPARSEMEM_MANUAL is not set ++CONFIG_FLATMEM=y ++CONFIG_FLAT_NODE_MEM_MAP=y ++CONFIG_SPARSEMEM_STATIC=y ++CONFIG_HAVE_MEMBLOCK=y ++CONFIG_HAVE_MEMBLOCK_NODE_MAP=y ++CONFIG_ARCH_DISCARD_MEMBLOCK=y ++CONFIG_PAGEFLAGS_EXTENDED=y ++CONFIG_SPLIT_PTLOCK_CPUS=999999 ++# CONFIG_COMPACTION is not set ++CONFIG_PHYS_ADDR_T_64BIT=y ++CONFIG_ZONE_DMA_FLAG=0 ++CONFIG_BOUNCE=y ++CONFIG_VIRT_TO_BUS=y ++# CONFIG_KSM is not set ++CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 ++CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y ++# CONFIG_MEMORY_FAILURE is not set ++# CONFIG_TRANSPARENT_HUGEPAGE is not set ++CONFIG_CROSS_MEMORY_ATTACH=y ++CONFIG_NEED_PER_CPU_KM=y ++# CONFIG_CLEANCACHE is not set ++# CONFIG_HIGHPTE is not set ++# CONFIG_X86_CHECK_BIOS_CORRUPTION is not set ++CONFIG_X86_RESERVE_LOW=64 ++# CONFIG_MATH_EMULATION is not set ++# CONFIG_MTRR is not set ++# CONFIG_ARCH_RANDOM is not set ++CONFIG_X86_SMAP=y ++CONFIG_EFI=y ++CONFIG_EFI_STUB=y ++CONFIG_EFI_CAPSULE=y ++CONFIG_SECCOMP=y ++# CONFIG_CC_STACKPROTECTOR is not set ++CONFIG_HZ_100=y ++# CONFIG_HZ_250 is not set ++# CONFIG_HZ_300 is not set ++# CONFIG_HZ_1000 is not set ++CONFIG_HZ=100 ++CONFIG_SCHED_HRTICK=y ++CONFIG_KEXEC=y ++# CONFIG_CRASH_DUMP is not set ++CONFIG_PHYSICAL_START=0x400000 ++# CONFIG_RELOCATABLE is not set ++CONFIG_PHYSICAL_ALIGN=0x1000000 ++# CONFIG_COMPAT_VDSO is not set ++# CONFIG_CMDLINE_BOOL is not set ++CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y ++ ++# ++# Power management and ACPI options ++# ++CONFIG_SUSPEND=y ++CONFIG_SUSPEND_FREEZER=y ++CONFIG_PM_SLEEP=y ++# CONFIG_PM_AUTOSLEEP is not set ++# CONFIG_PM_WAKELOCKS is not set ++CONFIG_PM_RUNTIME=y ++CONFIG_PM=y ++CONFIG_PM_DEBUG=y ++# CONFIG_PM_ADVANCED_DEBUG is not set ++CONFIG_PM_SLEEP_DEBUG=y ++CONFIG_PM_TRACE=y ++CONFIG_PM_TRACE_RTC=y ++CONFIG_ACPI=y ++CONFIG_ACPI_SLEEP=y ++CONFIG_ACPI_PROCFS=y ++CONFIG_ACPI_PROCFS_POWER=y ++CONFIG_ACPI_EC_DEBUGFS=y ++# CONFIG_ACPI_PROC_EVENT is not set ++CONFIG_ACPI_AC=y ++# CONFIG_ACPI_BATTERY is not set ++CONFIG_ACPI_BUTTON=y ++# CONFIG_ACPI_FAN is not set ++# CONFIG_ACPI_DOCK is not set ++CONFIG_ACPI_I2C=m ++CONFIG_ACPI_PROCESSOR=y ++# CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set ++CONFIG_ACPI_THERMAL=y ++# CONFIG_ACPI_CUSTOM_DSDT is not set ++# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set ++CONFIG_ACPI_BLACKLIST_YEAR=0 ++CONFIG_ACPI_DEBUG=y ++# CONFIG_ACPI_DEBUG_FUNC_TRACE is not set ++CONFIG_ACPI_PCI_SLOT=y ++CONFIG_X86_PM_TIMER=y ++# CONFIG_ACPI_CONTAINER is not set ++# CONFIG_ACPI_SBS is not set ++# CONFIG_ACPI_HED is not set ++# CONFIG_ACPI_CUSTOM_METHOD is not set ++# CONFIG_ACPI_BGRT is not set ++# CONFIG_ACPI_APEI is not set ++# CONFIG_SFI is not set ++# CONFIG_APM is not set ++ ++# ++# CPU Frequency scaling ++# ++# CONFIG_CPU_FREQ is not set ++CONFIG_CPU_IDLE=y ++# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set ++CONFIG_CPU_IDLE_GOV_LADDER=y ++CONFIG_CPU_IDLE_GOV_MENU=y ++# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set ++# CONFIG_INTEL_IDLE is not set ++ ++# ++# Bus options (PCI etc.) ++# ++CONFIG_PCI=y ++# CONFIG_PCI_GOBIOS is not set ++# CONFIG_PCI_GOMMCONFIG is not set ++# CONFIG_PCI_GODIRECT is not set ++CONFIG_PCI_GOANY=y ++CONFIG_PCI_BIOS=y ++CONFIG_PCI_DIRECT=y ++CONFIG_PCI_MMCONFIG=y ++CONFIG_PCI_DOMAINS=y ++# CONFIG_PCI_CNB20LE_QUIRK is not set ++CONFIG_PCIEPORTBUS=y ++CONFIG_PCIEAER=y ++# CONFIG_PCIE_ECRC is not set ++# CONFIG_PCIEAER_INJECT is not set ++CONFIG_PCIEASPM=y ++# CONFIG_PCIEASPM_DEBUG is not set ++CONFIG_PCIEASPM_DEFAULT=y ++# CONFIG_PCIEASPM_POWERSAVE is not set ++# CONFIG_PCIEASPM_PERFORMANCE is not set ++CONFIG_PCIE_PME=y ++CONFIG_ARCH_SUPPORTS_MSI=y ++CONFIG_PCI_MSI=y ++CONFIG_PCI_DEBUG=y ++# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set ++# CONFIG_PCI_STUB is not set ++CONFIG_HT_IRQ=y ++# CONFIG_PCI_IOV is not set ++# CONFIG_PCI_PRI is not set ++# CONFIG_PCI_PASID is not set ++CONFIG_PCI_IOAPIC=y ++CONFIG_PCI_LABEL=y ++CONFIG_ISA_DMA_API=y ++# CONFIG_ISA is not set ++# CONFIG_SCx200 is not set ++# CONFIG_ALIX is not set ++# CONFIG_NET5501 is not set ++CONFIG_AMD_NB=y ++# CONFIG_PCCARD is not set ++# CONFIG_HOTPLUG_PCI is not set ++# CONFIG_RAPIDIO is not set ++ ++# ++# Executable file formats / Emulations ++# ++CONFIG_BINFMT_ELF=y ++CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y ++CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y ++CONFIG_HAVE_AOUT=y ++# CONFIG_BINFMT_AOUT is not set ++# CONFIG_BINFMT_MISC is not set ++CONFIG_COREDUMP=y ++CONFIG_HAVE_ATOMIC_IOMAP=y ++CONFIG_HAVE_TEXT_POKE_SMP=y ++CONFIG_NET=y ++ ++# ++# Networking options ++# ++CONFIG_PACKET=y ++# CONFIG_PACKET_DIAG is not set ++CONFIG_UNIX=y ++# CONFIG_UNIX_DIAG is not set ++CONFIG_XFRM=y ++# CONFIG_XFRM_USER is not set ++# CONFIG_XFRM_SUB_POLICY is not set ++# CONFIG_XFRM_MIGRATE is not set ++# CONFIG_XFRM_STATISTICS is not set ++# CONFIG_NET_KEY is not set ++CONFIG_INET=y ++# CONFIG_IP_MULTICAST is not set ++# CONFIG_IP_ADVANCED_ROUTER is not set ++# CONFIG_IP_PNP is not set ++# CONFIG_NET_IPIP is not set ++# CONFIG_NET_IPGRE_DEMUX is not set ++# CONFIG_ARPD is not set ++CONFIG_SYN_COOKIES=y ++# CONFIG_NET_IPVTI is not set ++# CONFIG_INET_AH is not set ++# CONFIG_INET_ESP is not set ++# CONFIG_INET_IPCOMP is not set ++# CONFIG_INET_XFRM_TUNNEL is not set ++# CONFIG_INET_TUNNEL is not set ++CONFIG_INET_XFRM_MODE_TRANSPORT=y ++CONFIG_INET_XFRM_MODE_TUNNEL=y ++CONFIG_INET_XFRM_MODE_BEET=y ++CONFIG_INET_LRO=y ++CONFIG_INET_DIAG=y ++CONFIG_INET_TCP_DIAG=y ++# CONFIG_INET_UDP_DIAG is not set ++# CONFIG_TCP_CONG_ADVANCED is not set ++CONFIG_TCP_CONG_CUBIC=y ++CONFIG_DEFAULT_TCP_CONG="cubic" ++# CONFIG_TCP_MD5SIG is not set ++CONFIG_IPV6=m ++# CONFIG_IPV6_PRIVACY is not set ++# CONFIG_IPV6_ROUTER_PREF is not set ++# CONFIG_IPV6_OPTIMISTIC_DAD is not set ++# CONFIG_INET6_AH is not set ++# CONFIG_INET6_ESP is not set ++# CONFIG_INET6_IPCOMP is not set ++# CONFIG_IPV6_MIP6 is not set ++# CONFIG_INET6_XFRM_TUNNEL is not set ++# CONFIG_INET6_TUNNEL is not set ++CONFIG_INET6_XFRM_MODE_TRANSPORT=m ++CONFIG_INET6_XFRM_MODE_TUNNEL=m ++CONFIG_INET6_XFRM_MODE_BEET=m ++# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set ++# CONFIG_IPV6_SIT is not set ++# CONFIG_IPV6_TUNNEL is not set ++# CONFIG_IPV6_GRE is not set ++# CONFIG_IPV6_MULTIPLE_TABLES is not set ++# CONFIG_IPV6_MROUTE is not set ++# CONFIG_NETLABEL is not set ++# CONFIG_NETWORK_SECMARK is not set ++# CONFIG_NETWORK_PHY_TIMESTAMPING is not set ++# CONFIG_NETFILTER is not set ++# CONFIG_IP_DCCP is not set ++# CONFIG_IP_SCTP is not set ++# CONFIG_RDS is not set ++# CONFIG_TIPC is not set ++# CONFIG_ATM is not set ++# CONFIG_L2TP is not set ++CONFIG_STP=m ++CONFIG_GARP=m ++# CONFIG_BRIDGE is not set ++CONFIG_HAVE_NET_DSA=y ++CONFIG_VLAN_8021Q=m ++CONFIG_VLAN_8021Q_GVRP=y ++# CONFIG_DECNET is not set ++CONFIG_LLC=m ++# CONFIG_LLC2 is not set ++# CONFIG_IPX is not set ++# CONFIG_ATALK is not set ++# CONFIG_X25 is not set ++# CONFIG_LAPB is not set ++# CONFIG_WAN_ROUTER is not set ++# CONFIG_PHONET is not set ++# CONFIG_IEEE802154 is not set ++# CONFIG_NET_SCHED is not set ++# CONFIG_DCB is not set ++# CONFIG_DNS_RESOLVER is not set ++# CONFIG_BATMAN_ADV is not set ++# CONFIG_OPENVSWITCH is not set ++# CONFIG_NETPRIO_CGROUP is not set ++CONFIG_BQL=y ++ ++# ++# Network testing ++# ++# CONFIG_NET_PKTGEN is not set ++# CONFIG_HAMRADIO is not set ++# CONFIG_CAN is not set ++# CONFIG_IRDA is not set ++CONFIG_BT=m ++CONFIG_BT_RFCOMM=m ++CONFIG_BT_RFCOMM_TTY=y ++CONFIG_BT_BNEP=m ++CONFIG_BT_BNEP_MC_FILTER=y ++CONFIG_BT_BNEP_PROTO_FILTER=y ++CONFIG_BT_HIDP=m ++ ++# ++# Bluetooth device drivers ++# ++CONFIG_BT_HCIBTUSB=m ++# CONFIG_BT_HCIBTSDIO is not set ++# CONFIG_BT_HCIUART is not set ++# CONFIG_BT_HCIBCM203X is not set ++# CONFIG_BT_HCIBPA10X is not set ++# CONFIG_BT_HCIBFUSB is not set ++CONFIG_BT_HCIVHCI=m ++# CONFIG_BT_MRVL is not set ++# CONFIG_BT_ATH3K is not set ++# CONFIG_AF_RXRPC is not set ++CONFIG_WIRELESS=y ++CONFIG_WEXT_CORE=y ++CONFIG_WEXT_PROC=y ++CONFIG_CFG80211=m ++# CONFIG_NL80211_TESTMODE is not set ++# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set ++# CONFIG_CFG80211_REG_DEBUG is not set ++# CONFIG_CFG80211_CERTIFICATION_ONUS is not set ++CONFIG_CFG80211_DEFAULT_PS=y ++# CONFIG_CFG80211_DEBUGFS is not set ++# CONFIG_CFG80211_INTERNAL_REGDB is not set ++CONFIG_CFG80211_WEXT=y ++# CONFIG_LIB80211 is not set ++CONFIG_MAC80211=m ++CONFIG_MAC80211_HAS_RC=y ++# CONFIG_MAC80211_RC_PID is not set ++CONFIG_MAC80211_RC_MINSTREL=y ++CONFIG_MAC80211_RC_MINSTREL_HT=y ++CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y ++CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" ++# CONFIG_MAC80211_MESH is not set ++CONFIG_MAC80211_LEDS=y ++# CONFIG_MAC80211_DEBUGFS is not set ++# CONFIG_MAC80211_MESSAGE_TRACING is not set ++# CONFIG_MAC80211_DEBUG_MENU is not set ++# CONFIG_WIMAX is not set ++CONFIG_RFKILL=m ++CONFIG_RFKILL_LEDS=y ++CONFIG_RFKILL_INPUT=y ++# CONFIG_NET_9P is not set ++# CONFIG_CAIF is not set ++# CONFIG_CEPH_LIB is not set ++# CONFIG_NFC is not set ++ ++# ++# Device Drivers ++# ++ ++# ++# Generic Driver Options ++# ++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" ++CONFIG_DEVTMPFS=y ++CONFIG_DEVTMPFS_MOUNT=y ++CONFIG_STANDALONE=y ++CONFIG_PREVENT_FIRMWARE_BUILD=y ++CONFIG_FW_LOADER=y ++CONFIG_FIRMWARE_IN_KERNEL=y ++CONFIG_EXTRA_FIRMWARE="" ++# CONFIG_DEBUG_DRIVER is not set ++CONFIG_DEBUG_DEVRES=y ++# CONFIG_SYS_HYPERVISOR is not set ++# CONFIG_GENERIC_CPU_DEVICES is not set ++CONFIG_DMA_SHARED_BUFFER=y ++# CONFIG_CMA is not set ++ ++# ++# Bus devices ++# ++# CONFIG_CONNECTOR is not set ++CONFIG_MTD=y ++# CONFIG_MTD_TESTS is not set ++# CONFIG_MTD_REDBOOT_PARTS is not set ++# CONFIG_MTD_CMDLINE_PARTS is not set ++# CONFIG_MTD_AR7_PARTS is not set ++ ++# ++# User Modules And Translation Layers ++# ++CONFIG_MTD_CHAR=m ++CONFIG_MTD_BLKDEVS=m ++CONFIG_MTD_BLOCK=m ++# CONFIG_MTD_BLOCK_RO is not set ++# CONFIG_FTL is not set ++# CONFIG_NFTL is not set ++# CONFIG_INFTL is not set ++# CONFIG_RFD_FTL is not set ++# CONFIG_SSFDC is not set ++# CONFIG_SM_FTL is not set ++# CONFIG_MTD_OOPS is not set ++ ++# ++# RAM/ROM/Flash chip drivers ++# ++# CONFIG_MTD_CFI is not set ++# CONFIG_MTD_JEDECPROBE is not set ++CONFIG_MTD_MAP_BANK_WIDTH_1=y ++CONFIG_MTD_MAP_BANK_WIDTH_2=y ++CONFIG_MTD_MAP_BANK_WIDTH_4=y ++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set ++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set ++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set ++CONFIG_MTD_CFI_I1=y ++CONFIG_MTD_CFI_I2=y ++# CONFIG_MTD_CFI_I4 is not set ++# CONFIG_MTD_CFI_I8 is not set ++# CONFIG_MTD_RAM is not set ++# CONFIG_MTD_ROM is not set ++# CONFIG_MTD_ABSENT is not set ++ ++# ++# Mapping drivers for chip access ++# ++# CONFIG_MTD_COMPLEX_MAPPINGS is not set ++# CONFIG_MTD_TS5500 is not set ++# CONFIG_MTD_INTEL_VR_NOR is not set ++# CONFIG_MTD_PLATRAM is not set ++ ++# ++# Self-contained MTD device drivers ++# ++# CONFIG_MTD_PMC551 is not set ++# CONFIG_MTD_DATAFLASH is not set ++CONFIG_MTD_M25P80=m ++CONFIG_M25PXX_USE_FAST_READ=y ++# CONFIG_MTD_SST25L is not set ++# CONFIG_MTD_SLRAM is not set ++# CONFIG_MTD_PHRAM is not set ++# CONFIG_MTD_MTDRAM is not set ++# CONFIG_MTD_MTD_CLN_ROM is not set ++# CONFIG_MTD_BLOCK2MTD is not set ++ ++# ++# Disk-On-Chip Device Drivers ++# ++# CONFIG_MTD_DOCG3 is not set ++# CONFIG_MTD_NAND is not set ++# CONFIG_MTD_ONENAND is not set ++ ++# ++# LPDDR flash memory drivers ++# ++# CONFIG_MTD_LPDDR is not set ++# CONFIG_MTD_UBI is not set ++# CONFIG_PARPORT is not set ++CONFIG_PNP=y ++# CONFIG_PNP_DEBUG_MESSAGES is not set ++ ++# ++# Protocols ++# ++CONFIG_PNPACPI=y ++CONFIG_BLK_DEV=y ++# CONFIG_BLK_DEV_FD is not set ++# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set ++# CONFIG_BLK_CPQ_DA is not set ++# CONFIG_BLK_CPQ_CISS_DA is not set ++# CONFIG_BLK_DEV_DAC960 is not set ++# CONFIG_BLK_DEV_UMEM is not set ++# CONFIG_BLK_DEV_COW_COMMON is not set ++CONFIG_BLK_DEV_LOOP=y ++CONFIG_BLK_DEV_LOOP_MIN_COUNT=2 ++# CONFIG_BLK_DEV_CRYPTOLOOP is not set ++# CONFIG_BLK_DEV_DRBD is not set ++# CONFIG_BLK_DEV_NBD is not set ++# CONFIG_BLK_DEV_NVME is not set ++# CONFIG_BLK_DEV_SX8 is not set ++CONFIG_BLK_DEV_RAM=y ++CONFIG_BLK_DEV_RAM_COUNT=1 ++CONFIG_BLK_DEV_RAM_SIZE=81920 ++# CONFIG_BLK_DEV_XIP is not set ++# CONFIG_CDROM_PKTCDVD is not set ++# CONFIG_ATA_OVER_ETH is not set ++# CONFIG_BLK_DEV_HD is not set ++# CONFIG_BLK_DEV_RBD is not set ++ ++# ++# Misc devices ++# ++# CONFIG_SENSORS_LIS3LV02D is not set ++# CONFIG_AD525X_DPOT is not set ++# CONFIG_IBM_ASM is not set ++# CONFIG_PHANTOM is not set ++# CONFIG_INTEL_MID_PTI is not set ++# CONFIG_SGI_IOC4 is not set ++# CONFIG_TIFM_CORE is not set ++# CONFIG_ICS932S401 is not set ++# CONFIG_ENCLOSURE_SERVICES is not set ++# CONFIG_HP_ILO is not set ++# CONFIG_APDS9802ALS is not set ++# CONFIG_ISL29003 is not set ++# CONFIG_ISL29020 is not set ++# CONFIG_SENSORS_TSL2550 is not set ++# CONFIG_SENSORS_BH1780 is not set ++# CONFIG_SENSORS_BH1770 is not set ++# CONFIG_SENSORS_APDS990X is not set ++# CONFIG_HMC6352 is not set ++# CONFIG_DS1682 is not set ++# CONFIG_TI_DAC7512 is not set ++# CONFIG_VMWARE_BALLOON is not set ++# CONFIG_BMP085_I2C is not set ++# CONFIG_BMP085_SPI is not set ++# CONFIG_PCH_PHUB is not set ++# CONFIG_USB_SWITCH_FSA9480 is not set ++# CONFIG_C2PORT is not set ++ ++# ++# EEPROM support ++# ++CONFIG_EEPROM_AT24=m ++# CONFIG_EEPROM_AT25 is not set ++# CONFIG_EEPROM_LEGACY is not set ++# CONFIG_EEPROM_MAX6875 is not set ++# CONFIG_EEPROM_93CX6 is not set ++# CONFIG_EEPROM_93XX46 is not set ++# CONFIG_CB710_CORE is not set ++ ++# ++# Texas Instruments shared transport line discipline ++# ++# CONFIG_TI_ST is not set ++# CONFIG_SENSORS_LIS3_I2C is not set ++ ++# ++# Altera FPGA firmware download module ++# ++# CONFIG_ALTERA_STAPL is not set ++CONFIG_HAVE_IDE=y ++# CONFIG_IDE is not set ++ ++# ++# SCSI device support ++# ++CONFIG_SCSI_MOD=y ++# CONFIG_RAID_ATTRS is not set ++CONFIG_SCSI=y ++CONFIG_SCSI_DMA=y ++# CONFIG_SCSI_TGT is not set ++# CONFIG_SCSI_NETLINK is not set ++CONFIG_SCSI_PROC_FS=y ++ ++# ++# SCSI support type (disk, tape, CD-ROM) ++# ++CONFIG_BLK_DEV_SD=y ++# CONFIG_CHR_DEV_ST is not set ++# CONFIG_CHR_DEV_OSST is not set ++# CONFIG_BLK_DEV_SR is not set ++CONFIG_CHR_DEV_SG=y ++# CONFIG_CHR_DEV_SCH is not set ++# CONFIG_SCSI_MULTI_LUN is not set ++CONFIG_SCSI_CONSTANTS=y ++# CONFIG_SCSI_LOGGING is not set ++# CONFIG_SCSI_SCAN_ASYNC is not set ++ ++# ++# SCSI Transports ++# ++CONFIG_SCSI_SPI_ATTRS=y ++# CONFIG_SCSI_FC_ATTRS is not set ++# CONFIG_SCSI_ISCSI_ATTRS is not set ++# CONFIG_SCSI_SAS_ATTRS is not set ++# CONFIG_SCSI_SAS_LIBSAS is not set ++# CONFIG_SCSI_SRP_ATTRS is not set ++# CONFIG_SCSI_LOWLEVEL is not set ++# CONFIG_SCSI_DH is not set ++# CONFIG_SCSI_OSD_INITIATOR is not set ++# CONFIG_ATA is not set ++# CONFIG_MD is not set ++# CONFIG_TARGET_CORE is not set ++# CONFIG_FUSION is not set ++ ++# ++# IEEE 1394 (FireWire) support ++# ++# CONFIG_FIREWIRE is not set ++# CONFIG_FIREWIRE_NOSY is not set ++# CONFIG_I2O is not set ++# CONFIG_MACINTOSH_DRIVERS is not set ++CONFIG_NETDEVICES=y ++CONFIG_NET_CORE=y ++# CONFIG_BONDING is not set ++# CONFIG_DUMMY is not set ++# CONFIG_EQUALIZER is not set ++# CONFIG_NET_FC is not set ++CONFIG_MII=y ++# CONFIG_NET_TEAM is not set ++# CONFIG_MACVLAN is not set ++# CONFIG_VXLAN is not set ++# CONFIG_NETCONSOLE is not set ++# CONFIG_NETPOLL is not set ++# CONFIG_NET_POLL_CONTROLLER is not set ++# CONFIG_TUN is not set ++# CONFIG_VETH is not set ++# CONFIG_ARCNET is not set ++ ++# ++# CAIF transport drivers ++# ++ ++# ++# Distributed Switch Architecture drivers ++# ++# CONFIG_NET_DSA_MV88E6XXX is not set ++# CONFIG_NET_DSA_MV88E6060 is not set ++# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set ++# CONFIG_NET_DSA_MV88E6131 is not set ++# CONFIG_NET_DSA_MV88E6123_61_65 is not set ++CONFIG_ETHERNET=y ++# CONFIG_NET_VENDOR_3COM is not set ++# CONFIG_NET_VENDOR_ADAPTEC is not set ++# CONFIG_NET_VENDOR_ALTEON is not set ++# CONFIG_NET_VENDOR_AMD is not set ++# CONFIG_NET_VENDOR_ATHEROS is not set ++CONFIG_NET_CADENCE=y ++# CONFIG_ARM_AT91_ETHER is not set ++# CONFIG_MACB is not set ++# CONFIG_NET_VENDOR_BROADCOM is not set ++# CONFIG_NET_VENDOR_BROCADE is not set ++# CONFIG_NET_CALXEDA_XGMAC is not set ++# CONFIG_NET_VENDOR_CHELSIO is not set ++# CONFIG_NET_VENDOR_CISCO is not set ++# CONFIG_DNET is not set ++# CONFIG_NET_VENDOR_DEC is not set ++# CONFIG_NET_VENDOR_DLINK is not set ++# CONFIG_NET_VENDOR_EMULEX is not set ++# CONFIG_NET_VENDOR_EXAR is not set ++# CONFIG_NET_VENDOR_HP is not set ++CONFIG_NET_VENDOR_INTEL=y ++# CONFIG_E100 is not set ++CONFIG_E1000=m ++CONFIG_E1000E=m ++# CONFIG_IGB is not set ++# CONFIG_IGBVF is not set ++# CONFIG_IXGB is not set ++# CONFIG_IXGBE is not set ++# CONFIG_IXGBEVF is not set ++# CONFIG_NET_VENDOR_I825XX is not set ++# CONFIG_IP1000 is not set ++# CONFIG_JME is not set ++# CONFIG_NET_VENDOR_MARVELL is not set ++# CONFIG_NET_VENDOR_MELLANOX is not set ++# CONFIG_NET_VENDOR_MICREL is not set ++# CONFIG_NET_VENDOR_MICROCHIP is not set ++# CONFIG_NET_VENDOR_MYRI is not set ++# CONFIG_FEALNX is not set ++# CONFIG_NET_VENDOR_NATSEMI is not set ++# CONFIG_NET_VENDOR_NVIDIA is not set ++# CONFIG_NET_VENDOR_OKI is not set ++# CONFIG_ETHOC is not set ++# CONFIG_NET_PACKET_ENGINE is not set ++# CONFIG_NET_VENDOR_QLOGIC is not set ++# CONFIG_NET_VENDOR_REALTEK is not set ++# CONFIG_NET_VENDOR_RDC is not set ++# CONFIG_NET_VENDOR_SEEQ is not set ++# CONFIG_NET_VENDOR_SILAN is not set ++# CONFIG_NET_VENDOR_SIS is not set ++# CONFIG_SFC is not set ++# CONFIG_NET_VENDOR_SMSC is not set ++CONFIG_NET_VENDOR_STMICRO=y ++CONFIG_STMMAC_ETH=m ++# CONFIG_STMMAC_PLATFORM is not set ++CONFIG_STMMAC_PCI=y ++# CONFIG_STMMAC_DEBUG_FS is not set ++CONFIG_STMMAC_DA=y ++# CONFIG_STMMAC_PTP is not set ++CONFIG_STMMAC_RING=y ++# CONFIG_STMMAC_CHAINED is not set ++# CONFIG_NET_VENDOR_SUN is not set ++# CONFIG_NET_VENDOR_TEHUTI is not set ++# CONFIG_NET_VENDOR_TI is not set ++# CONFIG_NET_VENDOR_VIA is not set ++# CONFIG_NET_VENDOR_WIZNET is not set ++# CONFIG_FDDI is not set ++# CONFIG_HIPPI is not set ++# CONFIG_NET_SB1000 is not set ++CONFIG_PHYLIB=y ++ ++# ++# MII PHY device drivers ++# ++# CONFIG_AT803X_PHY is not set ++# CONFIG_AMD_PHY is not set ++# CONFIG_MARVELL_PHY is not set ++# CONFIG_DAVICOM_PHY is not set ++# CONFIG_QSEMI_PHY is not set ++# CONFIG_LXT_PHY is not set ++# CONFIG_CICADA_PHY is not set ++# CONFIG_VITESSE_PHY is not set ++# CONFIG_SMSC_PHY is not set ++# CONFIG_BROADCOM_PHY is not set ++# CONFIG_BCM87XX_PHY is not set ++# CONFIG_ICPLUS_PHY is not set ++# CONFIG_REALTEK_PHY is not set ++# CONFIG_NATIONAL_PHY is not set ++# CONFIG_STE10XP is not set ++# CONFIG_LSI_ET1011C_PHY is not set ++# CONFIG_MICREL_PHY is not set ++# CONFIG_FIXED_PHY is not set ++# CONFIG_MDIO_BITBANG is not set ++# CONFIG_MICREL_KS8995MA is not set ++CONFIG_PPP=m ++# CONFIG_PPP_BSDCOMP is not set ++CONFIG_PPP_DEFLATE=m ++# CONFIG_PPP_FILTER is not set ++# CONFIG_PPP_MPPE is not set ++# CONFIG_PPP_MULTILINK is not set ++# CONFIG_PPPOE is not set ++CONFIG_PPP_ASYNC=m ++# CONFIG_PPP_SYNC_TTY is not set ++# CONFIG_SLIP is not set ++CONFIG_SLHC=m ++ ++# ++# USB Network Adapters ++# ++# CONFIG_USB_CATC is not set ++# CONFIG_USB_KAWETH is not set ++# CONFIG_USB_PEGASUS is not set ++# CONFIG_USB_RTL8150 is not set ++# CONFIG_USB_USBNET is not set ++# CONFIG_USB_HSO is not set ++# CONFIG_USB_IPHETH is not set ++CONFIG_WLAN=y ++# CONFIG_LIBERTAS_THINFIRM is not set ++# CONFIG_AIRO is not set ++# CONFIG_ATMEL is not set ++# CONFIG_AT76C50X_USB is not set ++# CONFIG_PRISM54 is not set ++# CONFIG_USB_ZD1201 is not set ++# CONFIG_USB_NET_RNDIS_WLAN is not set ++# CONFIG_RTL8180 is not set ++# CONFIG_RTL8187 is not set ++# CONFIG_ADM8211 is not set ++# CONFIG_MAC80211_HWSIM is not set ++# CONFIG_MWL8K is not set ++# CONFIG_ATH_CARDS is not set ++# CONFIG_B43 is not set ++# CONFIG_B43LEGACY is not set ++# CONFIG_BRCMFMAC is not set ++# CONFIG_HOSTAP is not set ++# CONFIG_IPW2100 is not set ++# CONFIG_IPW2200 is not set ++CONFIG_IWLWIFI=m ++CONFIG_IWLDVM=m ++ ++# ++# Debugging Options ++# ++# CONFIG_IWLWIFI_DEBUG is not set ++CONFIG_IWLWIFI_P2P=y ++# CONFIG_IWL4965 is not set ++# CONFIG_IWL3945 is not set ++# CONFIG_LIBERTAS is not set ++# CONFIG_HERMES is not set ++# CONFIG_P54_COMMON is not set ++# CONFIG_RT2X00 is not set ++# CONFIG_RTL8192CE is not set ++# CONFIG_RTL8192SE is not set ++# CONFIG_RTL8192DE is not set ++# CONFIG_RTL8723AE is not set ++# CONFIG_RTL8192CU is not set ++# CONFIG_WL_TI is not set ++# CONFIG_ZD1211RW is not set ++# CONFIG_MWIFIEX is not set ++ ++# ++# Enable WiMAX (Networking options) to see the WiMAX drivers ++# ++# CONFIG_WAN is not set ++# CONFIG_VMXNET3 is not set ++# CONFIG_ISDN is not set ++ ++# ++# Input device support ++# ++CONFIG_INPUT=y ++# CONFIG_INPUT_FF_MEMLESS is not set ++# CONFIG_INPUT_POLLDEV is not set ++# CONFIG_INPUT_SPARSEKMAP is not set ++# CONFIG_INPUT_MATRIXKMAP is not set ++ ++# ++# Userland interfaces ++# ++# CONFIG_INPUT_MOUSEDEV is not set ++# CONFIG_INPUT_JOYDEV is not set ++CONFIG_INPUT_EVDEV=m ++# CONFIG_INPUT_EVBUG is not set ++ ++# ++# Input Device Drivers ++# ++# CONFIG_INPUT_KEYBOARD is not set ++# CONFIG_INPUT_MOUSE is not set ++# CONFIG_INPUT_JOYSTICK is not set ++# CONFIG_INPUT_TABLET is not set ++# CONFIG_INPUT_TOUCHSCREEN is not set ++# CONFIG_INPUT_MISC is not set ++ ++# ++# Hardware I/O ports ++# ++# CONFIG_SERIO is not set ++# CONFIG_GAMEPORT is not set ++ ++# ++# Character devices ++# ++CONFIG_VT=y ++CONFIG_CONSOLE_TRANSLATIONS=y ++CONFIG_VT_CONSOLE=y ++CONFIG_VT_CONSOLE_SLEEP=y ++CONFIG_HW_CONSOLE=y ++CONFIG_VT_HW_CONSOLE_BINDING=y ++CONFIG_UNIX98_PTYS=y ++# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set ++CONFIG_LEGACY_PTYS=y ++CONFIG_LEGACY_PTY_COUNT=32 ++CONFIG_SERIAL_NONSTANDARD=y ++# CONFIG_ROCKETPORT is not set ++# CONFIG_CYCLADES is not set ++# CONFIG_MOXA_INTELLIO is not set ++# CONFIG_MOXA_SMARTIO is not set ++# CONFIG_SYNCLINK is not set ++# CONFIG_SYNCLINKMP is not set ++# CONFIG_SYNCLINK_GT is not set ++# CONFIG_NOZOMI is not set ++# CONFIG_ISI is not set ++# CONFIG_N_HDLC is not set ++# CONFIG_N_GSM is not set ++# CONFIG_TRACE_SINK is not set ++CONFIG_DEVKMEM=y ++# CONFIG_STALDRV is not set ++ ++# ++# Serial drivers ++# ++CONFIG_SERIAL_8250=y ++# CONFIG_SERIAL_8250_PNP is not set ++CONFIG_SERIAL_8250_CONSOLE=y ++CONFIG_FIX_EARLYCON_MEM=y ++CONFIG_SERIAL_8250_PCI=y ++CONFIG_SERIAL_8250_NR_UARTS=8 ++CONFIG_SERIAL_8250_RUNTIME_UARTS=2 ++CONFIG_SERIAL_8250_EXTENDED=y ++CONFIG_SERIAL_8250_MANY_PORTS=y ++CONFIG_SERIAL_8250_SHARE_IRQ=y ++CONFIG_SERIAL_8250_DETECT_IRQ=y ++CONFIG_SERIAL_8250_RSA=y ++ ++# ++# Non-8250 serial port support ++# ++# CONFIG_SERIAL_MAX3100 is not set ++# CONFIG_SERIAL_MAX310X is not set ++# CONFIG_SERIAL_MFD_HSU is not set ++CONFIG_SERIAL_CORE=y ++CONFIG_SERIAL_CORE_CONSOLE=y ++# CONFIG_SERIAL_JSM is not set ++# CONFIG_SERIAL_SCCNXP is not set ++# CONFIG_SERIAL_TIMBERDALE is not set ++# CONFIG_SERIAL_ALTERA_JTAGUART is not set ++# CONFIG_SERIAL_ALTERA_UART is not set ++# CONFIG_SERIAL_IFX6X60 is not set ++# CONFIG_SERIAL_CLN_UART is not set ++# CONFIG_SERIAL_PCH_UART is not set ++# CONFIG_SERIAL_ARC is not set ++# CONFIG_TTY_PRINTK is not set ++# CONFIG_IPMI_HANDLER is not set ++# CONFIG_HW_RANDOM is not set ++# CONFIG_NVRAM is not set ++CONFIG_RTC=y ++# CONFIG_R3964 is not set ++# CONFIG_APPLICOM is not set ++# CONFIG_SONYPI is not set ++# CONFIG_MWAVE is not set ++# CONFIG_PC8736x_GPIO is not set ++# CONFIG_NSC_GPIO is not set ++# CONFIG_RAW_DRIVER is not set ++CONFIG_HPET=y ++# CONFIG_HPET_MMAP is not set ++# CONFIG_HANGCHECK_TIMER is not set ++# CONFIG_TCG_TPM is not set ++# CONFIG_TELCLOCK is not set ++CONFIG_DEVPORT=y ++CONFIG_I2C=m ++CONFIG_I2C_BOARDINFO=y ++CONFIG_I2C_COMPAT=y ++CONFIG_I2C_CHARDEV=m ++# CONFIG_I2C_MUX is not set ++CONFIG_I2C_HELPER_AUTO=y ++ ++# ++# I2C Hardware Bus support ++# ++ ++# ++# PC SMBus host controller drivers ++# ++# CONFIG_I2C_ALI1535 is not set ++# CONFIG_I2C_ALI1563 is not set ++# CONFIG_I2C_ALI15X3 is not set ++# CONFIG_I2C_AMD756 is not set ++# CONFIG_I2C_AMD8111 is not set ++# CONFIG_I2C_I801 is not set ++# CONFIG_I2C_ISCH is not set ++# CONFIG_I2C_PIIX4 is not set ++# CONFIG_I2C_NFORCE2 is not set ++# CONFIG_I2C_SIS5595 is not set ++# CONFIG_I2C_SIS630 is not set ++# CONFIG_I2C_SIS96X is not set ++# CONFIG_I2C_VIA is not set ++# CONFIG_I2C_VIAPRO is not set ++ ++# ++# ACPI drivers ++# ++# CONFIG_I2C_SCMI is not set ++ ++# ++# I2C system bus drivers (mostly embedded / system-on-chip) ++# ++# CONFIG_I2C_CBUS_GPIO is not set ++# CONFIG_I2C_EG20T is not set ++# CONFIG_I2C_GPIO is not set ++# CONFIG_I2C_INTEL_MID is not set ++# CONFIG_I2C_OCORES is not set ++# CONFIG_I2C_PCA_PLATFORM is not set ++# CONFIG_I2C_PXA_PCI is not set ++# CONFIG_I2C_SIMTEC is not set ++# CONFIG_I2C_XILINX is not set ++ ++# ++# External I2C/SMBus adapter drivers ++# ++# CONFIG_I2C_DIOLAN_U2C is not set ++# CONFIG_I2C_PARPORT_LIGHT is not set ++# CONFIG_I2C_TINY_USB is not set ++ ++# ++# Other I2C/SMBus bus drivers ++# ++# CONFIG_SCx200_ACB is not set ++# CONFIG_I2C_STUB is not set ++# CONFIG_I2C_DEBUG_CORE is not set ++# CONFIG_I2C_DEBUG_ALGO is not set ++# CONFIG_I2C_DEBUG_BUS is not set ++CONFIG_SPI=y ++CONFIG_SPI_DEBUG=y ++CONFIG_GEN3_SPI=y ++CONFIG_SPI_MASTER=y ++ ++# ++# SPI Master Controller Drivers ++# ++# CONFIG_SPI_ALTERA is not set ++CONFIG_SPI_BITBANG=y ++CONFIG_SPI_GPIO=y ++# CONFIG_SPI_OC_TINY is not set ++CONFIG_SPI_PXA2XX=m ++CONFIG_SPI_PXA2XX_PCI=m ++# CONFIG_SPI_CE5XX_SPI_SLAVE is not set ++# CONFIG_SPI_SC18IS602 is not set ++# CONFIG_SPI_TOPCLIFF_PCH is not set ++# CONFIG_SPI_XCOMM is not set ++# CONFIG_SPI_XILINX is not set ++# CONFIG_SPI_DESIGNWARE is not set ++# CONFIG_SPI_LPC_SCH is not set ++ ++# ++# SPI Protocol Masters ++# ++CONFIG_SPI_SPIDEV=m ++# CONFIG_SPI_TLE62X0 is not set ++# CONFIG_HSI is not set ++ ++# ++# PPS support ++# ++CONFIG_PPS=m ++# CONFIG_PPS_DEBUG is not set ++ ++# ++# PPS clients support ++# ++# CONFIG_PPS_CLIENT_KTIMER is not set ++# CONFIG_PPS_CLIENT_LDISC is not set ++# CONFIG_PPS_CLIENT_GPIO is not set ++ ++# ++# PPS generators support ++# ++ ++# ++# PTP clock support ++# ++CONFIG_PTP_1588_CLOCK=m ++ ++# ++# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. ++# ++CONFIG_PTP_1588_CLOCK_PCH=m ++CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y ++CONFIG_ARCH_REQUIRE_GPIOLIB=y ++CONFIG_GPIOLIB=y ++CONFIG_GPIO_ACPI=y ++# CONFIG_DEBUG_GPIO is not set ++CONFIG_GPIO_SYSFS=y ++ ++# ++# Memory mapped GPIO drivers: ++# ++# CONFIG_GPIO_GENERIC_PLATFORM is not set ++# CONFIG_GPIO_IT8761E is not set ++# CONFIG_GPIO_TS5500 is not set ++CONFIG_GPIO_SCH=m ++# CONFIG_GPIO_ICH is not set ++# CONFIG_GPIO_VX855 is not set ++ ++# ++# I2C GPIO expanders: ++# ++# CONFIG_GPIO_MAX7300 is not set ++# CONFIG_GPIO_MAX732X is not set ++# CONFIG_GPIO_PCA953X is not set ++# CONFIG_GPIO_PCF857X is not set ++# CONFIG_GPIO_ADP5588 is not set ++ ++# ++# PCI GPIO expanders: ++# ++# CONFIG_GPIO_BT8XX is not set ++# CONFIG_GPIO_AMD8111 is not set ++# CONFIG_GPIO_LANGWELL is not set ++# CONFIG_GPIO_PCH is not set ++# CONFIG_GPIO_ML_IOH is not set ++# CONFIG_GPIO_RDC321X is not set ++ ++# ++# SPI GPIO expanders: ++# ++# CONFIG_GPIO_MAX7301 is not set ++# CONFIG_GPIO_MCP23S08 is not set ++# CONFIG_GPIO_MC33880 is not set ++# CONFIG_GPIO_74X164 is not set ++ ++# ++# AC97 GPIO expanders: ++# ++ ++# ++# MODULbus GPIO expanders: ++# ++ ++# ++# USB GPIO expanders: ++# ++# CONFIG_W1 is not set ++CONFIG_POWER_SUPPLY=y ++# CONFIG_POWER_SUPPLY_DEBUG is not set ++# CONFIG_PDA_POWER is not set ++# CONFIG_GENERIC_ADC_BATTERY is not set ++# CONFIG_TEST_POWER is not set ++# CONFIG_BATTERY_DS2780 is not set ++# CONFIG_BATTERY_DS2781 is not set ++# CONFIG_BATTERY_DS2782 is not set ++# CONFIG_BATTERY_SBS is not set ++# CONFIG_BATTERY_BQ27x00 is not set ++# CONFIG_BATTERY_MAX17040 is not set ++# CONFIG_BATTERY_MAX17042 is not set ++# CONFIG_CHARGER_MAX8903 is not set ++# CONFIG_CHARGER_LP8727 is not set ++# CONFIG_CHARGER_GPIO is not set ++# CONFIG_CHARGER_BQ2415X is not set ++# CONFIG_CHARGER_SMB347 is not set ++# CONFIG_POWER_RESET is not set ++# CONFIG_POWER_AVS is not set ++# CONFIG_HWMON is not set ++CONFIG_THERMAL=y ++CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y ++# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set ++# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set ++# CONFIG_FAIR_SHARE is not set ++CONFIG_STEP_WISE=y ++# CONFIG_USER_SPACE is not set ++# CONFIG_WATCHDOG is not set ++CONFIG_SSB_POSSIBLE=y ++ ++# ++# Sonics Silicon Backplane ++# ++# CONFIG_SSB is not set ++CONFIG_BCMA_POSSIBLE=y ++ ++# ++# Broadcom specific AMBA ++# ++# CONFIG_BCMA is not set ++ ++# ++# Multifunction device drivers ++# ++CONFIG_MFD_CORE=y ++# CONFIG_MFD_SM501 is not set ++# CONFIG_MFD_RTSX_PCI is not set ++# CONFIG_MFD_TI_AM335X_TSCADC is not set ++# CONFIG_HTC_PASIC3 is not set ++# CONFIG_MFD_LM3533 is not set ++# CONFIG_TPS6105X is not set ++# CONFIG_TPS65010 is not set ++# CONFIG_TPS6507X is not set ++# CONFIG_MFD_TPS65217 is not set ++# CONFIG_MFD_TPS65912_SPI is not set ++# CONFIG_MFD_STMPE is not set ++# CONFIG_MFD_TMIO is not set ++# CONFIG_MFD_DA9052_SPI is not set ++# CONFIG_MFD_ARIZONA_I2C is not set ++# CONFIG_MFD_ARIZONA_SPI is not set ++# CONFIG_MFD_WM831X_SPI is not set ++# CONFIG_MFD_PCF50633 is not set ++# CONFIG_MFD_MC13XXX_SPI is not set ++# CONFIG_MFD_MC13XXX_I2C is not set ++# CONFIG_ABX500_CORE is not set ++# CONFIG_EZX_PCAP is not set ++# CONFIG_MFD_CS5535 is not set ++# CONFIG_MFD_TIMBERDALE is not set ++CONFIG_CY8C9540A=m ++CONFIG_INTEL_CLN_GIP=m ++CONFIG_LPC_SCH=y ++# CONFIG_LPC_ICH is not set ++# CONFIG_MFD_RDC321X is not set ++# CONFIG_MFD_JANZ_CMODIO is not set ++# CONFIG_MFD_VX855 is not set ++# CONFIG_MFD_WL1273_CORE is not set ++# CONFIG_MFD_VIPERBOARD is not set ++# CONFIG_MFD_RETU is not set ++# CONFIG_REGULATOR is not set ++CONFIG_MEDIA_SUPPORT=m ++ ++# ++# Multimedia core support ++# ++CONFIG_MEDIA_CAMERA_SUPPORT=y ++# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set ++# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set ++# CONFIG_MEDIA_RADIO_SUPPORT is not set ++# CONFIG_MEDIA_RC_SUPPORT is not set ++# CONFIG_MEDIA_CONTROLLER is not set ++CONFIG_VIDEO_DEV=m ++CONFIG_VIDEO_V4L2=m ++# CONFIG_VIDEO_ADV_DEBUG is not set ++# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set ++CONFIG_VIDEOBUF2_CORE=m ++CONFIG_VIDEOBUF2_MEMOPS=m ++CONFIG_VIDEOBUF2_VMALLOC=m ++ ++# ++# Media drivers ++# ++CONFIG_MEDIA_USB_SUPPORT=y ++ ++# ++# Webcam devices ++# ++CONFIG_USB_VIDEO_CLASS=m ++CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y ++# CONFIG_USB_GSPCA is not set ++# CONFIG_USB_PWC is not set ++# CONFIG_VIDEO_CPIA2 is not set ++# CONFIG_USB_ZR364XX is not set ++# CONFIG_USB_STKWEBCAM is not set ++# CONFIG_USB_S2255 is not set ++# CONFIG_USB_SN9C102 is not set ++ ++# ++# Webcam, TV (analog/digital) USB devices ++# ++# CONFIG_VIDEO_EM28XX is not set ++# CONFIG_MEDIA_PCI_SUPPORT is not set ++# CONFIG_V4L_PLATFORM_DRIVERS is not set ++# CONFIG_V4L_MEM2MEM_DRIVERS is not set ++# CONFIG_V4L_TEST_DRIVERS is not set ++ ++# ++# Supported MMC/SDIO adapters ++# ++# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set ++ ++# ++# Media ancillary drivers (tuners, sensors, i2c, frontends) ++# ++ ++# ++# Encoders, decoders, sensors and other helper chips ++# ++ ++# ++# Audio decoders, processors and mixers ++# ++# CONFIG_VIDEO_TVAUDIO is not set ++# CONFIG_VIDEO_TDA7432 is not set ++# CONFIG_VIDEO_TDA9840 is not set ++# CONFIG_VIDEO_TEA6415C is not set ++# CONFIG_VIDEO_TEA6420 is not set ++# CONFIG_VIDEO_MSP3400 is not set ++# CONFIG_VIDEO_CS5345 is not set ++# CONFIG_VIDEO_CS53L32A is not set ++# CONFIG_VIDEO_TLV320AIC23B is not set ++# CONFIG_VIDEO_WM8775 is not set ++# CONFIG_VIDEO_WM8739 is not set ++# CONFIG_VIDEO_VP27SMPX is not set ++ ++# ++# RDS decoders ++# ++# CONFIG_VIDEO_SAA6588 is not set ++ ++# ++# Video decoders ++# ++# CONFIG_VIDEO_ADV7180 is not set ++# CONFIG_VIDEO_ADV7183 is not set ++# CONFIG_VIDEO_BT819 is not set ++# CONFIG_VIDEO_BT856 is not set ++# CONFIG_VIDEO_BT866 is not set ++# CONFIG_VIDEO_KS0127 is not set ++# CONFIG_VIDEO_SAA7110 is not set ++# CONFIG_VIDEO_SAA711X is not set ++# CONFIG_VIDEO_SAA7191 is not set ++# CONFIG_VIDEO_TVP514X is not set ++# CONFIG_VIDEO_TVP5150 is not set ++# CONFIG_VIDEO_TVP7002 is not set ++# CONFIG_VIDEO_VPX3220 is not set ++ ++# ++# Video and audio decoders ++# ++# CONFIG_VIDEO_SAA717X is not set ++# CONFIG_VIDEO_CX25840 is not set ++ ++# ++# MPEG video encoders ++# ++# CONFIG_VIDEO_CX2341X is not set ++ ++# ++# Video encoders ++# ++# CONFIG_VIDEO_SAA7127 is not set ++# CONFIG_VIDEO_SAA7185 is not set ++# CONFIG_VIDEO_ADV7170 is not set ++# CONFIG_VIDEO_ADV7175 is not set ++# CONFIG_VIDEO_ADV7343 is not set ++# CONFIG_VIDEO_ADV7393 is not set ++# CONFIG_VIDEO_AK881X is not set ++ ++# ++# Camera sensor devices ++# ++# CONFIG_VIDEO_OV7670 is not set ++# CONFIG_VIDEO_VS6624 is not set ++# CONFIG_VIDEO_MT9V011 is not set ++# CONFIG_VIDEO_TCM825X is not set ++# CONFIG_VIDEO_SR030PC30 is not set ++ ++# ++# Flash devices ++# ++ ++# ++# Video improvement chips ++# ++# CONFIG_VIDEO_UPD64031A is not set ++# CONFIG_VIDEO_UPD64083 is not set ++ ++# ++# Miscelaneous helper chips ++# ++# CONFIG_VIDEO_THS7303 is not set ++# CONFIG_VIDEO_M52790 is not set ++ ++# ++# Sensors used on soc_camera driver ++# ++ ++# ++# Customise DVB Frontends ++# ++# CONFIG_DVB_AU8522_V4L is not set ++# CONFIG_DVB_TUNER_DIB0070 is not set ++# CONFIG_DVB_TUNER_DIB0090 is not set ++ ++# ++# Tools to develop new frontends ++# ++# CONFIG_DVB_DUMMY_FE is not set ++ ++# ++# Graphics support ++# ++# CONFIG_AGP is not set ++CONFIG_VGA_ARB=y ++CONFIG_VGA_ARB_MAX_GPUS=16 ++# CONFIG_VGA_SWITCHEROO is not set ++# CONFIG_DRM is not set ++# CONFIG_STUB_POULSBO is not set ++# CONFIG_VGASTATE is not set ++# CONFIG_VIDEO_OUTPUT_CONTROL is not set ++# CONFIG_FB is not set ++# CONFIG_EXYNOS_VIDEO is not set ++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set ++ ++# ++# Console display driver support ++# ++# CONFIG_VGA_CONSOLE is not set ++CONFIG_DUMMY_CONSOLE=y ++CONFIG_SOUND=m ++# CONFIG_SOUND_OSS_CORE is not set ++CONFIG_SND=m ++# CONFIG_SND_SEQUENCER is not set ++# CONFIG_SND_MIXER_OSS is not set ++# CONFIG_SND_PCM_OSS is not set ++# CONFIG_SND_HRTIMER is not set ++# CONFIG_SND_RTCTIMER is not set ++# CONFIG_SND_DYNAMIC_MINORS is not set ++CONFIG_SND_SUPPORT_OLD_API=y ++CONFIG_SND_VERBOSE_PROCFS=y ++# CONFIG_SND_VERBOSE_PRINTK is not set ++# CONFIG_SND_DEBUG is not set ++CONFIG_SND_DMA_SGBUF=y ++# CONFIG_SND_RAWMIDI_SEQ is not set ++# CONFIG_SND_OPL3_LIB_SEQ is not set ++# CONFIG_SND_OPL4_LIB_SEQ is not set ++# CONFIG_SND_SBAWE_SEQ is not set ++# CONFIG_SND_EMU10K1_SEQ is not set ++CONFIG_SND_DRIVERS=y ++# CONFIG_SND_DUMMY is not set ++# CONFIG_SND_ALOOP is not set ++# CONFIG_SND_MTPAV is not set ++# CONFIG_SND_SERIAL_U16550 is not set ++# CONFIG_SND_MPU401 is not set ++CONFIG_SND_PCI=y ++# CONFIG_SND_AD1889 is not set ++# CONFIG_SND_ALS300 is not set ++# CONFIG_SND_ALS4000 is not set ++# CONFIG_SND_ALI5451 is not set ++# CONFIG_SND_ASIHPI is not set ++# CONFIG_SND_ATIIXP is not set ++# CONFIG_SND_ATIIXP_MODEM is not set ++# CONFIG_SND_AU8810 is not set ++# CONFIG_SND_AU8820 is not set ++# CONFIG_SND_AU8830 is not set ++# CONFIG_SND_AW2 is not set ++# CONFIG_SND_AZT3328 is not set ++# CONFIG_SND_BT87X is not set ++# CONFIG_SND_CA0106 is not set ++# CONFIG_SND_CMIPCI is not set ++# CONFIG_SND_OXYGEN is not set ++# CONFIG_SND_CS4281 is not set ++# CONFIG_SND_CS46XX is not set ++# CONFIG_SND_CS5530 is not set ++# CONFIG_SND_CS5535AUDIO is not set ++# CONFIG_SND_CTXFI is not set ++# CONFIG_SND_DARLA20 is not set ++# CONFIG_SND_GINA20 is not set ++# CONFIG_SND_LAYLA20 is not set ++# CONFIG_SND_DARLA24 is not set ++# CONFIG_SND_GINA24 is not set ++# CONFIG_SND_LAYLA24 is not set ++# CONFIG_SND_MONA is not set ++# CONFIG_SND_MIA is not set ++# CONFIG_SND_ECHO3G is not set ++# CONFIG_SND_INDIGO is not set ++# CONFIG_SND_INDIGOIO is not set ++# CONFIG_SND_INDIGODJ is not set ++# CONFIG_SND_INDIGOIOX is not set ++# CONFIG_SND_INDIGODJX is not set ++# CONFIG_SND_EMU10K1 is not set ++# CONFIG_SND_EMU10K1X is not set ++# CONFIG_SND_ENS1370 is not set ++# CONFIG_SND_ENS1371 is not set ++# CONFIG_SND_ES1938 is not set ++# CONFIG_SND_ES1968 is not set ++# CONFIG_SND_FM801 is not set ++# CONFIG_SND_HDA_INTEL is not set ++# CONFIG_SND_HDSP is not set ++# CONFIG_SND_HDSPM is not set ++# CONFIG_SND_ICE1712 is not set ++# CONFIG_SND_ICE1724 is not set ++# CONFIG_SND_INTEL8X0 is not set ++# CONFIG_SND_INTEL8X0M is not set ++# CONFIG_SND_KORG1212 is not set ++# CONFIG_SND_LOLA is not set ++# CONFIG_SND_LX6464ES is not set ++# CONFIG_SND_MAESTRO3 is not set ++# CONFIG_SND_MIXART is not set ++# CONFIG_SND_NM256 is not set ++# CONFIG_SND_PCXHR is not set ++# CONFIG_SND_RIPTIDE is not set ++# CONFIG_SND_RME32 is not set ++# CONFIG_SND_RME96 is not set ++# CONFIG_SND_RME9652 is not set ++# CONFIG_SND_SIS7019 is not set ++# CONFIG_SND_SONICVIBES is not set ++# CONFIG_SND_TRIDENT is not set ++# CONFIG_SND_VIA82XX is not set ++# CONFIG_SND_VIA82XX_MODEM is not set ++# CONFIG_SND_VIRTUOSO is not set ++# CONFIG_SND_VX222 is not set ++# CONFIG_SND_YMFPCI is not set ++CONFIG_SND_SPI=y ++CONFIG_SND_USB=y ++# CONFIG_SND_USB_AUDIO is not set ++# CONFIG_SND_USB_UA101 is not set ++# CONFIG_SND_USB_USX2Y is not set ++# CONFIG_SND_USB_CAIAQ is not set ++# CONFIG_SND_USB_US122L is not set ++# CONFIG_SND_USB_6FIRE is not set ++# CONFIG_SND_SOC is not set ++# CONFIG_SOUND_PRIME is not set ++ ++# ++# HID support ++# ++CONFIG_HID=y ++# CONFIG_HID_BATTERY_STRENGTH is not set ++# CONFIG_HIDRAW is not set ++# CONFIG_UHID is not set ++CONFIG_HID_GENERIC=y ++ ++# ++# Special HID drivers ++# ++# CONFIG_HID_A4TECH is not set ++# CONFIG_HID_ACRUX is not set ++# CONFIG_HID_APPLE is not set ++# CONFIG_HID_AUREAL is not set ++# CONFIG_HID_BELKIN is not set ++# CONFIG_HID_CHERRY is not set ++# CONFIG_HID_CHICONY is not set ++# CONFIG_HID_PRODIKEYS is not set ++# CONFIG_HID_CYPRESS is not set ++# CONFIG_HID_DRAGONRISE is not set ++# CONFIG_HID_EMS_FF is not set ++# CONFIG_HID_ELECOM is not set ++# CONFIG_HID_EZKEY is not set ++# CONFIG_HID_HOLTEK is not set ++# CONFIG_HID_KEYTOUCH is not set ++# CONFIG_HID_KYE is not set ++# CONFIG_HID_UCLOGIC is not set ++# CONFIG_HID_WALTOP is not set ++# CONFIG_HID_GYRATION is not set ++# CONFIG_HID_ICADE is not set ++# CONFIG_HID_TWINHAN is not set ++# CONFIG_HID_KENSINGTON is not set ++# CONFIG_HID_LCPOWER is not set ++# CONFIG_HID_LENOVO_TPKBD is not set ++# CONFIG_HID_LOGITECH is not set ++# CONFIG_HID_MAGICMOUSE is not set ++# CONFIG_HID_MICROSOFT is not set ++# CONFIG_HID_MONTEREY is not set ++# CONFIG_HID_MULTITOUCH is not set ++# CONFIG_HID_NTRIG is not set ++# CONFIG_HID_ORTEK is not set ++# CONFIG_HID_PANTHERLORD is not set ++# CONFIG_HID_PETALYNX is not set ++# CONFIG_HID_PICOLCD is not set ++# CONFIG_HID_PRIMAX is not set ++# CONFIG_HID_PS3REMOTE is not set ++# CONFIG_HID_ROCCAT is not set ++# CONFIG_HID_SAITEK is not set ++# CONFIG_HID_SAMSUNG is not set ++# CONFIG_HID_SONY is not set ++# CONFIG_HID_SPEEDLINK is not set ++# CONFIG_HID_SUNPLUS is not set ++# CONFIG_HID_GREENASIA is not set ++# CONFIG_HID_SMARTJOYPLUS is not set ++# CONFIG_HID_TIVO is not set ++# CONFIG_HID_TOPSEED is not set ++# CONFIG_HID_THRUSTMASTER is not set ++# CONFIG_HID_WACOM is not set ++# CONFIG_HID_WIIMOTE is not set ++# CONFIG_HID_ZEROPLUS is not set ++# CONFIG_HID_ZYDACRON is not set ++CONFIG_HID_SENSOR_HUB=m ++ ++# ++# USB HID support ++# ++CONFIG_USB_HID=m ++# CONFIG_HID_PID is not set ++# CONFIG_USB_HIDDEV is not set ++ ++# ++# USB HID Boot Protocol drivers ++# ++# CONFIG_USB_KBD is not set ++# CONFIG_USB_MOUSE is not set ++ ++# ++# I2C HID support ++# ++# CONFIG_I2C_HID is not set ++CONFIG_USB_ARCH_HAS_OHCI=y ++CONFIG_USB_ARCH_HAS_EHCI=y ++CONFIG_USB_ARCH_HAS_XHCI=y ++CONFIG_USB_SUPPORT=y ++CONFIG_USB_COMMON=m ++CONFIG_USB_ARCH_HAS_HCD=y ++CONFIG_USB=m ++# CONFIG_USB_DEBUG is not set ++# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set ++ ++# ++# Miscellaneous USB options ++# ++# CONFIG_USB_DYNAMIC_MINORS is not set ++# CONFIG_USB_SUSPEND is not set ++# CONFIG_USB_OTG_WHITELIST is not set ++# CONFIG_USB_OTG_BLACKLIST_HUB is not set ++# CONFIG_USB_DWC3 is not set ++# CONFIG_USB_MON is not set ++# CONFIG_USB_WUSB_CBAF is not set ++ ++# ++# USB Host Controller Drivers ++# ++# CONFIG_USB_C67X00_HCD is not set ++# CONFIG_USB_XHCI_HCD is not set ++CONFIG_USB_EHCI_HCD=m ++# CONFIG_USB_EHCI_ROOT_HUB_TT is not set ++CONFIG_USB_EHCI_TT_NEWSCHED=y ++CONFIG_USB_EHCI_PCI=m ++# CONFIG_USB_OXU210HP_HCD is not set ++# CONFIG_USB_ISP116X_HCD is not set ++# CONFIG_USB_ISP1760_HCD is not set ++# CONFIG_USB_ISP1362_HCD is not set ++CONFIG_USB_OHCI_HCD=m ++# CONFIG_USB_OHCI_HCD_PLATFORM is not set ++# CONFIG_USB_EHCI_HCD_PLATFORM is not set ++# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set ++# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set ++CONFIG_USB_OHCI_LITTLE_ENDIAN=y ++CONFIG_USB_UHCI_HCD=m ++# CONFIG_USB_SL811_HCD is not set ++# CONFIG_USB_R8A66597_HCD is not set ++# CONFIG_USB_MUSB_HDRC is not set ++# CONFIG_USB_CHIPIDEA is not set ++# CONFIG_USB_RENESAS_USBHS is not set ++ ++# ++# USB Device Class drivers ++# ++CONFIG_USB_ACM=m ++# CONFIG_USB_PRINTER is not set ++# CONFIG_USB_WDM is not set ++# CONFIG_USB_TMC is not set ++ ++# ++# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may ++# ++ ++# ++# also be needed; see USB_STORAGE Help for more info ++# ++CONFIG_USB_STORAGE=m ++# CONFIG_USB_STORAGE_DEBUG is not set ++# CONFIG_USB_STORAGE_REALTEK is not set ++# CONFIG_USB_STORAGE_DATAFAB is not set ++# CONFIG_USB_STORAGE_FREECOM is not set ++# CONFIG_USB_STORAGE_ISD200 is not set ++# CONFIG_USB_STORAGE_USBAT is not set ++# CONFIG_USB_STORAGE_SDDR09 is not set ++# CONFIG_USB_STORAGE_SDDR55 is not set ++# CONFIG_USB_STORAGE_JUMPSHOT is not set ++# CONFIG_USB_STORAGE_ALAUDA is not set ++# CONFIG_USB_STORAGE_ONETOUCH is not set ++# CONFIG_USB_STORAGE_KARMA is not set ++# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set ++# CONFIG_USB_STORAGE_ENE_UB6250 is not set ++ ++# ++# USB Imaging devices ++# ++# CONFIG_USB_MDC800 is not set ++# CONFIG_USB_MICROTEK is not set ++ ++# ++# USB port drivers ++# ++CONFIG_USB_SERIAL=m ++# CONFIG_USB_SERIAL_GENERIC is not set ++# CONFIG_USB_SERIAL_AIRCABLE is not set ++# CONFIG_USB_SERIAL_ARK3116 is not set ++# CONFIG_USB_SERIAL_BELKIN is not set ++# CONFIG_USB_SERIAL_CH341 is not set ++# CONFIG_USB_SERIAL_WHITEHEAT is not set ++# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set ++# CONFIG_USB_SERIAL_CP210X is not set ++# CONFIG_USB_SERIAL_CYPRESS_M8 is not set ++# CONFIG_USB_SERIAL_EMPEG is not set ++# CONFIG_USB_SERIAL_FTDI_SIO is not set ++# CONFIG_USB_SERIAL_FUNSOFT is not set ++# CONFIG_USB_SERIAL_VISOR is not set ++# CONFIG_USB_SERIAL_IPAQ is not set ++# CONFIG_USB_SERIAL_IR is not set ++# CONFIG_USB_SERIAL_EDGEPORT is not set ++# CONFIG_USB_SERIAL_EDGEPORT_TI is not set ++# CONFIG_USB_SERIAL_F81232 is not set ++# CONFIG_USB_SERIAL_GARMIN is not set ++# CONFIG_USB_SERIAL_IPW is not set ++# CONFIG_USB_SERIAL_IUU is not set ++# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set ++# CONFIG_USB_SERIAL_KEYSPAN is not set ++# CONFIG_USB_SERIAL_KLSI is not set ++# CONFIG_USB_SERIAL_KOBIL_SCT is not set ++# CONFIG_USB_SERIAL_MCT_U232 is not set ++# CONFIG_USB_SERIAL_METRO is not set ++# CONFIG_USB_SERIAL_MOS7720 is not set ++# CONFIG_USB_SERIAL_MOS7840 is not set ++# CONFIG_USB_SERIAL_MOTOROLA is not set ++# CONFIG_USB_SERIAL_NAVMAN is not set ++CONFIG_USB_SERIAL_PL2303=m ++# CONFIG_USB_SERIAL_OTI6858 is not set ++# CONFIG_USB_SERIAL_QCAUX is not set ++# CONFIG_USB_SERIAL_QUALCOMM is not set ++# CONFIG_USB_SERIAL_SPCP8X5 is not set ++# CONFIG_USB_SERIAL_HP4X is not set ++# CONFIG_USB_SERIAL_SAFE is not set ++# CONFIG_USB_SERIAL_SIEMENS_MPI is not set ++# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set ++# CONFIG_USB_SERIAL_SYMBOL is not set ++# CONFIG_USB_SERIAL_TI is not set ++# CONFIG_USB_SERIAL_CYBERJACK is not set ++# CONFIG_USB_SERIAL_XIRCOM is not set ++# CONFIG_USB_SERIAL_OPTION is not set ++# CONFIG_USB_SERIAL_OMNINET is not set ++# CONFIG_USB_SERIAL_OPTICON is not set ++# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set ++# CONFIG_USB_SERIAL_ZIO is not set ++# CONFIG_USB_SERIAL_ZTE is not set ++# CONFIG_USB_SERIAL_SSU100 is not set ++# CONFIG_USB_SERIAL_QT2 is not set ++# CONFIG_USB_SERIAL_DEBUG is not set ++ ++# ++# USB Miscellaneous drivers ++# ++# CONFIG_USB_EMI62 is not set ++# CONFIG_USB_EMI26 is not set ++# CONFIG_USB_ADUTUX is not set ++# CONFIG_USB_SEVSEG is not set ++# CONFIG_USB_RIO500 is not set ++# CONFIG_USB_LEGOTOWER is not set ++# CONFIG_USB_LCD is not set ++# CONFIG_USB_LED is not set ++# CONFIG_USB_CYPRESS_CY7C63 is not set ++# CONFIG_USB_CYTHERM is not set ++# CONFIG_USB_IDMOUSE is not set ++# CONFIG_USB_FTDI_ELAN is not set ++# CONFIG_USB_APPLEDISPLAY is not set ++# CONFIG_USB_SISUSBVGA is not set ++# CONFIG_USB_LD is not set ++# CONFIG_USB_TRANCEVIBRATOR is not set ++# CONFIG_USB_IOWARRIOR is not set ++# CONFIG_USB_TEST is not set ++# CONFIG_USB_ISIGHTFW is not set ++# CONFIG_USB_YUREX is not set ++# CONFIG_USB_EZUSB_FX2 is not set ++ ++# ++# USB Physical Layer drivers ++# ++# CONFIG_USB_ISP1301 is not set ++# CONFIG_USB_RCAR_PHY is not set ++CONFIG_USB_GADGET=m ++# CONFIG_USB_GADGET_DEBUG is not set ++# CONFIG_USB_GADGET_DEBUG_FILES is not set ++# CONFIG_USB_GADGET_DEBUG_FS is not set ++CONFIG_USB_GADGET_VBUS_DRAW=2 ++CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 ++ ++# ++# USB Peripheral Controller ++# ++# CONFIG_USB_R8A66597 is not set ++# CONFIG_USB_MV_UDC is not set ++# CONFIG_USB_M66592 is not set ++# CONFIG_USB_AMD5536UDC is not set ++# CONFIG_USB_NET2272 is not set ++# CONFIG_USB_NET2280 is not set ++# CONFIG_USB_GOKU is not set ++CONFIG_USB_EG20T=m ++# CONFIG_USB_DUMMY_HCD is not set ++CONFIG_USB_LIBCOMPOSITE=m ++CONFIG_USB_ZERO=m ++# CONFIG_USB_AUDIO is not set ++CONFIG_USB_ETH=m ++CONFIG_USB_ETH_RNDIS=y ++# CONFIG_USB_ETH_EEM is not set ++# CONFIG_USB_G_NCM is not set ++# CONFIG_USB_GADGETFS is not set ++# CONFIG_USB_FUNCTIONFS is not set ++CONFIG_USB_MASS_STORAGE=m ++CONFIG_USB_G_SERIAL=m ++# CONFIG_USB_MIDI_GADGET is not set ++# CONFIG_USB_G_PRINTER is not set ++# CONFIG_USB_CDC_COMPOSITE is not set ++# CONFIG_USB_G_ACM_MS is not set ++# CONFIG_USB_G_MULTI is not set ++# CONFIG_USB_G_HID is not set ++# CONFIG_USB_G_DBGP is not set ++# CONFIG_USB_G_WEBCAM is not set ++ ++# ++# OTG and related infrastructure ++# ++# CONFIG_USB_GPIO_VBUS is not set ++# CONFIG_NOP_USB_XCEIV is not set ++# CONFIG_UWB is not set ++CONFIG_MMC=m ++# CONFIG_MMC_DEBUG is not set ++# CONFIG_MMC_UNSAFE_RESUME is not set ++# CONFIG_MMC_CLKGATE is not set ++ ++# ++# MMC/SD/SDIO Card Drivers ++# ++CONFIG_MMC_BLOCK=m ++CONFIG_MMC_BLOCK_MINORS=8 ++CONFIG_MMC_BLOCK_BOUNCE=y ++# CONFIG_SDIO_UART is not set ++# CONFIG_MMC_TEST is not set ++ ++# ++# MMC/SD/SDIO Host Controller Drivers ++# ++CONFIG_MMC_SDHCI=m ++CONFIG_MMC_SDHCI_PCI=m ++# CONFIG_MMC_RICOH_MMC is not set ++# CONFIG_MMC_SDHCI_ACPI is not set ++CONFIG_MMC_SDHCI_PLTFM=m ++# CONFIG_MMC_WBSD is not set ++# CONFIG_MMC_TIFM_SD is not set ++# CONFIG_MMC_CB710 is not set ++# CONFIG_MMC_VIA_SDMMC is not set ++# CONFIG_MMC_VUB300 is not set ++# CONFIG_MMC_USHC is not set ++# CONFIG_MEMSTICK is not set ++CONFIG_NEW_LEDS=y ++CONFIG_LEDS_CLASS=m ++ ++# ++# LED drivers ++# ++# CONFIG_LEDS_LM3530 is not set ++# CONFIG_LEDS_LM3642 is not set ++# CONFIG_LEDS_PCA9532 is not set ++# CONFIG_LEDS_GPIO is not set ++# CONFIG_LEDS_LP3944 is not set ++# CONFIG_LEDS_LP5521 is not set ++# CONFIG_LEDS_LP5523 is not set ++# CONFIG_LEDS_PCA955X is not set ++# CONFIG_LEDS_PCA9633 is not set ++# CONFIG_LEDS_DAC124S085 is not set ++# CONFIG_LEDS_BD2802 is not set ++# CONFIG_LEDS_LT3593 is not set ++# CONFIG_LEDS_TCA6507 is not set ++# CONFIG_LEDS_LM355x is not set ++# CONFIG_LEDS_OT200 is not set ++# CONFIG_LEDS_BLINKM is not set ++CONFIG_LEDS_TRIGGERS=y ++ ++# ++# LED Triggers ++# ++# CONFIG_LEDS_TRIGGER_TIMER is not set ++# CONFIG_LEDS_TRIGGER_ONESHOT is not set ++# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set ++# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set ++# CONFIG_LEDS_TRIGGER_CPU is not set ++# CONFIG_LEDS_TRIGGER_GPIO is not set ++# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set ++ ++# ++# iptables trigger is under Netfilter config (LED target) ++# ++# CONFIG_LEDS_TRIGGER_TRANSIENT is not set ++# CONFIG_ACCESSIBILITY is not set ++# CONFIG_INFINIBAND is not set ++# CONFIG_EDAC is not set ++# CONFIG_RTC_CLASS is not set ++CONFIG_DMADEVICES=y ++# CONFIG_DMADEVICES_DEBUG is not set ++ ++# ++# DMA Devices ++# ++CONFIG_INTEL_MID_DMAC=m ++CONFIG_INTEL_MID_PCI=m ++CONFIG_INTEL_CLN_DMAC=m ++# CONFIG_INTEL_IOATDMA is not set ++# CONFIG_TIMB_DMA is not set ++# CONFIG_PCH_DMA is not set ++CONFIG_DMA_ENGINE=y ++ ++# ++# DMA Clients ++# ++# CONFIG_NET_DMA is not set ++# CONFIG_ASYNC_TX_DMA is not set ++# CONFIG_DMATEST is not set ++# CONFIG_AUXDISPLAY is not set ++CONFIG_UIO=m ++# CONFIG_UIO_CIF is not set ++# CONFIG_UIO_PDRV is not set ++# CONFIG_UIO_PDRV_GENIRQ is not set ++# CONFIG_UIO_DMEM_GENIRQ is not set ++# CONFIG_UIO_AEC is not set ++# CONFIG_UIO_SERCOS3 is not set ++# CONFIG_UIO_PCI_GENERIC is not set ++# CONFIG_UIO_NETX is not set ++ ++# ++# Virtio drivers ++# ++# CONFIG_VIRTIO_PCI is not set ++# CONFIG_VIRTIO_MMIO is not set ++ ++# ++# Microsoft Hyper-V guest support ++# ++# CONFIG_HYPERV is not set ++CONFIG_STAGING=y ++# CONFIG_ET131X is not set ++# CONFIG_SLICOSS is not set ++# CONFIG_USBIP_CORE is not set ++# CONFIG_W35UND is not set ++# CONFIG_PRISM2_USB is not set ++# CONFIG_ECHO is not set ++# CONFIG_COMEDI is not set ++# CONFIG_ASUS_OLED is not set ++# CONFIG_R8187SE is not set ++# CONFIG_RTL8192U is not set ++# CONFIG_RTLLIB is not set ++# CONFIG_R8712U is not set ++# CONFIG_RTS5139 is not set ++# CONFIG_TRANZPORT is not set ++# CONFIG_LINE6_USB is not set ++# CONFIG_USB_SERIAL_QUATECH2 is not set ++# CONFIG_VT6655 is not set ++# CONFIG_VT6656 is not set ++# CONFIG_DX_SEP is not set ++ ++# ++# IIO staging drivers ++# ++# CONFIG_IIO_SW_RING is not set ++ ++# ++# Accelerometers ++# ++# CONFIG_ADIS16201 is not set ++# CONFIG_ADIS16203 is not set ++# CONFIG_ADIS16204 is not set ++# CONFIG_ADIS16209 is not set ++# CONFIG_ADIS16220 is not set ++# CONFIG_ADIS16240 is not set ++# CONFIG_KXSD9 is not set ++# CONFIG_LIS3L02DQ is not set ++# CONFIG_SCA3000 is not set ++ ++# ++# Analog to digital converters ++# ++# CONFIG_AD7291 is not set ++# CONFIG_AD7606 is not set ++# CONFIG_AD799X is not set ++# CONFIG_AD7780 is not set ++# CONFIG_AD7816 is not set ++# CONFIG_AD7192 is not set ++# CONFIG_ADT7410 is not set ++# CONFIG_AD7280 is not set ++CONFIG_MAX78M6610_LMU=m ++ ++# ++# Analog digital bi-direction converters ++# ++# CONFIG_ADT7316 is not set ++ ++# ++# Capacitance to digital converters ++# ++# CONFIG_AD7150 is not set ++# CONFIG_AD7152 is not set ++# CONFIG_AD7746 is not set ++ ++# ++# Direct Digital Synthesis ++# ++# CONFIG_AD5930 is not set ++# CONFIG_AD9832 is not set ++# CONFIG_AD9834 is not set ++# CONFIG_AD9850 is not set ++# CONFIG_AD9852 is not set ++# CONFIG_AD9910 is not set ++# CONFIG_AD9951 is not set ++ ++# ++# Digital gyroscope sensors ++# ++# CONFIG_ADIS16060 is not set ++# CONFIG_ADIS16080 is not set ++# CONFIG_ADIS16130 is not set ++# CONFIG_ADIS16260 is not set ++# CONFIG_ADXRS450 is not set ++ ++# ++# Network Analyzer, Impedance Converters ++# ++# CONFIG_AD5933 is not set ++ ++# ++# Inertial measurement units ++# ++# CONFIG_ADIS16400 is not set ++ ++# ++# Light sensors ++# ++# CONFIG_SENSORS_ISL29018 is not set ++# CONFIG_SENSORS_ISL29028 is not set ++# CONFIG_SENSORS_TSL2563 is not set ++# CONFIG_TSL2583 is not set ++# CONFIG_TSL2x7x is not set ++ ++# ++# Magnetometer sensors ++# ++# CONFIG_SENSORS_AK8975 is not set ++# CONFIG_SENSORS_HMC5843 is not set ++ ++# ++# Active energy metering IC ++# ++# CONFIG_ADE7753 is not set ++# CONFIG_ADE7754 is not set ++# CONFIG_ADE7758 is not set ++# CONFIG_ADE7759 is not set ++# CONFIG_ADE7854 is not set ++ ++# ++# Resolver to digital converters ++# ++# CONFIG_AD2S90 is not set ++# CONFIG_AD2S1200 is not set ++# CONFIG_AD2S1210 is not set ++ ++# ++# Triggers - standalone ++# ++# CONFIG_IIO_GPIO_TRIGGER is not set ++CONFIG_IIO_SYSFS_TRIGGER=m ++# CONFIG_IIO_SIMPLE_DUMMY is not set ++# CONFIG_ZSMALLOC is not set ++# CONFIG_CRYSTALHD is not set ++# CONFIG_ACPI_QUICKSTART is not set ++# CONFIG_USB_ENESTORAGE is not set ++# CONFIG_BCM_WIMAX is not set ++# CONFIG_FT1000 is not set ++ ++# ++# Speakup console speech ++# ++# CONFIG_SPEAKUP is not set ++# CONFIG_TOUCHSCREEN_CLEARPAD_TM1217 is not set ++# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set ++# CONFIG_STAGING_MEDIA is not set ++ ++# ++# Android ++# ++# CONFIG_ANDROID is not set ++# CONFIG_USB_WPAN_HCD is not set ++# CONFIG_WIMAX_GDM72XX is not set ++# CONFIG_CSR_WIFI is not set ++# CONFIG_NET_VENDOR_SILICOM is not set ++# CONFIG_CED1401 is not set ++# CONFIG_DGRP is not set ++# CONFIG_SB105X is not set ++CONFIG_X86_PLATFORM_DEVICES=y ++# CONFIG_ACERHDF is not set ++# CONFIG_ASUS_LAPTOP is not set ++# CONFIG_FUJITSU_TABLET is not set ++# CONFIG_AMILO_RFKILL is not set ++# CONFIG_HP_ACCEL is not set ++# CONFIG_SONY_LAPTOP is not set ++# CONFIG_THINKPAD_ACPI is not set ++# CONFIG_SENSORS_HDAPS is not set ++# CONFIG_INTEL_MENLOW is not set ++# CONFIG_ACPI_WMI is not set ++# CONFIG_TOPSTAR_LAPTOP is not set ++# CONFIG_TOSHIBA_BT_RFKILL is not set ++# CONFIG_ACPI_CMPC is not set ++CONFIG_INTEL_CLN_ESRAM=y ++CONFIG_INTEL_CLN_ECC_REFRESH_PERIOD=24 ++CONFIG_INTEL_CLN_ECC_SCRUB=y ++# CONFIG_INTEL_CLN_ECC_SCRUB_OVERRIDE_CONFIG is not set ++# CONFIG_INTEL_CLN_ECC_SCRUB_S3_CONFIG is not set ++CONFIG_INTEL_CLN_THERMAL=y ++CONFIG_INTEL_CLN_AUDIO_CTRL=m ++# CONFIG_INTEL_IPS is not set ++# CONFIG_IBM_RTL is not set ++# CONFIG_XO15_EBOOK is not set ++ ++# ++# Hardware Spinlock drivers ++# ++CONFIG_CLKSRC_I8253=y ++CONFIG_CLKEVT_I8253=y ++CONFIG_CLKBLD_I8253=y ++# CONFIG_IOMMU_SUPPORT is not set ++ ++# ++# Remoteproc drivers (EXPERIMENTAL) ++# ++# CONFIG_STE_MODEM_RPROC is not set ++ ++# ++# Rpmsg drivers (EXPERIMENTAL) ++# ++# CONFIG_VIRT_DRIVERS is not set ++# CONFIG_PM_DEVFREQ is not set ++# CONFIG_EXTCON is not set ++# CONFIG_MEMORY is not set ++CONFIG_IIO=m ++CONFIG_IIO_BUFFER=y ++CONFIG_IIO_BUFFER_CB=y ++CONFIG_IIO_KFIFO_BUF=m ++CONFIG_IIO_TRIGGERED_BUFFER=m ++CONFIG_IIO_TRIGGER=y ++CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 ++ ++# ++# Accelerometers ++# ++CONFIG_HID_SENSOR_ACCEL_3D=m ++ ++# ++# Analog to digital converters ++# ++# CONFIG_AD7266 is not set ++CONFIG_AD7298=m ++# CONFIG_AD7791 is not set ++# CONFIG_AD7793 is not set ++# CONFIG_AD7476 is not set ++# CONFIG_AD7887 is not set ++# CONFIG_MAX1363 is not set ++# CONFIG_TI_ADC081C is not set ++ ++# ++# Amplifiers ++# ++# CONFIG_AD8366 is not set ++ ++# ++# STMicro sensors ++# ++CONFIG_IIO_ST_SENSORS_I2C=m ++CONFIG_IIO_ST_SENSORS_SPI=m ++CONFIG_IIO_ST_SENSORS_CORE=m ++ ++# ++# Digital to analog converters ++# ++# CONFIG_AD5064 is not set ++# CONFIG_AD5360 is not set ++# CONFIG_AD5380 is not set ++# CONFIG_AD5421 is not set ++# CONFIG_AD5624R_SPI is not set ++# CONFIG_AD5446 is not set ++# CONFIG_AD5449 is not set ++# CONFIG_AD5504 is not set ++# CONFIG_AD5755 is not set ++# CONFIG_AD5764 is not set ++# CONFIG_AD5791 is not set ++# CONFIG_AD5686 is not set ++# CONFIG_MAX517 is not set ++# CONFIG_MCP4725 is not set ++ ++# ++# Frequency Synthesizers DDS/PLL ++# ++ ++# ++# Clock Generator/Distribution ++# ++# CONFIG_AD9523 is not set ++ ++# ++# Phase-Locked Loop (PLL) frequency synthesizers ++# ++# CONFIG_ADF4350 is not set ++ ++# ++# Digital gyroscope sensors ++# ++# CONFIG_ADIS16136 is not set ++# CONFIG_HID_SENSOR_GYRO_3D is not set ++ ++# ++# Inertial measurement units ++# ++# CONFIG_ADIS16480 is not set ++ ++# ++# Light sensors ++# ++# CONFIG_ADJD_S311 is not set ++# CONFIG_VCNL4000 is not set ++# CONFIG_HID_SENSOR_ALS is not set ++ ++# ++# Magnetometer sensors ++# ++# CONFIG_HID_SENSOR_MAGNETOMETER_3D is not set ++# CONFIG_VME_BUS is not set ++CONFIG_PWM=y ++CONFIG_PWM_SYSFS=y ++# CONFIG_IPACK_BUS is not set ++ ++# ++# Firmware Drivers ++# ++# CONFIG_EDD is not set ++CONFIG_FIRMWARE_MEMMAP=y ++CONFIG_EFI_VARS=m ++# CONFIG_DELL_RBU is not set ++# CONFIG_DCDBAS is not set ++# CONFIG_ISCSI_IBFT_FIND is not set ++# CONFIG_GOOGLE_FIRMWARE is not set ++ ++# ++# File systems ++# ++CONFIG_DCACHE_WORD_ACCESS=y ++CONFIG_EXT2_FS=y ++# CONFIG_EXT2_FS_XATTR is not set ++# CONFIG_EXT2_FS_XIP is not set ++CONFIG_EXT3_FS=y ++# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set ++CONFIG_EXT3_FS_XATTR=y ++CONFIG_EXT3_FS_POSIX_ACL=y ++CONFIG_EXT3_FS_SECURITY=y ++# CONFIG_EXT4_FS is not set ++CONFIG_JBD=y ++# CONFIG_JBD_DEBUG is not set ++CONFIG_FS_MBCACHE=y ++# CONFIG_REISERFS_FS is not set ++# CONFIG_JFS_FS is not set ++# CONFIG_XFS_FS is not set ++# CONFIG_BTRFS_FS is not set ++# CONFIG_NILFS2_FS is not set ++CONFIG_FS_POSIX_ACL=y ++CONFIG_FILE_LOCKING=y ++CONFIG_FSNOTIFY=y ++CONFIG_DNOTIFY=y ++CONFIG_INOTIFY_USER=y ++# CONFIG_FANOTIFY is not set ++# CONFIG_QUOTA is not set ++# CONFIG_QUOTACTL is not set ++# CONFIG_AUTOFS4_FS is not set ++# CONFIG_FUSE_FS is not set ++CONFIG_GENERIC_ACL=y ++ ++# ++# Caches ++# ++# CONFIG_FSCACHE is not set ++ ++# ++# CD-ROM/DVD Filesystems ++# ++# CONFIG_ISO9660_FS is not set ++# CONFIG_UDF_FS is not set ++ ++# ++# DOS/FAT/NT Filesystems ++# ++CONFIG_FAT_FS=y ++# CONFIG_MSDOS_FS is not set ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_CODEPAGE=437 ++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" ++# CONFIG_NTFS_FS is not set ++ ++# ++# Pseudo filesystems ++# ++CONFIG_PROC_FS=y ++CONFIG_PROC_KCORE=y ++CONFIG_PROC_SYSCTL=y ++CONFIG_PROC_PAGE_MONITOR=y ++CONFIG_SYSFS=y ++CONFIG_TMPFS=y ++CONFIG_TMPFS_POSIX_ACL=y ++CONFIG_TMPFS_XATTR=y ++CONFIG_HUGETLBFS=y ++CONFIG_HUGETLB_PAGE=y ++# CONFIG_CONFIGFS_FS is not set ++# CONFIG_MISC_FILESYSTEMS is not set ++CONFIG_NETWORK_FILESYSTEMS=y ++# CONFIG_NFS_FS is not set ++# CONFIG_NFSD is not set ++# CONFIG_CEPH_FS is not set ++# CONFIG_CIFS is not set ++# CONFIG_NCP_FS is not set ++# CONFIG_CODA_FS is not set ++# CONFIG_AFS_FS is not set ++CONFIG_NLS=y ++CONFIG_NLS_DEFAULT="utf8" ++CONFIG_NLS_CODEPAGE_437=y ++# CONFIG_NLS_CODEPAGE_737 is not set ++# CONFIG_NLS_CODEPAGE_775 is not set ++CONFIG_NLS_CODEPAGE_850=y ++# CONFIG_NLS_CODEPAGE_852 is not set ++# CONFIG_NLS_CODEPAGE_855 is not set ++# CONFIG_NLS_CODEPAGE_857 is not set ++# CONFIG_NLS_CODEPAGE_860 is not set ++# CONFIG_NLS_CODEPAGE_861 is not set ++# CONFIG_NLS_CODEPAGE_862 is not set ++# CONFIG_NLS_CODEPAGE_863 is not set ++# CONFIG_NLS_CODEPAGE_864 is not set ++# CONFIG_NLS_CODEPAGE_865 is not set ++# CONFIG_NLS_CODEPAGE_866 is not set ++# CONFIG_NLS_CODEPAGE_869 is not set ++# CONFIG_NLS_CODEPAGE_936 is not set ++# CONFIG_NLS_CODEPAGE_950 is not set ++# CONFIG_NLS_CODEPAGE_932 is not set ++# CONFIG_NLS_CODEPAGE_949 is not set ++# CONFIG_NLS_CODEPAGE_874 is not set ++# CONFIG_NLS_ISO8859_8 is not set ++# CONFIG_NLS_CODEPAGE_1250 is not set ++# CONFIG_NLS_CODEPAGE_1251 is not set ++CONFIG_NLS_ASCII=y ++CONFIG_NLS_ISO8859_1=y ++# CONFIG_NLS_ISO8859_2 is not set ++# CONFIG_NLS_ISO8859_3 is not set ++# CONFIG_NLS_ISO8859_4 is not set ++# CONFIG_NLS_ISO8859_5 is not set ++# CONFIG_NLS_ISO8859_6 is not set ++# CONFIG_NLS_ISO8859_7 is not set ++# CONFIG_NLS_ISO8859_9 is not set ++# CONFIG_NLS_ISO8859_13 is not set ++# CONFIG_NLS_ISO8859_14 is not set ++# CONFIG_NLS_ISO8859_15 is not set ++# CONFIG_NLS_KOI8_R is not set ++# CONFIG_NLS_KOI8_U is not set ++# CONFIG_NLS_MAC_ROMAN is not set ++# CONFIG_NLS_MAC_CELTIC is not set ++# CONFIG_NLS_MAC_CENTEURO is not set ++# CONFIG_NLS_MAC_CROATIAN is not set ++# CONFIG_NLS_MAC_CYRILLIC is not set ++# CONFIG_NLS_MAC_GAELIC is not set ++# CONFIG_NLS_MAC_GREEK is not set ++# CONFIG_NLS_MAC_ICELAND is not set ++# CONFIG_NLS_MAC_INUIT is not set ++# CONFIG_NLS_MAC_ROMANIAN is not set ++# CONFIG_NLS_MAC_TURKISH is not set ++# CONFIG_NLS_UTF8 is not set ++ ++# ++# Kernel hacking ++# ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y ++CONFIG_PRINTK_TIME=y ++CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 ++# CONFIG_ENABLE_WARN_DEPRECATED is not set ++CONFIG_ENABLE_MUST_CHECK=y ++CONFIG_FRAME_WARN=2048 ++CONFIG_MAGIC_SYSRQ=y ++# CONFIG_STRIP_ASM_SYMS is not set ++# CONFIG_READABLE_ASM is not set ++# CONFIG_UNUSED_SYMBOLS is not set ++CONFIG_DEBUG_FS=y ++CONFIG_HEADERS_CHECK=y ++# CONFIG_DEBUG_SECTION_MISMATCH is not set ++CONFIG_DEBUG_KERNEL=y ++# CONFIG_DEBUG_SHIRQ is not set ++# CONFIG_LOCKUP_DETECTOR is not set ++# CONFIG_PANIC_ON_OOPS is not set ++CONFIG_PANIC_ON_OOPS_VALUE=0 ++# CONFIG_DETECT_HUNG_TASK is not set ++# CONFIG_SCHED_DEBUG is not set ++# CONFIG_SCHEDSTATS is not set ++CONFIG_TIMER_STATS=y ++# CONFIG_DEBUG_OBJECTS is not set ++# CONFIG_SLUB_DEBUG_ON is not set ++# CONFIG_SLUB_STATS is not set ++CONFIG_HAVE_DEBUG_KMEMLEAK=y ++# CONFIG_DEBUG_KMEMLEAK is not set ++# CONFIG_DEBUG_RT_MUTEXES is not set ++# CONFIG_RT_MUTEX_TESTER is not set ++CONFIG_DEBUG_SPINLOCK=y ++CONFIG_DEBUG_MUTEXES=y ++CONFIG_DEBUG_LOCK_ALLOC=y ++CONFIG_PROVE_LOCKING=y ++# CONFIG_PROVE_RCU is not set ++# CONFIG_SPARSE_RCU_POINTER is not set ++CONFIG_LOCKDEP=y ++# CONFIG_LOCK_STAT is not set ++# CONFIG_DEBUG_LOCKDEP is not set ++CONFIG_TRACE_IRQFLAGS=y ++# CONFIG_DEBUG_ATOMIC_SLEEP is not set ++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set ++CONFIG_STACKTRACE=y ++# CONFIG_DEBUG_STACK_USAGE is not set ++# CONFIG_DEBUG_KOBJECT is not set ++# CONFIG_DEBUG_HIGHMEM is not set ++CONFIG_DEBUG_BUGVERBOSE=y ++# CONFIG_DEBUG_INFO is not set ++# CONFIG_DEBUG_VM is not set ++# CONFIG_DEBUG_VIRTUAL is not set ++# CONFIG_DEBUG_WRITECOUNT is not set ++CONFIG_DEBUG_MEMORY_INIT=y ++# CONFIG_DEBUG_LIST is not set ++# CONFIG_TEST_LIST_SORT is not set ++# CONFIG_DEBUG_SG is not set ++# CONFIG_DEBUG_NOTIFIERS is not set ++# CONFIG_DEBUG_CREDENTIALS is not set ++CONFIG_ARCH_WANT_FRAME_POINTERS=y ++CONFIG_FRAME_POINTER=y ++# CONFIG_BOOT_PRINTK_DELAY is not set ++# CONFIG_RCU_TORTURE_TEST is not set ++# CONFIG_RCU_TRACE is not set ++# CONFIG_BACKTRACE_SELF_TEST is not set ++# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set ++# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set ++# CONFIG_LKDTM is not set ++# CONFIG_NOTIFIER_ERROR_INJECTION is not set ++# CONFIG_FAULT_INJECTION is not set ++# CONFIG_LATENCYTOP is not set ++# CONFIG_DEBUG_PAGEALLOC is not set ++CONFIG_USER_STACKTRACE_SUPPORT=y ++CONFIG_HAVE_FUNCTION_TRACER=y ++CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y ++CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST=y ++CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y ++CONFIG_HAVE_DYNAMIC_FTRACE=y ++CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y ++CONFIG_HAVE_SYSCALL_TRACEPOINTS=y ++CONFIG_HAVE_C_RECORDMCOUNT=y ++CONFIG_TRACING_SUPPORT=y ++# CONFIG_FTRACE is not set ++# CONFIG_RBTREE_TEST is not set ++# CONFIG_INTERVAL_TREE_TEST is not set ++# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set ++# CONFIG_BUILD_DOCSRC is not set ++# CONFIG_DYNAMIC_DEBUG is not set ++# CONFIG_DMA_API_DEBUG is not set ++# CONFIG_ATOMIC64_SELFTEST is not set ++# CONFIG_SAMPLES is not set ++CONFIG_HAVE_ARCH_KGDB=y ++# CONFIG_KGDB is not set ++CONFIG_HAVE_ARCH_KMEMCHECK=y ++# CONFIG_KMEMCHECK is not set ++# CONFIG_TEST_KSTRTOX is not set ++# CONFIG_STRICT_DEVMEM is not set ++CONFIG_X86_VERBOSE_BOOTUP=y ++CONFIG_EARLY_PRINTK=y ++# CONFIG_EARLY_PRINTK_DBGP is not set ++CONFIG_DEBUG_STACKOVERFLOW=y ++CONFIG_X86_PTDUMP=y ++CONFIG_DEBUG_RODATA=y ++# CONFIG_DEBUG_RODATA_TEST is not set ++CONFIG_DEBUG_SET_MODULE_RONX=y ++# CONFIG_DEBUG_NX_TEST is not set ++# CONFIG_DOUBLEFAULT is not set ++# CONFIG_IOMMU_STRESS is not set ++CONFIG_HAVE_MMIOTRACE_SUPPORT=y ++CONFIG_IO_DELAY_TYPE_0X80=0 ++CONFIG_IO_DELAY_TYPE_0XED=1 ++CONFIG_IO_DELAY_TYPE_UDELAY=2 ++CONFIG_IO_DELAY_TYPE_NONE=3 ++CONFIG_IO_DELAY_0X80=y ++# CONFIG_IO_DELAY_0XED is not set ++# CONFIG_IO_DELAY_UDELAY is not set ++# CONFIG_IO_DELAY_NONE is not set ++CONFIG_DEFAULT_IO_DELAY_TYPE=0 ++CONFIG_DEBUG_BOOT_PARAMS=y ++# CONFIG_CPA_DEBUG is not set ++CONFIG_OPTIMIZE_INLINING=y ++# CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set ++# CONFIG_DEBUG_NMI_SELFTEST is not set ++ ++# ++# Security options ++# ++CONFIG_KEYS=y ++# CONFIG_ENCRYPTED_KEYS is not set ++CONFIG_KEYS_DEBUG_PROC_KEYS=y ++# CONFIG_SECURITY_DMESG_RESTRICT is not set ++CONFIG_SECURITY=y ++# CONFIG_SECURITYFS is not set ++CONFIG_SECURITY_NETWORK=y ++# CONFIG_SECURITY_NETWORK_XFRM is not set ++# CONFIG_SECURITY_PATH is not set ++# CONFIG_SECURITY_SMACK is not set ++# CONFIG_SECURITY_TOMOYO is not set ++# CONFIG_SECURITY_APPARMOR is not set ++# CONFIG_SECURITY_YAMA is not set ++# CONFIG_IMA is not set ++# CONFIG_EVM is not set ++CONFIG_DEFAULT_SECURITY_DAC=y ++CONFIG_DEFAULT_SECURITY="" ++CONFIG_CRYPTO=y ++ ++# ++# Crypto core or helper ++# ++CONFIG_CRYPTO_ALGAPI=y ++CONFIG_CRYPTO_ALGAPI2=y ++CONFIG_CRYPTO_AEAD2=y ++CONFIG_CRYPTO_BLKCIPHER=m ++CONFIG_CRYPTO_BLKCIPHER2=y ++CONFIG_CRYPTO_HASH=y ++CONFIG_CRYPTO_HASH2=y ++CONFIG_CRYPTO_RNG=m ++CONFIG_CRYPTO_RNG2=y ++CONFIG_CRYPTO_PCOMP2=y ++CONFIG_CRYPTO_MANAGER=m ++CONFIG_CRYPTO_MANAGER2=y ++# CONFIG_CRYPTO_USER is not set ++CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y ++# CONFIG_CRYPTO_GF128MUL is not set ++# CONFIG_CRYPTO_NULL is not set ++CONFIG_CRYPTO_WORKQUEUE=y ++# CONFIG_CRYPTO_CRYPTD is not set ++# CONFIG_CRYPTO_AUTHENC is not set ++# CONFIG_CRYPTO_TEST is not set ++ ++# ++# Authenticated Encryption with Associated Data ++# ++# CONFIG_CRYPTO_CCM is not set ++# CONFIG_CRYPTO_GCM is not set ++# CONFIG_CRYPTO_SEQIV is not set ++ ++# ++# Block modes ++# ++# CONFIG_CRYPTO_CBC is not set ++# CONFIG_CRYPTO_CTR is not set ++# CONFIG_CRYPTO_CTS is not set ++CONFIG_CRYPTO_ECB=m ++# CONFIG_CRYPTO_LRW is not set ++# CONFIG_CRYPTO_PCBC is not set ++# CONFIG_CRYPTO_XTS is not set ++ ++# ++# Hash modes ++# ++# CONFIG_CRYPTO_HMAC is not set ++# CONFIG_CRYPTO_XCBC is not set ++# CONFIG_CRYPTO_VMAC is not set ++ ++# ++# Digest ++# ++CONFIG_CRYPTO_CRC32C=y ++# CONFIG_CRYPTO_CRC32C_INTEL is not set ++# CONFIG_CRYPTO_GHASH is not set ++# CONFIG_CRYPTO_MD4 is not set ++# CONFIG_CRYPTO_MD5 is not set ++# CONFIG_CRYPTO_MICHAEL_MIC is not set ++# CONFIG_CRYPTO_RMD128 is not set ++# CONFIG_CRYPTO_RMD160 is not set ++# CONFIG_CRYPTO_RMD256 is not set ++# CONFIG_CRYPTO_RMD320 is not set ++# CONFIG_CRYPTO_SHA1 is not set ++CONFIG_CRYPTO_SHA256=m ++# CONFIG_CRYPTO_SHA512 is not set ++# CONFIG_CRYPTO_TGR192 is not set ++# CONFIG_CRYPTO_WP512 is not set ++ ++# ++# Ciphers ++# ++CONFIG_CRYPTO_AES=y ++# CONFIG_CRYPTO_AES_586 is not set ++# CONFIG_CRYPTO_AES_NI_INTEL is not set ++# CONFIG_CRYPTO_ANUBIS is not set ++CONFIG_CRYPTO_ARC4=m ++# CONFIG_CRYPTO_BLOWFISH is not set ++# CONFIG_CRYPTO_CAMELLIA is not set ++# CONFIG_CRYPTO_CAST5 is not set ++# CONFIG_CRYPTO_CAST6 is not set ++# CONFIG_CRYPTO_DES is not set ++# CONFIG_CRYPTO_FCRYPT is not set ++# CONFIG_CRYPTO_KHAZAD is not set ++# CONFIG_CRYPTO_SALSA20 is not set ++# CONFIG_CRYPTO_SALSA20_586 is not set ++# CONFIG_CRYPTO_SEED is not set ++# CONFIG_CRYPTO_SERPENT is not set ++# CONFIG_CRYPTO_SERPENT_SSE2_586 is not set ++# CONFIG_CRYPTO_TEA is not set ++# CONFIG_CRYPTO_TWOFISH is not set ++# CONFIG_CRYPTO_TWOFISH_586 is not set ++ ++# ++# Compression ++# ++# CONFIG_CRYPTO_DEFLATE is not set ++# CONFIG_CRYPTO_ZLIB is not set ++# CONFIG_CRYPTO_LZO is not set ++ ++# ++# Random Number Generation ++# ++CONFIG_CRYPTO_ANSI_CPRNG=m ++# CONFIG_CRYPTO_USER_API_HASH is not set ++# CONFIG_CRYPTO_USER_API_SKCIPHER is not set ++CONFIG_CRYPTO_HW=y ++# CONFIG_CRYPTO_DEV_PADLOCK is not set ++# CONFIG_CRYPTO_DEV_GEODE is not set ++# CONFIG_ASYMMETRIC_KEY_TYPE is not set ++CONFIG_HAVE_KVM=y ++# CONFIG_VIRTUALIZATION is not set ++# CONFIG_BINARY_PRINTF is not set ++ ++# ++# Library routines ++# ++CONFIG_BITREVERSE=y ++CONFIG_GENERIC_STRNCPY_FROM_USER=y ++CONFIG_GENERIC_STRNLEN_USER=y ++CONFIG_GENERIC_FIND_FIRST_BIT=y ++CONFIG_GENERIC_PCI_IOMAP=y ++CONFIG_GENERIC_IOMAP=y ++CONFIG_GENERIC_IO=y ++CONFIG_PERCPU_RWSEM=y ++CONFIG_CRC_CCITT=m ++CONFIG_CRC16=y ++CONFIG_CRC_T10DIF=y ++# CONFIG_CRC_ITU_T is not set ++CONFIG_CRC32=y ++# CONFIG_CRC32_SELFTEST is not set ++CONFIG_CRC32_SLICEBY8=y ++# CONFIG_CRC32_SLICEBY4 is not set ++# CONFIG_CRC32_SARWATE is not set ++# CONFIG_CRC32_BIT is not set ++# CONFIG_CRC7 is not set ++# CONFIG_LIBCRC32C is not set ++# CONFIG_CRC8 is not set ++CONFIG_ZLIB_INFLATE=y ++CONFIG_ZLIB_DEFLATE=m ++# CONFIG_XZ_DEC is not set ++# CONFIG_XZ_DEC_BCJ is not set ++CONFIG_DECOMPRESS_GZIP=y ++CONFIG_DECOMPRESS_BZIP2=y ++CONFIG_DECOMPRESS_LZMA=y ++CONFIG_HAS_IOMEM=y ++CONFIG_HAS_IOPORT=y ++CONFIG_HAS_DMA=y ++CONFIG_DQL=y ++CONFIG_NLATTR=y ++CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y ++CONFIG_AVERAGE=y ++# CONFIG_CORDIC is not set ++# CONFIG_DDR is not set +diff --git a/net/ieee802154/wpan-class.c b/net/ieee802154/wpan-class.c +index 1627ef2..13571ea 100644 +--- a/net/ieee802154/wpan-class.c ++++ b/net/ieee802154/wpan-class.c +@@ -91,7 +91,7 @@ static struct class wpan_phy_class = { + static DEFINE_MUTEX(wpan_phy_mutex); + static int wpan_phy_idx; + +-static int wpan_phy_match(struct device *dev, void *data) ++static int wpan_phy_match(struct device *dev, const void *data) + { + return !strcmp(dev_name(dev), (const char *)data); + } +@@ -103,8 +103,7 @@ struct wpan_phy *wpan_phy_find(const char *str) + if (WARN_ON(!str)) + return NULL; + +- dev = class_find_device(&wpan_phy_class, NULL, +- (void *)str, wpan_phy_match); ++ dev = class_find_device(&wpan_phy_class, NULL, str, wpan_phy_match); + if (!dev) + return NULL; + +diff --git a/net/nfc/core.c b/net/nfc/core.c +index aa64ea4..0f4a6de 100644 +--- a/net/nfc/core.c ++++ b/net/nfc/core.c +@@ -734,10 +734,10 @@ struct class nfc_class = { + }; + EXPORT_SYMBOL(nfc_class); + +-static int match_idx(struct device *d, void *data) ++static int match_idx(struct device *d, const void *data) + { + struct nfc_dev *dev = to_nfc_dev(d); +- unsigned int *idx = data; ++ const unsigned int *idx = data; + + return dev->idx == *idx; + } diff --git a/recipes-kernel/linux/linux-yocto-clanton_3.8.bb b/recipes-kernel/linux/linux-yocto-clanton_3.8.bb new file mode 100644 index 0000000..135338d --- /dev/null +++ b/recipes-kernel/linux/linux-yocto-clanton_3.8.bb @@ -0,0 +1,70 @@ +# linux-yocto-custom.bb: +# +# An example kernel recipe that uses the linux-yocto and oe-core +# kernel classes to apply a subset of yocto kernel management to git +# managed kernel repositories. +# +# To use linux-yocto-custom in your layer, create a +# linux-yocto-custom.bbappend file containing at least the following +# lines: +# +# FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" +# COMPATIBLE_MACHINE_yourmachine = "yourmachine" +# +# You must also provide a Linux kernel configuration. The most direct +# method is to copy your .config to files/defconfig in your layer, +# in the same directory as the bbappend. +# +# To use the yocto kernel tooling to generate a BSP configuration +# using modular configuration fragments, see the yocto-bsp and +# yocto-kernel tools documentation. +# +# Warning: +# +# Building this example without providing a defconfig or BSP +# configuration will result in build or boot errors. This is not a +# bug. +# +# +# Notes: +# +# patches: patches can be merged into to the source git tree itself, +# added via the SRC_URI, or controlled via a BSP +# configuration. +# +# example configuration addition: +# SRC_URI += "file://smp.cfg" +# example patch addition (for kernel v3.4 only): +# SRC_URI += "file://0001-linux-version-tweak.patch +# example feature addition (for kernel v3.4 only): +# SRC_URI += "file://feature.scc" +# + +inherit kernel +require recipes-kernel/linux/linux-yocto.inc + +# Override SRC_URI in a bbappend file to point at a different source +# tree if you do not want to build from Linus' tree. + +SRC_URI = "git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git;branch=linux-3.8.y" + +SRC_URI += "file://clanton.patch" +SRC_URI += "file://clanton.cfg" +SRC_URI += "file://clanton-standard.scc" + +LINUX_VERSION ?= "3.8" +LINUX_VERSION_EXTENSION ?= "-clanton" + +# Override SRCREV to point to a different commit in a bbappend file to +# build a different release of the Linux kernel. +SRCREV = "531ec28f9f26f78797124b9efcf2138b89794a1e" +SRCREV_machine_clanton = "531ec28f9f26f78797124b9efcf2138b89794a1e" + +PR = "r0" +PV = "${LINUX_VERSION}" + +# Override COMPATIBLE_MACHINE to include your machine in a bbappend +# file. Leaving it empty here ensures an early explicit build failure. +COMPATIBLE_MACHINE = "clanton" + +RDEPENDS_kernel-base="" |