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From 4a7ee25e3f89d77a8ced081b73aebfb7a882302c Mon Sep 17 00:00:00 2001
From: Stefano Babic <sbabic@denx.de>
Date: Wed, 22 Feb 2012 00:24:36 +0000
Subject: [PATCH 01/56] MX5: Add definitions for SATA controller
Add base address and MXC_SATA_CLK to return
the clock used for the SATA controller.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Dirk Behme <dirk.behme@de.bosch.com>
---
arch/arm/cpu/armv7/mx5/clock.c | 2 ++
arch/arm/include/asm/arch-mx5/clock.h | 1 +
arch/arm/include/asm/arch-mx5/imx-regs.h | 1 +
3 files changed, 4 insertions(+)
diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c
index e92f106..8f8d01c 100644
--- a/arch/arm/cpu/armv7/mx5/clock.c
+++ b/arch/arm/cpu/armv7/mx5/clock.c
@@ -380,6 +380,8 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
case MXC_FEC_CLK:
return decode_pll(mxc_plls[PLL1_CLOCK],
CONFIG_SYS_MX5_HCLK);
+ case MXC_SATA_CLK:
+ return get_ahb_clk();
default:
break;
}
diff --git a/arch/arm/include/asm/arch-mx5/clock.h b/arch/arm/include/asm/arch-mx5/clock.h
index ea972a3..f9f82f3 100644
--- a/arch/arm/include/asm/arch-mx5/clock.h
+++ b/arch/arm/include/asm/arch-mx5/clock.h
@@ -32,6 +32,7 @@ enum mxc_clock {
MXC_UART_CLK,
MXC_CSPI_CLK,
MXC_FEC_CLK,
+ MXC_SATA_CLK,
};
unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref);
diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h
index 4fa6658..262517e 100644
--- a/arch/arm/include/asm/arch-mx5/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
@@ -43,6 +43,7 @@
#define NFC_BASE_ADDR_AXI 0xF7FF0000
#define IRAM_BASE_ADDR 0xF8000000
#define CS1_BASE_ADDR 0xF4000000
+#define SATA_BASE_ADDR 0x10000000
#else
#error "CPU_TYPE not defined"
#endif
--
1.7.10
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