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From 46db2c424164101964bd88f39d3693d7a786d1a4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Eric=20B=C3=A9nard?= <eric@eukrea.com>
Date: Mon, 20 Feb 2012 22:32:22 +0100
Subject: [PATCH 1/7] add i2c clock support
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Eric B�nard <eric@eukrea.com>
---
Upstream-Status: Applied for 2012.04.0
arch/arm/mach-imx/speed-imx53.c | 26 ++++++++++++++++++++++++++
1 files changed, 26 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-imx/speed-imx53.c b/arch/arm/mach-imx/speed-imx53.c
index 0d6ac24..a2385fa 100644
--- a/arch/arm/mach-imx/speed-imx53.c
+++ b/arch/arm/mach-imx/speed-imx53.c
@@ -169,6 +169,31 @@ unsigned long imx_get_fecclk(void)
return imx_get_ipgclk();
}
+static unsigned long imx_get_ipg_perclk(void)
+{
+ u32 reg;
+
+ reg = ccm_readl(MX5_CCM_CBCDR);
+ if (!(reg & MX5_CCM_CBCDR_PERIPH_CLK_SEL))
+ return pll2_sw_get_rate();
+ reg = ccm_readl(MX5_CCM_CBCMR);
+ switch ((reg & MX5_CCM_CBCMR_PERIPH_CLK_SEL_MASK) >>
+ MX5_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET) {
+ case 0:
+ return pll1_main_get_rate();
+ case 1:
+ return pll3_sw_get_rate();
+ /* case 2:
+ TODO : LP_APM */
+ }
+ return 0;
+}
+
+unsigned long imx_get_i2cclk(void)
+{
+ return imx_get_ipg_perclk();
+}
+
unsigned long imx_get_mmcclk(void)
{
u32 reg, prediv, podf, rate;
@@ -201,4 +226,5 @@ void imx_dump_clocks(void)
printf("ipg: %ld\n", imx_get_ipgclk());
printf("fec: %ld\n", imx_get_fecclk());
printf("gpt: %ld\n", imx_get_gptclk());
+ printf("i2c: %ld\n", imx_get_i2cclk());
}
--
1.7.7.6
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