diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt old mode 100755 new mode 100644 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig old mode 100755 new mode 100644 diff --git a/arch/arm/configs/imx5_defconfig b/arch/arm/configs/imx5_defconfig old mode 100755 new mode 100644 diff --git a/arch/arm/configs/nitrogen6x_defconfig b/arch/arm/configs/nitrogen6x_defconfig new file mode 100644 index 0000000..dfb067c --- /dev/null +++ b/arch/arm/configs/nitrogen6x_defconfig @@ -0,0 +1,3092 @@ +# +# Automatically generated make config: don't edit +# Linux/arm 3.0.35 Kernel Configuration +# +CONFIG_ARM=y +CONFIG_HAVE_PWM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_HAVE_SCHED_CLOCK=y +CONFIG_GENERIC_GPIO=y +# CONFIG_ARCH_USES_GETTIMEOFFSET is not set +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_KTIME_SCALAR=y +CONFIG_HAVE_PROC_CPU=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_LOCKBREAK=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_ARCH_HAS_CPUFREQ=y +CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_FIQ=y +CONFIG_VECTORS_BASE=0xffff0000 +# CONFIG_ARM_PATCH_PHYS_VIRT is not set +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_HAVE_IRQ_WORK=y +CONFIG_IRQ_WORK=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_CROSS_COMPILE="" +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_LZO is not set +CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_FHANDLE is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +CONFIG_HAVE_GENERIC_HARDIRQS=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_HARDIRQS=y +CONFIG_HAVE_SPARSE_IRQ=y +CONFIG_GENERIC_IRQ_SHOW=y +# CONFIG_SPARSE_IRQ is not set + +# +# RCU Subsystem +# +CONFIG_TREE_PREEMPT_RCU=y +CONFIG_PREEMPT_RCU=y +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_FANOUT=32 +# CONFIG_RCU_FANOUT_EXACT is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_BOOST is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +# CONFIG_NAMESPACES is not set +# CONFIG_SCHED_AUTOGROUP is not set +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +# CONFIG_RD_XZ is not set +# CONFIG_RD_LZO is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_EXPERT=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_EMBEDDED=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_PERF_USE_VMALLOC=y + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_PERF_COUNTERS is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_PCI_QUIRKS=y +CONFIG_SLUB_DEBUG=y +CONFIG_COMPAT_BRK=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_USE_GENERIC_SMP_HELPERS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_HW_BREAKPOINT=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_STOP_MACHINE=y +CONFIG_BLOCK=y +CONFIG_LBDAF=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +# CONFIG_INLINE_SPIN_TRYLOCK is not set +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK is not set +# CONFIG_INLINE_SPIN_LOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set +# CONFIG_INLINE_SPIN_UNLOCK is not set +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set +# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_READ_TRYLOCK is not set +# CONFIG_INLINE_READ_LOCK is not set +# CONFIG_INLINE_READ_LOCK_BH is not set +# CONFIG_INLINE_READ_LOCK_IRQ is not set +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set +# CONFIG_INLINE_READ_UNLOCK is not set +# CONFIG_INLINE_READ_UNLOCK_BH is not set +# CONFIG_INLINE_READ_UNLOCK_IRQ is not set +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_WRITE_TRYLOCK is not set +# CONFIG_INLINE_WRITE_LOCK is not set +# CONFIG_INLINE_WRITE_LOCK_BH is not set +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set +# CONFIG_INLINE_WRITE_UNLOCK is not set +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set +# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_FREEZER=y + +# +# System Type +# +CONFIG_MMU=y +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_BCMRING is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CNS3XXX is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +CONFIG_ARCH_MXC=y +# CONFIG_ARCH_MXS is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_DOVE is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_LPC32XX is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_NUC93X is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_SHMOBILE is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_S5P64X0 is not set +# CONFIG_ARCH_S5PC100 is not set +# CONFIG_ARCH_S5PV210 is not set +# CONFIG_ARCH_EXYNOS4 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_TCC_926 is not set +# CONFIG_ARCH_U300 is not set +# CONFIG_ARCH_U8500 is not set +# CONFIG_ARCH_NOMADIK is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_PLAT_SPEAR is not set +# CONFIG_ARCH_VT8500 is not set +CONFIG_GPIO_PCA953X=y +# CONFIG_KEYBOARD_GPIO_POLLED is not set +CONFIG_IMX_HAVE_PLATFORM_DMA=y +CONFIG_IMX_HAVE_PLATFORM_FEC=y +CONFIG_IMX_HAVE_PLATFORM_FLEXCAN=y +CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC=y +CONFIG_IMX_HAVE_PLATFORM_GPMI_NFC=y +CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT=y +CONFIG_IMX_HAVE_PLATFORM_IMX_SNVS_RTC=y +CONFIG_IMX_HAVE_PLATFORM_IMX_CAAM=y +CONFIG_IMX_HAVE_PLATFORM_IMX_I2C=y +CONFIG_IMX_HAVE_PLATFORM_IMX_SSI=y +CONFIG_IMX_HAVE_PLATFORM_IMX_UART=y +CONFIG_IMX_HAVE_PLATFORM_MXC_EHCI=y +CONFIG_IMX_HAVE_PLATFORM_MXC_PWM=y +CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX=y +CONFIG_IMX_HAVE_PLATFORM_SPI_IMX=y +CONFIG_IMX_HAVE_PLATFORM_IMX_IPUV3=y +CONFIG_IMX_HAVE_PLATFORM_IMX_VPU=y +CONFIG_IMX_HAVE_PLATFORM_IMX_DVFS=y +CONFIG_IMX_HAVE_PLATFORM_AHCI=y +CONFIG_IMX_HAVE_PLATFORM_IMX_OCOTP=y +CONFIG_IMX_HAVE_PLATFORM_IMX_VIIM=y +CONFIG_IMX_HAVE_PLATFORM_PERFMON=y +CONFIG_IMX_HAVE_PLATFORM_LDB=y +CONFIG_IMX_HAVE_PLATFORM_IMX_SPDIF=y +CONFIG_IMX_HAVE_PLATFORM_VIV_GPU=y +CONFIG_IMX_HAVE_PLATFORM_MXC_HDMI=y +CONFIG_IMX_HAVE_PLATFORM_IMX_ANATOP_THERMAL=y +CONFIG_IMX_HAVE_PLATFORM_FSL_OTG=y +CONFIG_IMX_HAVE_PLATFORM_FSL_USB_WAKEUP=y +CONFIG_IMX_HAVE_PLATFORM_IMX_PM=y +CONFIG_IMX_HAVE_PLATFORM_IMX_ASRC=y +CONFIG_IMX_HAVE_PLATFORM_IMX_MIPI_CSI2=y +CONFIG_IMX_HAVE_PLATFORM_IMX_VDOA=y +CONFIG_IMX_HAVE_PLATFORM_IMX_PCIE=y + +# +# Freescale MXC Implementations +# +# CONFIG_ARCH_MX1 is not set +# CONFIG_ARCH_MX2 is not set +# CONFIG_ARCH_MX25 is not set +# CONFIG_ARCH_MX3 is not set +# CONFIG_ARCH_MX503 is not set +# CONFIG_ARCH_MX51 is not set +CONFIG_ARCH_MX6=y +CONFIG_ARCH_MX6Q=y +CONFIG_FORCE_MAX_ZONEORDER=14 +CONFIG_SOC_IMX6Q=y +# CONFIG_MACH_MX6Q_ARM2 is not set +# CONFIG_MACH_MX6SL_ARM2 is not set +# CONFIG_MACH_MX6SL_EVK is not set +CONFIG_MACH_MX6Q_SABRELITE=y +# CONFIG_MACH_MX6Q_SABRESD is not set +# CONFIG_MACH_MX6Q_SABREAUTO is not set + +# +# MX6 Options: +# +CONFIG_IMX_PCIE=y +CONFIG_USB_EHCI_ARC_H1=y +# CONFIG_MX6_INTER_LDO_BYPASS is not set +CONFIG_ISP1504_MXC=y +# CONFIG_MXC_IRQ_PRIOR is not set +CONFIG_MXC_PWM=y +# CONFIG_MXC_DEBUG_BOARD is not set +CONFIG_MXC_REBOOT_MFGMODE=y +# CONFIG_MXC_REBOOT_ANDROID_CMD is not set +CONFIG_ARCH_MXC_IOMUX_V3=y +CONFIG_ARCH_MXC_AUDMUX_V2=y +CONFIG_IRAM_ALLOC=y +CONFIG_CLK_DEBUG=y +CONFIG_DMA_ZONE_SIZE=184 + +# +# System MMU +# + +# +# Processor Type +# +CONFIG_CPU_V7=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_ARM_THUMBEE is not set +# CONFIG_SWP_EMULATE is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_OUTER_CACHE=y +CONFIG_OUTER_CACHE_SYNC=y +CONFIG_CACHE_L2X0=y +CONFIG_CACHE_PL310=y +CONFIG_ARM_L1_CACHE_SHIFT=5 +CONFIG_ARM_DMA_MEM_BUFFERABLE=y +CONFIG_CPU_HAS_PMU=y +# CONFIG_ARM_ERRATA_430973 is not set +# CONFIG_ARM_ERRATA_458693 is not set +# CONFIG_ARM_ERRATA_460075 is not set +# CONFIG_ARM_ERRATA_742230 is not set +# CONFIG_ARM_ERRATA_742231 is not set +# CONFIG_PL310_ERRATA_588369 is not set +# CONFIG_ARM_ERRATA_720789 is not set +# CONFIG_PL310_ERRATA_727915 is not set +CONFIG_ARM_ERRATA_743622=y +CONFIG_ARM_ERRATA_751472=y +# CONFIG_ARM_ERRATA_753970 is not set +CONFIG_ARM_ERRATA_754322=y +# CONFIG_ARM_ERRATA_754327 is not set +CONFIG_ARM_GIC=y + +# +# Bus support +# +CONFIG_PCI=y +CONFIG_PCI_SYSCALL=y +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_IOV is not set +# CONFIG_PCIEPORTBUS is not set +# CONFIG_PCCARD is not set +CONFIG_ARM_ERRATA_764369=y +# CONFIG_PL310_ERRATA_769419 is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_SMP=y +CONFIG_SMP_ON_UP=y +CONFIG_HAVE_ARM_SCU=y +CONFIG_HAVE_ARM_TWD=y +# CONFIG_VMSPLIT_3G is not set +CONFIG_VMSPLIT_2G=y +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0x80000000 +CONFIG_NR_CPUS=4 +CONFIG_HOTPLUG_CPU=y +CONFIG_LOCAL_TIMERS=y +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_HZ=100 +# CONFIG_THUMB2_KERNEL is not set +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HIGHMEM=y +# CONFIG_HIGHPTE is not set +CONFIG_HW_PERF_EVENTS=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_COMPACTION=y +CONFIG_MIGRATION=y +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +# CONFIG_CLEANCACHE is not set +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set +# CONFIG_SECCOMP is not set +# CONFIG_CC_STACKPROTECTOR is not set +# CONFIG_DEPRECATED_PARAM_STRUCT is not set + +# +# Boot options +# +# CONFIG_USE_OF is not set +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw rootfstype=jffs2 ip=off" +CONFIG_CMDLINE_FROM_BOOTLOADER=y +# CONFIG_CMDLINE_EXTEND is not set +# CONFIG_CMDLINE_FORCE is not set +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set +# CONFIG_CRASH_DUMP is not set +# CONFIG_AUTO_ZRELADDR is not set + +# +# CPU Power Management +# + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_IMX=y +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_NEON=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_SUSPEND=y +# CONFIG_PM_TEST_SUSPEND is not set +CONFIG_SUSPEND_DEVICE_TIME_DEBUG=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +CONFIG_PM_RUNTIME=y +CONFIG_PM=y +CONFIG_PM_DEBUG=y +# CONFIG_PM_ADVANCED_DEBUG is not set +CONFIG_CAN_PM_TRACE=y +CONFIG_APM_EMULATION=y +CONFIG_PM_RUNTIME_CLK=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +CONFIG_LLC=y +CONFIG_LLC2=y +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set +# CONFIG_BATMAN_ADV is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +CONFIG_CAN=y +CONFIG_CAN_RAW=y +CONFIG_CAN_BCM=y + +# +# CAN Device Drivers +# +CONFIG_CAN_VCAN=y +# CONFIG_CAN_SLCAN is not set +CONFIG_CAN_DEV=y +CONFIG_CAN_CALC_BITTIMING=y +# CONFIG_CAN_MCP251X is not set +CONFIG_HAVE_CAN_FLEXCAN=y +CONFIG_CAN_FLEXCAN=y +# CONFIG_PCH_CAN is not set +# CONFIG_CAN_SJA1000 is not set +# CONFIG_CAN_C_CAN is not set + +# +# CAN USB interfaces +# +# CONFIG_CAN_EMS_USB is not set +# CONFIG_CAN_ESD_USB2 is not set +# CONFIG_CAN_SOFTING is not set +# CONFIG_CAN_DEBUG_DEVICES is not set +# CONFIG_IRDA is not set +CONFIG_BT=y +CONFIG_BT_L2CAP=y +CONFIG_BT_SCO=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y + +# +# Bluetooth device drivers +# +# CONFIG_BT_HCIBTUSB is not set +# CONFIG_BT_HCIBTSDIO is not set +CONFIG_BT_HCIUART=y +# CONFIG_BT_HCIUART_H4 is not set +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIUART_ATH3K is not set +CONFIG_BT_HCIUART_LL=y +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_BT_MRVL is not set +# CONFIG_AF_RXRPC is not set +CONFIG_WIRELESS=y +CONFIG_WIRELESS_EXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_WEXT_SPY=y +CONFIG_WEXT_PRIV=y +CONFIG_CFG80211=y +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_REG_DEBUG is not set +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +# CONFIG_CFG80211_INTERNAL_REGDB is not set +CONFIG_CFG80211_WEXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +CONFIG_LIB80211=y +CONFIG_LIB80211_CRYPT_WEP=y +CONFIG_LIB80211_CRYPT_CCMP=y +CONFIG_LIB80211_CRYPT_TKIP=y +# CONFIG_LIB80211_DEBUG is not set +CONFIG_MAC80211=y +CONFIG_MAC80211_HAS_RC=y +# CONFIG_MAC80211_RC_PID is not set +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_MINSTREL_HT=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +# CONFIG_MAC80211_LEDS is not set +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +# CONFIG_WIMAX is not set +CONFIG_RFKILL=y +CONFIG_RFKILL_LEDS=y +CONFIG_RFKILL_INPUT=y +# CONFIG_RFKILL_REGULATOR is not set +# CONFIG_RFKILL_GPIO is not set +# CONFIG_NET_9P is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +# CONFIG_DEVTMPFS is not set +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +CONFIG_MTD_M25P80=y +CONFIG_M25PXX_USE_FAST_READ=y +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND_ECC=y +# CONFIG_MTD_NAND_ECC_SMC is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_BCH is not set +# CONFIG_MTD_SM_COMMON is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_DENALI is not set +# CONFIG_MTD_NAND_GPIO is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_RICOH is not set +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_CAFE is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_GPMI_NAND is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_UBI_BEB_RESERVE=1 +# CONFIG_MTD_UBI_GLUEBI is not set +# CONFIG_MTD_UBI_DEBUG is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MG_DISK is not set +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_SENSORS_LIS3LV02D is not set +CONFIG_MISC_DEVICES=y +# CONFIG_AD525X_DPOT is not set +# CONFIG_PHANTOM is not set +# CONFIG_INTEL_MID_PTI is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1780 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_TI_DAC7512 is not set +# CONFIG_BMP085 is not set +# CONFIG_PCH_PHUB is not set +CONFIG_MXS_PERFMON=m +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_CB710_CORE is not set +# CONFIG_IWMC3200TOP is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_SCSI_BNX2X_FCOE is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_LIBFC is not set +# CONFIG_LIBFCOE is not set +# CONFIG_FCOE is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_FC is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_SRP is not set +# CONFIG_SCSI_BFA_FC is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_ATA_VERBOSE_ERROR=y +# CONFIG_SATA_PMP is not set + +# +# Controllers with non-SFF native interface +# +# CONFIG_SATA_AHCI is not set +CONFIG_SATA_AHCI_PLATFORM=y +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +# CONFIG_SATA_SIL24 is not set +CONFIG_ATA_SFF=y + +# +# SFF controllers with custom DMA interface +# +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_SX4 is not set +CONFIG_ATA_BMDMA=y + +# +# SATA SFF controllers with BMDMA +# +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_SVW is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set + +# +# PATA SFF controllers with BMDMA +# +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARASAN_CF is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_ATP867X is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CS5520 is not set +# CONFIG_PATA_CS5530 is not set +# CONFIG_PATA_CS5536 is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set +# CONFIG_PATA_SC1200 is not set +# CONFIG_PATA_SCH is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set + +# +# PIO-only SFF controllers +# +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_PLATFORM is not set +# CONFIG_PATA_RZ1000 is not set + +# +# Generic fallback / legacy drivers +# +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_LEGACY is not set +# CONFIG_MD is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# CONFIG_I2O is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +CONFIG_TUN=y +# CONFIG_VETH is not set +# CONFIG_ARCNET is not set +CONFIG_MII=y +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +CONFIG_MICREL_PHY=y +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +# CONFIG_AX88796 is not set +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ETHOC is not set +# CONFIG_SMC911X is not set +# CONFIG_SMSC911X is not set +# CONFIG_DNET is not set +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +# CONFIG_NET_PCI is not set +# CONFIG_B44 is not set +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_KS8851_MLL is not set +CONFIG_FEC=y +CONFIG_FEC_NAPI=y +# CONFIG_FEC_1588 is not set +# CONFIG_ATL2 is not set +# CONFIG_FTMAC100 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set +# CONFIG_TR is not set +CONFIG_WLAN=y +# CONFIG_LIBERTAS_THINFIRM is not set +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +# CONFIG_PRISM54 is not set +# CONFIG_USB_ZD1201 is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +# CONFIG_ADM8211 is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_MWL8K is not set +# CONFIG_ATH_COMMON is not set +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +CONFIG_HOSTAP=y +# CONFIG_HOSTAP_FIRMWARE is not set +# CONFIG_HOSTAP_PLX is not set +# CONFIG_HOSTAP_PCI is not set +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWLAGN is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +# CONFIG_IWM is not set +# CONFIG_LIBERTAS is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_RT2X00 is not set +# CONFIG_RTL8192CE is not set +# CONFIG_RTL8192SE is not set +# CONFIG_RTL8192CU is not set +# CONFIG_WL1251 is not set +CONFIG_WL12XX_MENU=y +CONFIG_WL12XX=y +# CONFIG_WL12XX_HT is not set +# CONFIG_WL12XX_SPI is not set +CONFIG_WL12XX_SDIO=m +# CONFIG_WL12XX_SDIO_TEST is not set +CONFIG_WL12XX_PLATFORM_DATA=y +# CONFIG_ZD1211RW is not set +# CONFIG_MWIFIEX is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_WAN is not set + +# +# CAIF transport drivers +# +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NET_FC is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_VMXNET3 is not set +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +CONFIG_INPUT_POLLDEV=y +# CONFIG_INPUT_SPARSEKMAP is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set +# CONFIG_INPUT_APMPOWER is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_IMX is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_MXC is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +CONFIG_TOUCHSCREEN_EGALAX=y +# CONFIG_TOUCHSCREEN_ELAN is not set +# CONFIG_TOUCHSCREEN_EGALAX_SINGLE_TOUCH is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_MAX11801 is not set +CONFIG_TOUCHSCREEN_FT5X06=y +CONFIG_TOUCHSCREEN_FT5X06_SINGLE_TOUCH=y +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_WM97XX is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC2005 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +CONFIG_TOUCHSCREEN_TSC2004=y +# CONFIG_TOUCHSCREEN_W90X900 is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_P1003 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_ATI_REMOTE is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +CONFIG_INPUT_UINPUT=y +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_CMA3000 is not set +CONFIG_INPUT_ISL29023=y + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set +# CONFIG_N_GSM is not set +# CONFIG_TRACE_SINK is not set +CONFIG_DEVKMEM=y + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX3107 is not set +# CONFIG_SERIAL_MFD_HSU is not set +CONFIG_SERIAL_IMX=y +CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_TIMBERDALE is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_PCH_UART is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_TTY_PRINTK is not set +CONFIG_FSL_OTP=y +# CONFIG_HVC_DCC is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +# CONFIG_RAMOOPS is not set +CONFIG_MXS_VIIM=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +# CONFIG_I2C_MUX is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=m + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_DESIGNWARE is not set +# CONFIG_I2C_GPIO is not set +CONFIG_I2C_IMX=y +# CONFIG_I2C_INTEL_MID is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_PXA_PCI is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_XILINX is not set +# CONFIG_I2C_EG20T is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_GPIO is not set +CONFIG_SPI_IMX_VER_2_3=y +CONFIG_SPI_IMX=y +# CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PXA2XX_PCI is not set +# CONFIG_SPI_TOPCLIFF_PCH is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_DESIGNWARE is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set + +# +# PPS support +# +# CONFIG_PPS is not set + +# +# PPS generators support +# + +# +# PTP clock support +# + +# +# Enable Device Drivers -> PPS to see the PTP clock options. +# +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_SYSFS=y + +# +# Memory mapped GPIO drivers: +# +# CONFIG_GPIO_BASIC_MMIO is not set +# CONFIG_GPIO_IT8761E is not set +# CONFIG_GPIO_VX855 is not set + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X_IRQ is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_SX150X is not set +# CONFIG_GPIO_WM8994 is not set +# CONFIG_GPIO_ADP5588 is not set + +# +# PCI GPIO expanders: +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_ML_IOH is not set +# CONFIG_GPIO_RDC321X is not set + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_74X164 is not set + +# +# AC97 GPIO expanders: +# + +# +# MODULbus GPIO expanders: +# +# CONFIG_W1 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_APM_POWER is not set +# CONFIG_TEST_POWER is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_BQ20Z75 is not set +# CONFIG_BATTERY_BQ27x00 is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_ISP1704 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_GPIO is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +CONFIG_SENSORS_MAX17135=y +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_ADS1015 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +CONFIG_SENSORS_MAG3110=y +# CONFIG_MXC_MMA8450 is not set +CONFIG_MXC_MMA8451=y +CONFIG_THERMAL=y +# CONFIG_THERMAL_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_MPCORE_WATCHDOG is not set +# CONFIG_MAX63XX_WATCHDOG is not set +CONFIG_IMX2_WDT=y +# CONFIG_ALIM7101_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y + +# +# Broadcom specific AMBA +# +# CONFIG_BCMA is not set +CONFIG_MFD_SUPPORT=y +CONFIG_MFD_CORE=y +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_UCB1400_CORE is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_MFD_STMPE is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +CONFIG_MFD_WM8994=y +# CONFIG_MFD_PCF50633 is not set +# CONFIG_PMIC_DIALOG is not set +# CONFIG_MFD_MC_PMIC is not set +# CONFIG_MFD_MC34708 is not set +CONFIG_MFD_PFUZE=y +# CONFIG_MFD_MC13XXX is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_TIMBERDALE is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_TPS65910 is not set +CONFIG_MFD_MAX17135=y +CONFIG_MFD_MXC_HDMI=y +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +# CONFIG_REGULATOR_DUMMY is not set +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_WM8994 is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_MC34708 is not set +CONFIG_REGULATOR_PFUZE100=y +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_AD5398 is not set +CONFIG_REGULATOR_ANATOP=y +# CONFIG_REGULATOR_TPS6524X is not set +CONFIG_REGULATOR_MAX17135=y +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +# CONFIG_MEDIA_CONTROLLER is not set +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_COMMON=y +# CONFIG_DVB_CORE is not set +CONFIG_VIDEO_MEDIA=y + +# +# Multimedia drivers +# +# CONFIG_RC_CORE is not set +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=y +# CONFIG_MEDIA_TUNER_CUSTOMISE is not set +CONFIG_MEDIA_TUNER_SIMPLE=y +CONFIG_MEDIA_TUNER_TDA8290=y +CONFIG_MEDIA_TUNER_TDA827X=y +CONFIG_MEDIA_TUNER_TDA18271=y +CONFIG_MEDIA_TUNER_TDA9887=y +CONFIG_MEDIA_TUNER_TEA5761=y +CONFIG_MEDIA_TUNER_TEA5767=y +CONFIG_MEDIA_TUNER_MT20XX=y +CONFIG_MEDIA_TUNER_XC2028=y +CONFIG_MEDIA_TUNER_XC5000=y +CONFIG_MEDIA_TUNER_MC44S803=y +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEOBUF_GEN=y +CONFIG_VIDEOBUF_DMA_CONTIG=y +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set + +# +# Encoders, decoders, sensors and other helper chips +# + +# +# Audio decoders, processors and mixers +# +# CONFIG_VIDEO_TVAUDIO is not set +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_MSP3400 is not set +# CONFIG_VIDEO_CS5345 is not set +# CONFIG_VIDEO_CS53L32A is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_WM8775 is not set +# CONFIG_VIDEO_WM8739 is not set +# CONFIG_VIDEO_VP27SMPX is not set + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set + +# +# Video decoders +# +# CONFIG_VIDEO_ADV7180 is not set +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_SAA7110 is not set +# CONFIG_VIDEO_SAA711X is not set +# CONFIG_VIDEO_SAA7191 is not set +# CONFIG_VIDEO_TVP514X is not set +# CONFIG_VIDEO_TVP5150 is not set +# CONFIG_VIDEO_TVP7002 is not set +# CONFIG_VIDEO_VPX3220 is not set + +# +# Video and audio decoders +# +# CONFIG_VIDEO_SAA717X is not set +# CONFIG_VIDEO_CX25840 is not set + +# +# MPEG video encoders +# +# CONFIG_VIDEO_CX2341X is not set + +# +# Video encoders +# +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_ADV7343 is not set +# CONFIG_VIDEO_AK881X is not set + +# +# Camera sensor devices +# +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_MT9V011 is not set +# CONFIG_VIDEO_TCM825X is not set + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set + +# +# Miscelaneous helper chips +# +# CONFIG_VIDEO_THS7303 is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_VIVI is not set +CONFIG_VIDEO_MXC_CAMERA=m + +# +# MXC Camera/V4L2 PRP Features support +# +CONFIG_VIDEO_MXC_IPU_CAMERA=y +# CONFIG_VIDEO_MXC_CSI_CAMERA is not set +# CONFIG_MXC_CAMERA_MICRON111 is not set +# CONFIG_MXC_CAMERA_OV2640 is not set +# CONFIG_MXC_CAMERA_OV3640 is not set +# CONFIG_MXC_CAMERA_OV5640 is not set +# CONFIG_MXC_CAMERA_OV8820_MIPI is not set +CONFIG_MXC_CAMERA_OV5642=m +# CONFIG_MXC_CAMERA_OV5640_MIPI is not set +CONFIG_MXC_CAMERA_SENSOR_CLK=m +CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m +CONFIG_MXC_IPU_PRP_ENC=m +CONFIG_MXC_IPU_CSI_ENC=m +CONFIG_VIDEO_MXC_OUTPUT=y +CONFIG_VIDEO_MXC_IPU_OUTPUT=y +# CONFIG_VIDEO_MXC_IPUV1_WVGA_OUTPUT is not set +# CONFIG_VIDEO_MXC_OPL is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_VIDEO_ZORAN is not set +# CONFIG_VIDEO_SAA7134 is not set +# CONFIG_VIDEO_MXB is not set +# CONFIG_VIDEO_HEXIUM_ORION is not set +# CONFIG_VIDEO_HEXIUM_GEMINI is not set +# CONFIG_VIDEO_TIMBERDALE is not set +# CONFIG_VIDEO_CAFE_CCIC is not set +# CONFIG_VIDEO_SR030PC30 is not set +# CONFIG_VIDEO_NOON010PC30 is not set +# CONFIG_SOC_CAMERA is not set +CONFIG_V4L_USB_DRIVERS=y +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GL860 is not set +# CONFIG_USB_GSPCA_BENQ is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_CPIA1 is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_JEILINJ is not set +# CONFIG_USB_GSPCA_KINECT is not set +# CONFIG_USB_GSPCA_KONICA is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_NW80X is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_OV534_9 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7302 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SN9C2028 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SPCA1528 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_SQ930X is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_STV0680 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_VICAM is not set +# CONFIG_USB_GSPCA_XIRLINK_CIT is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_USBVISION is not set +# CONFIG_USB_ET61X251 is not set +# CONFIG_USB_SN9C102 is not set +# CONFIG_USB_PWC is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +# CONFIG_V4L_MEM2MEM_DRIVERS is not set +# CONFIG_RADIO_ADAPTERS is not set + +# +# Graphics support +# +CONFIG_VGA_ARB=y +CONFIG_VGA_ARB_MAX_GPUS=16 +CONFIG_DRM=m +CONFIG_DRM_VIVANTE=m +# CONFIG_STUB_POULSBO is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_WMT_GE_ROPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_TMIO is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set +CONFIG_BACKLIGHT_PWM=y +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set +CONFIG_FB_MXC=y +CONFIG_FB_MXC_EDID=y +CONFIG_FB_MXC_SYNC_PANEL=y +# CONFIG_FB_MXC_EPSON_VGA_SYNC_PANEL is not set +CONFIG_FB_MXC_LDB=y +CONFIG_FB_MXC_MIPI_DSI=y +CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y +# CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL is not set +# CONFIG_FB_MXC_SEIKO_WVGA_SYNC_PANEL is not set +# CONFIG_FB_MXC_SII902X is not set +# CONFIG_FB_MXC_CH7026 is not set +# CONFIG_FB_MXC_TVOUT_CH7024 is not set +# CONFIG_FB_MXC_ASYNC_PANEL is not set +# CONFIG_FB_MXC_EINK_PANEL is not set +# CONFIG_FB_MXC_SIPIX_PANEL is not set +# CONFIG_FB_MXC_ELCDIF_FB is not set +CONFIG_FB_MXC_HDMI=y + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FONTS=y +# CONFIG_FONT_8x8 is not set +CONFIG_FONT_8x16=y +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=y +# CONFIG_SOUND_OSS_CORE is not set +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_HWDEP=y +CONFIG_SND_RAWMIDI=y +CONFIG_SND_JACK=y +# CONFIG_SND_SEQUENCER is not set +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_RAWMIDI_SEQ is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_PCI=y +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ALS300 is not set +# CONFIG_SND_ALI5451 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +# CONFIG_SND_AZT3328 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_CS5535AUDIO is not set +# CONFIG_SND_CTXFI is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_INDIGOIOX is not set +# CONFIG_SND_INDIGODJX is not set +# CONFIG_SND_EMU10K1 is not set +# CONFIG_SND_EMU10K1X is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_ES1938 is not set +# CONFIG_SND_ES1968 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDA_INTEL is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_ICE1712 is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_LOLA is not set +# CONFIG_SND_LX6464ES is not set +# CONFIG_SND_MAESTRO3 is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SONICVIBES is not set +# CONFIG_SND_TRIDENT is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set +CONFIG_SND_ARM=y +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=y +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +CONFIG_SND_SOC=y +# CONFIG_SND_SOC_CACHE_LZO is not set +CONFIG_SND_SOC_AC97_BUS=y +CONFIG_SND_IMX_SOC=y +CONFIG_SND_MXC_SOC_MX2=y +CONFIG_SND_MXC_SOC_SPDIF_DAI=y +CONFIG_SND_SOC_IMX_SGTL5000=y +# CONFIG_SND_SOC_IMX_WM8958 is not set +# CONFIG_SND_SOC_IMX_WM8962 is not set +# CONFIG_SND_SOC_IMX_SI4763 is not set +CONFIG_SND_SOC_IMX_SPDIF=y +CONFIG_SND_SOC_IMX_HDMI=y +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SOC_ALL_CODECS is not set +CONFIG_SND_SOC_MXC_HDMI=y +CONFIG_SND_SOC_MXC_SPDIF=y +CONFIG_SND_SOC_SGTL5000=y +# CONFIG_SOUND_PRIME is not set +CONFIG_AC97_BUS=y +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +CONFIG_HIDRAW=y + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_ACRUX is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +# CONFIG_HID_MULTITOUCH is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +CONFIG_HID_QUANTA=y +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_ROCCAT_ARVO is not set +# CONFIG_HID_ROCCAT_KONE is not set +# CONFIG_HID_ROCCAT_KONEPLUS is not set +# CONFIG_HID_ROCCAT_KOVAPLUS is not set +# CONFIG_HID_ROCCAT_PYRA is not set +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SONY=m +CONFIG_HID_SUNPLUS=m +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_DEVICE_CLASS is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_SUSPEND=y +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_MON is not set +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_XHCI_HCD is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ARC=y +CONFIG_USB_EHCI_ARC_OTG=y +# CONFIG_USB_EHCI_ARC_HSIC is not set +# CONFIG_USB_STATIC_IRAM is not set +CONFIG_USB_EHCI_ROOT_HUB_TT=y +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +# CONFIG_USB_EHCI_MXC is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_WHCI_HCD is not set +# CONFIG_USB_HWA_HCD is not set +# CONFIG_USB_MUSB_HDRC is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=y +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +# CONFIG_USB_UAS is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=y +# CONFIG_USB_SERIAL_CONSOLE is not set +# CONFIG_USB_EZUSB is not set +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP210X is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +# CONFIG_USB_SERIAL_FTDI_SIO is not set +# CONFIG_USB_SERIAL_FUNSOFT is not set +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MOTOROLA is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +# CONFIG_USB_SERIAL_PL2303 is not set +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_QCAUX is not set +CONFIG_USB_SERIAL_QUALCOMM=y +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_HP4X is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIEMENS_MPI is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_SYMBOL is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +CONFIG_USB_SERIAL_WWAN=y +CONFIG_USB_SERIAL_OPTION=y +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_OPTICON is not set +# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set +# CONFIG_USB_SERIAL_ZIO is not set +# CONFIG_USB_SERIAL_SSU100 is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_SELECTED=y +CONFIG_USB_GADGET_ARC=y +# CONFIG_IMX_USB_CHARGER is not set +CONFIG_USB_ARC=y +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_FUSB300 is not set +# CONFIG_USB_GADGET_R8A66597 is not set +# CONFIG_USB_GADGET_PXA_U2O is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_CI13XXX_PCI is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LANGWELL is not set +# CONFIG_USB_GADGET_EG20T is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_G_NCM is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FUNCTIONFS is not set +CONFIG_USB_FILE_STORAGE=m +# CONFIG_FSL_UTP is not set +# CONFIG_USB_FILE_STORAGE_TEST is not set +# CONFIG_USB_MASS_STORAGE is not set +CONFIG_USB_G_SERIAL=m +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +# CONFIG_USB_G_MULTI is not set +# CONFIG_USB_G_HID is not set +# CONFIG_USB_G_DBGP is not set +# CONFIG_USB_G_WEBCAM is not set + +# +# OTG and related infrastructure +# +CONFIG_USB_OTG_UTILS=y +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ULPI is not set +# CONFIG_NOP_USB_XCEIV is not set +CONFIG_MXC_OTG=y +# CONFIG_UWB is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_UNSAFE_RESUME=y +# CONFIG_MMC_CLKGATE is not set + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=8 +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_ESDHC_IMX=y +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +# CONFIG_MMC_DW is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_GPIO_PLATFORM=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP5521 is not set +# CONFIG_LEDS_LP5523 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_DAC124S085 is not set +# CONFIG_LEDS_PWM is not set +# CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +CONFIG_LEDS_TRIGGERS=y + +# +# LED Triggers +# +# CONFIG_LEDS_TRIGGER_TIMER is not set +# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + +# +# iptables trigger is under Netfilter config (LED target) +# + +# +# LED Triggers +# +# CONFIG_NFC_DEVICES is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_DS3232 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set +# CONFIG_RTC_DRV_PCF2123 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_MXC is not set +# CONFIG_RTC_DRV_MXC_V2 is not set +CONFIG_RTC_DRV_SNVS=y +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +# CONFIG_DW_DMAC is not set +CONFIG_MXC_PXP_V2=y +CONFIG_MXC_PXP_CLIENT_DEVICE=y +# CONFIG_TIMB_DMA is not set +CONFIG_IMX_SDMA=y +# CONFIG_MXS_DMA is not set +CONFIG_DMA_ENGINE=y + +# +# DMA Clients +# +# CONFIG_NET_DMA is not set +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +# CONFIG_STAGING is not set +CONFIG_CLKDEV_LOOKUP=y +CONFIG_CLKSRC_MMIO=y + +# +# MXC support drivers +# +CONFIG_MXC_IPU=y +CONFIG_MXC_IPU_V3=y +CONFIG_MXC_IPU_V3H=y + +# +# MXC SSI support +# +# CONFIG_MXC_SSI is not set + +# +# MXC Digital Audio Multiplexer support +# +# CONFIG_MXC_DAM is not set + +# +# MXC PMIC support +# +# CONFIG_MXC_PMIC_MC13783 is not set +# CONFIG_MXC_PMIC_MC13892 is not set +# CONFIG_MXC_PMIC_MC34704 is not set +# CONFIG_MXC_PMIC_MC9SDZ60 is not set +# CONFIG_MXC_PMIC_MC9S08DZ60 is not set + +# +# MXC Security Drivers +# +# CONFIG_MXC_SECURITY_SCC is not set +# CONFIG_MXC_SECURITY_RNG is not set + +# +# MXC MPEG4 Encoder Kernel module support +# +# CONFIG_MXC_HMP4E is not set + +# +# MXC HARDWARE EVENT +# +# CONFIG_MXC_HWEVENT is not set + +# +# MXC VPU(Video Processing Unit) support +# +CONFIG_MXC_VPU=y +# CONFIG_MXC_VPU_DEBUG is not set +# CONFIG_MX6_VPU_352M is not set + +# +# MXC Asynchronous Sample Rate Converter support +# +CONFIG_MXC_ASRC=y + +# +# MXC Bluetooth support +# + +# +# Broadcom GPS ioctrl support +# + +# +# MXC Media Local Bus Driver +# +# CONFIG_MXC_MLB150 is not set + +# +# i.MX ADC support +# +# CONFIG_IMX_ADC is not set + +# +# MXC Vivante GPU support +# +CONFIG_MXC_GPU_VIV=m + +# +# ANATOP_THERMAL +# +CONFIG_ANATOP_THERMAL=y + +# +# MXC MIPI Support +# +CONFIG_MXC_MIPI_CSI2=y + +# +# MXC HDMI CEC (Consumer Electronics Control) support +# +# CONFIG_MXC_HDMI_CEC is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_XATTR=y +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_FS_POSIX_ACL is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_FANOTIFY is not set +# CONFIG_QUOTA is not set +# CONFIG_QUOTACTL is not set +CONFIG_AUTOFS4_FS=y +# CONFIG_FUSE_FS is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_TMPFS_XATTR is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_UBIFS_FS=y +# CONFIG_UBIFS_FS_XATTR is not set +# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y +# CONFIG_UBIFS_FS_DEBUG is not set +# CONFIG_LOGFS is not set +CONFIG_CRAMFS=y +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_PSTORE is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_HARDLOCKUP_DETECTOR is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_SPARSE_RCU_POINTER is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_MEMORY_INIT is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=60 +CONFIG_RCU_CPU_STALL_VERBOSE=y +# CONFIG_LKDTM is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_STRICT_DEVMEM is not set +CONFIG_ARM_UNWIND=y +# CONFIG_DEBUG_USER is not set +# CONFIG_OC_ETM is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_PCOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set +CONFIG_CRYPTO_GF128MUL=y +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_WORKQUEUE=y +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_AUTHENC=y +CONFIG_CRYPTO_TEST=m +# CONFIG_CRYPTO_CRYPTODEV is not set + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_GCM=y +CONFIG_CRYPTO_SEQIV=y + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CTR=y +CONFIG_CRYPTO_CTS=y +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_LRW=y +CONFIG_CRYPTO_PCBC=y +CONFIG_CRYPTO_XTS=y + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +CONFIG_CRYPTO_GHASH=y +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +CONFIG_CRYPTO_MICHAEL_MIC=y +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +# CONFIG_CRYPTO_ZLIB is not set +CONFIG_CRYPTO_LZO=y + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +# CONFIG_CRYPTO_USER_API_HASH is not set +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_HIFN_795X is not set +CONFIG_CRYPTO_DEV_FSL_CAAM=y +CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9 +CONFIG_CRYPTO_DEV_FSL_CAAM_INTC=y +CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_COUNT_THLD=255 +CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_TIME_THLD=2048 +CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y +# CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API is not set +CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y +# CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_TEST is not set +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_RATIONAL=y +CONFIG_CRC_CCITT=m +CONFIG_CRC16=y +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +CONFIG_CRC7=y +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +# CONFIG_XZ_DEC is not set +# CONFIG_XZ_DEC_BCJ is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_CPU_RMAP=y +CONFIG_NLATTR=y +CONFIG_AVERAGE=y diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/board-mx50_rdp.c b/arch/arm/mach-mx5/board-mx50_rdp.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-mx5/board-mx53_smd.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/bus_freq.c b/arch/arm/mach-mx5/bus_freq.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/clock.c b/arch/arm/mach-mx5/clock.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/clock_mx50.c b/arch/arm/mach-mx5/clock_mx50.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/cpu_op-mx50.c b/arch/arm/mach-mx5/cpu_op-mx50.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/cpu_op-mx50.h b/arch/arm/mach-mx5/cpu_op-mx50.h old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/cpu_op-mx51.c b/arch/arm/mach-mx5/cpu_op-mx51.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/cpu_op-mx51.h b/arch/arm/mach-mx5/cpu_op-mx51.h old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/cpu_op-mx53.c b/arch/arm/mach-mx5/cpu_op-mx53.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/cpu_op-mx53.h b/arch/arm/mach-mx5/cpu_op-mx53.h old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/crm_regs.h b/arch/arm/mach-mx5/crm_regs.h old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/devices-imx50.h b/arch/arm/mach-mx5/devices-imx50.h old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/devices-imx51.h b/arch/arm/mach-mx5/devices-imx51.h old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/devices-imx53.h b/arch/arm/mach-mx5/devices-imx53.h old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/devices.h b/arch/arm/mach-mx5/devices.h old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/imx_bt_rfkill.c b/arch/arm/mach-mx5/imx_bt_rfkill.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/mx50_ddr_freq.S b/arch/arm/mach-mx5/mx50_ddr_freq.S old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/mx50_freq.c b/arch/arm/mach-mx5/mx50_freq.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/mx50_suspend.S b/arch/arm/mach-mx5/mx50_suspend.S old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/mx50_wfi.S b/arch/arm/mach-mx5/mx50_wfi.S old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/mx53_loco_pmic_da9053.c b/arch/arm/mach-mx5/mx53_loco_pmic_da9053.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/mx53_smd_pmic_da9053.c b/arch/arm/mach-mx5/mx53_smd_pmic_da9053.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/pm.c b/arch/arm/mach-mx5/pm.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/sdram_autogating.c b/arch/arm/mach-mx5/sdram_autogating.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/suspend.S b/arch/arm/mach-mx5/suspend.S old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/system.c b/arch/arm/mach-mx5/system.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/usb.h b/arch/arm/mach-mx5/usb.h old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/usb_dr.c b/arch/arm/mach-mx5/usb_dr.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/usb_h1.c b/arch/arm/mach-mx5/usb_h1.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx5/usb_h2.c b/arch/arm/mach-mx5/usb_h2.c old mode 100755 new mode 100644 diff --git a/arch/arm/mach-mx6/Kconfig b/arch/arm/mach-mx6/Kconfig index 45ae9ea..fad950e 100644 --- a/arch/arm/mach-mx6/Kconfig +++ b/arch/arm/mach-mx6/Kconfig @@ -173,6 +173,10 @@ config MACH_MX6Q_SABRELITE select IMX_HAVE_PLATFORM_IMX_ASRC select IMX_HAVE_PLATFORM_FLEXCAN select IMX_HAVE_PLATFORM_IMX_CAAM + select IMX_HAVE_PLATFORM_IMX_DVFS + select IMX_HAVE_PLATFORM_IMX_MIPI_CSI2 + select IMX_HAVE_PLATFORM_IMX_PCIE + select IMX_HAVE_PLATFORM_PERFMON help Include support for i.MX 6Quad SABRE Lite platform. This includes specific configurations for the board and its peripherals. diff --git a/arch/arm/mach-mx6/board-mx6q_sabrelite.c b/arch/arm/mach-mx6/board-mx6q_sabrelite.c index eff81ac..2c0cbe2 100644 --- a/arch/arm/mach-mx6/board-mx6q_sabrelite.c +++ b/arch/arm/mach-mx6/board-mx6q_sabrelite.c @@ -56,12 +56,15 @@ #include #include #include +#include #include #include #include #include #include #include +#include +#include #include #include @@ -74,29 +77,53 @@ #include "crm_regs.h" #include "cpu_op-mx6.h" -#define MX6Q_SABRELITE_SD3_CD IMX_GPIO_NR(7, 0) -#define MX6Q_SABRELITE_SD3_WP IMX_GPIO_NR(7, 1) -#define MX6Q_SABRELITE_SD4_CD IMX_GPIO_NR(2, 6) -#define MX6Q_SABRELITE_SD4_WP IMX_GPIO_NR(2, 7) -#define MX6Q_SABRELITE_ECSPI1_CS1 IMX_GPIO_NR(3, 19) -#define MX6Q_SABRELITE_USB_OTG_PWR IMX_GPIO_NR(3, 22) -#define MX6Q_SABRELITE_CAP_TCH_INT1 IMX_GPIO_NR(1, 9) -#define MX6Q_SABRELITE_USB_HUB_RESET IMX_GPIO_NR(7, 12) -#define MX6Q_SABRELITE_CAN1_STBY IMX_GPIO_NR(1, 2) -#define MX6Q_SABRELITE_CAN1_EN IMX_GPIO_NR(1, 4) -#define MX6Q_SABRELITE_MENU_KEY IMX_GPIO_NR(2, 1) -#define MX6Q_SABRELITE_BACK_KEY IMX_GPIO_NR(2, 2) -#define MX6Q_SABRELITE_ONOFF_KEY IMX_GPIO_NR(2, 3) -#define MX6Q_SABRELITE_HOME_KEY IMX_GPIO_NR(2, 4) -#define MX6Q_SABRELITE_VOL_UP_KEY IMX_GPIO_NR(7, 13) -#define MX6Q_SABRELITE_VOL_DOWN_KEY IMX_GPIO_NR(4, 5) -#define MX6Q_SABRELITE_CSI0_RST IMX_GPIO_NR(1, 8) -#define MX6Q_SABRELITE_CSI0_PWN IMX_GPIO_NR(1, 6) - -#define MX6Q_SABRELITE_SD3_WP_PADCFG (PAD_CTL_PKE | PAD_CTL_PUE | \ +#define MX6_SABRELITE_SD3_CD IMX_GPIO_NR(7, 0) +#define MX6_SABRELITE_SD3_WP IMX_GPIO_NR(7, 1) +#define MX6_SABRELITE_SD4_CD IMX_GPIO_NR(2, 6) +#define MX6_SABRELITE_SD4_WP IMX_GPIO_NR(2, 7) +#define MX6_SABRELITE_ECSPI1_CS1 IMX_GPIO_NR(3, 19) +#define MX6_SABRELITE_USB_OTG_PWR IMX_GPIO_NR(3, 22) +#define MX6_SABRELITE_CAP_TCH_INT1 IMX_GPIO_NR(1, 9) +#define MX6_SABRELITE_DRGB_IRQGPIO IMX_GPIO_NR(4, 20) +#define MX6_SABRELITE_USB_HUB_RESET IMX_GPIO_NR(7, 12) +#define MX6_SABRELITE_CAN1_STBY IMX_GPIO_NR(1, 2) +#define MX6_SABRELITE_CAN1_EN IMX_GPIO_NR(1, 4) +#define MX6_SABRELITE_CAN1_ERR IMX_GPIO_NR(1, 7) +#define MX6_SABRELITE_MENU_KEY IMX_GPIO_NR(2, 1) +#define MX6_SABRELITE_BACK_KEY IMX_GPIO_NR(2, 2) +#define MX6_SABRELITE_ONOFF_KEY IMX_GPIO_NR(2, 3) +#define MX6_SABRELITE_HOME_KEY IMX_GPIO_NR(2, 4) +#define MX6_SABRELITE_VOL_UP_KEY IMX_GPIO_NR(7, 13) +#define MX6_SABRELITE_VOL_DOWN_KEY IMX_GPIO_NR(4, 5) +#define MX6_SABRELITE_CSI0_RST IMX_GPIO_NR(1, 8) +#define MX6_SABRELITE_CSI0_PWN IMX_GPIO_NR(1, 6) +#define MX6_SABRELITE_ENET_PHY_INT IMX_GPIO_NR(1, 28) + +#define N6_WL1271_WL_IRQ IMX_GPIO_NR(6, 14) +#define N6_WL1271_WL_EN IMX_GPIO_NR(6, 15) +#define N6_WL1271_BT_EN IMX_GPIO_NR(6, 16) + +#define MX6_SABRELITE_CAN1_ERR_TEST_PADCFG (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS) +#define MX6_SABRELITE_CAN1_ERR_PADCFG (PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS) +#define MX6_SABRELITE_SD3_WP_PADCFG (PAD_CTL_PKE | PAD_CTL_PUE | \ PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_HYS) +#define WEAK_PULLUP (PAD_CTL_HYS | PAD_CTL_PKE \ + | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) + +#define N6_IRQ_PADCFG (PAD_CTL_PUE | PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) +#define N6_IRQ_TEST_PADCFG (PAD_CTL_PKE | N6_IRQ_PADCFG) +#define N6_EN_PADCFG (PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm) + +#include "pads-mx6_sabrelite.h" +#define FOR_DL_SOLO +#include "pads-mx6_sabrelite.h" + void __init early_console_setup(unsigned long base, struct clk *clk); static struct clk *sata_clk; @@ -108,252 +135,49 @@ extern struct regulator *(*get_cpu_regulator)(void); extern void (*put_cpu_regulator)(void); extern void mx6_cpu_regulator_init(void); -static iomux_v3_cfg_t mx6q_sabrelite_pads[] = { - /* AUDMUX */ - MX6Q_PAD_SD2_DAT0__AUDMUX_AUD4_RXD, - MX6Q_PAD_SD2_DAT3__AUDMUX_AUD4_TXC, - MX6Q_PAD_SD2_DAT2__AUDMUX_AUD4_TXD, - MX6Q_PAD_SD2_DAT1__AUDMUX_AUD4_TXFS, - - /* CAN1 */ - MX6Q_PAD_KEY_ROW2__CAN1_RXCAN, - MX6Q_PAD_KEY_COL2__CAN1_TXCAN, - MX6Q_PAD_GPIO_2__GPIO_1_2, /* STNDBY */ - MX6Q_PAD_GPIO_7__GPIO_1_7, /* NERR */ - MX6Q_PAD_GPIO_4__GPIO_1_4, /* Enable */ - - /* CCM */ - MX6Q_PAD_GPIO_0__CCM_CLKO, /* SGTL500 sys_mclk */ - MX6Q_PAD_GPIO_3__CCM_CLKO2, /* J5 - Camera MCLK */ - - /* ECSPI1 */ - MX6Q_PAD_EIM_D17__ECSPI1_MISO, - MX6Q_PAD_EIM_D18__ECSPI1_MOSI, - MX6Q_PAD_EIM_D16__ECSPI1_SCLK, - MX6Q_PAD_EIM_D19__GPIO_3_19, /*SS1*/ - - /* ENET */ - MX6Q_PAD_ENET_MDIO__ENET_MDIO, - MX6Q_PAD_ENET_MDC__ENET_MDC, - MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC, - MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0, - MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1, - MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2, - MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3, - MX6Q_PAD_RGMII_TX_CTL__ENET_RGMII_TX_CTL, - MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK, - MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC, - MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0, - MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1, - MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2, - MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3, - MX6Q_PAD_RGMII_RX_CTL__ENET_RGMII_RX_CTL, - MX6Q_PAD_ENET_TX_EN__GPIO_1_28, /* Micrel RGMII Phy Interrupt */ - MX6Q_PAD_EIM_D23__GPIO_3_23, /* RGMII reset */ - - /* GPIO1 */ - MX6Q_PAD_ENET_RX_ER__GPIO_1_24, /* J9 - Microphone Detect */ - - /* GPIO2 */ - MX6Q_PAD_NANDF_D1__GPIO_2_1, /* J14 - Menu Button */ - MX6Q_PAD_NANDF_D2__GPIO_2_2, /* J14 - Back Button */ - MX6Q_PAD_NANDF_D3__GPIO_2_3, /* J14 - Search Button */ - MX6Q_PAD_NANDF_D4__GPIO_2_4, /* J14 - Home Button */ - MX6Q_PAD_EIM_A22__GPIO_2_16, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_A21__GPIO_2_17, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_A20__GPIO_2_18, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_A19__GPIO_2_19, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_A18__GPIO_2_20, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_A17__GPIO_2_21, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_A16__GPIO_2_22, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_RW__GPIO_2_26, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_LBA__GPIO_2_27, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_EB0__GPIO_2_28, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_EB1__GPIO_2_29, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_EB3__GPIO_2_31, /* J12 - Boot Mode Select */ - - /* GPIO3 */ - MX6Q_PAD_EIM_DA0__GPIO_3_0, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_DA1__GPIO_3_1, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_DA2__GPIO_3_2, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_DA3__GPIO_3_3, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_DA4__GPIO_3_4, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_DA5__GPIO_3_5, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_DA6__GPIO_3_6, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_DA7__GPIO_3_7, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_DA8__GPIO_3_8, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_DA9__GPIO_3_9, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_DA10__GPIO_3_10, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_DA11__GPIO_3_11, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_DA12__GPIO_3_12, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_DA13__GPIO_3_13, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_DA14__GPIO_3_14, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_DA15__GPIO_3_15, /* J12 - Boot Mode Select */ - - /* GPIO4 */ - MX6Q_PAD_GPIO_19__GPIO_4_5, /* J14 - Volume Down */ - - /* GPIO5 */ - MX6Q_PAD_EIM_WAIT__GPIO_5_0, /* J12 - Boot Mode Select */ - MX6Q_PAD_EIM_A24__GPIO_5_4, /* J12 - Boot Mode Select */ - - /* GPIO6 */ - MX6Q_PAD_EIM_A23__GPIO_6_6, /* J12 - Boot Mode Select */ - - /* GPIO7 */ - MX6Q_PAD_GPIO_17__GPIO_7_12, /* USB Hub Reset */ - MX6Q_PAD_GPIO_18__GPIO_7_13, /* J14 - Volume Up */ - - /* I2C1, SGTL5000 */ - MX6Q_PAD_EIM_D21__I2C1_SCL, /* GPIO3[21] */ - MX6Q_PAD_EIM_D28__I2C1_SDA, /* GPIO3[28] */ - - /* I2C2 Camera, MIPI */ - MX6Q_PAD_KEY_COL3__I2C2_SCL, /* GPIO4[12] */ - MX6Q_PAD_KEY_ROW3__I2C2_SDA, /* GPIO4[13] */ - - /* I2C3 */ - MX6Q_PAD_GPIO_5__I2C3_SCL, /* GPIO1[5] - J7 - Display card */ -#ifdef CONFIG_FEC_1588 - MX6Q_PAD_GPIO_16__ENET_ANATOP_ETHERNET_REF_OUT, -#else - MX6Q_PAD_GPIO_16__I2C3_SDA, /* GPIO7[11] - J15 - RGB connector */ -#endif +#define IOMUX_SETUP(pad_list) mxc_iomux_v3_setup_pads(mx6q_##pad_list, \ + mx6dl_solo_##pad_list) - /* DISPLAY */ - MX6Q_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, - MX6Q_PAD_DI0_PIN15__IPU1_DI0_PIN15, /* DE */ - MX6Q_PAD_DI0_PIN2__IPU1_DI0_PIN2, /* HSync */ - MX6Q_PAD_DI0_PIN3__IPU1_DI0_PIN3, /* VSync */ - MX6Q_PAD_DI0_PIN4__IPU1_DI0_PIN4, /* Contrast */ - MX6Q_PAD_DISP0_DAT0__IPU1_DISP0_DAT_0, - MX6Q_PAD_DISP0_DAT1__IPU1_DISP0_DAT_1, - MX6Q_PAD_DISP0_DAT2__IPU1_DISP0_DAT_2, - MX6Q_PAD_DISP0_DAT3__IPU1_DISP0_DAT_3, - MX6Q_PAD_DISP0_DAT4__IPU1_DISP0_DAT_4, - MX6Q_PAD_DISP0_DAT5__IPU1_DISP0_DAT_5, - MX6Q_PAD_DISP0_DAT6__IPU1_DISP0_DAT_6, - MX6Q_PAD_DISP0_DAT7__IPU1_DISP0_DAT_7, - MX6Q_PAD_DISP0_DAT8__IPU1_DISP0_DAT_8, - MX6Q_PAD_DISP0_DAT9__IPU1_DISP0_DAT_9, - MX6Q_PAD_DISP0_DAT10__IPU1_DISP0_DAT_10, - MX6Q_PAD_DISP0_DAT11__IPU1_DISP0_DAT_11, - MX6Q_PAD_DISP0_DAT12__IPU1_DISP0_DAT_12, - MX6Q_PAD_DISP0_DAT13__IPU1_DISP0_DAT_13, - MX6Q_PAD_DISP0_DAT14__IPU1_DISP0_DAT_14, - MX6Q_PAD_DISP0_DAT15__IPU1_DISP0_DAT_15, - MX6Q_PAD_DISP0_DAT16__IPU1_DISP0_DAT_16, - MX6Q_PAD_DISP0_DAT17__IPU1_DISP0_DAT_17, - MX6Q_PAD_DISP0_DAT18__IPU1_DISP0_DAT_18, - MX6Q_PAD_DISP0_DAT19__IPU1_DISP0_DAT_19, - MX6Q_PAD_DISP0_DAT20__IPU1_DISP0_DAT_20, - MX6Q_PAD_DISP0_DAT21__IPU1_DISP0_DAT_21, - MX6Q_PAD_DISP0_DAT22__IPU1_DISP0_DAT_22, - MX6Q_PAD_DISP0_DAT23__IPU1_DISP0_DAT_23, - MX6Q_PAD_GPIO_7__GPIO_1_7, /* J7 - Display Connector GP */ - MX6Q_PAD_GPIO_9__GPIO_1_9, /* J7 - Display Connector GP */ - MX6Q_PAD_NANDF_D0__GPIO_2_0, /* J6 - LVDS Display contrast */ - - - /* PWM1 */ - MX6Q_PAD_SD1_DAT3__PWM1_PWMO, /* GPIO1[21] */ - - /* PWM2 */ - MX6Q_PAD_SD1_DAT2__PWM2_PWMO, /* GPIO1[19] */ - - /* PWM3 */ - MX6Q_PAD_SD1_DAT1__PWM3_PWMO, /* GPIO1[17] */ - - /* PWM4 */ - MX6Q_PAD_SD1_CMD__PWM4_PWMO, /* GPIO1[18] */ - - /* UART1 */ - MX6Q_PAD_SD3_DAT7__UART1_TXD, - MX6Q_PAD_SD3_DAT6__UART1_RXD, - - /* UART2 for debug */ - MX6Q_PAD_EIM_D26__UART2_TXD, - MX6Q_PAD_EIM_D27__UART2_RXD, - - /* USBOTG ID pin */ - MX6Q_PAD_GPIO_1__USBOTG_ID, - - /* USB OC pin */ - MX6Q_PAD_KEY_COL4__USBOH3_USBOTG_OC, - MX6Q_PAD_EIM_D30__USBOH3_USBH1_OC, - - /* USDHC3 */ - MX6Q_PAD_SD3_CLK__USDHC3_CLK_50MHZ, - MX6Q_PAD_SD3_CMD__USDHC3_CMD_50MHZ, - MX6Q_PAD_SD3_DAT0__USDHC3_DAT0_50MHZ, - MX6Q_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ, - MX6Q_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ, - MX6Q_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ, - MX6Q_PAD_SD3_DAT5__GPIO_7_0, /* J18 - SD3_CD */ - NEW_PAD_CTRL(MX6Q_PAD_SD3_DAT4__GPIO_7_1, MX6Q_SABRELITE_SD3_WP_PADCFG), - - /* USDHC4 */ - MX6Q_PAD_SD4_CLK__USDHC4_CLK_50MHZ, - MX6Q_PAD_SD4_CMD__USDHC4_CMD_50MHZ, - MX6Q_PAD_SD4_DAT0__USDHC4_DAT0_50MHZ, - MX6Q_PAD_SD4_DAT1__USDHC4_DAT1_50MHZ, - MX6Q_PAD_SD4_DAT2__USDHC4_DAT2_50MHZ, - MX6Q_PAD_SD4_DAT3__USDHC4_DAT3_50MHZ, - MX6Q_PAD_NANDF_D6__GPIO_2_6, /* J20 - SD4_CD */ - MX6Q_PAD_NANDF_D7__GPIO_2_7, /* SD4_WP */ -}; - -static iomux_v3_cfg_t mx6q_sabrelite_csi0_sensor_pads[] = { - /* IPU1 Camera */ - MX6Q_PAD_CSI0_DAT8__IPU1_CSI0_D_8, - MX6Q_PAD_CSI0_DAT9__IPU1_CSI0_D_9, - MX6Q_PAD_CSI0_DAT10__IPU1_CSI0_D_10, - MX6Q_PAD_CSI0_DAT11__IPU1_CSI0_D_11, - MX6Q_PAD_CSI0_DAT12__IPU1_CSI0_D_12, - MX6Q_PAD_CSI0_DAT13__IPU1_CSI0_D_13, - MX6Q_PAD_CSI0_DAT14__IPU1_CSI0_D_14, - MX6Q_PAD_CSI0_DAT15__IPU1_CSI0_D_15, - MX6Q_PAD_CSI0_DAT16__IPU1_CSI0_D_16, - MX6Q_PAD_CSI0_DAT17__IPU1_CSI0_D_17, - MX6Q_PAD_CSI0_DAT18__IPU1_CSI0_D_18, - MX6Q_PAD_CSI0_DAT19__IPU1_CSI0_D_19, - MX6Q_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN, - MX6Q_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC, - MX6Q_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK, - MX6Q_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC, - MX6Q_PAD_GPIO_6__GPIO_1_6, /* J5 - Camera GP */ - MX6Q_PAD_GPIO_8__GPIO_1_8, /* J5 - Camera Reset */ - MX6Q_PAD_SD1_DAT0__GPIO_1_16, /* J5 - Camera GP */ - MX6Q_PAD_NANDF_D5__GPIO_2_5, /* J16 - MIPI GP */ - MX6Q_PAD_NANDF_WP_B__GPIO_6_9, /* J16 - MIPI GP */ -}; - -static iomux_v3_cfg_t mx6q_sabrelite_hdmi_ddc_pads[] = { - MX6Q_PAD_KEY_COL3__HDMI_TX_DDC_SCL, /* HDMI DDC SCL */ - MX6Q_PAD_KEY_ROW3__HDMI_TX_DDC_SDA, /* HDMI DDC SDA */ -}; - -static iomux_v3_cfg_t mx6q_sabrelite_i2c2_pads[] = { - MX6Q_PAD_KEY_COL3__I2C2_SCL, /* I2C2 SCL */ - MX6Q_PAD_KEY_ROW3__I2C2_SDA, /* I2C2 SDA */ -}; - -#define MX6Q_USDHC_PAD_SETTING(id, speed) \ -mx6q_sd##id##_##speed##mhz[] = { \ - MX6Q_PAD_SD##id##_CLK__USDHC##id##_CLK_##speed##MHZ, \ - MX6Q_PAD_SD##id##_CMD__USDHC##id##_CMD_##speed##MHZ, \ - MX6Q_PAD_SD##id##_DAT0__USDHC##id##_DAT0_##speed##MHZ, \ - MX6Q_PAD_SD##id##_DAT1__USDHC##id##_DAT1_##speed##MHZ, \ - MX6Q_PAD_SD##id##_DAT2__USDHC##id##_DAT2_##speed##MHZ, \ - MX6Q_PAD_SD##id##_DAT3__USDHC##id##_DAT3_##speed##MHZ, \ +int mxc_iomux_v3_setup_pads(iomux_v3_cfg_t *mx6q_pad_list, + iomux_v3_cfg_t *mx6dl_solo_pad_list) +{ + iomux_v3_cfg_t *p = cpu_is_mx6q() ? mx6q_pad_list : mx6dl_solo_pad_list; + int ret; + + while (*p) { + ret = mxc_iomux_v3_setup_pad(*p); + if (ret) + return ret; + p++; + } + return 0; } -static iomux_v3_cfg_t MX6Q_USDHC_PAD_SETTING(3, 50); -static iomux_v3_cfg_t MX6Q_USDHC_PAD_SETTING(3, 100); -static iomux_v3_cfg_t MX6Q_USDHC_PAD_SETTING(3, 200); -static iomux_v3_cfg_t MX6Q_USDHC_PAD_SETTING(4, 50); -static iomux_v3_cfg_t MX6Q_USDHC_PAD_SETTING(4, 100); -static iomux_v3_cfg_t MX6Q_USDHC_PAD_SETTING(4, 200); +struct gpio n6w_wl1271_gpios[] __initdata = { + {.label = "wl1271_int", .gpio = N6_WL1271_WL_IRQ, .flags = GPIOF_DIR_IN}, + {.label = "wl1271_bt_en", .gpio = N6_WL1271_BT_EN, .flags = 0}, + {.label = "wl1271_wl_en", .gpio = N6_WL1271_WL_EN, .flags = 0}, +}; + +int is_nitrogen6w(void) +{ + int ret = gpio_request_array(n6w_wl1271_gpios, + ARRAY_SIZE(n6w_wl1271_gpios)); + if (ret) { + printk(KERN_ERR "%s gpio_request_array failed(" + "%d) for n6w_wl1271_gpios\n", __func__, ret); + return ret; + } + ret = gpio_get_value(N6_WL1271_WL_IRQ); + if (ret <= 0) { + /* Sabrelite, not nitrogen6w */ + gpio_free(N6_WL1271_WL_IRQ); + gpio_free(N6_WL1271_WL_EN); + gpio_free(N6_WL1271_BT_EN); + ret = 0; + } + return ret; +} enum sd_pad_mode { SD_PAD_MODE_LOW_SPEED, @@ -365,35 +189,9 @@ static int plt_sd_pad_change(unsigned int index, int clock) { /* LOW speed is the default state of SD pads */ static enum sd_pad_mode pad_mode = SD_PAD_MODE_LOW_SPEED; + int i = (index - 1) * SD_SPEED_CNT; - iomux_v3_cfg_t *sd_pads_200mhz = NULL; - iomux_v3_cfg_t *sd_pads_100mhz = NULL; - iomux_v3_cfg_t *sd_pads_50mhz = NULL; - - u32 sd_pads_200mhz_cnt; - u32 sd_pads_100mhz_cnt; - u32 sd_pads_50mhz_cnt; - - switch (index) { - case 2: - sd_pads_200mhz = mx6q_sd3_200mhz; - sd_pads_100mhz = mx6q_sd3_100mhz; - sd_pads_50mhz = mx6q_sd3_50mhz; - - sd_pads_200mhz_cnt = ARRAY_SIZE(mx6q_sd3_200mhz); - sd_pads_100mhz_cnt = ARRAY_SIZE(mx6q_sd3_100mhz); - sd_pads_50mhz_cnt = ARRAY_SIZE(mx6q_sd3_50mhz); - break; - case 3: - sd_pads_200mhz = mx6q_sd4_200mhz; - sd_pads_100mhz = mx6q_sd4_100mhz; - sd_pads_50mhz = mx6q_sd4_50mhz; - - sd_pads_200mhz_cnt = ARRAY_SIZE(mx6q_sd4_200mhz); - sd_pads_100mhz_cnt = ARRAY_SIZE(mx6q_sd4_100mhz); - sd_pads_50mhz_cnt = ARRAY_SIZE(mx6q_sd4_50mhz); - break; - default: + if ((index < 1) || (index > 3)) { printk(KERN_ERR "no such SD host controller index %d\n", index); return -EINVAL; } @@ -401,61 +199,71 @@ static int plt_sd_pad_change(unsigned int index, int clock) if (clock > 100000000) { if (pad_mode == SD_PAD_MODE_HIGH_SPEED) return 0; - BUG_ON(!sd_pads_200mhz); pad_mode = SD_PAD_MODE_HIGH_SPEED; - return mxc_iomux_v3_setup_multiple_pads(sd_pads_200mhz, - sd_pads_200mhz_cnt); + i += _200MHZ; } else if (clock > 52000000) { if (pad_mode == SD_PAD_MODE_MED_SPEED) return 0; - BUG_ON(!sd_pads_100mhz); pad_mode = SD_PAD_MODE_MED_SPEED; - return mxc_iomux_v3_setup_multiple_pads(sd_pads_100mhz, - sd_pads_100mhz_cnt); + i += _100MHZ; } else { if (pad_mode == SD_PAD_MODE_LOW_SPEED) return 0; - BUG_ON(!sd_pads_50mhz); pad_mode = SD_PAD_MODE_LOW_SPEED; - return mxc_iomux_v3_setup_multiple_pads(sd_pads_50mhz, - sd_pads_50mhz_cnt); + i += _50MHZ; } + return IOMUX_SETUP(sd_pads[i]); } -static const struct esdhc_platform_data mx6q_sabrelite_sd3_data __initconst = { - .cd_gpio = MX6Q_SABRELITE_SD3_CD, - .wp_gpio = MX6Q_SABRELITE_SD3_WP, +#ifdef CONFIG_WL12XX_PLATFORM_DATA +static struct esdhc_platform_data mx6_sabrelite_sd2_data = { + .always_present = 1, + .cd_gpio = -1, + .wp_gpio = -1, + .keep_power_at_suspend = 0, + .caps = MMC_CAP_POWER_OFF_CARD, + .platform_pad_change = plt_sd_pad_change, +}; +#endif + +static struct esdhc_platform_data mx6_sabrelite_sd3_data = { + .cd_gpio = MX6_SABRELITE_SD3_CD, + .wp_gpio = MX6_SABRELITE_SD3_WP, .keep_power_at_suspend = 1, .platform_pad_change = plt_sd_pad_change, }; -static const struct esdhc_platform_data mx6q_sabrelite_sd4_data __initconst = { - .cd_gpio = MX6Q_SABRELITE_SD4_CD, - .wp_gpio = MX6Q_SABRELITE_SD4_WP, +static const struct esdhc_platform_data mx6_sabrelite_sd4_data __initconst = { + .cd_gpio = MX6_SABRELITE_SD4_CD, + .wp_gpio = -1, .keep_power_at_suspend = 1, .platform_pad_change = plt_sd_pad_change, }; static const struct anatop_thermal_platform_data - mx6q_sabrelite_anatop_thermal_data __initconst = { + mx6_sabrelite_anatop_thermal_data __initconst = { .name = "anatop_thermal", }; -static inline void mx6q_sabrelite_init_uart(void) -{ - imx6q_add_imx_uart(0, NULL); - imx6q_add_imx_uart(1, NULL); -} +static const struct imxuart_platform_data mx6_arm2_uart2_data __initconst = { + .flags = IMXUART_HAVE_RTSCTS | IMXUART_SDMA, + .dma_req_rx = MX6Q_DMA_REQ_UART3_RX, + .dma_req_tx = MX6Q_DMA_REQ_UART3_TX, +}; -static int mx6q_sabrelite_fec_phy_init(struct phy_device *phydev) +static int mx6_sabrelite_fec_phy_init(struct phy_device *phydev) { - /* prefer master mode, disable 1000 Base-T capable */ - phy_write(phydev, 0x9, 0x1c00); + /* prefer master mode */ + phy_write(phydev, 0x9, 0x1f00); /* min rx data delay */ phy_write(phydev, 0x0b, 0x8105); phy_write(phydev, 0x0c, 0x0000); + /* min tx data delay */ + phy_write(phydev, 0x0b, 0x8106); + phy_write(phydev, 0x0c, 0x0000); + /* max rx/tx clock delay, min rx/tx control delay */ phy_write(phydev, 0x0b, 0x8104); phy_write(phydev, 0x0c, 0xf0f0); @@ -465,17 +273,18 @@ static int mx6q_sabrelite_fec_phy_init(struct phy_device *phydev) } static struct fec_platform_data fec_data __initdata = { - .init = mx6q_sabrelite_fec_phy_init, + .init = mx6_sabrelite_fec_phy_init, .phy = PHY_INTERFACE_MODE_RGMII, + .phy_irq = gpio_to_irq(MX6_SABRELITE_ENET_PHY_INT) }; -static int mx6q_sabrelite_spi_cs[] = { - MX6Q_SABRELITE_ECSPI1_CS1, +static int mx6_sabrelite_spi_cs[] = { + MX6_SABRELITE_ECSPI1_CS1, }; -static const struct spi_imx_master mx6q_sabrelite_spi_data __initconst = { - .chipselect = mx6q_sabrelite_spi_cs, - .num_chipselect = ARRAY_SIZE(mx6q_sabrelite_spi_cs), +static const struct spi_imx_master mx6_sabrelite_spi_data __initconst = { + .chipselect = mx6_sabrelite_spi_cs, + .num_chipselect = ARRAY_SIZE(mx6_sabrelite_spi_cs), }; #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) @@ -483,10 +292,15 @@ static struct mtd_partition imx6_sabrelite_spi_nor_partitions[] = { { .name = "bootloader", .offset = 0, - .size = 0x00100000, + .size = 768*1024, + }, + { + .name = "ubparams", + .offset = MTDPART_OFS_APPEND, + .size = 8*1024, }, { - .name = "kernel", + .name = "unused", .offset = MTDPART_OFS_APPEND, .size = MTDPART_SIZ_FULL, }, @@ -565,7 +379,7 @@ static struct platform_device mx6_sabrelite_audio_device = { .name = "imx-sgtl5000", }; -static struct imxi2c_platform_data mx6q_sabrelite_i2c_data = { +static struct imxi2c_platform_data mx6_sabrelite_i2c_data = { .bitrate = 100000, }; @@ -575,35 +389,58 @@ static struct i2c_board_info mxc_i2c0_board_info[] __initdata = { }, }; -static void mx6q_csi0_cam_powerdown(int powerdown) +static void mx6_csi0_cam_powerdown(int powerdown) { if (powerdown) - gpio_set_value(MX6Q_SABRELITE_CSI0_PWN, 1); + gpio_set_value(MX6_SABRELITE_CSI0_PWN, 1); else - gpio_set_value(MX6Q_SABRELITE_CSI0_PWN, 0); + gpio_set_value(MX6_SABRELITE_CSI0_PWN, 0); msleep(2); } -static void mx6q_csi0_io_init(void) +static void camera_reset(int power_gp, int reset_gp, int reset_gp2) { - mxc_iomux_v3_setup_multiple_pads(mx6q_sabrelite_csi0_sensor_pads, - ARRAY_SIZE(mx6q_sabrelite_csi0_sensor_pads)); - /* Camera power down */ - gpio_request(MX6Q_SABRELITE_CSI0_PWN, "cam-pwdn"); - gpio_direction_output(MX6Q_SABRELITE_CSI0_PWN, 1); + gpio_request(power_gp, "cam-pwdn"); + gpio_request(reset_gp, "cam-reset"); + gpio_request(reset_gp2, "cam-reset2"); + gpio_direction_output(power_gp, 1); + /* Camera reset */ + gpio_direction_output(reset_gp, 0); + gpio_direction_output(reset_gp2, 0); msleep(1); - gpio_set_value(MX6Q_SABRELITE_CSI0_PWN, 0); + gpio_set_value(power_gp, 0); + msleep(1); + gpio_set_value(reset_gp, 1); + gpio_set_value(reset_gp2, 1); +} - /* Camera reset */ - gpio_request(MX6Q_SABRELITE_CSI0_RST, "cam-reset"); - gpio_direction_output(MX6Q_SABRELITE_CSI0_RST, 1); +#if defined(CONFIG_MXC_CAMERA_OV5640_MIPI) || defined(CONFIG_MXC_CAMERA_OV5640_MIPI_MODULE) +static void mx6_mipi_sensor_io_init(void) +{ + IOMUX_SETUP(sabrelite_mipi_pads); - gpio_set_value(MX6Q_SABRELITE_CSI0_RST, 0); - msleep(1); - gpio_set_value(MX6Q_SABRELITE_CSI0_RST, 1); + camera_reset(MX6_SABRELITE_CSI0_PWN, IMX_GPIO_NR(2, 5), + IMX_GPIO_NR(6, 11)); +/*for mx6dl, mipi virtual channel 1 connect to csi 1*/ + if (cpu_is_mx6dl()) + mxc_iomux_set_gpr_register(13, 3, 3, 1); +} + +static struct fsl_mxc_camera_platform_data ov5640_mipi_data = { + .mclk = 24000000, + .csi = 0, + .io_init = mx6_mipi_sensor_io_init, + .pwdn = mx6_csi0_cam_powerdown, +}; +#else +static void mx6_csi0_io_init(void) +{ + IOMUX_SETUP(sabrelite_csi0_sensor_pads); + camera_reset(MX6_SABRELITE_CSI0_PWN, MX6_SABRELITE_CSI0_RST, + IMX_GPIO_NR(6, 11)); /* For MX6Q GPR1 bit19 and bit20 meaning: * Bit19: 0 - Enable mipi to IPU1 CSI0 * virtual channel is fixed to 0 @@ -616,43 +453,72 @@ static void mx6q_csi0_io_init(void) * IPU2 CSI0 directly connect to mipi csi2, * virtual channel is fixed to 2 */ - mxc_iomux_set_gpr_register(1, 19, 1, 1); + if (cpu_is_mx6q()) + mxc_iomux_set_gpr_register(1, 19, 1, 1); + else + mxc_iomux_set_gpr_register(13, 0, 3, 4); } static struct fsl_mxc_camera_platform_data camera_data = { .mclk = 24000000, .mclk_source = 0, .csi = 0, - .io_init = mx6q_csi0_io_init, - .pwdn = mx6q_csi0_cam_powerdown, + .io_init = mx6_csi0_io_init, + .pwdn = mx6_csi0_cam_powerdown, }; +#endif + static struct i2c_board_info mxc_i2c1_board_info[] __initdata = { { I2C_BOARD_INFO("mxc_hdmi_i2c", 0x50), }, +#if defined(CONFIG_MXC_CAMERA_OV5640_MIPI) || defined(CONFIG_MXC_CAMERA_OV5640_MIPI_MODULE) + { + I2C_BOARD_INFO("ov5640_mipi", 0x3c), + .platform_data = (void *)&ov5640_mipi_data, + }, +#else { I2C_BOARD_INFO("ov5642", 0x3c), .platform_data = (void *)&camera_data, }, +#endif +}; + +static struct tsc2007_platform_data tsc2007_info = { + .model = 2004, + .x_plate_ohms = 500, }; static struct i2c_board_info mxc_i2c2_board_info[] __initdata = { { I2C_BOARD_INFO("egalax_ts", 0x4), - .irq = gpio_to_irq(MX6Q_SABRELITE_CAP_TCH_INT1), + .irq = gpio_to_irq(MX6_SABRELITE_CAP_TCH_INT1), + }, + { + I2C_BOARD_INFO("tsc2004", 0x48), + .platform_data = &tsc2007_info, + .irq = gpio_to_irq(MX6_SABRELITE_DRGB_IRQGPIO), }, +#if defined(CONFIG_TOUCHSCREEN_FT5X06) \ + || defined(CONFIG_TOUCHSCREEN_FT5X06_MODULE) + { + I2C_BOARD_INFO("ft5x06-ts", 0x38), + .irq = gpio_to_irq(MX6_SABRELITE_CAP_TCH_INT1), + }, +#endif }; -static void imx6q_sabrelite_usbotg_vbus(bool on) +static void imx6_sabrelite_usbotg_vbus(bool on) { if (on) - gpio_set_value(MX6Q_SABRELITE_USB_OTG_PWR, 1); + gpio_set_value(MX6_SABRELITE_USB_OTG_PWR, 1); else - gpio_set_value(MX6Q_SABRELITE_USB_OTG_PWR, 0); + gpio_set_value(MX6_SABRELITE_USB_OTG_PWR, 0); } -static void __init imx6q_sabrelite_init_usb(void) +static void __init imx6_sabrelite_init_usb(void) { int ret = 0; @@ -660,21 +526,21 @@ static void __init imx6q_sabrelite_init_usb(void) /* disable external charger detect, * or it will affect signal quality at dp . */ - ret = gpio_request(MX6Q_SABRELITE_USB_OTG_PWR, "usb-pwr"); + ret = gpio_request(MX6_SABRELITE_USB_OTG_PWR, "usb-pwr"); if (ret) { - pr_err("failed to get GPIO MX6Q_SABRELITE_USB_OTG_PWR: %d\n", + pr_err("failed to get GPIO MX6_SABRELITE_USB_OTG_PWR: %d\n", ret); return; } - gpio_direction_output(MX6Q_SABRELITE_USB_OTG_PWR, 0); + gpio_direction_output(MX6_SABRELITE_USB_OTG_PWR, 0); mxc_iomux_set_gpr_register(1, 13, 1, 1); - mx6_set_otghost_vbus_func(imx6q_sabrelite_usbotg_vbus); + mx6_set_otghost_vbus_func(imx6_sabrelite_usbotg_vbus); mx6_usb_dr_init(); } /* HW Initialization, if return 0, initialization is successful. */ -static int mx6q_sabrelite_sata_init(struct device *dev, void __iomem *addr) +static int mx6_sabrelite_sata_init(struct device *dev, void __iomem *addr) { u32 tmpdata; int ret = 0; @@ -734,39 +600,45 @@ put_sata_clk: return ret; } -static void mx6q_sabrelite_sata_exit(struct device *dev) +static void mx6_sabrelite_sata_exit(struct device *dev) { clk_disable(sata_clk); clk_put(sata_clk); } -static struct ahci_platform_data mx6q_sabrelite_sata_data = { - .init = mx6q_sabrelite_sata_init, - .exit = mx6q_sabrelite_sata_exit, +static struct ahci_platform_data mx6_sabrelite_sata_data = { + .init = mx6_sabrelite_sata_init, + .exit = mx6_sabrelite_sata_exit, }; -static struct gpio mx6q_sabrelite_flexcan_gpios[] = { - { MX6Q_SABRELITE_CAN1_EN, GPIOF_OUT_INIT_LOW, "flexcan1-en" }, - { MX6Q_SABRELITE_CAN1_STBY, GPIOF_OUT_INIT_LOW, "flexcan1-stby" }, +static struct gpio mx6_sabrelite_flexcan_gpios[] = { + { MX6_SABRELITE_CAN1_ERR, GPIOF_DIR_IN, "flexcan1-err" }, + { MX6_SABRELITE_CAN1_EN, GPIOF_OUT_INIT_LOW, "flexcan1-en" }, + { MX6_SABRELITE_CAN1_STBY, GPIOF_OUT_INIT_LOW, "flexcan1-stby" }, }; -static void mx6q_sabrelite_flexcan0_switch(int enable) +static void mx6_sabrelite_flexcan0_mc33902_switch(int enable) { - if (enable) { - gpio_set_value(MX6Q_SABRELITE_CAN1_EN, 1); - gpio_set_value(MX6Q_SABRELITE_CAN1_STBY, 1); - } else { - gpio_set_value(MX6Q_SABRELITE_CAN1_EN, 0); - gpio_set_value(MX6Q_SABRELITE_CAN1_STBY, 0); - } + gpio_set_value(MX6_SABRELITE_CAN1_EN, enable); + gpio_set_value(MX6_SABRELITE_CAN1_STBY, enable); +} + +static void mx6_sabrelite_flexcan0_tja1040_switch(int enable) +{ + gpio_set_value(MX6_SABRELITE_CAN1_STBY, enable ^ 1); } static const struct flexcan_platform_data - mx6q_sabrelite_flexcan0_pdata __initconst = { - .transceiver_switch = mx6q_sabrelite_flexcan0_switch, + mx6_sabrelite_flexcan0_mc33902_pdata __initconst = { + .transceiver_switch = mx6_sabrelite_flexcan0_mc33902_switch, +}; + +static const struct flexcan_platform_data + mx6_sabrelite_flexcan0_tja1040_pdata __initconst = { + .transceiver_switch = mx6_sabrelite_flexcan0_tja1040_switch, }; -static struct viv_gpu_platform_data imx6q_gpu_pdata __initdata = { +static struct viv_gpu_platform_data imx6_gpu_pdata __initdata = { .reserved_mem_size = SZ_128M, }; @@ -834,14 +706,12 @@ static void hdmi_init(int ipu_id, int disp_id) static void hdmi_enable_ddc_pin(void) { - mxc_iomux_v3_setup_multiple_pads(mx6q_sabrelite_hdmi_ddc_pads, - ARRAY_SIZE(mx6q_sabrelite_hdmi_ddc_pads)); + IOMUX_SETUP(sabrelite_hdmi_ddc_pads); } static void hdmi_disable_ddc_pin(void) { - mxc_iomux_v3_setup_multiple_pads(mx6q_sabrelite_i2c2_pads, - ARRAY_SIZE(mx6q_sabrelite_i2c2_pads)); + IOMUX_SETUP(sabrelite_i2c2_pads); } static struct fsl_mxc_hdmi_platform_data hdmi_data = { @@ -852,7 +722,7 @@ static struct fsl_mxc_hdmi_platform_data hdmi_data = { static struct fsl_mxc_hdmi_core_platform_data hdmi_core_data = { .ipu_id = 0, - .disp_id = 0, + .disp_id = 1, }; static struct fsl_mxc_lcd_platform_data lcdif_data = { @@ -904,13 +774,12 @@ static void sabrelite_suspend_exit(void) { /* resume restore */ } -static const struct pm_platform_data mx6q_sabrelite_pm_data __initconst = { +static const struct pm_platform_data mx6_sabrelite_pm_data __initconst = { .name = "imx_pm", .suspend_enter = sabrelite_suspend_enter, .suspend_exit = sabrelite_suspend_exit, }; -#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) #define GPIO_BUTTON(gpio_num, ev_code, act_low, descr, wake) \ { \ .gpio = gpio_num, \ @@ -922,14 +791,15 @@ static const struct pm_platform_data mx6q_sabrelite_pm_data __initconst = { } static struct gpio_keys_button sabrelite_buttons[] = { - GPIO_BUTTON(MX6Q_SABRELITE_ONOFF_KEY, KEY_POWER, 1, "key-power", 1), - GPIO_BUTTON(MX6Q_SABRELITE_MENU_KEY, KEY_MENU, 1, "key-memu", 0), - GPIO_BUTTON(MX6Q_SABRELITE_HOME_KEY, KEY_HOME, 1, "key-home", 0), - GPIO_BUTTON(MX6Q_SABRELITE_BACK_KEY, KEY_BACK, 1, "key-back", 0), - GPIO_BUTTON(MX6Q_SABRELITE_VOL_UP_KEY, KEY_VOLUMEUP, 1, "volume-up", 0), - GPIO_BUTTON(MX6Q_SABRELITE_VOL_DOWN_KEY, KEY_VOLUMEDOWN, 1, "volume-down", 0), + GPIO_BUTTON(MX6_SABRELITE_ONOFF_KEY, KEY_POWER, 1, "key-power", 1), + GPIO_BUTTON(MX6_SABRELITE_MENU_KEY, KEY_MENU, 1, "key-memu", 0), + GPIO_BUTTON(MX6_SABRELITE_HOME_KEY, KEY_HOME, 1, "key-home", 0), + GPIO_BUTTON(MX6_SABRELITE_BACK_KEY, KEY_BACK, 1, "key-back", 0), + GPIO_BUTTON(MX6_SABRELITE_VOL_UP_KEY, KEY_VOLUMEUP, 1, "volume-up", 0), + GPIO_BUTTON(MX6_SABRELITE_VOL_DOWN_KEY, KEY_VOLUMEDOWN, 1, "volume-down", 0), }; +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) static struct gpio_keys_platform_data sabrelite_button_data = { .buttons = sabrelite_buttons, .nbuttons = ARRAY_SIZE(sabrelite_buttons), @@ -949,7 +819,63 @@ static void __init sabrelite_add_device_buttons(void) platform_device_register(&sabrelite_button_device); } #else -static void __init sabrelite_add_device_buttons(void) {} +static void __init sabrelite_add_device_buttons(void) +{ + int i; + for (i=0; i < ARRAY_SIZE(sabrelite_buttons);i++) { + int gpio = sabrelite_buttons[i].gpio; + pr_debug("%s: exporting gpio %d\n", __func__, gpio); + gpio_export(gpio,1); + } +} +#endif + +#ifdef CONFIG_WL12XX_PLATFORM_DATA +static void wl1271_set_power(bool enable) +{ + if (0 == enable) { + gpio_set_value(N6_WL1271_WL_EN, 0); /* momentarily disable */ + mdelay(2); + gpio_set_value(N6_WL1271_WL_EN, 1); + } +} + +struct wl12xx_platform_data n6q_wlan_data __initdata = { + .irq = gpio_to_irq(N6_WL1271_WL_IRQ), + .board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */ + .set_power = wl1271_set_power, +}; + +static struct regulator_consumer_supply n6q_vwl1271_consumers[] = { + REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.1"), +}; + +static struct regulator_init_data n6q_vwl1271_init = { + .constraints = { + .name = "VDD_1.8V", + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = ARRAY_SIZE(n6q_vwl1271_consumers), + .consumer_supplies = n6q_vwl1271_consumers, +}; + +static struct fixed_voltage_config n6q_vwl1271_reg_config = { + .supply_name = "vwl1271", + .microvolts = 1800000, /* 1.80V */ + .gpio = N6_WL1271_WL_EN, + .startup_delay = 70000, /* 70ms */ + .enable_high = 1, + .enabled_at_boot = 0, + .init_data = &n6q_vwl1271_init, +}; + +static struct platform_device n6q_vwl1271_reg_devices = { + .name = "reg-fixed-voltage", + .id = 4, + .dev = { + .platform_data = &n6q_vwl1271_reg_config, + }, +}; #endif static struct regulator_consumer_supply sabrelite_vmmc_consumers[] = { @@ -1056,7 +982,7 @@ static struct platform_device sgtl5000_sabrelite_vddd_reg_devices = { #endif /* CONFIG_SND_SOC_SGTL5000 */ -static int imx6q_init_audio(void) +static int imx6_init_audio(void) { mxc_register_device(&mx6_sabrelite_audio_device, &mx6_sabrelite_audio_data); @@ -1069,6 +995,15 @@ static int imx6q_init_audio(void) return 0; } +/* PWM0_PWMO: backlight control on DRGB connector */ +static struct platform_pwm_backlight_data mx6_sabrelite_pwm0_backlight_data = { + .pwm_id = 0, + .max_brightness = 255, + .dft_brightness = 255, + .pwm_period_ns = 1000000000/32768, +}; + +/* PWM3_PWMO: backlight control on LDB connector */ static struct platform_pwm_backlight_data mx6_sabrelite_pwm_backlight_data = { .pwm_id = 3, .max_brightness = 255, @@ -1115,19 +1050,37 @@ static struct mipi_csi2_platform_data mipi_csi2_pdata = { .pixel_clk = "emi_clk", }; +static const struct imx_pcie_platform_data pcie_data __initconst = { + .pcie_pwr_en = -EINVAL, + .pcie_rst = -EINVAL, //MX6_SABRELITE_CAP_TCH_INT1, + .pcie_wake_up = -EINVAL, + .pcie_dis = -EINVAL, +}; + /*! * Board specific initialization. */ static void __init mx6_sabrelite_board_init(void) { - int i; + int i, j; int ret; struct clk *clko2; struct clk *new_parent; int rate; + int isn6 ; - mxc_iomux_v3_setup_multiple_pads(mx6q_sabrelite_pads, - ARRAY_SIZE(mx6q_sabrelite_pads)); + IOMUX_SETUP(common_pads); + + isn6 = is_nitrogen6w(); + if (isn6) { + mx6_sabrelite_audio_data.ext_port = 3; + mx6_sabrelite_sd3_data.wp_gpio = -1 ; + IOMUX_SETUP(nitrogen6x_pads); + } else { + IOMUX_SETUP(sabrelite_pads); + } + printk(KERN_ERR "------------ Board type %s\n", + isn6 ? "Nitrogen6X/W" : "Sabre Lite"); #ifdef CONFIG_FEC_1588 /* Set GPIO_16 input for IEEE-1588 ts_clk and RMII reference clock @@ -1141,13 +1094,26 @@ static void __init mx6_sabrelite_board_init(void) gp_reg_id = sabrelite_dvfscore_data.reg_id; soc_reg_id = sabrelite_dvfscore_data.soc_id; pu_reg_id = sabrelite_dvfscore_data.pu_id; - mx6q_sabrelite_init_uart(); + + imx6q_add_imx_uart(0, NULL); + imx6q_add_imx_uart(1, NULL); + if (isn6) + imx6q_add_imx_uart(2, &mx6_arm2_uart2_data); + + if (!cpu_is_mx6q()) { + ldb_data.ipu_id = 0; + ldb_data.sec_ipu_id = 0; + } imx6q_add_mxc_hdmi_core(&hdmi_core_data); imx6q_add_ipuv3(0, &ipu_data[0]); - imx6q_add_ipuv3(1, &ipu_data[1]); - - for (i = 0; i < ARRAY_SIZE(sabrelite_fb_data); i++) + if (cpu_is_mx6q()) { + imx6q_add_ipuv3(1, &ipu_data[1]); + j = ARRAY_SIZE(sabrelite_fb_data); + } else { + j = (ARRAY_SIZE(sabrelite_fb_data) + 1) / 2; + } + for (i = 0; i < j; i++) imx6q_add_ipuv3fb(i, &sabrelite_fb_data[i]); imx6q_add_vdoa(); @@ -1161,9 +1127,9 @@ static void __init mx6_sabrelite_board_init(void) imx6q_add_imx_caam(); - imx6q_add_imx_i2c(0, &mx6q_sabrelite_i2c_data); - imx6q_add_imx_i2c(1, &mx6q_sabrelite_i2c_data); - imx6q_add_imx_i2c(2, &mx6q_sabrelite_i2c_data); + imx6q_add_imx_i2c(0, &mx6_sabrelite_i2c_data); + imx6q_add_imx_i2c(1, &mx6_sabrelite_i2c_data); + imx6q_add_imx_i2c(2, &mx6_sabrelite_i2c_data); i2c_register_board_info(0, mxc_i2c0_board_info, ARRAY_SIZE(mxc_i2c0_board_info)); i2c_register_board_info(1, mxc_i2c1_board_info, @@ -1172,33 +1138,35 @@ static void __init mx6_sabrelite_board_init(void) ARRAY_SIZE(mxc_i2c2_board_info)); /* SPI */ - imx6q_add_ecspi(0, &mx6q_sabrelite_spi_data); + imx6q_add_ecspi(0, &mx6_sabrelite_spi_data); spi_device_init(); imx6q_add_mxc_hdmi(&hdmi_data); - imx6q_add_anatop_thermal_imx(1, &mx6q_sabrelite_anatop_thermal_data); + imx6q_add_anatop_thermal_imx(1, &mx6_sabrelite_anatop_thermal_data); imx6_init_fec(fec_data); - imx6q_add_pm_imx(0, &mx6q_sabrelite_pm_data); - imx6q_add_sdhci_usdhc_imx(3, &mx6q_sabrelite_sd4_data); - imx6q_add_sdhci_usdhc_imx(2, &mx6q_sabrelite_sd3_data); - imx_add_viv_gpu(&imx6_gpu_data, &imx6q_gpu_pdata); - imx6q_sabrelite_init_usb(); - imx6q_add_ahci(0, &mx6q_sabrelite_sata_data); + imx6q_add_pm_imx(0, &mx6_sabrelite_pm_data); + imx6q_add_sdhci_usdhc_imx(2, &mx6_sabrelite_sd3_data); + imx6q_add_sdhci_usdhc_imx(3, &mx6_sabrelite_sd4_data); + imx_add_viv_gpu(&imx6_gpu_data, &imx6_gpu_pdata); + imx6_sabrelite_init_usb(); + if (cpu_is_mx6q()) + imx6q_add_ahci(0, &mx6_sabrelite_sata_data); imx6q_add_vpu(); - imx6q_init_audio(); + imx6_init_audio(); platform_device_register(&sabrelite_vmmc_reg_devices); imx_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk"); imx_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_serial_clk"); imx6q_add_asrc(&imx_asrc_data); /* release USB Hub reset */ - gpio_set_value(MX6Q_SABRELITE_USB_HUB_RESET, 1); + gpio_set_value(MX6_SABRELITE_USB_HUB_RESET, 1); imx6q_add_mxc_pwm(0); imx6q_add_mxc_pwm(1); imx6q_add_mxc_pwm(2); imx6q_add_mxc_pwm(3); + imx6q_add_mxc_pwm_backlight(0, &mx6_sabrelite_pwm0_backlight_data); imx6q_add_mxc_pwm_backlight(3, &mx6_sabrelite_pwm_backlight_data); imx6q_add_otp(); @@ -1214,12 +1182,23 @@ static void __init mx6_sabrelite_board_init(void) imx6q_add_hdmi_soc(); imx6q_add_hdmi_soc_dai(); - ret = gpio_request_array(mx6q_sabrelite_flexcan_gpios, - ARRAY_SIZE(mx6q_sabrelite_flexcan_gpios)); - if (ret) + ret = gpio_request_array(mx6_sabrelite_flexcan_gpios, + ARRAY_SIZE(mx6_sabrelite_flexcan_gpios)); + if (ret) { pr_err("failed to request flexcan1-gpios: %d\n", ret); - else - imx6q_add_flexcan0(&mx6q_sabrelite_flexcan0_pdata); + } else { + int ret = gpio_get_value(MX6_SABRELITE_CAN1_ERR); + if (ret == 0) { + imx6q_add_flexcan0(&mx6_sabrelite_flexcan0_tja1040_pdata); + pr_info("Flexcan NXP tja1040\n"); + } else if (ret == 1) { + IOMUX_SETUP(sabrelite_mc33902_flexcan_pads); + imx6q_add_flexcan0(&mx6_sabrelite_flexcan0_mc33902_pdata); + pr_info("Flexcan Freescale mc33902\n"); + } else { + pr_info("Flexcan gpio_get_value CAN1_ERR failed\n"); + } + } clko2 = clk_get(NULL, "clko2_clk"); if (IS_ERR(clko2)) @@ -1235,6 +1214,28 @@ static void __init mx6_sabrelite_board_init(void) clk_enable(clko2); imx6q_add_busfreq(); +#ifdef CONFIG_WL12XX_PLATFORM_DATA + if (isn6) { + imx6q_add_sdhci_usdhc_imx(1, &mx6_sabrelite_sd2_data); + /* WL12xx WLAN Init */ + if (wl12xx_set_platform_data(&n6q_wlan_data)) + pr_err("error setting wl12xx data\n"); + platform_device_register(&n6q_vwl1271_reg_devices); + + gpio_set_value(N6_WL1271_WL_EN, 1); /* momentarily enable */ + gpio_set_value(N6_WL1271_BT_EN, 1); + mdelay(2); + gpio_set_value(N6_WL1271_WL_EN, 0); + gpio_set_value(N6_WL1271_BT_EN, 0); + + gpio_free(N6_WL1271_WL_EN); + gpio_free(N6_WL1271_BT_EN); + mdelay(1); + } +#endif + + imx6q_add_pcie(&pcie_data); + imx6q_add_perfmon(0); imx6q_add_perfmon(1); imx6q_add_perfmon(2); @@ -1258,16 +1259,16 @@ static struct sys_timer mx6_sabrelite_timer = { .init = mx6_sabrelite_timer_init, }; -static void __init mx6q_sabrelite_reserve(void) +static void __init mx6_sabrelite_reserve(void) { #if defined(CONFIG_MXC_GPU_VIV) || defined(CONFIG_MXC_GPU_VIV_MODULE) phys_addr_t phys; - if (imx6q_gpu_pdata.reserved_mem_size) { - phys = memblock_alloc_base(imx6q_gpu_pdata.reserved_mem_size, + if (imx6_gpu_pdata.reserved_mem_size) { + phys = memblock_alloc_base(imx6_gpu_pdata.reserved_mem_size, SZ_4K, SZ_1G); - memblock_remove(phys, imx6q_gpu_pdata.reserved_mem_size); - imx6q_gpu_pdata.reserved_mem_base = phys; + memblock_remove(phys, imx6_gpu_pdata.reserved_mem_size); + imx6_gpu_pdata.reserved_mem_base = phys; } #endif } @@ -1283,5 +1284,5 @@ MACHINE_START(MX6Q_SABRELITE, "Freescale i.MX 6Quad Sabre-Lite Board") .init_irq = mx6_init_irq, .init_machine = mx6_sabrelite_board_init, .timer = &mx6_sabrelite_timer, - .reserve = mx6q_sabrelite_reserve, + .reserve = mx6_sabrelite_reserve, MACHINE_END diff --git a/arch/arm/mach-mx6/pads-mx6_sabrelite.h b/arch/arm/mach-mx6/pads-mx6_sabrelite.h new file mode 100644 index 0000000..63a556f --- /dev/null +++ b/arch/arm/mach-mx6/pads-mx6_sabrelite.h @@ -0,0 +1,348 @@ +#undef MX6PAD +#undef MX6NAME + +#ifdef FOR_DL_SOLO +#define MX6PAD(a) MX6DL_PAD_##a +#define MX6NAME(a) mx6dl_solo_##a +#else +#define MX6PAD(a) MX6Q_PAD_##a +#define MX6NAME(a) mx6q_##a +#endif + +#define MX6Q_USDHC_PAD_CTRL_50MHZ MX6Q_USDHC_PAD_CTRL +#define MX6Q_PAD_SD3_CLK__USDHC3_CLK MX6Q_PAD_SD3_CLK__USDHC3_CLK_50MHZ +#define MX6Q_PAD_SD3_CMD__USDHC3_CMD MX6Q_PAD_SD3_CMD__USDHC3_CMD_50MHZ +#define MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 MX6Q_PAD_SD3_DAT0__USDHC3_DAT0_50MHZ +#define MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 MX6Q_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ +#define MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 MX6Q_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ +#define MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 MX6Q_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ +#define MX6Q_PAD_SD4_CLK__USDHC4_CLK MX6Q_PAD_SD3_CLK__USDHC3_CLK_50MHZ +#define MX6Q_PAD_SD4_CMD__USDHC4_CMD MX6Q_PAD_SD3_CMD__USDHC3_CMD_50MHZ +#define MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 MX6Q_PAD_SD3_DAT0__USDHC3_DAT0_50MHZ +#define MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 MX6Q_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ +#define MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 MX6Q_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ +#define MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 MX6Q_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ + +#define MX6DL_PAD_SD3_CLK__USDHC3_CLK MX6DL_PAD_SD3_CLK__USDHC3_CLK_50MHZ +#define MX6DL_PAD_SD3_CMD__USDHC3_CMD MX6DL_PAD_SD3_CMD__USDHC3_CMD_50MHZ +#define MX6DL_PAD_SD3_DAT0__USDHC3_DAT0 MX6DL_PAD_SD3_DAT0__USDHC3_DAT0_50MHZ +#define MX6DL_PAD_SD3_DAT1__USDHC3_DAT1 MX6DL_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ +#define MX6DL_PAD_SD3_DAT2__USDHC3_DAT2 MX6DL_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ +#define MX6DL_PAD_SD3_DAT3__USDHC3_DAT3 MX6DL_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ +#define MX6DL_PAD_SD4_CLK__USDHC4_CLK MX6DL_PAD_SD3_CLK__USDHC3_CLK_50MHZ +#define MX6DL_PAD_SD4_CMD__USDHC4_CMD MX6DL_PAD_SD3_CMD__USDHC3_CMD_50MHZ +#define MX6DL_PAD_SD4_DAT0__USDHC4_DAT0 MX6DL_PAD_SD3_DAT0__USDHC3_DAT0_50MHZ +#define MX6DL_PAD_SD4_DAT1__USDHC4_DAT1 MX6DL_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ +#define MX6DL_PAD_SD4_DAT2__USDHC4_DAT2 MX6DL_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ +#define MX6DL_PAD_SD4_DAT3__USDHC4_DAT3 MX6DL_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ + +#define NP(id, speed, pin) \ + NEW_PAD_CTRL(MX6PAD(SD##id##_##pin##__USDHC##id##_##pin), \ + MX6Q_USDHC_PAD_CTRL_##speed##MHZ) + +#define SD_PINS(id, speed) \ + NP(id, speed, CLK), \ + NP(id, speed, CMD), \ + NP(id, speed, DAT0), \ + NP(id, speed, DAT1), \ + NP(id, speed, DAT2), \ + NP(id, speed, DAT3) + +static iomux_v3_cfg_t MX6NAME(nitrogen6x_pads)[] = { + /* AUDMUX */ + MX6PAD(CSI0_DAT7__AUDMUX_AUD3_RXD), + MX6PAD(CSI0_DAT4__AUDMUX_AUD3_TXC), + MX6PAD(CSI0_DAT5__AUDMUX_AUD3_TXD), + MX6PAD(CSI0_DAT6__AUDMUX_AUD3_TXFS), + + NEW_PAD_CTRL(MX6PAD(NANDF_CS1__GPIO_6_14), N6_IRQ_PADCFG), /* wl1271 wl_irq */ + + /* USDHC2 */ + SD_PINS(2, 50), + MX6PAD(SD1_CLK__OSC32K_32K_OUT), /* wl1271 clock */ + + /* UART3 for wl1271 */ + MX6PAD(EIM_D24__UART3_TXD), + MX6PAD(EIM_D25__UART3_RXD), + MX6PAD(EIM_D23__UART3_CTS), + MX6PAD(EIM_D31__UART3_RTS), + 0 +}; + +static iomux_v3_cfg_t MX6NAME(sabrelite_pads)[] = { + /* AUDMUX */ + MX6PAD(SD2_DAT0__AUDMUX_AUD4_RXD), + MX6PAD(SD2_DAT3__AUDMUX_AUD4_TXC), + MX6PAD(SD2_DAT2__AUDMUX_AUD4_TXD), + MX6PAD(SD2_DAT1__AUDMUX_AUD4_TXFS), + 0 +}; + +static iomux_v3_cfg_t MX6NAME(common_pads)[] = { + /* CAN1 */ + MX6PAD(KEY_ROW2__CAN1_RXCAN), + MX6PAD(KEY_COL2__CAN1_TXCAN), + MX6PAD(GPIO_2__GPIO_1_2), /* STNDBY */ + MX6PAD(GPIO_7__GPIO_1_7), /* NERR */ + NEW_PAD_CTRL(MX6PAD(GPIO_7__GPIO_1_7), MX6_SABRELITE_CAN1_ERR_TEST_PADCFG), + MX6PAD(GPIO_4__GPIO_1_4), /* Enable */ + + /* CCM */ + MX6PAD(GPIO_0__CCM_CLKO), /* SGTL500 sys_mclk */ + MX6PAD(GPIO_3__CCM_CLKO2), /* J5 - Camera MCLK */ + + /* ECSPI1 */ + MX6PAD(EIM_D17__ECSPI1_MISO), + MX6PAD(EIM_D18__ECSPI1_MOSI), + MX6PAD(EIM_D16__ECSPI1_SCLK), + MX6PAD(EIM_D19__GPIO_3_19), /*SS1*/ + + /* ENET */ + MX6PAD(ENET_MDIO__ENET_MDIO), + MX6PAD(ENET_MDC__ENET_MDC), + MX6PAD(RGMII_TXC__ENET_RGMII_TXC), + MX6PAD(RGMII_TD0__ENET_RGMII_TD0), + MX6PAD(RGMII_TD1__ENET_RGMII_TD1), + MX6PAD(RGMII_TD2__ENET_RGMII_TD2), + MX6PAD(RGMII_TD3__ENET_RGMII_TD3), + MX6PAD(RGMII_TX_CTL__ENET_RGMII_TX_CTL), + MX6PAD(ENET_REF_CLK__ENET_TX_CLK), + MX6PAD(RGMII_RXC__ENET_RGMII_RXC), + MX6PAD(RGMII_RD0__ENET_RGMII_RD0), + MX6PAD(RGMII_RD1__ENET_RGMII_RD1), + MX6PAD(RGMII_RD2__ENET_RGMII_RD2), + MX6PAD(RGMII_RD3__ENET_RGMII_RD3), + MX6PAD(RGMII_RX_CTL__ENET_RGMII_RX_CTL), + MX6PAD(ENET_TX_EN__GPIO_1_28), /* Micrel RGMII Phy Interrupt */ + + /* GPIO1 */ + MX6PAD(ENET_RX_ER__GPIO_1_24), /* J9 - Microphone Detect */ + + /* GPIO2 */ + MX6PAD(NANDF_D1__GPIO_2_1), /* J14 - Menu Button */ + MX6PAD(NANDF_D2__GPIO_2_2), /* J14 - Back Button */ + MX6PAD(NANDF_D3__GPIO_2_3), /* J14 - Search Button */ + MX6PAD(NANDF_D4__GPIO_2_4), /* J14 - Home Button */ + MX6PAD(EIM_A22__GPIO_2_16), /* J12 - Boot Mode Select */ + MX6PAD(EIM_A21__GPIO_2_17), /* J12 - Boot Mode Select */ + MX6PAD(EIM_A20__GPIO_2_18), /* J12 - Boot Mode Select */ + MX6PAD(EIM_A19__GPIO_2_19), /* J12 - Boot Mode Select */ + MX6PAD(EIM_A18__GPIO_2_20), /* J12 - Boot Mode Select */ + MX6PAD(EIM_A17__GPIO_2_21), /* J12 - Boot Mode Select */ + MX6PAD(EIM_A16__GPIO_2_22), /* J12 - Boot Mode Select */ + MX6PAD(EIM_RW__GPIO_2_26), /* J12 - Boot Mode Select */ + MX6PAD(EIM_LBA__GPIO_2_27), /* J12 - Boot Mode Select */ + MX6PAD(EIM_EB0__GPIO_2_28), /* J12 - Boot Mode Select */ + MX6PAD(EIM_EB1__GPIO_2_29), /* J12 - Boot Mode Select */ + MX6PAD(EIM_EB3__GPIO_2_31), /* J12 - Boot Mode Select */ + + /* GPIO3 */ + MX6PAD(EIM_DA0__GPIO_3_0), /* J12 - Boot Mode Select */ + MX6PAD(EIM_DA1__GPIO_3_1), /* J12 - Boot Mode Select */ + MX6PAD(EIM_DA2__GPIO_3_2), /* J12 - Boot Mode Select */ + MX6PAD(EIM_DA3__GPIO_3_3), /* J12 - Boot Mode Select */ + MX6PAD(EIM_DA4__GPIO_3_4), /* J12 - Boot Mode Select */ + MX6PAD(EIM_DA5__GPIO_3_5), /* J12 - Boot Mode Select */ + MX6PAD(EIM_DA6__GPIO_3_6), /* J12 - Boot Mode Select */ + MX6PAD(EIM_DA7__GPIO_3_7), /* J12 - Boot Mode Select */ + MX6PAD(EIM_DA8__GPIO_3_8), /* J12 - Boot Mode Select */ + MX6PAD(EIM_DA9__GPIO_3_9), /* J12 - Boot Mode Select */ + MX6PAD(EIM_DA10__GPIO_3_10), /* J12 - Boot Mode Select */ + MX6PAD(EIM_DA11__GPIO_3_11), /* J12 - Boot Mode Select */ + MX6PAD(EIM_DA12__GPIO_3_12), /* J12 - Boot Mode Select */ + MX6PAD(EIM_DA13__GPIO_3_13), /* J12 - Boot Mode Select */ + MX6PAD(EIM_DA14__GPIO_3_14), /* J12 - Boot Mode Select */ + MX6PAD(EIM_DA15__GPIO_3_15), /* J12 - Boot Mode Select */ + + /* GPIO4 */ + MX6PAD(GPIO_19__GPIO_4_5), /* J14 - Volume Down */ + + /* GPIO5 */ + MX6PAD(EIM_WAIT__GPIO_5_0), /* J12 - Boot Mode Select */ + MX6PAD(EIM_A24__GPIO_5_4), /* J12 - Boot Mode Select */ + + /* GPIO6 */ + MX6PAD(EIM_A23__GPIO_6_6), /* J12 - Boot Mode Select */ + + /* NANDF_CS1/2/3 are unused for sabrelite */ + NEW_PAD_CTRL(MX6PAD(NANDF_CS1__GPIO_6_14), N6_IRQ_TEST_PADCFG), /* wl1271 wl_irq */ + NEW_PAD_CTRL(MX6PAD(NANDF_CS2__GPIO_6_15), N6_EN_PADCFG), /* wl1271 wl_en */ + NEW_PAD_CTRL(MX6PAD(NANDF_CS3__GPIO_6_16), N6_EN_PADCFG), /* wl1271 bt_en */ + + /* GPIO7 */ + MX6PAD(GPIO_17__GPIO_7_12), /* USB Hub Reset */ + MX6PAD(GPIO_18__GPIO_7_13), /* J14 - Volume Up */ + + /* I2C1, SGTL5000 */ + MX6PAD(EIM_D21__I2C1_SCL), /* GPIO3[21] */ + MX6PAD(EIM_D28__I2C1_SDA), /* GPIO3[28] */ + + /* I2C2 Camera, MIPI */ + MX6PAD(KEY_COL3__I2C2_SCL), /* GPIO4[12] */ + MX6PAD(KEY_ROW3__I2C2_SDA), /* GPIO4[13] */ + + /* I2C3 */ + MX6PAD(GPIO_5__I2C3_SCL), /* GPIO1[5] - J7 - Display card */ +#ifdef CONFIG_FEC_1588 + MX6PAD(GPIO_16__ENET_ANATOP_ETHERNET_REF_OUT), +#else + MX6PAD(GPIO_16__I2C3_SDA), /* GPIO7[11] - J15 - RGB connector */ +#endif + + /* DISPLAY */ + MX6PAD(DI0_DISP_CLK__IPU1_DI0_DISP_CLK), + MX6PAD(DI0_PIN15__IPU1_DI0_PIN15), /* DE */ + MX6PAD(DI0_PIN2__IPU1_DI0_PIN2), /* HSync */ + MX6PAD(DI0_PIN3__IPU1_DI0_PIN3), /* VSync */ + NEW_PAD_CTRL(MX6PAD(DI0_PIN4__GPIO_4_20), + WEAK_PULLUP), /* I2C Touch IRQ */ + MX6PAD(DISP0_DAT0__IPU1_DISP0_DAT_0), + MX6PAD(DISP0_DAT1__IPU1_DISP0_DAT_1), + MX6PAD(DISP0_DAT2__IPU1_DISP0_DAT_2), + MX6PAD(DISP0_DAT3__IPU1_DISP0_DAT_3), + MX6PAD(DISP0_DAT4__IPU1_DISP0_DAT_4), + MX6PAD(DISP0_DAT5__IPU1_DISP0_DAT_5), + MX6PAD(DISP0_DAT6__IPU1_DISP0_DAT_6), + MX6PAD(DISP0_DAT7__IPU1_DISP0_DAT_7), + MX6PAD(DISP0_DAT8__IPU1_DISP0_DAT_8), + MX6PAD(DISP0_DAT9__IPU1_DISP0_DAT_9), + MX6PAD(DISP0_DAT10__IPU1_DISP0_DAT_10), + MX6PAD(DISP0_DAT11__IPU1_DISP0_DAT_11), + MX6PAD(DISP0_DAT12__IPU1_DISP0_DAT_12), + MX6PAD(DISP0_DAT13__IPU1_DISP0_DAT_13), + MX6PAD(DISP0_DAT14__IPU1_DISP0_DAT_14), + MX6PAD(DISP0_DAT15__IPU1_DISP0_DAT_15), + MX6PAD(DISP0_DAT16__IPU1_DISP0_DAT_16), + MX6PAD(DISP0_DAT17__IPU1_DISP0_DAT_17), + MX6PAD(DISP0_DAT18__IPU1_DISP0_DAT_18), + MX6PAD(DISP0_DAT19__IPU1_DISP0_DAT_19), + MX6PAD(DISP0_DAT20__IPU1_DISP0_DAT_20), + MX6PAD(DISP0_DAT21__IPU1_DISP0_DAT_21), + MX6PAD(DISP0_DAT22__IPU1_DISP0_DAT_22), + MX6PAD(DISP0_DAT23__IPU1_DISP0_DAT_23), + MX6PAD(GPIO_7__GPIO_1_7), /* J7 - Display Connector GP */ + MX6PAD(GPIO_9__GPIO_1_9), /* J7 - Display Connector GP */ + MX6PAD(NANDF_D0__GPIO_2_0), /* J6 - LVDS Display contrast */ + + + /* PWM1 */ + MX6PAD(SD1_DAT3__PWM1_PWMO), /* GPIO1[21] */ + + /* PWM2 */ + MX6PAD(SD1_DAT2__PWM2_PWMO), /* GPIO1[19] */ + + /* PWM3 */ + MX6PAD(SD1_DAT1__PWM3_PWMO), /* GPIO1[17] */ + + /* PWM4 */ + MX6PAD(SD1_CMD__PWM4_PWMO), /* GPIO1[18] */ + + /* UART1 */ + MX6PAD(SD3_DAT7__UART1_TXD), + MX6PAD(SD3_DAT6__UART1_RXD), + + /* UART2 for debug */ + MX6PAD(EIM_D26__UART2_TXD), + MX6PAD(EIM_D27__UART2_RXD), + + /* USBOTG ID pin */ + MX6PAD(GPIO_1__USBOTG_ID), + + /* USB OC pin */ + MX6PAD(KEY_COL4__USBOH3_USBOTG_OC), + MX6PAD(EIM_D30__USBOH3_USBH1_OC), + + /* USDHC3 */ + SD_PINS(3, 50), + MX6PAD(SD3_DAT5__GPIO_7_0), /* J18 - SD3_CD */ + NEW_PAD_CTRL(MX6PAD(SD3_DAT4__GPIO_7_1), MX6_SABRELITE_SD3_WP_PADCFG), + + /* USDHC4 */ + SD_PINS(4, 50), + MX6PAD(NANDF_D6__GPIO_2_6), /* J20 - SD4_CD */ + MX6PAD(NANDF_D7__GPIO_2_7), /* SD4_WP */ + 0 +}; + +#if defined(CONFIG_MXC_CAMERA_OV5640_MIPI) || defined(CONFIG_MXC_CAMERA_OV5640_MIPI_MODULE) +static iomux_v3_cfg_t MX6NAME(sabrelite_mipi_pads)[] = { + MX6PAD(NANDF_D5__GPIO_2_5), /* Camera Reset, Nitrogen6x */ + MX6PAD(NANDF_CS0__GPIO_6_11), /* Camera Reset, SOM jumpered */ + MX6PAD(GPIO_6__GPIO_1_6), /* Camera GP */ + 0 +}; +#else +static iomux_v3_cfg_t MX6NAME(sabrelite_csi0_sensor_pads)[] = { + /* IPU1 Camera */ + MX6PAD(CSI0_DAT8__IPU1_CSI0_D_8), + MX6PAD(CSI0_DAT9__IPU1_CSI0_D_9), + MX6PAD(CSI0_DAT10__IPU1_CSI0_D_10), + MX6PAD(CSI0_DAT11__IPU1_CSI0_D_11), + MX6PAD(CSI0_DAT12__IPU1_CSI0_D_12), + MX6PAD(CSI0_DAT13__IPU1_CSI0_D_13), + MX6PAD(CSI0_DAT14__IPU1_CSI0_D_14), + MX6PAD(CSI0_DAT15__IPU1_CSI0_D_15), + MX6PAD(CSI0_DAT16__IPU1_CSI0_D_16), + MX6PAD(CSI0_DAT17__IPU1_CSI0_D_17), + MX6PAD(CSI0_DAT18__IPU1_CSI0_D_18), + MX6PAD(CSI0_DAT19__IPU1_CSI0_D_19), + MX6PAD(CSI0_DATA_EN__IPU1_CSI0_DATA_EN), + MX6PAD(CSI0_MCLK__IPU1_CSI0_HSYNC), + MX6PAD(CSI0_PIXCLK__IPU1_CSI0_PIXCLK), + MX6PAD(CSI0_VSYNC__IPU1_CSI0_VSYNC), + MX6PAD(GPIO_6__GPIO_1_6), /* J5 - Camera GP */ + MX6PAD(GPIO_8__GPIO_1_8), /* J5 - Camera Reset */ + MX6PAD(NANDF_CS0__GPIO_6_11), /* J5 - Camera Reset */ + MX6PAD(SD1_DAT0__GPIO_1_16), /* J5 - Camera GP */ + MX6PAD(NANDF_D5__GPIO_2_5), /* J16 - MIPI GP */ + MX6PAD(NANDF_WP_B__GPIO_6_9), /* J16 - MIPI GP */ + 0 +}; +#endif + +static iomux_v3_cfg_t MX6NAME(sabrelite_hdmi_ddc_pads)[] = { + MX6PAD(KEY_COL3__HDMI_TX_DDC_SCL), /* HDMI DDC SCL */ + MX6PAD(KEY_ROW3__HDMI_TX_DDC_SDA), /* HDMI DDC SDA */ + 0 +}; + +static iomux_v3_cfg_t MX6NAME(sabrelite_i2c2_pads)[] = { + MX6PAD(KEY_COL3__I2C2_SCL), /* I2C2 SCL */ + MX6PAD(KEY_ROW3__I2C2_SDA), /* I2C2 SDA */ + 0 +}; + +static iomux_v3_cfg_t MX6NAME(sabrelite_mc33902_flexcan_pads)[] = { + NEW_PAD_CTRL(MX6PAD(GPIO_7__GPIO_1_7), MX6_SABRELITE_CAN1_ERR_PADCFG), + 0 +}; + +#define MX6_USDHC_PAD_SETTING(id, speed) \ + MX6NAME(sd##id##_##speed##mhz)[] = { SD_PINS(id, speed), 0 } + +static iomux_v3_cfg_t MX6_USDHC_PAD_SETTING(2, 50); +static iomux_v3_cfg_t MX6_USDHC_PAD_SETTING(2, 100); +static iomux_v3_cfg_t MX6_USDHC_PAD_SETTING(2, 200); +static iomux_v3_cfg_t MX6_USDHC_PAD_SETTING(3, 50); +static iomux_v3_cfg_t MX6_USDHC_PAD_SETTING(3, 100); +static iomux_v3_cfg_t MX6_USDHC_PAD_SETTING(3, 200); +static iomux_v3_cfg_t MX6_USDHC_PAD_SETTING(4, 50); +static iomux_v3_cfg_t MX6_USDHC_PAD_SETTING(4, 100); +static iomux_v3_cfg_t MX6_USDHC_PAD_SETTING(4, 200); + +#define _50MHZ 0 +#define _100MHZ 1 +#define _200MHZ 2 +#define SD_SPEED_CNT 3 +static iomux_v3_cfg_t * MX6NAME(sd_pads)[] = +{ + MX6NAME(sd2_50mhz), + MX6NAME(sd2_100mhz), + MX6NAME(sd2_200mhz), + MX6NAME(sd3_50mhz), + MX6NAME(sd3_100mhz), + MX6NAME(sd3_200mhz), + MX6NAME(sd4_50mhz), + MX6NAME(sd4_100mhz), + MX6NAME(sd4_200mhz), +}; diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/clock.c b/arch/arm/plat-mxc/clock.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/cpu.c b/arch/arm/plat-mxc/cpu.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/devices/platform-ahci-imx.c b/arch/arm/plat-mxc/devices/platform-ahci-imx.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/devices/platform-imx-dcp.c b/arch/arm/plat-mxc/devices/platform-imx-dcp.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/devices/platform-imx-i2c.c b/arch/arm/plat-mxc/devices/platform-imx-i2c.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/devices/platform-imx-iim.c b/arch/arm/plat-mxc/devices/platform-imx-iim.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/devices/platform-imx-ocotp.c b/arch/arm/plat-mxc/devices/platform-imx-ocotp.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/devices/platform-imx-rngb.c b/arch/arm/plat-mxc/devices/platform-imx-rngb.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/devices/platform-imx-ssi.c b/arch/arm/plat-mxc/devices/platform-imx-ssi.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/devices/platform-imx_dvfs.c b/arch/arm/plat-mxc/devices/platform-imx_dvfs.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/devices/platform-imx_ipuv3.c b/arch/arm/plat-mxc/devices/platform-imx_ipuv3.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/devices/platform-imx_srtc.c b/arch/arm/plat-mxc/devices/platform-imx_srtc.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/devices/platform-imx_tve.c b/arch/arm/plat-mxc/devices/platform-imx_tve.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/devices/platform-imx_vpu.c b/arch/arm/plat-mxc/devices/platform-imx_vpu.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/devices/platform-mxc_gpu.c b/arch/arm/plat-mxc/devices/platform-mxc_gpu.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c b/arch/arm/plat-mxc/devices/platform-mxc_pwm.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c b/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/dvfs_core.c b/arch/arm/plat-mxc/dvfs_core.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/dvfs_per.c b/arch/arm/plat-mxc/dvfs_per.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/ahci_sata.h b/arch/arm/plat-mxc/include/mach/ahci_sata.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/arc_otg.h b/arch/arm/plat-mxc/include/mach/arc_otg.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/clock.h b/arch/arm/plat-mxc/include/mach/clock.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/dvfs_dptc_struct.h b/arch/arm/plat-mxc/include/mach/dvfs_dptc_struct.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/esdhc.h b/arch/arm/plat-mxc/include/mach/esdhc.h index bb15db1..294e4cd 100644 --- a/arch/arm/plat-mxc/include/mach/esdhc.h +++ b/arch/arm/plat-mxc/include/mach/esdhc.h @@ -34,6 +34,7 @@ struct esdhc_platform_data { unsigned int support_18v; unsigned int support_8bit; unsigned int keep_power_at_suspend; + unsigned int caps; unsigned int delay_line; int (*platform_pad_change)(unsigned int index, int clock); }; diff --git a/arch/arm/plat-mxc/include/mach/fsl_usb.h b/arch/arm/plat-mxc/include/mach/fsl_usb.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/fsl_usb_gadget.h b/arch/arm/plat-mxc/include/mach/fsl_usb_gadget.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/imx_rfkill.h b/arch/arm/plat-mxc/include/mach/imx_rfkill.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx53.h b/arch/arm/plat-mxc/include/mach/iomux-mx53.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx6q.h b/arch/arm/plat-mxc/include/mach/iomux-mx6q.h index 9226af1..83f2881 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx6q.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx6q.h @@ -2909,6 +2909,24 @@ #define _MX6Q_PAD_TEST_MODE__TCU_TEST_MODE \ IOMUX_PAD(NO_PAD_I, NO_MUX_I, 0, 0x0000, 0, 0) +#define _MX6Q_PAD_SD2_CMD__USDHC3_CMD \ + IOMUX_PAD(0x06A0, 0x02B8, 0 | IOMUX_CONFIG_SION, 0x0000, 0, 0) + +#define _MX6Q_PAD_SD2_CLK__USDHC3_CLK \ + IOMUX_PAD(0x06A4, 0x02BC, 0, 0x0000, 0, 0) + +#define _MX6Q_PAD_SD2_DAT0__USDHC3_DAT0 \ + IOMUX_PAD(0x06A8, 0x02C0, 0, 0x0000, 0, 0) + +#define _MX6Q_PAD_SD2_DAT1__USDHC3_DAT1 \ + IOMUX_PAD(0x06AC, 0x02C4, 0, 0x0000, 0, 0) + +#define _MX6Q_PAD_SD2_DAT2__USDHC3_DAT2 \ + IOMUX_PAD(0x06B0, 0x02C8, 0, 0x0000, 0, 0) + +#define _MX6Q_PAD_SD2_DAT3__USDHC3_DAT3 \ + IOMUX_PAD(0x06B4, 0x02CC, 0, 0x0000, 0, 0) + #define _MX6Q_PAD_SD3_DAT7__USDHC3_DAT7 \ IOMUX_PAD(0x0690, 0x02A8, 0, 0x0000, 0, 0) #define _MX6Q_PAD_SD3_DAT7__UART1_TXD \ @@ -6517,6 +6535,48 @@ #define MX6Q_PAD_TEST_MODE__TCU_TEST_MODE \ (_MX6Q_PAD_TEST_MODE__TCU_TEST_MODE | MUX_PAD_CTRL(NO_PAD_CTRL)) +#define MX6Q_PAD_SD2_CMD__USDHC2_CMD_50MHZ \ + (_MX6Q_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL)) +#define MX6Q_PAD_SD2_CMD__USDHC2_CMD_100MHZ \ + (_MX6Q_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_100MHZ)) +#define MX6Q_PAD_SD2_CMD__USDHC2_CMD_200MHZ \ + (_MX6Q_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_200MHZ)) + +#define MX6Q_PAD_SD2_CLK__USDHC2_CLK_50MHZ \ + (_MX6Q_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL)) +#define MX6Q_PAD_SD2_CLK__USDHC2_CLK_100MHZ \ + (_MX6Q_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_100MHZ)) +#define MX6Q_PAD_SD2_CLK__USDHC2_CLK_200MHZ \ + (_MX6Q_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_200MHZ)) + +#define MX6Q_PAD_SD2_DAT0__USDHC2_DAT0_50MHZ \ + (_MX6Q_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL)) +#define MX6Q_PAD_SD2_DAT0__USDHC2_DAT0_100MHZ \ + (_MX6Q_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_100MHZ)) +#define MX6Q_PAD_SD2_DAT0__USDHC2_DAT0_200MHZ \ + (_MX6Q_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_200MHZ)) + +#define MX6Q_PAD_SD2_DAT1__USDHC2_DAT1_50MHZ \ + (_MX6Q_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL)) +#define MX6Q_PAD_SD2_DAT1__USDHC2_DAT1_100MHZ \ + (_MX6Q_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_100MHZ)) +#define MX6Q_PAD_SD2_DAT1__USDHC2_DAT1_200MHZ \ + (_MX6Q_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_200MHZ)) + +#define MX6Q_PAD_SD2_DAT2__USDHC2_DAT2_50MHZ \ + (_MX6Q_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL)) +#define MX6Q_PAD_SD2_DAT2__USDHC2_DAT2_100MHZ \ + (_MX6Q_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_100MHZ)) +#define MX6Q_PAD_SD2_DAT2__USDHC2_DAT2_200MHZ \ + (_MX6Q_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_200MHZ)) + +#define MX6Q_PAD_SD2_DAT3__USDHC2_DAT3_50MHZ \ + (_MX6Q_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL)) +#define MX6Q_PAD_SD2_DAT3__USDHC2_DAT3_100MHZ \ + (_MX6Q_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_100MHZ)) +#define MX6Q_PAD_SD2_DAT3__USDHC2_DAT3_200MHZ \ + (_MX6Q_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_200MHZ)) + #define MX6Q_PAD_SD3_DAT7__USDHC3_DAT7_50MHZ \ (_MX6Q_PAD_SD3_DAT7__USDHC3_DAT7 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL)) #define MX6Q_PAD_SD3_DAT7__USDHC3_DAT7_100MHZ \ diff --git a/arch/arm/plat-mxc/include/mach/ipu-v3.h b/arch/arm/plat-mxc/include/mach/ipu-v3.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/mx50.h b/arch/arm/plat-mxc/include/mach/mx50.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/mxc91231.h b/arch/arm/plat-mxc/include/mach/mxc91231.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/mxc_dvfs.h b/arch/arm/plat-mxc/include/mach/mxc_dvfs.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/mxc_edid.h b/arch/arm/plat-mxc/include/mach/mxc_edid.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/mxc_vpu.h b/arch/arm/plat-mxc/include/mach/mxc_vpu.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/sdram_autogating.h b/arch/arm/plat-mxc/include/mach/sdram_autogating.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/isp1504xc.c b/arch/arm/plat-mxc/isp1504xc.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/serialxc.c b/arch/arm/plat-mxc/serialxc.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/usb_common.c b/arch/arm/plat-mxc/usb_common.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/usb_wakeup.c b/arch/arm/plat-mxc/usb_wakeup.c old mode 100755 new mode 100644 diff --git a/arch/arm/plat-mxc/utmixc.c b/arch/arm/plat-mxc/utmixc.c old mode 100755 new mode 100644 diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper old mode 100755 new mode 100644 diff --git a/drivers/char/fsl_otp.c b/drivers/char/fsl_otp.c old mode 100755 new mode 100644 diff --git a/drivers/char/fsl_otp.h b/drivers/char/fsl_otp.h old mode 100755 new mode 100644 diff --git a/drivers/char/regs-ocotp-v2.h b/drivers/char/regs-ocotp-v2.h old mode 100755 new mode 100644 diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig old mode 100755 new mode 100644 diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile old mode 100755 new mode 100644 diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig old mode 100755 new mode 100644 diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile old mode 100755 new mode 100644 diff --git a/drivers/hwmon/da9052-adc.c b/drivers/hwmon/da9052-adc.c old mode 100755 new mode 100644 diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig old mode 100755 new mode 100644 diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile old mode 100755 new mode 100644 diff --git a/drivers/input/misc/isl29023.c b/drivers/input/misc/isl29023.c old mode 100755 new mode 100644 diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig old mode 100755 new mode 100644 index 7cf975a..a2589e4 --- a/drivers/input/touchscreen/Kconfig +++ b/drivers/input/touchscreen/Kconfig @@ -282,6 +292,22 @@ config TOUCHSCREEN_MAX11801 To compile this driver as a module, choose M here: the module will be called max11801_ts. +config TOUCHSCREEN_FT5X06 + tristate "Focaltech FT5X06 5 point touchscreen" + select I2C + help + If you say yes here you get touchscreen support through + FocalTech's FT5X06 controller. + +config TOUCHSCREEN_FT5X06_SINGLE_TOUCH + bool "FT5X06 touchscreen as single-touch" + default N + depends on TOUCHSCREEN_FT5X06 + help + If you say yes here you get single-touch touchscreen support + on the FT5X06 I2C controller. + If you say "no", you'll get the normal 5-finger goodness. + config TOUCHSCREEN_MCS5000 tristate "MELFAS MCS-5000 touchscreen" depends on I2C @@ -695,6 +721,17 @@ config TOUCHSCREEN_TSC2007 To compile this driver as a module, choose M here: the module will be called tsc2007. +config TOUCHSCREEN_TSC2004 + tristate "TSC2004 based touchscreens" + depends on I2C + help + Say Y here if you have a TSC2004 based touchscreen. + + If unsure, say N. + + To compile this driver as a module, choose M here: the + module will be called tsc2004. + config TOUCHSCREEN_W90X900 tristate "W90P910 touchscreen driver" depends on HAVE_CLK diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile old mode 100755 new mode 100644 index e614512..eac3453 --- a/drivers/input/touchscreen/Makefile +++ b/drivers/input/touchscreen/Makefile @@ -49,6 +49,7 @@ obj-$(CONFIG_TOUCHSCREEN_TOUCHRIGHT) += touchright.o obj-$(CONFIG_TOUCHSCREEN_TOUCHWIN) += touchwin.o obj-$(CONFIG_TOUCHSCREEN_TSC2005) += tsc2005.o obj-$(CONFIG_TOUCHSCREEN_TSC2007) += tsc2007.o +obj-$(CONFIG_TOUCHSCREEN_TSC2004) += tsc2004.o obj-$(CONFIG_TOUCHSCREEN_UCB1400) += ucb1400_ts.o obj-$(CONFIG_TOUCHSCREEN_WACOM_W8001) += wacom_w8001.o obj-$(CONFIG_TOUCHSCREEN_WM831X) += wm831x-ts.o @@ -64,4 +65,5 @@ obj-$(CONFIG_TOUCHSCREEN_P1003) += p1003_ts.o obj-$(CONFIG_TOUCHSCREEN_TPS6507X) += tps6507x-ts.o obj-$(CONFIG_TOUCHSCREEN_MAX11801) += max11801_ts.o obj-$(CONFIG_TOUCHSCREEN_EGALAX) += egalax_ts.o +obj-$(CONFIG_TOUCHSCREEN_FT5X06) += ft5x06_ts.o obj-$(CONFIG_TOUCHSCREEN_ELAN) += elan_ts.o diff --git a/drivers/input/touchscreen/da9052_tsi_filter.c b/drivers/input/touchscreen/da9052_tsi_filter.c old mode 100755 new mode 100644 diff --git a/drivers/input/touchscreen/ft5x06_ts.c b/drivers/input/touchscreen/ft5x06_ts.c new file mode 100644 index 0000000..89b5726 --- /dev/null +++ b/drivers/input/touchscreen/ft5x06_ts.c @@ -0,0 +1,572 @@ +/* + * Boundary Devices FTx06 touch screen controller. + * + * Copyright (c) by Boundary Devices + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_TOUCHSCREEN_FT5X06_SINGLE_TOUCH +#else +#define USE_ABS_MT +#endif + +struct point { + int x; + int y; +}; + +struct ft5x06_ts { + struct i2c_client *client; + struct input_dev *idev; + wait_queue_head_t sample_waitq; + struct semaphore sem; + struct completion init_exit; + struct task_struct *rtask; + int use_count; + int bReady; + int irq; + unsigned gp; + struct proc_dir_entry *procentry; +}; +static const char *client_name = "ft5x06"; + +struct ft5x06_ts *gts; + +static char const procentryname[] = { + "ft5x06" +}; + +static int ts_startup(struct ft5x06_ts *ts); +static void ts_shutdown(struct ft5x06_ts *ts); + +static int ft5x06_proc_read + (char *page, + char **start, + off_t off, + int count, + int *eof, + void *data) +{ + printk(KERN_ERR "%s\n", __func__); + return 0 ; +} + +static int +ft5x06_proc_write + (struct file *file, + const char __user *buffer, + unsigned long count, + void *data) +{ + printk(KERN_ERR "%s\n", __func__); + return count ; +} + +/*-----------------------------------------------------------------------*/ +static inline void ts_evt_add(struct ft5x06_ts *ts, + unsigned buttons, struct point *p) +{ + struct input_dev *idev = ts->idev; + int i; + if (!buttons) { + /* send release to user space. */ +#ifdef USE_ABS_MT + input_event(idev, EV_ABS, ABS_MT_TOUCH_MAJOR, 0); + input_event(idev, EV_KEY, BTN_TOUCH, 0); + input_mt_sync(idev); +#else + input_report_abs(idev, ABS_PRESSURE, 0); + input_report_key(idev, BTN_TOUCH, 0); + input_sync(idev); +#endif + } else { + for (i = 0; i < buttons; i++) { +#ifdef USE_ABS_MT + input_event(idev, EV_ABS, ABS_MT_POSITION_X, p[i].x); + input_event(idev, EV_ABS, ABS_MT_POSITION_Y, p[i].y); + input_event(idev, EV_ABS, ABS_MT_TOUCH_MAJOR, 1); + input_mt_sync(idev); +#else + input_report_abs(idev, ABS_X, p[i].x); + input_report_abs(idev, ABS_Y, p[i].y); + input_report_abs(idev, ABS_PRESSURE, 1); + input_report_key(idev, BTN_TOUCH, 1); + input_sync(idev); +#endif + } + input_event(idev, EV_KEY, BTN_TOUCH, 1); + } +#ifdef USE_ABS_MT + input_sync(idev); +#endif +} + +static int ts_open(struct input_dev *idev) +{ + struct ft5x06_ts *ts = input_get_drvdata(idev); + return ts_startup(ts); +} + +static void ts_close(struct input_dev *idev) +{ + struct ft5x06_ts *ts = input_get_drvdata(idev); + ts_shutdown(ts); +} + +static inline int ts_register(struct ft5x06_ts *ts) +{ + struct input_dev *idev; + idev = input_allocate_device(); + if (idev == NULL) + return -ENOMEM; + + ts->idev = idev; + idev->name = procentryname ; + idev->id.product = ts->client->addr; + idev->open = ts_open; + idev->close = ts_close; + + __set_bit(EV_ABS, idev->evbit); + __set_bit(EV_KEY, idev->evbit); + __set_bit(BTN_TOUCH, idev->keybit); + +#ifdef USE_ABS_MT + input_set_abs_params(idev, ABS_MT_POSITION_X, 0, 1023, 0, 0); + input_set_abs_params(idev, ABS_MT_POSITION_Y, 0, 0x255, 0, 0); + input_set_abs_params(idev, ABS_MT_TOUCH_MAJOR, 0, 1, 0, 0); +#else + __set_bit(EV_SYN, idev->evbit); + input_set_abs_params(idev, ABS_X, 0, 1023, 0, 0); + input_set_abs_params(idev, ABS_Y, 0, 0x255, 0, 0); + input_set_abs_params(idev, ABS_PRESSURE, 0, 1, 0, 0); +#endif + + input_set_drvdata(idev, ts); + return input_register_device(idev); +} + +static inline void ts_deregister(struct ft5x06_ts *ts) +{ + if (ts->idev) { + input_unregister_device(ts->idev); + input_free_device(ts->idev); + ts->idev = NULL; + } +} + +#ifdef DEBUG +static void printHex(u8 const *buf, unsigned len) +{ + char hex[512]; + char *next = hex ; + char *end = hex+sizeof(hex); + + while (len--) { + next += snprintf(next, end-next, "%02x", *buf++); + if (next >= end) { + hex[sizeof(hex)-1] = '\0' ; + break; + } + } + printk(KERN_ERR "%s\n", hex); +} +#endif + +static void write_reg(struct ft5x06_ts *ts, int regnum, int value) +{ + u8 regnval[] = { + regnum, + value + }; + struct i2c_msg pkt = { + ts->client->addr, 0, sizeof(regnval), regnval + }; + int ret = i2c_transfer(ts->client->adapter, &pkt, 1); + if (ret != 1) + printk(KERN_WARNING "%s: i2c_transfer failed\n", __func__); + else + printk(KERN_DEBUG "%s: set register 0x%02x to 0x%02x\n", + __func__, regnum, value); +} + +static void set_mode(struct ft5x06_ts *ts, int mode) +{ + write_reg(ts, 0, (mode&7)<<4); + printk(KERN_DEBUG "%s: changed mode to 0x%02x\n", __func__, mode); +} + +#define WORK_MODE 0 +#define FACTORY_MODE 4 + +/*-----------------------------------------------------------------------*/ + +/* + * This is a RT kernel thread that handles the I2c accesses + * The I2c access functions are expected to be able to sleep. + */ +static int ts_thread(void *_ts) +{ + int ret; + struct point points[5]; + unsigned char buf[33]; + struct ft5x06_ts *ts = _ts; + unsigned char startch[1] = { 0 }; + struct i2c_msg readpkt[2] = { + {ts->client->addr, 0, 1, startch}, + {ts->client->addr, I2C_M_RD, sizeof(buf), buf} + }; + + struct task_struct *tsk = current; + + ts->rtask = tsk; + + daemonize("ft5x06tsd"); + /* only want to receive SIGKILL */ + allow_signal(SIGKILL); + + complete(&ts->init_exit); + + do { + int buttons = 0 ; + ts->bReady = 0; + ret = i2c_transfer(ts->client->adapter, readpkt, + ARRAY_SIZE(readpkt)); + if (ret != ARRAY_SIZE(readpkt)) { + printk(KERN_WARNING "%s: i2c_transfer failed\n", + client_name); + msleep(1000); + } else { + int i; + unsigned char *p = buf+3; +#ifdef DEBUG + printHex(buf, sizeof(buf)); +#endif + buttons = buf[2]; + if (buttons > 5) { + printk(KERN_ERR + "%s: invalid button count %02x\n", + __func__, buttons); + buttons = 0 ; + } else { + for (i = 0; i < buttons; i++) { + points[i].x = ((p[0] << 8) + | p[1]) & 0x7ff; + points[i].y = ((p[2] << 8) + | p[3]) & 0x7ff; + p += 6; + } + } + } + + if (signal_pending(tsk)) + break; +#ifdef DEBUG + printk(KERN_ERR "%s: buttons = %d, " + "points[0].x = %d, " + "points[0].y = %d\n", + client_name, buttons, points[0].x, points[0].y); +#endif + ts_evt_add(ts, buttons, points); + if (0 < buttons) + wait_event_interruptible_timeout(ts->sample_waitq, + ts->bReady, HZ/20); + else + wait_event_interruptible(ts->sample_waitq, ts->bReady); + if (gpio_get_value(ts->gp)) { + if (buttons) { + buttons = 0; + ts_evt_add(ts, buttons, points); + } + if (signal_pending(tsk)) + break; + } + } while (1); + + ts->rtask = NULL; + complete_and_exit(&ts->init_exit, 0); +} + +/* + * We only detect samples ready with this interrupt + * handler, and even then we just schedule our task. + */ +static irqreturn_t ts_interrupt(int irq, void *id) +{ + struct ft5x06_ts *ts = id; + int bit = gpio_get_value(ts->gp); + if (bit == 0) { + ts->bReady = 1; + wmb(); /* flush bReady */ + wake_up(&ts->sample_waitq); + } + return IRQ_HANDLED; +} + +#define ID_G_THGROUP 0x80 +#define ID_G_PERIODMONITOR 0x89 +#define FT5X0X_REG_HEIGHT_B 0x8a +#define FT5X0X_REG_MAX_FRAME 0x8b +#define FT5X0X_REG_FEG_FRAME 0x8e +#define FT5X0X_REG_LEFT_RIGHT_OFFSET 0x92 +#define FT5X0X_REG_UP_DOWN_OFFSET 0x93 +#define FT5X0X_REG_DISTANCE_LEFT_RIGHT 0x94 +#define FT5X0X_REG_DISTANCE_UP_DOWN 0x95 +#define FT5X0X_REG_MAX_X_HIGH 0x98 +#define FT5X0X_REG_MAX_X_LOW 0x99 +#define FT5X0X_REG_MAX_Y_HIGH 0x9a +#define FT5X0X_REG_MAX_Y_LOW 0x9b +#define FT5X0X_REG_K_X_HIGH 0x9c +#define FT5X0X_REG_K_X_LOW 0x9d +#define FT5X0X_REG_K_Y_HIGH 0x9e +#define FT5X0X_REG_K_Y_LOW 0x9f + +#define ID_G_AUTO_CLB 0xa0 +#define ID_G_B_AREA_TH 0xae + +#ifdef DEBUG +static void dumpRegs(struct ft5x06_ts *ts, unsigned start, unsigned end) +{ + u8 regbuf[512]; + unsigned char startch[1] = { start }; + int ret ; + struct i2c_msg readpkt[2] = { + {ts->client->addr, 0, 1, startch}, + {ts->client->addr, I2C_M_RD, end-start+1, regbuf} + }; + ret = i2c_transfer(ts->client->adapter, readpkt, ARRAY_SIZE(readpkt)); + if (ret != ARRAY_SIZE(readpkt)) { + printk(KERN_WARNING "%s: i2c_transfer failed\n", client_name); + } else { + printk(KERN_ERR "registers %02x..%02x\n", start, end); + printHex(regbuf, end-start+1); + } +} +#endif + +static int ts_startup(struct ft5x06_ts *ts) +{ + int ret = 0; + if (ts == NULL) + return -EIO; + + if (down_interruptible(&ts->sem)) + return -EINTR; + + if (ts->use_count++ != 0) + goto out; + + if (ts->rtask) + panic("ft5x06tsd: rtask running?"); + + ret = request_irq(ts->irq, &ts_interrupt, IRQF_TRIGGER_FALLING, + client_name, ts); + if (ret) { + printk(KERN_ERR "%s: request_irq failed, irq:%i\n", + client_name, ts->irq); + goto out; + } + +#ifdef DEBUG + set_mode(ts, FACTORY_MODE); + dumpRegs(ts, 0x4c, 0x4C); + write_reg(ts, 0x4C, 0x05); + dumpRegs(ts, 0, 0x4C); +#endif + set_mode(ts, WORK_MODE); +#ifdef DEBUG + dumpRegs(ts, 0x3b, 0x3b); + dumpRegs(ts, 0x6a, 0x6a); + dumpRegs(ts, ID_G_THGROUP, ID_G_PERIODMONITOR); + dumpRegs(ts, FT5X0X_REG_HEIGHT_B, FT5X0X_REG_K_Y_LOW); + dumpRegs(ts, ID_G_AUTO_CLB, ID_G_B_AREA_TH); +#endif + set_mode(ts, WORK_MODE); + + init_completion(&ts->init_exit); + ret = kernel_thread(ts_thread, ts, CLONE_KERNEL); + if (ret >= 0) { + wait_for_completion(&ts->init_exit); + ret = 0; + } else { + free_irq(ts->irq, ts); + } + + out: + if (ret) + ts->use_count--; + up(&ts->sem); + return ret; +} + +/* + * Release touchscreen resources. Disable IRQs. + */ +static void ts_shutdown(struct ft5x06_ts *ts) +{ + if (ts) { + down(&ts->sem); + if (--ts->use_count == 0) { + if (ts->rtask) { + send_sig(SIGKILL, ts->rtask, 1); + wait_for_completion(&ts->init_exit); + } + free_irq(ts->irq, ts); + } + up(&ts->sem); + } +} +/*-----------------------------------------------------------------------*/ + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int detect_ft5x06(struct i2c_client *client) +{ + struct i2c_adapter *adapter = client->adapter; + char buffer; + struct i2c_msg pkt = { + client->addr, + I2C_M_RD, + sizeof(buffer), + &buffer + }; + if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) + return -ENODEV; + if (i2c_transfer(adapter, &pkt, 1) != 1) + return -ENODEV; + return 0; +} + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int ts_detect(struct i2c_client *client, + struct i2c_board_info *info) +{ + int err = detect_ft5x06(client); + if (!err) + strlcpy(info->type, "ft5x06-ts", I2C_NAME_SIZE); + return err; +} + +static int ts_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + int err = 0; + struct ft5x06_ts *ts; + struct device *dev = &client->dev; + if (gts) { + printk(KERN_ERR "%s: Error gts is already allocated\n", + client_name); + return -ENOMEM; + } + if (detect_ft5x06(client) != 0) { + dev_err(dev, "%s: Could not detect touch screen.\n", + client_name); + return -ENODEV; + } + ts = kzalloc(sizeof(struct ft5x06_ts), GFP_KERNEL); + if (!ts) { + dev_err(dev, "Couldn't allocate memory for %s\n", client_name); + return -ENOMEM; + } + init_waitqueue_head(&ts->sample_waitq); + sema_init(&ts->sem, 1); + ts->client = client; + ts->irq = client->irq ; + ts->gp = irq_to_gpio(client->irq); + printk(KERN_INFO "%s: %s touchscreen irq=%i, gp=%i\n", __func__, + client_name, ts->irq, ts->gp); + i2c_set_clientdata(client, ts); + err = ts_register(ts); + if (err == 0) { + gts = ts; + ts->procentry = create_proc_entry(procentryname, 0, NULL); + if (ts->procentry) { + ts->procentry->read_proc = ft5x06_proc_read ; + ts->procentry->write_proc = ft5x06_proc_write ; + } + } else { + printk(KERN_WARNING "%s: ts_register failed\n", client_name); + ts_deregister(ts); + kfree(ts); + } + return err; +} + +static int ts_remove(struct i2c_client *client) +{ + struct ft5x06_ts *ts = i2c_get_clientdata(client); + remove_proc_entry(procentryname, 0); + if (ts == gts) { + gts = NULL; + ts_deregister(ts); + } else { + printk(KERN_ERR "%s: Error ts!=gts\n", client_name); + } + kfree(ts); + return 0; +} + + +/*-----------------------------------------------------------------------*/ + +static const struct i2c_device_id ts_idtable[] = { + { "ft5x06-ts", 0 }, + { } +}; + +static struct i2c_driver ts_driver = { + .driver = { + .owner = THIS_MODULE, + .name = "ft5x06-ts", + }, + .id_table = ts_idtable, + .probe = ts_probe, + .remove = __devexit_p(ts_remove), + .detect = ts_detect, +}; + +static int __init ts_init(void) +{ + int res = i2c_add_driver(&ts_driver); + if (res) { + printk(KERN_WARNING "%s: i2c_add_driver failed\n", client_name); + return res; + } + printk(KERN_INFO "%s: " __DATE__ "\n", client_name); + return 0; +} + +static void __exit ts_exit(void) +{ + i2c_del_driver(&ts_driver); +} + +MODULE_AUTHOR("Boundary Devices "); +MODULE_DESCRIPTION("I2C interface for FocalTech ft5x06 touch screen controller."); +MODULE_LICENSE("GPL"); + +module_init(ts_init) +module_exit(ts_exit) diff --git a/drivers/input/touchscreen/max11801_ts.c b/drivers/input/touchscreen/max11801_ts.c old mode 100755 new mode 100644 diff --git a/drivers/input/touchscreen/tsc2004.c b/drivers/input/touchscreen/tsc2004.c new file mode 100644 index 0000000..37af845 --- /dev/null +++ b/drivers/input/touchscreen/tsc2004.c @@ -0,0 +1,561 @@ +/* + * drivers/input/touchscreen/tsc2004.c + * + * Copyright (C) 2009 Texas Instruments Inc + * Author: Vaibhav Hiremath + * + * Using code from: + * - tsc2007.c + * + * This package is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ + +#include +#include +#include +#include +#include +#include + +static int calibration[7]; +module_param_array(calibration, int, NULL, S_IRUGO | S_IWUSR); + +static void translate(u16 *px, u16 *py) +{ + int x, y, x1, y1; + if (calibration[6]) { + x1 = *px; + y1 = *py; + + x = calibration[0] * x1 + + calibration[1] * y1 + + calibration[2]; + x /= calibration[6]; + if (x < 0) + x = 0; + y = calibration[3] * x1 + + calibration[4] * y1 + + calibration[5]; + y /= calibration[6]; + if (y < 0) + y = 0; + *px = x ; + *py = y ; + } +} + +#define TS_POLL_DELAY 1 /* ms delay between samples */ +#define TS_POLL_PERIOD 1 /* ms delay between samples */ + +/* Control byte 0 */ +#define TSC2004_CMD0(addr, pnd, rw) ((addr<<3)|(pnd<<1)|rw) +/* Control byte 1 */ +#define TSC2004_CMD1(cmd, mode, rst) ((1<<7)|(cmd<<4)|(mode<<2)|(rst<<1)) + +/* Command Bits */ +#define READ_REG 1 +#define WRITE_REG 0 +#define SWRST_TRUE 1 +#define SWRST_FALSE 0 +#define PND0_TRUE 1 +#define PND0_FALSE 0 + +/* Converter function mapping */ +enum convertor_function { + MEAS_X_Y_Z1_Z2, /* Measure X,Y,z1 and Z2: 0x0 */ + MEAS_X_Y, /* Measure X and Y only: 0x1 */ + MEAS_X, /* Measure X only: 0x2 */ + MEAS_Y, /* Measure Y only: 0x3 */ + MEAS_Z1_Z2, /* Measure Z1 and Z2 only: 0x4 */ + MEAS_AUX, /* Measure Auxillary input: 0x5 */ + MEAS_TEMP1, /* Measure Temparature1: 0x6 */ + MEAS_TEMP2, /* Measure Temparature2: 0x7 */ + MEAS_AUX_CONT, /* Continuously measure Auxillary input: 0x8 */ + X_DRV_TEST, /* X-Axis drivers tested 0x9 */ + Y_DRV_TEST, /* Y-Axis drivers tested 0xA */ + /*Command Reserved*/ + SHORT_CKT_TST = 0xC, /* Short circuit test: 0xC */ + XP_XN_DRV_STAT, /* X+,Y- drivers status: 0xD */ + YP_YN_DRV_STAT, /* X+,Y- drivers status: 0xE */ + YP_XN_DRV_STAT /* Y+,X- drivers status: 0xF */ +}; + +/* Register address mapping */ +enum register_address { + X_REG, /* X register: 0x0 */ + Y_REG, /* Y register: 0x1 */ + Z1_REG, /* Z1 register: 0x2 */ + Z2_REG, /* Z2 register: 0x3 */ + AUX_REG, /* AUX register: 0x4 */ + TEMP1_REG, /* Temp1 register: 0x5 */ + TEMP2_REG, /* Temp2 register: 0x6 */ + STAT_REG, /* Status Register: 0x7 */ + AUX_HGH_TH_REG, /* AUX high threshold register: 0x8 */ + AUX_LOW_TH_REG, /* AUX low threshold register: 0x9 */ + TMP_HGH_TH_REG, /* Temp high threshold register:0xA */ + TMP_LOW_TH_REG, /* Temp low threshold register: 0xB */ + CFR0_REG, /* Configuration register 0: 0xC */ + CFR1_REG, /* Configuration register 1: 0xD */ + CFR2_REG, /* Configuration register 2: 0xE */ + CONV_FN_SEL_STAT /* Convertor function select register: 0xF */ +}; + +/* Supported Resolution modes */ +enum resolution_mode { + MODE_10BIT, /* 10 bit resolution */ + MODE_12BIT /* 12 bit resolution */ +}; + +/* Configuraton register bit fields */ +/* CFR0 */ +#define PEN_STS_CTRL_MODE (1<<15) +#define ADC_STS (1<<14) +#define RES_CTRL (1<<13) +#define ADC_CLK_4MHZ (0<<11) +#define ADC_CLK_2MHZ (1<<11) +#define ADC_CLK_1MHZ (2<<11) +#define PANEL_VLTG_STB_TIME_0US (0<<8) +#define PANEL_VLTG_STB_TIME_100US (1<<8) +#define PANEL_VLTG_STB_TIME_500US (2<<8) +#define PANEL_VLTG_STB_TIME_1MS (3<<8) +#define PANEL_VLTG_STB_TIME_5MS (4<<8) +#define PANEL_VLTG_STB_TIME_10MS (5<<8) +#define PANEL_VLTG_STB_TIME_50MS (6<<8) +#define PANEL_VLTG_STB_TIME_100MS (7<<8) + +/* CFR2 */ +#define PINTS1 (1<<15) +#define PINTS0 (1<<14) +#define MEDIAN_VAL_FLTR_SIZE_1 (0<<12) +#define MEDIAN_VAL_FLTR_SIZE_3 (1<<12) +#define MEDIAN_VAL_FLTR_SIZE_7 (2<<12) +#define MEDIAN_VAL_FLTR_SIZE_15 (3<<12) +#define AVRG_VAL_FLTR_SIZE_1 (0<<10) +#define AVRG_VAL_FLTR_SIZE_3_4 (1<<10) +#define AVRG_VAL_FLTR_SIZE_7_8 (2<<10) +#define AVRG_VAL_FLTR_SIZE_16 (3<<10) +#define MAV_FLTR_EN_X (1<<4) +#define MAV_FLTR_EN_Y (1<<3) +#define MAV_FLTR_EN_Z (1<<2) + +#define MAX_12BIT ((1 << 12) - 1) +#define MEAS_MASK 0xFFF + +struct ts_event { + u16 x; + u16 y; + u16 z1, z2; +}; + +struct tsc2004 { + struct input_dev *input; + char phys[32]; + struct delayed_work work; + + struct i2c_client *client; + + u16 model; + u16 x_plate_ohms; + + bool pendown; + int irq; + + int (*get_pendown_state)(void); + void (*clear_penirq)(void); +}; + +static inline int tsc2004_read_xyz_data(struct tsc2004 *tsc, u8 cmd) +{ + s32 data; + u16 val; + + data = i2c_smbus_read_word_data(tsc->client, cmd); + if (data < 0) { + dev_err(&tsc->client->dev, "i2c io (read) error: %d\n", data); + return data; + } + + /* + * We need to swap byte order for little-endian cpus. + * 12 bit precision, high 4 bits should be zero + */ + val = be16_to_cpu(data) & 0xfff; + + dev_dbg(&tsc->client->dev, "data: 0x%x, val: 0x%x\n", data, val); + + return val; +} + +static inline int tsc2004_write_word_data(struct tsc2004 *tsc, u8 cmd, u16 data) +{ + u16 val; + + val = cpu_to_be16(data); + return i2c_smbus_write_word_data(tsc->client, cmd, val); +} + +static inline int tsc2004_write_cmd(struct tsc2004 *tsc, u8 value) +{ + return i2c_smbus_write_byte(tsc->client, value); +} + +static int tsc2004_prepare_for_reading(struct tsc2004 *ts) +{ + int err; + int cmd, data; + int retries ; + + /* Reset the TSC, configure for 12 bit */ + retries = 0 ; + do { + /* Reset the TSC, configure for 12 bit */ + cmd = TSC2004_CMD1(MEAS_X_Y_Z1_Z2, MODE_12BIT, SWRST_TRUE); + err = tsc2004_write_cmd(ts, cmd); + if (err < 0) + printk (KERN_ERR "%s: write_cmd %d\n", __func__, err ); + } while ( (err < 0) && (3 < retries++) ); + + if (err < 0) + return err ; + + /* Enable interrupt for PENIRQ and DAV */ + cmd = TSC2004_CMD0(CFR2_REG, PND0_FALSE, WRITE_REG); + data = PINTS1 | PINTS0 | MEDIAN_VAL_FLTR_SIZE_15 | + AVRG_VAL_FLTR_SIZE_7_8 | MAV_FLTR_EN_X | MAV_FLTR_EN_Y | + MAV_FLTR_EN_Z; + err = tsc2004_write_word_data(ts, cmd, data); + if (err < 0) + return err; + + /* Configure the TSC in TSMode 1 */ + cmd = TSC2004_CMD0(CFR0_REG, PND0_FALSE, WRITE_REG); + data = PEN_STS_CTRL_MODE | ADC_CLK_2MHZ | PANEL_VLTG_STB_TIME_1MS; + err = tsc2004_write_word_data(ts, cmd, data); + if (err < 0) + return err; + + /* Enable x, y, z1 and z2 conversion functions */ + cmd = TSC2004_CMD1(MEAS_X_Y_Z1_Z2, MODE_12BIT, SWRST_FALSE); + err = tsc2004_write_cmd(ts, cmd); + if (err < 0) + return err; + + return 0; +} + +static void tsc2004_read_values(struct tsc2004 *tsc, struct ts_event *tc) +{ + int cmd; + + /* Read X Measurement */ + cmd = TSC2004_CMD0(X_REG, PND0_FALSE, READ_REG); + tc->x = tsc2004_read_xyz_data(tsc, cmd); + + /* Read Y Measurement */ + cmd = TSC2004_CMD0(Y_REG, PND0_FALSE, READ_REG); + tc->y = tsc2004_read_xyz_data(tsc, cmd); + + /* Read Z1 Measurement */ + cmd = TSC2004_CMD0(Z1_REG, PND0_FALSE, READ_REG); + tc->z1 = tsc2004_read_xyz_data(tsc, cmd); + + /* Read Z2 Measurement */ + cmd = TSC2004_CMD0(Z2_REG, PND0_FALSE, READ_REG); + tc->z2 = tsc2004_read_xyz_data(tsc, cmd); + + + tc->x &= MEAS_MASK; + tc->y &= MEAS_MASK; + tc->z1 &= MEAS_MASK; + tc->z2 &= MEAS_MASK; + + /* Prepare for touch readings */ + if (tsc2004_prepare_for_reading(tsc) < 0) + dev_dbg(&tsc->client->dev, "Failed to prepare TSC for next" + "reading\n"); +} + +static u32 tsc2004_calculate_pressure(struct tsc2004 *tsc, struct ts_event *tc) +{ + u32 rt = 0; + + /* range filtering */ + if (tc->x == MAX_12BIT) + tc->x = 0; + + if (likely(tc->x && tc->z1)) { + /* compute touch pressure resistance using equation #1 */ + rt = tc->z2 - tc->z1; + rt *= tc->x; + rt *= tsc->x_plate_ohms; + rt /= tc->z1; + rt = (rt + 2047) >> 12; + } + + return rt; +} + +static void tsc2004_send_up_event(struct tsc2004 *tsc) +{ + struct input_dev *input = tsc->input; + + dev_dbg(&tsc->client->dev, "UP\n"); + + input_report_key(input, BTN_TOUCH, 0); + input_report_abs(input, ABS_PRESSURE, 0); + input_sync(input); +} + +static void tsc2004_work(struct work_struct *work) +{ + struct tsc2004 *ts = + container_of(to_delayed_work(work), struct tsc2004, work); + struct ts_event tc; + u32 rt; + + /* + * NOTE: We can't rely on the pressure to determine the pen down + * state, even though this controller has a pressure sensor. + * The pressure value can fluctuate for quite a while after + * lifting the pen and in some cases may not even settle at the + * expected value. + * + * The only safe way to check for the pen up condition is in the + * work function by reading the pen signal state (it's a GPIO + * and IRQ). Unfortunately such callback is not always available, + * in that case we have rely on the pressure anyway. + */ + if (ts->get_pendown_state) { + if (unlikely(!ts->get_pendown_state())) { + tsc2004_send_up_event(ts); + ts->pendown = false; + goto out; + } + + dev_dbg(&ts->client->dev, "pen is still down\n"); + } + + tsc2004_read_values(ts, &tc); + + rt = tsc2004_calculate_pressure(ts, &tc); + if (rt > MAX_12BIT) { + /* + * Sample found inconsistent by debouncing or pressure is + * beyond the maximum. Don't report it to user space, + * repeat at least once more the measurement. + */ + dev_dbg(&ts->client->dev, "ignored pressure %d\n", rt); + goto out; + + } + + if (rt) { + struct input_dev *input = ts->input; + + translate(&tc.x, &tc.y); + + if (!ts->pendown) { + dev_dbg(&ts->client->dev, "DOWN\n"); + + input_report_key(input, BTN_TOUCH, 1); + ts->pendown = true; + } + + input_report_abs(input, ABS_X, tc.x); + input_report_abs(input, ABS_Y, tc.y); + input_report_abs(input, ABS_PRESSURE, rt); + + input_sync(input); + + dev_dbg(&ts->client->dev, "point(%4d,%4d), pressure (%4u)\n", + tc.x, tc.y, rt); + + } else if (!ts->get_pendown_state && ts->pendown) { + /* + * We don't have callback to check pendown state, so we + * have to assume that since pressure reported is 0 the + * pen was lifted up. + */ + tsc2004_send_up_event(ts); + ts->pendown = false; + } + + out: + if (ts->pendown) + schedule_delayed_work(&ts->work, + msecs_to_jiffies(TS_POLL_PERIOD)); + else + enable_irq(ts->irq); +} + +static irqreturn_t tsc2004_irq(int irq, void *handle) +{ + struct tsc2004 *ts = handle; + + if (!ts->get_pendown_state || likely(ts->get_pendown_state())) { + disable_irq_nosync(ts->irq); + schedule_delayed_work(&ts->work, + msecs_to_jiffies(TS_POLL_DELAY)); + } + + if (ts->clear_penirq) + ts->clear_penirq(); + + return IRQ_HANDLED; +} + +static void tsc2004_free_irq(struct tsc2004 *ts) +{ + free_irq(ts->irq, ts); + if (cancel_delayed_work_sync(&ts->work)) { + /* + * Work was pending, therefore we need to enable + * IRQ here to balance the disable_irq() done in the + * interrupt handler. + */ + enable_irq(ts->irq); + } +} + +static int __devinit tsc2004_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct tsc2004 *ts; + struct tsc2007_platform_data *pdata = pdata = client->dev.platform_data; + struct input_dev *input_dev; + int err; + + if (!pdata) { + dev_err(&client->dev, "platform data is required!\n"); + return -EINVAL; + } + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_READ_WORD_DATA)) + return -EIO; + + ts = kzalloc(sizeof(struct tsc2004), GFP_KERNEL); + input_dev = input_allocate_device(); + if (!ts || !input_dev) { + err = -ENOMEM; + goto err_free_mem; + } + + ts->client = client; + ts->irq = client->irq; + ts->input = input_dev; + INIT_DELAYED_WORK(&ts->work, tsc2004_work); + + ts->model = pdata->model; + ts->x_plate_ohms = pdata->x_plate_ohms; + ts->get_pendown_state = pdata->get_pendown_state; + ts->clear_penirq = pdata->clear_penirq; + + snprintf(ts->phys, sizeof(ts->phys), + "%s/input0", dev_name(&client->dev)); + + input_dev->name = "tsc2004"; + input_dev->phys = ts->phys; + input_dev->id.bustype = BUS_I2C; + + input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS); + input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH); + + input_set_abs_params(input_dev, ABS_X, 0, MAX_12BIT, 0, 0); + input_set_abs_params(input_dev, ABS_Y, 0, MAX_12BIT, 0, 0); + input_set_abs_params(input_dev, ABS_PRESSURE, 0, MAX_12BIT, 0, 0); + + if (pdata->init_platform_hw) + pdata->init_platform_hw(); + + err = request_irq(ts->irq, tsc2004_irq, IRQF_TRIGGER_FALLING, + client->dev.driver->name, ts); + if (err < 0) { + dev_err(&client->dev, "irq %d busy?\n", ts->irq); + goto err_free_mem; + } + + /* Prepare for touch readings */ + err = tsc2004_prepare_for_reading(ts); + if (err < 0) + goto err_free_irq; + + err = input_register_device(input_dev); + if (err) + goto err_free_irq; + + i2c_set_clientdata(client, ts); + + return 0; + + err_free_irq: + tsc2004_free_irq(ts); + if (pdata->exit_platform_hw) + pdata->exit_platform_hw(); + err_free_mem: + input_free_device(input_dev); + kfree(ts); + return err; +} + +static int __devexit tsc2004_remove(struct i2c_client *client) +{ + struct tsc2004 *ts = i2c_get_clientdata(client); + struct tsc2007_platform_data *pdata = client->dev.platform_data; + + tsc2004_free_irq(ts); + + if (pdata->exit_platform_hw) + pdata->exit_platform_hw(); + + input_unregister_device(ts->input); + kfree(ts); + + return 0; +} + +static struct i2c_device_id tsc2004_idtable[] = { + { "tsc2004", 0 }, + { } +}; + +MODULE_DEVICE_TABLE(i2c, tsc2004_idtable); + +static struct i2c_driver tsc2004_driver = { + .driver = { + .owner = THIS_MODULE, + .name = "tsc2004" + }, + .id_table = tsc2004_idtable, + .probe = tsc2004_probe, + .remove = __devexit_p(tsc2004_remove), +}; + +static int __init tsc2004_init(void) +{ + return i2c_add_driver(&tsc2004_driver); +} + +static void __exit tsc2004_exit(void) +{ + i2c_del_driver(&tsc2004_driver); +} + +module_init(tsc2004_init); +module_exit(tsc2004_exit); + +MODULE_AUTHOR("Vaibhav Hiremath "); +MODULE_DESCRIPTION("TSC2004 TouchScreen Driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig old mode 100755 new mode 100644 diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile old mode 100755 new mode 100644 diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig old mode 100755 new mode 100644 diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile old mode 100755 new mode 100644 diff --git a/drivers/mfd/da9052-core.c b/drivers/mfd/da9052-core.c old mode 100755 new mode 100644 diff --git a/drivers/mfd/da9052-i2c.c b/drivers/mfd/da9052-i2c.c old mode 100755 new mode 100644 diff --git a/drivers/mmc/core/sdio_cis.c b/drivers/mmc/core/sdio_cis.c index 541bdb8..3b0ca83 100644 --- a/drivers/mmc/core/sdio_cis.c +++ b/drivers/mmc/core/sdio_cis.c @@ -230,6 +230,7 @@ static int sdio_read_cis(struct mmc_card *card, struct sdio_func *func) int ret; struct sdio_func_tuple *this, **prev; unsigned i, ptr = 0; + unsigned ptr_null_end; /* * Note that this works for the common CIS (function number 0) as @@ -258,6 +259,7 @@ static int sdio_read_cis(struct mmc_card *card, struct sdio_func *func) BUG_ON(*prev); + ptr_null_end = (ptr | 0xff) + 1; do { unsigned char tpl_code, tpl_link; @@ -269,6 +271,9 @@ static int sdio_read_cis(struct mmc_card *card, struct sdio_func *func) if (tpl_code == 0xff) break; + if ((tpl_code == 0x00) && (ptr == ptr_null_end)) + break; /* patch for misbehaving rtl8712 card */ + /* null entries have no link field or data */ if (tpl_code == 0x00) continue; @@ -282,9 +287,10 @@ static int sdio_read_cis(struct mmc_card *card, struct sdio_func *func) break; this = kmalloc(sizeof(*this) + tpl_link, GFP_KERNEL); - if (!this) - return -ENOMEM; - + if (!this) { + ret = -ENOMEM; + break; + } for (i = 0; i < tpl_link; i++) { ret = mmc_io_rw_direct(card, 0, 0, ptr + i, 0, &this->data[i]); @@ -328,6 +334,12 @@ static int sdio_read_cis(struct mmc_card *card, struct sdio_func *func) * not going to be queued for a driver. */ kfree(this); + if (ret) { + printk(KERN_WARNING "%s: dropping invalid" + " CIS tuple 0x%02x (%u bytes)\n", + mmc_hostname(card->host), + tpl_code, tpl_link); + } } ptr += tpl_link; diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index e173686..2e3330c 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -849,6 +849,7 @@ static int esdhc_pltfm_init(struct sdhci_host *host, struct sdhci_pltfm_data *pd host->ocr_avail_sd |= MMC_VDD_165_195; if (boarddata->support_8bit) host->mmc->caps |= MMC_CAP_8_BIT_DATA; + host->mmc->caps |= boarddata->caps; if (boarddata->keep_power_at_suspend) host->mmc->pm_caps |= (MMC_PM_KEEP_POWER | \ MMC_PM_WAKE_SDIO_IRQ); diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c old mode 100755 new mode 100644 diff --git a/drivers/mxc/mlb/mxc_mlb150.c b/drivers/mxc/mlb/mxc_mlb150.c old mode 100755 new mode 100644 diff --git a/drivers/mxc/thermal/thermal.c b/drivers/mxc/thermal/thermal.c index 0982a7b..cb52033 100644 --- a/drivers/mxc/thermal/thermal.c +++ b/drivers/mxc/thermal/thermal.c @@ -131,17 +131,22 @@ #define MEASURE_FREQ 3276 /* 3276 RTC clocks delay, 100ms */ #define KELVIN_TO_CEL(t, off) (((t) - (off))) #define CEL_TO_KELVIN(t, off) (((t) + (off))) -#define DEFAULT_RATIO 145 -#define DEFAULT_N40C 1563 -#define REG_VALUE_TO_CEL(ratio, raw) ((raw_n40c - raw) * 100 / ratio - 40) + +#define DEFAULT_RAW_25C 1469 +#define DEFAULT_RAW_HOT 1375 +#define DEFAULT_TEMP_HOT 90 + #define ANATOP_DEBUG false #define THERMAL_FUSE_NAME "/sys/fsl_otp/HW_OCOTP_ANA1" /* variables */ unsigned long anatop_base; -unsigned int ratio; -unsigned int raw_25c, raw_hot, hot_temp, raw_n40c, raw_125c, raw_critical; +unsigned int raw_critical; static struct clk *pll3_clk; +unsigned raw_25c; +unsigned long long cvt_to_celsius; +unsigned long long cvt_to_raw; + static bool full_run = true; static bool suspend_flag; static unsigned int thermal_irq; @@ -255,6 +260,7 @@ static int anatop_dump_temperature_register(void) __raw_readl(anatop_base + HW_ANADIG_ANA_MISC1)); return 0; } + static void anatop_update_alarm(unsigned int alarm_value) { if (cooling_device_disable || suspend_flag) @@ -267,6 +273,21 @@ static void anatop_update_alarm(unsigned int alarm_value) return; } + +int cvt_raw_to_celius(unsigned raw) +{ + int change = (raw_25c - raw); + change = (int)((change * cvt_to_celsius) >> 32); + return 25 + change; +} + +int cvt_celius_to_raw(int celius) +{ + int change = (celius - 25); + change = (int)((change * cvt_to_raw) >> 32); + return raw_25c - change; +} + static int anatop_thermal_get_temp(struct thermal_zone_device *thermal, long *temp) { @@ -277,7 +298,7 @@ static int anatop_thermal_get_temp(struct thermal_zone_device *thermal, if (!tz) return -EINVAL; - if (!ratio || suspend_flag) { + if (!raw_25c || suspend_flag) { *temp = KELVIN_TO_CEL(TEMP_ACTIVE, KELVIN_OFFSET); return 0; } @@ -322,10 +343,10 @@ static int anatop_thermal_get_temp(struct thermal_zone_device *thermal, anatop_dump_temperature_register(); /* only the temp between -40C and 125C is valid, this is for save */ - if (tmp <= raw_n40c && tmp >= raw_125c) - tz->temperature = REG_VALUE_TO_CEL(ratio, tmp); - else { - printk(KERN_WARNING "Invalid temperature, force it to 25C\n"); + tz->temperature = cvt_raw_to_celius(tmp); + if ((tz->temperature < -25) || (tz->temperature > 125)) { + pr_warn("Invalid temperature %ld C, force it to 25C\n", + tz->temperature); tz->temperature = 25; } @@ -482,7 +503,7 @@ static int anatop_thermal_set_trip_temp(struct thermal_zone_device *thermal, if (tz->trips.critical.flags.valid) { tz->trips.critical.temperature = CEL_TO_KELVIN( *temp, tz->kelvin_offset); - raw_critical = raw_25c - ratio * (*temp - 25) / 100; + raw_critical = cvt_celius_to_raw(*temp); anatop_update_alarm(raw_critical); } break; @@ -826,31 +847,48 @@ __setup("no_cooling_device", anatop_thermal_cooling_device_disable); static int anatop_thermal_counting_ratio(unsigned int fuse_data) { + unsigned raw25c, raw_hot, hot_temp; int ret = -EINVAL; pr_info("Thermal calibration data is 0x%x\n", fuse_data); - if (fuse_data == 0 || fuse_data == 0xffffffff || (fuse_data & 0xff) == 0) { - pr_info("%s: invalid calibration data, disable cooling!!!\n", __func__); - cooling_device_disable = true; - ratio = DEFAULT_RATIO; - disable_irq(thermal_irq); - return ret; - } ret = 0; /* Fuse data layout: * [31:20] sensor value @ 25C * [19:8] sensor value of hot * [7:0] hot temperature value */ - raw_25c = fuse_data >> 20; + raw25c = fuse_data >> 20; raw_hot = (fuse_data & 0xfff00) >> 8; hot_temp = fuse_data & 0xff; - ratio = ((raw_25c - raw_hot) * 100) / (hot_temp - 25); - raw_n40c = raw_25c + (13 * ratio) / 20; - raw_125c = raw_25c - ratio; + if ((raw25c <= raw_hot) || (hot_temp <= 25)) { + pr_info("%s: invalid calibration data, disable cooling!!! raw25c=%x raw_hot=%x hot_temp=%x\n", + __func__, raw25c, raw_hot, hot_temp); + cooling_device_disable = true; + raw_25c = DEFAULT_RAW_25C; + disable_irq(thermal_irq); + cvt_to_celsius = (DEFAULT_TEMP_HOT - 25); + cvt_to_celsius <<= 32; + cvt_to_celsius /= DEFAULT_RAW_25C - DEFAULT_RAW_HOT; + + cvt_to_raw = DEFAULT_RAW_25C - DEFAULT_RAW_HOT; + cvt_to_raw <<= 32; + cvt_to_raw /= (DEFAULT_TEMP_HOT - 25); + return ret; + } + ret = 0; + raw_25c = raw25c; + cvt_to_celsius = hot_temp - 25; /* hot_temp > 25 */ + cvt_to_celsius <<= 32; + do_div(cvt_to_celsius, raw25c - raw_hot); /* raw25c > raw_hot */ + + cvt_to_raw = raw25c - raw_hot; + cvt_to_raw <<= 32; + do_div(cvt_to_raw, hot_temp - 25); + pr_info("%s: raw25c=%d raw_hot=%d hot_temp=%d\n", __func__, raw25c, raw_hot, hot_temp); + /* Init default critical temp to set alarm */ - raw_critical = raw_25c - ratio * (KELVIN_TO_CEL(TEMP_CRITICAL, KELVIN_OFFSET) - 25) / 100; + raw_critical = cvt_celius_to_raw(KELVIN_TO_CEL(TEMP_CRITICAL, KELVIN_OFFSET)); clk_enable(pll3_clk); anatop_update_alarm(raw_critical); @@ -877,6 +915,7 @@ static int anatop_thermal_probe(struct platform_device *pdev) struct resource *res_io, *res_irq, *res_calibration; void __iomem *base, *calibration_addr; struct anatop_device *device; + unsigned fuse_data; device = kzalloc(sizeof(*device), GFP_KERNEL); if (!device) { @@ -919,9 +958,13 @@ static int anatop_thermal_probe(struct platform_device *pdev) goto anatop_failed; } - raw_n40c = DEFAULT_N40C; /* use calibration data to get ratio */ - anatop_thermal_counting_ratio(__raw_readl(calibration_addr)); + fuse_data = __raw_readl(calibration_addr); +#if 1 + if (!fuse_data) + fuse_data = (0x552 << 8) | 58 | (0x58e << 20); +#endif + anatop_thermal_counting_ratio(fuse_data); res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (res_irq == NULL) { diff --git a/drivers/net/fec.c b/drivers/net/fec.c old mode 100755 new mode 100644 index 5af378f..b74b1d9 --- a/drivers/net/fec.c +++ b/drivers/net/fec.c @@ -159,7 +159,9 @@ MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address"); /* Pause frame feild and FIFO threshold */ #define FEC_ENET_FCE (1 << 5) #define FEC_ENET_RSEM_V 0x84 +#define FEC_ENET_RSEM_V_TO1 0x10 #define FEC_ENET_RSFL_V 16 +#define FEC_ENET_RSFL_V_TO1 0x20 #define FEC_ENET_RAEM_V 0x8 #define FEC_ENET_RAFL_V 0x8 #define FEC_ENET_OPD_V 0xFFF0 @@ -557,28 +559,33 @@ static int fec_rx_poll(struct napi_struct *napi, int budget) goto rx_processing_done; /* Check for errors. */ + status ^= BD_ENET_RX_LAST; if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO | - BD_ENET_RX_CR | BD_ENET_RX_OV)) { + BD_ENET_RX_CR | BD_ENET_RX_OV | BD_ENET_RX_LAST | + BD_ENET_RX_CL)) { ndev->stats.rx_errors++; - if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH)) { - /* Frame too long or too short. */ - ndev->stats.rx_length_errors++; - } - if (status & BD_ENET_RX_NO) /* Frame alignment */ - ndev->stats.rx_frame_errors++; - if (status & BD_ENET_RX_CR) /* CRC Error */ - ndev->stats.rx_crc_errors++; - if (status & BD_ENET_RX_OV) /* FIFO overrun */ - ndev->stats.rx_fifo_errors++; - } - /* Report late collisions as a frame error. - * On this error, the BD is closed, but we don't know what we - * have in the buffer. So, just drop this frame on the floor. - */ - if (status & BD_ENET_RX_CL) { - ndev->stats.rx_errors++; - ndev->stats.rx_frame_errors++; + if (status & BD_ENET_RX_OV) { + /* FIFO overrun */ + ndev->stats.rx_fifo_errors++; + } else { + if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH + | BD_ENET_RX_LAST)) { + /* Frame too long or too short. */ + ndev->stats.rx_length_errors++; + if (status & BD_ENET_RX_LAST) + dev_err(&ndev->dev, + "rcv is not +last, " + "0x%x\n", status); + } + if (status & BD_ENET_RX_CR) /* CRC Error */ + ndev->stats.rx_crc_errors++; + /* + * Report late collisions as a frame error. + */ + if (status & (BD_ENET_RX_NO | BD_ENET_RX_CL)) + ndev->stats.rx_frame_errors++; + } goto rx_processing_done; } @@ -1035,9 +1042,10 @@ static int fec_enet_mii_probe(struct net_device *ndev) } /* mask with MAC supported features */ - if (cpu_is_mx6q() || cpu_is_mx6dl()) - phy_dev->supported &= PHY_GBIT_FEATURES; - else + if (cpu_is_mx6q() || cpu_is_mx6dl()) { + /* SUPPORTED_Asym_Pause prevents my switch from linking up */ + phy_dev->supported &= PHY_GBIT_FEATURES | SUPPORTED_Pause; + } else phy_dev->supported &= PHY_BASIC_FEATURES; phy_dev->advertising = phy_dev->supported; @@ -1054,7 +1062,7 @@ static int fec_enet_mii_probe(struct net_device *ndev) return 0; } -static int fec_enet_mii_init(struct platform_device *pdev) +static int fec_enet_mii_init(struct platform_device *pdev, int phy_irq) { static struct mii_bus *fec0_mii_bus; struct net_device *ndev = platform_get_drvdata(pdev); @@ -1120,7 +1128,7 @@ static int fec_enet_mii_init(struct platform_device *pdev) } for (i = 0; i < PHY_MAX_ADDR; i++) - fep->mii_bus->irq[i] = PHY_POLL; + fep->mii_bus->irq[i] = phy_irq; if (mdiobus_register(fep->mii_bus)) goto err_out_free_mdio_irq; @@ -1611,6 +1619,9 @@ fec_restart(struct net_device *dev, int duplex) writel(OPT_FRAME_SIZE | 0x06, fep->hwp + FEC_R_CNTRL); writel(0x0, fep->hwp + FEC_X_CNTRL); } +#ifdef FEC_FTRL + writel(PKT_MAXBUF_SIZE, fep->hwp + FEC_FTRL); +#endif fep->full_duplex = duplex; /* Set MII speed */ @@ -1641,12 +1652,9 @@ fec_restart(struct net_device *dev, int duplex) * ENET pause frame has two issues as ticket TKT116501 * The issues have been fixed on Rigel TO1.1 and Arik TO1.2 */ - if ((cpu_is_mx6q() && - (mx6q_revision() >= IMX_CHIP_REVISION_1_2)) || - (cpu_is_mx6dl() && - (mx6dl_revision() >= IMX_CHIP_REVISION_1_1))) + if (cpu_is_mx6q() || (cpu_is_mx6dl() + && (mx6dl_revision() >= IMX_CHIP_REVISION_1_1))) val |= FEC_ENET_FCE; - writel(val, fep->hwp + FEC_R_CNTRL); } @@ -1700,24 +1708,31 @@ fec_restart(struct net_device *dev, int duplex) fep->phy_dev->speed == SPEED_1000) val |= (0x1 << 5); - /* RX FIFO threshold setting for ENET pause frame feature - * Only set the parameters after ticket TKT116501 fixed. - * The issue has been fixed on Rigel TO1.1 and Arik TO1.2 - */ - if ((cpu_is_mx6q() && - (mx6q_revision() >= IMX_CHIP_REVISION_1_2)) || - (cpu_is_mx6dl() && - (mx6dl_revision() >= IMX_CHIP_REVISION_1_1))) { - writel(FEC_ENET_RSEM_V, fep->hwp + FEC_R_FIFO_RSEM); - writel(FEC_ENET_RSFL_V, fep->hwp + FEC_R_FIFO_RSFL); + if (cpu_is_mx6q() || cpu_is_mx6dl()) { + u32 rsem_val = 0; + /* RX FIFO threshold setting for ENET pause frame feature + * Only set the parameters after ticket TKT116501 fixed. + * The issue has been fixed on Rigel TO1.1 and Arik TO1.2 + */ + if (cpu_is_mx6q() || (cpu_is_mx6dl() + && (mx6dl_revision() >= IMX_CHIP_REVISION_1_1))) { + if (cpu_is_mx6q() && (mx6q_revision() < IMX_CHIP_REVISION_1_1)) { + rsem_val = FEC_ENET_RSEM_V_TO1; + } else + rsem_val = FEC_ENET_RSEM_V; + } + + writel(rsem_val, fep->hwp + FEC_R_FIFO_RSEM); + if (cpu_is_mx6q() && (mx6q_revision() < IMX_CHIP_REVISION_1_1)) + writel(FEC_ENET_RSFL_V_TO1, fep->hwp + FEC_R_FIFO_RSFL); + else + writel(FEC_ENET_RSFL_V, fep->hwp + FEC_R_FIFO_RSFL); writel(FEC_ENET_RAEM_V, fep->hwp + FEC_R_FIFO_RAEM); writel(FEC_ENET_RAFL_V, fep->hwp + FEC_R_FIFO_RAFL); /* OPD */ writel(FEC_ENET_OPD_V, fep->hwp + FEC_OPD); - } - if (cpu_is_mx6q() || cpu_is_mx6dl()) { /* enable endian swap */ val |= (0x1 << 8); /* enable ENET store and forward mode */ @@ -1772,6 +1787,7 @@ fec_probe(struct platform_device *pdev) struct net_device *ndev; int i, irq, ret = 0; struct resource *r; + int phy_irq = PHY_POLL; r = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!r) @@ -1804,8 +1820,11 @@ fec_probe(struct platform_device *pdev) platform_set_drvdata(pdev, ndev); pdata = pdev->dev.platform_data; - if (pdata) + if (pdata) { fep->phy_interface = pdata->phy; + if (pdata->phy_irq) + phy_irq = pdata->phy_irq; + } /* This device has up to three irqs on some platforms */ for (i = 0; i < 3; i++) { @@ -1833,7 +1852,7 @@ fec_probe(struct platform_device *pdev) if (ret) goto failed_init; - ret = fec_enet_mii_init(pdev); + ret = fec_enet_mii_init(pdev, phy_irq); if (ret) goto failed_mii_init; diff --git a/drivers/net/fec.h b/drivers/net/fec.h index 0c26c6c..49eb060 100644 --- a/drivers/net/fec.h +++ b/drivers/net/fec.h @@ -49,6 +49,7 @@ #define FEC_R_FIFO_RSEM 0x194 /* Receive FIFO section empty threshold */ #define FEC_R_FIFO_RAEM 0x198 /* Receive FIFO almost empty threshold */ #define FEC_R_FIFO_RAFL 0x19c /* Receive FIFO almost full threshold */ +#define FEC_FTRL 0x1b0 /* Frame truncation receive length*/ #define FEC_MIIGSK_CFGR 0x300 /* MIIGSK Configuration reg */ #define FEC_MIIGSK_ENR 0x308 /* MIIGSK Enable reg */ diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c index 80747d2..6eafb5c 100644 --- a/drivers/net/phy/micrel.c +++ b/drivers/net/phy/micrel.c @@ -16,6 +16,7 @@ * ks8001, ks8737, ks8721, ks8041, ks8051 100/10 phy */ +#include #include #include #include @@ -48,16 +49,34 @@ static int kszphy_ack_interrupt(struct phy_device *phydev) int rc; rc = phy_read(phydev, MII_KSZPHY_INTCS); - return (rc < 0) ? rc : 0; } static int kszphy_set_interrupt(struct phy_device *phydev) { - int temp; - temp = (PHY_INTERRUPT_ENABLED == phydev->interrupts) ? - KSZPHY_INTCS_ALL : 0; - return phy_write(phydev, MII_KSZPHY_INTCS, temp); + int bmcr, new_bmcr; + bmcr = phy_read(phydev, MII_BMCR); + if (PHY_INTERRUPT_ENABLED == phydev->interrupts) { + new_bmcr = bmcr & ~BMCR_PDOWN; + if (bmcr != new_bmcr) { + unsigned intcs, temp; + phy_write(phydev, MII_BMCR, new_bmcr); + udelay(100); /* power up needs delay after */ + /* force master mode */ + phy_write(phydev, 0x9, 0x1f00); + } + return phy_write(phydev, MII_KSZPHY_INTCS, KSZPHY_INTCS_ALL); + } else { + phy_write(phydev, MII_KSZPHY_INTCS, 0); + new_bmcr = bmcr | BMCR_PDOWN; + if ((PHY_HALTED == phydev->state) && (bmcr != new_bmcr)) { + phy_write(phydev, MII_BMCR, bmcr | BMCR_ANRESTART); + /* let phy note link is down before poweroff */ + udelay(10); + phy_write(phydev, MII_BMCR, new_bmcr); + } + return 0; + } } static int kszphy_config_intr(struct phy_device *phydev) @@ -66,8 +85,10 @@ static int kszphy_config_intr(struct phy_device *phydev) /* set the interrupt pin active low */ temp = phy_read(phydev, MII_KSZPHY_CTRL); - temp &= ~KSZPHY_CTRL_INT_ACTIVE_HIGH; - phy_write(phydev, MII_KSZPHY_CTRL, temp); + if (temp & KSZPHY_CTRL_INT_ACTIVE_HIGH) { + temp &= ~KSZPHY_CTRL_INT_ACTIVE_HIGH; + phy_write(phydev, MII_KSZPHY_CTRL, temp); + } rc = kszphy_set_interrupt(phydev); return rc < 0 ? rc : 0; } @@ -76,10 +97,12 @@ static int ksz9021_config_intr(struct phy_device *phydev) { int temp, rc; - /* set the interrupt pin active low */ temp = phy_read(phydev, MII_KSZPHY_CTRL); - temp &= ~KSZ9021_CTRL_INT_ACTIVE_HIGH; - phy_write(phydev, MII_KSZPHY_CTRL, temp); + if (temp & KSZ9021_CTRL_INT_ACTIVE_HIGH) { + /* set the interrupt pin active low */ + temp &= ~KSZ9021_CTRL_INT_ACTIVE_HIGH; + phy_write(phydev, MII_KSZPHY_CTRL, temp); + } rc = kszphy_set_interrupt(phydev); return rc < 0 ? rc : 0; } diff --git a/drivers/net/wireless/wl12xx/Kconfig b/drivers/net/wireless/wl12xx/Kconfig index 35ce7b0..1dc6a47 100644 --- a/drivers/net/wireless/wl12xx/Kconfig +++ b/drivers/net/wireless/wl12xx/Kconfig @@ -1,6 +1,7 @@ menuconfig WL12XX_MENU tristate "TI wl12xx driver support" depends on MAC80211 && EXPERIMENTAL + select WEXT_PRIV ---help--- This will enable TI wl12xx driver support for the following chips: wl1271, wl1273, wl1281 and wl1283. @@ -12,6 +13,7 @@ config WL12XX depends on INET select FW_LOADER select CRC7 + select WIRELESS_EXT ---help--- This module adds support for wireless adapters based on TI wl1271 and TI wl1273 chipsets. This module does *not* include support for wl1251. diff --git a/drivers/net/wireless/wl12xx/main.c b/drivers/net/wireless/wl12xx/main.c index e6497dc..f1ffec0 100644 --- a/drivers/net/wireless/wl12xx/main.c +++ b/drivers/net/wireless/wl12xx/main.c @@ -1767,6 +1767,8 @@ static void wl1271_op_remove_interface(struct ieee80211_hw *hw, mutex_unlock(&wl->mutex); cancel_work_sync(&wl->recovery_work); + if (wl->set_power) + wl->set_power(0); } void wl1271_configure_filters(struct wl1271 *wl, unsigned int filters) @@ -3781,9 +3783,39 @@ static ssize_t wl1271_sysfs_show_hw_pg_ver(struct device *dev, static DEVICE_ATTR(hw_pg_ver, S_IRUGO | S_IWUSR, wl1271_sysfs_show_hw_pg_ver, NULL); + +static int parse_mac(unsigned char *mac, unsigned char const *str_mac) +{ + int i = 0; + char *end; + int ret = -EINVAL; + + for (;;) { + mac[i++] = simple_strtoul(str_mac, &end, 16); + if (i == 6) { + if (!*end || (*end == ' ')) + ret = 0; + break; + } + str_mac = end + 1; + if ((*end != '-') && (*end != ':')) + break; + } + return ret; +} + +static char *mac; +module_param(mac, charp, S_IRUGO); +MODULE_PARM_DESC(mac, "mac address override"); + int wl1271_register_hw(struct wl1271 *wl) { int ret; + u8 override_mac[ETH_ALEN]; + memset(override_mac, 0, ETH_ALEN); + if (mac) + if (parse_mac(override_mac, mac)) + memset(override_mac, 0, ETH_ALEN); if (wl->mac80211_registered) return 0; @@ -3804,6 +3836,9 @@ int wl1271_register_hw(struct wl1271 *wl) wl->mac_addr[5] = nvs_ptr[3]; } + if (is_valid_ether_addr(override_mac)) + memcpy(wl->mac_addr, override_mac, sizeof(wl->mac_addr)); + SET_IEEE80211_PERM_ADDR(wl->hw, wl->mac_addr); ret = ieee80211_register_hw(wl->hw); diff --git a/drivers/net/wireless/wl12xx/sdio.c b/drivers/net/wireless/wl12xx/sdio.c index 536e506..5bd82f2 100644 --- a/drivers/net/wireless/wl12xx/sdio.c +++ b/drivers/net/wireless/wl12xx/sdio.c @@ -303,6 +303,7 @@ static int __devinit wl1271_probe(struct sdio_func *func, /* Tell PM core that we don't need the card to be powered now */ pm_runtime_put_noidle(&func->dev); + wl->set_power = wlan_data->set_power; wl1271_notice("initialized"); return 0; diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig old mode 100755 new mode 100644 diff --git a/drivers/power/Makefile b/drivers/power/Makefile old mode 100755 new mode 100644 diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig old mode 100755 new mode 100644 diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile old mode 100755 new mode 100644 diff --git a/drivers/regulator/da9052-regulator.c b/drivers/regulator/da9052-regulator.c old mode 100755 new mode 100644 diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig old mode 100755 new mode 100644 diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile old mode 100755 new mode 100644 diff --git a/drivers/rtc/rtc-da9052.c b/drivers/rtc/rtc-da9052.c old mode 100755 new mode 100644 diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index 8a66f3e..96df580 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c @@ -1212,9 +1212,12 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios, { struct imx_port *sport = (struct imx_port *)port; unsigned long flags; - unsigned int ucr2, old_ucr1, old_txrxen, baud, quot; + unsigned new_ucr2, old_ucr2; + unsigned new_ufcr, old_ufcr; + unsigned old_ubir, old_ubmr; + unsigned int baud, quot; unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8; - unsigned int div, ufcr; + unsigned int div; unsigned long num, denom; uint64_t tdiv64; @@ -1237,26 +1240,25 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios, old_csize = CS8; } + new_ucr2 = UCR2_SRST | UCR2_IRTS; if ((termios->c_cflag & CSIZE) == CS8) - ucr2 = UCR2_WS | UCR2_SRST | UCR2_IRTS; - else - ucr2 = UCR2_SRST | UCR2_IRTS; + new_ucr2 |= UCR2_WS; if (termios->c_cflag & CRTSCTS) { if( sport->have_rtscts ) { - ucr2 &= ~UCR2_IRTS; - ucr2 |= UCR2_CTSC; + new_ucr2 &= ~UCR2_IRTS; + new_ucr2 |= UCR2_CTSC; } else { termios->c_cflag &= ~CRTSCTS; } } if (termios->c_cflag & CSTOPB) - ucr2 |= UCR2_STPB; + new_ucr2 |= UCR2_STPB; if (termios->c_cflag & PARENB) { - ucr2 |= UCR2_PREN; + new_ucr2 |= UCR2_PREN; if (termios->c_cflag & PARODD) - ucr2 |= UCR2_PROE; + new_ucr2 |= UCR2_PROE; } /* @@ -1269,7 +1271,7 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios, spin_lock_irqsave(&sport->port.lock, flags); - sport->port.read_status_mask = 0; + sport->port.read_status_mask = 0xff; if (termios->c_iflag & INPCK) sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR); if (termios->c_iflag & (BRKINT | PARMRK)) @@ -1296,22 +1298,6 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios, */ uart_update_timeout(port, termios->c_cflag, baud); - /* - * disable interrupts and drain transmitter - */ - old_ucr1 = readl(sport->port.membase + UCR1); - writel(old_ucr1 & ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN), - sport->port.membase + UCR1); - - while ( !(readl(sport->port.membase + USR2) & USR2_TXDC)) - barrier(); - - /* then, disable everything */ - old_txrxen = readl(sport->port.membase + UCR2); - writel(old_txrxen & ~( UCR2_TXEN | UCR2_RXEN), - sport->port.membase + UCR2); - old_txrxen &= (UCR2_TXEN | UCR2_RXEN); - if (USE_IRDA(sport)) { /* * use maximum available submodule frequency to @@ -1338,31 +1324,47 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios, num -= 1; denom -= 1; - ufcr = readl(sport->port.membase + UFCR); - ufcr = (ufcr & (~UFCR_RFDIV)) | UFCR_RFDIV_REG(div); + old_ufcr = readl(sport->port.membase + UFCR); + new_ufcr = (old_ufcr & (~UFCR_RFDIV)) | UFCR_RFDIV_REG(div); - if (sport->use_dcedte) - ufcr |= UFCR_DCEDTE; - - writel(ufcr, sport->port.membase + UFCR); + old_ubir = readl(sport->port.membase + UBIR); + old_ubmr = readl(sport->port.membase + UBMR); + old_ucr2 = readl(sport->port.membase + UCR2) & ~UCR2_CTS; + new_ucr2 |= old_ucr2 & (UCR2_TXEN | UCR2_RXEN); - writel(num, sport->port.membase + UBIR); - writel(denom, sport->port.membase + UBMR); + if (sport->use_dcedte) + new_ufcr |= UFCR_DCEDTE; + if ((old_ufcr != new_ufcr) || (old_ucr2 != new_ucr2) || + (old_ubir != num) || (old_ubmr != denom)) { + int i; + /* software reset */ + writel(readl(sport->port.membase + UCR2) & + ~(UCR2_TXEN | UCR2_RXEN | UCR2_SRST | UCR2_CTS), + sport->port.membase + UCR2); + for (i = 0; i < 2000; i++) { + unsigned uts = readl(sport->port.membase + UTS); + if (!(uts & UTS_SOFTRST)) + break; + } + writel(new_ufcr, sport->port.membase + UFCR); + writel(num, sport->port.membase + UBIR); + writel(denom, sport->port.membase + UBMR); - if (!cpu_is_mx1()) - writel(sport->port.uartclk / div / 1000, + if (!cpu_is_mx1()) + writel(sport->port.uartclk / div / 1000, sport->port.membase + MX2_ONEMS); - writel(old_ucr1, sport->port.membase + UCR1); + /* set the parity, stop bits and data size */ + writel(new_ucr2, sport->port.membase + UCR2); - /* set the parity, stop bits and data size */ - writel(ucr2 | old_txrxen, sport->port.membase + UCR2); + if (UART_ENABLE_MS(&sport->port, termios->c_cflag)) + imx_enable_ms(&sport->port); + pr_info("old_ufcr=%x new_ufcr=%x, old_ucr2=%x new_ucr2=%x, old_ubir=%x num=%lx, old_ubmr=%x denom=%lx\n", + old_ufcr, new_ufcr, old_ucr2, new_ucr2, old_ubir, num, old_ubmr, denom); + pr_info("clk=%i div=%i num=%li denom=%li baud=%i\n", sport->port.uartclk, div, num+1, denom+1, baud); + } spin_unlock_irqrestore(&sport->port.lock, flags); - - if (UART_ENABLE_MS(&sport->port, termios->c_cflag)) - imx_enable_ms(&sport->port); - } static const char *imx_type(struct uart_port *port) diff --git a/drivers/tty/serial/mxc_uart_early.c b/drivers/tty/serial/mxc_uart_early.c index ffa3660..443dff5 100644 --- a/drivers/tty/serial/mxc_uart_early.c +++ b/drivers/tty/serial/mxc_uart_early.c @@ -183,7 +183,7 @@ int __init mxc_early_uart_console_disable(void) if (mxc_early_uart_console.index >= 0) { unregister_console(&mxc_early_uart_console); iounmap(port->membase); - clk_disable(device->clk); +// clk_disable(device->clk); clk_put(device->clk); } return 0; diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig old mode 100755 new mode 100644 diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile old mode 100755 new mode 100644 diff --git a/drivers/usb/gadget/arcotg_udc.c b/drivers/usb/gadget/arcotg_udc.c old mode 100755 new mode 100644 diff --git a/drivers/usb/gadget/arcotg_udc.h b/drivers/usb/gadget/arcotg_udc.h old mode 100755 new mode 100644 diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig old mode 100755 new mode 100644 diff --git a/drivers/usb/host/ehci-arc.c b/drivers/usb/host/ehci-arc.c old mode 100755 new mode 100644 diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h old mode 100755 new mode 100644 diff --git a/drivers/usb/otg/Kconfig b/drivers/usb/otg/Kconfig old mode 100755 new mode 100644 diff --git a/drivers/usb/otg/Makefile b/drivers/usb/otg/Makefile old mode 100755 new mode 100644 diff --git a/drivers/usb/otg/fsl_otg.c b/drivers/usb/otg/fsl_otg.c old mode 100755 new mode 100644 diff --git a/drivers/usb/otg/fsl_otg.h b/drivers/usb/otg/fsl_otg.h old mode 100755 new mode 100644 diff --git a/drivers/usb/otg/otg_fsm.c b/drivers/usb/otg/otg_fsm.c old mode 100755 new mode 100644 diff --git a/drivers/usb/otg/otg_fsm.h b/drivers/usb/otg/otg_fsm.h old mode 100755 new mode 100644 diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig old mode 100755 new mode 100644 diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile old mode 100755 new mode 100644 diff --git a/drivers/video/mxc/mxc_ipuv3_fb.c b/drivers/video/mxc/mxc_ipuv3_fb.c index 745c485..d8df225 100644 --- a/drivers/video/mxc/mxc_ipuv3_fb.c +++ b/drivers/video/mxc/mxc_ipuv3_fb.c @@ -830,6 +830,8 @@ static int mxcfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) vtotal = var->yres + var->lower_margin + var->vsync_len + var->upper_margin; var->pixclock = (vtotal * htotal * 6UL) / 100UL; + if (!var->pixclock) + var->pixclock = 1000; var->pixclock = KHZ2PICOS(var->pixclock); dev_dbg(info->device, "pixclock set for 60Hz refresh = %u ps\n", @@ -2229,7 +2231,7 @@ static int mxcfb_probe(struct platform_device *pdev) mxcfbi->ipu_ch_nf_irq = IPU_IRQ_DC_SYNC_NFACK; mxcfbi->ipu_alp_ch_irq = -1; mxcfbi->ipu_ch = MEM_DC_SYNC; - mxcfbi->cur_blank = mxcfbi->next_blank = FB_BLANK_POWERDOWN; + mxcfbi->cur_blank = mxcfbi->next_blank = FB_BLANK_UNBLANK; ret = mxcfb_register(fbi); if (ret < 0) diff --git a/drivers/video/mxc/mxcfb.c b/drivers/video/mxc/mxcfb.c index 4dffee5..a3f6476 100644 --- a/drivers/video/mxc/mxcfb.c +++ b/drivers/video/mxc/mxcfb.c @@ -346,6 +346,8 @@ static int mxcfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) vtotal = var->yres + var->lower_margin + var->vsync_len + var->upper_margin; var->pixclock = (vtotal * htotal * 6UL) / 100UL; + if (!var->pixclock) + var->pixclock = 1000; var->pixclock = KHZ2PICOS(var->pixclock); dev_dbg(info->device, "pixclock set for 60Hz refresh = %u ps\n", diff --git a/drivers/video/mxc/mxcfb_claa_wvga.c b/drivers/video/mxc/mxcfb_claa_wvga.c index 3dbad0d..4f15ba4 100644 --- a/drivers/video/mxc/mxcfb_claa_wvga.c +++ b/drivers/video/mxc/mxcfb_claa_wvga.c @@ -117,7 +117,7 @@ static struct notifier_block nb = { static int __devinit lcd_probe(struct platform_device *pdev) { int i; - struct mxc_lcd_platform_data *plat = pdev->dev.platform_data; + struct fsl_mxc_lcd_platform_data *plat = pdev->dev.platform_data; if (plat) { if (plat->reset) diff --git a/drivers/video/mxc_hdmi.c b/drivers/video/mxc_hdmi.c index a45c347..3d96dfa 100644 --- a/drivers/video/mxc_hdmi.c +++ b/drivers/video/mxc_hdmi.c @@ -1538,10 +1538,10 @@ static void mxc_hdmi_edid_rebuild_modelist(struct mxc_hdmi *hdmi) */ mode = &hdmi->fbi->monspecs.modedb[i]; - if (!(mode->vmode & FB_VMODE_INTERLACED) && - (mxc_edid_mode_to_vic(mode) != 0)) { + if (!(mode->vmode & FB_VMODE_INTERLACED)) { + int vic = mxc_edid_mode_to_vic(mode); - dev_dbg(&hdmi->pdev->dev, "Added mode %d:", i); + dev_info(&hdmi->pdev->dev, "%s: Added mode %d(VIC %u):", __func__, i, vic); dev_dbg(&hdmi->pdev->dev, "xres = %d, yres = %d, freq = %d, vmode = %d, flag = %d\n", hdmi->fbi->monspecs.modedb[i].xres, diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig old mode 100755 new mode 100644 diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile old mode 100755 new mode 100644 diff --git a/include/linux/fec.h b/include/linux/fec.h index 8f69cb5..7a08261 100644 --- a/include/linux/fec.h +++ b/include/linux/fec.h @@ -21,6 +21,7 @@ struct fec_platform_data { int (*power_hibernate) (struct phy_device *); phy_interface_t phy; unsigned char mac[ETH_ALEN]; + int phy_irq; }; #endif diff --git a/include/linux/mfd/da9052/da9052.h b/include/linux/mfd/da9052/da9052.h old mode 100755 new mode 100644 diff --git a/include/linux/mfd/da9052/tsi_filter.h b/include/linux/mfd/da9052/tsi_filter.h old mode 100755 new mode 100644 diff --git a/localversion b/localversion new file mode 100644 index 0000000..e02409d --- /dev/null +++ b/localversion @@ -0,0 +1 @@ +-2026-geaaf30e diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c index fd05514..45191d1 100644 --- a/sound/soc/codecs/sgtl5000.c +++ b/sound/soc/codecs/sgtl5000.c @@ -602,7 +602,7 @@ static const struct snd_kcontrol_new sgtl5000_snd_controls[] = { 5, 1, 0), SOC_SINGLE_TLV("Mic Volume", SGTL5000_CHIP_MIC_CTRL, - 0, 4, 0, mic_gain_tlv), + 0, 3, 0, mic_gain_tlv), /* Bass Enhance enable */ SOC_SINGLE("Bass Enable", SGTL5000_DAP_BASS_ENHANCE, @@ -1614,7 +1614,7 @@ static int sgtl5000_probe(struct snd_soc_codec *codec) SGTL5000_HP_ZCD_EN | SGTL5000_ADC_ZCD_EN); - snd_soc_write(codec, SGTL5000_CHIP_MIC_CTRL, 0); + snd_soc_write(codec, SGTL5000_CHIP_MIC_CTRL, 2); snd_soc_write(codec, SGTL5000_CHIP_DAC_VOL, 0x6060); snd_soc_write(codec, SGTL5000_CHIP_ANA_ADC_CTRL, diff --git a/tools/perf/util/include/linux/compiler.h b/tools/perf/util/include/linux/compiler.h index 547628e..791f9dd 100644 --- a/tools/perf/util/include/linux/compiler.h +++ b/tools/perf/util/include/linux/compiler.h @@ -5,9 +5,7 @@ #define __always_inline inline #endif #define __user -#ifndef __attribute_const__ #define __attribute_const__ -#endif #define __used __attribute__((__unused__))