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Diffstat (limited to 'recipes-bsp/u-boot/u-boot-v2012.04.01/0049-i.MX28-Shut-down-the-LCD-controller-before-reset.patch')
-rw-r--r--recipes-bsp/u-boot/u-boot-v2012.04.01/0049-i.MX28-Shut-down-the-LCD-controller-before-reset.patch43
1 files changed, 43 insertions, 0 deletions
diff --git a/recipes-bsp/u-boot/u-boot-v2012.04.01/0049-i.MX28-Shut-down-the-LCD-controller-before-reset.patch b/recipes-bsp/u-boot/u-boot-v2012.04.01/0049-i.MX28-Shut-down-the-LCD-controller-before-reset.patch
new file mode 100644
index 0000000..724477f
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot-v2012.04.01/0049-i.MX28-Shut-down-the-LCD-controller-before-reset.patch
@@ -0,0 +1,43 @@
+From 589511bd8e847c1990216aa89e56dca0fabac4e2 Mon Sep 17 00:00:00 2001
+From: Marek Vasut <marex@denx.de>
+Date: Tue, 1 May 2012 11:09:47 +0000
+Subject: [PATCH 49/56] i.MX28: Shut down the LCD controller before reset
+
+If the LCD controller is on before the CPU goes into reset, the traffic on LCDIF
+data pins interferes with the BootROM's boot mode sampling. So shut the
+controller down.
+
+Signed-off-by: Marek Vasut <marex@denx.de>
+Cc: Detlev Zundel <dzu@denx.de>
+Cc: Fabio Estevam <festevam@gmail.com>
+Cc: Stefano Babic <sbabic@denx.de>
+Cc: Wolfgang Denk <wd@denx.de>
+---
+ arch/arm/cpu/arm926ejs/mx28/mx28.c | 9 ++++++++-
+ 1 file changed, 8 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c b/arch/arm/cpu/arm926ejs/mx28/mx28.c
+index 865dbb3..a82ff25 100644
+--- a/arch/arm/cpu/arm926ejs/mx28/mx28.c
++++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c
+@@ -51,9 +51,16 @@ void reset_cpu(ulong ignored) __attribute__((noreturn));
+
+ void reset_cpu(ulong ignored)
+ {
+-
+ struct mx28_rtc_regs *rtc_regs =
+ (struct mx28_rtc_regs *)MXS_RTC_BASE;
++ struct mx28_lcdif_regs *lcdif_regs =
++ (struct mx28_lcdif_regs *)MXS_LCDIF_BASE;
++
++ /*
++ * Shut down the LCD controller as it interferes with BootROM boot mode
++ * pads sampling.
++ */
++ writel(LCDIF_CTRL_RUN, &lcdif_regs->hw_lcdif_ctrl_clr);
+
+ /* Wait 1 uS before doing the actual watchdog reset */
+ writel(1, &rtc_regs->hw_rtc_watchdog);
+--
+1.7.10
+