1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
|
From f3caa583548e36334891974a337d7e932d4260b3 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= <marek.olsak@amd.com>
Date: Thu, 16 Apr 2015 20:15:16 +0200
Subject: [PATCH 02/29] gallium/radeon: print winsys info with R600_DEBUG=info
Signed-off-by: Arindam Nath <arindam.nath@amd.com>
---
src/gallium/drivers/radeon/r600_pipe_common.c | 27 +++++++++++++++++++++++++++
src/gallium/drivers/radeon/r600_pipe_common.h | 1 +
2 files changed, 28 insertions(+)
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index 2b27e0a..c6d7918 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -306,6 +306,7 @@ static const struct debug_named_value common_debug_options[] = {
{ "compute", DBG_COMPUTE, "Print compute info" },
{ "vm", DBG_VM, "Print virtual addresses when creating resources" },
{ "trace_cs", DBG_TRACE_CS, "Trace cs and write rlockup_<csid>.c file with faulty cs" },
+ { "info", DBG_INFO, "Print driver information" },
/* shaders */
{ "fs", DBG_FS, "Print fetch shaders" },
@@ -874,6 +875,32 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
}
}
+ if (rscreen->debug_flags & DBG_INFO) {
+ printf("pci_id = 0x%x\n", rscreen->info.pci_id);
+ printf("family = %i\n", rscreen->info.family);
+ printf("chip_class = %i\n", rscreen->info.chip_class);
+ printf("gart_size = %i MB\n", (int)(rscreen->info.gart_size >> 20));
+ printf("vram_size = %i MB\n", (int)(rscreen->info.vram_size >> 20));
+ printf("max_sclk = %i\n", rscreen->info.max_sclk);
+ printf("max_compute_units = %i\n", rscreen->info.max_compute_units);
+ printf("max_se = %i\n", rscreen->info.max_se);
+ printf("max_sh_per_se = %i\n", rscreen->info.max_sh_per_se);
+ printf("drm = %i.%i.%i\n", rscreen->info.drm_major,
+ rscreen->info.drm_minor, rscreen->info.drm_patchlevel);
+ printf("has_uvd = %i\n", rscreen->info.has_uvd);
+ printf("vce_fw_version = %i\n", rscreen->info.vce_fw_version);
+ printf("r600_num_backends = %i\n", rscreen->info.r600_num_backends);
+ printf("r600_clock_crystal_freq = %i\n", rscreen->info.r600_clock_crystal_freq);
+ printf("r600_tiling_config = 0x%x\n", rscreen->info.r600_tiling_config);
+ printf("r600_num_tile_pipes = %i\n", rscreen->info.r600_num_tile_pipes);
+ printf("r600_max_pipes = %i\n", rscreen->info.r600_max_pipes);
+ printf("r600_virtual_address = %i\n", rscreen->info.r600_virtual_address);
+ printf("r600_has_dma = %i\n", rscreen->info.r600_has_dma);
+ printf("r600_backend_map = %i\n", rscreen->info.r600_backend_map);
+ printf("r600_backend_map_valid = %i\n", rscreen->info.r600_backend_map_valid);
+ printf("si_tile_mode_array_valid = %i\n", rscreen->info.si_tile_mode_array_valid);
+ printf("cik_macrotile_mode_array_valid = %i\n", rscreen->info.cik_macrotile_mode_array_valid);
+ }
return true;
}
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index febd2a1..384a9a6 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -84,6 +84,7 @@
#define DBG_SWITCH_ON_EOP (1 << 15)
#define DBG_FORCE_DMA (1 << 16)
#define DBG_PRECOMPILE (1 << 17)
+#define DBG_INFO (1 << 18)
/* The maximum allowed bit is 20. */
#define R600_MAP_BUFFER_ALIGNMENT 64
--
1.9.1
|
