1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
|
From f36c094defe7bd0228b001f8d7381f329e68b11d Mon Sep 17 00:00:00 2001
From: Harry Wentland <harry.wentland@amd.com>
Date: Tue, 27 Jun 2017 14:35:17 -0400
Subject: [PATCH 0577/4131] drm/amd/display: Hook dm private state into
atomic_check
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
.../drm/amd/display/amdgpu_dm/amdgpu_dm_types.c | 64 +++++++++++-----------
.../drm/amd/display/amdgpu_dm/amdgpu_dm_types.h | 5 ++
2 files changed, 37 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
index a64ebf3..ffa4eeb 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
@@ -3107,15 +3107,14 @@ static int do_aquire_global_lock(
int amdgpu_dm_atomic_check(struct drm_device *dev,
struct drm_atomic_state *state)
{
+ struct dm_atomic_state *dm_state;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
struct drm_plane *plane;
struct drm_plane_state *plane_state;
int i, j;
int ret;
- int set_count;
int new_stream_count;
- struct dc_validation_set set[MAX_STREAMS] = {{ 0 }};
struct dc_stream *new_streams[MAX_STREAMS] = { 0 };
struct drm_crtc *crtc_set[MAX_STREAMS] = { 0 };
struct amdgpu_device *adev = dev->dev_private;
@@ -3140,17 +3139,19 @@ int amdgpu_dm_atomic_check(struct drm_device *dev,
ret = -EINVAL;
+ dm_state = to_dm_atomic_state(state);
+
/* copy existing configuration */
new_stream_count = 0;
- set_count = 0;
+ dm_state->set_count = 0;
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
if (acrtc->stream) {
- set[set_count].stream = acrtc->stream;
- crtc_set[set_count] = crtc;
- ++set_count;
+ dm_state->set[dm_state->set_count].stream = acrtc->stream;
+ crtc_set[dm_state->set_count] = crtc;
+ ++dm_state->set_count;
}
}
@@ -3179,16 +3180,16 @@ int amdgpu_dm_atomic_check(struct drm_device *dev,
struct dc_stream *new_stream = NULL;
struct drm_connector_state *conn_state = NULL;
- struct dm_connector_state *dm_state = NULL;
+ struct dm_connector_state *dm_conn_state = NULL;
if (aconnector) {
conn_state = drm_atomic_get_connector_state(state, &aconnector->base);
if (IS_ERR(conn_state))
return ret;
- dm_state = to_dm_connector_state(conn_state);
+ dm_conn_state = to_dm_connector_state(conn_state);
}
- new_stream = create_stream_for_sink(aconnector, &crtc_state->mode, dm_state);
+ new_stream = create_stream_for_sink(aconnector, &crtc_state->mode, dm_conn_state);
/*
* we can have no stream on ACTION_SET if a display
@@ -3203,10 +3204,10 @@ int amdgpu_dm_atomic_check(struct drm_device *dev,
}
new_streams[new_stream_count] = new_stream;
- set_count = update_in_val_sets_stream(
- set,
+ dm_state->set_count = update_in_val_sets_stream(
+ dm_state->set,
crtc_set,
- set_count,
+ dm_state->set_count,
acrtc->stream,
new_stream,
crtc);
@@ -3219,9 +3220,9 @@ int amdgpu_dm_atomic_check(struct drm_device *dev,
/* i.e. reset mode */
if (acrtc->stream) {
- set_count = remove_from_val_sets(
- set,
- set_count,
+ dm_state->set_count = remove_from_val_sets(
+ dm_state->set,
+ dm_state->set_count,
acrtc->stream);
aquire_global_lock = true;
}
@@ -3272,10 +3273,10 @@ int amdgpu_dm_atomic_check(struct drm_device *dev,
}
new_streams[new_stream_count] = new_stream;
- set_count = update_in_val_sets_stream(
- set,
+ dm_state->set_count = update_in_val_sets_stream(
+ dm_state->set,
crtc_set,
- set_count,
+ dm_state->set_count,
acrtc->stream,
new_stream,
&acrtc->base);
@@ -3285,12 +3286,12 @@ int amdgpu_dm_atomic_check(struct drm_device *dev,
aquire_global_lock = true;
}
- for (i = 0; i < set_count; i++) {
+ for (i = 0; i < dm_state->set_count; i++) {
for_each_plane_in_state(state, plane, plane_state, j) {
struct drm_crtc *crtc = plane_state->crtc;
struct drm_framebuffer *fb = plane_state->fb;
struct drm_connector *connector;
- struct dm_connector_state *dm_state = NULL;
+ struct dm_connector_state *dm_conn_state = NULL;
struct drm_crtc_state *crtc_state;
bool pflip_needed;
@@ -3311,7 +3312,7 @@ int amdgpu_dm_atomic_check(struct drm_device *dev,
list_for_each_entry(connector,
&dev->mode_config.connector_list, head) {
if (connector->state->crtc == crtc) {
- dm_state = to_dm_connector_state(
+ dm_conn_state = to_dm_connector_state(
connector->state);
break;
}
@@ -3331,7 +3332,7 @@ int amdgpu_dm_atomic_check(struct drm_device *dev,
* Also it should be needed when used with actual
* drm_atomic_commit ioctl in future
*/
- if (!dm_state)
+ if (!dm_conn_state)
continue;
surface = dc_create_surface(dc);
@@ -3341,11 +3342,10 @@ int amdgpu_dm_atomic_check(struct drm_device *dev,
plane_state,
false);
- add_val_sets_surface(
- set,
- set_count,
- set[i].stream,
- surface);
+ add_val_sets_surface(dm_state->set,
+ dm_state->set_count,
+ dm_state->set[i].stream,
+ surface);
need_to_validate = true;
aquire_global_lock = true;
@@ -3353,9 +3353,9 @@ int amdgpu_dm_atomic_check(struct drm_device *dev,
}
}
- context = dc_get_validate_context(dc, set, set_count);
+ context = dc_get_validate_context(dc, dm_state->set, dm_state->set_count);
- if (need_to_validate == false || set_count == 0 || context) {
+ if (need_to_validate == false || dm_state->set_count == 0 || context) {
ret = 0;
/*
@@ -3377,9 +3377,9 @@ int amdgpu_dm_atomic_check(struct drm_device *dev,
dm_free(context);
}
- for (i = 0; i < set_count; i++)
- for (j = 0; j < set[i].surface_count; j++)
- dc_surface_release(set[i].surfaces[j]);
+ for (i = 0; i < dm_state->set_count; i++)
+ for (j = 0; j < dm_state->set[i].surface_count; j++)
+ dc_surface_release(dm_state->set[i].surfaces[j]);
for (i = 0; i < new_stream_count; i++)
dc_stream_release(new_streams[i]);
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.h
index 9ba7fdd..a7adf8d 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.h
@@ -28,6 +28,7 @@
#include <drm/drmP.h>
#include <drm/drm_atomic.h>
+#include "dc.h"
struct amdgpu_framebuffer;
struct amdgpu_display_manager;
@@ -51,6 +52,10 @@ struct dm_crtc_state {
struct dm_atomic_state {
struct drm_atomic_state base;
+
+ struct dc_validation_set set[MAX_STREAMS];
+ int set_count;
+
};
#define to_dm_atomic_state(x) container_of(x, struct dm_atomic_state, base)
--
2.7.4
|
