1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
|
From 2256c20adc12c1c36e3d4ee9637e8637d37cfd0a Mon Sep 17 00:00:00 2001
From: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Date: Fri, 16 Jun 2017 11:27:59 -0400
Subject: [PATCH 0529/4131] drm/amd/display: add pipe split disable regkey
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 2 +-
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 4 ++--
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
index 2b62efc..0aa6662 100644
--- a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
+++ b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
@@ -791,7 +791,7 @@ bool dcn_validate_bandwidth(
v->phyclk_per_state[1] = v->phyclkv_mid0p72;
v->phyclk_per_state[0] = v->phyclkv_min0p65;
- if (dc->public.debug.use_max_voltage) {
+ if (dc->public.debug.disable_pipe_split) {
v->max_dppclk[1] = v->max_dppclk_vnom0p8;
v->max_dppclk[0] = v->max_dppclk_vnom0p8;
}
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 52c3600..62493c4 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -170,7 +170,7 @@ struct dc_debug {
bool disable_hubp_power_gate;
bool disable_pplib_wm_range;
bool use_dml_wm;
- bool use_max_voltage;
+ bool disable_pipe_split;
int sr_exit_time_ns;
int sr_enter_plus_exit_time_ns;
int urgent_latency_ns;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
index 77fc251..c7840e0 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
@@ -443,7 +443,7 @@ static const struct dc_debug debug_defaults_drv = {
.disable_pplib_wm_range = false,
#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
.use_dml_wm = false,
- .use_max_voltage = false
+ .disable_pipe_split = false
#endif
};
@@ -456,7 +456,7 @@ static const struct dc_debug debug_defaults_diags = {
.disable_pplib_clock_request = true,
.disable_pplib_wm_range = true,
.use_dml_wm = false,
- .use_max_voltage = false
+ .disable_pipe_split = false
#endif
};
--
2.7.4
|
