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From 4ba3f70cc83139c0ddaaa8516e88f7a5aa4e5045 Mon Sep 17 00:00:00 2001
From: Roman Li <Roman.Li@amd.com>
Date: Wed, 17 May 2017 12:07:30 -0400
Subject: [PATCH 0439/4131] drm/amd/display: Fix 5th display lightup on Vega10
- fixing bug in calculation of reg offset for D5VGA_CONTROL
Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
index 245356e..dc8eeac 100644
--- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
+++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
@@ -410,7 +410,7 @@ void dce120_timing_generator_disable_vga(struct timing_generator *tg)
break;
case CONTROLLER_ID_D4:
addr = mmD1VGA_CONTROL;
- offset = mmD1VGA_CONTROL - mmD1VGA_CONTROL;
+ offset = mmD5VGA_CONTROL - mmD1VGA_CONTROL;
break;
case CONTROLLER_ID_D5:
addr = mmD6VGA_CONTROL;
--
2.7.4
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