blob: d357bf7c098805e26eaab2f60bbc936d9aed58e5 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
|
From ece051c297452eae2d17da2d7fc529bcb497d2ce Mon Sep 17 00:00:00 2001
From: Yongqiang Sun <yongqiang.sun@amd.com>
Date: Fri, 5 May 2017 16:33:11 -0400
Subject: [PATCH 0415/4131] drm/amd/display: Add 64KB_S_T and 64KB_D_T swizzle
mode.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
index 1b9edfd..26587bc 100644
--- a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
+++ b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
@@ -236,6 +236,7 @@ static void pipe_ctx_to_e2e_pipe_params (
break;
case DC_SW_64KB_S:
case DC_SW_64KB_S_X:
+ case DC_SW_64KB_S_T:
input->src.is_display_sw = 0;
input->src.macro_tile_size = dm_64k_tile;
break;
@@ -253,6 +254,7 @@ static void pipe_ctx_to_e2e_pipe_params (
break;
case DC_SW_64KB_D:
case DC_SW_64KB_D_X:
+ case DC_SW_64KB_D_T:
input->src.is_display_sw = 1;
input->src.macro_tile_size = dm_64k_tile;
break;
--
2.7.4
|
