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From 09305e5664e48cfa98145829fef4496c17dc49b1 Mon Sep 17 00:00:00 2001
From: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Date: Wed, 8 Feb 2017 15:58:50 -0500
Subject: [PATCH 0292/4131] drm/amd/display: Fix gfx9 parameters reading for
DC.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
index 4c45d03..03f92de 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
@@ -535,6 +535,8 @@ static void fill_plane_attributes_from_fb(
adev->gfx.config.gb_addr_config_fields.num_se;
surface->tiling_info.gfx9.max_compressed_frags =
adev->gfx.config.gb_addr_config_fields.max_compress_frags;
+ surface->tiling_info.gfx9.num_rb_per_se =
+ adev->gfx.config.gb_addr_config_fields.num_rb_per_se;
surface->tiling_info.gfx9.swizzle =
AMDGPU_TILING_GET(tiling_flags, SWIZZLE_MODE);
surface->tiling_info.gfx9.shaderEnable = 1;
--
2.7.4
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