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From dfbff23581f4b29f5d87c2779e20219f521dc014 Mon Sep 17 00:00:00 2001
From: Charlene Liu <charlene.liu@amd.com>
Date: Thu, 16 Feb 2017 22:28:46 -0500
Subject: [PATCH 0225/4131] drm/amd/display: audio bug fix part 1: Add missing
audio ACR
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/display/dc/dce/dce_audio.c | 8 +--
drivers/gpu/drm/amd/display/dc/dce/dce_audio.h | 2 +
.../gpu/drm/amd/display/dc/dce/dce_link_encoder.c | 2 +
.../drm/amd/display/dc/dce/dce_stream_encoder.c | 81 +++++++++++++++-------
.../amd/display/dc/dce110/dce110_hw_sequencer.c | 31 +++++++++
.../drm/amd/display/dc/dce110/dce110_resource.c | 1 +
6 files changed, 95 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_audio.c b/drivers/gpu/drm/amd/display/dc/dce/dce_audio.c
index 2749c8f..596e039 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_audio.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_audio.c
@@ -828,11 +828,9 @@ void dce_aud_wall_dto_setup(
REG_UPDATE(DCCG_AUDIO_DTO1_PHASE,
DCCG_AUDIO_DTO1_PHASE, clock_info.audio_dto_phase);
- /* DAL2 code separate DCCG_AUDIO_DTO_SEL and
- DCCG_AUDIO_DTO2_USE_512FBR_DTO programming into two different
- location. merge together should not hurt */
- /*value.bits.DCCG_AUDIO_DTO2_USE_512FBR_DTO = 1;
- dal_write_reg(mmDCCG_AUDIO_DTO_SOURCE, value);*/
+ REG_UPDATE(DCCG_AUDIO_DTO_SOURCE,
+ DCCG_AUDIO_DTO2_USE_512FBR_DTO, 1);
+
}
}
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_audio.h b/drivers/gpu/drm/amd/display/dc/dce/dce_audio.h
index c244887..b98ee2d 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_audio.h
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_audio.h
@@ -93,6 +93,7 @@ struct dce_audio_shift {
uint8_t DCCG_AUDIO_DTO0_PHASE;
uint8_t DCCG_AUDIO_DTO1_MODULE;
uint8_t DCCG_AUDIO_DTO1_PHASE;
+ uint8_t DCCG_AUDIO_DTO2_USE_512FBR_DTO;
};
struct dce_aduio_mask {
@@ -109,6 +110,7 @@ struct dce_aduio_mask {
uint32_t DCCG_AUDIO_DTO0_PHASE;
uint32_t DCCG_AUDIO_DTO1_MODULE;
uint32_t DCCG_AUDIO_DTO1_PHASE;
+ uint32_t DCCG_AUDIO_DTO2_USE_512FBR_DTO;
};
struct dce_audio {
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
index 60fdf58..305a9d8 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
@@ -871,6 +871,8 @@ static bool dce110_link_encoder_validate_hdmi_output(
if (max_deep_color < crtc_timing->display_color_depth)
return false;
+ if (crtc_timing->display_color_depth < COLOR_DEPTH_888)
+ return false;
if (adjusted_pix_clk_khz < TMDS_MIN_PIXEL_CLOCK)
return false;
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
index a28d9c7..aba392f 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
@@ -848,7 +848,7 @@ struct audio_clock_info {
/* 148.5MHz/1.001*/
/* 148.5MHz*/
-static const struct audio_clock_info audio_clock_info_table[12] = {
+static const struct audio_clock_info audio_clock_info_table[16] = {
{2517, 4576, 28125, 7007, 31250, 6864, 28125},
{2518, 4576, 28125, 7007, 31250, 6864, 28125},
{2520, 4096, 25200, 6272, 28000, 6144, 25200},
@@ -860,37 +860,63 @@ static const struct audio_clock_info audio_clock_info_table[12] = {
{7417, 11648, 210937, 17836, 234375, 11648, 140625},
{7425, 4096, 74250, 6272, 82500, 6144, 74250},
{14835, 11648, 421875, 8918, 234375, 5824, 140625},
- {14850, 4096, 148500, 6272, 165000, 6144, 148500}
+ {14850, 4096, 148500, 6272, 165000, 6144, 148500},
+ {29670, 5824, 421875, 4459, 234375, 5824, 281250},
+ {29700, 3072, 222750, 4704, 247500, 5120, 247500},
+ {59340, 5824, 843750, 8918, 937500, 5824, 562500},
+ {59400, 3072, 445500, 9408, 990000, 6144, 594000}
};
-static const struct audio_clock_info audio_clock_info_table_36bpc[12] = {
- {2517, 9152, 84375, 7007, 48875, 9152, 56250},
- {2518, 9152, 84375, 7007, 48875, 9152, 56250},
- {2520, 4096, 37800, 6272, 42000, 6144, 37800},
- {2700, 4096, 40500, 6272, 45000, 6144, 40500},
- {2702, 8192, 81081, 6272, 45045, 8192, 54054},
- {2703, 8192, 81081, 6272, 45045, 8192, 54054},
- {5400, 4096, 81000, 6272, 90000, 6144, 81000},
- {5405, 4096, 81081, 6272, 90090, 6144, 81081},
+static const struct audio_clock_info audio_clock_info_table_30bpc[14] = {
+ {2517, 9152, 70312, 14014, 78125, 9152, 46875},
+ {2518, 9152, 70312, 14014, 78125, 9152, 46875},
+ {2520, 4096, 31500, 6272, 35000, 6144, 31500},
+ {2700, 4096, 33750, 6272, 37500, 6144, 33750},
+ {2702, 8192, 67567, 12544, 75075, 8192, 45045},
+ {2703, 8192, 67567, 12544, 75075, 8192, 45045},
+ {5400, 4096, 67500, 6272, 75000, 6144, 67500},
+ {5405, 8192, 135135, 6272, 75075, 8192, 90090},
+ {7417, 11648, 263672, 17836, 292969, 11648, 175181},
+ {7425, 8192, 185625, 6272, 103125, 12288, 185625},
+ {14835, 11648, 527344, 17836, 585938, 11648, 351563},
+ {14850, 4096, 185625, 6272, 206250, 6144, 185625},
+ {29670, 11648, 527344, 17836, 585938, 11648, 703125},
+ {29700, 6144, 556875, 4704, 309375, 5120, 309375}
+};
+static const struct audio_clock_info audio_clock_info_table_36bpc[14] = {
+ {2517, 9152, 84375, 7007, 48875, 9152, 56250},
+ {2518, 9152, 84375, 7007, 48875, 9152, 56250},
+ {2520, 4096, 37800, 6272, 42000, 6144, 37800},
+ {2700, 4096, 40500, 6272, 45000, 6144, 40500},
+ {2702, 8192, 81081, 6272, 45045, 8192, 54054},
+ {2703, 8192, 81081, 6272, 45045, 8192, 54054},
+ {5400, 4096, 81000, 6272, 90000, 6144, 81000},
+ {5405, 4096, 81081, 6272, 90090, 6144, 81081},
{7417, 11648, 316406, 17836, 351562, 11648, 210937},
- {7425, 4096, 111375, 6272, 123750, 6144, 111375},
+ {7425, 4096, 111375, 6272, 123750, 6144, 111375},
{14835, 11648, 632812, 17836, 703125, 11648, 421875},
- {14850, 4096, 222750, 6272, 247500, 6144, 222750}
+ {14850, 4096, 222750, 6272, 247500, 6144, 222750},
+ {29670, 5824, 632812, 8918, 703125, 5824, 421875},
+ {29700, 4096, 445500, 4704, 371250, 5120, 371250}
};
-static const struct audio_clock_info audio_clock_info_table_48bpc[12] = {
- {2517, 4576, 56250, 7007, 62500, 6864, 56250},
- {2518, 4576, 56250, 7007, 62500, 6864, 56250},
- {2520, 4096, 50400, 6272, 56000, 6144, 50400},
- {2700, 4096, 54000, 6272, 60000, 6144, 54000},
- {2702, 4096, 54054, 6267, 60060, 8192, 54054},
- {2703, 4096, 54054, 6272, 60060, 8192, 54054},
- {5400, 4096, 108000, 6272, 120000, 6144, 108000},
- {5405, 4096, 108108, 6272, 120120, 6144, 108108},
+static const struct audio_clock_info audio_clock_info_table_48bpc[14] = {
+ {2517, 4576, 56250, 7007, 62500, 6864, 56250},
+ {2518, 4576, 56250, 7007, 62500, 6864, 56250},
+ {2520, 4096, 50400, 6272, 56000, 6144, 50400},
+ {2700, 4096, 54000, 6272, 60000, 6144, 54000},
+ {2702, 4096, 54054, 6267, 60060, 8192, 54054},
+ {2703, 4096, 54054, 6272, 60060, 8192, 54054},
+ {5400, 4096, 108000, 6272, 120000, 6144, 108000},
+ {5405, 4096, 108108, 6272, 120120, 6144, 108108},
{7417, 11648, 421875, 17836, 468750, 11648, 281250},
- {7425, 4096, 148500, 6272, 165000, 6144, 148500},
- {14835, 11648, 843750, 8918, 468750, 11648, 281250},
- {14850, 4096, 297000, 6272, 330000, 6144, 297000}
+ {7425, 4096, 148500, 6272, 165000, 6144, 148500},
+ {14835, 11648, 843750, 8918, 468750, 11648, 281250},
+ {14850, 4096, 297000, 6272, 330000, 6144, 297000},
+ {29670, 5824, 843750, 4459, 468750, 5824, 562500},
+ {29700, 3072, 445500, 4704, 495000, 5120, 495000}
+
+
};
union audio_cea_channels speakers_to_channels(
@@ -973,6 +999,11 @@ bool get_audio_clock_info(
audio_array_size = ARRAY_SIZE(
audio_clock_info_table_36bpc);
break;
+ case COLOR_DEPTH_101010:
+ clock_info = audio_clock_info_table_30bpc;
+ audio_array_size = ARRAY_SIZE(
+ audio_clock_info_table_30bpc);
+ break;
default:
clock_info = audio_clock_info_table;
audio_array_size = ARRAY_SIZE(
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index 9c9183f..76a397d 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -868,6 +868,37 @@ static void build_audio_output(
audio_output->crtc_info.calculated_pixel_clock =
pipe_ctx->pix_clk_params.requested_pix_clk;
+/*for HDMI, audio ACR is with deep color ratio factor*/
+ if (dc_is_hdmi_signal(pipe_ctx->stream->signal) &&
+ audio_output->crtc_info.requested_pixel_clock ==
+ stream->public.timing.pix_clk_khz) {
+ if (pipe_ctx->pix_clk_params.pixel_encoding == PIXEL_ENCODING_YCBCR420) {
+ audio_output->crtc_info.requested_pixel_clock =
+ audio_output->crtc_info.requested_pixel_clock/2;
+ audio_output->crtc_info.calculated_pixel_clock =
+ pipe_ctx->pix_clk_params.requested_pix_clk/2;
+ }
+
+ if (pipe_ctx->pix_clk_params.pixel_encoding != PIXEL_ENCODING_YCBCR422) {
+ switch (pipe_ctx->pix_clk_params.color_depth) {
+ case COLOR_DEPTH_888:
+ break;
+ case COLOR_DEPTH_101010:
+ audio_output->crtc_info.calculated_pixel_clock = (audio_output->crtc_info.calculated_pixel_clock * 30) / 24;
+ break;
+ case COLOR_DEPTH_121212:
+ audio_output->crtc_info.calculated_pixel_clock = (audio_output->crtc_info.calculated_pixel_clock * 36) / 24;
+ break;
+ case COLOR_DEPTH_161616:
+ audio_output->crtc_info.calculated_pixel_clock = (audio_output->crtc_info.calculated_pixel_clock * 48) / 24;
+ break;
+ default:
+ ASSERT(0);
+ break;
+ }
+ }
+ }
+
if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT ||
pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {
audio_output->pll_info.dp_dto_source_clock_in_khz =
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
index f6e546a..074fb97 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
@@ -776,6 +776,7 @@ static void get_pixel_clock_parameters(
pixel_clk_params->flags.DISPLAY_BLANKED = 1;
pixel_clk_params->flags.SUPPORT_YCBCR420 = (stream->public.timing.pixel_encoding ==
PIXEL_ENCODING_YCBCR420);
+ pixel_clk_params->pixel_encoding = stream->public.timing.pixel_encoding;
}
void dce110_resource_build_bit_depth_reduction_params(
--
2.7.4
|
